1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 45f5860992SSakthivel K 46f5860992SSakthivel K #define SMP_DIRECT 1 47f5860992SSakthivel K #define SMP_INDIRECT 2 48d078b511SAnand Kumar Santhanam 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 51d078b511SAnand Kumar Santhanam { 52d078b511SAnand Kumar Santhanam u32 reg_val; 53d078b511SAnand Kumar Santhanam unsigned long start; 54d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 55d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 56d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 57d078b511SAnand Kumar Santhanam do { 58d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 59d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 60d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n", 621b5d2793SJoe Perches reg_val); 63d078b511SAnand Kumar Santhanam return -1; 64d078b511SAnand Kumar Santhanam } 65d078b511SAnand Kumar Santhanam return 0; 66d078b511SAnand Kumar Santhanam } 67d078b511SAnand Kumar Santhanam 68ea310f57SLee Jones static void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 69d078b511SAnand Kumar Santhanam const void *destination, 70d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 71d078b511SAnand Kumar Santhanam { 72d078b511SAnand Kumar Santhanam u32 index, value, offset; 73d078b511SAnand Kumar Santhanam u32 *destination1; 74d078b511SAnand Kumar Santhanam destination1 = (u32 *)destination; 75d078b511SAnand Kumar Santhanam 76d078b511SAnand Kumar Santhanam for (index = 0; index < dw_count; index += 4, destination1++) { 77044f59deSDeepak Ukey offset = (soffset + index); 78d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 79d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 80d078b511SAnand Kumar Santhanam *destination1 = cpu_to_le32(value); 81d078b511SAnand Kumar Santhanam } 82d078b511SAnand Kumar Santhanam } 83d078b511SAnand Kumar Santhanam return; 84d078b511SAnand Kumar Santhanam } 85d078b511SAnand Kumar Santhanam 86d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 87d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 88d078b511SAnand Kumar Santhanam { 89d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 90d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 91d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 92d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 93d078b511SAnand Kumar Santhanam u32 accum_len , reg_val, index, *temp; 94044f59deSDeepak Ukey u32 status = 1; 95d078b511SAnand Kumar Santhanam unsigned long start; 96d078b511SAnand Kumar Santhanam u8 *direct_data; 97d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 98044f59deSDeepak Ukey u32 length_to_read; 99044f59deSDeepak Ukey u32 offset; 100d078b511SAnand Kumar Santhanam 101d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 102d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 103d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 104d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 105d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 106d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 107d078b511SAnand Kumar Santhanam (char *)buf; 108d078b511SAnand Kumar Santhanam } 109044f59deSDeepak Ukey /* initialize variables for very first call from host application */ 110d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 1111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1121b5d2793SJoe Perches "forensic_info TYPE_NON_FATAL..............\n"); 113d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 114d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 115d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 116044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset = 0; 117d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 118044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 119044f59deSDeepak Ukey 120044f59deSDeepak Ukey /* Write signature to fatal dump table */ 121044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 122044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd); 123d078b511SAnand Kumar Santhanam 124d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 1251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status); 1261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n", 1271b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n", 1291b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n", 1311b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 132044f59deSDeepak Ukey } 133044f59deSDeepak Ukey if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 134d078b511SAnand Kumar Santhanam /* start to get data */ 135d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 136d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 137d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 138d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 139d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 140d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 141d078b511SAnand Kumar Santhanam } 142cf370066SViswas G 143d078b511SAnand Kumar Santhanam /* Read until accum_len is retrived */ 144d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 145d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 146044f59deSDeepak Ukey /* Determine length of data between previously stored transfer length 147044f59deSDeepak Ukey * and current accumulated transfer length 148044f59deSDeepak Ukey */ 149044f59deSDeepak Ukey length_to_read = 150044f59deSDeepak Ukey accum_len - pm8001_ha->forensic_preserved_accumulated_transfer; 1511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n", 1521b5d2793SJoe Perches accum_len); 1531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n", 1541b5d2793SJoe Perches length_to_read); 1551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n", 1561b5d2793SJoe Perches pm8001_ha->forensic_last_offset); 1571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n", 1581b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n", 1601b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n", 1621b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 163044f59deSDeepak Ukey 164044f59deSDeepak Ukey /* If accumulated length failed to read correctly fail the attempt.*/ 165d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 1661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1671b5d2793SJoe Perches "Possible PCI issue 0x%x not expected\n", 1681b5d2793SJoe Perches accum_len); 169044f59deSDeepak Ukey return status; 170d078b511SAnand Kumar Santhanam } 171044f59deSDeepak Ukey /* If accumulated length is zero fail the attempt */ 172044f59deSDeepak Ukey if (accum_len == 0) { 173d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 174d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 175d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 176d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 177d078b511SAnand Kumar Santhanam (char *)buf; 178d078b511SAnand Kumar Santhanam } 179044f59deSDeepak Ukey /* Accumulated length is good so start capturing the first data */ 180d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 181d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 182d078b511SAnand Kumar Santhanam moreData: 183044f59deSDeepak Ukey /* If data to read is less than SYSFS_OFFSET then reduce the 184044f59deSDeepak Ukey * length of dataLen 185044f59deSDeepak Ukey */ 186044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET 187044f59deSDeepak Ukey > length_to_read) { 188044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 189044f59deSDeepak Ukey length_to_read - 190044f59deSDeepak Ukey pm8001_ha->forensic_last_offset; 191044f59deSDeepak Ukey } else { 192044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 193044f59deSDeepak Ukey SYSFS_OFFSET; 194044f59deSDeepak Ukey } 195d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 196d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 197044f59deSDeepak Ukey pm80xx_pci_mem_copy(pm8001_ha, 198044f59deSDeepak Ukey pm8001_ha->fatal_bar_loc, 199d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 200044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len, 1); 201d078b511SAnand Kumar Santhanam } 202d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 203d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 204d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 205d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 206d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 207d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 208d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 209d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 210d078b511SAnand Kumar Santhanam 211044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset >= length_to_read) { 212d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 213d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 214d078b511SAnand Kumar Santhanam "%08x ", 3); 215044f59deSDeepak Ukey for (index = 0; index < 216044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 217044f59deSDeepak Ukey / 4); index++) { 218d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 219044f59deSDeepak Ukey sprintf( 220044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 221d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 222d078b511SAnand Kumar Santhanam } 223d078b511SAnand Kumar Santhanam 224d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 225d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 226d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 227d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 228044f59deSDeepak Ukey status = 0; 229044f59deSDeepak Ukey offset = (int) 230044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 231044f59deSDeepak Ukey - (char *)buf); 2321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2331b5d2793SJoe Perches "get_fatal_spcv:return1 0x%x\n", offset); 234d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 235d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 236d078b511SAnand Kumar Santhanam (char *)buf; 237d078b511SAnand Kumar Santhanam } 238d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 239d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 240d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 241d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 242d078b511SAnand Kumar Santhanam "%08x ", 2); 243044f59deSDeepak Ukey for (index = 0; index < 244044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 245044f59deSDeepak Ukey / 4); index++) { 246044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 247044f59deSDeepak Ukey += sprintf(pm8001_ha-> 248d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 249d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 250d078b511SAnand Kumar Santhanam } 251044f59deSDeepak Ukey status = 0; 252044f59deSDeepak Ukey offset = (int) 253044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 254044f59deSDeepak Ukey - (char *)buf); 2551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2561b5d2793SJoe Perches "get_fatal_spcv:return2 0x%x\n", offset); 257d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 258d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 259d078b511SAnand Kumar Santhanam (char *)buf; 260d078b511SAnand Kumar Santhanam } 261d078b511SAnand Kumar Santhanam 262d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 263d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 264d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 265d078b511SAnand Kumar Santhanam "%08x ", 2); 266044f59deSDeepak Ukey for (index = 0; index < 267044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 268044f59deSDeepak Ukey / 4) ; index++) { 269d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 270d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 271d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 272d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 273d078b511SAnand Kumar Santhanam } 274d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 275d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 276d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 277d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 278044f59deSDeepak Ukey status = 0; 279044f59deSDeepak Ukey offset = (int) 280044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 281044f59deSDeepak Ukey - (char *)buf); 2821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n", 2831b5d2793SJoe Perches offset); 284d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 285d078b511SAnand Kumar Santhanam (char *)buf; 286d078b511SAnand Kumar Santhanam } 287d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 288044f59deSDeepak Ukey /* store previous accumulated length before triggering next 289044f59deSDeepak Ukey * accumulated length update 290044f59deSDeepak Ukey */ 291044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 292044f59deSDeepak Ukey pm8001_mr32(fatal_table_address, 293044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 294044f59deSDeepak Ukey 295044f59deSDeepak Ukey /* continue capturing the fatal log until Dump status is 0x3 */ 296044f59deSDeepak Ukey if (pm8001_mr32(fatal_table_address, 297044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS) < 298044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 299044f59deSDeepak Ukey 300044f59deSDeepak Ukey /* reset fddstat bit by writing to zero*/ 301044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 302044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS, 0x0); 303044f59deSDeepak Ukey 304044f59deSDeepak Ukey /* set dump control value to '1' so that new data will 305044f59deSDeepak Ukey * be transferred to shared memory 306044f59deSDeepak Ukey */ 307d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 308d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 309d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 310d078b511SAnand Kumar Santhanam 311d078b511SAnand Kumar Santhanam /*Poll FDDHSHK until clear */ 312d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 313d078b511SAnand Kumar Santhanam 314d078b511SAnand Kumar Santhanam do { 315d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 316d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 317d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 318d078b511SAnand Kumar Santhanam 319d078b511SAnand Kumar Santhanam if (reg_val != 0) { 3201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 321044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n", 3221b5d2793SJoe Perches reg_val); 323044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 324044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 325044f59deSDeepak Ukey sprintf( 326044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 327044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 328044f59deSDeepak Ukey return((char *) 329044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 330044f59deSDeepak Ukey - (char *)buf); 331d078b511SAnand Kumar Santhanam } 332044f59deSDeepak Ukey /* Poll status register until set to 2 or 333044f59deSDeepak Ukey * 3 for up to 2 seconds 334044f59deSDeepak Ukey */ 335044f59deSDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 336d078b511SAnand Kumar Santhanam 337044f59deSDeepak Ukey do { 338044f59deSDeepak Ukey reg_val = pm8001_mr32(fatal_table_address, 339044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 3400e7c353eSColin Ian King } while (((reg_val != 2) && (reg_val != 3)) && 341044f59deSDeepak Ukey time_before(jiffies, start)); 342044f59deSDeepak Ukey 343044f59deSDeepak Ukey if (reg_val < 2) { 3441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 345044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n", 3461b5d2793SJoe Perches reg_val); 347044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 348044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 349044f59deSDeepak Ukey sprintf( 350044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 351044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 352044f59deSDeepak Ukey pm8001_cw32(pm8001_ha, 0, 353044f59deSDeepak Ukey MEMBASE_II_SHIFT_REGISTER, 354044f59deSDeepak Ukey pm8001_ha->fatal_forensic_shift_offset); 355044f59deSDeepak Ukey } 356044f59deSDeepak Ukey /* Read the next block of the debug data.*/ 357044f59deSDeepak Ukey length_to_read = pm8001_mr32(fatal_table_address, 358044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN) - 359044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 360044f59deSDeepak Ukey if (length_to_read != 0x0) { 361d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 362d078b511SAnand Kumar Santhanam goto moreData; 363d078b511SAnand Kumar Santhanam } else { 364d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 365044f59deSDeepak Ukey sprintf( 366044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 367d078b511SAnand Kumar Santhanam "%08x ", 4); 368044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.read_len 369044f59deSDeepak Ukey = 0xFFFFFFFF; 370044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len 371044f59deSDeepak Ukey = 0; 372044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset 373044f59deSDeepak Ukey = 0; 374d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 375d078b511SAnand Kumar Santhanam } 376d078b511SAnand Kumar Santhanam } 377044f59deSDeepak Ukey } 378044f59deSDeepak Ukey offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data 379044f59deSDeepak Ukey - (char *)buf); 3801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset); 381d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 382d078b511SAnand Kumar Santhanam (char *)buf; 383d078b511SAnand Kumar Santhanam } 384d078b511SAnand Kumar Santhanam 385dba2cc03SDeepak Ukey /* pm80xx_get_non_fatal_dump - dump the nonfatal data from the dma 386dba2cc03SDeepak Ukey * location by the firmware. 387dba2cc03SDeepak Ukey */ 388dba2cc03SDeepak Ukey ssize_t pm80xx_get_non_fatal_dump(struct device *cdev, 389dba2cc03SDeepak Ukey struct device_attribute *attr, char *buf) 390dba2cc03SDeepak Ukey { 391dba2cc03SDeepak Ukey struct Scsi_Host *shost = class_to_shost(cdev); 392dba2cc03SDeepak Ukey struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 393dba2cc03SDeepak Ukey struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 394dba2cc03SDeepak Ukey void __iomem *nonfatal_table_address = pm8001_ha->fatal_tbl_addr; 395dba2cc03SDeepak Ukey u32 accum_len = 0; 396dba2cc03SDeepak Ukey u32 total_len = 0; 397dba2cc03SDeepak Ukey u32 reg_val = 0; 398dba2cc03SDeepak Ukey u32 *temp = NULL; 399dba2cc03SDeepak Ukey u32 index = 0; 400dba2cc03SDeepak Ukey u32 output_length; 401dba2cc03SDeepak Ukey unsigned long start = 0; 402dba2cc03SDeepak Ukey char *buf_copy = buf; 403dba2cc03SDeepak Ukey 404dba2cc03SDeepak Ukey temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 405dba2cc03SDeepak Ukey if (++pm8001_ha->non_fatal_count == 1) { 406dba2cc03SDeepak Ukey if (pm8001_ha->chip_id == chip_8001) { 407dba2cc03SDeepak Ukey snprintf(pm8001_ha->forensic_info.data_buf.direct_data, 408dba2cc03SDeepak Ukey PAGE_SIZE, "Not supported for SPC controller"); 409dba2cc03SDeepak Ukey return 0; 410dba2cc03SDeepak Ukey } 4111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n"); 412dba2cc03SDeepak Ukey /* 413dba2cc03SDeepak Ukey * Step 1: Write the host buffer parameters in the MPI Fatal and 414dba2cc03SDeepak Ukey * Non-Fatal Error Dump Capture Table.This is the buffer 415dba2cc03SDeepak Ukey * where debug data will be DMAed to. 416dba2cc03SDeepak Ukey */ 417dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 418dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LO_OFFSET, 419dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_lo); 420dba2cc03SDeepak Ukey 421dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 422dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HI_OFFSET, 423dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_hi); 424dba2cc03SDeepak Ukey 425dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 426dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LENGTH, SYSFS_OFFSET); 427dba2cc03SDeepak Ukey 428dba2cc03SDeepak Ukey /* Optionally, set the DUMPCTRL bit to 1 if the host 429dba2cc03SDeepak Ukey * keeps sending active I/Os while capturing the non-fatal 430dba2cc03SDeepak Ukey * debug data. Otherwise, leave this bit set to zero 431dba2cc03SDeepak Ukey */ 432dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 433dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HANDSHAKE, MPI_FATAL_EDUMP_HANDSHAKE_RDY); 434dba2cc03SDeepak Ukey 435dba2cc03SDeepak Ukey /* 436dba2cc03SDeepak Ukey * Step 2: Clear Accumulative Length of Debug Data Transferred 437dba2cc03SDeepak Ukey * [ACCDDLEN] field in the MPI Fatal and Non-Fatal Error Dump 438dba2cc03SDeepak Ukey * Capture Table to zero. 439dba2cc03SDeepak Ukey */ 440dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 441dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN, 0); 442dba2cc03SDeepak Ukey 443dba2cc03SDeepak Ukey /* initiallize previous accumulated length to 0 */ 444dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 445dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 446dba2cc03SDeepak Ukey } 447dba2cc03SDeepak Ukey 448dba2cc03SDeepak Ukey total_len = pm8001_mr32(nonfatal_table_address, 449dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_TOTAL_LEN); 450dba2cc03SDeepak Ukey /* 451dba2cc03SDeepak Ukey * Step 3:Clear Fatal/Non-Fatal Debug Data Transfer Status [FDDTSTAT] 452dba2cc03SDeepak Ukey * field and then request that the SPCv controller transfer the debug 453dba2cc03SDeepak Ukey * data by setting bit 7 of the Inbound Doorbell Set Register. 454dba2cc03SDeepak Ukey */ 455dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, MPI_FATAL_EDUMP_TABLE_STATUS, 0); 456dba2cc03SDeepak Ukey pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, 457dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP); 458dba2cc03SDeepak Ukey 459dba2cc03SDeepak Ukey /* 460dba2cc03SDeepak Ukey * Step 4.1: Read back the Inbound Doorbell Set Register (by polling for 461dba2cc03SDeepak Ukey * 2 seconds) until register bit 7 is cleared. 462dba2cc03SDeepak Ukey * This step only indicates the request is accepted by the controller. 463dba2cc03SDeepak Ukey */ 464dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 465dba2cc03SDeepak Ukey do { 466dba2cc03SDeepak Ukey reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) & 467dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP; 468dba2cc03SDeepak Ukey } while ((reg_val != 0) && time_before(jiffies, start)); 469dba2cc03SDeepak Ukey 470dba2cc03SDeepak Ukey /* Step 4.2: To check the completion of the transfer, poll the Fatal/Non 471dba2cc03SDeepak Ukey * Fatal Debug Data Transfer Status [FDDTSTAT] field for 2 seconds in 472dba2cc03SDeepak Ukey * the MPI Fatal and Non-Fatal Error Dump Capture Table. 473dba2cc03SDeepak Ukey */ 474dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 475dba2cc03SDeepak Ukey do { 476dba2cc03SDeepak Ukey reg_val = pm8001_mr32(nonfatal_table_address, 477dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 478dba2cc03SDeepak Ukey } while ((!reg_val) && time_before(jiffies, start)); 479dba2cc03SDeepak Ukey 480dba2cc03SDeepak Ukey if ((reg_val == 0x00) || 481dba2cc03SDeepak Ukey (reg_val == MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED) || 482dba2cc03SDeepak Ukey (reg_val > MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE)) { 483dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 484dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 0xFFFFFFFF); 485dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 486dba2cc03SDeepak Ukey return (buf_copy - buf); 487dba2cc03SDeepak Ukey } else if (reg_val == 488dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA) { 489dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 2); 490dba2cc03SDeepak Ukey } else if ((reg_val == MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) || 491dba2cc03SDeepak Ukey (pm8001_ha->non_fatal_read_length >= total_len)) { 492dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 493dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 4); 494dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 495dba2cc03SDeepak Ukey } 496dba2cc03SDeepak Ukey accum_len = pm8001_mr32(nonfatal_table_address, 497dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 498dba2cc03SDeepak Ukey output_length = accum_len - 499dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 500dba2cc03SDeepak Ukey 501dba2cc03SDeepak Ukey for (index = 0; index < output_length/4; index++) 502dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, 503dba2cc03SDeepak Ukey "%08x ", *(temp+index)); 504dba2cc03SDeepak Ukey 505dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length += output_length; 506dba2cc03SDeepak Ukey 507dba2cc03SDeepak Ukey /* store current accumulated length to use in next iteration as 508dba2cc03SDeepak Ukey * the previous accumulated length 509dba2cc03SDeepak Ukey */ 510dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = accum_len; 511dba2cc03SDeepak Ukey return (buf_copy - buf); 512dba2cc03SDeepak Ukey } 513dba2cc03SDeepak Ukey 514f5860992SSakthivel K /** 515f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 516f5860992SSakthivel K * @pm8001_ha: our hba card information 517f5860992SSakthivel K */ 518f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 519f5860992SSakthivel K { 520f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 521f5860992SSakthivel K 522f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 523f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 524f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 525f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 526f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 527f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 528f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 529f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 530f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 531f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 532f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 533f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 534f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 535f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 536f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 537f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 538f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 539f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 540f5860992SSakthivel K 541f5860992SSakthivel K /* read Error Dump Offset and Length */ 542f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 543f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 544f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 545f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 546f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 547f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 548f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 549f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 550f5860992SSakthivel K 551f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 552f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 553f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 554f5860992SSakthivel K 555f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 556f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 557f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 558f5860992SSakthivel K 559f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 560f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 561f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 562f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 5638414cd80SViswas G /* read port recover and reset timeout */ 5648414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 5658414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 56624fff017SViswas G /* read ILA and inactive firmware version */ 56724fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 56824fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 56924fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 57024fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 5717370672dSpeter chang 5721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5737370672dSpeter chang "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n", 5747370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, 5757370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, 5761b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev); 5777370672dSpeter chang 5781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5797370672dSpeter chang "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n", 5807370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, 5817370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, 5827370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, 5837370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, 5841b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset); 5857370672dSpeter chang 5861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5877370672dSpeter chang "Main cfg table; ila rev:%x Inactive fw rev:%x\n", 5887370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, 5891b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version); 590f5860992SSakthivel K } 591f5860992SSakthivel K 592f5860992SSakthivel K /** 593f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 594f5860992SSakthivel K * @pm8001_ha: our hba card information 595f5860992SSakthivel K */ 596f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 597f5860992SSakthivel K { 598f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 599f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 600f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 601f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 602f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 603f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 604f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 605f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 606f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 607f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 608f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 609f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 610f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 611f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 612f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 613f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 614f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 615f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 616f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 617f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 618f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 619f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 620f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 621f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 622f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 623f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 624f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 625f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 626f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 627f5860992SSakthivel K } 628f5860992SSakthivel K /** 629f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 630f5860992SSakthivel K * @pm8001_ha: our hba card information 631f5860992SSakthivel K */ 632f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 633f5860992SSakthivel K { 634f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 635f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 636f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 637f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 638f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 639f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 640f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 641f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 642f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 643f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 644f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 645f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 646f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 647f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 648f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 649f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 650f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 651f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 652f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 653f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 654f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 655f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 656f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 657f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 658f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 659f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 660f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 661f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 662f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 663f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 664f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 665f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 666f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 667f5860992SSakthivel K 668f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 669f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 670f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 671f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 672f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 673f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 674f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 675f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 676f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 677f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 678f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 679f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 680f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 681f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 682f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 683f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 684f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 685f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 686f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 687f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 688f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 689f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 690f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 691f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 692f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 693f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 694f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 695f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 696f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 697f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 698f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 699f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 700f5860992SSakthivel K 701f5860992SSakthivel K } 702f5860992SSakthivel K 703f5860992SSakthivel K /** 704f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 705f5860992SSakthivel K * @pm8001_ha: our hba card information 706f5860992SSakthivel K */ 707f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 708f5860992SSakthivel K { 709f5860992SSakthivel K int i; 710f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 71105c6c029SViswas G for (i = 0; i < PM8001_MAX_INB_NUM; i++) { 712f5860992SSakthivel K u32 offset = i * 0x20; 713f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 714f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 715f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 716f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 717f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 718f5860992SSakthivel K } 719f5860992SSakthivel K } 720f5860992SSakthivel K 721f5860992SSakthivel K /** 722f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 723f5860992SSakthivel K * @pm8001_ha: our hba card information 724f5860992SSakthivel K */ 725f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 726f5860992SSakthivel K { 727f5860992SSakthivel K int i; 728f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 72905c6c029SViswas G for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) { 730f5860992SSakthivel K u32 offset = i * 0x24; 731f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 732f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 733f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 734f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 735f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 736f5860992SSakthivel K } 737f5860992SSakthivel K } 738f5860992SSakthivel K 739f5860992SSakthivel K /** 740f5860992SSakthivel K * init_default_table_values - init the default table. 741f5860992SSakthivel K * @pm8001_ha: our hba card information 742f5860992SSakthivel K */ 743f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 744f5860992SSakthivel K { 745f5860992SSakthivel K int i; 746f5860992SSakthivel K u32 offsetib, offsetob; 747f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 748f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 74905c6c029SViswas G u32 ib_offset = pm8001_ha->ib_offset; 75005c6c029SViswas G u32 ob_offset = pm8001_ha->ob_offset; 75105c6c029SViswas G u32 ci_offset = pm8001_ha->ci_offset; 75205c6c029SViswas G u32 pi_offset = pm8001_ha->pi_offset; 753f5860992SSakthivel K 754f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 755f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 756f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 757f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 758f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 759f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 760f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 761f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 762f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 763f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 764f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 765f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 766f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 767f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 768f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 769f5860992SSakthivel K 770c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 771c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 772c6b9ef57SSakthivel K 77305c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 774f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 7759504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 776f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 77705c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi; 778f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 77905c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo; 780f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 78105c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr; 782f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 78305c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].total_len; 784f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 78505c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi; 786f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 78705c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo; 788f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 78905c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr; 790f5860992SSakthivel K offsetib = i * 0x20; 791f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 792f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 793f5860992SSakthivel K (offsetib + 0x14))); 794f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 795f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 796f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 797f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 7987370672dSpeter chang 7991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8007370672dSpeter chang "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i, 8017370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, 8021b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[i].pi_offset); 803f5860992SSakthivel K } 80405c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 805f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 8069504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 807f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 80805c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi; 809f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 81005c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo; 811f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 81205c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr; 813f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 81405c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].total_len; 815f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 81605c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi; 817f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 81805c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo; 819f5860992SSakthivel K /* interrupt vector based on oq */ 820f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 821f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 82205c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr; 823f5860992SSakthivel K offsetob = i * 0x24; 824f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 825f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 826f5860992SSakthivel K offsetob + 0x14)); 827f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 828f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 829f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 830f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 8317370672dSpeter chang 8321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8337370672dSpeter chang "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i, 8347370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, 8351b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[i].ci_offset); 836f5860992SSakthivel K } 837f5860992SSakthivel K } 838f5860992SSakthivel K 839f5860992SSakthivel K /** 840f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 841f5860992SSakthivel K * @pm8001_ha: our hba card information 842f5860992SSakthivel K */ 843f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 844f5860992SSakthivel K { 845f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 846f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 847f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 848f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 849f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 850f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 851f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 852f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 853f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 854f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 855f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 856f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 857f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 858f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 859f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 860f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 861f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 862f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 863f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 86472349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 86572349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 86605c6c029SViswas G ((pm8001_ha->max_q_num - 1) << 8); 867f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 868f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 8691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8707370672dSpeter chang "Updated Fatal error interrupt vector 0x%x\n", 8711b5d2793SJoe Perches pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)); 8727370672dSpeter chang 873c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 874c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 875f5860992SSakthivel K 876f5860992SSakthivel K /* SPCv specific */ 877f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 878f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 879f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 880f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 881f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 8821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8837370672dSpeter chang "Programming DW 0x21 in main cfg table with 0x%x\n", 8841b5d2793SJoe Perches pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)); 885f5860992SSakthivel K 886f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 887f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 888f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 889f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 8908414cd80SViswas G 8918414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 8928414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 8938414cd80SViswas G PORT_RECOVERY_TIMEOUT; 89461daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 89561daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 89661daffdeSViswas G 0x0000ffff; 89761daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 898196ba662SDeepak Ukey CHIP_8006_PORT_RECOVERY_TIMEOUT; 89961daffdeSViswas G } 9008414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 9018414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 902f5860992SSakthivel K } 903f5860992SSakthivel K 904f5860992SSakthivel K /** 905f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 906f5860992SSakthivel K * @pm8001_ha: our hba card information 9076ad4a517SLee Jones * @number: entry in the queue 908f5860992SSakthivel K */ 909f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 910f5860992SSakthivel K int number) 911f5860992SSakthivel K { 912f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 913f5860992SSakthivel K u16 offset = number * 0x20; 914f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 915f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 916f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 917f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 918f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 919f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 920f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 921f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 922f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 923f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 9247370672dSpeter chang 9251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9267370672dSpeter chang "IQ %d: Element pri size 0x%x\n", 9277370672dSpeter chang number, 9281b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 9297370672dSpeter chang 9301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9317370672dSpeter chang "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n", 9327370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].upper_base_addr, 9331b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 9347370672dSpeter chang 9351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9367370672dSpeter chang "CI upper base addr 0x%x CI lower base addr 0x%x\n", 9377370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, 9381b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 939f5860992SSakthivel K } 940f5860992SSakthivel K 941f5860992SSakthivel K /** 942f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 943f5860992SSakthivel K * @pm8001_ha: our hba card information 9446ad4a517SLee Jones * @number: entry in the queue 945f5860992SSakthivel K */ 946f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 947f5860992SSakthivel K int number) 948f5860992SSakthivel K { 949f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 950f5860992SSakthivel K u16 offset = number * 0x24; 951f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 952f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 953f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 954f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 955f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 956f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 957f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 958f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 959f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 960f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 961f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 962f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 9637370672dSpeter chang 9641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9657370672dSpeter chang "OQ %d: Element pri size 0x%x\n", 9667370672dSpeter chang number, 9671b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 9687370672dSpeter chang 9691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9707370672dSpeter chang "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n", 9717370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].upper_base_addr, 9721b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 9737370672dSpeter chang 9741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9757370672dSpeter chang "PI upper base addr 0x%x PI lower base addr 0x%x\n", 9767370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, 9771b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 978f5860992SSakthivel K } 979f5860992SSakthivel K 980f5860992SSakthivel K /** 981f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 982f5860992SSakthivel K * @pm8001_ha: our hba card information 983f5860992SSakthivel K */ 984f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 985f5860992SSakthivel K { 986f5860992SSakthivel K u32 max_wait_count; 987f5860992SSakthivel K u32 value; 988f5860992SSakthivel K u32 gst_len_mpistate; 989f5860992SSakthivel K 990f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 991f5860992SSakthivel K table is updated */ 992f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 993f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 994a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 995e90e2362Sianyar max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 996a9a923e5SAnand Kumar Santhanam } else { 997e90e2362Sianyar max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 998a9a923e5SAnand Kumar Santhanam } 999f5860992SSakthivel K do { 1000f5860992SSakthivel K udelay(1); 1001f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1002f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 1003f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1004f5860992SSakthivel K 100505c6c029SViswas G if (!max_wait_count) { 100605c6c029SViswas G /* additional check */ 10071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 10081b5d2793SJoe Perches "Inb doorbell clear not toggled[value:%x]\n", 10091b5d2793SJoe Perches value); 101005c6c029SViswas G return -EBUSY; 101105c6c029SViswas G } 1012f5860992SSakthivel K /* check the MPI-State for initialization upto 100ms*/ 1013f5860992SSakthivel K max_wait_count = 100 * 1000;/* 100 msec */ 1014f5860992SSakthivel K do { 1015f5860992SSakthivel K udelay(1); 1016f5860992SSakthivel K gst_len_mpistate = 1017f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1018f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1019f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 1020f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 1021f5860992SSakthivel K if (!max_wait_count) 102205c6c029SViswas G return -EBUSY; 1023f5860992SSakthivel K 1024f5860992SSakthivel K /* check MPI Initialization error */ 1025f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 1026f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 102705c6c029SViswas G return -EBUSY; 1028f5860992SSakthivel K 1029f5860992SSakthivel K return 0; 1030f5860992SSakthivel K } 1031f5860992SSakthivel K 1032f5860992SSakthivel K /** 1033f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 103448cd6b38Sakshatzen * This function sleeps hence it must not be used in atomic context. 1035f5860992SSakthivel K * @pm8001_ha: our hba card information 1036f5860992SSakthivel K */ 1037f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 1038f5860992SSakthivel K { 1039f5860992SSakthivel K u32 value; 1040f5860992SSakthivel K u32 max_wait_count; 1041f5860992SSakthivel K u32 max_wait_time; 1042f5860992SSakthivel K int ret = 0; 1043f5860992SSakthivel K 1044f5860992SSakthivel K /* reset / PCIe ready */ 104548cd6b38Sakshatzen max_wait_time = max_wait_count = 5; /* 100 milli sec */ 1046f5860992SSakthivel K do { 104748cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1048f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1049f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 1050f5860992SSakthivel K 1051f5860992SSakthivel K /* check ila status */ 105248cd6b38Sakshatzen max_wait_time = max_wait_count = 50; /* 1000 milli sec */ 1053f5860992SSakthivel K do { 105448cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1055f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1056f5860992SSakthivel K } while (((value & SCRATCH_PAD_ILA_READY) != 1057f5860992SSakthivel K SCRATCH_PAD_ILA_READY) && (--max_wait_count)); 1058f5860992SSakthivel K if (!max_wait_count) 1059f5860992SSakthivel K ret = -1; 1060f5860992SSakthivel K else { 10611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 10621b5d2793SJoe Perches " ila ready status in %d millisec\n", 10631b5d2793SJoe Perches (max_wait_time - max_wait_count)); 1064f5860992SSakthivel K } 1065f5860992SSakthivel K 1066f5860992SSakthivel K /* check RAAE status */ 106748cd6b38Sakshatzen max_wait_time = max_wait_count = 90; /* 1800 milli sec */ 1068f5860992SSakthivel K do { 106948cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1070f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1071f5860992SSakthivel K } while (((value & SCRATCH_PAD_RAAE_READY) != 1072f5860992SSakthivel K SCRATCH_PAD_RAAE_READY) && (--max_wait_count)); 1073f5860992SSakthivel K if (!max_wait_count) 1074f5860992SSakthivel K ret = -1; 1075f5860992SSakthivel K else { 10761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 10771b5d2793SJoe Perches " raae ready status in %d millisec\n", 10781b5d2793SJoe Perches (max_wait_time - max_wait_count)); 1079f5860992SSakthivel K } 1080f5860992SSakthivel K 1081f5860992SSakthivel K /* check iop0 status */ 108248cd6b38Sakshatzen max_wait_time = max_wait_count = 30; /* 600 milli sec */ 1083f5860992SSakthivel K do { 108448cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1085f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1086f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP0_READY) != SCRATCH_PAD_IOP0_READY) && 1087f5860992SSakthivel K (--max_wait_count)); 1088f5860992SSakthivel K if (!max_wait_count) 1089f5860992SSakthivel K ret = -1; 1090f5860992SSakthivel K else { 10911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 10921b5d2793SJoe Perches " iop0 ready status in %d millisec\n", 10931b5d2793SJoe Perches (max_wait_time - max_wait_count)); 1094f5860992SSakthivel K } 1095f5860992SSakthivel K 1096f5860992SSakthivel K /* check iop1 status only for 16 port controllers */ 1097f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 1098f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 1099f5860992SSakthivel K /* 200 milli sec */ 110048cd6b38Sakshatzen max_wait_time = max_wait_count = 10; 1101f5860992SSakthivel K do { 110248cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1103f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1104f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP1_READY) != 1105f5860992SSakthivel K SCRATCH_PAD_IOP1_READY) && (--max_wait_count)); 1106f5860992SSakthivel K if (!max_wait_count) 1107f5860992SSakthivel K ret = -1; 1108f5860992SSakthivel K else { 11091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 1110f5860992SSakthivel K "iop1 ready status in %d millisec\n", 11111b5d2793SJoe Perches (max_wait_time - max_wait_count)); 1112f5860992SSakthivel K } 1113f5860992SSakthivel K } 1114f5860992SSakthivel K 1115f5860992SSakthivel K return ret; 1116f5860992SSakthivel K } 1117f5860992SSakthivel K 1118f5860992SSakthivel K static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 1119f5860992SSakthivel K { 1120f5860992SSakthivel K void __iomem *base_addr; 1121f5860992SSakthivel K u32 value; 1122f5860992SSakthivel K u32 offset; 1123f5860992SSakthivel K u32 pcibar; 1124f5860992SSakthivel K u32 pcilogic; 1125f5860992SSakthivel K 1126f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 1127f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 1128f5860992SSakthivel K 11291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n", 11301b5d2793SJoe Perches offset, value); 1131f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 1132f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 11331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); 1134f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 1135f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 1136f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 1137f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 1138f5860992SSakthivel K 0xFFFFFF); 1139f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 1140f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 1141f5860992SSakthivel K 0xFFFFFF); 1142f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 1143f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 1144f5860992SSakthivel K 0xFFFFFF); 1145f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 1146f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 1147f5860992SSakthivel K 0xFFFFFF); 1148f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 1149f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 1150f5860992SSakthivel K 0xFFFFFF); 1151d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 1152d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 1153d078b511SAnand Kumar Santhanam 0xFFFFFF); 1154f5860992SSakthivel K 11551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n", 11561b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)); 11571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n", 11581b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)); 11591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n", 11601b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)); 11611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n", 11621b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)); 11631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n", 11641b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)); 11651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n", 1166f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 11671b5d2793SJoe Perches pm8001_ha->general_stat_tbl_addr); 11681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n", 1169f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 11701b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl_addr); 11711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n", 1172f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 11731b5d2793SJoe Perches pm8001_ha->ivt_tbl_addr); 1174f5860992SSakthivel K } 1175f5860992SSakthivel K 1176f5860992SSakthivel K /** 1177f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 1178f5860992SSakthivel K * @pm8001_ha: our hba card information. 1179f5860992SSakthivel K */ 1180a6cb3d01SSakthivel K int 1181f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 1182f5860992SSakthivel K { 1183f5860992SSakthivel K struct set_ctrl_cfg_req payload; 1184f5860992SSakthivel K struct inbound_queue_table *circularQ; 1185f5860992SSakthivel K int rc; 1186f5860992SSakthivel K u32 tag; 1187f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1188842784e0SViswas G u32 page_code; 1189f5860992SSakthivel K 1190f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1191f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1192f5860992SSakthivel K if (rc) 1193f5860992SSakthivel K return -1; 1194f5860992SSakthivel K 1195f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1196f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1197842784e0SViswas G 1198842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 1199842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 1200842784e0SViswas G else 1201842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 1202842784e0SViswas G 1203f5860992SSakthivel K payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) | 1204842784e0SViswas G (THERMAL_ENABLE << 8) | page_code; 1205f5860992SSakthivel K payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8); 1206f5860992SSakthivel K 12071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 12087370672dSpeter chang "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n", 12091b5d2793SJoe Perches payload.cfg_pg[0], payload.cfg_pg[1]); 12107370672dSpeter chang 121191a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 121291a43fa6Speter chang sizeof(payload), 0); 12135533abcaSTomas Henzl if (rc) 12145533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1215f5860992SSakthivel K return rc; 1216f5860992SSakthivel K 1217f5860992SSakthivel K } 1218f5860992SSakthivel K 1219f5860992SSakthivel K /** 1220a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 1221a6cb3d01SSakthivel K * Timer configuration page 1222a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 1223a6cb3d01SSakthivel K */ 1224a6cb3d01SSakthivel K static int 1225a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 1226a6cb3d01SSakthivel K { 1227a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 1228a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 1229a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 1230a6cb3d01SSakthivel K int rc; 1231a6cb3d01SSakthivel K u32 tag; 1232a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1233a6cb3d01SSakthivel K 1234a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1235a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 1236a6cb3d01SSakthivel K 1237a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1238a6cb3d01SSakthivel K 1239a6cb3d01SSakthivel K if (rc) 1240a6cb3d01SSakthivel K return -1; 1241a6cb3d01SSakthivel K 1242a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1243a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 1244a6cb3d01SSakthivel K 1245a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 1246a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 1247a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 1248a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 1249a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 1250a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 1251a6cb3d01SSakthivel K 1252a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 1253a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 1254a6cb3d01SSakthivel K 1255a6cb3d01SSakthivel K 1256a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 1257a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 1258a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 1259a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 1260a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 1261a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 1262a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 1263a6cb3d01SSakthivel K 12641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n", 12651b5d2793SJoe Perches SASConfigPage.pageCode); 12661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI 0x%08x\n", 12671b5d2793SJoe Perches SASConfigPage.MST_MSI); 12681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO 0x%08x\n", 12691b5d2793SJoe Perches SASConfigPage.STP_SSP_MCT_TMO); 12701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO 0x%08x\n", 12711b5d2793SJoe Perches SASConfigPage.STP_FRM_TMO); 12721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO 0x%08x\n", 12731b5d2793SJoe Perches SASConfigPage.STP_IDLE_TMO); 12741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL 0x%08x\n", 12751b5d2793SJoe Perches SASConfigPage.OPNRJT_RTRY_INTVL); 12761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO 0x%08x\n", 12771b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO); 12781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR 0x%08x\n", 12791b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR); 12801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP 0x%08x\n", 12811b5d2793SJoe Perches SASConfigPage.MAX_AIP); 1282a6cb3d01SSakthivel K 1283a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 1284a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 1285a6cb3d01SSakthivel K 128691a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 128791a43fa6Speter chang sizeof(payload), 0); 12885533abcaSTomas Henzl if (rc) 12895533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1290a6cb3d01SSakthivel K 1291a6cb3d01SSakthivel K return rc; 1292a6cb3d01SSakthivel K } 1293a6cb3d01SSakthivel K 1294a6cb3d01SSakthivel K /** 1295f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 1296f5860992SSakthivel K * @pm8001_ha: our hba card information. 1297f5860992SSakthivel K */ 1298f5860992SSakthivel K static int 1299f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 1300f5860992SSakthivel K { 1301f5860992SSakthivel K u32 scratch3_value; 1302da225498SRickard Strandqvist int ret = -1; 1303f5860992SSakthivel K 1304f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 1305f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1306f5860992SSakthivel K 1307f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1308f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 1309f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1310f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1311f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1312f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1313f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1314f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1315f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1316f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1317f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1318f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1319f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1320f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 13211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13221b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X.Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 13231b5d2793SJoe Perches scratch3_value, 13241b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1325f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13261b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1327f5860992SSakthivel K ret = 0; 1328f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1329f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 13301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 1331f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 13321b5d2793SJoe Perches scratch3_value); 1333f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1334f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1335f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1336da225498SRickard Strandqvist ret = 0; 1337f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1338f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1339f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1340f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1341f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1342f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1343f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1344f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1345f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1346f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1347f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1348f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1349f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1350f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1351f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 13521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13531b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13541b5d2793SJoe Perches scratch3_value, 13551b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1356f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13571b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1358f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1359f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1360f5860992SSakthivel K 1361f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1362f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1363f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1364f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1365f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1366f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1367f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1368f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1369f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1370f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1371f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1372f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1373f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1374f5860992SSakthivel K 13751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13761b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13771b5d2793SJoe Perches scratch3_value, 13781b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1379f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13801b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1381f5860992SSakthivel K } 1382f5860992SSakthivel K return ret; 1383f5860992SSakthivel K } 1384f5860992SSakthivel K 1385f5860992SSakthivel K /** 1386f5860992SSakthivel K * pm80xx_encrypt_update - update flash with encryption informtion 1387f5860992SSakthivel K * @pm8001_ha: our hba card information. 1388f5860992SSakthivel K */ 1389f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1390f5860992SSakthivel K { 1391f5860992SSakthivel K struct kek_mgmt_req payload; 1392f5860992SSakthivel K struct inbound_queue_table *circularQ; 1393f5860992SSakthivel K int rc; 1394f5860992SSakthivel K u32 tag; 1395f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1396f5860992SSakthivel K 1397f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1398f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1399f5860992SSakthivel K if (rc) 1400f5860992SSakthivel K return -1; 1401f5860992SSakthivel K 1402f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1403f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1404f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1405f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1406f5860992SSakthivel K */ 1407f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1408f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1409f5860992SSakthivel K 14101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 14117370672dSpeter chang "Saving Encryption info to flash. payload 0x%x\n", 14121b5d2793SJoe Perches payload.new_curidx_ksop); 14137370672dSpeter chang 141491a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 141591a43fa6Speter chang sizeof(payload), 0); 14165533abcaSTomas Henzl if (rc) 14175533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1418f5860992SSakthivel K 1419f5860992SSakthivel K return rc; 1420f5860992SSakthivel K } 1421f5860992SSakthivel K 1422f5860992SSakthivel K /** 1423f5860992SSakthivel K * pm8001_chip_init - the main init function that initialize whole PM8001 chip. 1424f5860992SSakthivel K * @pm8001_ha: our hba card information 1425f5860992SSakthivel K */ 1426f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1427f5860992SSakthivel K { 1428f5860992SSakthivel K int ret; 1429f5860992SSakthivel K u8 i = 0; 1430f5860992SSakthivel K 1431f5860992SSakthivel K /* check the firmware status */ 1432f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 14331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 1434f5860992SSakthivel K return -EBUSY; 1435f5860992SSakthivel K } 1436f5860992SSakthivel K 143772349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 143872349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 143972349b62SDeepak Ukey 1440f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 1441f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1442f5860992SSakthivel K init_default_table_values(pm8001_ha); 1443f5860992SSakthivel K read_main_config_table(pm8001_ha); 1444f5860992SSakthivel K read_general_status_table(pm8001_ha); 1445f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1446f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1447f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1448f5860992SSakthivel K 1449f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1450f5860992SSakthivel K update_main_config_table(pm8001_ha); 145105c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 1452f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1453f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 145405c6c029SViswas G } 1455f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1456f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 14571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); 1458f5860992SSakthivel K } else 1459f5860992SSakthivel K return -EBUSY; 1460f5860992SSakthivel K 1461a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1462a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1463f5860992SSakthivel K 1464f5860992SSakthivel K /* Check for encryption */ 1465f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 14661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n"); 1467f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1468f5860992SSakthivel K if (ret == -1) { 14691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n"); 1470f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 14711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 14721b5d2793SJoe Perches "Encryption enabled with error.Saving encryption key to flash\n"); 1473f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1474f5860992SSakthivel K } 1475f5860992SSakthivel K } 1476f5860992SSakthivel K } 1477f5860992SSakthivel K return 0; 1478f5860992SSakthivel K } 1479f5860992SSakthivel K 1480f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1481f5860992SSakthivel K { 1482f5860992SSakthivel K u32 max_wait_count; 1483f5860992SSakthivel K u32 value; 1484f5860992SSakthivel K u32 gst_len_mpistate; 1485f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1486f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1487f5860992SSakthivel K table is stop */ 1488f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1489f5860992SSakthivel K 1490f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1491a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 1492a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 1493a9a923e5SAnand Kumar Santhanam } else { 1494a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 1495a9a923e5SAnand Kumar Santhanam } 1496f5860992SSakthivel K do { 1497f5860992SSakthivel K udelay(1); 1498f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1499f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1500f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1501f5860992SSakthivel K 1502f5860992SSakthivel K if (!max_wait_count) { 15031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value); 1504f5860992SSakthivel K return -1; 1505f5860992SSakthivel K } 1506f5860992SSakthivel K 1507f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1508f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1509f5860992SSakthivel K max_wait_count = 2 * 1000 * 1000; /* 2 sec for spcv/ve */ 1510f5860992SSakthivel K do { 1511f5860992SSakthivel K udelay(1); 1512f5860992SSakthivel K gst_len_mpistate = 1513f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1514f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1515f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1516f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1517f5860992SSakthivel K break; 1518f5860992SSakthivel K } while (--max_wait_count); 1519f5860992SSakthivel K if (!max_wait_count) { 15201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n", 15211b5d2793SJoe Perches gst_len_mpistate & GST_MPI_STATE_MASK); 1522f5860992SSakthivel K return -1; 1523f5860992SSakthivel K } 1524f5860992SSakthivel K 1525f5860992SSakthivel K return 0; 1526f5860992SSakthivel K } 1527f5860992SSakthivel K 1528f5860992SSakthivel K /** 1529f5860992SSakthivel K * pm8001_chip_soft_rst - soft reset the PM8001 chip, so that the clear all 1530f5860992SSakthivel K * the FW register status to the originated status. 1531f5860992SSakthivel K * @pm8001_ha: our hba card information 1532f5860992SSakthivel K */ 1533f5860992SSakthivel K 1534f5860992SSakthivel K static int 1535f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1536f5860992SSakthivel K { 1537f5860992SSakthivel K u32 regval; 1538f5860992SSakthivel K u32 bootloader_state; 153906f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1540f5860992SSakthivel K 154172349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 154272349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1543f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1544f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 1545d384be6eSVikram Auradkar u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 1546d384be6eSVikram Auradkar u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1547d384be6eSVikram Auradkar u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1548d384be6eSVikram Auradkar u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 15491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 1550d384be6eSVikram Auradkar "MPI state is not ready scratch: %x:%x:%x:%x\n", 15511b5d2793SJoe Perches r0, r1, r2, r3); 1552d384be6eSVikram Auradkar /* if things aren't ready but the bootloader is ok then 1553d384be6eSVikram Auradkar * try the reset anyway. 1554d384be6eSVikram Auradkar */ 1555d384be6eSVikram Auradkar if (r1 & SCRATCH_PAD1_BOOTSTATE_MASK) 1556f5860992SSakthivel K return -1; 1557f5860992SSakthivel K } 155872349b62SDeepak Ukey } 1559f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1560f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 15611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n", 15621b5d2793SJoe Perches regval); 1563f5860992SSakthivel K 1564f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 15654daf1ef3SVikram Auradkar msleep(500); 1566f5860992SSakthivel K 1567f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 15681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n", 15691b5d2793SJoe Perches regval); 1570f5860992SSakthivel K 1571f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1572f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 15731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 15741b5d2793SJoe Perches " soft reset successful [regval: 0x%x]\n", 15751b5d2793SJoe Perches regval); 1576f5860992SSakthivel K } else { 15771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 15781b5d2793SJoe Perches " soft reset failed [regval: 0x%x]\n", 15791b5d2793SJoe Perches regval); 1580f5860992SSakthivel K 1581f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1582f5860992SSakthivel K bootloader_state = 1583f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1584f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1585f5860992SSakthivel K 1586f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 15871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 15881b5d2793SJoe Perches "Bootloader state - HDA mode SEEPROM\n"); 1589f5860992SSakthivel K } else if (bootloader_state == 1590f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 15911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 15921b5d2793SJoe Perches "Bootloader state - HDA mode Bootstrap Pin\n"); 1593f5860992SSakthivel K } else if (bootloader_state == 1594f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 15951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 15961b5d2793SJoe Perches "Bootloader state - HDA mode soft reset\n"); 1597f5860992SSakthivel K } else if (bootloader_state == 1598f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 15991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16001b5d2793SJoe Perches "Bootloader state-HDA mode critical error\n"); 1601f5860992SSakthivel K } 1602f5860992SSakthivel K return -EBUSY; 1603f5860992SSakthivel K } 1604f5860992SSakthivel K 1605f5860992SSakthivel K /* check the firmware status after reset */ 1606f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 16071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 160806f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 160906f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 161006f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1611faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1612faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 161306f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 161406f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 161506f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 161606f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 161706f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 161806f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 16191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16201b5d2793SJoe Perches "iButton Feature is not Available!!!\n"); 1621f5860992SSakthivel K return -EBUSY; 1622f5860992SSakthivel K } 162306f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 16241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16251b5d2793SJoe Perches "CRC Check for iButton Feature Failed!!!\n"); 162606f12f22SAnand Kumar Santhanam return -EBUSY; 162706f12f22SAnand Kumar Santhanam } 162806f12f22SAnand Kumar Santhanam } 162906f12f22SAnand Kumar Santhanam } 16301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n"); 1631f5860992SSakthivel K return 0; 1632f5860992SSakthivel K } 1633f5860992SSakthivel K 1634f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1635f5860992SSakthivel K { 1636f5860992SSakthivel K u32 i; 1637f5860992SSakthivel K 16381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); 1639f5860992SSakthivel K 1640f5860992SSakthivel K /* do SPCv chip reset. */ 1641f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 16421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); 1643f5860992SSakthivel K 1644f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1645f5860992SSakthivel K /* delay 10 usec */ 1646f5860992SSakthivel K udelay(10); 1647f5860992SSakthivel K 1648f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1649f5860992SSakthivel K i = 20; 1650f5860992SSakthivel K do { 1651f5860992SSakthivel K mdelay(1); 1652f5860992SSakthivel K } while ((--i) != 0); 1653f5860992SSakthivel K 16541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); 1655f5860992SSakthivel K } 1656f5860992SSakthivel K 1657f5860992SSakthivel K /** 1658f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1659f5860992SSakthivel K * @pm8001_ha: our hba card information 1660f5860992SSakthivel K */ 1661f5860992SSakthivel K static void 1662f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1663f5860992SSakthivel K { 1664f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1665f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1666f5860992SSakthivel K } 1667f5860992SSakthivel K 1668f5860992SSakthivel K /** 1669f5860992SSakthivel K * pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt 1670f5860992SSakthivel K * @pm8001_ha: our hba card information 1671f5860992SSakthivel K */ 1672f5860992SSakthivel K static void 1673f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1674f5860992SSakthivel K { 1675f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1676f5860992SSakthivel K } 1677f5860992SSakthivel K 1678f5860992SSakthivel K /** 1679f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1680f5860992SSakthivel K * @pm8001_ha: our hba card information 16816ad4a517SLee Jones * @vec: interrupt number to enable 1682f5860992SSakthivel K */ 1683f5860992SSakthivel K static void 1684f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1685f5860992SSakthivel K { 1686f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1687f5860992SSakthivel K u32 mask; 1688f5860992SSakthivel K mask = (u32)(1 << vec); 1689f5860992SSakthivel K 1690f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1691f5860992SSakthivel K return; 1692f5860992SSakthivel K #endif 1693f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1694f5860992SSakthivel K 1695f5860992SSakthivel K } 1696f5860992SSakthivel K 1697f5860992SSakthivel K /** 1698f5860992SSakthivel K * pm8001_chip_interrupt_disable- disable PM8001 chip interrupt 1699f5860992SSakthivel K * @pm8001_ha: our hba card information 17006ad4a517SLee Jones * @vec: interrupt number to disable 1701f5860992SSakthivel K */ 1702f5860992SSakthivel K static void 1703f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1704f5860992SSakthivel K { 1705f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1706f5860992SSakthivel K u32 mask; 1707f5860992SSakthivel K if (vec == 0xFF) 1708f5860992SSakthivel K mask = 0xFFFFFFFF; 1709f5860992SSakthivel K else 1710f5860992SSakthivel K mask = (u32)(1 << vec); 1711f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1712f5860992SSakthivel K return; 1713f5860992SSakthivel K #endif 1714f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1715f5860992SSakthivel K } 1716f5860992SSakthivel K 1717c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1718c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1719c6b9ef57SSakthivel K { 1720c6b9ef57SSakthivel K int res; 1721c6b9ef57SSakthivel K u32 ccb_tag; 1722c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1723c6b9ef57SSakthivel K struct sas_task *task = NULL; 1724c6b9ef57SSakthivel K struct task_abort_req task_abort; 1725c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1726c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1727c6b9ef57SSakthivel K int ret; 1728c6b9ef57SSakthivel K 1729c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 17301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "dev is null\n"); 1731c6b9ef57SSakthivel K return; 1732c6b9ef57SSakthivel K } 1733c6b9ef57SSakthivel K 1734c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1735c6b9ef57SSakthivel K 1736c6b9ef57SSakthivel K if (!task) { 17371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n"); 1738c6b9ef57SSakthivel K return; 1739c6b9ef57SSakthivel K } 1740c6b9ef57SSakthivel K 1741c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1742c6b9ef57SSakthivel K 1743c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 17445533abcaSTomas Henzl if (res) { 17455533abcaSTomas Henzl sas_free_task(task); 1746c6b9ef57SSakthivel K return; 17475533abcaSTomas Henzl } 1748c6b9ef57SSakthivel K 1749c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1750c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1751c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1752c6b9ef57SSakthivel K ccb->task = task; 1753c6b9ef57SSakthivel K 1754c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1755c6b9ef57SSakthivel K 1756c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1757c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1758c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1759c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1760c6b9ef57SSakthivel K 176191a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 176291a43fa6Speter chang sizeof(task_abort), 0); 17631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n"); 17645533abcaSTomas Henzl if (ret) { 17655533abcaSTomas Henzl sas_free_task(task); 17665533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 17675533abcaSTomas Henzl } 1768c6b9ef57SSakthivel K } 1769c6b9ef57SSakthivel K 1770c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1771c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1772c6b9ef57SSakthivel K { 1773c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1774c6b9ef57SSakthivel K int res; 1775c6b9ef57SSakthivel K u32 ccb_tag; 1776c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1777c6b9ef57SSakthivel K struct sas_task *task = NULL; 1778c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1779c6b9ef57SSakthivel K struct domain_device *dev; 1780c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1781c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1782c6b9ef57SSakthivel K 1783c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1784c6b9ef57SSakthivel K 1785c6b9ef57SSakthivel K if (!task) { 17861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n"); 1787c6b9ef57SSakthivel K return; 1788c6b9ef57SSakthivel K } 1789c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1790c6b9ef57SSakthivel K 1791c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1792c6b9ef57SSakthivel K if (res) { 17935533abcaSTomas Henzl sas_free_task(task); 17941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n"); 1795c6b9ef57SSakthivel K return; 1796c6b9ef57SSakthivel K } 1797c6b9ef57SSakthivel K 1798c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1799c6b9ef57SSakthivel K * is not going to provide any 1800c6b9ef57SSakthivel K */ 1801c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1802c6b9ef57SSakthivel K if (!dev) { 18035533abcaSTomas Henzl sas_free_task(task); 18045533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 18061b5d2793SJoe Perches "Domain device cannot be allocated\n"); 1807c6b9ef57SSakthivel K return; 18085533abcaSTomas Henzl } 18095533abcaSTomas Henzl 1810c6b9ef57SSakthivel K task->dev = dev; 1811c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1812c6b9ef57SSakthivel K 1813c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1814c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1815c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1816c6b9ef57SSakthivel K ccb->task = task; 18170b6df110SViswas G ccb->n_elem = 0; 1818c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1819c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1820c6b9ef57SSakthivel K 1821c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1822c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1823c6b9ef57SSakthivel K 1824c6b9ef57SSakthivel K /* construct read log FIS */ 1825c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1826c6b9ef57SSakthivel K fis.fis_type = 0x27; 1827c6b9ef57SSakthivel K fis.flags = 0x80; 1828c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1829c6b9ef57SSakthivel K fis.lbal = 0x10; 1830c6b9ef57SSakthivel K fis.sector_count = 0x1; 1831c6b9ef57SSakthivel K 1832c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1833c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1834c6b9ef57SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9)); 1835c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1836c6b9ef57SSakthivel K 183791a43fa6Speter chang res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 183891a43fa6Speter chang sizeof(sata_cmd), 0); 18391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n"); 18405533abcaSTomas Henzl if (res) { 18415533abcaSTomas Henzl sas_free_task(task); 18425533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18435533abcaSTomas Henzl kfree(dev); 18445533abcaSTomas Henzl } 1845c6b9ef57SSakthivel K } 1846c6b9ef57SSakthivel K 1847f5860992SSakthivel K /** 1848f5860992SSakthivel K * mpi_ssp_completion- process the event that FW response to the SSP request. 1849f5860992SSakthivel K * @pm8001_ha: our hba card information 1850f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1851f5860992SSakthivel K * 1852f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1853f5860992SSakthivel K * filled the SG data with the data, it will trigger this event represent 1854f5860992SSakthivel K * that he has finished the job,please check the coresponding buffer. 1855f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1856f5860992SSakthivel K * that the task has been finished. 1857f5860992SSakthivel K */ 1858f5860992SSakthivel K static void 1859f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb) 1860f5860992SSakthivel K { 1861f5860992SSakthivel K struct sas_task *t; 1862f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1863f5860992SSakthivel K unsigned long flags; 1864f5860992SSakthivel K u32 status; 1865f5860992SSakthivel K u32 param; 1866f5860992SSakthivel K u32 tag; 1867f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1868f5860992SSakthivel K struct task_status_struct *ts; 1869f5860992SSakthivel K struct ssp_response_iu *iu; 1870f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1871f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1872f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1873f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1874f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1875f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1876f5860992SSakthivel K /* Being completed by another */ 1877f5860992SSakthivel K ccb->open_retry = 0; 1878f5860992SSakthivel K return; 1879f5860992SSakthivel K } 1880f5860992SSakthivel K pm8001_dev = ccb->device; 1881f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1882f5860992SSakthivel K t = ccb->task; 1883f5860992SSakthivel K 1884f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 18851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status); 1886f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1887f5860992SSakthivel K return; 1888f5860992SSakthivel K ts = &t->task_status; 18897370672dSpeter chang 18901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 18911b5d2793SJoe Perches "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t); 18927370672dSpeter chang 1893cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1894cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1895cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 18961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n", 18971b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 1898cb269c26SAnand Kumar Santhanam 1899f5860992SSakthivel K switch (status) { 1900f5860992SSakthivel K case IO_SUCCESS: 19011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n", 19021b5d2793SJoe Perches param); 1903f5860992SSakthivel K if (param == 0) { 1904f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1905f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 1906f5860992SSakthivel K } else { 1907f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1908f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1909f5860992SSakthivel K ts->residual = param; 1910f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1911f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1912f5860992SSakthivel K } 1913f5860992SSakthivel K if (pm8001_dev) 19144a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1915f5860992SSakthivel K break; 1916f5860992SSakthivel K case IO_ABORTED: 19171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 1918f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1919f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 19204a2efd4bSViswas G if (pm8001_dev) 19214a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1922f5860992SSakthivel K break; 1923f5860992SSakthivel K case IO_UNDERFLOW: 1924f5860992SSakthivel K /* SSP Completion with error */ 19251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n", 19261b5d2793SJoe Perches param); 1927f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1928f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1929f5860992SSakthivel K ts->residual = param; 1930f5860992SSakthivel K if (pm8001_dev) 19314a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1932f5860992SSakthivel K break; 1933f5860992SSakthivel K case IO_NO_DEVICE: 19341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 1935f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1936f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 19374a2efd4bSViswas G if (pm8001_dev) 19384a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1939f5860992SSakthivel K break; 1940f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 19411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 1942f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1943f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1944f5860992SSakthivel K /* Force the midlayer to retry */ 1945f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19464a2efd4bSViswas G if (pm8001_dev) 19474a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1948f5860992SSakthivel K break; 1949f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 19501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 1951f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1952f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1953f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19544a2efd4bSViswas G if (pm8001_dev) 19554a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1956f5860992SSakthivel K break; 195727ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 19581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 19591b5d2793SJoe Perches "IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n"); 196027ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 196127ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 196227ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19634a2efd4bSViswas G if (pm8001_dev) 19644a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 196527ecfa5eSViswas G break; 1966f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 19671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 19681b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 1969f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1970f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1971f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 19724a2efd4bSViswas G if (pm8001_dev) 19734a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1974f5860992SSakthivel K break; 1975f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 19761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 19771b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 1978f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1979f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1980f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 19814a2efd4bSViswas G if (pm8001_dev) 19824a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1983f5860992SSakthivel K break; 1984f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 19851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 1986f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1987f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1988f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19894a2efd4bSViswas G if (pm8001_dev) 19904a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1991f5860992SSakthivel K break; 1992f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 1993a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 1994a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 1995a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 1996a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 1997a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 19981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 1999f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2000f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2001f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2002f5860992SSakthivel K if (!t->uldd_task) 2003f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2004f5860992SSakthivel K pm8001_dev, 2005f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2006f5860992SSakthivel K break; 2007f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 20081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20091b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2010f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2011f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2012f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 20134a2efd4bSViswas G if (pm8001_dev) 20144a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2015f5860992SSakthivel K break; 2016f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 20171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20181b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2019f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2020f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2021f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 20224a2efd4bSViswas G if (pm8001_dev) 20234a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2024f5860992SSakthivel K break; 2025f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 20261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20271b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2028f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2029f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2030f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 20314a2efd4bSViswas G if (pm8001_dev) 20324a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2033f5860992SSakthivel K break; 2034f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 20351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2036f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2037f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2038f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20394a2efd4bSViswas G if (pm8001_dev) 20404a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2041f5860992SSakthivel K break; 2042f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 20431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2044f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2045f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 20464a2efd4bSViswas G if (pm8001_dev) 20474a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2048f5860992SSakthivel K break; 2049f5860992SSakthivel K case IO_XFER_ERROR_DMA: 20501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2051f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2052f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 20534a2efd4bSViswas G if (pm8001_dev) 20544a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2055f5860992SSakthivel K break; 2056f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 20571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2058f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2059f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2060f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20614a2efd4bSViswas G if (pm8001_dev) 20624a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2063f5860992SSakthivel K break; 2064f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 20651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2066f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2067f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 20684a2efd4bSViswas G if (pm8001_dev) 20694a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2070f5860992SSakthivel K break; 2071f5860992SSakthivel K case IO_PORT_IN_RESET: 20721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2073f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2074f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 20754a2efd4bSViswas G if (pm8001_dev) 20764a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2077f5860992SSakthivel K break; 2078f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 20791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2080f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2081f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2082f5860992SSakthivel K if (!t->uldd_task) 2083f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2084f5860992SSakthivel K pm8001_dev, 2085f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2086f5860992SSakthivel K break; 2087f5860992SSakthivel K case IO_DS_IN_RECOVERY: 20881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2089f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2090f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 20914a2efd4bSViswas G if (pm8001_dev) 20924a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2093f5860992SSakthivel K break; 2094f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 20951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n"); 2096f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2097f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 20984a2efd4bSViswas G if (pm8001_dev) 20994a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2100f5860992SSakthivel K break; 2101f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 21021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"); 2103f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2104f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21054a2efd4bSViswas G if (pm8001_dev) 21064a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2107f5860992SSakthivel K break; 2108f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 21091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 21101b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2111f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2112f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2113f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21144a2efd4bSViswas G if (pm8001_dev) 21154a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2116f5860992SSakthivel K break; 2117f5860992SSakthivel K default: 21181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 2119f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2120f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2121f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21224a2efd4bSViswas G if (pm8001_dev) 21234a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2124f5860992SSakthivel K break; 2125f5860992SSakthivel K } 21261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ", 21271b5d2793SJoe Perches psspPayload->ssp_resp_iu.status); 2128f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2129f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2130f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2131f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2132f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2133f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 21341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 21351b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 21361b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2137869ddbdcSViswas G if (t->slow_task) 2138869ddbdcSViswas G complete(&t->slow_task->completion); 2139f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2140f5860992SSakthivel K } else { 2141f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2142f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2143f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2144f5860992SSakthivel K t->task_done(t); 2145f5860992SSakthivel K } 2146f5860992SSakthivel K } 2147f5860992SSakthivel K 2148f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2149f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2150f5860992SSakthivel K { 2151f5860992SSakthivel K struct sas_task *t; 2152f5860992SSakthivel K unsigned long flags; 2153f5860992SSakthivel K struct task_status_struct *ts; 2154f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2155f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2156f5860992SSakthivel K struct ssp_event_resp *psspPayload = 2157f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 2158f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 2159f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 2160f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 2161f5860992SSakthivel K 2162f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2163f5860992SSakthivel K t = ccb->task; 2164f5860992SSakthivel K pm8001_dev = ccb->device; 2165f5860992SSakthivel K if (event) 21661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event); 2167f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2168f5860992SSakthivel K return; 2169f5860992SSakthivel K ts = &t->task_status; 21701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 21711b5d2793SJoe Perches port_id, tag, event); 2172f5860992SSakthivel K switch (event) { 2173f5860992SSakthivel K case IO_OVERFLOW: 21741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2175f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2176f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2177f5860992SSakthivel K ts->residual = 0; 2178f5860992SSakthivel K if (pm8001_dev) 21794a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2180f5860992SSakthivel K break; 2181f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 21821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2183f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 2184f5860992SSakthivel K return; 2185f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 21861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2187f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2188f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2189f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2190f5860992SSakthivel K break; 2191f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 21921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 21931b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2194f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2195f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2196f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2197f5860992SSakthivel K break; 2198f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 21991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22001b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2201f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2202f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2203f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2204f5860992SSakthivel K break; 2205f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 22061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2207f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2208f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2209f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2210f5860992SSakthivel K break; 2211f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2212a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2213a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2214a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2215a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2216a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 22171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2218f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2219f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2220f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2221f5860992SSakthivel K if (!t->uldd_task) 2222f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2223f5860992SSakthivel K pm8001_dev, 2224f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2225f5860992SSakthivel K break; 2226f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 22271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22281b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2229f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2230f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2231f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2232f5860992SSakthivel K break; 2233f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 22341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22351b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2236f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2237f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2238f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2239f5860992SSakthivel K break; 2240f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 22411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22421b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2243f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2244f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2245f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2246f5860992SSakthivel K break; 2247f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 22481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2249f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2250f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2251f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2252f5860992SSakthivel K break; 2253f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 22541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2255f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2256f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2257f5860992SSakthivel K break; 2258f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 22591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2260f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 2261f5860992SSakthivel K return; 2262f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 22631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2264f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2265f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2266f5860992SSakthivel K break; 2267f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 22681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2269f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2270f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2271f5860992SSakthivel K break; 2272f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 22731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22741b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2275f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2276f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2277f5860992SSakthivel K break; 2278f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 22791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22801b5d2793SJoe Perches "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"); 2281f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2282f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2283f5860992SSakthivel K break; 2284f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 22851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2286f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2287f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2288f5860992SSakthivel K break; 2289f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 22901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22911b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2292f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2293f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2294f5860992SSakthivel K break; 2295a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 22961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, 22971b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2298a6cb3d01SSakthivel K /* TBC: used default set values */ 2299a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2300a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2301a6cb3d01SSakthivel K break; 2302f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 23031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2304f5860992SSakthivel K return; 2305f5860992SSakthivel K default: 23061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); 2307f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2308f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2309f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2310f5860992SSakthivel K break; 2311f5860992SSakthivel K } 2312f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2313f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2314f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2315f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2316f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2317f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 23181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 23191b5d2793SJoe Perches "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 23201b5d2793SJoe Perches t, event, ts->resp, ts->stat); 2321f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2322f5860992SSakthivel K } else { 2323f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2324f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2325f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2326f5860992SSakthivel K t->task_done(t); 2327f5860992SSakthivel K } 2328f5860992SSakthivel K } 2329f5860992SSakthivel K 2330f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2331f5860992SSakthivel K static void 2332f5860992SSakthivel K mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2333f5860992SSakthivel K { 2334f5860992SSakthivel K struct sas_task *t; 2335f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2336f5860992SSakthivel K u32 param; 2337f5860992SSakthivel K u32 status; 2338f5860992SSakthivel K u32 tag; 2339cb269c26SAnand Kumar Santhanam int i, j; 2340cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2341cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2342cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2343f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2344f5860992SSakthivel K struct task_status_struct *ts; 2345f5860992SSakthivel K struct ata_task_resp *resp ; 2346f5860992SSakthivel K u32 *sata_resp; 2347f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2348c6b9ef57SSakthivel K unsigned long flags; 2349f5860992SSakthivel K 2350f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2351f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 2352f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2353f5860992SSakthivel K 2354c6b9ef57SSakthivel K if (!tag) { 23551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "tag null\n"); 2356c6b9ef57SSakthivel K return; 2357c6b9ef57SSakthivel K } 2358f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2359f5860992SSakthivel K param = le32_to_cpu(psataPayload->param); 2360c6b9ef57SSakthivel K if (ccb) { 2361f5860992SSakthivel K t = ccb->task; 2362f5860992SSakthivel K pm8001_dev = ccb->device; 2363c6b9ef57SSakthivel K } else { 23641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "ccb null\n"); 2365f5860992SSakthivel K return; 2366c6b9ef57SSakthivel K } 2367c6b9ef57SSakthivel K 2368c6b9ef57SSakthivel K if (t) { 2369c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2370c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2371c6b9ef57SSakthivel K } else { 23721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task null\n"); 2373c6b9ef57SSakthivel K return; 2374c6b9ef57SSakthivel K } 2375c6b9ef57SSakthivel K 2376c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2377c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 23781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2379c6b9ef57SSakthivel K return; 2380c6b9ef57SSakthivel K } 2381c6b9ef57SSakthivel K 2382c6b9ef57SSakthivel K ts = &t->task_status; 2383c6b9ef57SSakthivel K if (!ts) { 23841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "ts null\n"); 2385c6b9ef57SSakthivel K return; 2386c6b9ef57SSakthivel K } 23877370672dSpeter chang 23887370672dSpeter chang if (unlikely(status)) 23891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, 23907370672dSpeter chang "status:0x%x, tag:0x%x, task::0x%p\n", 23911b5d2793SJoe Perches status, tag, t); 23927370672dSpeter chang 2393cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2394cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2395cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2396cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2397924a3541SJohn Garry (dev_is_expander(t->dev->parent->dev_type)))) { 2398cb269c26SAnand Kumar Santhanam for (i = 0 , j = 4; i <= 3 && j <= 7; i++ , j++) 2399cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2400cb269c26SAnand Kumar Santhanam for (i = 0 , j = 0; i <= 3 && j <= 3; i++ , j++) 2401cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2402cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2403cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2404cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2405cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2406cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2407cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2408cb269c26SAnand Kumar Santhanam 0xff0000) | 2409cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2410cb269c26SAnand Kumar Santhanam & 0xff00) | 2411cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2412cb269c26SAnand Kumar Santhanam 0xff000000)); 2413cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2414cb269c26SAnand Kumar Santhanam & 0xff) | 2415cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2416cb269c26SAnand Kumar Santhanam & 0xff0000) | 2417cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2418cb269c26SAnand Kumar Santhanam & 0xff00) | 2419cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2420cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2421cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2422cb269c26SAnand Kumar Santhanam 0x10); 24231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24241b5d2793SJoe Perches "SAS Address of IO Failure Drive:%08x%08x\n", 24251b5d2793SJoe Perches temp_sata_addr_hi, 24261b5d2793SJoe Perches temp_sata_addr_low); 2427f5860992SSakthivel K 2428cb269c26SAnand Kumar Santhanam } else { 24291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24301b5d2793SJoe Perches "SAS Address of IO Failure Drive:%016llx\n", 24311b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 2432cb269c26SAnand Kumar Santhanam } 2433cb269c26SAnand Kumar Santhanam } 2434f5860992SSakthivel K switch (status) { 2435f5860992SSakthivel K case IO_SUCCESS: 24361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 2437f5860992SSakthivel K if (param == 0) { 2438f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2439f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2440c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2441c6b9ef57SSakthivel K if (pm8001_dev && 2442c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2443c6b9ef57SSakthivel K /* set new bit for abort_all */ 2444c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2445c6b9ef57SSakthivel K /* clear bit for read log */ 2446c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2447c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2448c6b9ef57SSakthivel K /* Free the tag */ 2449c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2450c6b9ef57SSakthivel K sas_free_task(t); 2451c6b9ef57SSakthivel K return; 2452c6b9ef57SSakthivel K } 2453f5860992SSakthivel K } else { 2454f5860992SSakthivel K u8 len; 2455f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2456f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2457f5860992SSakthivel K ts->residual = param; 24581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 24591b5d2793SJoe Perches "SAS_PROTO_RESPONSE len = %d\n", 24601b5d2793SJoe Perches param); 2461f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2462f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2463f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2464f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2465f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 24661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 24671b5d2793SJoe Perches "PIO read len = %d\n", len); 2468f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2469f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 24701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n", 24711b5d2793SJoe Perches len); 2472f5860992SSakthivel K } else { 2473f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 24741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "other len = %d\n", 24751b5d2793SJoe Perches len); 2476f5860992SSakthivel K } 2477f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2478f5860992SSakthivel K resp->frame_len = len; 2479f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2480f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2481f5860992SSakthivel K } else 24821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 24831b5d2793SJoe Perches "response too large\n"); 2484f5860992SSakthivel K } 2485f5860992SSakthivel K if (pm8001_dev) 24864a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2487f5860992SSakthivel K break; 2488f5860992SSakthivel K case IO_ABORTED: 24891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 2490f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2491f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2492f5860992SSakthivel K if (pm8001_dev) 24934a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2494f5860992SSakthivel K break; 2495f5860992SSakthivel K /* following cases are to do cases */ 2496f5860992SSakthivel K case IO_UNDERFLOW: 2497f5860992SSakthivel K /* SATA Completion with error */ 24981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param); 2499f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2500f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2501f5860992SSakthivel K ts->residual = param; 2502f5860992SSakthivel K if (pm8001_dev) 25034a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2504f5860992SSakthivel K break; 2505f5860992SSakthivel K case IO_NO_DEVICE: 25061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 2507f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2508f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 25094a2efd4bSViswas G if (pm8001_dev) 25104a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2511f5860992SSakthivel K break; 2512f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 25131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2514f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2515f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 25164a2efd4bSViswas G if (pm8001_dev) 25174a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2518f5860992SSakthivel K break; 2519f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 25201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2521f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2522f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2523f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 25244a2efd4bSViswas G if (pm8001_dev) 25254a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2526f5860992SSakthivel K break; 2527f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 25281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25291b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2530f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2531f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2532f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 25334a2efd4bSViswas G if (pm8001_dev) 25344a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2535f5860992SSakthivel K break; 2536f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 25371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25381b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2539f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2540f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2541f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 25424a2efd4bSViswas G if (pm8001_dev) 25434a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2544f5860992SSakthivel K break; 2545f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 25461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2547f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2548f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2549f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 25504a2efd4bSViswas G if (pm8001_dev) 25514a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2552f5860992SSakthivel K break; 2553f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2554a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2555a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2556a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2557a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2558a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 25591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2560f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2561f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2562f5860992SSakthivel K if (!t->uldd_task) { 2563f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2564f5860992SSakthivel K pm8001_dev, 2565f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2566f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2567f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25682b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2569f5860992SSakthivel K return; 2570f5860992SSakthivel K } 2571f5860992SSakthivel K break; 2572f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 25731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25741b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2575f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2576f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2577f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2578f5860992SSakthivel K if (!t->uldd_task) { 2579f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2580f5860992SSakthivel K pm8001_dev, 2581f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2582f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2583f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25842b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2585f5860992SSakthivel K return; 2586f5860992SSakthivel K } 2587f5860992SSakthivel K break; 2588f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 25891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25901b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2591f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2592f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2593f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 25944a2efd4bSViswas G if (pm8001_dev) 25954a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2596f5860992SSakthivel K break; 2597f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 25981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25991b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"); 2600f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2601f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2602f5860992SSakthivel K if (!t->uldd_task) { 2603f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2604f5860992SSakthivel K pm8001_dev, 2605f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2606f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2607f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 26082b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2609f5860992SSakthivel K return; 2610f5860992SSakthivel K } 2611f5860992SSakthivel K break; 2612f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 26131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26141b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2615f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2616f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2617f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 26184a2efd4bSViswas G if (pm8001_dev) 26194a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2620f5860992SSakthivel K break; 2621f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 26221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2623f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2624f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26254a2efd4bSViswas G if (pm8001_dev) 26264a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2627f5860992SSakthivel K break; 2628f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 26291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2630f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2631f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26324a2efd4bSViswas G if (pm8001_dev) 26334a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2634f5860992SSakthivel K break; 2635f5860992SSakthivel K case IO_XFER_ERROR_DMA: 26361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2637f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2638f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 26394a2efd4bSViswas G if (pm8001_dev) 26404a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2641f5860992SSakthivel K break; 2642f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 26431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"); 2644f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2645f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 26464a2efd4bSViswas G if (pm8001_dev) 26474a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2648f5860992SSakthivel K break; 2649f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 26501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2651f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2652f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 26534a2efd4bSViswas G if (pm8001_dev) 26544a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2655f5860992SSakthivel K break; 2656f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 26571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2658f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2659f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 26604a2efd4bSViswas G if (pm8001_dev) 26614a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2662f5860992SSakthivel K break; 2663f5860992SSakthivel K case IO_PORT_IN_RESET: 26641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2665f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2666f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 26674a2efd4bSViswas G if (pm8001_dev) 26684a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2669f5860992SSakthivel K break; 2670f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 26711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2672f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2673f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2674f5860992SSakthivel K if (!t->uldd_task) { 2675f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2676f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2677f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2678f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 26792b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2680f5860992SSakthivel K return; 2681f5860992SSakthivel K } 2682f5860992SSakthivel K break; 2683f5860992SSakthivel K case IO_DS_IN_RECOVERY: 26841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2685f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2686f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 26874a2efd4bSViswas G if (pm8001_dev) 26884a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2689f5860992SSakthivel K break; 2690f5860992SSakthivel K case IO_DS_IN_ERROR: 26911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n"); 2692f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2693f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2694f5860992SSakthivel K if (!t->uldd_task) { 2695f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2696f5860992SSakthivel K IO_DS_IN_ERROR); 2697f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2698f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 26992b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2700f5860992SSakthivel K return; 2701f5860992SSakthivel K } 2702f5860992SSakthivel K break; 2703f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 27041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 27051b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2706f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2707f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2708f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 27094a2efd4bSViswas G if (pm8001_dev) 27104a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 271150acde8eSJohannes Thumshirn break; 2712f5860992SSakthivel K default: 27131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 2714f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2715f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2716f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27174a2efd4bSViswas G if (pm8001_dev) 27184a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2719f5860992SSakthivel K break; 2720f5860992SSakthivel K } 2721f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2722f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2723f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2724f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2725f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2726f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 27281b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 27291b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2730ce21c63eSpeter chang if (t->slow_task) 2731ce21c63eSpeter chang complete(&t->slow_task->completion); 2732f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 27332b01d816SSuresh Thiagarajan } else { 2734f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27352b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2736f5860992SSakthivel K } 2737f5860992SSakthivel K } 2738f5860992SSakthivel K 2739f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2740f5860992SSakthivel K static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2741f5860992SSakthivel K { 2742f5860992SSakthivel K struct sas_task *t; 2743f5860992SSakthivel K struct task_status_struct *ts; 2744f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2745f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2746f5860992SSakthivel K struct sata_event_resp *psataPayload = 2747f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2748f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2749f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2750f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2751c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2752c6b9ef57SSakthivel K unsigned long flags; 2753f5860992SSakthivel K 2754f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2755c6b9ef57SSakthivel K 2756c6b9ef57SSakthivel K if (ccb) { 2757f5860992SSakthivel K t = ccb->task; 2758f5860992SSakthivel K pm8001_dev = ccb->device; 2759c6b9ef57SSakthivel K } else { 27601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n"); 2761c6b9ef57SSakthivel K return; 2762c6b9ef57SSakthivel K } 2763f5860992SSakthivel K if (event) 27641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event); 2765c6b9ef57SSakthivel K 2766c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2767c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2768c6b9ef57SSakthivel K /* find device using device id */ 2769c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2770c6b9ef57SSakthivel K /* send read log extension */ 2771c6b9ef57SSakthivel K if (pm8001_dev) 2772c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2773f5860992SSakthivel K return; 2774c6b9ef57SSakthivel K } 2775c6b9ef57SSakthivel K 2776c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 27771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2778c6b9ef57SSakthivel K return; 2779c6b9ef57SSakthivel K } 2780c6b9ef57SSakthivel K 2781f5860992SSakthivel K ts = &t->task_status; 27821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 27831b5d2793SJoe Perches port_id, tag, event); 2784f5860992SSakthivel K switch (event) { 2785f5860992SSakthivel K case IO_OVERFLOW: 27861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2787f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2788f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2789f5860992SSakthivel K ts->residual = 0; 2790f5860992SSakthivel K if (pm8001_dev) 27914a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2792f5860992SSakthivel K break; 2793f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 27941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2795f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2796f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2797f5860992SSakthivel K break; 2798f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 27991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2800f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2801f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2802f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2803f5860992SSakthivel K break; 2804f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 28051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28061b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2807f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2808f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2809f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2810f5860992SSakthivel K break; 2811f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 28121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28131b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2814f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2815f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2816f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2817f5860992SSakthivel K break; 2818f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 28191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2820f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2821f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2822f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2823f5860992SSakthivel K break; 2824f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2825a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2826a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2827a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2828a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2829a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 28301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 28311b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2832f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2833f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2834f5860992SSakthivel K if (!t->uldd_task) { 2835f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2836f5860992SSakthivel K pm8001_dev, 2837f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2838f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2839f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 28402b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2841f5860992SSakthivel K return; 2842f5860992SSakthivel K } 2843f5860992SSakthivel K break; 2844f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 28451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28461b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2847f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2848f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2849f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2850f5860992SSakthivel K break; 2851f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 28521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28531b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2854f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2855f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2856f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2857f5860992SSakthivel K break; 2858f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 28591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28601b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2861f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2862f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2863f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2864f5860992SSakthivel K break; 2865f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 28661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2867f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2868f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2869f5860992SSakthivel K break; 2870f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 28711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n"); 2872f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2873f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2874f5860992SSakthivel K break; 2875f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 28761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2877f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2878f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2879f5860992SSakthivel K break; 2880f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 28811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2882f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2883f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2884f5860992SSakthivel K break; 2885f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 28861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2887f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2888f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2889f5860992SSakthivel K break; 2890f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 28911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2892f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2893f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2894f5860992SSakthivel K break; 2895f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 28961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28971b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2898f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2899f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2900f5860992SSakthivel K break; 2901f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 29021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2903f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2904f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2905f5860992SSakthivel K break; 2906f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 29071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29081b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2909f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2910f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2911f5860992SSakthivel K break; 2912f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 29131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2914f5860992SSakthivel K break; 2915f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 29161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n"); 2917f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2918f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2919f5860992SSakthivel K break; 2920a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 29211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 29221b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2923a6cb3d01SSakthivel K /* TBC: used default set values */ 2924a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2925a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2926a6cb3d01SSakthivel K break; 2927a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 29281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n"); 2929a6cb3d01SSakthivel K /* TBC: used default set values */ 2930a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2931a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2932a6cb3d01SSakthivel K break; 2933f5860992SSakthivel K default: 29341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event); 2935f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2936f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2937f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2938f5860992SSakthivel K break; 2939f5860992SSakthivel K } 2940f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2941f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2942f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2943f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2944f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2945f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 29461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 29471b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 29481b5d2793SJoe Perches t, event, ts->resp, ts->stat); 2949f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 29502b01d816SSuresh Thiagarajan } else { 2951f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 29522b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2953f5860992SSakthivel K } 2954f5860992SSakthivel K } 2955f5860992SSakthivel K 2956f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2957f5860992SSakthivel K static void 2958f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2959f5860992SSakthivel K { 2960f5860992SSakthivel K u32 param, i; 2961f5860992SSakthivel K struct sas_task *t; 2962f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2963f5860992SSakthivel K unsigned long flags; 2964f5860992SSakthivel K u32 status; 2965f5860992SSakthivel K u32 tag; 2966f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 2967f5860992SSakthivel K struct task_status_struct *ts; 2968f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2969f5860992SSakthivel K char *pdma_respaddr = NULL; 2970f5860992SSakthivel K 2971f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 2972f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 2973f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 2974f5860992SSakthivel K 2975f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2976f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 2977f5860992SSakthivel K t = ccb->task; 2978f5860992SSakthivel K ts = &t->task_status; 2979f5860992SSakthivel K pm8001_dev = ccb->device; 2980f5860992SSakthivel K if (status) 29811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status); 2982f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2983f5860992SSakthivel K return; 2984f5860992SSakthivel K 29851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status); 29867370672dSpeter chang 2987f5860992SSakthivel K switch (status) { 2988f5860992SSakthivel K 2989f5860992SSakthivel K case IO_SUCCESS: 29901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 2991f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2992f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2993f5860992SSakthivel K if (pm8001_dev) 29944a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2995f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 29961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29971b5d2793SJoe Perches "DIRECT RESPONSE Length:%d\n", 29981b5d2793SJoe Perches param); 2999f5860992SSakthivel K pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64 3000f5860992SSakthivel K ((u64)sg_dma_address 3001f5860992SSakthivel K (&t->smp_task.smp_resp)))); 3002f5860992SSakthivel K for (i = 0; i < param; i++) { 3003f5860992SSakthivel K *(pdma_respaddr+i) = psmpPayload->_r_a[i]; 30041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3005f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 3006f5860992SSakthivel K i, *(pdma_respaddr + i), 30071b5d2793SJoe Perches psmpPayload->_r_a[i]); 3008f5860992SSakthivel K } 3009f5860992SSakthivel K } 3010f5860992SSakthivel K break; 3011f5860992SSakthivel K case IO_ABORTED: 30121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n"); 3013f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3014f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 3015f5860992SSakthivel K if (pm8001_dev) 30164a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3017f5860992SSakthivel K break; 3018f5860992SSakthivel K case IO_OVERFLOW: 30191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 3020f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3021f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 3022f5860992SSakthivel K ts->residual = 0; 3023f5860992SSakthivel K if (pm8001_dev) 30244a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3025f5860992SSakthivel K break; 3026f5860992SSakthivel K case IO_NO_DEVICE: 30271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 3028f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3029f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 3030f5860992SSakthivel K break; 3031f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 30321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n"); 3033f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3034f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 3035f5860992SSakthivel K break; 3036f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 30371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 3038f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3039f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 3040f5860992SSakthivel K break; 3041f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 30421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 3043f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3044f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 3045f5860992SSakthivel K break; 3046f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 30471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30481b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 3049f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3050f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3051f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3052f5860992SSakthivel K break; 3053f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 30541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30551b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 3056f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3057f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3058f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3059f5860992SSakthivel K break; 3060f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 30611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 3062f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3063f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3064f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 3065f5860992SSakthivel K break; 3066f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 3067a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 3068a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 3069a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 3070a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 3071a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 30721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 3073f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3074f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3075f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3076f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 3077f5860992SSakthivel K pm8001_dev, 3078f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 3079f5860992SSakthivel K break; 3080f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 30811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30821b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 3083f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3084f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3085f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 3086f5860992SSakthivel K break; 3087f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 30881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30891b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 3090f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3091f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3092f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 3093f5860992SSakthivel K break; 3094f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 30951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30961b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 3097f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3098f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3099f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 3100f5860992SSakthivel K break; 3101f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 31021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n"); 3103f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3104f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3105f5860992SSakthivel K break; 3106f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 31071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 3108f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3109f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3110f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3111f5860992SSakthivel K break; 3112f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 31131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n"); 3114f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3115f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 3116f5860992SSakthivel K break; 3117f5860992SSakthivel K case IO_PORT_IN_RESET: 31181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 3119f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3120f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3121f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3122f5860992SSakthivel K break; 3123f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 31241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 3125f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3126f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3127f5860992SSakthivel K break; 3128f5860992SSakthivel K case IO_DS_IN_RECOVERY: 31291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 3130f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3131f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3132f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3133f5860992SSakthivel K break; 3134f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 31351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31361b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 3137f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3138f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3139f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3140f5860992SSakthivel K break; 3141f5860992SSakthivel K default: 31421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 3143f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3144f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3145f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 3146f5860992SSakthivel K break; 3147f5860992SSakthivel K } 3148f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 3149f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 3150f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 3151f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 3152f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 3153f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 31541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 31551b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%xstat 0x%x but aborted by upper layer!\n", 31561b5d2793SJoe Perches t, status, ts->resp, ts->stat); 3157f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3158f5860992SSakthivel K } else { 3159f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3160f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3161f5860992SSakthivel K mb();/* in order to force CPU ordering */ 3162f5860992SSakthivel K t->task_done(t); 3163f5860992SSakthivel K } 3164f5860992SSakthivel K } 3165f5860992SSakthivel K 3166f5860992SSakthivel K /** 3167f5860992SSakthivel K * pm80xx_hw_event_ack_req- For PM8001,some events need to acknowage to FW. 3168f5860992SSakthivel K * @pm8001_ha: our hba card information 3169f5860992SSakthivel K * @Qnum: the outbound queue message number. 3170f5860992SSakthivel K * @SEA: source of event to ack 3171f5860992SSakthivel K * @port_id: port id. 3172f5860992SSakthivel K * @phyId: phy id. 3173f5860992SSakthivel K * @param0: parameter 0. 3174f5860992SSakthivel K * @param1: parameter 1. 3175f5860992SSakthivel K */ 3176f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 3177f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 3178f5860992SSakthivel K { 3179f5860992SSakthivel K struct hw_event_ack_req payload; 3180f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 3181f5860992SSakthivel K 3182f5860992SSakthivel K struct inbound_queue_table *circularQ; 3183f5860992SSakthivel K 3184f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 3185f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 3186f5860992SSakthivel K payload.tag = cpu_to_le32(1); 3187f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 3188f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 3189f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 3190f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 319191a43fa6Speter chang pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 319291a43fa6Speter chang sizeof(payload), 0); 3193f5860992SSakthivel K } 3194f5860992SSakthivel K 3195f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 3196f5860992SSakthivel K u32 phyId, u32 phy_op); 3197f5860992SSakthivel K 31988414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 31998414cd80SViswas G void *piomb) 32008414cd80SViswas G { 32018414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 32028414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 32038414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 32048414cd80SViswas G u32 lr_status_evt_portid = 32058414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 32068414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 32078414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 32088414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 32098414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 32108414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 32118414cd80SViswas G 32128414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 32138414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 32148414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 32158414cd80SViswas G } 32168414cd80SViswas G 32178414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 32188414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 32198414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 32208414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 32218414cd80SViswas G phy->phy_attached = 1; 32228414cd80SViswas G } 32238414cd80SViswas G 3224f5860992SSakthivel K /** 3225f5860992SSakthivel K * hw_event_sas_phy_up -FW tells me a SAS phy up event. 3226f5860992SSakthivel K * @pm8001_ha: our hba card information 3227f5860992SSakthivel K * @piomb: IO message buffer 3228f5860992SSakthivel K */ 3229f5860992SSakthivel K static void 3230f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3231f5860992SSakthivel K { 3232f5860992SSakthivel K struct hw_event_resp *pPayload = 3233f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3234f5860992SSakthivel K u32 lr_status_evt_portid = 3235f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3236f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3237f5860992SSakthivel K 3238f5860992SSakthivel K u8 link_rate = 3239f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3240f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3241f5860992SSakthivel K u8 phy_id = 3242f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3243f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3244f5860992SSakthivel K 3245f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3246f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3247f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3248f5860992SSakthivel K unsigned long flags; 3249f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 3250f5860992SSakthivel K port->port_state = portstate; 32518414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 32527d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 32531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 32541b5d2793SJoe Perches "portid:%d; phyid:%d; linkrate:%d; portstate:%x; devicetype:%x\n", 32551b5d2793SJoe Perches port_id, phy_id, link_rate, portstate, deviceType); 3256f5860992SSakthivel K 3257f5860992SSakthivel K switch (deviceType) { 3258f5860992SSakthivel K case SAS_PHY_UNUSED: 32591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "device type no device.\n"); 3260f5860992SSakthivel K break; 3261f5860992SSakthivel K case SAS_END_DEVICE: 32621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "end device.\n"); 3263f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 3264f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 3265f5860992SSakthivel K port->port_attached = 1; 3266f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3267f5860992SSakthivel K break; 3268f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 32691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "expander device.\n"); 3270f5860992SSakthivel K port->port_attached = 1; 3271f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3272f5860992SSakthivel K break; 3273f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 32741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n"); 3275f5860992SSakthivel K port->port_attached = 1; 3276f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3277f5860992SSakthivel K break; 3278f5860992SSakthivel K default: 32791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n", 32801b5d2793SJoe Perches deviceType); 3281f5860992SSakthivel K break; 3282f5860992SSakthivel K } 3283f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 3284f5860992SSakthivel K phy->identify.device_type = deviceType; 3285f5860992SSakthivel K phy->phy_attached = 1; 3286f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 3287f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 3288f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 3289f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 3290f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 3291f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3292f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3293f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 3294f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 3295f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 3296f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3297f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3298f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 3299*4ba9e516SAhmed S. Darwish mdelay(200); /* delay a moment to wait for disk to spin up */ 3300f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3301f5860992SSakthivel K } 3302f5860992SSakthivel K 3303f5860992SSakthivel K /** 3304f5860992SSakthivel K * hw_event_sata_phy_up -FW tells me a SATA phy up event. 3305f5860992SSakthivel K * @pm8001_ha: our hba card information 3306f5860992SSakthivel K * @piomb: IO message buffer 3307f5860992SSakthivel K */ 3308f5860992SSakthivel K static void 3309f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3310f5860992SSakthivel K { 3311f5860992SSakthivel K struct hw_event_resp *pPayload = 3312f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3313f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3314f5860992SSakthivel K u32 lr_status_evt_portid = 3315f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3316f5860992SSakthivel K u8 link_rate = 3317f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3318f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3319f5860992SSakthivel K u8 phy_id = 3320f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3321f5860992SSakthivel K 3322f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3323f5860992SSakthivel K 3324f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3325f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3326f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3327f5860992SSakthivel K unsigned long flags; 33281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 3329f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 33301b5d2793SJoe Perches port_id, phy_id, link_rate, portstate); 3331f5860992SSakthivel K 3332f5860992SSakthivel K port->port_state = portstate; 33337d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3334f5860992SSakthivel K port->port_attached = 1; 3335f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3336f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3337f5860992SSakthivel K phy->phy_attached = 1; 3338f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3339f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3340f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3341f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3342f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3343f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3344f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3345aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3346f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3347f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3348f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3349f5860992SSakthivel K } 3350f5860992SSakthivel K 3351f5860992SSakthivel K /** 3352f5860992SSakthivel K * hw_event_phy_down -we should notify the libsas the phy is down. 3353f5860992SSakthivel K * @pm8001_ha: our hba card information 3354f5860992SSakthivel K * @piomb: IO message buffer 3355f5860992SSakthivel K */ 3356f5860992SSakthivel K static void 3357f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3358f5860992SSakthivel K { 3359f5860992SSakthivel K struct hw_event_resp *pPayload = 3360f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3361f5860992SSakthivel K 3362f5860992SSakthivel K u32 lr_status_evt_portid = 3363f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3364f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3365f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3366f5860992SSakthivel K u8 phy_id = 3367f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3368f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3369f5860992SSakthivel K 3370f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3371f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3372869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3373f5860992SSakthivel K port->port_state = portstate; 3374f5860992SSakthivel K phy->identify.device_type = 0; 3375f5860992SSakthivel K phy->phy_attached = 0; 3376f5860992SSakthivel K switch (portstate) { 3377f5860992SSakthivel K case PORT_VALID: 3378f5860992SSakthivel K break; 3379f5860992SSakthivel K case PORT_INVALID: 33801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n", 33811b5d2793SJoe Perches port_id); 33821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 33831b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3384869ddbdcSViswas G if (port_sata) { 33858414cd80SViswas G phy->phy_type = 0; 3386f5860992SSakthivel K port->port_attached = 0; 3387f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3388f5860992SSakthivel K port_id, phy_id, 0, 0); 33898414cd80SViswas G } 33908414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3391f5860992SSakthivel K break; 3392f5860992SSakthivel K case PORT_IN_RESET: 33931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n", 33941b5d2793SJoe Perches port_id); 3395f5860992SSakthivel K break; 3396f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 33971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 33981b5d2793SJoe Perches " Phy Down and PORT_NOT_ESTABLISHED\n"); 3399f5860992SSakthivel K port->port_attached = 0; 3400f5860992SSakthivel K break; 3401f5860992SSakthivel K case PORT_LOSTCOMM: 34021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n"); 34031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34041b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3405869ddbdcSViswas G if (port_sata) { 3406f5860992SSakthivel K port->port_attached = 0; 34078414cd80SViswas G phy->phy_type = 0; 3408f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3409f5860992SSakthivel K port_id, phy_id, 0, 0); 34108414cd80SViswas G } 34118414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3412f5860992SSakthivel K break; 3413f5860992SSakthivel K default: 3414f5860992SSakthivel K port->port_attached = 0; 34151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 34161b5d2793SJoe Perches " Phy Down and(default) = 0x%x\n", 34171b5d2793SJoe Perches portstate); 3418f5860992SSakthivel K break; 3419f5860992SSakthivel K 3420f5860992SSakthivel K } 3421869ddbdcSViswas G if (port_sata && (portstate != PORT_IN_RESET)) { 3422869ddbdcSViswas G struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3423869ddbdcSViswas G 3424869ddbdcSViswas G sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); 3425869ddbdcSViswas G } 3426f5860992SSakthivel K } 3427f5860992SSakthivel K 3428f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3429f5860992SSakthivel K { 3430f5860992SSakthivel K struct phy_start_resp *pPayload = 3431f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3432f5860992SSakthivel K u32 status = 3433f5860992SSakthivel K le32_to_cpu(pPayload->status); 3434f5860992SSakthivel K u32 phy_id = 3435f5860992SSakthivel K le32_to_cpu(pPayload->phyid); 3436f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3437f5860992SSakthivel K 34381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 34391b5d2793SJoe Perches "phy start resp status:0x%x, phyid:0x%x\n", 34401b5d2793SJoe Perches status, phy_id); 3441f5860992SSakthivel K if (status == 0) { 3442cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3443cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3444e703977bSpeter chang phy->enable_completion != NULL) { 3445f5860992SSakthivel K complete(phy->enable_completion); 3446e703977bSpeter chang phy->enable_completion = NULL; 3447e703977bSpeter chang } 3448f5860992SSakthivel K } 3449f5860992SSakthivel K return 0; 3450f5860992SSakthivel K 3451f5860992SSakthivel K } 3452f5860992SSakthivel K 3453f5860992SSakthivel K /** 3454f5860992SSakthivel K * mpi_thermal_hw_event -The hw event has come. 3455f5860992SSakthivel K * @pm8001_ha: our hba card information 3456f5860992SSakthivel K * @piomb: IO message buffer 3457f5860992SSakthivel K */ 3458f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3459f5860992SSakthivel K { 3460f5860992SSakthivel K struct thermal_hw_event *pPayload = 3461f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3462f5860992SSakthivel K 3463f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3464f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3465f5860992SSakthivel K 3466f5860992SSakthivel K if (thermal_event & 0x40) { 34671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 34681b5d2793SJoe Perches "Thermal Event: Local high temperature violated!\n"); 34691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3470f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 34711b5d2793SJoe Perches ((rht_lht & 0xFF00) >> 8)); 3472f5860992SSakthivel K } 3473f5860992SSakthivel K if (thermal_event & 0x10) { 34741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 34751b5d2793SJoe Perches "Thermal Event: Remote high temperature violated!\n"); 34761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3477f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 34781b5d2793SJoe Perches ((rht_lht & 0xFF000000) >> 24)); 3479f5860992SSakthivel K } 3480f5860992SSakthivel K return 0; 3481f5860992SSakthivel K } 3482f5860992SSakthivel K 3483f5860992SSakthivel K /** 3484f5860992SSakthivel K * mpi_hw_event -The hw event has come. 3485f5860992SSakthivel K * @pm8001_ha: our hba card information 3486f5860992SSakthivel K * @piomb: IO message buffer 3487f5860992SSakthivel K */ 3488f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3489f5860992SSakthivel K { 34908414cd80SViswas G unsigned long flags, i; 3491f5860992SSakthivel K struct hw_event_resp *pPayload = 3492f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3493f5860992SSakthivel K u32 lr_status_evt_portid = 3494f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3495f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3496f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3497f5860992SSakthivel K u8 phy_id = 3498f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3499f5860992SSakthivel K u16 eventType = 3500f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3501f5860992SSakthivel K u8 status = 3502f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3503f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3504f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 35058414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3506f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 35071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 35081b5d2793SJoe Perches "portid:%d phyid:%d event:0x%x status:0x%x\n", 35091b5d2793SJoe Perches port_id, phy_id, eventType, status); 3510f5860992SSakthivel K 3511f5860992SSakthivel K switch (eventType) { 3512f5860992SSakthivel K 3513f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 35141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n"); 3515f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3516f5860992SSakthivel K break; 3517f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 35181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n"); 3519f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3520f5860992SSakthivel K break; 3521f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 35221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); 3523f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); 3524f5860992SSakthivel K break; 3525f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 35261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); 3527869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3528869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 35291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n"); 3530869ddbdcSViswas G return 0; 3531869ddbdcSViswas G } 3532f5860992SSakthivel K phy->phy_attached = 0; 3533cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3534f5860992SSakthivel K break; 3535f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 35361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); 3537f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3538f5860992SSakthivel K phy->phy_attached = 0; 3539f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3540f5860992SSakthivel K break; 3541f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3542f5860992SSakthivel K to revalidate the sas domain*/ 3543f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 35441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n"); 3545f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3546f5860992SSakthivel K port_id, phy_id, 1, 0); 3547f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3548f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3549f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3550f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3551f5860992SSakthivel K break; 3552f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 35531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); 3554f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3555f5860992SSakthivel K phy->phy_attached = 0; 3556f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); 3557f5860992SSakthivel K break; 3558f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 35591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); 3560f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3561f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3562f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3563f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3564f5860992SSakthivel K break; 3565f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 35661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 35671b5d2793SJoe Perches "HW_EVENT_LINK_ERR_INVALID_DWORD\n"); 3568f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3569f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3570f5860992SSakthivel K break; 3571f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 35721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 35731b5d2793SJoe Perches "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"); 3574f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3575f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3576f5860992SSakthivel K port_id, phy_id, 0, 0); 3577f5860992SSakthivel K break; 3578f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 35791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 35801b5d2793SJoe Perches "HW_EVENT_LINK_ERR_CODE_VIOLATION\n"); 3581f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3582f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3583f5860992SSakthivel K port_id, phy_id, 0, 0); 3584f5860992SSakthivel K break; 3585f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 35861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 35871b5d2793SJoe Perches "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"); 3588f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3589f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3590f5860992SSakthivel K port_id, phy_id, 0, 0); 3591f5860992SSakthivel K break; 3592f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 35931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); 3594f5860992SSakthivel K break; 3595f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 35961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n"); 3597f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3598f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3599f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3600f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3601f5860992SSakthivel K break; 3602f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 36031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); 3604f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3605f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3606f5860992SSakthivel K port_id, phy_id, 0, 0); 3607f5860992SSakthivel K break; 3608f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 36091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); 3610f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); 3611f5860992SSakthivel K break; 3612f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 36131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); 3614f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3615f5860992SSakthivel K phy->phy_attached = 0; 3616f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3617f5860992SSakthivel K break; 3618f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 36191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36201b5d2793SJoe Perches "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"); 3621f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3622f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3623f5860992SSakthivel K port_id, phy_id, 0, 0); 3624f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3625f5860992SSakthivel K phy->phy_attached = 0; 3626f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3627f5860992SSakthivel K break; 3628f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 36291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); 3630869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3631869ddbdcSViswas G port_id, phy_id, 0, 0); 3632f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3633f5860992SSakthivel K phy->phy_attached = 0; 3634f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3635869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3636869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3637869ddbdcSViswas G PORT_RESET_TMO; 3638869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3639869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3640869ddbdcSViswas G } 3641f5860992SSakthivel K break; 3642f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 36431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36441b5d2793SJoe Perches "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"); 3645a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3646a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3647a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 36488414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 36498414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 36508414cd80SViswas G phy = &pm8001_ha->phy[i]; 36518414cd80SViswas G sas_ha->notify_phy_event(&phy->sas_phy, 36528414cd80SViswas G PHYE_LOSS_OF_SIGNAL); 36538414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 36548414cd80SViswas G } 36558414cd80SViswas G } 3656f5860992SSakthivel K break; 3657f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 36581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); 36598414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3660f5860992SSakthivel K break; 3661f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 36621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n"); 3663869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3664869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3665869ddbdcSViswas G PORT_RESET_SUCCESS; 3666869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3667869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3668869ddbdcSViswas G } 3669f5860992SSakthivel K break; 3670f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 36711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n"); 3672f5860992SSakthivel K break; 3673f5860992SSakthivel K default: 36741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n", 36751b5d2793SJoe Perches eventType); 3676f5860992SSakthivel K break; 3677f5860992SSakthivel K } 3678f5860992SSakthivel K return 0; 3679f5860992SSakthivel K } 3680f5860992SSakthivel K 3681f5860992SSakthivel K /** 3682f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3683f5860992SSakthivel K * @pm8001_ha: our hba card information 3684f5860992SSakthivel K * @piomb: IO message buffer 3685f5860992SSakthivel K */ 3686f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3687f5860992SSakthivel K { 3688f5860992SSakthivel K struct phy_stop_resp *pPayload = 3689f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3690f5860992SSakthivel K u32 status = 3691f5860992SSakthivel K le32_to_cpu(pPayload->status); 3692f5860992SSakthivel K u32 phyid = 3693cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3694f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 36951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n", 36961b5d2793SJoe Perches phyid, status); 3697cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3698cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3699cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3700f5860992SSakthivel K return 0; 3701f5860992SSakthivel K } 3702f5860992SSakthivel K 3703f5860992SSakthivel K /** 3704f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3705f5860992SSakthivel K * @pm8001_ha: our hba card information 3706f5860992SSakthivel K * @piomb: IO message buffer 3707f5860992SSakthivel K */ 3708f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3709f5860992SSakthivel K void *piomb) 3710f5860992SSakthivel K { 3711f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3712f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3713f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3714f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3715f5860992SSakthivel K 37161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3717f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 37181b5d2793SJoe Perches status, err_qlfr_pgcd); 3719f5860992SSakthivel K 3720f5860992SSakthivel K return 0; 3721f5860992SSakthivel K } 3722f5860992SSakthivel K 3723f5860992SSakthivel K /** 3724f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3725f5860992SSakthivel K * @pm8001_ha: our hba card information 3726f5860992SSakthivel K * @piomb: IO message buffer 3727f5860992SSakthivel K */ 3728f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3729f5860992SSakthivel K void *piomb) 3730f5860992SSakthivel K { 37311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3732f5860992SSakthivel K 3733f5860992SSakthivel K return 0; 3734f5860992SSakthivel K } 3735f5860992SSakthivel K 3736f5860992SSakthivel K /** 3737f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3738f5860992SSakthivel K * @pm8001_ha: our hba card information 3739f5860992SSakthivel K * @piomb: IO message buffer 3740f5860992SSakthivel K */ 3741f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3742f5860992SSakthivel K void *piomb) 3743f5860992SSakthivel K { 37441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3745f5860992SSakthivel K 3746f5860992SSakthivel K return 0; 3747f5860992SSakthivel K } 3748f5860992SSakthivel K 3749f5860992SSakthivel K /** 3750f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3751f5860992SSakthivel K * @pm8001_ha: our hba card information 3752f5860992SSakthivel K * @piomb: IO message buffer 3753f5860992SSakthivel K */ 3754f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3755f5860992SSakthivel K { 37561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3757f5860992SSakthivel K 3758f5860992SSakthivel K return 0; 3759f5860992SSakthivel K } 3760f5860992SSakthivel K 3761f5860992SSakthivel K /** 3762f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3763f5860992SSakthivel K * @pm8001_ha: our hba card information 3764f5860992SSakthivel K * @piomb: IO message buffer 3765f5860992SSakthivel K */ 3766f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3767f5860992SSakthivel K void *piomb) 3768f5860992SSakthivel K { 37699d9c7c20Syuuzheng u32 tag; 377027909407SAnand Kumar Santhanam u8 page_code; 37719d9c7c20Syuuzheng int rc = 0; 377227909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 377327909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 377427909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 377527909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3776f5860992SSakthivel K 37779d9c7c20Syuuzheng tag = le32_to_cpu(pPayload->tag); 377827909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 377927909407SAnand Kumar Santhanam if (status) { 378027909407SAnand Kumar Santhanam /* status is FAILED */ 37811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 37821b5d2793SJoe Perches "PhyProfile command failed with status 0x%08X\n", 37831b5d2793SJoe Perches status); 37849d9c7c20Syuuzheng rc = -1; 378527909407SAnand Kumar Santhanam } else { 378627909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 37871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n", 37881b5d2793SJoe Perches page_code); 37899d9c7c20Syuuzheng rc = -1; 379027909407SAnand Kumar Santhanam } 379127909407SAnand Kumar Santhanam } 37929d9c7c20Syuuzheng pm8001_tag_free(pm8001_ha, tag); 37939d9c7c20Syuuzheng return rc; 3794f5860992SSakthivel K } 3795f5860992SSakthivel K 3796f5860992SSakthivel K /** 3797f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3798f5860992SSakthivel K * @pm8001_ha: our hba card information 3799f5860992SSakthivel K * @piomb: IO message buffer 3800f5860992SSakthivel K */ 3801f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3802f5860992SSakthivel K void *piomb) 3803f5860992SSakthivel K { 3804f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3805f5860992SSakthivel K 3806f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3807f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3808f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3809f5860992SSakthivel K 38101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3811f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 38121b5d2793SJoe Perches status, kidx_new_curr_ksop, err_qlfr); 3813f5860992SSakthivel K 3814f5860992SSakthivel K return 0; 3815f5860992SSakthivel K } 3816f5860992SSakthivel K 3817f5860992SSakthivel K /** 3818f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3819f5860992SSakthivel K * @pm8001_ha: our hba card information 3820f5860992SSakthivel K * @piomb: IO message buffer 3821f5860992SSakthivel K */ 3822f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3823f5860992SSakthivel K void *piomb) 3824f5860992SSakthivel K { 38251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3826f5860992SSakthivel K 3827f5860992SSakthivel K return 0; 3828f5860992SSakthivel K } 3829f5860992SSakthivel K 3830f5860992SSakthivel K /** 3831f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3832f5860992SSakthivel K * @pm8001_ha: our hba card information 3833f5860992SSakthivel K * @piomb: IO message buffer 3834f5860992SSakthivel K */ 3835f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3836f5860992SSakthivel K void *piomb) 3837f5860992SSakthivel K { 38381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3839f5860992SSakthivel K 3840f5860992SSakthivel K return 0; 3841f5860992SSakthivel K } 3842f5860992SSakthivel K 3843f5860992SSakthivel K /** 3844f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3845f5860992SSakthivel K * @pm8001_ha: our hba card information 3846f5860992SSakthivel K * @piomb: IO message buffer 3847f5860992SSakthivel K */ 3848f5860992SSakthivel K static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb) 3849f5860992SSakthivel K { 3850f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3851f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3852f5860992SSakthivel K 3853f5860992SSakthivel K switch (opc) { 3854f5860992SSakthivel K case OPC_OUB_ECHO: 38551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n"); 3856f5860992SSakthivel K break; 3857f5860992SSakthivel K case OPC_OUB_HW_EVENT: 38581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n"); 3859f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3860f5860992SSakthivel K break; 3861f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 38621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n"); 3863f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3864f5860992SSakthivel K break; 3865f5860992SSakthivel K case OPC_OUB_SSP_COMP: 38661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n"); 3867f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3868f5860992SSakthivel K break; 3869f5860992SSakthivel K case OPC_OUB_SMP_COMP: 38701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n"); 3871f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3872f5860992SSakthivel K break; 3873f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 38741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n"); 3875f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3876f5860992SSakthivel K break; 3877f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 38781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n"); 3879f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3880f5860992SSakthivel K break; 3881f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 38821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "unregister the device\n"); 3883f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3884f5860992SSakthivel K break; 3885f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 38861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n"); 3887f5860992SSakthivel K break; 3888f5860992SSakthivel K case OPC_OUB_SATA_COMP: 38891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n"); 3890f5860992SSakthivel K mpi_sata_completion(pm8001_ha, piomb); 3891f5860992SSakthivel K break; 3892f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 38931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n"); 3894f5860992SSakthivel K mpi_sata_event(pm8001_ha, piomb); 3895f5860992SSakthivel K break; 3896f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 38971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n"); 3898f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3899f5860992SSakthivel K break; 3900f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 39011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n"); 3902f5860992SSakthivel K /*This is for target*/ 3903f5860992SSakthivel K break; 3904f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 39051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n"); 3906f5860992SSakthivel K /*This is for target*/ 3907f5860992SSakthivel K break; 3908f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 39091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n"); 3910f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3911f5860992SSakthivel K break; 3912f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 39131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n"); 3914f5860992SSakthivel K break; 3915f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 39161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n"); 3917f5860992SSakthivel K break; 3918f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 39191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n"); 3920f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 3921f5860992SSakthivel K break; 3922f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 39231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n"); 3924f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3925f5860992SSakthivel K break; 3926f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 39271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n"); 3928f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3929f5860992SSakthivel K break; 3930f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 39311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39321b5d2793SJoe Perches "OPC_OUB_SAS_DIAG_MODE_START_END\n"); 3933f5860992SSakthivel K break; 3934f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 39351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n"); 3936f5860992SSakthivel K break; 3937f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 39381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n"); 3939f5860992SSakthivel K break; 3940f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 39411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n"); 3942f5860992SSakthivel K break; 3943f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 39441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n"); 3945f5860992SSakthivel K break; 3946f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 39471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n"); 3948f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3949f5860992SSakthivel K break; 3950f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 39511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n"); 3952f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 3953f5860992SSakthivel K break; 3954f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 39551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n"); 3956f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 3957f5860992SSakthivel K break; 3958f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 39591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n"); 3960f5860992SSakthivel K break; 3961f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 39621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n"); 3963f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 3964f5860992SSakthivel K break; 3965f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 39661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n"); 3967f5860992SSakthivel K break; 3968f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 39691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n"); 3970f5860992SSakthivel K break; 3971f5860992SSakthivel K /* spcv specifc commands */ 3972f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 39731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39741b5d2793SJoe Perches "OPC_OUB_PHY_START_RESP opcode:%x\n", opc); 3975f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 3976f5860992SSakthivel K break; 3977f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 39781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39791b5d2793SJoe Perches "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc); 3980f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 3981f5860992SSakthivel K break; 3982f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 39831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39841b5d2793SJoe Perches "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc); 3985f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 3986f5860992SSakthivel K break; 3987f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 39881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39891b5d2793SJoe Perches "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc); 3990f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 3991f5860992SSakthivel K break; 3992f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 39931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39941b5d2793SJoe Perches "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc); 3995f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 3996f5860992SSakthivel K break; 3997f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 39981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39991b5d2793SJoe Perches "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc); 4000f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 4001f5860992SSakthivel K break; 4002f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 40031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40041b5d2793SJoe Perches "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc); 4005f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 4006f5860992SSakthivel K break; 4007f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 40081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40091b5d2793SJoe Perches "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc); 4010f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 4011f5860992SSakthivel K break; 4012f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 40131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40141b5d2793SJoe Perches "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc); 4015f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 4016f5860992SSakthivel K break; 4017f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 40181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40191b5d2793SJoe Perches "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc); 4020f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 4021f5860992SSakthivel K break; 4022f5860992SSakthivel K default: 40231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 40241b5d2793SJoe Perches "Unknown outbound Queue IOMB OPC = 0x%x\n", opc); 4025f5860992SSakthivel K break; 4026f5860992SSakthivel K } 4027f5860992SSakthivel K } 4028f5860992SSakthivel K 402972349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 403072349b62SDeepak Ukey { 40311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n", 40321b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)); 40331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n", 40341b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)); 40351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n", 40361b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)); 40371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n", 40381b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)); 40391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 40401b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)); 40411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 40421b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)); 40431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 40441b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)); 40451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 40461b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)); 40471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 40481b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)); 40491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 40501b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)); 40511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 40521b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)); 40531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 40541b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)); 405572349b62SDeepak Ukey } 405672349b62SDeepak Ukey 4057f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 4058f5860992SSakthivel K { 4059f5860992SSakthivel K struct outbound_queue_table *circularQ; 4060f5860992SSakthivel K void *pMsg1 = NULL; 40613f649ab7SKees Cook u8 bc; 4062f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 4063f5860992SSakthivel K unsigned long flags; 406472349b62SDeepak Ukey u32 regval; 4065f5860992SSakthivel K 406605c6c029SViswas G if (vec == (pm8001_ha->max_q_num - 1)) { 406772349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 406872349b62SDeepak Ukey if ((regval & SCRATCH_PAD_MIPSALL_READY) != 406972349b62SDeepak Ukey SCRATCH_PAD_MIPSALL_READY) { 407072349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 40711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 40721b5d2793SJoe Perches "Firmware Fatal error! Regval:0x%x\n", 40731b5d2793SJoe Perches regval); 407472349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 407572349b62SDeepak Ukey return ret; 407672349b62SDeepak Ukey } 407772349b62SDeepak Ukey } 4078f5860992SSakthivel K spin_lock_irqsave(&pm8001_ha->lock, flags); 4079f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 4080f5860992SSakthivel K do { 408172349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 408272349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 408372349b62SDeepak Ukey * interrupt setup. 408472349b62SDeepak Ukey */ 408572349b62SDeepak Ukey if (!circularQ->pi_virt) 408672349b62SDeepak Ukey break; 4087f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 4088f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 4089f5860992SSakthivel K /* process the outbound message */ 4090f5860992SSakthivel K process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); 4091f5860992SSakthivel K /* free the message from the outbound circular buffer */ 4092f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 4093f5860992SSakthivel K circularQ, bc); 4094f5860992SSakthivel K } 4095f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 4096f5860992SSakthivel K /* Update the producer index from SPC */ 4097f5860992SSakthivel K circularQ->producer_index = 4098f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 4099f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 4100f5860992SSakthivel K circularQ->consumer_idx) 4101f5860992SSakthivel K /* OQ is empty */ 4102f5860992SSakthivel K break; 4103f5860992SSakthivel K } 4104f5860992SSakthivel K } while (1); 4105f5860992SSakthivel K spin_unlock_irqrestore(&pm8001_ha->lock, flags); 4106f5860992SSakthivel K return ret; 4107f5860992SSakthivel K } 4108f5860992SSakthivel K 4109f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 4110f5860992SSakthivel K static const u8 data_dir_flags[] = { 4111f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 4112f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 4113f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 4114f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 4115f5860992SSakthivel K }; 4116f5860992SSakthivel K 4117f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 4118f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 4119f5860992SSakthivel K { 4120f5860992SSakthivel K psmp_cmd->tag = hTag; 4121f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 4122f5860992SSakthivel K if (mode == SMP_DIRECT) { 4123f5860992SSakthivel K length = length - 4; /* subtract crc */ 4124f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 4125f5860992SSakthivel K } else { 4126f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 4127f5860992SSakthivel K } 4128f5860992SSakthivel K } 4129f5860992SSakthivel K 4130f5860992SSakthivel K /** 4131f5860992SSakthivel K * pm8001_chip_smp_req - send a SMP task to FW 4132f5860992SSakthivel K * @pm8001_ha: our hba card information. 4133f5860992SSakthivel K * @ccb: the ccb information this request used. 4134f5860992SSakthivel K */ 4135f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 4136f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4137f5860992SSakthivel K { 4138f5860992SSakthivel K int elem, rc; 4139f5860992SSakthivel K struct sas_task *task = ccb->task; 4140f5860992SSakthivel K struct domain_device *dev = task->dev; 4141f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4142f5860992SSakthivel K struct scatterlist *sg_req, *sg_resp; 4143f5860992SSakthivel K u32 req_len, resp_len; 4144f5860992SSakthivel K struct smp_req smp_cmd; 4145f5860992SSakthivel K u32 opc; 4146f5860992SSakthivel K struct inbound_queue_table *circularQ; 4147f5860992SSakthivel K char *preq_dma_addr = NULL; 4148f5860992SSakthivel K __le64 tmp_addr; 4149f5860992SSakthivel K u32 i, length; 4150f5860992SSakthivel K 4151f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 4152f5860992SSakthivel K /* 4153f5860992SSakthivel K * DMA-map SMP request, response buffers 4154f5860992SSakthivel K */ 4155f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 4156f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 4157f5860992SSakthivel K if (!elem) 4158f5860992SSakthivel K return -ENOMEM; 4159f5860992SSakthivel K req_len = sg_dma_len(sg_req); 4160f5860992SSakthivel K 4161f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 4162f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 4163f5860992SSakthivel K if (!elem) { 4164f5860992SSakthivel K rc = -ENOMEM; 4165f5860992SSakthivel K goto err_out; 4166f5860992SSakthivel K } 4167f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 4168f5860992SSakthivel K /* must be in dwords */ 4169f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 4170f5860992SSakthivel K rc = -EINVAL; 4171f5860992SSakthivel K goto err_out_2; 4172f5860992SSakthivel K } 4173f5860992SSakthivel K 4174f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 4175f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4176f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 4177f5860992SSakthivel K 4178f5860992SSakthivel K length = sg_req->length; 41791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length); 4180f5860992SSakthivel K if (!(length - 8)) 4181f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 4182f5860992SSakthivel K else 4183f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 4184f5860992SSakthivel K 4185f5860992SSakthivel K 4186f5860992SSakthivel K tmp_addr = cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); 4187f5860992SSakthivel K preq_dma_addr = (char *)phys_to_virt(tmp_addr); 4188f5860992SSakthivel K 4189f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 4190f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 41911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n"); 4192f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 4193f5860992SSakthivel K * SMP Request header here. */ 4194f5860992SSakthivel K for (i = 0; i < 4; i++) 4195f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr + i); 4196f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 4197f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4198f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4199cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 4200f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 4201f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4202f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 4203f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4204f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4205f5860992SSakthivel K (&task->smp_task.smp_resp)); 4206f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4207f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 4208f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 4209f5860992SSakthivel K } else { /* DIRECT MODE */ 4210f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4211f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4212f5860992SSakthivel K (&task->smp_task.smp_req)); 4213f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4214f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 4215f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4216f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4217f5860992SSakthivel K (&task->smp_task.smp_resp)); 4218f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4219f5860992SSakthivel K cpu_to_le32 4220f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 4221f5860992SSakthivel K } 4222f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 42231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n"); 4224f5860992SSakthivel K for (i = 0; i < length; i++) 4225f5860992SSakthivel K if (i < 16) { 4226f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr+i); 42271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4228f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4229f5860992SSakthivel K i, smp_cmd.smp_req16[i], 42301b5d2793SJoe Perches *(preq_dma_addr)); 4231f5860992SSakthivel K } else { 4232f5860992SSakthivel K smp_cmd.smp_req[i] = *(preq_dma_addr+i); 42331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4234f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4235f5860992SSakthivel K i, smp_cmd.smp_req[i], 42361b5d2793SJoe Perches *(preq_dma_addr)); 4237f5860992SSakthivel K } 4238f5860992SSakthivel K } 4239f5860992SSakthivel K 4240f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 4241f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 424291a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd, 424391a43fa6Speter chang sizeof(smp_cmd), 0); 42445533abcaSTomas Henzl if (rc) 42455533abcaSTomas Henzl goto err_out_2; 4246f5860992SSakthivel K return 0; 4247f5860992SSakthivel K 4248f5860992SSakthivel K err_out_2: 4249f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4250f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4251f5860992SSakthivel K err_out: 4252f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4253f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4254f5860992SSakthivel K return rc; 4255f5860992SSakthivel K } 4256f5860992SSakthivel K 4257f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4258f5860992SSakthivel K { 4259e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4260e73823f7SJames Bottomley 4261e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4262f5860992SSakthivel K return 1; 4263f5860992SSakthivel K else 4264f5860992SSakthivel K return 0; 4265f5860992SSakthivel K } 4266f5860992SSakthivel K 4267f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4268f5860992SSakthivel K { 4269f5860992SSakthivel K int ret = 0; 4270f5860992SSakthivel K switch (task->ata_task.fis.command) { 4271f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4272f5860992SSakthivel K case ATA_CMD_READ_EXT: 4273f5860992SSakthivel K case ATA_CMD_READ: 4274f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4275f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4276f5860992SSakthivel K case ATA_CMD_WRITE: 4277f5860992SSakthivel K case ATA_CMD_PIO_READ: 4278f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4279f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4280f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4281f5860992SSakthivel K ret = 1; 4282f5860992SSakthivel K break; 4283f5860992SSakthivel K default: 4284f5860992SSakthivel K ret = 0; 4285f5860992SSakthivel K break; 4286f5860992SSakthivel K } 4287f5860992SSakthivel K return ret; 4288f5860992SSakthivel K } 4289f5860992SSakthivel K 4290f5860992SSakthivel K /** 4291f5860992SSakthivel K * pm80xx_chip_ssp_io_req - send a SSP task to FW 4292f5860992SSakthivel K * @pm8001_ha: our hba card information. 4293f5860992SSakthivel K * @ccb: the ccb information this request used. 4294f5860992SSakthivel K */ 4295f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4296f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4297f5860992SSakthivel K { 4298f5860992SSakthivel K struct sas_task *task = ccb->task; 4299f5860992SSakthivel K struct domain_device *dev = task->dev; 4300f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4301f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4302f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4303f5860992SSakthivel K int ret; 43040ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 43050ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4306f5860992SSakthivel K struct inbound_queue_table *circularQ; 430705c6c029SViswas G u32 q_index, cpu_id; 4308f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4309f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4310f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4311f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4312f5860992SSakthivel K * used internally by controller 4313f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4314f5860992SSakthivel K */ 4315f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4316f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4317f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4318f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4319f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4320f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4321f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4322f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4323f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4324e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4325e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 432605c6c029SViswas G cpu_id = smp_processor_id(); 432705c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4328f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4329f5860992SSakthivel K 4330f5860992SSakthivel K /* Check if encryption is set */ 4331f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4332f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 43331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4334f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 43351b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0]); 4336f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4337f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4338f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4339f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4340f5860992SSakthivel K 4341f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4342f5860992SSakthivel K if (task->num_scatter > 1) { 4343f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4344f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 43455a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4346f5860992SSakthivel K ssp_cmd.enc_addr_low = 4347f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4348f5860992SSakthivel K ssp_cmd.enc_addr_high = 4349f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4350f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4351f5860992SSakthivel K } else if (task->num_scatter == 1) { 4352f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4353f5860992SSakthivel K ssp_cmd.enc_addr_low = 4354f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4355f5860992SSakthivel K ssp_cmd.enc_addr_high = 4356f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4357f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4358f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 43590ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 43600ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 43610ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 43620ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 43630ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 43640ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 43651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 43661b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 43670ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 43681b5d2793SJoe Perches end_addr_high, end_addr_low); 43690ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 43700ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 43715a141315SViswas G phys_addr = ccb->ccb_dma_handle; 43720ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 43730ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 43740ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 43750ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 43760ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 43770ecdf00bSAnand Kumar Santhanam } 4378f5860992SSakthivel K } else if (task->num_scatter == 0) { 4379f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4380f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4381f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4382f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4383f5860992SSakthivel K } 4384f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4385f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4386f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4387e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4388e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4389e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4390e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4391f5860992SSakthivel K } else { 43921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4393f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 43941b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0], q_index); 4395f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4396f5860992SSakthivel K if (task->num_scatter > 1) { 4397f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4398f5860992SSakthivel K ccb->buf_prd); 43995a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4400f5860992SSakthivel K ssp_cmd.addr_low = 4401f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4402f5860992SSakthivel K ssp_cmd.addr_high = 4403f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4404f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4405f5860992SSakthivel K } else if (task->num_scatter == 1) { 4406f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4407f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4408f5860992SSakthivel K ssp_cmd.addr_high = 4409f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4410f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4411f5860992SSakthivel K ssp_cmd.esgl = 0; 44120ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44130ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44140ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 44150ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44160ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44170ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 44181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 44191b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 44200ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 44211b5d2793SJoe Perches end_addr_high, end_addr_low); 44220ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44230ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44245a141315SViswas G phys_addr = ccb->ccb_dma_handle; 44250ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 44260ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 44270ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 44280ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 44290ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 44300ecdf00bSAnand Kumar Santhanam } 4431f5860992SSakthivel K } else if (task->num_scatter == 0) { 4432f5860992SSakthivel K ssp_cmd.addr_low = 0; 4433f5860992SSakthivel K ssp_cmd.addr_high = 0; 4434f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4435f5860992SSakthivel K ssp_cmd.esgl = 0; 4436f5860992SSakthivel K } 4437f5860992SSakthivel K } 4438f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 443991a43fa6Speter chang &ssp_cmd, sizeof(ssp_cmd), q_index); 4440f5860992SSakthivel K return ret; 4441f5860992SSakthivel K } 4442f5860992SSakthivel K 4443f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4444f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4445f5860992SSakthivel K { 4446f5860992SSakthivel K struct sas_task *task = ccb->task; 4447f5860992SSakthivel K struct domain_device *dev = task->dev; 4448f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 4449f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4450f5860992SSakthivel K int ret; 445105c6c029SViswas G u32 q_index, cpu_id; 4452f5860992SSakthivel K struct sata_start_req sata_cmd; 4453f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 44540ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 44550ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4456f5860992SSakthivel K u32 ATAP = 0x0; 4457f5860992SSakthivel K u32 dir; 4458f5860992SSakthivel K struct inbound_queue_table *circularQ; 4459c6b9ef57SSakthivel K unsigned long flags; 4460f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4461f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 446205c6c029SViswas G cpu_id = smp_processor_id(); 446305c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4464f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4465f5860992SSakthivel K 4466f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4467f5860992SSakthivel K ATAP = 0x04; /* no data*/ 44681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "no data\n"); 4469f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4470f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4471f5860992SSakthivel K ATAP = 0x06; /* DMA */ 44721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "DMA\n"); 4473f5860992SSakthivel K } else { 4474f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 44751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "PIO\n"); 4476f5860992SSakthivel K } 4477f5860992SSakthivel K if (task->ata_task.use_ncq && 44781cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4479f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 44801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA\n"); 4481f5860992SSakthivel K } 4482f5860992SSakthivel K } 4483c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4484c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4485f5860992SSakthivel K ncg_tag = hdr_tag; 4486c6b9ef57SSakthivel K } 4487f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4488f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4489f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4490f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4491f5860992SSakthivel K 4492f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4493f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4494f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4495f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4496f5860992SSakthivel K 4497f5860992SSakthivel K /* Check if encryption is set */ 4498f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4499f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 45001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4501f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 45021b5d2793SJoe Perches sata_cmd.sata_fis.command); 4503f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4504f5860992SSakthivel K 4505f5860992SSakthivel K /* set encryption bit */ 4506f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4507f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4508f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4509f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4510f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4511f5860992SSakthivel K if (task->num_scatter > 1) { 4512f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4513f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 45145a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4515f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4516f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4517f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4518f5860992SSakthivel K } else if (task->num_scatter == 1) { 4519f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4520f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4521f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4522f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4523f5860992SSakthivel K sata_cmd.enc_esgl = 0; 45240ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 45250ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 45260ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 45270ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 45280ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 45290ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 45301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 45311b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 45320ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 45331b5d2793SJoe Perches end_addr_high, end_addr_low); 45340ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 45350ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 45365a141315SViswas G phys_addr = ccb->ccb_dma_handle; 45370ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 45380ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 45390ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 45400ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 45410ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 45420ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 45430ecdf00bSAnand Kumar Santhanam } 4544f5860992SSakthivel K } else if (task->num_scatter == 0) { 4545f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4546f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4547f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4548f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4549f5860992SSakthivel K } 4550f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4551f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4552f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4553f5860992SSakthivel K sata_cmd.twk_val0 = 4554f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4555f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4556f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4557f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4558f5860992SSakthivel K sata_cmd.twk_val1 = 4559f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4560f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4561f5860992SSakthivel K } else { 45621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4563f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 45641b5d2793SJoe Perches sata_cmd.sata_fis.command, q_index); 4565f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4566f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4567f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4568f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4569f5860992SSakthivel K 4570f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4571f5860992SSakthivel K if (task->num_scatter > 1) { 4572f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4573f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 45745a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4575f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4576f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4577f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4578f5860992SSakthivel K } else if (task->num_scatter == 1) { 4579f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4580f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4581f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4582f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4583f5860992SSakthivel K sata_cmd.esgl = 0; 45840ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 45850ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 45860ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 45870ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 45880ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 45890ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 45901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 45911b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%xend_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 45920ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 45931b5d2793SJoe Perches end_addr_high, end_addr_low); 45940ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 45950ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 45965a141315SViswas G phys_addr = ccb->ccb_dma_handle; 45970ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 45980ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 45990ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 46000ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46010ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 46020ecdf00bSAnand Kumar Santhanam } 4603f5860992SSakthivel K } else if (task->num_scatter == 0) { 4604f5860992SSakthivel K sata_cmd.addr_low = 0; 4605f5860992SSakthivel K sata_cmd.addr_high = 0; 4606f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4607f5860992SSakthivel K sata_cmd.esgl = 0; 4608f5860992SSakthivel K } 4609f5860992SSakthivel K /* scsi cdb */ 4610f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4611f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4612f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4613f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4614f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4615f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4616f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4617f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4618f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4619f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4620f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4621f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4622f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4623f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4624f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4625f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4626f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4627f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4628f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4629f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4630f5860992SSakthivel K } 4631c6b9ef57SSakthivel K 4632c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4633c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4634c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4635c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4636c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4637c6b9ef57SSakthivel K struct task_status_struct *ts; 4638c6b9ef57SSakthivel K 4639c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4640c6b9ef57SSakthivel K ts = &task->task_status; 4641c6b9ef57SSakthivel K 4642c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4643c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4644c6b9ef57SSakthivel K ts->stat = SAM_STAT_GOOD; 4645c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4646c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 4647c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4648c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4649c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4650c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4651c6b9ef57SSakthivel K flags); 46521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 46531b5d2793SJoe Perches "task 0x%p resp 0x%x stat 0x%x but aborted by upper layer\n", 46541b5d2793SJoe Perches task, ts->resp, 46551b5d2793SJoe Perches ts->stat); 4656c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4657c6b9ef57SSakthivel K return 0; 46582b01d816SSuresh Thiagarajan } else { 4659c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4660c6b9ef57SSakthivel K flags); 46612b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 46622b01d816SSuresh Thiagarajan ccb, tag); 46634a2efd4bSViswas G atomic_dec(&pm8001_ha_dev->running_req); 4664c6b9ef57SSakthivel K return 0; 4665c6b9ef57SSakthivel K } 4666c6b9ef57SSakthivel K } 4667c6b9ef57SSakthivel K } 4668f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 466991a43fa6Speter chang &sata_cmd, sizeof(sata_cmd), q_index); 4670f5860992SSakthivel K return ret; 4671f5860992SSakthivel K } 4672f5860992SSakthivel K 4673f5860992SSakthivel K /** 4674f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4675f5860992SSakthivel K * @pm8001_ha: our hba card information. 4676f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4677f5860992SSakthivel K */ 4678f5860992SSakthivel K static int 4679f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4680f5860992SSakthivel K { 4681f5860992SSakthivel K struct phy_start_req payload; 4682f5860992SSakthivel K struct inbound_queue_table *circularQ; 4683f5860992SSakthivel K int ret; 4684f5860992SSakthivel K u32 tag = 0x01; 4685f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4686f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4687f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4688f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4689f5860992SSakthivel K 46901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id); 4691a9a923e5SAnand Kumar Santhanam 46923e253d96Speter chang payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 46933e253d96Speter chang LINKMODE_AUTO | pm8001_ha->link_rate | phy_id); 4694f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4695f5860992SSakthivel K /** 4696f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4697f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4698f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4699f5860992SSakthivel K phy_id); 4700f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4701f5860992SSakthivel K **/ 4702f5860992SSakthivel K 4703aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4704f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4705f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 47063e253d96Speter chang &pm8001_ha->sas_addr, SAS_ADDR_SIZE); 4707f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 470891a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 470991a43fa6Speter chang sizeof(payload), 0); 4710f5860992SSakthivel K return ret; 4711f5860992SSakthivel K } 4712f5860992SSakthivel K 4713f5860992SSakthivel K /** 4714f5860992SSakthivel K * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4715f5860992SSakthivel K * @pm8001_ha: our hba card information. 4716f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4717f5860992SSakthivel K */ 4718f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4719f5860992SSakthivel K u8 phy_id) 4720f5860992SSakthivel K { 4721f5860992SSakthivel K struct phy_stop_req payload; 4722f5860992SSakthivel K struct inbound_queue_table *circularQ; 4723f5860992SSakthivel K int ret; 4724f5860992SSakthivel K u32 tag = 0x01; 4725f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4726f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4727f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4728f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4729f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 473091a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 473191a43fa6Speter chang sizeof(payload), 0); 4732f5860992SSakthivel K return ret; 4733f5860992SSakthivel K } 4734f5860992SSakthivel K 47356ad4a517SLee Jones /* 4736f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4737f5860992SSakthivel K */ 4738f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4739f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4740f5860992SSakthivel K { 4741f5860992SSakthivel K struct reg_dev_req payload; 4742f5860992SSakthivel K u32 opc; 4743f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4744f5860992SSakthivel K struct inbound_queue_table *circularQ; 4745f5860992SSakthivel K u32 linkrate, phy_id; 4746f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4747f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4748f5860992SSakthivel K u8 retryFlag = 0x1; 4749f5860992SSakthivel K u16 firstBurstSize = 0; 4750f5860992SSakthivel K u16 ITNT = 2000; 4751f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4752f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 4753f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4754f5860992SSakthivel K 4755f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4756f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4757f5860992SSakthivel K if (rc) 4758f5860992SSakthivel K return rc; 4759f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4760f5860992SSakthivel K ccb->device = pm8001_dev; 4761f5860992SSakthivel K ccb->ccb_tag = tag; 4762f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4763f5860992SSakthivel K 4764f5860992SSakthivel K if (flag == 1) { 4765f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4766f5860992SSakthivel K } else { 4767aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4768f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4769aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 4770aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_EDGE_EXPANDER_DEVICE || 4771aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE) 4772f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4773f5860992SSakthivel K } 4774924a3541SJohn Garry if (parent_dev && dev_is_expander(parent_dev->dev_type)) 4775f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4776f5860992SSakthivel K else 4777f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4778f5860992SSakthivel K 4779f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4780f5860992SSakthivel K 4781f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4782f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4783f5860992SSakthivel K 4784f5860992SSakthivel K payload.phyid_portid = 4785f5860992SSakthivel K cpu_to_le32(((pm8001_dev->sas_device->port->id) & 0xFF) | 4786f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4787f5860992SSakthivel K 4788f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4789f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4790f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4791f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4792f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4793f5860992SSakthivel K 4794f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4795f5860992SSakthivel K SAS_ADDR_SIZE); 4796f5860992SSakthivel K 479791a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 479891a43fa6Speter chang sizeof(payload), 0); 47995533abcaSTomas Henzl if (rc) 48005533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4801f5860992SSakthivel K 4802f5860992SSakthivel K return rc; 4803f5860992SSakthivel K } 4804f5860992SSakthivel K 4805f5860992SSakthivel K /** 4806f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4807f5860992SSakthivel K * @pm8001_ha: our hba card information. 48086ad4a517SLee Jones * @phyId: the phy id which we wanted to operate 48096ad4a517SLee Jones * @phy_op: phy operation to request 4810f5860992SSakthivel K */ 4811f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4812f5860992SSakthivel K u32 phyId, u32 phy_op) 4813f5860992SSakthivel K { 481425c6edbdSViswas G u32 tag; 481525c6edbdSViswas G int rc; 4816f5860992SSakthivel K struct local_phy_ctl_req payload; 4817f5860992SSakthivel K struct inbound_queue_table *circularQ; 4818f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4819f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 482025c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 482125c6edbdSViswas G if (rc) 482225c6edbdSViswas G return rc; 4823f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 482425c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4825f5860992SSakthivel K payload.phyop_phyid = 4826f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 482791a43fa6Speter chang return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 482891a43fa6Speter chang sizeof(payload), 0); 4829f5860992SSakthivel K } 4830f5860992SSakthivel K 4831f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4832f5860992SSakthivel K { 4833f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4834f5860992SSakthivel K return 1; 4835292c04ccSColin Ian King #else 4836292c04ccSColin Ian King u32 value; 4837292c04ccSColin Ian King 4838f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4839f5860992SSakthivel K if (value) 4840f5860992SSakthivel K return 1; 4841f5860992SSakthivel K return 0; 4842292c04ccSColin Ian King #endif 4843f5860992SSakthivel K } 4844f5860992SSakthivel K 4845f5860992SSakthivel K /** 4846f5860992SSakthivel K * pm8001_chip_isr - PM8001 isr handler. 4847f5860992SSakthivel K * @pm8001_ha: our hba card information. 48486ad4a517SLee Jones * @vec: irq number. 4849f5860992SSakthivel K */ 4850f5860992SSakthivel K static irqreturn_t 4851f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4852f5860992SSakthivel K { 4853f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 48541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 48557370672dSpeter chang "irq vec %d, ODMR:0x%x\n", 48561b5d2793SJoe Perches vec, pm8001_cr32(pm8001_ha, 0, 0x30)); 4857f5860992SSakthivel K process_oq(pm8001_ha, vec); 4858f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4859f5860992SSakthivel K return IRQ_HANDLED; 4860f5860992SSakthivel K } 4861f5860992SSakthivel K 4862ea310f57SLee Jones static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 4863ea310f57SLee Jones u32 operation, u32 phyid, 4864ea310f57SLee Jones u32 length, u32 *buf) 486527909407SAnand Kumar Santhanam { 486627909407SAnand Kumar Santhanam u32 tag , i, j = 0; 486727909407SAnand Kumar Santhanam int rc; 486827909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 486927909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 487027909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 487127909407SAnand Kumar Santhanam 487227909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 487327909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 487427909407SAnand Kumar Santhanam if (rc) 48751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n"); 487627909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 487727909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 487827909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 48791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 48801b5d2793SJoe Perches " phy profile command for phy %x ,length is %d\n", 48811b5d2793SJoe Perches payload.ppc_phyid, length); 488227909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 488327909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 488427909407SAnand Kumar Santhanam j++; 488527909407SAnand Kumar Santhanam } 488691a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 488791a43fa6Speter chang sizeof(payload), 0); 48885533abcaSTomas Henzl if (rc) 48895533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 489027909407SAnand Kumar Santhanam } 489127909407SAnand Kumar Santhanam 489227909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 489327909407SAnand Kumar Santhanam u32 length, u8 *buf) 489427909407SAnand Kumar Santhanam { 4895fdd0a66bSYueHaibing u32 i; 489627909407SAnand Kumar Santhanam 489727909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 489827909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 489927909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 490027909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 490127909407SAnand Kumar Santhanam } 49021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n"); 490327909407SAnand Kumar Santhanam } 4904c5614df7SBenjamin Rood 4905c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4906c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 4907c5614df7SBenjamin Rood { 4908c5614df7SBenjamin Rood u32 tag, opc; 4909c5614df7SBenjamin Rood int rc, i; 4910c5614df7SBenjamin Rood struct set_phy_profile_req payload; 4911c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 4912c5614df7SBenjamin Rood 4913c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 4914c5614df7SBenjamin Rood 4915c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 4916c5614df7SBenjamin Rood if (rc) 49171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n"); 4918c5614df7SBenjamin Rood 4919c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4920c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 4921c5614df7SBenjamin Rood 4922c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 4923c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 4924c5614df7SBenjamin Rood | (phy & 0xFF)); 4925c5614df7SBenjamin Rood 4926c5614df7SBenjamin Rood for (i = 0; i < length; i++) 4927c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 4928c5614df7SBenjamin Rood 492991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 493091a43fa6Speter chang sizeof(payload), 0); 4931c5614df7SBenjamin Rood if (rc) 4932c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 4933c5614df7SBenjamin Rood 49341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy); 4935c5614df7SBenjamin Rood } 4936f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 4937f5860992SSakthivel K .name = "pmc80xx", 4938f5860992SSakthivel K .chip_init = pm80xx_chip_init, 4939f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 4940f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 4941f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 4942f5860992SSakthivel K .isr = pm80xx_chip_isr, 4943f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 4944f5860992SSakthivel K .isr_process_oq = process_oq, 4945f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 4946f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 4947f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 4948f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 4949f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 4950f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 4951f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 4952f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 4953f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 4954f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 4955f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 4956f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 4957f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 4958f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 4959f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 4960f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 4961f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 4962f5860992SSakthivel K }; 4963