1 /* 2 * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver 3 * 4 * Copyright (c) 2008-2009 USI Co., Ltd. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * substantially similar to the "NO WARRANTY" disclaimer below 15 * ("Disclaimer") and any redistribution must be conditioned upon 16 * including a substantially similar Disclaimer requirement for further 17 * binary redistribution. 18 * 3. Neither the names of the above-listed copyright holders nor the names 19 * of any contributors may be used to endorse or promote products derived 20 * from this software without specific prior written permission. 21 * 22 * Alternatively, this software may be distributed under the terms of the 23 * GNU General Public License ("GPL") version 2 as published by the Free 24 * Software Foundation. 25 * 26 * NO WARRANTY 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGES. 38 * 39 */ 40 41 #ifndef _PM8001_SAS_H_ 42 #define _PM8001_SAS_H_ 43 44 #include <linux/kernel.h> 45 #include <linux/module.h> 46 #include <linux/spinlock.h> 47 #include <linux/delay.h> 48 #include <linux/types.h> 49 #include <linux/ctype.h> 50 #include <linux/dma-mapping.h> 51 #include <linux/pci.h> 52 #include <linux/interrupt.h> 53 #include <linux/workqueue.h> 54 #include <scsi/libsas.h> 55 #include <scsi/scsi_tcq.h> 56 #include <scsi/sas_ata.h> 57 #include <linux/atomic.h> 58 #include <linux/blk-mq.h> 59 #include <linux/blk-mq-pci.h> 60 #include "pm8001_defs.h" 61 62 #define DRV_NAME "pm80xx" 63 #define DRV_VERSION "0.1.40" 64 #define PM8001_FAIL_LOGGING 0x01 /* Error message logging */ 65 #define PM8001_INIT_LOGGING 0x02 /* driver init logging */ 66 #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */ 67 #define PM8001_IO_LOGGING 0x08 /* I/O path logging */ 68 #define PM8001_EH_LOGGING 0x10 /* libsas EH function logging*/ 69 #define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */ 70 #define PM8001_MSG_LOGGING 0x40 /* misc message logging */ 71 #define PM8001_DEV_LOGGING 0x80 /* development message logging */ 72 #define PM8001_DEVIO_LOGGING 0x100 /* development io message logging */ 73 #define PM8001_IOERR_LOGGING 0x200 /* development io err message logging */ 74 75 #define pm8001_info(HBA, fmt, ...) \ 76 pr_info("%s:: %s %d: " fmt, \ 77 (HBA)->name, __func__, __LINE__, ##__VA_ARGS__) 78 79 #define pm8001_dbg(HBA, level, fmt, ...) \ 80 do { \ 81 if (unlikely((HBA)->logging_level & PM8001_##level##_LOGGING)) \ 82 pm8001_info(HBA, fmt, ##__VA_ARGS__); \ 83 } while (0) 84 85 #define PM8001_USE_TASKLET 86 #define PM8001_USE_MSIX 87 #define PM8001_READ_VPD 88 89 90 #define IS_SPCV_12G(dev) ((dev->device == 0X8074) \ 91 || (dev->device == 0X8076) \ 92 || (dev->device == 0X8077) \ 93 || (dev->device == 0X8070) \ 94 || (dev->device == 0X8072)) 95 96 #define PM8001_NAME_LENGTH 32/* generic length of strings */ 97 extern struct list_head hba_list; 98 extern const struct pm8001_dispatch pm8001_8001_dispatch; 99 extern const struct pm8001_dispatch pm8001_80xx_dispatch; 100 101 struct pm8001_hba_info; 102 struct pm8001_ccb_info; 103 struct pm8001_device; 104 105 struct pm8001_ioctl_payload { 106 u32 signature; 107 u16 major_function; 108 u16 minor_function; 109 u16 status; 110 u16 offset; 111 u16 id; 112 u32 wr_length; 113 u32 rd_length; 114 u8 *func_specific; 115 }; 116 117 #define MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF 118 #define MPI_FATAL_ERROR_TABLE_SIZE(value) ((0xFF000000 & value) >> SHIFT24) 119 #define MPI_FATAL_EDUMP_TABLE_LO_OFFSET 0x00 /* HNFBUFL */ 120 #define MPI_FATAL_EDUMP_TABLE_HI_OFFSET 0x04 /* HNFBUFH */ 121 #define MPI_FATAL_EDUMP_TABLE_LENGTH 0x08 /* HNFBLEN */ 122 #define MPI_FATAL_EDUMP_TABLE_HANDSHAKE 0x0C /* FDDHSHK */ 123 #define MPI_FATAL_EDUMP_TABLE_STATUS 0x10 /* FDDTSTAT */ 124 #define MPI_FATAL_EDUMP_TABLE_ACCUM_LEN 0x14 /* ACCDDLEN */ 125 #define MPI_FATAL_EDUMP_TABLE_TOTAL_LEN 0x18 /* TOTALLEN */ 126 #define MPI_FATAL_EDUMP_TABLE_SIGNATURE 0x1C /* SIGNITURE */ 127 #define MPI_FATAL_EDUMP_HANDSHAKE_RDY 0x1 128 #define MPI_FATAL_EDUMP_HANDSHAKE_BUSY 0x0 129 #define MPI_FATAL_EDUMP_TABLE_STAT_RSVD 0x0 130 #define MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED 0x1 131 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2 132 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE 0x3 133 #define TYPE_GSM_SPACE 1 134 #define TYPE_QUEUE 2 135 #define TYPE_FATAL 3 136 #define TYPE_NON_FATAL 4 137 #define TYPE_INBOUND 1 138 #define TYPE_OUTBOUND 2 139 struct forensic_data { 140 u32 data_type; 141 union { 142 struct { 143 u32 direct_len; 144 u32 direct_offset; 145 void *direct_data; 146 } gsm_buf; 147 struct { 148 u16 queue_type; 149 u16 queue_index; 150 u32 direct_len; 151 void *direct_data; 152 } queue_buf; 153 struct { 154 u32 direct_len; 155 u32 direct_offset; 156 u32 read_len; 157 void *direct_data; 158 } data_buf; 159 }; 160 }; 161 162 /* bit31-26 - mask bar */ 163 #define SCRATCH_PAD0_BAR_MASK 0xFC000000 164 /* bit25-0 - offset mask */ 165 #define SCRATCH_PAD0_OFFSET_MASK 0x03FFFFFF 166 /* if AAP error state */ 167 #define SCRATCH_PAD0_AAPERR_MASK 0xFFFFFFFF 168 /* Inbound doorbell bit7 */ 169 #define SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP 0x80 170 /* Inbound doorbell bit7 SPCV */ 171 #define SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO 0x80 172 #define MAIN_MERRDCTO_MERRDCES 0xA0/* DWORD 0x28) */ 173 174 struct pm8001_dispatch { 175 char *name; 176 int (*chip_init)(struct pm8001_hba_info *pm8001_ha); 177 void (*chip_post_init)(struct pm8001_hba_info *pm8001_ha); 178 int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha); 179 void (*chip_rst)(struct pm8001_hba_info *pm8001_ha); 180 int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha); 181 void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha); 182 irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec); 183 u32 (*is_our_interrupt)(struct pm8001_hba_info *pm8001_ha); 184 int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec); 185 void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec); 186 void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec); 187 void (*make_prd)(struct scatterlist *scatter, int nr, void *prd); 188 int (*smp_req)(struct pm8001_hba_info *pm8001_ha, 189 struct pm8001_ccb_info *ccb); 190 int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha, 191 struct pm8001_ccb_info *ccb); 192 int (*sata_req)(struct pm8001_hba_info *pm8001_ha, 193 struct pm8001_ccb_info *ccb); 194 int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id); 195 int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id); 196 int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha, 197 struct pm8001_device *pm8001_dev, u32 flag); 198 int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id); 199 int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha, 200 u32 phy_id, u32 phy_op); 201 int (*task_abort)(struct pm8001_hba_info *pm8001_ha, 202 struct pm8001_ccb_info *ccb); 203 int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha, 204 struct pm8001_ccb_info *ccb, struct sas_tmf_task *tmf); 205 int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload); 206 int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload); 207 int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha, 208 void *payload); 209 int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha, 210 struct pm8001_device *pm8001_dev, u32 state); 211 int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha, 212 u32 state); 213 int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha, 214 u32 state); 215 int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha); 216 int (*fatal_errors)(struct pm8001_hba_info *pm8001_ha); 217 void (*hw_event_ack_req)(struct pm8001_hba_info *pm8001_ha, 218 u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, 219 u32 param1); 220 }; 221 222 struct pm8001_chip_info { 223 u32 encrypt; 224 u32 n_phy; 225 const struct pm8001_dispatch *dispatch; 226 }; 227 #define PM8001_CHIP_DISP (pm8001_ha->chip->dispatch) 228 229 struct pm8001_port { 230 struct asd_sas_port sas_port; 231 u8 port_attached; 232 u16 wide_port_phymap; 233 u8 port_state; 234 u8 port_id; 235 struct list_head list; 236 }; 237 238 struct pm8001_phy { 239 struct pm8001_hba_info *pm8001_ha; 240 struct pm8001_port *port; 241 struct asd_sas_phy sas_phy; 242 struct sas_identify identify; 243 struct scsi_device *sdev; 244 u64 dev_sas_addr; 245 u32 phy_type; 246 struct completion *enable_completion; 247 u32 frame_rcvd_size; 248 u8 frame_rcvd[32]; 249 u8 phy_attached; 250 u8 phy_state; 251 enum sas_linkrate minimum_linkrate; 252 enum sas_linkrate maximum_linkrate; 253 struct completion *reset_completion; 254 bool port_reset_status; 255 bool reset_success; 256 }; 257 258 /* port reset status */ 259 #define PORT_RESET_SUCCESS 0x00 260 #define PORT_RESET_TMO 0x01 261 262 struct pm8001_device { 263 enum sas_device_type dev_type; 264 struct domain_device *sas_device; 265 u32 attached_phy; 266 u32 id; 267 struct completion *dcompletion; 268 struct completion *setds_completion; 269 u32 device_id; 270 atomic_t running_req; 271 }; 272 273 struct pm8001_prd_imt { 274 __le32 len; 275 __le32 e; 276 }; 277 278 struct pm8001_prd { 279 __le64 addr; /* 64-bit buffer address */ 280 struct pm8001_prd_imt im_len; /* 64-bit length */ 281 } __attribute__ ((packed)); 282 /* 283 * CCB(Command Control Block) 284 */ 285 struct pm8001_ccb_info { 286 struct sas_task *task; 287 u32 n_elem; 288 u32 ccb_tag; 289 dma_addr_t ccb_dma_handle; 290 struct pm8001_device *device; 291 struct pm8001_prd *buf_prd; 292 struct fw_control_ex *fw_control_context; 293 u8 open_retry; 294 }; 295 296 struct mpi_mem { 297 void *virt_ptr; 298 dma_addr_t phys_addr; 299 u32 phys_addr_hi; 300 u32 phys_addr_lo; 301 u32 total_len; 302 u32 num_elements; 303 u32 element_size; 304 u32 alignment; 305 }; 306 307 struct mpi_mem_req { 308 /* The number of element in the mpiMemory array */ 309 u32 count; 310 /* The array of structures that define memroy regions*/ 311 struct mpi_mem region[USI_MAX_MEMCNT]; 312 }; 313 314 struct encrypt { 315 u32 cipher_mode; 316 u32 sec_mode; 317 u32 status; 318 u32 flag; 319 }; 320 321 struct sas_phy_attribute_table { 322 u32 phystart1_16[16]; 323 u32 outbound_hw_event_pid1_16[16]; 324 }; 325 326 union main_cfg_table { 327 struct { 328 u32 signature; 329 u32 interface_rev; 330 u32 firmware_rev; 331 u32 max_out_io; 332 u32 max_sgl; 333 u32 ctrl_cap_flag; 334 u32 gst_offset; 335 u32 inbound_queue_offset; 336 u32 outbound_queue_offset; 337 u32 inbound_q_nppd_hppd; 338 u32 outbound_hw_event_pid0_3; 339 u32 outbound_hw_event_pid4_7; 340 u32 outbound_ncq_event_pid0_3; 341 u32 outbound_ncq_event_pid4_7; 342 u32 outbound_tgt_ITNexus_event_pid0_3; 343 u32 outbound_tgt_ITNexus_event_pid4_7; 344 u32 outbound_tgt_ssp_event_pid0_3; 345 u32 outbound_tgt_ssp_event_pid4_7; 346 u32 outbound_tgt_smp_event_pid0_3; 347 u32 outbound_tgt_smp_event_pid4_7; 348 u32 upper_event_log_addr; 349 u32 lower_event_log_addr; 350 u32 event_log_size; 351 u32 event_log_option; 352 u32 upper_iop_event_log_addr; 353 u32 lower_iop_event_log_addr; 354 u32 iop_event_log_size; 355 u32 iop_event_log_option; 356 u32 fatal_err_interrupt; 357 u32 fatal_err_dump_offset0; 358 u32 fatal_err_dump_length0; 359 u32 fatal_err_dump_offset1; 360 u32 fatal_err_dump_length1; 361 u32 hda_mode_flag; 362 u32 anolog_setup_table_offset; 363 u32 rsvd[4]; 364 } pm8001_tbl; 365 366 struct { 367 u32 signature; 368 u32 interface_rev; 369 u32 firmware_rev; 370 u32 max_out_io; 371 u32 max_sgl; 372 u32 ctrl_cap_flag; 373 u32 gst_offset; 374 u32 inbound_queue_offset; 375 u32 outbound_queue_offset; 376 u32 inbound_q_nppd_hppd; 377 u32 rsvd[8]; 378 u32 crc_core_dump; 379 u32 rsvd1; 380 u32 upper_event_log_addr; 381 u32 lower_event_log_addr; 382 u32 event_log_size; 383 u32 event_log_severity; 384 u32 upper_pcs_event_log_addr; 385 u32 lower_pcs_event_log_addr; 386 u32 pcs_event_log_size; 387 u32 pcs_event_log_severity; 388 u32 fatal_err_interrupt; 389 u32 fatal_err_dump_offset0; 390 u32 fatal_err_dump_length0; 391 u32 fatal_err_dump_offset1; 392 u32 fatal_err_dump_length1; 393 u32 gpio_led_mapping; 394 u32 analog_setup_table_offset; 395 u32 int_vec_table_offset; 396 u32 phy_attr_table_offset; 397 u32 port_recovery_timer; 398 u32 interrupt_reassertion_delay; 399 u32 fatal_n_non_fatal_dump; /* 0x28 */ 400 u32 ila_version; 401 u32 inc_fw_version; 402 } pm80xx_tbl; 403 }; 404 405 union general_status_table { 406 struct { 407 u32 gst_len_mpistate; 408 u32 iq_freeze_state0; 409 u32 iq_freeze_state1; 410 u32 msgu_tcnt; 411 u32 iop_tcnt; 412 u32 rsvd; 413 u32 phy_state[8]; 414 u32 gpio_input_val; 415 u32 rsvd1[2]; 416 u32 recover_err_info[8]; 417 } pm8001_tbl; 418 struct { 419 u32 gst_len_mpistate; 420 u32 iq_freeze_state0; 421 u32 iq_freeze_state1; 422 u32 msgu_tcnt; 423 u32 iop_tcnt; 424 u32 rsvd[9]; 425 u32 gpio_input_val; 426 u32 rsvd1[2]; 427 u32 recover_err_info[8]; 428 } pm80xx_tbl; 429 }; 430 struct inbound_queue_table { 431 u32 element_pri_size_cnt; 432 u32 upper_base_addr; 433 u32 lower_base_addr; 434 u32 ci_upper_base_addr; 435 u32 ci_lower_base_addr; 436 u32 pi_pci_bar; 437 u32 pi_offset; 438 u32 total_length; 439 void *base_virt; 440 void *ci_virt; 441 u32 reserved; 442 __le32 consumer_index; 443 u32 producer_idx; 444 spinlock_t iq_lock; 445 }; 446 struct outbound_queue_table { 447 u32 element_size_cnt; 448 u32 upper_base_addr; 449 u32 lower_base_addr; 450 void *base_virt; 451 u32 pi_upper_base_addr; 452 u32 pi_lower_base_addr; 453 u32 ci_pci_bar; 454 u32 ci_offset; 455 u32 total_length; 456 void *pi_virt; 457 u32 interrup_vec_cnt_delay; 458 u32 dinterrup_to_pci_offset; 459 __le32 producer_index; 460 u32 consumer_idx; 461 spinlock_t oq_lock; 462 unsigned long lock_flags; 463 }; 464 struct pm8001_hba_memspace { 465 void __iomem *memvirtaddr; 466 u64 membase; 467 u32 memsize; 468 }; 469 struct isr_param { 470 struct pm8001_hba_info *drv_inst; 471 u32 irq_id; 472 }; 473 struct pm8001_hba_info { 474 char name[PM8001_NAME_LENGTH]; 475 struct list_head list; 476 unsigned long flags; 477 spinlock_t lock;/* host-wide lock */ 478 spinlock_t bitmap_lock; 479 struct pci_dev *pdev;/* our device */ 480 struct device *dev; 481 struct pm8001_hba_memspace io_mem[6]; 482 struct mpi_mem_req memoryMap; 483 struct encrypt encrypt_info; /* support encryption */ 484 struct forensic_data forensic_info; 485 u32 fatal_bar_loc; 486 u32 forensic_last_offset; 487 u32 fatal_forensic_shift_offset; 488 u32 forensic_fatal_step; 489 u32 forensic_preserved_accumulated_transfer; 490 u32 evtlog_ib_offset; 491 u32 evtlog_ob_offset; 492 void __iomem *msg_unit_tbl_addr;/*Message Unit Table Addr*/ 493 void __iomem *main_cfg_tbl_addr;/*Main Config Table Addr*/ 494 void __iomem *general_stat_tbl_addr;/*General Status Table Addr*/ 495 void __iomem *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/ 496 void __iomem *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/ 497 void __iomem *pspa_q_tbl_addr; 498 /*MPI SAS PHY attributes Queue Config Table Addr*/ 499 void __iomem *ivt_tbl_addr; /*MPI IVT Table Addr */ 500 void __iomem *fatal_tbl_addr; /*MPI IVT Table Addr */ 501 union main_cfg_table main_cfg_tbl; 502 union general_status_table gs_tbl; 503 struct inbound_queue_table inbnd_q_tbl[PM8001_MAX_INB_NUM]; 504 struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_OUTB_NUM]; 505 struct sas_phy_attribute_table phy_attr_table; 506 /* MPI SAS PHY attributes */ 507 u8 sas_addr[SAS_ADDR_SIZE]; 508 struct sas_ha_struct *sas;/* SCSI/SAS glue */ 509 struct Scsi_Host *shost; 510 u32 chip_id; 511 const struct pm8001_chip_info *chip; 512 struct completion *nvmd_completion; 513 unsigned long *rsvd_tags; 514 struct pm8001_phy phy[PM8001_MAX_PHYS]; 515 struct pm8001_port port[PM8001_MAX_PHYS]; 516 u32 id; 517 u32 irq; 518 u32 iomb_size; /* SPC and SPCV IOMB size */ 519 struct pm8001_device *devices; 520 struct pm8001_ccb_info *ccb_info; 521 u32 ccb_count; 522 #ifdef PM8001_USE_MSIX 523 int number_of_intr;/*will be used in remove()*/ 524 char intr_drvname[PM8001_MAX_MSIX_VEC] 525 [PM8001_NAME_LENGTH+1+3+1]; 526 #endif 527 #ifdef PM8001_USE_TASKLET 528 struct tasklet_struct tasklet[PM8001_MAX_MSIX_VEC]; 529 #endif 530 u32 logging_level; 531 u32 link_rate; 532 u32 fw_status; 533 u32 smp_exp_mode; 534 bool controller_fatal_error; 535 const struct firmware *fw_image; 536 struct isr_param irq_vector[PM8001_MAX_MSIX_VEC]; 537 u32 non_fatal_count; 538 u32 non_fatal_read_length; 539 u32 max_q_num; 540 u32 ib_offset; 541 u32 ob_offset; 542 u32 ci_offset; 543 u32 pi_offset; 544 u32 max_memcnt; 545 }; 546 547 struct pm8001_work { 548 struct work_struct work; 549 struct pm8001_hba_info *pm8001_ha; 550 void *data; 551 int handler; 552 }; 553 554 struct pm8001_fw_image_header { 555 u8 vender_id[8]; 556 u8 product_id; 557 u8 hardware_rev; 558 u8 dest_partition; 559 u8 reserved; 560 u8 fw_rev[4]; 561 __be32 image_length; 562 __be32 image_crc; 563 __be32 startup_entry; 564 } __attribute__((packed, aligned(4))); 565 566 567 /** 568 * FW Flash Update status values 569 */ 570 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00 571 #define FLASH_UPDATE_IN_PROGRESS 0x01 572 #define FLASH_UPDATE_HDR_ERR 0x02 573 #define FLASH_UPDATE_OFFSET_ERR 0x03 574 #define FLASH_UPDATE_CRC_ERR 0x04 575 #define FLASH_UPDATE_LENGTH_ERR 0x05 576 #define FLASH_UPDATE_HW_ERR 0x06 577 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10 578 #define FLASH_UPDATE_DISABLED 0x11 579 580 /* Device states */ 581 #define DS_OPERATIONAL 0x01 582 #define DS_PORT_IN_RESET 0x02 583 #define DS_IN_RECOVERY 0x03 584 #define DS_IN_ERROR 0x04 585 #define DS_NON_OPERATIONAL 0x07 586 587 /** 588 * brief param structure for firmware flash update. 589 */ 590 struct fw_flash_updata_info { 591 u32 cur_image_offset; 592 u32 cur_image_len; 593 u32 total_image_len; 594 struct pm8001_prd sgl; 595 }; 596 597 struct fw_control_info { 598 u32 retcode;/*ret code (status)*/ 599 u32 phase;/*ret code phase*/ 600 u32 phaseCmplt;/*percent complete for the current 601 update phase */ 602 u32 version;/*Hex encoded firmware version number*/ 603 u32 offset;/*Used for downloading firmware */ 604 u32 len; /*len of buffer*/ 605 u32 size;/* Used in OS VPD and Trace get size 606 operations.*/ 607 u32 reserved;/* padding required for 64 bit 608 alignment */ 609 u8 buffer[];/* Start of buffer */ 610 }; 611 struct fw_control_ex { 612 struct fw_control_info *fw_control; 613 void *buffer;/* keep buffer pointer to be 614 freed when the response comes*/ 615 void *virtAddr;/* keep virtual address of the data */ 616 void *usrAddr;/* keep virtual address of the 617 user data */ 618 dma_addr_t phys_addr; 619 u32 len; /* len of buffer */ 620 void *payload; /* pointer to IOCTL Payload */ 621 u8 inProgress;/*if 1 - the IOCTL request is in 622 progress */ 623 void *param1; 624 void *param2; 625 void *param3; 626 }; 627 628 /* pm8001 workqueue */ 629 extern struct workqueue_struct *pm8001_wq; 630 631 /******************** function prototype *********************/ 632 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out); 633 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag); 634 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha, 635 struct pm8001_ccb_info *ccb); 636 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, 637 void *funcdata); 638 void pm8001_scan_start(struct Scsi_Host *shost); 639 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time); 640 int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags); 641 int pm8001_abort_task(struct sas_task *task); 642 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun); 643 int pm8001_dev_found(struct domain_device *dev); 644 void pm8001_dev_gone(struct domain_device *dev); 645 int pm8001_lu_reset(struct domain_device *dev, u8 *lun); 646 int pm8001_I_T_nexus_reset(struct domain_device *dev); 647 int pm8001_I_T_nexus_event_handler(struct domain_device *dev); 648 int pm8001_query_task(struct sas_task *task); 649 void pm8001_port_formed(struct asd_sas_phy *sas_phy); 650 void pm8001_open_reject_retry( 651 struct pm8001_hba_info *pm8001_ha, 652 struct sas_task *task_to_close, 653 struct pm8001_device *device_to_close); 654 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr, 655 dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo, 656 u32 mem_size, u32 align); 657 658 void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha); 659 int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha, 660 u32 q_index, u32 opCode, void *payload, size_t nb, 661 u32 responseQueue); 662 int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ, 663 u16 messageSize, void **messagePtr); 664 u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg, 665 struct outbound_queue_table *circularQ, u8 bc); 666 u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha, 667 struct outbound_queue_table *circularQ, 668 void **messagePtr1, u8 *pBC); 669 int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha, 670 struct pm8001_device *pm8001_dev, u32 state); 671 int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha, 672 void *payload); 673 int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha, 674 void *fw_flash_updata_info, u32 tag); 675 int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload); 676 int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload); 677 int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha, 678 struct pm8001_ccb_info *ccb, 679 struct sas_tmf_task *tmf); 680 int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha, 681 struct pm8001_ccb_info *ccb); 682 int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id); 683 void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd); 684 void pm8001_work_fn(struct work_struct *work); 685 int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha, 686 void *data, int handler); 687 void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha, 688 void *piomb); 689 void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha, 690 void *piomb); 691 void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha, 692 void *piomb); 693 int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha, 694 void *piomb); 695 void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate); 696 void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr); 697 void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i); 698 int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb); 699 int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb); 700 int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha, 701 void *piomb); 702 int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha, void *piomb); 703 int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb); 704 struct sas_task *pm8001_alloc_task(void); 705 void pm8001_free_task(struct sas_task *task); 706 void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag); 707 struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha, 708 u32 device_id); 709 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha); 710 711 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue); 712 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 713 u32 length, u8 *buf); 714 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 715 u32 phy, u32 length, u32 *buf); 716 int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue); 717 ssize_t pm80xx_get_fatal_dump(struct device *cdev, 718 struct device_attribute *attr, char *buf); 719 ssize_t pm80xx_get_non_fatal_dump(struct device *cdev, 720 struct device_attribute *attr, char *buf); 721 ssize_t pm8001_get_gsm_dump(struct device *cdev, u32, char *buf); 722 int pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha); 723 void pm8001_free_dev(struct pm8001_device *pm8001_dev); 724 /* ctl shared API */ 725 extern const struct attribute_group *pm8001_host_groups[]; 726 727 #define PM8001_INVALID_TAG ((u32)-1) 728 729 /* 730 * Allocate a new tag and return the corresponding ccb after initializing it. 731 */ 732 static inline struct pm8001_ccb_info * 733 pm8001_ccb_alloc(struct pm8001_hba_info *pm8001_ha, 734 struct pm8001_device *dev, struct sas_task *task) 735 { 736 struct pm8001_ccb_info *ccb; 737 struct request *rq = NULL; 738 u32 tag; 739 740 if (task) 741 rq = sas_task_find_rq(task); 742 743 if (rq) { 744 tag = rq->tag + PM8001_RESERVE_SLOT; 745 } else if (pm8001_tag_alloc(pm8001_ha, &tag)) { 746 pm8001_dbg(pm8001_ha, FAIL, "Failed to allocate a tag\n"); 747 return NULL; 748 } 749 750 ccb = &pm8001_ha->ccb_info[tag]; 751 ccb->task = task; 752 ccb->n_elem = 0; 753 ccb->ccb_tag = tag; 754 ccb->device = dev; 755 ccb->fw_control_context = NULL; 756 ccb->open_retry = 0; 757 758 return ccb; 759 } 760 761 /* 762 * Free the tag of an initialized ccb. 763 */ 764 static inline void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, 765 struct pm8001_ccb_info *ccb) 766 { 767 u32 tag = ccb->ccb_tag; 768 769 /* 770 * Cleanup the ccb to make sure that a manual scan of the adapter 771 * ccb_info array can detect ccb's that are in use. 772 * C.f. pm8001_open_reject_retry() 773 */ 774 ccb->task = NULL; 775 ccb->ccb_tag = PM8001_INVALID_TAG; 776 ccb->device = NULL; 777 ccb->fw_control_context = NULL; 778 779 pm8001_tag_free(pm8001_ha, tag); 780 } 781 782 static inline void pm8001_ccb_task_free_done(struct pm8001_hba_info *pm8001_ha, 783 struct pm8001_ccb_info *ccb) 784 { 785 struct sas_task *task = ccb->task; 786 787 pm8001_ccb_task_free(pm8001_ha, ccb); 788 smp_mb(); /*in order to force CPU ordering*/ 789 task->task_done(task); 790 } 791 void pm8001_setds_completion(struct domain_device *dev); 792 void pm8001_tmf_aborted(struct sas_task *task); 793 794 #endif 795 796