1dbf9bfe6Sjack wang /* 2e5742101SSakthivel K * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver 3dbf9bfe6Sjack wang * 4dbf9bfe6Sjack wang * Copyright (c) 2008-2009 USI Co., Ltd. 5dbf9bfe6Sjack wang * All rights reserved. 6dbf9bfe6Sjack wang * 7dbf9bfe6Sjack wang * Redistribution and use in source and binary forms, with or without 8dbf9bfe6Sjack wang * modification, are permitted provided that the following conditions 9dbf9bfe6Sjack wang * are met: 10dbf9bfe6Sjack wang * 1. Redistributions of source code must retain the above copyright 11dbf9bfe6Sjack wang * notice, this list of conditions, and the following disclaimer, 12dbf9bfe6Sjack wang * without modification. 13dbf9bfe6Sjack wang * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14dbf9bfe6Sjack wang * substantially similar to the "NO WARRANTY" disclaimer below 15dbf9bfe6Sjack wang * ("Disclaimer") and any redistribution must be conditioned upon 16dbf9bfe6Sjack wang * including a substantially similar Disclaimer requirement for further 17dbf9bfe6Sjack wang * binary redistribution. 18dbf9bfe6Sjack wang * 3. Neither the names of the above-listed copyright holders nor the names 19dbf9bfe6Sjack wang * of any contributors may be used to endorse or promote products derived 20dbf9bfe6Sjack wang * from this software without specific prior written permission. 21dbf9bfe6Sjack wang * 22dbf9bfe6Sjack wang * Alternatively, this software may be distributed under the terms of the 23dbf9bfe6Sjack wang * GNU General Public License ("GPL") version 2 as published by the Free 24dbf9bfe6Sjack wang * Software Foundation. 25dbf9bfe6Sjack wang * 26dbf9bfe6Sjack wang * NO WARRANTY 27dbf9bfe6Sjack wang * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28dbf9bfe6Sjack wang * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29dbf9bfe6Sjack wang * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30dbf9bfe6Sjack wang * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31dbf9bfe6Sjack wang * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32dbf9bfe6Sjack wang * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33dbf9bfe6Sjack wang * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34dbf9bfe6Sjack wang * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35dbf9bfe6Sjack wang * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36dbf9bfe6Sjack wang * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37dbf9bfe6Sjack wang * POSSIBILITY OF SUCH DAMAGES. 38dbf9bfe6Sjack wang * 39dbf9bfe6Sjack wang */ 40dbf9bfe6Sjack wang 415a0e3ad6STejun Heo #include <linux/slab.h> 42dbf9bfe6Sjack wang #include "pm8001_sas.h" 43dbf9bfe6Sjack wang #include "pm8001_chips.h" 44dbf9bfe6Sjack wang 45dbf9bfe6Sjack wang static struct scsi_transport_template *pm8001_stt; 46dbf9bfe6Sjack wang 47e5742101SSakthivel K /** 48e5742101SSakthivel K * chip info structure to identify chip key functionality as 49e5742101SSakthivel K * encryption available/not, no of ports, hw specific function ref 50e5742101SSakthivel K */ 51dbf9bfe6Sjack wang static const struct pm8001_chip_info pm8001_chips[] = { 52e5742101SSakthivel K [chip_8001] = {0, 8, &pm8001_8001_dispatch,}, 53dbf9bfe6Sjack wang }; 54dbf9bfe6Sjack wang static int pm8001_id; 55dbf9bfe6Sjack wang 56dbf9bfe6Sjack wang LIST_HEAD(hba_list); 57dbf9bfe6Sjack wang 58429305e4STejun Heo struct workqueue_struct *pm8001_wq; 59429305e4STejun Heo 60dbf9bfe6Sjack wang /** 61dbf9bfe6Sjack wang * The main structure which LLDD must register for scsi core. 62dbf9bfe6Sjack wang */ 63dbf9bfe6Sjack wang static struct scsi_host_template pm8001_sht = { 64dbf9bfe6Sjack wang .module = THIS_MODULE, 65dbf9bfe6Sjack wang .name = DRV_NAME, 66dbf9bfe6Sjack wang .queuecommand = sas_queuecommand, 67dbf9bfe6Sjack wang .target_alloc = sas_target_alloc, 6811e16364SDan Williams .slave_configure = sas_slave_configure, 69dbf9bfe6Sjack wang .scan_finished = pm8001_scan_finished, 70dbf9bfe6Sjack wang .scan_start = pm8001_scan_start, 71dbf9bfe6Sjack wang .change_queue_depth = sas_change_queue_depth, 72dbf9bfe6Sjack wang .change_queue_type = sas_change_queue_type, 73dbf9bfe6Sjack wang .bios_param = sas_bios_param, 74dbf9bfe6Sjack wang .can_queue = 1, 75dbf9bfe6Sjack wang .cmd_per_lun = 1, 76dbf9bfe6Sjack wang .this_id = -1, 77dbf9bfe6Sjack wang .sg_tablesize = SG_ALL, 78dbf9bfe6Sjack wang .max_sectors = SCSI_DEFAULT_MAX_SECTORS, 79dbf9bfe6Sjack wang .use_clustering = ENABLE_CLUSTERING, 80dbf9bfe6Sjack wang .eh_device_reset_handler = sas_eh_device_reset_handler, 81dbf9bfe6Sjack wang .eh_bus_reset_handler = sas_eh_bus_reset_handler, 82dbf9bfe6Sjack wang .target_destroy = sas_target_destroy, 83dbf9bfe6Sjack wang .ioctl = sas_ioctl, 84dbf9bfe6Sjack wang .shost_attrs = pm8001_host_attrs, 85dbf9bfe6Sjack wang }; 86dbf9bfe6Sjack wang 87dbf9bfe6Sjack wang /** 88dbf9bfe6Sjack wang * Sas layer call this function to execute specific task. 89dbf9bfe6Sjack wang */ 90dbf9bfe6Sjack wang static struct sas_domain_function_template pm8001_transport_ops = { 91dbf9bfe6Sjack wang .lldd_dev_found = pm8001_dev_found, 92dbf9bfe6Sjack wang .lldd_dev_gone = pm8001_dev_gone, 93dbf9bfe6Sjack wang 94dbf9bfe6Sjack wang .lldd_execute_task = pm8001_queue_command, 95dbf9bfe6Sjack wang .lldd_control_phy = pm8001_phy_control, 96dbf9bfe6Sjack wang 97dbf9bfe6Sjack wang .lldd_abort_task = pm8001_abort_task, 98dbf9bfe6Sjack wang .lldd_abort_task_set = pm8001_abort_task_set, 99dbf9bfe6Sjack wang .lldd_clear_aca = pm8001_clear_aca, 100dbf9bfe6Sjack wang .lldd_clear_task_set = pm8001_clear_task_set, 101dbf9bfe6Sjack wang .lldd_I_T_nexus_reset = pm8001_I_T_nexus_reset, 102dbf9bfe6Sjack wang .lldd_lu_reset = pm8001_lu_reset, 103dbf9bfe6Sjack wang .lldd_query_task = pm8001_query_task, 104dbf9bfe6Sjack wang }; 105dbf9bfe6Sjack wang 106dbf9bfe6Sjack wang /** 107dbf9bfe6Sjack wang *pm8001_phy_init - initiate our adapter phys 108dbf9bfe6Sjack wang *@pm8001_ha: our hba structure. 109dbf9bfe6Sjack wang *@phy_id: phy id. 110dbf9bfe6Sjack wang */ 1116f039790SGreg Kroah-Hartman static void pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, int phy_id) 112dbf9bfe6Sjack wang { 113dbf9bfe6Sjack wang struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 114dbf9bfe6Sjack wang struct asd_sas_phy *sas_phy = &phy->sas_phy; 115dbf9bfe6Sjack wang phy->phy_state = 0; 116dbf9bfe6Sjack wang phy->pm8001_ha = pm8001_ha; 117dbf9bfe6Sjack wang sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; 118dbf9bfe6Sjack wang sas_phy->class = SAS; 119dbf9bfe6Sjack wang sas_phy->iproto = SAS_PROTOCOL_ALL; 120dbf9bfe6Sjack wang sas_phy->tproto = 0; 121dbf9bfe6Sjack wang sas_phy->type = PHY_TYPE_PHYSICAL; 122dbf9bfe6Sjack wang sas_phy->role = PHY_ROLE_INITIATOR; 123dbf9bfe6Sjack wang sas_phy->oob_mode = OOB_NOT_CONNECTED; 124dbf9bfe6Sjack wang sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; 125dbf9bfe6Sjack wang sas_phy->id = phy_id; 126dbf9bfe6Sjack wang sas_phy->sas_addr = &pm8001_ha->sas_addr[0]; 127dbf9bfe6Sjack wang sas_phy->frame_rcvd = &phy->frame_rcvd[0]; 128dbf9bfe6Sjack wang sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; 129dbf9bfe6Sjack wang sas_phy->lldd_phy = phy; 130dbf9bfe6Sjack wang } 131dbf9bfe6Sjack wang 132dbf9bfe6Sjack wang /** 133dbf9bfe6Sjack wang *pm8001_free - free hba 134dbf9bfe6Sjack wang *@pm8001_ha: our hba structure. 135dbf9bfe6Sjack wang * 136dbf9bfe6Sjack wang */ 137dbf9bfe6Sjack wang static void pm8001_free(struct pm8001_hba_info *pm8001_ha) 138dbf9bfe6Sjack wang { 139dbf9bfe6Sjack wang int i; 140dbf9bfe6Sjack wang 141dbf9bfe6Sjack wang if (!pm8001_ha) 142dbf9bfe6Sjack wang return; 143dbf9bfe6Sjack wang 144dbf9bfe6Sjack wang for (i = 0; i < USI_MAX_MEMCNT; i++) { 145dbf9bfe6Sjack wang if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { 146dbf9bfe6Sjack wang pci_free_consistent(pm8001_ha->pdev, 147bfb4809fSSakthivel K (pm8001_ha->memoryMap.region[i].total_len + 148bfb4809fSSakthivel K pm8001_ha->memoryMap.region[i].alignment), 149dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].virt_ptr, 150dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].phys_addr); 151dbf9bfe6Sjack wang } 152dbf9bfe6Sjack wang } 153dbf9bfe6Sjack wang PM8001_CHIP_DISP->chip_iounmap(pm8001_ha); 154dbf9bfe6Sjack wang if (pm8001_ha->shost) 155dbf9bfe6Sjack wang scsi_host_put(pm8001_ha->shost); 156429305e4STejun Heo flush_workqueue(pm8001_wq); 157dbf9bfe6Sjack wang kfree(pm8001_ha->tags); 158dbf9bfe6Sjack wang kfree(pm8001_ha); 159dbf9bfe6Sjack wang } 160dbf9bfe6Sjack wang 161dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 162dbf9bfe6Sjack wang static void pm8001_tasklet(unsigned long opaque) 163dbf9bfe6Sjack wang { 164dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 1656eab04a8SJustin P. Mattock pm8001_ha = (struct pm8001_hba_info *)opaque; 166dbf9bfe6Sjack wang if (unlikely(!pm8001_ha)) 167dbf9bfe6Sjack wang BUG_ON(1); 168dbf9bfe6Sjack wang PM8001_CHIP_DISP->isr(pm8001_ha); 169dbf9bfe6Sjack wang } 170dbf9bfe6Sjack wang #endif 171dbf9bfe6Sjack wang 172dbf9bfe6Sjack wang 173dbf9bfe6Sjack wang /** 174dbf9bfe6Sjack wang * pm8001_interrupt - when HBA originate a interrupt,we should invoke this 175dbf9bfe6Sjack wang * dispatcher to handle each case. 176dbf9bfe6Sjack wang * @irq: irq number. 177dbf9bfe6Sjack wang * @opaque: the passed general host adapter struct 178dbf9bfe6Sjack wang */ 179dbf9bfe6Sjack wang static irqreturn_t pm8001_interrupt(int irq, void *opaque) 180dbf9bfe6Sjack wang { 181dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 182dbf9bfe6Sjack wang irqreturn_t ret = IRQ_HANDLED; 183dbf9bfe6Sjack wang struct sas_ha_struct *sha = opaque; 184dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 185dbf9bfe6Sjack wang if (unlikely(!pm8001_ha)) 186dbf9bfe6Sjack wang return IRQ_NONE; 187dbf9bfe6Sjack wang if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha)) 188dbf9bfe6Sjack wang return IRQ_NONE; 189dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 190dbf9bfe6Sjack wang tasklet_schedule(&pm8001_ha->tasklet); 191dbf9bfe6Sjack wang #else 192dbf9bfe6Sjack wang ret = PM8001_CHIP_DISP->isr(pm8001_ha); 193dbf9bfe6Sjack wang #endif 194dbf9bfe6Sjack wang return ret; 195dbf9bfe6Sjack wang } 196dbf9bfe6Sjack wang 197dbf9bfe6Sjack wang /** 198dbf9bfe6Sjack wang * pm8001_alloc - initiate our hba structure and 6 DMAs area. 199dbf9bfe6Sjack wang * @pm8001_ha:our hba structure. 200dbf9bfe6Sjack wang * 201dbf9bfe6Sjack wang */ 2026f039790SGreg Kroah-Hartman static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha) 203dbf9bfe6Sjack wang { 204dbf9bfe6Sjack wang int i; 205dbf9bfe6Sjack wang spin_lock_init(&pm8001_ha->lock); 2061cc943aeSjack wang for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 207dbf9bfe6Sjack wang pm8001_phy_init(pm8001_ha, i); 2081cc943aeSjack wang pm8001_ha->port[i].wide_port_phymap = 0; 2091cc943aeSjack wang pm8001_ha->port[i].port_attached = 0; 2101cc943aeSjack wang pm8001_ha->port[i].port_state = 0; 2111cc943aeSjack wang INIT_LIST_HEAD(&pm8001_ha->port[i].list); 2121cc943aeSjack wang } 213dbf9bfe6Sjack wang 21497ee2088Sjack_wang pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL); 21597ee2088Sjack_wang if (!pm8001_ha->tags) 21697ee2088Sjack_wang goto err_out; 217dbf9bfe6Sjack wang /* MPI Memory region 1 for AAP Event Log for fw */ 218dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].num_elements = 1; 219dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE; 220dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE; 221dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].alignment = 32; 222dbf9bfe6Sjack wang 223dbf9bfe6Sjack wang /* MPI Memory region 2 for IOP Event Log for fw */ 224dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].num_elements = 1; 225dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; 226dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; 227dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].alignment = 32; 228dbf9bfe6Sjack wang 229dbf9bfe6Sjack wang /* MPI Memory region 3 for consumer Index of inbound queues */ 230dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CI].num_elements = 1; 231dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CI].element_size = 4; 232dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CI].total_len = 4; 233dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CI].alignment = 4; 234dbf9bfe6Sjack wang 235dbf9bfe6Sjack wang /* MPI Memory region 4 for producer Index of outbound queues */ 236dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[PI].num_elements = 1; 237dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[PI].element_size = 4; 238dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[PI].total_len = 4; 239dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[PI].alignment = 4; 240dbf9bfe6Sjack wang 241dbf9bfe6Sjack wang /* MPI Memory region 5 inbound queues */ 24299c72ebcSMark Salyzyn pm8001_ha->memoryMap.region[IB].num_elements = PM8001_MPI_QUEUE; 243dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IB].element_size = 64; 24499c72ebcSMark Salyzyn pm8001_ha->memoryMap.region[IB].total_len = PM8001_MPI_QUEUE * 64; 245dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IB].alignment = 64; 246dbf9bfe6Sjack wang 24799c72ebcSMark Salyzyn /* MPI Memory region 6 outbound queues */ 24899c72ebcSMark Salyzyn pm8001_ha->memoryMap.region[OB].num_elements = PM8001_MPI_QUEUE; 249dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[OB].element_size = 64; 25099c72ebcSMark Salyzyn pm8001_ha->memoryMap.region[OB].total_len = PM8001_MPI_QUEUE * 64; 251dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[OB].alignment = 64; 252dbf9bfe6Sjack wang 253dbf9bfe6Sjack wang /* Memory region write DMA*/ 254dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[NVMD].num_elements = 1; 255dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[NVMD].element_size = 4096; 256dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[NVMD].total_len = 4096; 257dbf9bfe6Sjack wang /* Memory region for devices*/ 258dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1; 259dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES * 260dbf9bfe6Sjack wang sizeof(struct pm8001_device); 261dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES * 262dbf9bfe6Sjack wang sizeof(struct pm8001_device); 263dbf9bfe6Sjack wang 264dbf9bfe6Sjack wang /* Memory region for ccb_info*/ 265dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1; 266dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB * 267dbf9bfe6Sjack wang sizeof(struct pm8001_ccb_info); 268dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB * 269dbf9bfe6Sjack wang sizeof(struct pm8001_ccb_info); 270dbf9bfe6Sjack wang 271dbf9bfe6Sjack wang for (i = 0; i < USI_MAX_MEMCNT; i++) { 272dbf9bfe6Sjack wang if (pm8001_mem_alloc(pm8001_ha->pdev, 273dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].virt_ptr, 274dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].phys_addr, 275dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].phys_addr_hi, 276dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].phys_addr_lo, 277dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].total_len, 278dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].alignment) != 0) { 279dbf9bfe6Sjack wang PM8001_FAIL_DBG(pm8001_ha, 280dbf9bfe6Sjack wang pm8001_printk("Mem%d alloc failed\n", 281dbf9bfe6Sjack wang i)); 282dbf9bfe6Sjack wang goto err_out; 283dbf9bfe6Sjack wang } 284dbf9bfe6Sjack wang } 285dbf9bfe6Sjack wang 286dbf9bfe6Sjack wang pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr; 287dbf9bfe6Sjack wang for (i = 0; i < PM8001_MAX_DEVICES; i++) { 288dbf9bfe6Sjack wang pm8001_ha->devices[i].dev_type = NO_DEVICE; 289dbf9bfe6Sjack wang pm8001_ha->devices[i].id = i; 290dbf9bfe6Sjack wang pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES; 291dbf9bfe6Sjack wang pm8001_ha->devices[i].running_req = 0; 292dbf9bfe6Sjack wang } 293dbf9bfe6Sjack wang pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr; 294dbf9bfe6Sjack wang for (i = 0; i < PM8001_MAX_CCB; i++) { 295dbf9bfe6Sjack wang pm8001_ha->ccb_info[i].ccb_dma_handle = 296dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[CCB_MEM].phys_addr + 297dbf9bfe6Sjack wang i * sizeof(struct pm8001_ccb_info); 29897ee2088Sjack_wang pm8001_ha->ccb_info[i].task = NULL; 29997ee2088Sjack_wang pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff; 30097ee2088Sjack_wang pm8001_ha->ccb_info[i].device = NULL; 301dbf9bfe6Sjack wang ++pm8001_ha->tags_num; 302dbf9bfe6Sjack wang } 303dbf9bfe6Sjack wang pm8001_ha->flags = PM8001F_INIT_TIME; 304dbf9bfe6Sjack wang /* Initialize tags */ 305dbf9bfe6Sjack wang pm8001_tag_init(pm8001_ha); 306dbf9bfe6Sjack wang return 0; 307dbf9bfe6Sjack wang err_out: 308dbf9bfe6Sjack wang return 1; 309dbf9bfe6Sjack wang } 310dbf9bfe6Sjack wang 311dbf9bfe6Sjack wang /** 312dbf9bfe6Sjack wang * pm8001_ioremap - remap the pci high physical address to kernal virtual 313dbf9bfe6Sjack wang * address so that we can access them. 314dbf9bfe6Sjack wang * @pm8001_ha:our hba structure. 315dbf9bfe6Sjack wang */ 316dbf9bfe6Sjack wang static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha) 317dbf9bfe6Sjack wang { 318dbf9bfe6Sjack wang u32 bar; 319dbf9bfe6Sjack wang u32 logicalBar = 0; 320dbf9bfe6Sjack wang struct pci_dev *pdev; 321dbf9bfe6Sjack wang 322dbf9bfe6Sjack wang pdev = pm8001_ha->pdev; 323dbf9bfe6Sjack wang /* map pci mem (PMC pci base 0-3)*/ 324dbf9bfe6Sjack wang for (bar = 0; bar < 6; bar++) { 325dbf9bfe6Sjack wang /* 326dbf9bfe6Sjack wang ** logical BARs for SPC: 327dbf9bfe6Sjack wang ** bar 0 and 1 - logical BAR0 328dbf9bfe6Sjack wang ** bar 2 and 3 - logical BAR1 329dbf9bfe6Sjack wang ** bar4 - logical BAR2 330dbf9bfe6Sjack wang ** bar5 - logical BAR3 331dbf9bfe6Sjack wang ** Skip the appropriate assignments: 332dbf9bfe6Sjack wang */ 333dbf9bfe6Sjack wang if ((bar == 1) || (bar == 3)) 334dbf9bfe6Sjack wang continue; 335dbf9bfe6Sjack wang if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { 336dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].membase = 337dbf9bfe6Sjack wang pci_resource_start(pdev, bar); 338dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].membase &= 339dbf9bfe6Sjack wang (u32)PCI_BASE_ADDRESS_MEM_MASK; 340dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize = 341dbf9bfe6Sjack wang pci_resource_len(pdev, bar); 342dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memvirtaddr = 343dbf9bfe6Sjack wang ioremap(pm8001_ha->io_mem[logicalBar].membase, 344dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize); 345dbf9bfe6Sjack wang PM8001_INIT_DBG(pm8001_ha, 346dbf9bfe6Sjack wang pm8001_printk("PCI: bar %d, logicalBar %d " 347dbf9bfe6Sjack wang "virt_addr=%lx,len=%d\n", bar, logicalBar, 348dbf9bfe6Sjack wang (unsigned long) 349dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memvirtaddr, 350dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize)); 351dbf9bfe6Sjack wang } else { 352dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].membase = 0; 353dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize = 0; 354dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memvirtaddr = 0; 355dbf9bfe6Sjack wang } 356dbf9bfe6Sjack wang logicalBar++; 357dbf9bfe6Sjack wang } 358dbf9bfe6Sjack wang return 0; 359dbf9bfe6Sjack wang } 360dbf9bfe6Sjack wang 361dbf9bfe6Sjack wang /** 362dbf9bfe6Sjack wang * pm8001_pci_alloc - initialize our ha card structure 363dbf9bfe6Sjack wang * @pdev: pci device. 364dbf9bfe6Sjack wang * @ent: ent 365dbf9bfe6Sjack wang * @shost: scsi host struct which has been initialized before. 366dbf9bfe6Sjack wang */ 3676f039790SGreg Kroah-Hartman static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev, 3686f039790SGreg Kroah-Hartman u32 chip_id, 3696f039790SGreg Kroah-Hartman struct Scsi_Host *shost) 370dbf9bfe6Sjack wang { 371dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 372dbf9bfe6Sjack wang struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 373dbf9bfe6Sjack wang 374dbf9bfe6Sjack wang 375dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 376dbf9bfe6Sjack wang if (!pm8001_ha) 377dbf9bfe6Sjack wang return NULL; 378dbf9bfe6Sjack wang 379dbf9bfe6Sjack wang pm8001_ha->pdev = pdev; 380dbf9bfe6Sjack wang pm8001_ha->dev = &pdev->dev; 381dbf9bfe6Sjack wang pm8001_ha->chip_id = chip_id; 382dbf9bfe6Sjack wang pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id]; 383dbf9bfe6Sjack wang pm8001_ha->irq = pdev->irq; 384dbf9bfe6Sjack wang pm8001_ha->sas = sha; 385dbf9bfe6Sjack wang pm8001_ha->shost = shost; 386dbf9bfe6Sjack wang pm8001_ha->id = pm8001_id++; 387dbf9bfe6Sjack wang pm8001_ha->logging_level = 0x01; 388dbf9bfe6Sjack wang sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); 389dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 390dbf9bfe6Sjack wang tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet, 391dbf9bfe6Sjack wang (unsigned long)pm8001_ha); 392dbf9bfe6Sjack wang #endif 393dbf9bfe6Sjack wang pm8001_ioremap(pm8001_ha); 394dbf9bfe6Sjack wang if (!pm8001_alloc(pm8001_ha)) 395dbf9bfe6Sjack wang return pm8001_ha; 396dbf9bfe6Sjack wang pm8001_free(pm8001_ha); 397dbf9bfe6Sjack wang return NULL; 398dbf9bfe6Sjack wang } 399dbf9bfe6Sjack wang 400dbf9bfe6Sjack wang /** 401dbf9bfe6Sjack wang * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit 402dbf9bfe6Sjack wang * @pdev: pci device. 403dbf9bfe6Sjack wang */ 404dbf9bfe6Sjack wang static int pci_go_44(struct pci_dev *pdev) 405dbf9bfe6Sjack wang { 406dbf9bfe6Sjack wang int rc; 407dbf9bfe6Sjack wang 408dbf9bfe6Sjack wang if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) { 409dbf9bfe6Sjack wang rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44)); 410dbf9bfe6Sjack wang if (rc) { 411dbf9bfe6Sjack wang rc = pci_set_consistent_dma_mask(pdev, 412dbf9bfe6Sjack wang DMA_BIT_MASK(32)); 413dbf9bfe6Sjack wang if (rc) { 414dbf9bfe6Sjack wang dev_printk(KERN_ERR, &pdev->dev, 415dbf9bfe6Sjack wang "44-bit DMA enable failed\n"); 416dbf9bfe6Sjack wang return rc; 417dbf9bfe6Sjack wang } 418dbf9bfe6Sjack wang } 419dbf9bfe6Sjack wang } else { 420dbf9bfe6Sjack wang rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 421dbf9bfe6Sjack wang if (rc) { 422dbf9bfe6Sjack wang dev_printk(KERN_ERR, &pdev->dev, 423dbf9bfe6Sjack wang "32-bit DMA enable failed\n"); 424dbf9bfe6Sjack wang return rc; 425dbf9bfe6Sjack wang } 426dbf9bfe6Sjack wang rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 427dbf9bfe6Sjack wang if (rc) { 428dbf9bfe6Sjack wang dev_printk(KERN_ERR, &pdev->dev, 429dbf9bfe6Sjack wang "32-bit consistent DMA enable failed\n"); 430dbf9bfe6Sjack wang return rc; 431dbf9bfe6Sjack wang } 432dbf9bfe6Sjack wang } 433dbf9bfe6Sjack wang return rc; 434dbf9bfe6Sjack wang } 435dbf9bfe6Sjack wang 436dbf9bfe6Sjack wang /** 437dbf9bfe6Sjack wang * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them. 438dbf9bfe6Sjack wang * @shost: scsi host which has been allocated outside. 439dbf9bfe6Sjack wang * @chip_info: our ha struct. 440dbf9bfe6Sjack wang */ 4416f039790SGreg Kroah-Hartman static int pm8001_prep_sas_ha_init(struct Scsi_Host *shost, 442dbf9bfe6Sjack wang const struct pm8001_chip_info *chip_info) 443dbf9bfe6Sjack wang { 444dbf9bfe6Sjack wang int phy_nr, port_nr; 445dbf9bfe6Sjack wang struct asd_sas_phy **arr_phy; 446dbf9bfe6Sjack wang struct asd_sas_port **arr_port; 447dbf9bfe6Sjack wang struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 448dbf9bfe6Sjack wang 449dbf9bfe6Sjack wang phy_nr = chip_info->n_phy; 450dbf9bfe6Sjack wang port_nr = phy_nr; 451dbf9bfe6Sjack wang memset(sha, 0x00, sizeof(*sha)); 452dbf9bfe6Sjack wang arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL); 453dbf9bfe6Sjack wang if (!arr_phy) 454dbf9bfe6Sjack wang goto exit; 455dbf9bfe6Sjack wang arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL); 456dbf9bfe6Sjack wang if (!arr_port) 457dbf9bfe6Sjack wang goto exit_free2; 458dbf9bfe6Sjack wang 459dbf9bfe6Sjack wang sha->sas_phy = arr_phy; 460dbf9bfe6Sjack wang sha->sas_port = arr_port; 461dbf9bfe6Sjack wang sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL); 462dbf9bfe6Sjack wang if (!sha->lldd_ha) 463dbf9bfe6Sjack wang goto exit_free1; 464dbf9bfe6Sjack wang 465dbf9bfe6Sjack wang shost->transportt = pm8001_stt; 466dbf9bfe6Sjack wang shost->max_id = PM8001_MAX_DEVICES; 467dbf9bfe6Sjack wang shost->max_lun = 8; 468dbf9bfe6Sjack wang shost->max_channel = 0; 469dbf9bfe6Sjack wang shost->unique_id = pm8001_id; 470dbf9bfe6Sjack wang shost->max_cmd_len = 16; 471dbf9bfe6Sjack wang shost->can_queue = PM8001_CAN_QUEUE; 472dbf9bfe6Sjack wang shost->cmd_per_lun = 32; 473dbf9bfe6Sjack wang return 0; 474dbf9bfe6Sjack wang exit_free1: 475dbf9bfe6Sjack wang kfree(arr_port); 476dbf9bfe6Sjack wang exit_free2: 477dbf9bfe6Sjack wang kfree(arr_phy); 478dbf9bfe6Sjack wang exit: 479dbf9bfe6Sjack wang return -1; 480dbf9bfe6Sjack wang } 481dbf9bfe6Sjack wang 482dbf9bfe6Sjack wang /** 483dbf9bfe6Sjack wang * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas 484dbf9bfe6Sjack wang * @shost: scsi host which has been allocated outside 485dbf9bfe6Sjack wang * @chip_info: our ha struct. 486dbf9bfe6Sjack wang */ 4876f039790SGreg Kroah-Hartman static void pm8001_post_sas_ha_init(struct Scsi_Host *shost, 488dbf9bfe6Sjack wang const struct pm8001_chip_info *chip_info) 489dbf9bfe6Sjack wang { 490dbf9bfe6Sjack wang int i = 0; 491dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 492dbf9bfe6Sjack wang struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 493dbf9bfe6Sjack wang 494dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 495dbf9bfe6Sjack wang for (i = 0; i < chip_info->n_phy; i++) { 496dbf9bfe6Sjack wang sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy; 497dbf9bfe6Sjack wang sha->sas_port[i] = &pm8001_ha->port[i].sas_port; 498dbf9bfe6Sjack wang } 499dbf9bfe6Sjack wang sha->sas_ha_name = DRV_NAME; 500dbf9bfe6Sjack wang sha->dev = pm8001_ha->dev; 501dbf9bfe6Sjack wang 502dbf9bfe6Sjack wang sha->lldd_module = THIS_MODULE; 503dbf9bfe6Sjack wang sha->sas_addr = &pm8001_ha->sas_addr[0]; 504dbf9bfe6Sjack wang sha->num_phys = chip_info->n_phy; 505dbf9bfe6Sjack wang sha->lldd_max_execute_num = 1; 506dbf9bfe6Sjack wang sha->lldd_queue_size = PM8001_CAN_QUEUE; 507dbf9bfe6Sjack wang sha->core.shost = shost; 508dbf9bfe6Sjack wang } 509dbf9bfe6Sjack wang 510dbf9bfe6Sjack wang /** 511dbf9bfe6Sjack wang * pm8001_init_sas_add - initialize sas address 512dbf9bfe6Sjack wang * @chip_info: our ha struct. 513dbf9bfe6Sjack wang * 514dbf9bfe6Sjack wang * Currently we just set the fixed SAS address to our HBA,for manufacture, 515dbf9bfe6Sjack wang * it should read from the EEPROM 516dbf9bfe6Sjack wang */ 517dbf9bfe6Sjack wang static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) 518dbf9bfe6Sjack wang { 519dbf9bfe6Sjack wang u8 i; 520dbf9bfe6Sjack wang #ifdef PM8001_READ_VPD 521dbf9bfe6Sjack wang DECLARE_COMPLETION_ONSTACK(completion); 5227c8356d9Sjack wang struct pm8001_ioctl_payload payload; 523dbf9bfe6Sjack wang pm8001_ha->nvmd_completion = &completion; 5247c8356d9Sjack wang payload.minor_function = 0; 5257c8356d9Sjack wang payload.length = 128; 5267c8356d9Sjack wang payload.func_specific = kzalloc(128, GFP_KERNEL); 5277c8356d9Sjack wang PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); 528dbf9bfe6Sjack wang wait_for_completion(&completion); 529dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 530dbf9bfe6Sjack wang memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr, 531dbf9bfe6Sjack wang SAS_ADDR_SIZE); 532dbf9bfe6Sjack wang PM8001_INIT_DBG(pm8001_ha, 5337c8356d9Sjack wang pm8001_printk("phy %d sas_addr = %016llx \n", i, 5347c8356d9Sjack wang pm8001_ha->phy[i].dev_sas_addr)); 535dbf9bfe6Sjack wang } 536dbf9bfe6Sjack wang #else 537dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 5387c8356d9Sjack wang pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL; 539dbf9bfe6Sjack wang pm8001_ha->phy[i].dev_sas_addr = 540dbf9bfe6Sjack wang cpu_to_be64((u64) 541dbf9bfe6Sjack wang (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); 542dbf9bfe6Sjack wang } 543dbf9bfe6Sjack wang memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr, 544dbf9bfe6Sjack wang SAS_ADDR_SIZE); 545dbf9bfe6Sjack wang #endif 546dbf9bfe6Sjack wang } 547dbf9bfe6Sjack wang 548dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 549dbf9bfe6Sjack wang /** 550dbf9bfe6Sjack wang * pm8001_setup_msix - enable MSI-X interrupt 551dbf9bfe6Sjack wang * @chip_info: our ha struct. 552dbf9bfe6Sjack wang * @irq_handler: irq_handler 553dbf9bfe6Sjack wang */ 554dbf9bfe6Sjack wang static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha, 555dbf9bfe6Sjack wang irq_handler_t irq_handler) 556dbf9bfe6Sjack wang { 557dbf9bfe6Sjack wang u32 i = 0, j = 0; 558dbf9bfe6Sjack wang u32 number_of_intr = 1; 559dbf9bfe6Sjack wang int flag = 0; 560dbf9bfe6Sjack wang u32 max_entry; 561dbf9bfe6Sjack wang int rc; 562dbf9bfe6Sjack wang max_entry = sizeof(pm8001_ha->msix_entries) / 563dbf9bfe6Sjack wang sizeof(pm8001_ha->msix_entries[0]); 564dbf9bfe6Sjack wang flag |= IRQF_DISABLED; 565dbf9bfe6Sjack wang for (i = 0; i < max_entry ; i++) 566dbf9bfe6Sjack wang pm8001_ha->msix_entries[i].entry = i; 567dbf9bfe6Sjack wang rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries, 568dbf9bfe6Sjack wang number_of_intr); 569dbf9bfe6Sjack wang pm8001_ha->number_of_intr = number_of_intr; 570dbf9bfe6Sjack wang if (!rc) { 571dbf9bfe6Sjack wang for (i = 0; i < number_of_intr; i++) { 572dbf9bfe6Sjack wang if (request_irq(pm8001_ha->msix_entries[i].vector, 573dbf9bfe6Sjack wang irq_handler, flag, DRV_NAME, 574dbf9bfe6Sjack wang SHOST_TO_SAS_HA(pm8001_ha->shost))) { 575dbf9bfe6Sjack wang for (j = 0; j < i; j++) 576dbf9bfe6Sjack wang free_irq( 577dbf9bfe6Sjack wang pm8001_ha->msix_entries[j].vector, 578dbf9bfe6Sjack wang SHOST_TO_SAS_HA(pm8001_ha->shost)); 579dbf9bfe6Sjack wang pci_disable_msix(pm8001_ha->pdev); 580dbf9bfe6Sjack wang break; 581dbf9bfe6Sjack wang } 582dbf9bfe6Sjack wang } 583dbf9bfe6Sjack wang } 584dbf9bfe6Sjack wang return rc; 585dbf9bfe6Sjack wang } 586dbf9bfe6Sjack wang #endif 587dbf9bfe6Sjack wang 588dbf9bfe6Sjack wang /** 589dbf9bfe6Sjack wang * pm8001_request_irq - register interrupt 590dbf9bfe6Sjack wang * @chip_info: our ha struct. 591dbf9bfe6Sjack wang */ 592dbf9bfe6Sjack wang static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) 593dbf9bfe6Sjack wang { 594dbf9bfe6Sjack wang struct pci_dev *pdev; 595dbf9bfe6Sjack wang irq_handler_t irq_handler = pm8001_interrupt; 59697ee2088Sjack_wang int rc; 597dbf9bfe6Sjack wang 598dbf9bfe6Sjack wang pdev = pm8001_ha->pdev; 599dbf9bfe6Sjack wang 600dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 601dbf9bfe6Sjack wang if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) 602dbf9bfe6Sjack wang return pm8001_setup_msix(pm8001_ha, irq_handler); 603dbf9bfe6Sjack wang else 604dbf9bfe6Sjack wang goto intx; 605dbf9bfe6Sjack wang #endif 606dbf9bfe6Sjack wang 607dbf9bfe6Sjack wang intx: 608b595076aSUwe Kleine-König /* initialize the INT-X interrupt */ 609dbf9bfe6Sjack wang rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME, 610dbf9bfe6Sjack wang SHOST_TO_SAS_HA(pm8001_ha->shost)); 611dbf9bfe6Sjack wang return rc; 612dbf9bfe6Sjack wang } 613dbf9bfe6Sjack wang 614dbf9bfe6Sjack wang /** 615dbf9bfe6Sjack wang * pm8001_pci_probe - probe supported device 616dbf9bfe6Sjack wang * @pdev: pci device which kernel has been prepared for. 617dbf9bfe6Sjack wang * @ent: pci device id 618dbf9bfe6Sjack wang * 619dbf9bfe6Sjack wang * This function is the main initialization function, when register a new 620dbf9bfe6Sjack wang * pci driver it is invoked, all struct an hardware initilization should be done 621dbf9bfe6Sjack wang * here, also, register interrupt 622dbf9bfe6Sjack wang */ 6236f039790SGreg Kroah-Hartman static int pm8001_pci_probe(struct pci_dev *pdev, 624dbf9bfe6Sjack wang const struct pci_device_id *ent) 625dbf9bfe6Sjack wang { 626dbf9bfe6Sjack wang unsigned int rc; 627dbf9bfe6Sjack wang u32 pci_reg; 628dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 629dbf9bfe6Sjack wang struct Scsi_Host *shost = NULL; 630dbf9bfe6Sjack wang const struct pm8001_chip_info *chip; 631dbf9bfe6Sjack wang 632dbf9bfe6Sjack wang dev_printk(KERN_INFO, &pdev->dev, 633dbf9bfe6Sjack wang "pm8001: driver version %s\n", DRV_VERSION); 634dbf9bfe6Sjack wang rc = pci_enable_device(pdev); 635dbf9bfe6Sjack wang if (rc) 636dbf9bfe6Sjack wang goto err_out_enable; 637dbf9bfe6Sjack wang pci_set_master(pdev); 638dbf9bfe6Sjack wang /* 639dbf9bfe6Sjack wang * Enable pci slot busmaster by setting pci command register. 640dbf9bfe6Sjack wang * This is required by FW for Cyclone card. 641dbf9bfe6Sjack wang */ 642dbf9bfe6Sjack wang 643dbf9bfe6Sjack wang pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg); 644dbf9bfe6Sjack wang pci_reg |= 0x157; 645dbf9bfe6Sjack wang pci_write_config_dword(pdev, PCI_COMMAND, pci_reg); 646dbf9bfe6Sjack wang rc = pci_request_regions(pdev, DRV_NAME); 647dbf9bfe6Sjack wang if (rc) 648dbf9bfe6Sjack wang goto err_out_disable; 649dbf9bfe6Sjack wang rc = pci_go_44(pdev); 650dbf9bfe6Sjack wang if (rc) 651dbf9bfe6Sjack wang goto err_out_regions; 652dbf9bfe6Sjack wang 653dbf9bfe6Sjack wang shost = scsi_host_alloc(&pm8001_sht, sizeof(void *)); 654dbf9bfe6Sjack wang if (!shost) { 655dbf9bfe6Sjack wang rc = -ENOMEM; 656dbf9bfe6Sjack wang goto err_out_regions; 657dbf9bfe6Sjack wang } 658dbf9bfe6Sjack wang chip = &pm8001_chips[ent->driver_data]; 659dbf9bfe6Sjack wang SHOST_TO_SAS_HA(shost) = 6603dbf6c00SJulia Lawall kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL); 661dbf9bfe6Sjack wang if (!SHOST_TO_SAS_HA(shost)) { 662dbf9bfe6Sjack wang rc = -ENOMEM; 663dbf9bfe6Sjack wang goto err_out_free_host; 664dbf9bfe6Sjack wang } 665dbf9bfe6Sjack wang 666dbf9bfe6Sjack wang rc = pm8001_prep_sas_ha_init(shost, chip); 667dbf9bfe6Sjack wang if (rc) { 668dbf9bfe6Sjack wang rc = -ENOMEM; 669dbf9bfe6Sjack wang goto err_out_free; 670dbf9bfe6Sjack wang } 671dbf9bfe6Sjack wang pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost)); 672dbf9bfe6Sjack wang pm8001_ha = pm8001_pci_alloc(pdev, chip_8001, shost); 673dbf9bfe6Sjack wang if (!pm8001_ha) { 674dbf9bfe6Sjack wang rc = -ENOMEM; 675dbf9bfe6Sjack wang goto err_out_free; 676dbf9bfe6Sjack wang } 677dbf9bfe6Sjack wang list_add_tail(&pm8001_ha->list, &hba_list); 678dbf9bfe6Sjack wang PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 679dbf9bfe6Sjack wang rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); 680dbf9bfe6Sjack wang if (rc) 681dbf9bfe6Sjack wang goto err_out_ha_free; 682dbf9bfe6Sjack wang 683dbf9bfe6Sjack wang rc = scsi_add_host(shost, &pdev->dev); 684dbf9bfe6Sjack wang if (rc) 685dbf9bfe6Sjack wang goto err_out_ha_free; 686dbf9bfe6Sjack wang rc = pm8001_request_irq(pm8001_ha); 687dbf9bfe6Sjack wang if (rc) 688dbf9bfe6Sjack wang goto err_out_shost; 689dbf9bfe6Sjack wang 690dbf9bfe6Sjack wang PM8001_CHIP_DISP->interrupt_enable(pm8001_ha); 691dbf9bfe6Sjack wang pm8001_init_sas_add(pm8001_ha); 692dbf9bfe6Sjack wang pm8001_post_sas_ha_init(shost, chip); 693dbf9bfe6Sjack wang rc = sas_register_ha(SHOST_TO_SAS_HA(shost)); 694dbf9bfe6Sjack wang if (rc) 695dbf9bfe6Sjack wang goto err_out_shost; 696dbf9bfe6Sjack wang scsi_scan_host(pm8001_ha->shost); 697dbf9bfe6Sjack wang return 0; 698dbf9bfe6Sjack wang 699dbf9bfe6Sjack wang err_out_shost: 700dbf9bfe6Sjack wang scsi_remove_host(pm8001_ha->shost); 701dbf9bfe6Sjack wang err_out_ha_free: 702dbf9bfe6Sjack wang pm8001_free(pm8001_ha); 703dbf9bfe6Sjack wang err_out_free: 704dbf9bfe6Sjack wang kfree(SHOST_TO_SAS_HA(shost)); 705dbf9bfe6Sjack wang err_out_free_host: 706dbf9bfe6Sjack wang kfree(shost); 707dbf9bfe6Sjack wang err_out_regions: 708dbf9bfe6Sjack wang pci_release_regions(pdev); 709dbf9bfe6Sjack wang err_out_disable: 710dbf9bfe6Sjack wang pci_disable_device(pdev); 711dbf9bfe6Sjack wang err_out_enable: 712dbf9bfe6Sjack wang return rc; 713dbf9bfe6Sjack wang } 714dbf9bfe6Sjack wang 7156f039790SGreg Kroah-Hartman static void pm8001_pci_remove(struct pci_dev *pdev) 716dbf9bfe6Sjack wang { 717dbf9bfe6Sjack wang struct sas_ha_struct *sha = pci_get_drvdata(pdev); 718dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 719dbf9bfe6Sjack wang int i; 720dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 721dbf9bfe6Sjack wang pci_set_drvdata(pdev, NULL); 722dbf9bfe6Sjack wang sas_unregister_ha(sha); 723dbf9bfe6Sjack wang sas_remove_host(pm8001_ha->shost); 724dbf9bfe6Sjack wang list_del(&pm8001_ha->list); 725dbf9bfe6Sjack wang scsi_remove_host(pm8001_ha->shost); 726dbf9bfe6Sjack wang PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); 727dbf9bfe6Sjack wang PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 728dbf9bfe6Sjack wang 729dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 730dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 731dbf9bfe6Sjack wang synchronize_irq(pm8001_ha->msix_entries[i].vector); 732dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 733dbf9bfe6Sjack wang free_irq(pm8001_ha->msix_entries[i].vector, sha); 734dbf9bfe6Sjack wang pci_disable_msix(pdev); 735dbf9bfe6Sjack wang #else 736dbf9bfe6Sjack wang free_irq(pm8001_ha->irq, sha); 737dbf9bfe6Sjack wang #endif 738dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 739dbf9bfe6Sjack wang tasklet_kill(&pm8001_ha->tasklet); 740dbf9bfe6Sjack wang #endif 741dbf9bfe6Sjack wang pm8001_free(pm8001_ha); 742dbf9bfe6Sjack wang kfree(sha->sas_phy); 743dbf9bfe6Sjack wang kfree(sha->sas_port); 744dbf9bfe6Sjack wang kfree(sha); 745dbf9bfe6Sjack wang pci_release_regions(pdev); 746dbf9bfe6Sjack wang pci_disable_device(pdev); 747dbf9bfe6Sjack wang } 748dbf9bfe6Sjack wang 749dbf9bfe6Sjack wang /** 750dbf9bfe6Sjack wang * pm8001_pci_suspend - power management suspend main entry point 751dbf9bfe6Sjack wang * @pdev: PCI device struct 752dbf9bfe6Sjack wang * @state: PM state change to (usually PCI_D3) 753dbf9bfe6Sjack wang * 754dbf9bfe6Sjack wang * Returns 0 success, anything else error. 755dbf9bfe6Sjack wang */ 756dbf9bfe6Sjack wang static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state) 757dbf9bfe6Sjack wang { 758dbf9bfe6Sjack wang struct sas_ha_struct *sha = pci_get_drvdata(pdev); 759dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 760dbf9bfe6Sjack wang int i , pos; 761dbf9bfe6Sjack wang u32 device_state; 762dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 763429305e4STejun Heo flush_workqueue(pm8001_wq); 764dbf9bfe6Sjack wang scsi_block_requests(pm8001_ha->shost); 765dbf9bfe6Sjack wang pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 766dbf9bfe6Sjack wang if (pos == 0) { 767dbf9bfe6Sjack wang printk(KERN_ERR " PCI PM not supported\n"); 768dbf9bfe6Sjack wang return -ENODEV; 769dbf9bfe6Sjack wang } 770dbf9bfe6Sjack wang PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); 771dbf9bfe6Sjack wang PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 772dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 773dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 774dbf9bfe6Sjack wang synchronize_irq(pm8001_ha->msix_entries[i].vector); 775dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 776dbf9bfe6Sjack wang free_irq(pm8001_ha->msix_entries[i].vector, sha); 777dbf9bfe6Sjack wang pci_disable_msix(pdev); 778dbf9bfe6Sjack wang #else 779dbf9bfe6Sjack wang free_irq(pm8001_ha->irq, sha); 780dbf9bfe6Sjack wang #endif 781dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 782dbf9bfe6Sjack wang tasklet_kill(&pm8001_ha->tasklet); 783dbf9bfe6Sjack wang #endif 784dbf9bfe6Sjack wang device_state = pci_choose_state(pdev, state); 785dbf9bfe6Sjack wang pm8001_printk("pdev=0x%p, slot=%s, entering " 786dbf9bfe6Sjack wang "operating state [D%d]\n", pdev, 787dbf9bfe6Sjack wang pm8001_ha->name, device_state); 788dbf9bfe6Sjack wang pci_save_state(pdev); 789dbf9bfe6Sjack wang pci_disable_device(pdev); 790dbf9bfe6Sjack wang pci_set_power_state(pdev, device_state); 791dbf9bfe6Sjack wang return 0; 792dbf9bfe6Sjack wang } 793dbf9bfe6Sjack wang 794dbf9bfe6Sjack wang /** 795dbf9bfe6Sjack wang * pm8001_pci_resume - power management resume main entry point 796dbf9bfe6Sjack wang * @pdev: PCI device struct 797dbf9bfe6Sjack wang * 798dbf9bfe6Sjack wang * Returns 0 success, anything else error. 799dbf9bfe6Sjack wang */ 800dbf9bfe6Sjack wang static int pm8001_pci_resume(struct pci_dev *pdev) 801dbf9bfe6Sjack wang { 802dbf9bfe6Sjack wang struct sas_ha_struct *sha = pci_get_drvdata(pdev); 803dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 804dbf9bfe6Sjack wang int rc; 805dbf9bfe6Sjack wang u32 device_state; 806dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 807dbf9bfe6Sjack wang device_state = pdev->current_state; 808dbf9bfe6Sjack wang 809dbf9bfe6Sjack wang pm8001_printk("pdev=0x%p, slot=%s, resuming from previous " 810dbf9bfe6Sjack wang "operating state [D%d]\n", pdev, pm8001_ha->name, device_state); 811dbf9bfe6Sjack wang 812dbf9bfe6Sjack wang pci_set_power_state(pdev, PCI_D0); 813dbf9bfe6Sjack wang pci_enable_wake(pdev, PCI_D0, 0); 814dbf9bfe6Sjack wang pci_restore_state(pdev); 815dbf9bfe6Sjack wang rc = pci_enable_device(pdev); 816dbf9bfe6Sjack wang if (rc) { 817dbf9bfe6Sjack wang pm8001_printk("slot=%s Enable device failed during resume\n", 818dbf9bfe6Sjack wang pm8001_ha->name); 819dbf9bfe6Sjack wang goto err_out_enable; 820dbf9bfe6Sjack wang } 821dbf9bfe6Sjack wang 822dbf9bfe6Sjack wang pci_set_master(pdev); 823dbf9bfe6Sjack wang rc = pci_go_44(pdev); 824dbf9bfe6Sjack wang if (rc) 825dbf9bfe6Sjack wang goto err_out_disable; 826dbf9bfe6Sjack wang 827dbf9bfe6Sjack wang PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 828dbf9bfe6Sjack wang rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); 829dbf9bfe6Sjack wang if (rc) 830dbf9bfe6Sjack wang goto err_out_disable; 831dbf9bfe6Sjack wang PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); 832dbf9bfe6Sjack wang rc = pm8001_request_irq(pm8001_ha); 833dbf9bfe6Sjack wang if (rc) 834dbf9bfe6Sjack wang goto err_out_disable; 835dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 836dbf9bfe6Sjack wang tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet, 837dbf9bfe6Sjack wang (unsigned long)pm8001_ha); 838dbf9bfe6Sjack wang #endif 839dbf9bfe6Sjack wang PM8001_CHIP_DISP->interrupt_enable(pm8001_ha); 840dbf9bfe6Sjack wang scsi_unblock_requests(pm8001_ha->shost); 841dbf9bfe6Sjack wang return 0; 842dbf9bfe6Sjack wang 843dbf9bfe6Sjack wang err_out_disable: 844dbf9bfe6Sjack wang scsi_remove_host(pm8001_ha->shost); 845dbf9bfe6Sjack wang pci_disable_device(pdev); 846dbf9bfe6Sjack wang err_out_enable: 847dbf9bfe6Sjack wang return rc; 848dbf9bfe6Sjack wang } 849dbf9bfe6Sjack wang 850e5742101SSakthivel K /* update of pci device, vendor id and driver data with 851e5742101SSakthivel K * unique value for each of the controller 852e5742101SSakthivel K */ 8536f039790SGreg Kroah-Hartman static struct pci_device_id pm8001_pci_table[] = { 854e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001 }, 855dbf9bfe6Sjack wang { 856dbf9bfe6Sjack wang PCI_DEVICE(0x117c, 0x0042), 857dbf9bfe6Sjack wang .driver_data = chip_8001 858dbf9bfe6Sjack wang }, 859e5742101SSakthivel K /* Support for SPC/SPCv/SPCve controllers */ 860e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8001), chip_8001 }, 861e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8008), chip_8008 }, 862e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8008), chip_8008 }, 863e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8018), chip_8018 }, 864e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8018), chip_8018 }, 865e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8009), chip_8009 }, 866e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8009), chip_8009 }, 867e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8019), chip_8019 }, 868e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8019), chip_8019 }, 869e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8081, 870e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0400, 0, 0, chip_8001 }, 871e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8081, 872e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8001 }, 873e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 874e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8008 }, 875e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 876e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8008 }, 877e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 878e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8009 }, 879e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 880e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8009 }, 881e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 882e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8018 }, 883e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 884e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8018 }, 885e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 886e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8019 }, 887e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 888e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8019 }, 889dbf9bfe6Sjack wang {} /* terminate list */ 890dbf9bfe6Sjack wang }; 891dbf9bfe6Sjack wang 892dbf9bfe6Sjack wang static struct pci_driver pm8001_pci_driver = { 893dbf9bfe6Sjack wang .name = DRV_NAME, 894dbf9bfe6Sjack wang .id_table = pm8001_pci_table, 895dbf9bfe6Sjack wang .probe = pm8001_pci_probe, 8966f039790SGreg Kroah-Hartman .remove = pm8001_pci_remove, 897dbf9bfe6Sjack wang .suspend = pm8001_pci_suspend, 898dbf9bfe6Sjack wang .resume = pm8001_pci_resume, 899dbf9bfe6Sjack wang }; 900dbf9bfe6Sjack wang 901dbf9bfe6Sjack wang /** 902dbf9bfe6Sjack wang * pm8001_init - initialize scsi transport template 903dbf9bfe6Sjack wang */ 904dbf9bfe6Sjack wang static int __init pm8001_init(void) 905dbf9bfe6Sjack wang { 906429305e4STejun Heo int rc = -ENOMEM; 907429305e4STejun Heo 908429305e4STejun Heo pm8001_wq = alloc_workqueue("pm8001", 0, 0); 909429305e4STejun Heo if (!pm8001_wq) 910429305e4STejun Heo goto err; 911429305e4STejun Heo 912dbf9bfe6Sjack wang pm8001_id = 0; 913dbf9bfe6Sjack wang pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops); 914dbf9bfe6Sjack wang if (!pm8001_stt) 915429305e4STejun Heo goto err_wq; 916dbf9bfe6Sjack wang rc = pci_register_driver(&pm8001_pci_driver); 917dbf9bfe6Sjack wang if (rc) 918429305e4STejun Heo goto err_tp; 919dbf9bfe6Sjack wang return 0; 920429305e4STejun Heo 921429305e4STejun Heo err_tp: 922dbf9bfe6Sjack wang sas_release_transport(pm8001_stt); 923429305e4STejun Heo err_wq: 924429305e4STejun Heo destroy_workqueue(pm8001_wq); 925429305e4STejun Heo err: 926dbf9bfe6Sjack wang return rc; 927dbf9bfe6Sjack wang } 928dbf9bfe6Sjack wang 929dbf9bfe6Sjack wang static void __exit pm8001_exit(void) 930dbf9bfe6Sjack wang { 931dbf9bfe6Sjack wang pci_unregister_driver(&pm8001_pci_driver); 932dbf9bfe6Sjack wang sas_release_transport(pm8001_stt); 933429305e4STejun Heo destroy_workqueue(pm8001_wq); 934dbf9bfe6Sjack wang } 935dbf9bfe6Sjack wang 936dbf9bfe6Sjack wang module_init(pm8001_init); 937dbf9bfe6Sjack wang module_exit(pm8001_exit); 938dbf9bfe6Sjack wang 939dbf9bfe6Sjack wang MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>"); 940e5742101SSakthivel K MODULE_DESCRIPTION( 941e5742101SSakthivel K "PMC-Sierra PM8001/8081/8088/8089 SAS/SATA controller driver"); 942dbf9bfe6Sjack wang MODULE_VERSION(DRV_VERSION); 943dbf9bfe6Sjack wang MODULE_LICENSE("GPL"); 944dbf9bfe6Sjack wang MODULE_DEVICE_TABLE(pci, pm8001_pci_table); 945dbf9bfe6Sjack wang 946