1dbf9bfe6Sjack wang /* 2e5742101SSakthivel K * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver 3dbf9bfe6Sjack wang * 4dbf9bfe6Sjack wang * Copyright (c) 2008-2009 USI Co., Ltd. 5dbf9bfe6Sjack wang * All rights reserved. 6dbf9bfe6Sjack wang * 7dbf9bfe6Sjack wang * Redistribution and use in source and binary forms, with or without 8dbf9bfe6Sjack wang * modification, are permitted provided that the following conditions 9dbf9bfe6Sjack wang * are met: 10dbf9bfe6Sjack wang * 1. Redistributions of source code must retain the above copyright 11dbf9bfe6Sjack wang * notice, this list of conditions, and the following disclaimer, 12dbf9bfe6Sjack wang * without modification. 13dbf9bfe6Sjack wang * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14dbf9bfe6Sjack wang * substantially similar to the "NO WARRANTY" disclaimer below 15dbf9bfe6Sjack wang * ("Disclaimer") and any redistribution must be conditioned upon 16dbf9bfe6Sjack wang * including a substantially similar Disclaimer requirement for further 17dbf9bfe6Sjack wang * binary redistribution. 18dbf9bfe6Sjack wang * 3. Neither the names of the above-listed copyright holders nor the names 19dbf9bfe6Sjack wang * of any contributors may be used to endorse or promote products derived 20dbf9bfe6Sjack wang * from this software without specific prior written permission. 21dbf9bfe6Sjack wang * 22dbf9bfe6Sjack wang * Alternatively, this software may be distributed under the terms of the 23dbf9bfe6Sjack wang * GNU General Public License ("GPL") version 2 as published by the Free 24dbf9bfe6Sjack wang * Software Foundation. 25dbf9bfe6Sjack wang * 26dbf9bfe6Sjack wang * NO WARRANTY 27dbf9bfe6Sjack wang * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28dbf9bfe6Sjack wang * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29dbf9bfe6Sjack wang * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30dbf9bfe6Sjack wang * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31dbf9bfe6Sjack wang * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32dbf9bfe6Sjack wang * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33dbf9bfe6Sjack wang * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34dbf9bfe6Sjack wang * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35dbf9bfe6Sjack wang * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36dbf9bfe6Sjack wang * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37dbf9bfe6Sjack wang * POSSIBILITY OF SUCH DAMAGES. 38dbf9bfe6Sjack wang * 39dbf9bfe6Sjack wang */ 40dbf9bfe6Sjack wang 415a0e3ad6STejun Heo #include <linux/slab.h> 42dbf9bfe6Sjack wang #include "pm8001_sas.h" 43dbf9bfe6Sjack wang #include "pm8001_chips.h" 443e253d96Speter chang #include "pm80xx_hwi.h" 45dbf9bfe6Sjack wang 467370672dSpeter chang static ulong logging_level = PM8001_FAIL_LOGGING | PM8001_IOERR_LOGGING; 477370672dSpeter chang module_param(logging_level, ulong, 0644); 487370672dSpeter chang MODULE_PARM_DESC(logging_level, " bits for enabling logging info."); 497370672dSpeter chang 503e253d96Speter chang static ulong link_rate = LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | LINKRATE_120; 513e253d96Speter chang module_param(link_rate, ulong, 0644); 523e253d96Speter chang MODULE_PARM_DESC(link_rate, "Enable link rate.\n" 533e253d96Speter chang " 1: Link rate 1.5G\n" 543e253d96Speter chang " 2: Link rate 3.0G\n" 553e253d96Speter chang " 4: Link rate 6.0G\n" 563e253d96Speter chang " 8: Link rate 12.0G\n"); 573e253d96Speter chang 58dbf9bfe6Sjack wang static struct scsi_transport_template *pm8001_stt; 595a141315SViswas G static int pm8001_init_ccb_tag(struct pm8001_hba_info *, struct Scsi_Host *, struct pci_dev *); 60dbf9bfe6Sjack wang 61e802fc43SLee Jones /* 62e5742101SSakthivel K * chip info structure to identify chip key functionality as 63e5742101SSakthivel K * encryption available/not, no of ports, hw specific function ref 64e5742101SSakthivel K */ 65dbf9bfe6Sjack wang static const struct pm8001_chip_info pm8001_chips[] = { 66e5742101SSakthivel K [chip_8001] = {0, 8, &pm8001_8001_dispatch,}, 67f5860992SSakthivel K [chip_8008] = {0, 8, &pm8001_80xx_dispatch,}, 68f5860992SSakthivel K [chip_8009] = {1, 8, &pm8001_80xx_dispatch,}, 69f5860992SSakthivel K [chip_8018] = {0, 16, &pm8001_80xx_dispatch,}, 70f5860992SSakthivel K [chip_8019] = {1, 16, &pm8001_80xx_dispatch,}, 71a9a923e5SAnand Kumar Santhanam [chip_8074] = {0, 8, &pm8001_80xx_dispatch,}, 72a9a923e5SAnand Kumar Santhanam [chip_8076] = {0, 16, &pm8001_80xx_dispatch,}, 73a9a923e5SAnand Kumar Santhanam [chip_8077] = {0, 16, &pm8001_80xx_dispatch,}, 74d8571b1eSSuresh Thiagarajan [chip_8006] = {0, 16, &pm8001_80xx_dispatch,}, 75db9d4034SBenjamin Rood [chip_8070] = {0, 8, &pm8001_80xx_dispatch,}, 76db9d4034SBenjamin Rood [chip_8072] = {0, 16, &pm8001_80xx_dispatch,}, 77dbf9bfe6Sjack wang }; 78dbf9bfe6Sjack wang static int pm8001_id; 79dbf9bfe6Sjack wang 80dbf9bfe6Sjack wang LIST_HEAD(hba_list); 81dbf9bfe6Sjack wang 82429305e4STejun Heo struct workqueue_struct *pm8001_wq; 83429305e4STejun Heo 84e802fc43SLee Jones /* 85dbf9bfe6Sjack wang * The main structure which LLDD must register for scsi core. 86dbf9bfe6Sjack wang */ 87dbf9bfe6Sjack wang static struct scsi_host_template pm8001_sht = { 88dbf9bfe6Sjack wang .module = THIS_MODULE, 89dbf9bfe6Sjack wang .name = DRV_NAME, 90dbf9bfe6Sjack wang .queuecommand = sas_queuecommand, 91b8f1d1e0SChristoph Hellwig .dma_need_drain = ata_scsi_dma_need_drain, 92dbf9bfe6Sjack wang .target_alloc = sas_target_alloc, 9311e16364SDan Williams .slave_configure = sas_slave_configure, 94dbf9bfe6Sjack wang .scan_finished = pm8001_scan_finished, 95dbf9bfe6Sjack wang .scan_start = pm8001_scan_start, 96dbf9bfe6Sjack wang .change_queue_depth = sas_change_queue_depth, 97dbf9bfe6Sjack wang .bios_param = sas_bios_param, 98dbf9bfe6Sjack wang .can_queue = 1, 99dbf9bfe6Sjack wang .this_id = -1, 10058bf14c1SPeter Chang .sg_tablesize = PM8001_MAX_DMA_SG, 101dbf9bfe6Sjack wang .max_sectors = SCSI_DEFAULT_MAX_SECTORS, 102dbf9bfe6Sjack wang .eh_device_reset_handler = sas_eh_device_reset_handler, 103cc199e78SHannes Reinecke .eh_target_reset_handler = sas_eh_target_reset_handler, 104dbf9bfe6Sjack wang .target_destroy = sas_target_destroy, 105dbf9bfe6Sjack wang .ioctl = sas_ioctl, 10675c0b0e1SArnd Bergmann #ifdef CONFIG_COMPAT 10775c0b0e1SArnd Bergmann .compat_ioctl = sas_ioctl, 10875c0b0e1SArnd Bergmann #endif 109dbf9bfe6Sjack wang .shost_attrs = pm8001_host_attrs, 110c40ecc12SChristoph Hellwig .track_queue_depth = 1, 111dbf9bfe6Sjack wang }; 112dbf9bfe6Sjack wang 113e802fc43SLee Jones /* 114dbf9bfe6Sjack wang * Sas layer call this function to execute specific task. 115dbf9bfe6Sjack wang */ 116dbf9bfe6Sjack wang static struct sas_domain_function_template pm8001_transport_ops = { 117dbf9bfe6Sjack wang .lldd_dev_found = pm8001_dev_found, 118dbf9bfe6Sjack wang .lldd_dev_gone = pm8001_dev_gone, 119dbf9bfe6Sjack wang 120dbf9bfe6Sjack wang .lldd_execute_task = pm8001_queue_command, 121dbf9bfe6Sjack wang .lldd_control_phy = pm8001_phy_control, 122dbf9bfe6Sjack wang 123dbf9bfe6Sjack wang .lldd_abort_task = pm8001_abort_task, 124dbf9bfe6Sjack wang .lldd_abort_task_set = pm8001_abort_task_set, 125dbf9bfe6Sjack wang .lldd_clear_aca = pm8001_clear_aca, 126dbf9bfe6Sjack wang .lldd_clear_task_set = pm8001_clear_task_set, 127dbf9bfe6Sjack wang .lldd_I_T_nexus_reset = pm8001_I_T_nexus_reset, 128dbf9bfe6Sjack wang .lldd_lu_reset = pm8001_lu_reset, 129dbf9bfe6Sjack wang .lldd_query_task = pm8001_query_task, 130dbf9bfe6Sjack wang }; 131dbf9bfe6Sjack wang 132dbf9bfe6Sjack wang /** 133dbf9bfe6Sjack wang * pm8001_phy_init - initiate our adapter phys 134dbf9bfe6Sjack wang * @pm8001_ha: our hba structure. 135dbf9bfe6Sjack wang * @phy_id: phy id. 136dbf9bfe6Sjack wang */ 1376f039790SGreg Kroah-Hartman static void pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, int phy_id) 138dbf9bfe6Sjack wang { 139dbf9bfe6Sjack wang struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 140dbf9bfe6Sjack wang struct asd_sas_phy *sas_phy = &phy->sas_phy; 141cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 142dbf9bfe6Sjack wang phy->pm8001_ha = pm8001_ha; 143dbf9bfe6Sjack wang sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; 144dbf9bfe6Sjack wang sas_phy->class = SAS; 145dbf9bfe6Sjack wang sas_phy->iproto = SAS_PROTOCOL_ALL; 146dbf9bfe6Sjack wang sas_phy->tproto = 0; 147dbf9bfe6Sjack wang sas_phy->type = PHY_TYPE_PHYSICAL; 148dbf9bfe6Sjack wang sas_phy->role = PHY_ROLE_INITIATOR; 149dbf9bfe6Sjack wang sas_phy->oob_mode = OOB_NOT_CONNECTED; 150dbf9bfe6Sjack wang sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; 151dbf9bfe6Sjack wang sas_phy->id = phy_id; 1526c85e4bcSViswas G sas_phy->sas_addr = (u8 *)&phy->dev_sas_addr; 153dbf9bfe6Sjack wang sas_phy->frame_rcvd = &phy->frame_rcvd[0]; 154dbf9bfe6Sjack wang sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; 155dbf9bfe6Sjack wang sas_phy->lldd_phy = phy; 156dbf9bfe6Sjack wang } 157dbf9bfe6Sjack wang 158dbf9bfe6Sjack wang /** 159dbf9bfe6Sjack wang * pm8001_free - free hba 160dbf9bfe6Sjack wang * @pm8001_ha: our hba structure. 161dbf9bfe6Sjack wang */ 162dbf9bfe6Sjack wang static void pm8001_free(struct pm8001_hba_info *pm8001_ha) 163dbf9bfe6Sjack wang { 164dbf9bfe6Sjack wang int i; 165dbf9bfe6Sjack wang 166dbf9bfe6Sjack wang if (!pm8001_ha) 167dbf9bfe6Sjack wang return; 168dbf9bfe6Sjack wang 169dbf9bfe6Sjack wang for (i = 0; i < USI_MAX_MEMCNT; i++) { 170dbf9bfe6Sjack wang if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { 171f73bdebdSChristoph Hellwig dma_free_coherent(&pm8001_ha->pdev->dev, 172bfb4809fSSakthivel K (pm8001_ha->memoryMap.region[i].total_len + 173bfb4809fSSakthivel K pm8001_ha->memoryMap.region[i].alignment), 174dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].virt_ptr, 175dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].phys_addr); 176dbf9bfe6Sjack wang } 177dbf9bfe6Sjack wang } 178dbf9bfe6Sjack wang PM8001_CHIP_DISP->chip_iounmap(pm8001_ha); 179429305e4STejun Heo flush_workqueue(pm8001_wq); 180dbf9bfe6Sjack wang kfree(pm8001_ha->tags); 181dbf9bfe6Sjack wang kfree(pm8001_ha); 182dbf9bfe6Sjack wang } 183dbf9bfe6Sjack wang 184dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 1851245ee59SSakthivel K 1861245ee59SSakthivel K /** 1871245ee59SSakthivel K * tasklet for 64 msi-x interrupt handler 1881245ee59SSakthivel K * @opaque: the passed general host adapter struct 1891245ee59SSakthivel K * Note: pm8001_tasklet is common for pm8001 & pm80xx 1901245ee59SSakthivel K */ 191dbf9bfe6Sjack wang static void pm8001_tasklet(unsigned long opaque) 192dbf9bfe6Sjack wang { 193dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 1946cd60b37SNikith Ganigarakoppal struct isr_param *irq_vector; 1956cd60b37SNikith Ganigarakoppal 1966cd60b37SNikith Ganigarakoppal irq_vector = (struct isr_param *)opaque; 1976cd60b37SNikith Ganigarakoppal pm8001_ha = irq_vector->drv_inst; 198dbf9bfe6Sjack wang if (unlikely(!pm8001_ha)) 199dbf9bfe6Sjack wang BUG_ON(1); 2006cd60b37SNikith Ganigarakoppal PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id); 201dbf9bfe6Sjack wang } 202dbf9bfe6Sjack wang #endif 203dbf9bfe6Sjack wang 204dbf9bfe6Sjack wang /** 2051245ee59SSakthivel K * pm8001_interrupt_handler_msix - main MSIX interrupt handler. 2061245ee59SSakthivel K * It obtains the vector number and calls the equivalent bottom 2071245ee59SSakthivel K * half or services directly. 208e802fc43SLee Jones * @irq: interrupt number 2091245ee59SSakthivel K * @opaque: the passed outbound queue/vector. Host structure is 2101245ee59SSakthivel K * retrieved from the same. 211dbf9bfe6Sjack wang */ 2121245ee59SSakthivel K static irqreturn_t pm8001_interrupt_handler_msix(int irq, void *opaque) 2131245ee59SSakthivel K { 2146cd60b37SNikith Ganigarakoppal struct isr_param *irq_vector; 2156cd60b37SNikith Ganigarakoppal struct pm8001_hba_info *pm8001_ha; 2161245ee59SSakthivel K irqreturn_t ret = IRQ_HANDLED; 2176cd60b37SNikith Ganigarakoppal irq_vector = (struct isr_param *)opaque; 2186cd60b37SNikith Ganigarakoppal pm8001_ha = irq_vector->drv_inst; 2196cd60b37SNikith Ganigarakoppal 2201245ee59SSakthivel K if (unlikely(!pm8001_ha)) 2211245ee59SSakthivel K return IRQ_NONE; 222f310a4eaSColin Ian King if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha)) 2231245ee59SSakthivel K return IRQ_NONE; 2241245ee59SSakthivel K #ifdef PM8001_USE_TASKLET 2256cd60b37SNikith Ganigarakoppal tasklet_schedule(&pm8001_ha->tasklet[irq_vector->irq_id]); 2261245ee59SSakthivel K #else 2276cd60b37SNikith Ganigarakoppal ret = PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id); 2281245ee59SSakthivel K #endif 2291245ee59SSakthivel K return ret; 2301245ee59SSakthivel K } 2311245ee59SSakthivel K 2321245ee59SSakthivel K /** 2331245ee59SSakthivel K * pm8001_interrupt_handler_intx - main INTx interrupt handler. 234e802fc43SLee Jones * @irq: interrupt number 2351245ee59SSakthivel K * @dev_id: sas_ha structure. The HBA is retrieved from sas_has structure. 2361245ee59SSakthivel K */ 2371245ee59SSakthivel K 2381245ee59SSakthivel K static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id) 239dbf9bfe6Sjack wang { 240dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 241dbf9bfe6Sjack wang irqreturn_t ret = IRQ_HANDLED; 2421245ee59SSakthivel K struct sas_ha_struct *sha = dev_id; 243dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 244dbf9bfe6Sjack wang if (unlikely(!pm8001_ha)) 245dbf9bfe6Sjack wang return IRQ_NONE; 246f310a4eaSColin Ian King if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha)) 247dbf9bfe6Sjack wang return IRQ_NONE; 2481245ee59SSakthivel K 249dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 2506cd60b37SNikith Ganigarakoppal tasklet_schedule(&pm8001_ha->tasklet[0]); 251dbf9bfe6Sjack wang #else 252f74cf271SSakthivel K ret = PM8001_CHIP_DISP->isr(pm8001_ha, 0); 253dbf9bfe6Sjack wang #endif 254dbf9bfe6Sjack wang return ret; 255dbf9bfe6Sjack wang } 256dbf9bfe6Sjack wang 257d384be6eSVikram Auradkar static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha); 258d384be6eSVikram Auradkar static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha); 259d384be6eSVikram Auradkar 260dbf9bfe6Sjack wang /** 261dbf9bfe6Sjack wang * pm8001_alloc - initiate our hba structure and 6 DMAs area. 262dbf9bfe6Sjack wang * @pm8001_ha: our hba structure. 263e802fc43SLee Jones * @ent: PCI device ID structure to match on 264dbf9bfe6Sjack wang */ 265e590adfdSSakthivel K static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha, 266e590adfdSSakthivel K const struct pci_device_id *ent) 267dbf9bfe6Sjack wang { 26805c6c029SViswas G int i, count = 0, rc = 0; 26905c6c029SViswas G u32 ci_offset, ib_offset, ob_offset, pi_offset; 27005c6c029SViswas G struct inbound_queue_table *circularQ; 27105c6c029SViswas G 272dbf9bfe6Sjack wang spin_lock_init(&pm8001_ha->lock); 273646cdf00STomas Henzl spin_lock_init(&pm8001_ha->bitmap_lock); 2741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n", 2751b5d2793SJoe Perches pm8001_ha->chip->n_phy); 27605c6c029SViswas G 27705c6c029SViswas G /* Setup Interrupt */ 27805c6c029SViswas G rc = pm8001_setup_irq(pm8001_ha); 27905c6c029SViswas G if (rc) { 2801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 2811b5d2793SJoe Perches "pm8001_setup_irq failed [ret: %d]\n", rc); 28205c6c029SViswas G goto err_out_shost; 28305c6c029SViswas G } 28405c6c029SViswas G /* Request Interrupt */ 28505c6c029SViswas G rc = pm8001_request_irq(pm8001_ha); 28605c6c029SViswas G if (rc) 28705c6c029SViswas G goto err_out_shost; 28805c6c029SViswas G 28905c6c029SViswas G count = pm8001_ha->max_q_num; 29005c6c029SViswas G /* Queues are chosen based on the number of cores/msix availability */ 29127bc43bdSViswas G ib_offset = pm8001_ha->ib_offset = USI_MAX_MEMCNT_BASE; 29205c6c029SViswas G ci_offset = pm8001_ha->ci_offset = ib_offset + count; 29305c6c029SViswas G ob_offset = pm8001_ha->ob_offset = ci_offset + count; 29405c6c029SViswas G pi_offset = pm8001_ha->pi_offset = ob_offset + count; 29505c6c029SViswas G pm8001_ha->max_memcnt = pi_offset + count; 29605c6c029SViswas G 2971cc943aeSjack wang for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 298dbf9bfe6Sjack wang pm8001_phy_init(pm8001_ha, i); 2991cc943aeSjack wang pm8001_ha->port[i].wide_port_phymap = 0; 3001cc943aeSjack wang pm8001_ha->port[i].port_attached = 0; 3011cc943aeSjack wang pm8001_ha->port[i].port_state = 0; 3021cc943aeSjack wang INIT_LIST_HEAD(&pm8001_ha->port[i].list); 3031cc943aeSjack wang } 304dbf9bfe6Sjack wang 305dbf9bfe6Sjack wang /* MPI Memory region 1 for AAP Event Log for fw */ 306dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].num_elements = 1; 307dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE; 308dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE; 309dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[AAP1].alignment = 32; 310dbf9bfe6Sjack wang 311dbf9bfe6Sjack wang /* MPI Memory region 2 for IOP Event Log for fw */ 312dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].num_elements = 1; 313dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; 314dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; 315dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[IOP].alignment = 32; 316dbf9bfe6Sjack wang 31705c6c029SViswas G for (i = 0; i < count; i++) { 31805c6c029SViswas G circularQ = &pm8001_ha->inbnd_q_tbl[i]; 31905c6c029SViswas G spin_lock_init(&circularQ->iq_lock); 320dbf9bfe6Sjack wang /* MPI Memory region 3 for consumer Index of inbound queues */ 32105c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset+i].num_elements = 1; 32205c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset+i].element_size = 4; 32305c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset+i].total_len = 4; 32405c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4; 325dbf9bfe6Sjack wang 326e590adfdSSakthivel K if ((ent->driver_data) != chip_8001) { 327dbf9bfe6Sjack wang /* MPI Memory region 5 inbound queues */ 32805c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].num_elements = 329e590adfdSSakthivel K PM8001_MPI_QUEUE; 33005c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].element_size 33105c6c029SViswas G = 128; 33205c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].total_len = 333e590adfdSSakthivel K PM8001_MPI_QUEUE * 128; 33405c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].alignment 33505c6c029SViswas G = 128; 336e590adfdSSakthivel K } else { 33705c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].num_elements = 338e590adfdSSakthivel K PM8001_MPI_QUEUE; 33905c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].element_size 34005c6c029SViswas G = 64; 34105c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].total_len = 342e590adfdSSakthivel K PM8001_MPI_QUEUE * 64; 34305c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64; 344e590adfdSSakthivel K } 345e590adfdSSakthivel K } 346dbf9bfe6Sjack wang 34705c6c029SViswas G for (i = 0; i < count; i++) { 348e590adfdSSakthivel K /* MPI Memory region 4 for producer Index of outbound queues */ 34905c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset+i].num_elements = 1; 35005c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset+i].element_size = 4; 35105c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset+i].total_len = 4; 35205c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4; 353dbf9bfe6Sjack wang 354e590adfdSSakthivel K if (ent->driver_data != chip_8001) { 355e590adfdSSakthivel K /* MPI Memory region 6 Outbound queues */ 35605c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].num_elements = 357e590adfdSSakthivel K PM8001_MPI_QUEUE; 35805c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].element_size 35905c6c029SViswas G = 128; 36005c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].total_len = 361e590adfdSSakthivel K PM8001_MPI_QUEUE * 128; 36205c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].alignment 36305c6c029SViswas G = 128; 364e590adfdSSakthivel K } else { 365e590adfdSSakthivel K /* MPI Memory region 6 Outbound queues */ 36605c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].num_elements = 367e590adfdSSakthivel K PM8001_MPI_QUEUE; 36805c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].element_size 36905c6c029SViswas G = 64; 37005c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].total_len = 371e590adfdSSakthivel K PM8001_MPI_QUEUE * 64; 37205c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64; 373e590adfdSSakthivel K } 374e590adfdSSakthivel K 375e590adfdSSakthivel K } 376dbf9bfe6Sjack wang /* Memory region write DMA*/ 377dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[NVMD].num_elements = 1; 378dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[NVMD].element_size = 4096; 379dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[NVMD].total_len = 4096; 380dbf9bfe6Sjack wang 3811c75a679SSakthivel K /* Memory region for fw flash */ 3821c75a679SSakthivel K pm8001_ha->memoryMap.region[FW_FLASH].total_len = 4096; 3831c75a679SSakthivel K 384d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].num_elements = 1; 385d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].total_len = 0x10000; 386d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].element_size = 0x10000; 387d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].alignment = 0x10000; 38805c6c029SViswas G for (i = 0; i < pm8001_ha->max_memcnt; i++) { 389dbf9bfe6Sjack wang if (pm8001_mem_alloc(pm8001_ha->pdev, 390dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].virt_ptr, 391dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].phys_addr, 392dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].phys_addr_hi, 393dbf9bfe6Sjack wang &pm8001_ha->memoryMap.region[i].phys_addr_lo, 394dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].total_len, 395dbf9bfe6Sjack wang pm8001_ha->memoryMap.region[i].alignment) != 0) { 3961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 3971b5d2793SJoe Perches "Mem%d alloc failed\n", 3981b5d2793SJoe Perches i); 399dbf9bfe6Sjack wang goto err_out; 400dbf9bfe6Sjack wang } 401dbf9bfe6Sjack wang } 402dbf9bfe6Sjack wang 40327bc43bdSViswas G /* Memory region for devices*/ 40427bc43bdSViswas G pm8001_ha->devices = kzalloc(PM8001_MAX_DEVICES 40527bc43bdSViswas G * sizeof(struct pm8001_device), GFP_KERNEL); 40627bc43bdSViswas G if (!pm8001_ha->devices) { 40727bc43bdSViswas G rc = -ENOMEM; 40827bc43bdSViswas G goto err_out_nodev; 40927bc43bdSViswas G } 410dbf9bfe6Sjack wang for (i = 0; i < PM8001_MAX_DEVICES; i++) { 411aa9f8328SJames Bottomley pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED; 412dbf9bfe6Sjack wang pm8001_ha->devices[i].id = i; 413dbf9bfe6Sjack wang pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES; 4144a2efd4bSViswas G atomic_set(&pm8001_ha->devices[i].running_req, 0); 415dbf9bfe6Sjack wang } 416dbf9bfe6Sjack wang pm8001_ha->flags = PM8001F_INIT_TIME; 417dbf9bfe6Sjack wang /* Initialize tags */ 418dbf9bfe6Sjack wang pm8001_tag_init(pm8001_ha); 419dbf9bfe6Sjack wang return 0; 42027bc43bdSViswas G 42105c6c029SViswas G err_out_shost: 42205c6c029SViswas G scsi_remove_host(pm8001_ha->shost); 42327bc43bdSViswas G err_out_nodev: 42427bc43bdSViswas G for (i = 0; i < pm8001_ha->max_memcnt; i++) { 42527bc43bdSViswas G if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { 42627bc43bdSViswas G pci_free_consistent(pm8001_ha->pdev, 42727bc43bdSViswas G (pm8001_ha->memoryMap.region[i].total_len + 42827bc43bdSViswas G pm8001_ha->memoryMap.region[i].alignment), 42927bc43bdSViswas G pm8001_ha->memoryMap.region[i].virt_ptr, 43027bc43bdSViswas G pm8001_ha->memoryMap.region[i].phys_addr); 43127bc43bdSViswas G } 43227bc43bdSViswas G } 433dbf9bfe6Sjack wang err_out: 434dbf9bfe6Sjack wang return 1; 435dbf9bfe6Sjack wang } 436dbf9bfe6Sjack wang 437dbf9bfe6Sjack wang /** 438dbf9bfe6Sjack wang * pm8001_ioremap - remap the pci high physical address to kernal virtual 439dbf9bfe6Sjack wang * address so that we can access them. 440dbf9bfe6Sjack wang * @pm8001_ha:our hba structure. 441dbf9bfe6Sjack wang */ 442dbf9bfe6Sjack wang static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha) 443dbf9bfe6Sjack wang { 444dbf9bfe6Sjack wang u32 bar; 445dbf9bfe6Sjack wang u32 logicalBar = 0; 446dbf9bfe6Sjack wang struct pci_dev *pdev; 447dbf9bfe6Sjack wang 448dbf9bfe6Sjack wang pdev = pm8001_ha->pdev; 449dbf9bfe6Sjack wang /* map pci mem (PMC pci base 0-3)*/ 450c9c13ba4SDenis Efremov for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { 451dbf9bfe6Sjack wang /* 452dbf9bfe6Sjack wang ** logical BARs for SPC: 453dbf9bfe6Sjack wang ** bar 0 and 1 - logical BAR0 454dbf9bfe6Sjack wang ** bar 2 and 3 - logical BAR1 455dbf9bfe6Sjack wang ** bar4 - logical BAR2 456dbf9bfe6Sjack wang ** bar5 - logical BAR3 457dbf9bfe6Sjack wang ** Skip the appropriate assignments: 458dbf9bfe6Sjack wang */ 459dbf9bfe6Sjack wang if ((bar == 1) || (bar == 3)) 460dbf9bfe6Sjack wang continue; 461dbf9bfe6Sjack wang if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { 462dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].membase = 463dbf9bfe6Sjack wang pci_resource_start(pdev, bar); 464dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize = 465dbf9bfe6Sjack wang pci_resource_len(pdev, bar); 466dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memvirtaddr = 467dbf9bfe6Sjack wang ioremap(pm8001_ha->io_mem[logicalBar].membase, 468dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize); 4691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 4701b5d2793SJoe Perches "PCI: bar %d, logicalBar %d\n", 4711b5d2793SJoe Perches bar, logicalBar); 4721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 473e590adfdSSakthivel K "base addr %llx virt_addr=%llx len=%d\n", 474e590adfdSSakthivel K (u64)pm8001_ha->io_mem[logicalBar].membase, 475da1dccceSAnand Kumar Santhanam (u64)(unsigned long) 476da1dccceSAnand Kumar Santhanam pm8001_ha->io_mem[logicalBar].memvirtaddr, 4771b5d2793SJoe Perches pm8001_ha->io_mem[logicalBar].memsize); 478dbf9bfe6Sjack wang } else { 479dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].membase = 0; 480dbf9bfe6Sjack wang pm8001_ha->io_mem[logicalBar].memsize = 0; 48162fb8b34SSaurav Girepunje pm8001_ha->io_mem[logicalBar].memvirtaddr = NULL; 482dbf9bfe6Sjack wang } 483dbf9bfe6Sjack wang logicalBar++; 484dbf9bfe6Sjack wang } 485dbf9bfe6Sjack wang return 0; 486dbf9bfe6Sjack wang } 487dbf9bfe6Sjack wang 488dbf9bfe6Sjack wang /** 489dbf9bfe6Sjack wang * pm8001_pci_alloc - initialize our ha card structure 490dbf9bfe6Sjack wang * @pdev: pci device. 491dbf9bfe6Sjack wang * @ent: ent 492dbf9bfe6Sjack wang * @shost: scsi host struct which has been initialized before. 493dbf9bfe6Sjack wang */ 4946f039790SGreg Kroah-Hartman static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev, 495e590adfdSSakthivel K const struct pci_device_id *ent, 4966f039790SGreg Kroah-Hartman struct Scsi_Host *shost) 497e590adfdSSakthivel K 498dbf9bfe6Sjack wang { 499dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 500dbf9bfe6Sjack wang struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 5016cd60b37SNikith Ganigarakoppal int j; 502dbf9bfe6Sjack wang 503dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 504dbf9bfe6Sjack wang if (!pm8001_ha) 505dbf9bfe6Sjack wang return NULL; 506dbf9bfe6Sjack wang 507dbf9bfe6Sjack wang pm8001_ha->pdev = pdev; 508dbf9bfe6Sjack wang pm8001_ha->dev = &pdev->dev; 509e590adfdSSakthivel K pm8001_ha->chip_id = ent->driver_data; 510dbf9bfe6Sjack wang pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id]; 511dbf9bfe6Sjack wang pm8001_ha->irq = pdev->irq; 512dbf9bfe6Sjack wang pm8001_ha->sas = sha; 513dbf9bfe6Sjack wang pm8001_ha->shost = shost; 514dbf9bfe6Sjack wang pm8001_ha->id = pm8001_id++; 5157370672dSpeter chang pm8001_ha->logging_level = logging_level; 516dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 5173e253d96Speter chang if (link_rate >= 1 && link_rate <= 15) 5183e253d96Speter chang pm8001_ha->link_rate = (link_rate << 8); 5193e253d96Speter chang else { 5203e253d96Speter chang pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 | 5213e253d96Speter chang LINKRATE_60 | LINKRATE_120; 5221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 5231b5d2793SJoe Perches "Setting link rate to default value\n"); 5243e253d96Speter chang } 525dbf9bfe6Sjack wang sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); 526f74cf271SSakthivel K /* IOMB size is 128 for 8088/89 controllers */ 527f74cf271SSakthivel K if (pm8001_ha->chip_id != chip_8001) 528f74cf271SSakthivel K pm8001_ha->iomb_size = IOMB_SIZE_SPCV; 529f74cf271SSakthivel K else 530f74cf271SSakthivel K pm8001_ha->iomb_size = IOMB_SIZE_SPC; 531f74cf271SSakthivel K 532dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 5336cd60b37SNikith Ganigarakoppal /* Tasklet for non msi-x interrupt handler */ 534c913df3fSBenjamin Rood if ((!pdev->msix_cap || !pci_msi_enabled()) 535c913df3fSBenjamin Rood || (pm8001_ha->chip_id == chip_8001)) 5366cd60b37SNikith Ganigarakoppal tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet, 5376cd60b37SNikith Ganigarakoppal (unsigned long)&(pm8001_ha->irq_vector[0])); 5386cd60b37SNikith Ganigarakoppal else 5396cd60b37SNikith Ganigarakoppal for (j = 0; j < PM8001_MAX_MSIX_VEC; j++) 5406cd60b37SNikith Ganigarakoppal tasklet_init(&pm8001_ha->tasklet[j], pm8001_tasklet, 5416cd60b37SNikith Ganigarakoppal (unsigned long)&(pm8001_ha->irq_vector[j])); 542dbf9bfe6Sjack wang #endif 543dbf9bfe6Sjack wang pm8001_ioremap(pm8001_ha); 544e590adfdSSakthivel K if (!pm8001_alloc(pm8001_ha, ent)) 545dbf9bfe6Sjack wang return pm8001_ha; 546dbf9bfe6Sjack wang pm8001_free(pm8001_ha); 547dbf9bfe6Sjack wang return NULL; 548dbf9bfe6Sjack wang } 549dbf9bfe6Sjack wang 550dbf9bfe6Sjack wang /** 551dbf9bfe6Sjack wang * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit 552dbf9bfe6Sjack wang * @pdev: pci device. 553dbf9bfe6Sjack wang */ 554dbf9bfe6Sjack wang static int pci_go_44(struct pci_dev *pdev) 555dbf9bfe6Sjack wang { 556dbf9bfe6Sjack wang int rc; 557dbf9bfe6Sjack wang 558f73bdebdSChristoph Hellwig rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44)); 559dbf9bfe6Sjack wang if (rc) { 560f73bdebdSChristoph Hellwig rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 561f73bdebdSChristoph Hellwig if (rc) 562dbf9bfe6Sjack wang dev_printk(KERN_ERR, &pdev->dev, 563dbf9bfe6Sjack wang "32-bit DMA enable failed\n"); 564dbf9bfe6Sjack wang } 565dbf9bfe6Sjack wang return rc; 566dbf9bfe6Sjack wang } 567dbf9bfe6Sjack wang 568dbf9bfe6Sjack wang /** 569dbf9bfe6Sjack wang * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them. 570dbf9bfe6Sjack wang * @shost: scsi host which has been allocated outside. 571dbf9bfe6Sjack wang * @chip_info: our ha struct. 572dbf9bfe6Sjack wang */ 5736f039790SGreg Kroah-Hartman static int pm8001_prep_sas_ha_init(struct Scsi_Host *shost, 574dbf9bfe6Sjack wang const struct pm8001_chip_info *chip_info) 575dbf9bfe6Sjack wang { 576dbf9bfe6Sjack wang int phy_nr, port_nr; 577dbf9bfe6Sjack wang struct asd_sas_phy **arr_phy; 578dbf9bfe6Sjack wang struct asd_sas_port **arr_port; 579dbf9bfe6Sjack wang struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 580dbf9bfe6Sjack wang 581dbf9bfe6Sjack wang phy_nr = chip_info->n_phy; 582dbf9bfe6Sjack wang port_nr = phy_nr; 583dbf9bfe6Sjack wang memset(sha, 0x00, sizeof(*sha)); 584dbf9bfe6Sjack wang arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL); 585dbf9bfe6Sjack wang if (!arr_phy) 586dbf9bfe6Sjack wang goto exit; 587dbf9bfe6Sjack wang arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL); 588dbf9bfe6Sjack wang if (!arr_port) 589dbf9bfe6Sjack wang goto exit_free2; 590dbf9bfe6Sjack wang 591dbf9bfe6Sjack wang sha->sas_phy = arr_phy; 592dbf9bfe6Sjack wang sha->sas_port = arr_port; 593dbf9bfe6Sjack wang sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL); 594dbf9bfe6Sjack wang if (!sha->lldd_ha) 595dbf9bfe6Sjack wang goto exit_free1; 596dbf9bfe6Sjack wang 597dbf9bfe6Sjack wang shost->transportt = pm8001_stt; 598dbf9bfe6Sjack wang shost->max_id = PM8001_MAX_DEVICES; 599dbf9bfe6Sjack wang shost->max_lun = 8; 600dbf9bfe6Sjack wang shost->max_channel = 0; 601dbf9bfe6Sjack wang shost->unique_id = pm8001_id; 602dbf9bfe6Sjack wang shost->max_cmd_len = 16; 603dbf9bfe6Sjack wang shost->can_queue = PM8001_CAN_QUEUE; 604dbf9bfe6Sjack wang shost->cmd_per_lun = 32; 605dbf9bfe6Sjack wang return 0; 606dbf9bfe6Sjack wang exit_free1: 607dbf9bfe6Sjack wang kfree(arr_port); 608dbf9bfe6Sjack wang exit_free2: 609dbf9bfe6Sjack wang kfree(arr_phy); 610dbf9bfe6Sjack wang exit: 611dbf9bfe6Sjack wang return -1; 612dbf9bfe6Sjack wang } 613dbf9bfe6Sjack wang 614dbf9bfe6Sjack wang /** 615dbf9bfe6Sjack wang * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas 616dbf9bfe6Sjack wang * @shost: scsi host which has been allocated outside 617dbf9bfe6Sjack wang * @chip_info: our ha struct. 618dbf9bfe6Sjack wang */ 6196f039790SGreg Kroah-Hartman static void pm8001_post_sas_ha_init(struct Scsi_Host *shost, 620dbf9bfe6Sjack wang const struct pm8001_chip_info *chip_info) 621dbf9bfe6Sjack wang { 622dbf9bfe6Sjack wang int i = 0; 623dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 624dbf9bfe6Sjack wang struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 625dbf9bfe6Sjack wang 626dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 627dbf9bfe6Sjack wang for (i = 0; i < chip_info->n_phy; i++) { 628dbf9bfe6Sjack wang sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy; 629dbf9bfe6Sjack wang sha->sas_port[i] = &pm8001_ha->port[i].sas_port; 6306c85e4bcSViswas G sha->sas_phy[i]->sas_addr = 6316c85e4bcSViswas G (u8 *)&pm8001_ha->phy[i].dev_sas_addr; 632dbf9bfe6Sjack wang } 633dbf9bfe6Sjack wang sha->sas_ha_name = DRV_NAME; 634dbf9bfe6Sjack wang sha->dev = pm8001_ha->dev; 6356c85e4bcSViswas G sha->strict_wide_ports = 1; 636dbf9bfe6Sjack wang sha->lldd_module = THIS_MODULE; 637dbf9bfe6Sjack wang sha->sas_addr = &pm8001_ha->sas_addr[0]; 638dbf9bfe6Sjack wang sha->num_phys = chip_info->n_phy; 639dbf9bfe6Sjack wang sha->core.shost = shost; 640dbf9bfe6Sjack wang } 641dbf9bfe6Sjack wang 642dbf9bfe6Sjack wang /** 643dbf9bfe6Sjack wang * pm8001_init_sas_add - initialize sas address 644e802fc43SLee Jones * @pm8001_ha: our ha struct. 645dbf9bfe6Sjack wang * 646dbf9bfe6Sjack wang * Currently we just set the fixed SAS address to our HBA,for manufacture, 647dbf9bfe6Sjack wang * it should read from the EEPROM 648dbf9bfe6Sjack wang */ 649dbf9bfe6Sjack wang static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) 650dbf9bfe6Sjack wang { 651a33a0155SSakthivel K u8 i, j; 6526c85e4bcSViswas G u8 sas_add[8]; 653dbf9bfe6Sjack wang #ifdef PM8001_READ_VPD 654a33a0155SSakthivel K /* For new SPC controllers WWN is stored in flash vpd 655a33a0155SSakthivel K * For SPC/SPCve controllers WWN is stored in EEPROM 656a33a0155SSakthivel K * For Older SPC WWN is stored in NVMD 657a33a0155SSakthivel K */ 658dbf9bfe6Sjack wang DECLARE_COMPLETION_ONSTACK(completion); 6597c8356d9Sjack wang struct pm8001_ioctl_payload payload; 660a33a0155SSakthivel K u16 deviceid; 6615b4ce882STomas Henzl int rc; 6625b4ce882STomas Henzl 663a33a0155SSakthivel K pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid); 664dbf9bfe6Sjack wang pm8001_ha->nvmd_completion = &completion; 665a33a0155SSakthivel K 666a33a0155SSakthivel K if (pm8001_ha->chip_id == chip_8001) { 667f49d2132SBradley Grove if (deviceid == 0x8081 || deviceid == 0x0042) { 668a33a0155SSakthivel K payload.minor_function = 4; 6699b889846SViswas G payload.rd_length = 4096; 670a33a0155SSakthivel K } else { 6717c8356d9Sjack wang payload.minor_function = 0; 6729b889846SViswas G payload.rd_length = 128; 673a33a0155SSakthivel K } 67410efa460SBenjamin Rood } else if ((pm8001_ha->chip_id == chip_8070 || 67510efa460SBenjamin Rood pm8001_ha->chip_id == chip_8072) && 67610efa460SBenjamin Rood pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) { 67710efa460SBenjamin Rood payload.minor_function = 4; 6789b889846SViswas G payload.rd_length = 4096; 679a33a0155SSakthivel K } else { 680a33a0155SSakthivel K payload.minor_function = 1; 6819b889846SViswas G payload.rd_length = 4096; 682a33a0155SSakthivel K } 683a33a0155SSakthivel K payload.offset = 0; 6849b889846SViswas G payload.func_specific = kzalloc(payload.rd_length, GFP_KERNEL); 6855b4ce882STomas Henzl if (!payload.func_specific) { 6861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "mem alloc fail\n"); 6875b4ce882STomas Henzl return; 6885b4ce882STomas Henzl } 6895b4ce882STomas Henzl rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); 6905b4ce882STomas Henzl if (rc) { 6915b4ce882STomas Henzl kfree(payload.func_specific); 6921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n"); 6935b4ce882STomas Henzl return; 6945b4ce882STomas Henzl } 695dbf9bfe6Sjack wang wait_for_completion(&completion); 696a33a0155SSakthivel K 697a33a0155SSakthivel K for (i = 0, j = 0; i <= 7; i++, j++) { 698a33a0155SSakthivel K if (pm8001_ha->chip_id == chip_8001) { 699a33a0155SSakthivel K if (deviceid == 0x8081) 700a33a0155SSakthivel K pm8001_ha->sas_addr[j] = 701a33a0155SSakthivel K payload.func_specific[0x704 + i]; 702f49d2132SBradley Grove else if (deviceid == 0x0042) 703f49d2132SBradley Grove pm8001_ha->sas_addr[j] = 704f49d2132SBradley Grove payload.func_specific[0x010 + i]; 70510efa460SBenjamin Rood } else if ((pm8001_ha->chip_id == chip_8070 || 70610efa460SBenjamin Rood pm8001_ha->chip_id == chip_8072) && 70710efa460SBenjamin Rood pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) { 70810efa460SBenjamin Rood pm8001_ha->sas_addr[j] = 70910efa460SBenjamin Rood payload.func_specific[0x010 + i]; 710a33a0155SSakthivel K } else 711a33a0155SSakthivel K pm8001_ha->sas_addr[j] = 712a33a0155SSakthivel K payload.func_specific[0x804 + i]; 713a33a0155SSakthivel K } 7146c85e4bcSViswas G memcpy(sas_add, pm8001_ha->sas_addr, SAS_ADDR_SIZE); 715dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 7166c85e4bcSViswas G if (i && ((i % 4) == 0)) 7176c85e4bcSViswas G sas_add[7] = sas_add[7] + 4; 718a33a0155SSakthivel K memcpy(&pm8001_ha->phy[i].dev_sas_addr, 7196c85e4bcSViswas G sas_add, SAS_ADDR_SIZE); 7201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "phy %d sas_addr = %016llx\n", i, 7211b5d2793SJoe Perches pm8001_ha->phy[i].dev_sas_addr); 722dbf9bfe6Sjack wang } 7235b4ce882STomas Henzl kfree(payload.func_specific); 724dbf9bfe6Sjack wang #else 725dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 7267c8356d9Sjack wang pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL; 727dbf9bfe6Sjack wang pm8001_ha->phy[i].dev_sas_addr = 728dbf9bfe6Sjack wang cpu_to_be64((u64) 729dbf9bfe6Sjack wang (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); 730dbf9bfe6Sjack wang } 731dbf9bfe6Sjack wang memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr, 732dbf9bfe6Sjack wang SAS_ADDR_SIZE); 733dbf9bfe6Sjack wang #endif 734dbf9bfe6Sjack wang } 735dbf9bfe6Sjack wang 73627909407SAnand Kumar Santhanam /* 73727909407SAnand Kumar Santhanam * pm8001_get_phy_settings_info : Read phy setting values. 73827909407SAnand Kumar Santhanam * @pm8001_ha : our hba. 73927909407SAnand Kumar Santhanam */ 740f2c6f180SMaurizio Lombardi static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha) 74127909407SAnand Kumar Santhanam { 74227909407SAnand Kumar Santhanam 74327909407SAnand Kumar Santhanam #ifdef PM8001_READ_VPD 74427909407SAnand Kumar Santhanam /*OPTION ROM FLASH read for the SPC cards */ 74527909407SAnand Kumar Santhanam DECLARE_COMPLETION_ONSTACK(completion); 74627909407SAnand Kumar Santhanam struct pm8001_ioctl_payload payload; 7475b4ce882STomas Henzl int rc; 74827909407SAnand Kumar Santhanam 74927909407SAnand Kumar Santhanam pm8001_ha->nvmd_completion = &completion; 75027909407SAnand Kumar Santhanam /* SAS ADDRESS read from flash / EEPROM */ 75127909407SAnand Kumar Santhanam payload.minor_function = 6; 75227909407SAnand Kumar Santhanam payload.offset = 0; 7539b889846SViswas G payload.rd_length = 4096; 75427909407SAnand Kumar Santhanam payload.func_specific = kzalloc(4096, GFP_KERNEL); 755f2c6f180SMaurizio Lombardi if (!payload.func_specific) 756f2c6f180SMaurizio Lombardi return -ENOMEM; 75727909407SAnand Kumar Santhanam /* Read phy setting values from flash */ 7585b4ce882STomas Henzl rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); 7595b4ce882STomas Henzl if (rc) { 7605b4ce882STomas Henzl kfree(payload.func_specific); 7611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n"); 7625b4ce882STomas Henzl return -ENOMEM; 7635b4ce882STomas Henzl } 76427909407SAnand Kumar Santhanam wait_for_completion(&completion); 76527909407SAnand Kumar Santhanam pm8001_set_phy_profile(pm8001_ha, sizeof(u8), payload.func_specific); 766f2c6f180SMaurizio Lombardi kfree(payload.func_specific); 76727909407SAnand Kumar Santhanam #endif 768f2c6f180SMaurizio Lombardi return 0; 76927909407SAnand Kumar Santhanam } 77027909407SAnand Kumar Santhanam 771c5614df7SBenjamin Rood struct pm8001_mpi3_phy_pg_trx_config { 772c5614df7SBenjamin Rood u32 LaneLosCfg; 773c5614df7SBenjamin Rood u32 LanePgaCfg1; 774c5614df7SBenjamin Rood u32 LanePisoCfg1; 775c5614df7SBenjamin Rood u32 LanePisoCfg2; 776c5614df7SBenjamin Rood u32 LanePisoCfg3; 777c5614df7SBenjamin Rood u32 LanePisoCfg4; 778c5614df7SBenjamin Rood u32 LanePisoCfg5; 779c5614df7SBenjamin Rood u32 LanePisoCfg6; 780c5614df7SBenjamin Rood u32 LaneBctCtrl; 781c5614df7SBenjamin Rood }; 782c5614df7SBenjamin Rood 783c5614df7SBenjamin Rood /** 784c5614df7SBenjamin Rood * pm8001_get_internal_phy_settings : Retrieves the internal PHY settings 785c5614df7SBenjamin Rood * @pm8001_ha : our adapter 786c5614df7SBenjamin Rood * @phycfg : PHY config page to populate 787c5614df7SBenjamin Rood */ 788c5614df7SBenjamin Rood static 789c5614df7SBenjamin Rood void pm8001_get_internal_phy_settings(struct pm8001_hba_info *pm8001_ha, 790c5614df7SBenjamin Rood struct pm8001_mpi3_phy_pg_trx_config *phycfg) 791c5614df7SBenjamin Rood { 792c5614df7SBenjamin Rood phycfg->LaneLosCfg = 0x00000132; 793c5614df7SBenjamin Rood phycfg->LanePgaCfg1 = 0x00203949; 794c5614df7SBenjamin Rood phycfg->LanePisoCfg1 = 0x000000FF; 795c5614df7SBenjamin Rood phycfg->LanePisoCfg2 = 0xFF000001; 796c5614df7SBenjamin Rood phycfg->LanePisoCfg3 = 0xE7011300; 797c5614df7SBenjamin Rood phycfg->LanePisoCfg4 = 0x631C40C0; 798c5614df7SBenjamin Rood phycfg->LanePisoCfg5 = 0xF8102036; 799c5614df7SBenjamin Rood phycfg->LanePisoCfg6 = 0xF74A1000; 800c5614df7SBenjamin Rood phycfg->LaneBctCtrl = 0x00FB33F8; 801c5614df7SBenjamin Rood } 802c5614df7SBenjamin Rood 803c5614df7SBenjamin Rood /** 804c5614df7SBenjamin Rood * pm8001_get_external_phy_settings : Retrieves the external PHY settings 805c5614df7SBenjamin Rood * @pm8001_ha : our adapter 806c5614df7SBenjamin Rood * @phycfg : PHY config page to populate 807c5614df7SBenjamin Rood */ 808c5614df7SBenjamin Rood static 809c5614df7SBenjamin Rood void pm8001_get_external_phy_settings(struct pm8001_hba_info *pm8001_ha, 810c5614df7SBenjamin Rood struct pm8001_mpi3_phy_pg_trx_config *phycfg) 811c5614df7SBenjamin Rood { 812c5614df7SBenjamin Rood phycfg->LaneLosCfg = 0x00000132; 813c5614df7SBenjamin Rood phycfg->LanePgaCfg1 = 0x00203949; 814c5614df7SBenjamin Rood phycfg->LanePisoCfg1 = 0x000000FF; 815c5614df7SBenjamin Rood phycfg->LanePisoCfg2 = 0xFF000001; 816c5614df7SBenjamin Rood phycfg->LanePisoCfg3 = 0xE7011300; 817c5614df7SBenjamin Rood phycfg->LanePisoCfg4 = 0x63349140; 818c5614df7SBenjamin Rood phycfg->LanePisoCfg5 = 0xF8102036; 819c5614df7SBenjamin Rood phycfg->LanePisoCfg6 = 0xF80D9300; 820c5614df7SBenjamin Rood phycfg->LaneBctCtrl = 0x00FB33F8; 821c5614df7SBenjamin Rood } 822c5614df7SBenjamin Rood 823c5614df7SBenjamin Rood /** 824c5614df7SBenjamin Rood * pm8001_get_phy_mask : Retrieves the mask that denotes if a PHY is int/ext 825c5614df7SBenjamin Rood * @pm8001_ha : our adapter 826c5614df7SBenjamin Rood * @phymask : The PHY mask 827c5614df7SBenjamin Rood */ 828c5614df7SBenjamin Rood static 829c5614df7SBenjamin Rood void pm8001_get_phy_mask(struct pm8001_hba_info *pm8001_ha, int *phymask) 830c5614df7SBenjamin Rood { 831c5614df7SBenjamin Rood switch (pm8001_ha->pdev->subsystem_device) { 832c5614df7SBenjamin Rood case 0x0070: /* H1280 - 8 external 0 internal */ 833c5614df7SBenjamin Rood case 0x0072: /* H12F0 - 16 external 0 internal */ 834c5614df7SBenjamin Rood *phymask = 0x0000; 835c5614df7SBenjamin Rood break; 836c5614df7SBenjamin Rood 837c5614df7SBenjamin Rood case 0x0071: /* H1208 - 0 external 8 internal */ 838c5614df7SBenjamin Rood case 0x0073: /* H120F - 0 external 16 internal */ 839c5614df7SBenjamin Rood *phymask = 0xFFFF; 840c5614df7SBenjamin Rood break; 841c5614df7SBenjamin Rood 842c5614df7SBenjamin Rood case 0x0080: /* H1244 - 4 external 4 internal */ 843c5614df7SBenjamin Rood *phymask = 0x00F0; 844c5614df7SBenjamin Rood break; 845c5614df7SBenjamin Rood 846c5614df7SBenjamin Rood case 0x0081: /* H1248 - 4 external 8 internal */ 847c5614df7SBenjamin Rood *phymask = 0x0FF0; 848c5614df7SBenjamin Rood break; 849c5614df7SBenjamin Rood 850c5614df7SBenjamin Rood case 0x0082: /* H1288 - 8 external 8 internal */ 851c5614df7SBenjamin Rood *phymask = 0xFF00; 852c5614df7SBenjamin Rood break; 853c5614df7SBenjamin Rood 854c5614df7SBenjamin Rood default: 8551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 8561b5d2793SJoe Perches "Unknown subsystem device=0x%.04x\n", 8571b5d2793SJoe Perches pm8001_ha->pdev->subsystem_device); 858c5614df7SBenjamin Rood } 859c5614df7SBenjamin Rood } 860c5614df7SBenjamin Rood 861c5614df7SBenjamin Rood /** 862c5614df7SBenjamin Rood * pm8001_set_phy_settings_ven_117c_12Gb : Configure ATTO 12Gb PHY settings 863c5614df7SBenjamin Rood * @pm8001_ha : our adapter 864c5614df7SBenjamin Rood */ 865c5614df7SBenjamin Rood static 866c5614df7SBenjamin Rood int pm8001_set_phy_settings_ven_117c_12G(struct pm8001_hba_info *pm8001_ha) 867c5614df7SBenjamin Rood { 868c5614df7SBenjamin Rood struct pm8001_mpi3_phy_pg_trx_config phycfg_int; 869c5614df7SBenjamin Rood struct pm8001_mpi3_phy_pg_trx_config phycfg_ext; 870c5614df7SBenjamin Rood int phymask = 0; 871c5614df7SBenjamin Rood int i = 0; 872c5614df7SBenjamin Rood 873c5614df7SBenjamin Rood memset(&phycfg_int, 0, sizeof(phycfg_int)); 874c5614df7SBenjamin Rood memset(&phycfg_ext, 0, sizeof(phycfg_ext)); 875c5614df7SBenjamin Rood 876c5614df7SBenjamin Rood pm8001_get_internal_phy_settings(pm8001_ha, &phycfg_int); 877c5614df7SBenjamin Rood pm8001_get_external_phy_settings(pm8001_ha, &phycfg_ext); 878c5614df7SBenjamin Rood pm8001_get_phy_mask(pm8001_ha, &phymask); 879c5614df7SBenjamin Rood 880c5614df7SBenjamin Rood for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 881c5614df7SBenjamin Rood if (phymask & (1 << i)) {/* Internal PHY */ 882c5614df7SBenjamin Rood pm8001_set_phy_profile_single(pm8001_ha, i, 883c5614df7SBenjamin Rood sizeof(phycfg_int) / sizeof(u32), 884c5614df7SBenjamin Rood (u32 *)&phycfg_int); 885c5614df7SBenjamin Rood 886c5614df7SBenjamin Rood } else { /* External PHY */ 887c5614df7SBenjamin Rood pm8001_set_phy_profile_single(pm8001_ha, i, 888c5614df7SBenjamin Rood sizeof(phycfg_ext) / sizeof(u32), 889c5614df7SBenjamin Rood (u32 *)&phycfg_ext); 890c5614df7SBenjamin Rood } 891c5614df7SBenjamin Rood } 892c5614df7SBenjamin Rood 893c5614df7SBenjamin Rood return 0; 894c5614df7SBenjamin Rood } 895c5614df7SBenjamin Rood 896da2dd618SBenjamin Rood /** 897da2dd618SBenjamin Rood * pm8001_configure_phy_settings : Configures PHY settings based on vendor ID. 898da2dd618SBenjamin Rood * @pm8001_ha : our hba. 899da2dd618SBenjamin Rood */ 900da2dd618SBenjamin Rood static int pm8001_configure_phy_settings(struct pm8001_hba_info *pm8001_ha) 901da2dd618SBenjamin Rood { 902da2dd618SBenjamin Rood switch (pm8001_ha->pdev->subsystem_vendor) { 903da2dd618SBenjamin Rood case PCI_VENDOR_ID_ATTO: 904c5614df7SBenjamin Rood if (pm8001_ha->pdev->device == 0x0042) /* 6Gb */ 905c5614df7SBenjamin Rood return 0; 906c5614df7SBenjamin Rood else 907c5614df7SBenjamin Rood return pm8001_set_phy_settings_ven_117c_12G(pm8001_ha); 908c5614df7SBenjamin Rood 909da2dd618SBenjamin Rood case PCI_VENDOR_ID_ADAPTEC2: 910da2dd618SBenjamin Rood case 0: 911da2dd618SBenjamin Rood return 0; 912da2dd618SBenjamin Rood 913da2dd618SBenjamin Rood default: 914da2dd618SBenjamin Rood return pm8001_get_phy_settings_info(pm8001_ha); 915da2dd618SBenjamin Rood } 916da2dd618SBenjamin Rood } 917da2dd618SBenjamin Rood 918dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 919dbf9bfe6Sjack wang /** 920dbf9bfe6Sjack wang * pm8001_setup_msix - enable MSI-X interrupt 921e802fc43SLee Jones * @pm8001_ha: our ha struct. 922dbf9bfe6Sjack wang */ 9231245ee59SSakthivel K static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha) 924dbf9bfe6Sjack wang { 9251245ee59SSakthivel K u32 number_of_intr; 92605c6c029SViswas G int rc, cpu_online_count; 92705c6c029SViswas G unsigned int allocated_irq_vectors; 9281245ee59SSakthivel K 9291245ee59SSakthivel K /* SPCv controllers supports 64 msi-x */ 9301245ee59SSakthivel K if (pm8001_ha->chip_id == chip_8001) { 9311245ee59SSakthivel K number_of_intr = 1; 9321245ee59SSakthivel K } else { 9331245ee59SSakthivel K number_of_intr = PM8001_MAX_MSIX_VEC; 9341245ee59SSakthivel K } 9351245ee59SSakthivel K 93605c6c029SViswas G cpu_online_count = num_online_cpus(); 93705c6c029SViswas G number_of_intr = min_t(int, cpu_online_count, number_of_intr); 938a76037ffSChristoph Hellwig rc = pci_alloc_irq_vectors(pm8001_ha->pdev, number_of_intr, 939a76037ffSChristoph Hellwig number_of_intr, PCI_IRQ_MSIX); 94005c6c029SViswas G allocated_irq_vectors = rc; 941a76037ffSChristoph Hellwig if (rc < 0) 942b4d511e5SAlexander Gordeev return rc; 94305c6c029SViswas G 94405c6c029SViswas G /* Assigns the number of interrupts */ 94505c6c029SViswas G number_of_intr = min_t(int, allocated_irq_vectors, number_of_intr); 946a76037ffSChristoph Hellwig pm8001_ha->number_of_intr = number_of_intr; 9471245ee59SSakthivel K 94805c6c029SViswas G /* Maximum queue number updating in HBA structure */ 94905c6c029SViswas G pm8001_ha->max_q_num = number_of_intr; 95005c6c029SViswas G 9511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 952a76037ffSChristoph Hellwig "pci_alloc_irq_vectors request ret:%d no of intr %d\n", 9531b5d2793SJoe Perches rc, pm8001_ha->number_of_intr); 954d384be6eSVikram Auradkar return 0; 955d384be6eSVikram Auradkar } 9561245ee59SSakthivel K 957d384be6eSVikram Auradkar static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha) 958d384be6eSVikram Auradkar { 959d384be6eSVikram Auradkar u32 i = 0, j = 0; 960d384be6eSVikram Auradkar int flag = 0, rc = 0; 961d384be6eSVikram Auradkar 962d384be6eSVikram Auradkar if (pm8001_ha->chip_id != chip_8001) 963d384be6eSVikram Auradkar flag &= ~IRQF_SHARED; 964d384be6eSVikram Auradkar 9651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 9661b5d2793SJoe Perches "pci_enable_msix request number of intr %d\n", 9671b5d2793SJoe Perches pm8001_ha->number_of_intr); 968d384be6eSVikram Auradkar 969d384be6eSVikram Auradkar for (i = 0; i < pm8001_ha->number_of_intr; i++) { 97072954936SVikram Auradkar snprintf(pm8001_ha->intr_drvname[i], 97172954936SVikram Auradkar sizeof(pm8001_ha->intr_drvname[0]), 97272954936SVikram Auradkar "%s-%d", pm8001_ha->name, i); 9736cd60b37SNikith Ganigarakoppal pm8001_ha->irq_vector[i].irq_id = i; 9746cd60b37SNikith Ganigarakoppal pm8001_ha->irq_vector[i].drv_inst = pm8001_ha; 9756cd60b37SNikith Ganigarakoppal 976a76037ffSChristoph Hellwig rc = request_irq(pci_irq_vector(pm8001_ha->pdev, i), 9771245ee59SSakthivel K pm8001_interrupt_handler_msix, flag, 97872954936SVikram Auradkar pm8001_ha->intr_drvname[i], 97972954936SVikram Auradkar &(pm8001_ha->irq_vector[i])); 9805607de73SAlexander Gordeev if (rc) { 981b4d511e5SAlexander Gordeev for (j = 0; j < i; j++) { 982a76037ffSChristoph Hellwig free_irq(pci_irq_vector(pm8001_ha->pdev, i), 9836cd60b37SNikith Ganigarakoppal &(pm8001_ha->irq_vector[i])); 984b4d511e5SAlexander Gordeev } 985a76037ffSChristoph Hellwig pci_free_irq_vectors(pm8001_ha->pdev); 986dbf9bfe6Sjack wang break; 987dbf9bfe6Sjack wang } 988dbf9bfe6Sjack wang } 989b4d511e5SAlexander Gordeev 990dbf9bfe6Sjack wang return rc; 991dbf9bfe6Sjack wang } 992dbf9bfe6Sjack wang #endif 993dbf9bfe6Sjack wang 994d384be6eSVikram Auradkar static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha) 995d384be6eSVikram Auradkar { 996d384be6eSVikram Auradkar struct pci_dev *pdev; 997d384be6eSVikram Auradkar 998d384be6eSVikram Auradkar pdev = pm8001_ha->pdev; 999d384be6eSVikram Auradkar 1000d384be6eSVikram Auradkar #ifdef PM8001_USE_MSIX 1001d384be6eSVikram Auradkar if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) 1002d384be6eSVikram Auradkar return pm8001_setup_msix(pm8001_ha); 10031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n"); 1004d384be6eSVikram Auradkar #endif 1005d384be6eSVikram Auradkar return 0; 1006d384be6eSVikram Auradkar } 1007d384be6eSVikram Auradkar 1008dbf9bfe6Sjack wang /** 1009dbf9bfe6Sjack wang * pm8001_request_irq - register interrupt 1010e802fc43SLee Jones * @pm8001_ha: our ha struct. 1011dbf9bfe6Sjack wang */ 1012dbf9bfe6Sjack wang static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) 1013dbf9bfe6Sjack wang { 1014dbf9bfe6Sjack wang struct pci_dev *pdev; 101597ee2088Sjack_wang int rc; 1016dbf9bfe6Sjack wang 1017dbf9bfe6Sjack wang pdev = pm8001_ha->pdev; 1018dbf9bfe6Sjack wang 1019dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 1020c913df3fSBenjamin Rood if (pdev->msix_cap && pci_msi_enabled()) 1021d384be6eSVikram Auradkar return pm8001_request_msix(pm8001_ha); 10221245ee59SSakthivel K else { 10231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n"); 1024dbf9bfe6Sjack wang goto intx; 10251245ee59SSakthivel K } 1026dbf9bfe6Sjack wang #endif 1027dbf9bfe6Sjack wang 1028dbf9bfe6Sjack wang intx: 1029b595076aSUwe Kleine-König /* initialize the INT-X interrupt */ 1030c913df3fSBenjamin Rood pm8001_ha->irq_vector[0].irq_id = 0; 1031c913df3fSBenjamin Rood pm8001_ha->irq_vector[0].drv_inst = pm8001_ha; 10321245ee59SSakthivel K rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED, 103372954936SVikram Auradkar pm8001_ha->name, SHOST_TO_SAS_HA(pm8001_ha->shost)); 1034dbf9bfe6Sjack wang return rc; 1035dbf9bfe6Sjack wang } 1036dbf9bfe6Sjack wang 1037dbf9bfe6Sjack wang /** 1038dbf9bfe6Sjack wang * pm8001_pci_probe - probe supported device 1039dbf9bfe6Sjack wang * @pdev: pci device which kernel has been prepared for. 1040dbf9bfe6Sjack wang * @ent: pci device id 1041dbf9bfe6Sjack wang * 1042dbf9bfe6Sjack wang * This function is the main initialization function, when register a new 1043dbf9bfe6Sjack wang * pci driver it is invoked, all struct an hardware initilization should be done 1044dbf9bfe6Sjack wang * here, also, register interrupt 1045dbf9bfe6Sjack wang */ 10466f039790SGreg Kroah-Hartman static int pm8001_pci_probe(struct pci_dev *pdev, 1047dbf9bfe6Sjack wang const struct pci_device_id *ent) 1048dbf9bfe6Sjack wang { 1049dbf9bfe6Sjack wang unsigned int rc; 1050dbf9bfe6Sjack wang u32 pci_reg; 10511245ee59SSakthivel K u8 i = 0; 1052dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 1053dbf9bfe6Sjack wang struct Scsi_Host *shost = NULL; 1054dbf9bfe6Sjack wang const struct pm8001_chip_info *chip; 1055b40f2882SPeter Chang struct sas_ha_struct *sha; 1056dbf9bfe6Sjack wang 1057dbf9bfe6Sjack wang dev_printk(KERN_INFO, &pdev->dev, 1058a70b8fc3SSakthivel K "pm80xx: driver version %s\n", DRV_VERSION); 1059dbf9bfe6Sjack wang rc = pci_enable_device(pdev); 1060dbf9bfe6Sjack wang if (rc) 1061dbf9bfe6Sjack wang goto err_out_enable; 1062dbf9bfe6Sjack wang pci_set_master(pdev); 1063dbf9bfe6Sjack wang /* 1064dbf9bfe6Sjack wang * Enable pci slot busmaster by setting pci command register. 1065dbf9bfe6Sjack wang * This is required by FW for Cyclone card. 1066dbf9bfe6Sjack wang */ 1067dbf9bfe6Sjack wang 1068dbf9bfe6Sjack wang pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg); 1069dbf9bfe6Sjack wang pci_reg |= 0x157; 1070dbf9bfe6Sjack wang pci_write_config_dword(pdev, PCI_COMMAND, pci_reg); 1071dbf9bfe6Sjack wang rc = pci_request_regions(pdev, DRV_NAME); 1072dbf9bfe6Sjack wang if (rc) 1073dbf9bfe6Sjack wang goto err_out_disable; 1074dbf9bfe6Sjack wang rc = pci_go_44(pdev); 1075dbf9bfe6Sjack wang if (rc) 1076dbf9bfe6Sjack wang goto err_out_regions; 1077dbf9bfe6Sjack wang 1078dbf9bfe6Sjack wang shost = scsi_host_alloc(&pm8001_sht, sizeof(void *)); 1079dbf9bfe6Sjack wang if (!shost) { 1080dbf9bfe6Sjack wang rc = -ENOMEM; 1081dbf9bfe6Sjack wang goto err_out_regions; 1082dbf9bfe6Sjack wang } 1083dbf9bfe6Sjack wang chip = &pm8001_chips[ent->driver_data]; 1084b40f2882SPeter Chang sha = kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL); 1085b40f2882SPeter Chang if (!sha) { 1086dbf9bfe6Sjack wang rc = -ENOMEM; 1087dbf9bfe6Sjack wang goto err_out_free_host; 1088dbf9bfe6Sjack wang } 1089b40f2882SPeter Chang SHOST_TO_SAS_HA(shost) = sha; 1090dbf9bfe6Sjack wang 1091dbf9bfe6Sjack wang rc = pm8001_prep_sas_ha_init(shost, chip); 1092dbf9bfe6Sjack wang if (rc) { 1093dbf9bfe6Sjack wang rc = -ENOMEM; 1094dbf9bfe6Sjack wang goto err_out_free; 1095dbf9bfe6Sjack wang } 1096dbf9bfe6Sjack wang pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost)); 1097e590adfdSSakthivel K /* ent->driver variable is used to differentiate between controllers */ 1098e590adfdSSakthivel K pm8001_ha = pm8001_pci_alloc(pdev, ent, shost); 1099dbf9bfe6Sjack wang if (!pm8001_ha) { 1100dbf9bfe6Sjack wang rc = -ENOMEM; 1101dbf9bfe6Sjack wang goto err_out_free; 1102dbf9bfe6Sjack wang } 1103b40f2882SPeter Chang 1104f5860992SSakthivel K PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); 1105dbf9bfe6Sjack wang rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); 1106a70b8fc3SSakthivel K if (rc) { 11071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 11081b5d2793SJoe Perches "chip_init failed [ret: %d]\n", rc); 1109dbf9bfe6Sjack wang goto err_out_ha_free; 1110a70b8fc3SSakthivel K } 1111dbf9bfe6Sjack wang 11125a141315SViswas G rc = pm8001_init_ccb_tag(pm8001_ha, shost, pdev); 11135a141315SViswas G if (rc) 11145a141315SViswas G goto err_out_enable; 11155a141315SViswas G 1116dbf9bfe6Sjack wang rc = scsi_add_host(shost, &pdev->dev); 1117dbf9bfe6Sjack wang if (rc) 1118dbf9bfe6Sjack wang goto err_out_ha_free; 1119dbf9bfe6Sjack wang 1120f74cf271SSakthivel K PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0); 11211245ee59SSakthivel K if (pm8001_ha->chip_id != chip_8001) { 11221245ee59SSakthivel K for (i = 1; i < pm8001_ha->number_of_intr; i++) 11231245ee59SSakthivel K PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i); 1124a6cb3d01SSakthivel K /* setup thermal configuration. */ 1125a6cb3d01SSakthivel K pm80xx_set_thermal_config(pm8001_ha); 11261245ee59SSakthivel K } 11271245ee59SSakthivel K 1128dbf9bfe6Sjack wang pm8001_init_sas_add(pm8001_ha); 112927909407SAnand Kumar Santhanam /* phy setting support for motherboard controller */ 1130da2dd618SBenjamin Rood if (pm8001_configure_phy_settings(pm8001_ha)) 1131f2c6f180SMaurizio Lombardi goto err_out_shost; 1132da2dd618SBenjamin Rood 1133dbf9bfe6Sjack wang pm8001_post_sas_ha_init(shost, chip); 1134dbf9bfe6Sjack wang rc = sas_register_ha(SHOST_TO_SAS_HA(shost)); 1135b40f2882SPeter Chang if (rc) { 11361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 11371b5d2793SJoe Perches "sas_register_ha failed [ret: %d]\n", rc); 1138dbf9bfe6Sjack wang goto err_out_shost; 1139b40f2882SPeter Chang } 1140b40f2882SPeter Chang list_add_tail(&pm8001_ha->list, &hba_list); 1141dbf9bfe6Sjack wang scsi_scan_host(pm8001_ha->shost); 1142cd135754SDeepak Ukey pm8001_ha->flags = PM8001F_RUN_TIME; 1143dbf9bfe6Sjack wang return 0; 1144dbf9bfe6Sjack wang 1145dbf9bfe6Sjack wang err_out_shost: 1146dbf9bfe6Sjack wang scsi_remove_host(pm8001_ha->shost); 1147dbf9bfe6Sjack wang err_out_ha_free: 1148dbf9bfe6Sjack wang pm8001_free(pm8001_ha); 1149dbf9bfe6Sjack wang err_out_free: 1150b40f2882SPeter Chang kfree(sha); 1151dbf9bfe6Sjack wang err_out_free_host: 1152bc1371c1SPan Bian scsi_host_put(shost); 1153dbf9bfe6Sjack wang err_out_regions: 1154dbf9bfe6Sjack wang pci_release_regions(pdev); 1155dbf9bfe6Sjack wang err_out_disable: 1156dbf9bfe6Sjack wang pci_disable_device(pdev); 1157dbf9bfe6Sjack wang err_out_enable: 1158dbf9bfe6Sjack wang return rc; 1159dbf9bfe6Sjack wang } 1160dbf9bfe6Sjack wang 11615a141315SViswas G /* 11625a141315SViswas G * pm8001_init_ccb_tag - allocate memory to CCB and tag. 11635a141315SViswas G * @pm8001_ha: our hba card information. 11645a141315SViswas G * @shost: scsi host which has been allocated outside. 11655a141315SViswas G */ 11665a141315SViswas G static int 11675a141315SViswas G pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost, 11685a141315SViswas G struct pci_dev *pdev) 11695a141315SViswas G { 11705a141315SViswas G int i = 0; 11715a141315SViswas G u32 max_out_io, ccb_count; 11725a141315SViswas G u32 can_queue; 11735a141315SViswas G 11745a141315SViswas G max_out_io = pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io; 11755a141315SViswas G ccb_count = min_t(int, PM8001_MAX_CCB, max_out_io); 11765a141315SViswas G 11775a141315SViswas G /* Update to the scsi host*/ 11785a141315SViswas G can_queue = ccb_count - PM8001_RESERVE_SLOT; 11795a141315SViswas G shost->can_queue = can_queue; 11805a141315SViswas G 11815a141315SViswas G pm8001_ha->tags = kzalloc(ccb_count, GFP_KERNEL); 11825a141315SViswas G if (!pm8001_ha->tags) 11835a141315SViswas G goto err_out; 11845a141315SViswas G 11855a141315SViswas G /* Memory region for ccb_info*/ 118627a34943SXu Wang pm8001_ha->ccb_info = 11875a141315SViswas G kcalloc(ccb_count, sizeof(struct pm8001_ccb_info), GFP_KERNEL); 11885a141315SViswas G if (!pm8001_ha->ccb_info) { 11891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 11901b5d2793SJoe Perches "Unable to allocate memory for ccb\n"); 11915a141315SViswas G goto err_out_noccb; 11925a141315SViswas G } 11935a141315SViswas G for (i = 0; i < ccb_count; i++) { 11945a141315SViswas G pm8001_ha->ccb_info[i].buf_prd = pci_alloc_consistent(pdev, 11955a141315SViswas G sizeof(struct pm8001_prd) * PM8001_MAX_DMA_SG, 11965a141315SViswas G &pm8001_ha->ccb_info[i].ccb_dma_handle); 11975a141315SViswas G if (!pm8001_ha->ccb_info[i].buf_prd) { 11981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 11991b5d2793SJoe Perches "pm80xx: ccb prd memory allocation error\n"); 12005a141315SViswas G goto err_out; 12015a141315SViswas G } 12025a141315SViswas G pm8001_ha->ccb_info[i].task = NULL; 12035a141315SViswas G pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff; 12045a141315SViswas G pm8001_ha->ccb_info[i].device = NULL; 12055a141315SViswas G ++pm8001_ha->tags_num; 12065a141315SViswas G } 12075a141315SViswas G return 0; 12085a141315SViswas G 12095a141315SViswas G err_out_noccb: 12105a141315SViswas G kfree(pm8001_ha->devices); 12115a141315SViswas G err_out: 12125a141315SViswas G return -ENOMEM; 12135a141315SViswas G } 12145a141315SViswas G 12156f039790SGreg Kroah-Hartman static void pm8001_pci_remove(struct pci_dev *pdev) 1216dbf9bfe6Sjack wang { 1217dbf9bfe6Sjack wang struct sas_ha_struct *sha = pci_get_drvdata(pdev); 1218dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 12196cd60b37SNikith Ganigarakoppal int i, j; 1220dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 1221dbf9bfe6Sjack wang sas_unregister_ha(sha); 1222dbf9bfe6Sjack wang sas_remove_host(pm8001_ha->shost); 1223dbf9bfe6Sjack wang list_del(&pm8001_ha->list); 12241245ee59SSakthivel K PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); 1225f5860992SSakthivel K PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); 1226dbf9bfe6Sjack wang 1227dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 1228dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 1229a76037ffSChristoph Hellwig synchronize_irq(pci_irq_vector(pdev, i)); 1230dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 1231a76037ffSChristoph Hellwig free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]); 1232a76037ffSChristoph Hellwig pci_free_irq_vectors(pdev); 1233dbf9bfe6Sjack wang #else 1234dbf9bfe6Sjack wang free_irq(pm8001_ha->irq, sha); 1235dbf9bfe6Sjack wang #endif 1236dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 12376cd60b37SNikith Ganigarakoppal /* For non-msix and msix interrupts */ 1238c913df3fSBenjamin Rood if ((!pdev->msix_cap || !pci_msi_enabled()) || 1239c913df3fSBenjamin Rood (pm8001_ha->chip_id == chip_8001)) 12406cd60b37SNikith Ganigarakoppal tasklet_kill(&pm8001_ha->tasklet[0]); 12416cd60b37SNikith Ganigarakoppal else 12426cd60b37SNikith Ganigarakoppal for (j = 0; j < PM8001_MAX_MSIX_VEC; j++) 12436cd60b37SNikith Ganigarakoppal tasklet_kill(&pm8001_ha->tasklet[j]); 1244dbf9bfe6Sjack wang #endif 1245bc1371c1SPan Bian scsi_host_put(pm8001_ha->shost); 1246dbf9bfe6Sjack wang pm8001_free(pm8001_ha); 1247dbf9bfe6Sjack wang kfree(sha->sas_phy); 1248dbf9bfe6Sjack wang kfree(sha->sas_port); 1249dbf9bfe6Sjack wang kfree(sha); 1250dbf9bfe6Sjack wang pci_release_regions(pdev); 1251dbf9bfe6Sjack wang pci_disable_device(pdev); 1252dbf9bfe6Sjack wang } 1253dbf9bfe6Sjack wang 1254dbf9bfe6Sjack wang /** 1255dbf9bfe6Sjack wang * pm8001_pci_suspend - power management suspend main entry point 1256*47c37c4dSVaibhav Gupta * @dev: Device struct 1257dbf9bfe6Sjack wang * 1258dbf9bfe6Sjack wang * Returns 0 success, anything else error. 1259dbf9bfe6Sjack wang */ 1260*47c37c4dSVaibhav Gupta static int __maybe_unused pm8001_pci_suspend(struct device *dev) 1261dbf9bfe6Sjack wang { 1262*47c37c4dSVaibhav Gupta struct pci_dev *pdev = to_pci_dev(dev); 1263dbf9bfe6Sjack wang struct sas_ha_struct *sha = pci_get_drvdata(pdev); 1264*47c37c4dSVaibhav Gupta struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 12656cd60b37SNikith Ganigarakoppal int i, j; 12669f176099SBradley Grove sas_suspend_ha(sha); 1267429305e4STejun Heo flush_workqueue(pm8001_wq); 1268dbf9bfe6Sjack wang scsi_block_requests(pm8001_ha->shost); 1269c8a2ba3fSYijing Wang if (!pdev->pm_cap) { 1270*47c37c4dSVaibhav Gupta dev_err(dev, " PCI PM not supported\n"); 1271dbf9bfe6Sjack wang return -ENODEV; 1272dbf9bfe6Sjack wang } 12731245ee59SSakthivel K PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); 1274f5860992SSakthivel K PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); 1275dbf9bfe6Sjack wang #ifdef PM8001_USE_MSIX 1276dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 1277a76037ffSChristoph Hellwig synchronize_irq(pci_irq_vector(pdev, i)); 1278dbf9bfe6Sjack wang for (i = 0; i < pm8001_ha->number_of_intr; i++) 1279a76037ffSChristoph Hellwig free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]); 1280a76037ffSChristoph Hellwig pci_free_irq_vectors(pdev); 1281dbf9bfe6Sjack wang #else 1282dbf9bfe6Sjack wang free_irq(pm8001_ha->irq, sha); 1283dbf9bfe6Sjack wang #endif 1284dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 12856cd60b37SNikith Ganigarakoppal /* For non-msix and msix interrupts */ 1286c913df3fSBenjamin Rood if ((!pdev->msix_cap || !pci_msi_enabled()) || 1287c913df3fSBenjamin Rood (pm8001_ha->chip_id == chip_8001)) 12886cd60b37SNikith Ganigarakoppal tasklet_kill(&pm8001_ha->tasklet[0]); 12896cd60b37SNikith Ganigarakoppal else 12906cd60b37SNikith Ganigarakoppal for (j = 0; j < PM8001_MAX_MSIX_VEC; j++) 12916cd60b37SNikith Ganigarakoppal tasklet_kill(&pm8001_ha->tasklet[j]); 1292dbf9bfe6Sjack wang #endif 1293*47c37c4dSVaibhav Gupta pm8001_printk(pm8001_ha, "pdev=0x%p, slot=%s, entering " 1294*47c37c4dSVaibhav Gupta "suspended state\n", pdev, 1295*47c37c4dSVaibhav Gupta pm8001_ha->name); 1296dbf9bfe6Sjack wang return 0; 1297dbf9bfe6Sjack wang } 1298dbf9bfe6Sjack wang 1299dbf9bfe6Sjack wang /** 1300dbf9bfe6Sjack wang * pm8001_pci_resume - power management resume main entry point 1301*47c37c4dSVaibhav Gupta * @dev: Device struct 1302dbf9bfe6Sjack wang * 1303dbf9bfe6Sjack wang * Returns 0 success, anything else error. 1304dbf9bfe6Sjack wang */ 1305*47c37c4dSVaibhav Gupta static int __maybe_unused pm8001_pci_resume(struct device *dev) 1306dbf9bfe6Sjack wang { 1307*47c37c4dSVaibhav Gupta struct pci_dev *pdev = to_pci_dev(dev); 1308dbf9bfe6Sjack wang struct sas_ha_struct *sha = pci_get_drvdata(pdev); 1309dbf9bfe6Sjack wang struct pm8001_hba_info *pm8001_ha; 1310dbf9bfe6Sjack wang int rc; 13116cd60b37SNikith Ganigarakoppal u8 i = 0, j; 1312dbf9bfe6Sjack wang u32 device_state; 13139f176099SBradley Grove DECLARE_COMPLETION_ONSTACK(completion); 1314dbf9bfe6Sjack wang pm8001_ha = sha->lldd_ha; 1315dbf9bfe6Sjack wang device_state = pdev->current_state; 1316dbf9bfe6Sjack wang 131789eddb40SJoe Perches pm8001_printk(pm8001_ha, "pdev=0x%p, slot=%s, resuming from previous operating state [D%d]\n", 131889eddb40SJoe Perches pdev, pm8001_ha->name, device_state); 1319dbf9bfe6Sjack wang 1320dbf9bfe6Sjack wang rc = pci_go_44(pdev); 1321dbf9bfe6Sjack wang if (rc) 1322dbf9bfe6Sjack wang goto err_out_disable; 13239f176099SBradley Grove sas_prep_resume_ha(sha); 1324f5860992SSakthivel K /* chip soft rst only for spc */ 1325f5860992SSakthivel K if (pm8001_ha->chip_id == chip_8001) { 1326f5860992SSakthivel K PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); 13271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip soft reset successful\n"); 1328f5860992SSakthivel K } 1329dbf9bfe6Sjack wang rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); 1330dbf9bfe6Sjack wang if (rc) 1331dbf9bfe6Sjack wang goto err_out_disable; 13321245ee59SSakthivel K 13331245ee59SSakthivel K /* disable all the interrupt bits */ 13341245ee59SSakthivel K PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); 13351245ee59SSakthivel K 1336dbf9bfe6Sjack wang rc = pm8001_request_irq(pm8001_ha); 1337dbf9bfe6Sjack wang if (rc) 1338dbf9bfe6Sjack wang goto err_out_disable; 1339dbf9bfe6Sjack wang #ifdef PM8001_USE_TASKLET 13406cd60b37SNikith Ganigarakoppal /* Tasklet for non msi-x interrupt handler */ 1341c913df3fSBenjamin Rood if ((!pdev->msix_cap || !pci_msi_enabled()) || 1342c913df3fSBenjamin Rood (pm8001_ha->chip_id == chip_8001)) 13436cd60b37SNikith Ganigarakoppal tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet, 13446cd60b37SNikith Ganigarakoppal (unsigned long)&(pm8001_ha->irq_vector[0])); 13456cd60b37SNikith Ganigarakoppal else 13466cd60b37SNikith Ganigarakoppal for (j = 0; j < PM8001_MAX_MSIX_VEC; j++) 13476cd60b37SNikith Ganigarakoppal tasklet_init(&pm8001_ha->tasklet[j], pm8001_tasklet, 13486cd60b37SNikith Ganigarakoppal (unsigned long)&(pm8001_ha->irq_vector[j])); 1349dbf9bfe6Sjack wang #endif 1350f74cf271SSakthivel K PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0); 13511245ee59SSakthivel K if (pm8001_ha->chip_id != chip_8001) { 13521245ee59SSakthivel K for (i = 1; i < pm8001_ha->number_of_intr; i++) 13531245ee59SSakthivel K PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i); 13541245ee59SSakthivel K } 1355b650a880SBenjamin Rood 1356b650a880SBenjamin Rood /* Chip documentation for the 8070 and 8072 SPCv */ 1357b650a880SBenjamin Rood /* states that a 500ms minimum delay is required */ 1358014e8ba7SJulia Lawall /* before issuing commands. Otherwise, the firmware */ 1359b650a880SBenjamin Rood /* will enter an unrecoverable state. */ 1360b650a880SBenjamin Rood 1361b650a880SBenjamin Rood if (pm8001_ha->chip_id == chip_8070 || 1362b650a880SBenjamin Rood pm8001_ha->chip_id == chip_8072) { 1363b650a880SBenjamin Rood mdelay(500); 1364b650a880SBenjamin Rood } 1365b650a880SBenjamin Rood 1366b650a880SBenjamin Rood /* Spin up the PHYs */ 1367b650a880SBenjamin Rood 13689f176099SBradley Grove pm8001_ha->flags = PM8001F_RUN_TIME; 13699f176099SBradley Grove for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 13709f176099SBradley Grove pm8001_ha->phy[i].enable_completion = &completion; 13719f176099SBradley Grove PM8001_CHIP_DISP->phy_start_req(pm8001_ha, i); 13729f176099SBradley Grove wait_for_completion(&completion); 13739f176099SBradley Grove } 13749f176099SBradley Grove sas_resume_ha(sha); 1375dbf9bfe6Sjack wang return 0; 1376dbf9bfe6Sjack wang 1377dbf9bfe6Sjack wang err_out_disable: 1378dbf9bfe6Sjack wang scsi_remove_host(pm8001_ha->shost); 1379*47c37c4dSVaibhav Gupta 1380dbf9bfe6Sjack wang return rc; 1381dbf9bfe6Sjack wang } 1382dbf9bfe6Sjack wang 1383e5742101SSakthivel K /* update of pci device, vendor id and driver data with 1384e5742101SSakthivel K * unique value for each of the controller 1385e5742101SSakthivel K */ 13866f039790SGreg Kroah-Hartman static struct pci_device_id pm8001_pci_table[] = { 1387e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001 }, 1388d8571b1eSSuresh Thiagarajan { PCI_VDEVICE(PMC_Sierra, 0x8006), chip_8006 }, 1389d8571b1eSSuresh Thiagarajan { PCI_VDEVICE(ADAPTEC2, 0x8006), chip_8006 }, 1390f49d2132SBradley Grove { PCI_VDEVICE(ATTO, 0x0042), chip_8001 }, 1391e5742101SSakthivel K /* Support for SPC/SPCv/SPCve controllers */ 1392e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8001), chip_8001 }, 1393e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8008), chip_8008 }, 1394e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8008), chip_8008 }, 1395e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8018), chip_8018 }, 1396e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8018), chip_8018 }, 1397e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8009), chip_8009 }, 1398e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8009), chip_8009 }, 1399e5742101SSakthivel K { PCI_VDEVICE(PMC_Sierra, 0x8019), chip_8019 }, 1400e5742101SSakthivel K { PCI_VDEVICE(ADAPTEC2, 0x8019), chip_8019 }, 1401a9a923e5SAnand Kumar Santhanam { PCI_VDEVICE(PMC_Sierra, 0x8074), chip_8074 }, 1402a9a923e5SAnand Kumar Santhanam { PCI_VDEVICE(ADAPTEC2, 0x8074), chip_8074 }, 1403a9a923e5SAnand Kumar Santhanam { PCI_VDEVICE(PMC_Sierra, 0x8076), chip_8076 }, 1404a9a923e5SAnand Kumar Santhanam { PCI_VDEVICE(ADAPTEC2, 0x8076), chip_8076 }, 1405a9a923e5SAnand Kumar Santhanam { PCI_VDEVICE(PMC_Sierra, 0x8077), chip_8077 }, 1406a9a923e5SAnand Kumar Santhanam { PCI_VDEVICE(ADAPTEC2, 0x8077), chip_8077 }, 1407e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8081, 1408e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0400, 0, 0, chip_8001 }, 1409e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8081, 1410e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8001 }, 1411e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 1412e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8008 }, 1413e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 1414e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8008 }, 1415e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 1416e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8009 }, 1417e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 1418e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8009 }, 1419e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 1420e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8018 }, 1421e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8088, 1422e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8018 }, 1423e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 1424e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8019 }, 1425e5742101SSakthivel K { PCI_VENDOR_ID_ADAPTEC2, 0x8089, 1426e5742101SSakthivel K PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8019 }, 1427a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8074, 1428a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8074 }, 1429a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8076, 1430a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8076 }, 1431a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8077, 1432a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8077 }, 1433a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8074, 1434a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8074 }, 1435a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8076, 1436a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8076 }, 1437a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8077, 1438a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8077 }, 1439a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8076, 1440a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0808, 0, 0, chip_8076 }, 1441a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8077, 1442a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0808, 0, 0, chip_8077 }, 1443a9a923e5SAnand Kumar Santhanam { PCI_VENDOR_ID_ADAPTEC2, 0x8074, 1444a9a923e5SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2, 0x0404, 0, 0, chip_8074 }, 1445b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8070, 1446b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0070, 0, 0, chip_8070 }, 1447b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8070, 1448b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0071, 0, 0, chip_8070 }, 1449b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8072, 1450b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0072, 0, 0, chip_8072 }, 1451b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8072, 1452b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0073, 0, 0, chip_8072 }, 1453b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8070, 1454b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0080, 0, 0, chip_8070 }, 1455b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8072, 1456b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0081, 0, 0, chip_8072 }, 1457b2dece48SBenjamin Rood { PCI_VENDOR_ID_ATTO, 0x8072, 1458b2dece48SBenjamin Rood PCI_VENDOR_ID_ATTO, 0x0082, 0, 0, chip_8072 }, 1459dbf9bfe6Sjack wang {} /* terminate list */ 1460dbf9bfe6Sjack wang }; 1461dbf9bfe6Sjack wang 1462*47c37c4dSVaibhav Gupta static SIMPLE_DEV_PM_OPS(pm8001_pci_pm_ops, 1463*47c37c4dSVaibhav Gupta pm8001_pci_suspend, 1464*47c37c4dSVaibhav Gupta pm8001_pci_resume); 1465*47c37c4dSVaibhav Gupta 1466dbf9bfe6Sjack wang static struct pci_driver pm8001_pci_driver = { 1467dbf9bfe6Sjack wang .name = DRV_NAME, 1468dbf9bfe6Sjack wang .id_table = pm8001_pci_table, 1469dbf9bfe6Sjack wang .probe = pm8001_pci_probe, 14706f039790SGreg Kroah-Hartman .remove = pm8001_pci_remove, 1471*47c37c4dSVaibhav Gupta .driver.pm = &pm8001_pci_pm_ops, 1472dbf9bfe6Sjack wang }; 1473dbf9bfe6Sjack wang 1474dbf9bfe6Sjack wang /** 1475dbf9bfe6Sjack wang * pm8001_init - initialize scsi transport template 1476dbf9bfe6Sjack wang */ 1477dbf9bfe6Sjack wang static int __init pm8001_init(void) 1478dbf9bfe6Sjack wang { 1479429305e4STejun Heo int rc = -ENOMEM; 1480429305e4STejun Heo 1481a70b8fc3SSakthivel K pm8001_wq = alloc_workqueue("pm80xx", 0, 0); 1482429305e4STejun Heo if (!pm8001_wq) 1483429305e4STejun Heo goto err; 1484429305e4STejun Heo 1485dbf9bfe6Sjack wang pm8001_id = 0; 1486dbf9bfe6Sjack wang pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops); 1487dbf9bfe6Sjack wang if (!pm8001_stt) 1488429305e4STejun Heo goto err_wq; 1489dbf9bfe6Sjack wang rc = pci_register_driver(&pm8001_pci_driver); 1490dbf9bfe6Sjack wang if (rc) 1491429305e4STejun Heo goto err_tp; 1492dbf9bfe6Sjack wang return 0; 1493429305e4STejun Heo 1494429305e4STejun Heo err_tp: 1495dbf9bfe6Sjack wang sas_release_transport(pm8001_stt); 1496429305e4STejun Heo err_wq: 1497429305e4STejun Heo destroy_workqueue(pm8001_wq); 1498429305e4STejun Heo err: 1499dbf9bfe6Sjack wang return rc; 1500dbf9bfe6Sjack wang } 1501dbf9bfe6Sjack wang 1502dbf9bfe6Sjack wang static void __exit pm8001_exit(void) 1503dbf9bfe6Sjack wang { 1504dbf9bfe6Sjack wang pci_unregister_driver(&pm8001_pci_driver); 1505dbf9bfe6Sjack wang sas_release_transport(pm8001_stt); 1506429305e4STejun Heo destroy_workqueue(pm8001_wq); 1507dbf9bfe6Sjack wang } 1508dbf9bfe6Sjack wang 1509dbf9bfe6Sjack wang module_init(pm8001_init); 1510dbf9bfe6Sjack wang module_exit(pm8001_exit); 1511dbf9bfe6Sjack wang 1512dbf9bfe6Sjack wang MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>"); 1513a9a923e5SAnand Kumar Santhanam MODULE_AUTHOR("Anand Kumar Santhanam <AnandKumar.Santhanam@pmcs.com>"); 1514a9a923e5SAnand Kumar Santhanam MODULE_AUTHOR("Sangeetha Gnanasekaran <Sangeetha.Gnanasekaran@pmcs.com>"); 151594f33c16SNikith Ganigarakoppal MODULE_AUTHOR("Nikith Ganigarakoppal <Nikith.Ganigarakoppal@pmcs.com>"); 1516e5742101SSakthivel K MODULE_DESCRIPTION( 1517db9d4034SBenjamin Rood "PMC-Sierra PM8001/8006/8081/8088/8089/8074/8076/8077/8070/8072 " 1518a9a923e5SAnand Kumar Santhanam "SAS/SATA controller driver"); 1519dbf9bfe6Sjack wang MODULE_VERSION(DRV_VERSION); 1520dbf9bfe6Sjack wang MODULE_LICENSE("GPL"); 1521dbf9bfe6Sjack wang MODULE_DEVICE_TABLE(pci, pm8001_pci_table); 1522dbf9bfe6Sjack wang 1523