1 /* 2 * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver 3 * 4 * Copyright (c) 2008-2009 USI Co., Ltd. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * substantially similar to the "NO WARRANTY" disclaimer below 15 * ("Disclaimer") and any redistribution must be conditioned upon 16 * including a substantially similar Disclaimer requirement for further 17 * binary redistribution. 18 * 3. Neither the names of the above-listed copyright holders nor the names 19 * of any contributors may be used to endorse or promote products derived 20 * from this software without specific prior written permission. 21 * 22 * Alternatively, this software may be distributed under the terms of the 23 * GNU General Public License ("GPL") version 2 as published by the Free 24 * Software Foundation. 25 * 26 * NO WARRANTY 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGES. 38 * 39 */ 40 41 #ifndef _PM8001_DEFS_H_ 42 #define _PM8001_DEFS_H_ 43 44 enum chip_flavors { 45 chip_8001, 46 chip_8008, 47 chip_8009, 48 chip_8018, 49 chip_8019, 50 chip_8074, 51 chip_8076, 52 chip_8077 53 }; 54 55 enum phy_speed { 56 PHY_SPEED_15 = 0x01, 57 PHY_SPEED_30 = 0x02, 58 PHY_SPEED_60 = 0x04, 59 }; 60 61 enum data_direction { 62 DATA_DIR_NONE = 0x0, /* NO TRANSFER */ 63 DATA_DIR_IN = 0x01, /* INBOUND */ 64 DATA_DIR_OUT = 0x02, /* OUTBOUND */ 65 DATA_DIR_BYRECIPIENT = 0x04, /* UNSPECIFIED */ 66 }; 67 68 enum port_type { 69 PORT_TYPE_SAS = (1L << 1), 70 PORT_TYPE_SATA = (1L << 0), 71 }; 72 73 /* driver compile-time configuration */ 74 #define PM8001_MAX_CCB 512 /* max ccbs supported */ 75 #define PM8001_MPI_QUEUE 1024 /* maximum mpi queue entries */ 76 #define PM8001_MAX_INB_NUM 1 77 #define PM8001_MAX_OUTB_NUM 1 78 #define PM8001_MAX_SPCV_INB_NUM 1 79 #define PM8001_MAX_SPCV_OUTB_NUM 4 80 #define PM8001_CAN_QUEUE 508 /* SCSI Queue depth */ 81 82 /* Inbound/Outbound queue size */ 83 #define IOMB_SIZE_SPC 64 84 #define IOMB_SIZE_SPCV 128 85 86 /* unchangeable hardware details */ 87 #define PM8001_MAX_PHYS 16 /* max. possible phys */ 88 #define PM8001_MAX_PORTS 16 /* max. possible ports */ 89 #define PM8001_MAX_DEVICES 2048 /* max supported device */ 90 #define PM8001_MAX_MSIX_VEC 64 /* max msi-x int for spcv/ve */ 91 92 #define USI_MAX_MEMCNT_BASE 5 93 #define IB (USI_MAX_MEMCNT_BASE + 1) 94 #define CI (IB + PM8001_MAX_SPCV_INB_NUM) 95 #define OB (CI + PM8001_MAX_SPCV_INB_NUM) 96 #define PI (OB + PM8001_MAX_SPCV_OUTB_NUM) 97 #define USI_MAX_MEMCNT (PI + PM8001_MAX_SPCV_OUTB_NUM) 98 #define PM8001_MAX_DMA_SG SG_ALL 99 enum memory_region_num { 100 AAP1 = 0x0, /* application acceleration processor */ 101 IOP, /* IO processor */ 102 NVMD, /* NVM device */ 103 DEV_MEM, /* memory for devices */ 104 CCB_MEM, /* memory for command control block */ 105 FW_FLASH, /* memory for fw flash update */ 106 FORENSIC_MEM /* memory for fw forensic data */ 107 }; 108 #define PM8001_EVENT_LOG_SIZE (128 * 1024) 109 110 /*error code*/ 111 enum mpi_err { 112 MPI_IO_STATUS_SUCCESS = 0x0, 113 MPI_IO_STATUS_BUSY = 0x01, 114 MPI_IO_STATUS_FAIL = 0x02, 115 }; 116 117 /** 118 * Phy Control constants 119 */ 120 enum phy_control_type { 121 PHY_LINK_RESET = 0x01, 122 PHY_HARD_RESET = 0x02, 123 PHY_NOTIFY_ENABLE_SPINUP = 0x10, 124 }; 125 126 enum pm8001_hba_info_flags { 127 PM8001F_INIT_TIME = (1U << 0), 128 PM8001F_RUN_TIME = (1U << 1), 129 }; 130 131 #endif 132