xref: /openbmc/linux/drivers/scsi/pcmcia/nsp_io.h (revision 9cfc5c90)
1 /*
2   NinjaSCSI I/O funtions
3       By: YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
4 
5   This software may be used and distributed according to the terms of
6   the GNU General Public License.
7 
8   */
9 
10 /* $Id: nsp_io.h,v 1.3 2003/08/04 21:15:26 elca Exp $ */
11 
12 #ifndef __NSP_IO_H__
13 #define __NSP_IO_H__
14 
15 static inline          void nsp_write(unsigned int base,
16 				      unsigned int index,
17 				      unsigned char val);
18 static inline unsigned char nsp_read(unsigned int base,
19 				     unsigned int index);
20 static inline          void nsp_index_write(unsigned int BaseAddr,
21 					    unsigned int Register,
22 					    unsigned char Value);
23 static inline unsigned char nsp_index_read(unsigned int BaseAddr,
24 					   unsigned int Register);
25 
26 /*******************************************************************
27  * Basic IO
28  */
29 
30 static inline void nsp_write(unsigned int  base,
31 			     unsigned int  index,
32 			     unsigned char val)
33 {
34 	outb(val, (base + index));
35 }
36 
37 static inline unsigned char nsp_read(unsigned int base,
38 				     unsigned int index)
39 {
40 	return inb(base + index);
41 }
42 
43 
44 /**********************************************************************
45  * Indexed IO
46  */
47 static inline unsigned char nsp_index_read(unsigned int BaseAddr,
48 					   unsigned int Register)
49 {
50 	outb(Register, BaseAddr + INDEXREG);
51 	return inb(BaseAddr + DATAREG);
52 }
53 
54 static inline void nsp_index_write(unsigned int  BaseAddr,
55 				   unsigned int  Register,
56 				   unsigned char Value)
57 {
58 	outb(Register, BaseAddr + INDEXREG);
59 	outb(Value, BaseAddr + DATAREG);
60 }
61 
62 /*********************************************************************
63  * fifo func
64  */
65 
66 /* read 8 bit FIFO */
67 static inline void nsp_multi_read_1(unsigned int   BaseAddr,
68 				    unsigned int   Register,
69 				    void          *buf,
70 				    unsigned long  count)
71 {
72 	insb(BaseAddr + Register, buf, count);
73 }
74 
75 static inline void nsp_fifo8_read(unsigned int   base,
76 				  void          *buf,
77 				  unsigned long  count)
78 {
79 	/*nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx", buf, count);*/
80 	nsp_multi_read_1(base, FIFODATA, buf, count);
81 }
82 
83 /*--------------------------------------------------------------*/
84 
85 /* read 16 bit FIFO */
86 static inline void nsp_multi_read_2(unsigned int   BaseAddr,
87 				    unsigned int   Register,
88 				    void          *buf,
89 				    unsigned long  count)
90 {
91 	insw(BaseAddr + Register, buf, count);
92 }
93 
94 static inline void nsp_fifo16_read(unsigned int   base,
95 				   void          *buf,
96 				   unsigned long  count)
97 {
98 	//nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*2", buf, count);
99 	nsp_multi_read_2(base, FIFODATA, buf, count);
100 }
101 
102 /*--------------------------------------------------------------*/
103 
104 /* read 32bit FIFO */
105 static inline void nsp_multi_read_4(unsigned int   BaseAddr,
106 				    unsigned int   Register,
107 				    void          *buf,
108 				    unsigned long  count)
109 {
110 	insl(BaseAddr + Register, buf, count);
111 }
112 
113 static inline void nsp_fifo32_read(unsigned int   base,
114 				   void          *buf,
115 				   unsigned long  count)
116 {
117 	//nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*4", buf, count);
118 	nsp_multi_read_4(base, FIFODATA, buf, count);
119 }
120 
121 /*----------------------------------------------------------*/
122 
123 /* write 8bit FIFO */
124 static inline void nsp_multi_write_1(unsigned int   BaseAddr,
125 				     unsigned int   Register,
126 				     void          *buf,
127 				     unsigned long  count)
128 {
129 	outsb(BaseAddr + Register, buf, count);
130 }
131 
132 static inline void nsp_fifo8_write(unsigned int   base,
133 				   void          *buf,
134 				   unsigned long  count)
135 {
136 	nsp_multi_write_1(base, FIFODATA, buf, count);
137 }
138 
139 /*---------------------------------------------------------*/
140 
141 /* write 16bit FIFO */
142 static inline void nsp_multi_write_2(unsigned int   BaseAddr,
143 				     unsigned int   Register,
144 				     void          *buf,
145 				     unsigned long  count)
146 {
147 	outsw(BaseAddr + Register, buf, count);
148 }
149 
150 static inline void nsp_fifo16_write(unsigned int   base,
151 				    void          *buf,
152 				    unsigned long  count)
153 {
154 	nsp_multi_write_2(base, FIFODATA, buf, count);
155 }
156 
157 /*---------------------------------------------------------*/
158 
159 /* write 32bit FIFO */
160 static inline void nsp_multi_write_4(unsigned int   BaseAddr,
161 				     unsigned int   Register,
162 				     void          *buf,
163 				     unsigned long  count)
164 {
165 	outsl(BaseAddr + Register, buf, count);
166 }
167 
168 static inline void nsp_fifo32_write(unsigned int   base,
169 				    void          *buf,
170 				    unsigned long  count)
171 {
172 	nsp_multi_write_4(base, FIFODATA, buf, count);
173 }
174 
175 
176 /*====================================================================*/
177 
178 static inline void nsp_mmio_write(unsigned long base,
179 				  unsigned int  index,
180 				  unsigned char val)
181 {
182 	unsigned char *ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + index);
183 
184 	writeb(val, ptr);
185 }
186 
187 static inline unsigned char nsp_mmio_read(unsigned long base,
188 					  unsigned int  index)
189 {
190 	unsigned char *ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + index);
191 
192 	return readb(ptr);
193 }
194 
195 /*-----------*/
196 
197 static inline unsigned char nsp_mmio_index_read(unsigned long base,
198 						unsigned int  reg)
199 {
200 	unsigned char *index_ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + INDEXREG);
201 	unsigned char *data_ptr  = (unsigned char *)(base + NSP_MMIO_OFFSET + DATAREG);
202 
203 	writeb((unsigned char)reg, index_ptr);
204 	return readb(data_ptr);
205 }
206 
207 static inline void nsp_mmio_index_write(unsigned long base,
208 					unsigned int  reg,
209 					unsigned char val)
210 {
211 	unsigned char *index_ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + INDEXREG);
212 	unsigned char *data_ptr  = (unsigned char *)(base + NSP_MMIO_OFFSET + DATAREG);
213 
214 	writeb((unsigned char)reg, index_ptr);
215 	writeb(val,                data_ptr);
216 }
217 
218 /* read 32bit FIFO */
219 static inline void nsp_mmio_multi_read_4(unsigned long  base,
220 					 unsigned int   Register,
221 					 void          *buf,
222 					 unsigned long  count)
223 {
224 	unsigned long *ptr = (unsigned long *)(base + Register);
225 	unsigned long *tmp = (unsigned long *)buf;
226 	int i;
227 
228 	//nsp_dbg(NSP_DEBUG_DATA_IO, "base 0x%0lx ptr 0x%p",base,ptr);
229 
230 	for (i = 0; i < count; i++) {
231 		*tmp = readl(ptr);
232 		//nsp_dbg(NSP_DEBUG_DATA_IO, "<%d,%p,%p,%lx>", i, ptr, tmp, *tmp);
233 		tmp++;
234 	}
235 }
236 
237 static inline void nsp_mmio_fifo32_read(unsigned int   base,
238 					void          *buf,
239 					unsigned long  count)
240 {
241 	//nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*4", buf, count);
242 	nsp_mmio_multi_read_4(base, FIFODATA, buf, count);
243 }
244 
245 static inline void nsp_mmio_multi_write_4(unsigned long  base,
246 					  unsigned int   Register,
247 					  void          *buf,
248 					  unsigned long  count)
249 {
250 	unsigned long *ptr = (unsigned long *)(base + Register);
251 	unsigned long *tmp = (unsigned long *)buf;
252 	int i;
253 
254 	//nsp_dbg(NSP_DEBUG_DATA_IO, "base 0x%0lx ptr 0x%p",base,ptr);
255 
256 	for (i = 0; i < count; i++) {
257 		writel(*tmp, ptr);
258 		//nsp_dbg(NSP_DEBUG_DATA_IO, "<%d,%p,%p,%lx>", i, ptr, tmp, *tmp);
259 		tmp++;
260 	}
261 }
262 
263 static inline void nsp_mmio_fifo32_write(unsigned int   base,
264 					 void          *buf,
265 					 unsigned long  count)
266 {
267 	//nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*4", buf, count);
268 	nsp_mmio_multi_write_4(base, FIFODATA, buf, count);
269 }
270 
271 
272 
273 #endif
274 /* end */
275