1 /* 2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver 3 * Copyright (C) 2001, 2002, 2003 4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp> 5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * 18 * Revision History: 19 * 1.0: Initial Release. 20 * 1.1: Add /proc SDTR status. 21 * Remove obsolete error handler nsp32_reset. 22 * Some clean up. 23 * 1.2: PowerPC (big endian) support. 24 */ 25 26 #include <linux/version.h> 27 #include <linux/module.h> 28 #include <linux/init.h> 29 #include <linux/kernel.h> 30 #include <linux/sched.h> 31 #include <linux/slab.h> 32 #include <linux/string.h> 33 #include <linux/timer.h> 34 #include <linux/ioport.h> 35 #include <linux/major.h> 36 #include <linux/blkdev.h> 37 #include <linux/interrupt.h> 38 #include <linux/pci.h> 39 #include <linux/delay.h> 40 #include <linux/ctype.h> 41 42 #include <asm/dma.h> 43 #include <asm/system.h> 44 #include <asm/io.h> 45 46 #include <scsi/scsi.h> 47 #include <scsi/scsi_cmnd.h> 48 #include <scsi/scsi_device.h> 49 #include <scsi/scsi_host.h> 50 #include <scsi/scsi_ioctl.h> 51 52 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) 53 # include <linux/blk.h> 54 #endif 55 56 #include "nsp32.h" 57 58 59 /*********************************************************************** 60 * Module parameters 61 */ 62 static int trans_mode = 0; /* default: BIOS */ 63 module_param (trans_mode, int, 0); 64 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M"); 65 #define ASYNC_MODE 1 66 #define ULTRA20M_MODE 2 67 68 static int auto_param = 0; /* default: ON */ 69 module_param (auto_param, bool, 0); 70 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)"); 71 72 static int disc_priv = 1; /* default: OFF */ 73 module_param (disc_priv, bool, 0); 74 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))"); 75 76 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>"); 77 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module"); 78 MODULE_LICENSE("GPL"); 79 80 static const char *nsp32_release_version = "1.2"; 81 82 83 /**************************************************************************** 84 * Supported hardware 85 */ 86 static struct pci_device_id nsp32_pci_table[] __devinitdata = { 87 { 88 .vendor = PCI_VENDOR_ID_IODATA, 89 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II, 90 .subvendor = PCI_ANY_ID, 91 .subdevice = PCI_ANY_ID, 92 .driver_data = MODEL_IODATA, 93 }, 94 { 95 .vendor = PCI_VENDOR_ID_WORKBIT, 96 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME, 97 .subvendor = PCI_ANY_ID, 98 .subdevice = PCI_ANY_ID, 99 .driver_data = MODEL_KME, 100 }, 101 { 102 .vendor = PCI_VENDOR_ID_WORKBIT, 103 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT, 104 .subvendor = PCI_ANY_ID, 105 .subdevice = PCI_ANY_ID, 106 .driver_data = MODEL_WORKBIT, 107 }, 108 { 109 .vendor = PCI_VENDOR_ID_WORKBIT, 110 .device = PCI_DEVICE_ID_WORKBIT_STANDARD, 111 .subvendor = PCI_ANY_ID, 112 .subdevice = PCI_ANY_ID, 113 .driver_data = MODEL_PCI_WORKBIT, 114 }, 115 { 116 .vendor = PCI_VENDOR_ID_WORKBIT, 117 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC, 118 .subvendor = PCI_ANY_ID, 119 .subdevice = PCI_ANY_ID, 120 .driver_data = MODEL_LOGITEC, 121 }, 122 { 123 .vendor = PCI_VENDOR_ID_WORKBIT, 124 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC, 125 .subvendor = PCI_ANY_ID, 126 .subdevice = PCI_ANY_ID, 127 .driver_data = MODEL_PCI_LOGITEC, 128 }, 129 { 130 .vendor = PCI_VENDOR_ID_WORKBIT, 131 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO, 132 .subvendor = PCI_ANY_ID, 133 .subdevice = PCI_ANY_ID, 134 .driver_data = MODEL_PCI_MELCO, 135 }, 136 { 137 .vendor = PCI_VENDOR_ID_WORKBIT, 138 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II, 139 .subvendor = PCI_ANY_ID, 140 .subdevice = PCI_ANY_ID, 141 .driver_data = MODEL_PCI_MELCO, 142 }, 143 {0,0,}, 144 }; 145 MODULE_DEVICE_TABLE(pci, nsp32_pci_table); 146 147 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */ 148 149 150 /* 151 * Period/AckWidth speed conversion table 152 * 153 * Note: This period/ackwidth speed table must be in descending order. 154 */ 155 static nsp32_sync_table nsp32_sync_table_40M[] = { 156 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */ 157 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */ 158 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */ 159 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ 160 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */ 161 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */ 162 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */ 163 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ 164 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */ 165 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ 166 }; 167 168 static nsp32_sync_table nsp32_sync_table_20M[] = { 169 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ 170 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */ 171 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ 172 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ 173 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */ 174 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */ 175 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */ 176 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */ 177 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */ 178 }; 179 180 static nsp32_sync_table nsp32_sync_table_pci[] = { 181 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */ 182 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */ 183 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */ 184 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */ 185 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */ 186 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */ 187 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */ 188 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */ 189 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */ 190 }; 191 192 /* 193 * function declaration 194 */ 195 /* module entry point */ 196 static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *); 197 static void __devexit nsp32_remove(struct pci_dev *); 198 static int __init init_nsp32 (void); 199 static void __exit exit_nsp32 (void); 200 201 /* struct Scsi_Host_Template */ 202 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 203 static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int); 204 #else 205 static int nsp32_proc_info (char *, char **, off_t, int, int, int); 206 #endif 207 208 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 209 static int nsp32_detect (struct pci_dev *pdev); 210 #else 211 static int nsp32_detect (Scsi_Host_Template *); 212 #endif 213 static int nsp32_queuecommand(struct scsi_cmnd *, 214 void (*done)(struct scsi_cmnd *)); 215 static const char *nsp32_info (struct Scsi_Host *); 216 static int nsp32_release (struct Scsi_Host *); 217 218 /* SCSI error handler */ 219 static int nsp32_eh_abort (struct scsi_cmnd *); 220 static int nsp32_eh_bus_reset (struct scsi_cmnd *); 221 static int nsp32_eh_host_reset(struct scsi_cmnd *); 222 223 /* generate SCSI message */ 224 static void nsp32_build_identify(struct scsi_cmnd *); 225 static void nsp32_build_nop (struct scsi_cmnd *); 226 static void nsp32_build_reject (struct scsi_cmnd *); 227 static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char); 228 229 /* SCSI message handler */ 230 static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short); 231 static void nsp32_msgout_occur (struct scsi_cmnd *); 232 static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short); 233 234 static int nsp32_setup_sg_table (struct scsi_cmnd *); 235 static int nsp32_selection_autopara(struct scsi_cmnd *); 236 static int nsp32_selection_autoscsi(struct scsi_cmnd *); 237 static void nsp32_scsi_done (struct scsi_cmnd *); 238 static int nsp32_arbitration (struct scsi_cmnd *, unsigned int); 239 static int nsp32_reselection (struct scsi_cmnd *, unsigned char); 240 static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int); 241 static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short); 242 243 /* SCSI SDTR */ 244 static void nsp32_analyze_sdtr (struct scsi_cmnd *); 245 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char); 246 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *); 247 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *); 248 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char); 249 250 /* SCSI bus status handler */ 251 static void nsp32_wait_req (nsp32_hw_data *, int); 252 static void nsp32_wait_sack (nsp32_hw_data *, int); 253 static void nsp32_sack_assert (nsp32_hw_data *); 254 static void nsp32_sack_negate (nsp32_hw_data *); 255 static void nsp32_do_bus_reset(nsp32_hw_data *); 256 257 /* hardware interrupt handler */ 258 static irqreturn_t do_nsp32_isr(int, void *, struct pt_regs *); 259 260 /* initialize hardware */ 261 static int nsp32hw_init(nsp32_hw_data *); 262 263 /* EEPROM handler */ 264 static int nsp32_getprom_param (nsp32_hw_data *); 265 static int nsp32_getprom_at24 (nsp32_hw_data *); 266 static int nsp32_getprom_c16 (nsp32_hw_data *); 267 static void nsp32_prom_start (nsp32_hw_data *); 268 static void nsp32_prom_stop (nsp32_hw_data *); 269 static int nsp32_prom_read (nsp32_hw_data *, int); 270 static int nsp32_prom_read_bit (nsp32_hw_data *); 271 static void nsp32_prom_write_bit(nsp32_hw_data *, int); 272 static void nsp32_prom_set (nsp32_hw_data *, int, int); 273 static int nsp32_prom_get (nsp32_hw_data *, int); 274 275 /* debug/warning/info message */ 276 static void nsp32_message (const char *, int, char *, char *, ...); 277 #ifdef NSP32_DEBUG 278 static void nsp32_dmessage(const char *, int, int, char *, ...); 279 #endif 280 281 /* 282 * max_sectors is currently limited up to 128. 283 */ 284 static struct scsi_host_template nsp32_template = { 285 .proc_name = "nsp32", 286 .name = "Workbit NinjaSCSI-32Bi/UDE", 287 .proc_info = nsp32_proc_info, 288 .info = nsp32_info, 289 .queuecommand = nsp32_queuecommand, 290 .can_queue = 1, 291 .sg_tablesize = NSP32_SG_SIZE, 292 .max_sectors = 128, 293 .cmd_per_lun = 1, 294 .this_id = NSP32_HOST_SCSIID, 295 .use_clustering = DISABLE_CLUSTERING, 296 .eh_abort_handler = nsp32_eh_abort, 297 .eh_bus_reset_handler = nsp32_eh_bus_reset, 298 .eh_host_reset_handler = nsp32_eh_host_reset, 299 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74)) 300 .detect = nsp32_detect, 301 .release = nsp32_release, 302 #endif 303 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,2)) 304 .use_new_eh_code = 1, 305 #else 306 /* .highmem_io = 1, */ 307 #endif 308 }; 309 310 #include "nsp32_io.h" 311 312 /*********************************************************************** 313 * debug, error print 314 */ 315 #ifndef NSP32_DEBUG 316 # define NSP32_DEBUG_MASK 0x000000 317 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args) 318 # define nsp32_dbg(mask, args...) /* */ 319 #else 320 # define NSP32_DEBUG_MASK 0xffffff 321 # define nsp32_msg(type, args...) \ 322 nsp32_message (__FUNCTION__, __LINE__, (type), args) 323 # define nsp32_dbg(mask, args...) \ 324 nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args) 325 #endif 326 327 #define NSP32_DEBUG_QUEUECOMMAND BIT(0) 328 #define NSP32_DEBUG_REGISTER BIT(1) 329 #define NSP32_DEBUG_AUTOSCSI BIT(2) 330 #define NSP32_DEBUG_INTR BIT(3) 331 #define NSP32_DEBUG_SGLIST BIT(4) 332 #define NSP32_DEBUG_BUSFREE BIT(5) 333 #define NSP32_DEBUG_CDB_CONTENTS BIT(6) 334 #define NSP32_DEBUG_RESELECTION BIT(7) 335 #define NSP32_DEBUG_MSGINOCCUR BIT(8) 336 #define NSP32_DEBUG_EEPROM BIT(9) 337 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10) 338 #define NSP32_DEBUG_BUSRESET BIT(11) 339 #define NSP32_DEBUG_RESTART BIT(12) 340 #define NSP32_DEBUG_SYNC BIT(13) 341 #define NSP32_DEBUG_WAIT BIT(14) 342 #define NSP32_DEBUG_TARGETFLAG BIT(15) 343 #define NSP32_DEBUG_PROC BIT(16) 344 #define NSP32_DEBUG_INIT BIT(17) 345 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20) 346 347 #define NSP32_DEBUG_BUF_LEN 100 348 349 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...) 350 { 351 va_list args; 352 char buf[NSP32_DEBUG_BUF_LEN]; 353 354 va_start(args, fmt); 355 vsnprintf(buf, sizeof(buf), fmt, args); 356 va_end(args); 357 358 #ifndef NSP32_DEBUG 359 printk("%snsp32: %s\n", type, buf); 360 #else 361 printk("%snsp32: %s (%d): %s\n", type, func, line, buf); 362 #endif 363 } 364 365 #ifdef NSP32_DEBUG 366 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...) 367 { 368 va_list args; 369 char buf[NSP32_DEBUG_BUF_LEN]; 370 371 va_start(args, fmt); 372 vsnprintf(buf, sizeof(buf), fmt, args); 373 va_end(args); 374 375 if (mask & NSP32_DEBUG_MASK) { 376 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf); 377 } 378 } 379 #endif 380 381 #ifdef NSP32_DEBUG 382 # include "nsp32_debug.c" 383 #else 384 # define show_command(arg) /* */ 385 # define show_busphase(arg) /* */ 386 # define show_autophase(arg) /* */ 387 #endif 388 389 /* 390 * IDENTIFY Message 391 */ 392 static void nsp32_build_identify(struct scsi_cmnd *SCpnt) 393 { 394 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 395 int pos = data->msgout_len; 396 int mode = FALSE; 397 398 /* XXX: Auto DiscPriv detection is progressing... */ 399 if (disc_priv == 0) { 400 /* mode = TRUE; */ 401 } 402 403 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++; 404 405 data->msgout_len = pos; 406 } 407 408 /* 409 * SDTR Message Routine 410 */ 411 static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt, 412 unsigned char period, 413 unsigned char offset) 414 { 415 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 416 int pos = data->msgout_len; 417 418 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++; 419 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++; 420 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++; 421 data->msgoutbuf[pos] = period; pos++; 422 data->msgoutbuf[pos] = offset; pos++; 423 424 data->msgout_len = pos; 425 } 426 427 /* 428 * No Operation Message 429 */ 430 static void nsp32_build_nop(struct scsi_cmnd *SCpnt) 431 { 432 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 433 int pos = data->msgout_len; 434 435 if (pos != 0) { 436 nsp32_msg(KERN_WARNING, 437 "Some messages are already contained!"); 438 return; 439 } 440 441 data->msgoutbuf[pos] = NOP; pos++; 442 data->msgout_len = pos; 443 } 444 445 /* 446 * Reject Message 447 */ 448 static void nsp32_build_reject(struct scsi_cmnd *SCpnt) 449 { 450 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 451 int pos = data->msgout_len; 452 453 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++; 454 data->msgout_len = pos; 455 } 456 457 /* 458 * timer 459 */ 460 #if 0 461 static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time) 462 { 463 unsigned int base = SCpnt->host->io_port; 464 465 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time); 466 467 if (time & (~TIMER_CNT_MASK)) { 468 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow"); 469 } 470 471 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK); 472 } 473 #endif 474 475 476 /* 477 * set SCSI command and other parameter to asic, and start selection phase 478 */ 479 static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt) 480 { 481 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 482 unsigned int base = SCpnt->device->host->io_port; 483 unsigned int host_id = SCpnt->device->host->this_id; 484 unsigned char target = SCpnt->device->id; 485 nsp32_autoparam *param = data->autoparam; 486 unsigned char phase; 487 int i, ret; 488 unsigned int msgout; 489 u16_le s; 490 491 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); 492 493 /* 494 * check bus free 495 */ 496 phase = nsp32_read1(base, SCSI_BUS_MONITOR); 497 if (phase != BUSMON_BUS_FREE) { 498 nsp32_msg(KERN_WARNING, "bus busy"); 499 show_busphase(phase & BUSMON_PHASE_MASK); 500 SCpnt->result = DID_BUS_BUSY << 16; 501 return FALSE; 502 } 503 504 /* 505 * message out 506 * 507 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. 508 * over 3 messages needs another routine. 509 */ 510 if (data->msgout_len == 0) { 511 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); 512 SCpnt->result = DID_ERROR << 16; 513 return FALSE; 514 } else if (data->msgout_len > 0 && data->msgout_len <= 3) { 515 msgout = 0; 516 for (i = 0; i < data->msgout_len; i++) { 517 /* 518 * the sending order of the message is: 519 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 520 * MCNT 2: MSG#1 -> MSG#2 521 * MCNT 1: MSG#2 522 */ 523 msgout >>= 8; 524 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); 525 } 526 msgout |= MV_VALID; /* MV valid */ 527 msgout |= (unsigned int)data->msgout_len; /* len */ 528 } else { 529 /* data->msgout_len > 3 */ 530 msgout = 0; 531 } 532 533 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT)); 534 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 535 536 /* 537 * setup asic parameter 538 */ 539 memset(param, 0, sizeof(nsp32_autoparam)); 540 541 /* cdb */ 542 for (i = 0; i < SCpnt->cmd_len; i++) { 543 param->cdb[4 * i] = SCpnt->cmnd[i]; 544 } 545 546 /* outgoing messages */ 547 param->msgout = cpu_to_le32(msgout); 548 549 /* syncreg, ackwidth, target id, SREQ sampling rate */ 550 param->syncreg = data->cur_target->syncreg; 551 param->ackwidth = data->cur_target->ackwidth; 552 param->target_id = BIT(host_id) | BIT(target); 553 param->sample_reg = data->cur_target->sample_reg; 554 555 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg); 556 557 /* command control */ 558 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER | 559 AUTOSCSI_START | 560 AUTO_MSGIN_00_OR_04 | 561 AUTO_MSGIN_02 | 562 AUTO_ATN ); 563 564 565 /* transfer control */ 566 s = 0; 567 switch (data->trans_method) { 568 case NSP32_TRANSFER_BUSMASTER: 569 s |= BM_START; 570 break; 571 case NSP32_TRANSFER_MMIO: 572 s |= CB_MMIO_MODE; 573 break; 574 case NSP32_TRANSFER_PIO: 575 s |= CB_IO_MODE; 576 break; 577 default: 578 nsp32_msg(KERN_ERR, "unknown trans_method"); 579 break; 580 } 581 /* 582 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits. 583 * For bus master transfer, it's taken off. 584 */ 585 s |= (TRANSFER_GO | ALL_COUNTER_CLR); 586 param->transfer_control = cpu_to_le16(s); 587 588 /* sg table addr */ 589 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr); 590 591 /* 592 * transfer parameter to ASIC 593 */ 594 nsp32_write4(base, SGT_ADR, data->auto_paddr); 595 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER | 596 AUTO_PARAMETER ); 597 598 /* 599 * Check arbitration 600 */ 601 ret = nsp32_arbitration(SCpnt, base); 602 603 return ret; 604 } 605 606 607 /* 608 * Selection with AUTO SCSI (without AUTO PARAMETER) 609 */ 610 static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt) 611 { 612 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 613 unsigned int base = SCpnt->device->host->io_port; 614 unsigned int host_id = SCpnt->device->host->this_id; 615 unsigned char target = SCpnt->device->id; 616 unsigned char phase; 617 int status; 618 unsigned short command = 0; 619 unsigned int msgout = 0; 620 unsigned short execph; 621 int i; 622 623 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); 624 625 /* 626 * IRQ disable 627 */ 628 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 629 630 /* 631 * check bus line 632 */ 633 phase = nsp32_read1(base, SCSI_BUS_MONITOR); 634 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) { 635 nsp32_msg(KERN_WARNING, "bus busy"); 636 SCpnt->result = DID_BUS_BUSY << 16; 637 status = 1; 638 goto out; 639 } 640 641 /* 642 * clear execph 643 */ 644 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE); 645 646 /* 647 * clear FIFO counter to set CDBs 648 */ 649 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER); 650 651 /* 652 * set CDB0 - CDB15 653 */ 654 for (i = 0; i < SCpnt->cmd_len; i++) { 655 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]); 656 } 657 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]); 658 659 /* 660 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID 661 */ 662 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target)); 663 664 /* 665 * set SCSI MSGOUT REG 666 * 667 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. 668 * over 3 messages needs another routine. 669 */ 670 if (data->msgout_len == 0) { 671 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); 672 SCpnt->result = DID_ERROR << 16; 673 status = 1; 674 goto out; 675 } else if (data->msgout_len > 0 && data->msgout_len <= 3) { 676 msgout = 0; 677 for (i = 0; i < data->msgout_len; i++) { 678 /* 679 * the sending order of the message is: 680 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 681 * MCNT 2: MSG#1 -> MSG#2 682 * MCNT 1: MSG#2 683 */ 684 msgout >>= 8; 685 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); 686 } 687 msgout |= MV_VALID; /* MV valid */ 688 msgout |= (unsigned int)data->msgout_len; /* len */ 689 nsp32_write4(base, SCSI_MSG_OUT, msgout); 690 } else { 691 /* data->msgout_len > 3 */ 692 nsp32_write4(base, SCSI_MSG_OUT, 0); 693 } 694 695 /* 696 * set selection timeout(= 250ms) 697 */ 698 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 699 700 /* 701 * set SREQ hazard killer sampling rate 702 * 703 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz. 704 * check other internal clock! 705 */ 706 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); 707 708 /* 709 * clear Arbit 710 */ 711 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); 712 713 /* 714 * set SYNCREG 715 * Don't set BM_START_ADR before setting this register. 716 */ 717 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); 718 719 /* 720 * set ACKWIDTH 721 */ 722 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); 723 724 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, 725 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x", 726 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH), 727 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID)); 728 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x", 729 data->msgout_len, msgout); 730 731 /* 732 * set SGT ADDR (physical address) 733 */ 734 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); 735 736 /* 737 * set TRANSFER CONTROL REG 738 */ 739 command = 0; 740 command |= (TRANSFER_GO | ALL_COUNTER_CLR); 741 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 742 if (SCpnt->request_bufflen > 0) { 743 command |= BM_START; 744 } 745 } else if (data->trans_method & NSP32_TRANSFER_MMIO) { 746 command |= CB_MMIO_MODE; 747 } else if (data->trans_method & NSP32_TRANSFER_PIO) { 748 command |= CB_IO_MODE; 749 } 750 nsp32_write2(base, TRANSFER_CONTROL, command); 751 752 /* 753 * start AUTO SCSI, kick off arbitration 754 */ 755 command = (CLEAR_CDB_FIFO_POINTER | 756 AUTOSCSI_START | 757 AUTO_MSGIN_00_OR_04 | 758 AUTO_MSGIN_02 | 759 AUTO_ATN ); 760 nsp32_write2(base, COMMAND_CONTROL, command); 761 762 /* 763 * Check arbitration 764 */ 765 status = nsp32_arbitration(SCpnt, base); 766 767 out: 768 /* 769 * IRQ enable 770 */ 771 nsp32_write2(base, IRQ_CONTROL, 0); 772 773 return status; 774 } 775 776 777 /* 778 * Arbitration Status Check 779 * 780 * Note: Arbitration counter is waited during ARBIT_GO is not lifting. 781 * Using udelay(1) consumes CPU time and system time, but 782 * arbitration delay time is defined minimal 2.4us in SCSI 783 * specification, thus udelay works as coarse grained wait timer. 784 */ 785 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base) 786 { 787 unsigned char arbit; 788 int status = TRUE; 789 int time = 0; 790 791 do { 792 arbit = nsp32_read1(base, ARBIT_STATUS); 793 time++; 794 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 && 795 (time <= ARBIT_TIMEOUT_TIME)); 796 797 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, 798 "arbit: 0x%x, delay time: %d", arbit, time); 799 800 if (arbit & ARBIT_WIN) { 801 /* Arbitration succeeded */ 802 SCpnt->result = DID_OK << 16; 803 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */ 804 } else if (arbit & ARBIT_FAIL) { 805 /* Arbitration failed */ 806 SCpnt->result = DID_BUS_BUSY << 16; 807 status = FALSE; 808 } else { 809 /* 810 * unknown error or ARBIT_GO timeout, 811 * something lock up! guess no connection. 812 */ 813 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout"); 814 SCpnt->result = DID_NO_CONNECT << 16; 815 status = FALSE; 816 } 817 818 /* 819 * clear Arbit 820 */ 821 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); 822 823 return status; 824 } 825 826 827 /* 828 * reselection 829 * 830 * Note: This reselection routine is called from msgin_occur, 831 * reselection target id&lun must be already set. 832 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation. 833 */ 834 static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun) 835 { 836 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 837 unsigned int host_id = SCpnt->device->host->this_id; 838 unsigned int base = SCpnt->device->host->io_port; 839 unsigned char tmpid, newid; 840 841 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter"); 842 843 /* 844 * calculate reselected SCSI ID 845 */ 846 tmpid = nsp32_read1(base, RESELECT_ID); 847 tmpid &= (~BIT(host_id)); 848 newid = 0; 849 while (tmpid) { 850 if (tmpid & 1) { 851 break; 852 } 853 tmpid >>= 1; 854 newid++; 855 } 856 857 /* 858 * If reselected New ID:LUN is not existed 859 * or current nexus is not existed, unexpected 860 * reselection is occurred. Send reject message. 861 */ 862 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) { 863 nsp32_msg(KERN_WARNING, "unknown id/lun"); 864 return FALSE; 865 } else if(data->lunt[newid][newlun].SCpnt == NULL) { 866 nsp32_msg(KERN_WARNING, "no SCSI command is processing"); 867 return FALSE; 868 } 869 870 data->cur_id = newid; 871 data->cur_lun = newlun; 872 data->cur_target = &(data->target[newid]); 873 data->cur_lunt = &(data->lunt[newid][newlun]); 874 875 /* reset SACK/SavedACK counter (or ALL clear?) */ 876 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 877 878 return TRUE; 879 } 880 881 882 /* 883 * nsp32_setup_sg_table - build scatter gather list for transfer data 884 * with bus master. 885 * 886 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time. 887 */ 888 static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt) 889 { 890 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 891 struct scatterlist *sgl; 892 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; 893 int num, i; 894 u32_le l; 895 896 if (SCpnt->request_bufflen == 0) { 897 return TRUE; 898 } 899 900 if (sgt == NULL) { 901 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null"); 902 return FALSE; 903 } 904 905 if (SCpnt->use_sg) { 906 sgl = (struct scatterlist *)SCpnt->request_buffer; 907 num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg, 908 SCpnt->sc_data_direction); 909 for (i = 0; i < num; i++) { 910 /* 911 * Build nsp32_sglist, substitute sg dma addresses. 912 */ 913 sgt[i].addr = cpu_to_le32(sg_dma_address(sgl)); 914 sgt[i].len = cpu_to_le32(sg_dma_len(sgl)); 915 sgl++; 916 917 if (le32_to_cpu(sgt[i].len) > 0x10000) { 918 nsp32_msg(KERN_ERR, 919 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len)); 920 return FALSE; 921 } 922 nsp32_dbg(NSP32_DEBUG_SGLIST, 923 "num 0x%x : addr 0x%lx len 0x%lx", 924 i, 925 le32_to_cpu(sgt[i].addr), 926 le32_to_cpu(sgt[i].len )); 927 } 928 929 /* set end mark */ 930 l = le32_to_cpu(sgt[num-1].len); 931 sgt[num-1].len = cpu_to_le32(l | SGTEND); 932 933 } else { 934 SCpnt->SCp.have_data_in = pci_map_single(data->Pci, 935 SCpnt->request_buffer, SCpnt->request_bufflen, 936 SCpnt->sc_data_direction); 937 938 sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in); 939 sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */ 940 941 if (SCpnt->request_bufflen > 0x10000) { 942 nsp32_msg(KERN_ERR, 943 "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen); 944 return FALSE; 945 } 946 nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx", 947 le32_to_cpu(sgt[0].addr), 948 le32_to_cpu(sgt[0].len )); 949 } 950 951 return TRUE; 952 } 953 954 static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) 955 { 956 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 957 nsp32_target *target; 958 nsp32_lunt *cur_lunt; 959 int ret; 960 961 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 962 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x " 963 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x", 964 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len, 965 SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen); 966 967 if (data->CurrentSC != NULL) { 968 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request"); 969 data->CurrentSC = NULL; 970 SCpnt->result = DID_NO_CONNECT << 16; 971 done(SCpnt); 972 return 0; 973 } 974 975 /* check target ID is not same as this initiator ID */ 976 if (SCpnt->device->id == SCpnt->device->host->this_id) { 977 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???"); 978 SCpnt->result = DID_BAD_TARGET << 16; 979 done(SCpnt); 980 return 0; 981 } 982 983 /* check target LUN is allowable value */ 984 if (SCpnt->device->lun >= MAX_LUN) { 985 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun"); 986 SCpnt->result = DID_BAD_TARGET << 16; 987 done(SCpnt); 988 return 0; 989 } 990 991 show_command(SCpnt); 992 993 SCpnt->scsi_done = done; 994 data->CurrentSC = SCpnt; 995 SCpnt->SCp.Status = CHECK_CONDITION; 996 SCpnt->SCp.Message = 0; 997 SCpnt->resid = SCpnt->request_bufflen; 998 999 SCpnt->SCp.ptr = (char *) SCpnt->request_buffer; 1000 SCpnt->SCp.this_residual = SCpnt->request_bufflen; 1001 SCpnt->SCp.buffer = NULL; 1002 SCpnt->SCp.buffers_residual = 0; 1003 1004 /* initialize data */ 1005 data->msgout_len = 0; 1006 data->msgin_len = 0; 1007 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]); 1008 cur_lunt->SCpnt = SCpnt; 1009 cur_lunt->save_datp = 0; 1010 cur_lunt->msgin03 = FALSE; 1011 data->cur_lunt = cur_lunt; 1012 data->cur_id = SCpnt->device->id; 1013 data->cur_lun = SCpnt->device->lun; 1014 1015 ret = nsp32_setup_sg_table(SCpnt); 1016 if (ret == FALSE) { 1017 nsp32_msg(KERN_ERR, "SGT fail"); 1018 SCpnt->result = DID_ERROR << 16; 1019 nsp32_scsi_done(SCpnt); 1020 return 0; 1021 } 1022 1023 /* Build IDENTIFY */ 1024 nsp32_build_identify(SCpnt); 1025 1026 /* 1027 * If target is the first time to transfer after the reset 1028 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync 1029 * message SDTR is needed to do synchronous transfer. 1030 */ 1031 target = &data->target[SCpnt->device->id]; 1032 data->cur_target = target; 1033 1034 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) { 1035 unsigned char period, offset; 1036 1037 if (trans_mode != ASYNC_MODE) { 1038 nsp32_set_max_sync(data, target, &period, &offset); 1039 nsp32_build_sdtr(SCpnt, period, offset); 1040 target->sync_flag |= SDTR_INITIATOR; 1041 } else { 1042 nsp32_set_async(data, target); 1043 target->sync_flag |= SDTR_DONE; 1044 } 1045 1046 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1047 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n", 1048 target->limit_entry, period, offset); 1049 } else if (target->sync_flag & SDTR_INITIATOR) { 1050 /* 1051 * It was negotiating SDTR with target, sending from the 1052 * initiator, but there are no chance to remove this flag. 1053 * Set async because we don't get proper negotiation. 1054 */ 1055 nsp32_set_async(data, target); 1056 target->sync_flag &= ~SDTR_INITIATOR; 1057 target->sync_flag |= SDTR_DONE; 1058 1059 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1060 "SDTR_INITIATOR: fall back to async"); 1061 } else if (target->sync_flag & SDTR_TARGET) { 1062 /* 1063 * It was negotiating SDTR with target, sending from target, 1064 * but there are no chance to remove this flag. Set async 1065 * because we don't get proper negotiation. 1066 */ 1067 nsp32_set_async(data, target); 1068 target->sync_flag &= ~SDTR_TARGET; 1069 target->sync_flag |= SDTR_DONE; 1070 1071 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1072 "Unknown SDTR from target is reached, fall back to async."); 1073 } 1074 1075 nsp32_dbg(NSP32_DEBUG_TARGETFLAG, 1076 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x", 1077 SCpnt->device->id, target->sync_flag, target->syncreg, 1078 target->ackwidth); 1079 1080 /* Selection */ 1081 if (auto_param == 0) { 1082 ret = nsp32_selection_autopara(SCpnt); 1083 } else { 1084 ret = nsp32_selection_autoscsi(SCpnt); 1085 } 1086 1087 if (ret != TRUE) { 1088 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail"); 1089 nsp32_scsi_done(SCpnt); 1090 } 1091 1092 return 0; 1093 } 1094 1095 /* initialize asic */ 1096 static int nsp32hw_init(nsp32_hw_data *data) 1097 { 1098 unsigned int base = data->BaseAddress; 1099 unsigned short irq_stat; 1100 unsigned long lc_reg; 1101 unsigned char power; 1102 1103 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE); 1104 if ((lc_reg & 0xff00) == 0) { 1105 lc_reg |= (0x20 << 8); 1106 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff); 1107 } 1108 1109 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 1110 nsp32_write2(base, TRANSFER_CONTROL, 0); 1111 nsp32_write4(base, BM_CNT, 0); 1112 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); 1113 1114 do { 1115 irq_stat = nsp32_read2(base, IRQ_STATUS); 1116 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat); 1117 } while (irq_stat & IRQSTATUS_ANY_IRQ); 1118 1119 /* 1120 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is 1121 * designated by specification. 1122 */ 1123 if ((data->trans_method & NSP32_TRANSFER_PIO) || 1124 (data->trans_method & NSP32_TRANSFER_MMIO)) { 1125 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40); 1126 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40); 1127 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 1128 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10); 1129 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60); 1130 } else { 1131 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode"); 1132 } 1133 1134 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x", 1135 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT), 1136 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT)); 1137 1138 nsp32_index_write1(base, CLOCK_DIV, data->clock); 1139 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD); 1140 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */ 1141 1142 /* 1143 * initialize MISC_WRRD register 1144 * 1145 * Note: Designated parameters is obeyed as following: 1146 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set. 1147 * MISC_MASTER_TERMINATION_SELECT: It must be set. 1148 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set. 1149 * MISC_AUTOSEL_TIMING_SEL: It should be set. 1150 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set. 1151 * MISC_DELAYED_BMSTART: It's selected for safety. 1152 * 1153 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then 1154 * we have to set TRANSFERCONTROL_BM_START as 0 and set 1155 * appropriate value before restarting bus master transfer. 1156 */ 1157 nsp32_index_write2(base, MISC_WR, 1158 (SCSI_DIRECTION_DETECTOR_SELECT | 1159 DELAYED_BMSTART | 1160 MASTER_TERMINATION_SELECT | 1161 BMREQ_NEGATE_TIMING_SEL | 1162 AUTOSEL_TIMING_SEL | 1163 BMSTOP_CHANGE2_NONDATA_PHASE)); 1164 1165 nsp32_index_write1(base, TERM_PWR_CONTROL, 0); 1166 power = nsp32_index_read1(base, TERM_PWR_CONTROL); 1167 if (!(power & SENSE)) { 1168 nsp32_msg(KERN_INFO, "term power on"); 1169 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR); 1170 } 1171 1172 nsp32_write2(base, TIMER_SET, TIMER_STOP); 1173 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */ 1174 1175 nsp32_write1(base, SYNC_REG, 0); 1176 nsp32_write1(base, ACK_WIDTH, 0); 1177 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 1178 1179 /* 1180 * enable to select designated IRQ (except for 1181 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR) 1182 */ 1183 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ | 1184 IRQSELECT_SCSIRESET_IRQ | 1185 IRQSELECT_FIFO_SHLD_IRQ | 1186 IRQSELECT_RESELECT_IRQ | 1187 IRQSELECT_PHASE_CHANGE_IRQ | 1188 IRQSELECT_AUTO_SCSI_SEQ_IRQ | 1189 // IRQSELECT_BMCNTERR_IRQ | 1190 IRQSELECT_TARGET_ABORT_IRQ | 1191 IRQSELECT_MASTER_ABORT_IRQ ); 1192 nsp32_write2(base, IRQ_CONTROL, 0); 1193 1194 /* PCI LED off */ 1195 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF); 1196 nsp32_index_write1(base, EXT_PORT, LED_OFF); 1197 1198 return TRUE; 1199 } 1200 1201 1202 /* interrupt routine */ 1203 static irqreturn_t do_nsp32_isr(int irq, void *dev_id, struct pt_regs *regs) 1204 { 1205 nsp32_hw_data *data = dev_id; 1206 unsigned int base = data->BaseAddress; 1207 struct scsi_cmnd *SCpnt = data->CurrentSC; 1208 unsigned short auto_stat, irq_stat, trans_stat; 1209 unsigned char busmon, busphase; 1210 unsigned long flags; 1211 int ret; 1212 int handled = 0; 1213 1214 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) 1215 struct Scsi_Host *host = data->Host; 1216 spin_lock_irqsave(host->host_lock, flags); 1217 #else 1218 spin_lock_irqsave(&io_request_lock, flags); 1219 #endif 1220 1221 /* 1222 * IRQ check, then enable IRQ mask 1223 */ 1224 irq_stat = nsp32_read2(base, IRQ_STATUS); 1225 nsp32_dbg(NSP32_DEBUG_INTR, 1226 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat); 1227 /* is this interrupt comes from Ninja asic? */ 1228 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) { 1229 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat); 1230 goto out2; 1231 } 1232 handled = 1; 1233 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 1234 1235 busmon = nsp32_read1(base, SCSI_BUS_MONITOR); 1236 busphase = busmon & BUSMON_PHASE_MASK; 1237 1238 trans_stat = nsp32_read2(base, TRANSFER_STATUS); 1239 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) { 1240 nsp32_msg(KERN_INFO, "card disconnect"); 1241 if (data->CurrentSC != NULL) { 1242 nsp32_msg(KERN_INFO, "clean up current SCSI command"); 1243 SCpnt->result = DID_BAD_TARGET << 16; 1244 nsp32_scsi_done(SCpnt); 1245 } 1246 goto out; 1247 } 1248 1249 /* Timer IRQ */ 1250 if (irq_stat & IRQSTATUS_TIMER_IRQ) { 1251 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop"); 1252 nsp32_write2(base, TIMER_SET, TIMER_STOP); 1253 goto out; 1254 } 1255 1256 /* SCSI reset */ 1257 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) { 1258 nsp32_msg(KERN_INFO, "detected someone do bus reset"); 1259 nsp32_do_bus_reset(data); 1260 if (SCpnt != NULL) { 1261 SCpnt->result = DID_RESET << 16; 1262 nsp32_scsi_done(SCpnt); 1263 } 1264 goto out; 1265 } 1266 1267 if (SCpnt == NULL) { 1268 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened"); 1269 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1270 goto out; 1271 } 1272 1273 /* 1274 * AutoSCSI Interrupt. 1275 * Note: This interrupt is occurred when AutoSCSI is finished. Then 1276 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are 1277 * recorded when AutoSCSI sequencer has been processed. 1278 */ 1279 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) { 1280 /* getting SCSI executed phase */ 1281 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE); 1282 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); 1283 1284 /* Selection Timeout, go busfree phase. */ 1285 if (auto_stat & SELECTION_TIMEOUT) { 1286 nsp32_dbg(NSP32_DEBUG_INTR, 1287 "selection timeout occurred"); 1288 1289 SCpnt->result = DID_TIME_OUT << 16; 1290 nsp32_scsi_done(SCpnt); 1291 goto out; 1292 } 1293 1294 if (auto_stat & MSGOUT_PHASE) { 1295 /* 1296 * MsgOut phase was processed. 1297 * If MSG_IN_OCCUER is not set, then MsgOut phase is 1298 * completed. Thus, msgout_len must reset. Otherwise, 1299 * nothing to do here. If MSG_OUT_OCCUER is occurred, 1300 * then we will encounter the condition and check. 1301 */ 1302 if (!(auto_stat & MSG_IN_OCCUER) && 1303 (data->msgout_len <= 3)) { 1304 /* 1305 * !MSG_IN_OCCUER && msgout_len <=3 1306 * ---> AutoSCSI with MSGOUTreg is processed. 1307 */ 1308 data->msgout_len = 0; 1309 }; 1310 1311 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed"); 1312 } 1313 1314 if ((auto_stat & DATA_IN_PHASE) && 1315 (SCpnt->resid > 0) && 1316 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) { 1317 printk( "auto+fifo\n"); 1318 //nsp32_pio_read(SCpnt); 1319 } 1320 1321 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) { 1322 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */ 1323 nsp32_dbg(NSP32_DEBUG_INTR, 1324 "Data in/out phase processed"); 1325 1326 /* read BMCNT, SGT pointer addr */ 1327 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx", 1328 nsp32_read4(base, BM_CNT)); 1329 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx", 1330 nsp32_read4(base, SGT_ADR)); 1331 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx", 1332 nsp32_read4(base, SACK_CNT)); 1333 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx", 1334 nsp32_read4(base, SAVED_SACK_CNT)); 1335 1336 SCpnt->resid = 0; /* all data transfered! */ 1337 } 1338 1339 /* 1340 * MsgIn Occur 1341 */ 1342 if (auto_stat & MSG_IN_OCCUER) { 1343 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat); 1344 } 1345 1346 /* 1347 * MsgOut Occur 1348 */ 1349 if (auto_stat & MSG_OUT_OCCUER) { 1350 nsp32_msgout_occur(SCpnt); 1351 } 1352 1353 /* 1354 * Bus Free Occur 1355 */ 1356 if (auto_stat & BUS_FREE_OCCUER) { 1357 ret = nsp32_busfree_occur(SCpnt, auto_stat); 1358 if (ret == TRUE) { 1359 goto out; 1360 } 1361 } 1362 1363 if (auto_stat & STATUS_PHASE) { 1364 /* 1365 * Read CSB and substitute CSB for SCpnt->result 1366 * to save status phase stutas byte. 1367 * scsi error handler checks host_byte (DID_*: 1368 * low level driver to indicate status), then checks 1369 * status_byte (SCSI status byte). 1370 */ 1371 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN); 1372 } 1373 1374 if (auto_stat & ILLEGAL_PHASE) { 1375 /* Illegal phase is detected. SACK is not back. */ 1376 nsp32_msg(KERN_WARNING, 1377 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!"); 1378 1379 /* TODO: currently we don't have any action... bus reset? */ 1380 1381 /* 1382 * To send back SACK, assert, wait, and negate. 1383 */ 1384 nsp32_sack_assert(data); 1385 nsp32_wait_req(data, NEGATE); 1386 nsp32_sack_negate(data); 1387 1388 } 1389 1390 if (auto_stat & COMMAND_PHASE) { 1391 /* nothing to do */ 1392 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed"); 1393 } 1394 1395 if (auto_stat & AUTOSCSI_BUSY) { 1396 /* AutoSCSI is running */ 1397 } 1398 1399 show_autophase(auto_stat); 1400 } 1401 1402 /* FIFO_SHLD_IRQ */ 1403 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) { 1404 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ"); 1405 1406 switch(busphase) { 1407 case BUSPHASE_DATA_OUT: 1408 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write"); 1409 1410 //nsp32_pio_write(SCpnt); 1411 1412 break; 1413 1414 case BUSPHASE_DATA_IN: 1415 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read"); 1416 1417 //nsp32_pio_read(SCpnt); 1418 1419 break; 1420 1421 case BUSPHASE_STATUS: 1422 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status"); 1423 1424 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1425 1426 break; 1427 default: 1428 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase"); 1429 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1430 show_busphase(busphase); 1431 break; 1432 } 1433 1434 goto out; 1435 } 1436 1437 /* Phase Change IRQ */ 1438 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) { 1439 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ"); 1440 1441 switch(busphase) { 1442 case BUSPHASE_MESSAGE_IN: 1443 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in"); 1444 nsp32_msgin_occur(SCpnt, irq_stat, 0); 1445 break; 1446 default: 1447 nsp32_msg(KERN_WARNING, "phase chg/other phase?"); 1448 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n", 1449 irq_stat, trans_stat); 1450 show_busphase(busphase); 1451 break; 1452 } 1453 goto out; 1454 } 1455 1456 /* PCI_IRQ */ 1457 if (irq_stat & IRQSTATUS_PCI_IRQ) { 1458 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred"); 1459 /* Do nothing */ 1460 } 1461 1462 /* BMCNTERR_IRQ */ 1463 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) { 1464 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! "); 1465 /* 1466 * TODO: To be implemented improving bus master 1467 * transfer reliablity when BMCNTERR is occurred in 1468 * AutoSCSI phase described in specification. 1469 */ 1470 } 1471 1472 #if 0 1473 nsp32_dbg(NSP32_DEBUG_INTR, 1474 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1475 show_busphase(busphase); 1476 #endif 1477 1478 out: 1479 /* disable IRQ mask */ 1480 nsp32_write2(base, IRQ_CONTROL, 0); 1481 1482 out2: 1483 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) 1484 spin_unlock_irqrestore(host->host_lock, flags); 1485 #else 1486 spin_unlock_irqrestore(&io_request_lock, flags); 1487 #endif 1488 1489 nsp32_dbg(NSP32_DEBUG_INTR, "exit"); 1490 1491 return IRQ_RETVAL(handled); 1492 } 1493 1494 #undef SPRINTF 1495 #define SPRINTF(args...) \ 1496 do { \ 1497 if(length > (pos - buffer)) { \ 1498 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \ 1499 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\ 1500 } \ 1501 } while(0) 1502 static int nsp32_proc_info( 1503 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 1504 struct Scsi_Host *host, 1505 #endif 1506 char *buffer, 1507 char **start, 1508 off_t offset, 1509 int length, 1510 #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 1511 int hostno, 1512 #endif 1513 int inout) 1514 { 1515 char *pos = buffer; 1516 int thislength; 1517 unsigned long flags; 1518 nsp32_hw_data *data; 1519 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 1520 int hostno; 1521 #else 1522 struct Scsi_Host *host; 1523 #endif 1524 unsigned int base; 1525 unsigned char mode_reg; 1526 int id, speed; 1527 long model; 1528 1529 /* Write is not supported, just return. */ 1530 if (inout == TRUE) { 1531 return -EINVAL; 1532 } 1533 1534 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 1535 hostno = host->host_no; 1536 #else 1537 /* search this HBA host */ 1538 host = scsi_host_hn_get(hostno); 1539 if (host == NULL) { 1540 return -ESRCH; 1541 } 1542 #endif 1543 data = (nsp32_hw_data *)host->hostdata; 1544 base = host->io_port; 1545 1546 SPRINTF("NinjaSCSI-32 status\n\n"); 1547 SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version); 1548 SPRINTF("SCSI host No.: %d\n", hostno); 1549 SPRINTF("IRQ: %d\n", host->irq); 1550 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1); 1551 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1); 1552 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize); 1553 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff); 1554 1555 mode_reg = nsp32_index_read1(base, CHIP_MODE); 1556 model = data->pci_devid->driver_data; 1557 1558 #ifdef CONFIG_PM 1559 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no"); 1560 #endif 1561 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]); 1562 1563 spin_lock_irqsave(&(data->Lock), flags); 1564 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC); 1565 spin_unlock_irqrestore(&(data->Lock), flags); 1566 1567 1568 SPRINTF("SDTR status\n"); 1569 for (id = 0; id < ARRAY_SIZE(data->target); id++) { 1570 1571 SPRINTF("id %d: ", id); 1572 1573 if (id == host->this_id) { 1574 SPRINTF("----- NinjaSCSI-32 host adapter\n"); 1575 continue; 1576 } 1577 1578 if (data->target[id].sync_flag == SDTR_DONE) { 1579 if (data->target[id].period == 0 && 1580 data->target[id].offset == ASYNC_OFFSET ) { 1581 SPRINTF("async"); 1582 } else { 1583 SPRINTF(" sync"); 1584 } 1585 } else { 1586 SPRINTF(" none"); 1587 } 1588 1589 if (data->target[id].period != 0) { 1590 1591 speed = 1000000 / (data->target[id].period * 4); 1592 1593 SPRINTF(" transfer %d.%dMB/s, offset %d", 1594 speed / 1000, 1595 speed % 1000, 1596 data->target[id].offset 1597 ); 1598 } 1599 SPRINTF("\n"); 1600 } 1601 1602 1603 thislength = pos - (buffer + offset); 1604 1605 if(thislength < 0) { 1606 *start = NULL; 1607 return 0; 1608 } 1609 1610 1611 thislength = min(thislength, length); 1612 *start = buffer + offset; 1613 1614 return thislength; 1615 } 1616 #undef SPRINTF 1617 1618 1619 1620 /* 1621 * Reset parameters and call scsi_done for data->cur_lunt. 1622 * Be careful setting SCpnt->result = DID_* before calling this function. 1623 */ 1624 static void nsp32_scsi_done(struct scsi_cmnd *SCpnt) 1625 { 1626 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1627 unsigned int base = SCpnt->device->host->io_port; 1628 1629 /* 1630 * unmap pci 1631 */ 1632 if (SCpnt->request_bufflen == 0) { 1633 goto skip; 1634 } 1635 1636 if (SCpnt->use_sg) { 1637 pci_unmap_sg(data->Pci, 1638 (struct scatterlist *)SCpnt->buffer, 1639 SCpnt->use_sg, SCpnt->sc_data_direction); 1640 } else { 1641 pci_unmap_single(data->Pci, 1642 (u32)SCpnt->SCp.have_data_in, 1643 SCpnt->request_bufflen, 1644 SCpnt->sc_data_direction); 1645 } 1646 1647 skip: 1648 /* 1649 * clear TRANSFERCONTROL_BM_START 1650 */ 1651 nsp32_write2(base, TRANSFER_CONTROL, 0); 1652 nsp32_write4(base, BM_CNT, 0); 1653 1654 /* 1655 * call scsi_done 1656 */ 1657 (*SCpnt->scsi_done)(SCpnt); 1658 1659 /* 1660 * reset parameters 1661 */ 1662 data->cur_lunt->SCpnt = NULL; 1663 data->cur_lunt = NULL; 1664 data->cur_target = NULL; 1665 data->CurrentSC = NULL; 1666 } 1667 1668 1669 /* 1670 * Bus Free Occur 1671 * 1672 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase 1673 * with ACK reply when below condition is matched: 1674 * MsgIn 00: Command Complete. 1675 * MsgIn 02: Save Data Pointer. 1676 * MsgIn 04: Diconnect. 1677 * In other case, unexpected BUSFREE is detected. 1678 */ 1679 static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph) 1680 { 1681 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1682 unsigned int base = SCpnt->device->host->io_port; 1683 1684 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph); 1685 show_autophase(execph); 1686 1687 nsp32_write4(base, BM_CNT, 0); 1688 nsp32_write2(base, TRANSFER_CONTROL, 0); 1689 1690 /* 1691 * MsgIn 02: Save Data Pointer 1692 * 1693 * VALID: 1694 * Save Data Pointer is received. Adjust pointer. 1695 * 1696 * NO-VALID: 1697 * SCSI-3 says if Save Data Pointer is not received, then we restart 1698 * processing and we can't adjust any SCSI data pointer in next data 1699 * phase. 1700 */ 1701 if (execph & MSGIN_02_VALID) { 1702 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid"); 1703 1704 /* 1705 * Check sack_cnt/saved_sack_cnt, then adjust sg table if 1706 * needed. 1707 */ 1708 if (!(execph & MSGIN_00_VALID) && 1709 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) { 1710 unsigned int sacklen, s_sacklen; 1711 1712 /* 1713 * Read SACK count and SAVEDSACK count, then compare. 1714 */ 1715 sacklen = nsp32_read4(base, SACK_CNT ); 1716 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); 1717 1718 /* 1719 * If SAVEDSACKCNT == 0, it means SavedDataPointer is 1720 * come after data transfering. 1721 */ 1722 if (s_sacklen > 0) { 1723 /* 1724 * Comparing between sack and savedsack to 1725 * check the condition of AutoMsgIn03. 1726 * 1727 * If they are same, set msgin03 == TRUE, 1728 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at 1729 * reselection. On the other hand, if they 1730 * aren't same, set msgin03 == FALSE, and 1731 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at 1732 * reselection. 1733 */ 1734 if (sacklen != s_sacklen) { 1735 data->cur_lunt->msgin03 = FALSE; 1736 } else { 1737 data->cur_lunt->msgin03 = TRUE; 1738 } 1739 1740 nsp32_adjust_busfree(SCpnt, s_sacklen); 1741 } 1742 } 1743 1744 /* This value has not substitude with valid value yet... */ 1745 //data->cur_lunt->save_datp = data->cur_datp; 1746 } else { 1747 /* 1748 * no processing. 1749 */ 1750 } 1751 1752 if (execph & MSGIN_03_VALID) { 1753 /* MsgIn03 was valid to be processed. No need processing. */ 1754 } 1755 1756 /* 1757 * target SDTR check 1758 */ 1759 if (data->cur_target->sync_flag & SDTR_INITIATOR) { 1760 /* 1761 * SDTR negotiation pulled by the initiator has not 1762 * finished yet. Fall back to ASYNC mode. 1763 */ 1764 nsp32_set_async(data, data->cur_target); 1765 data->cur_target->sync_flag &= ~SDTR_INITIATOR; 1766 data->cur_target->sync_flag |= SDTR_DONE; 1767 } else if (data->cur_target->sync_flag & SDTR_TARGET) { 1768 /* 1769 * SDTR negotiation pulled by the target has been 1770 * negotiating. 1771 */ 1772 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) { 1773 /* 1774 * If valid message is received, then 1775 * negotiation is succeeded. 1776 */ 1777 } else { 1778 /* 1779 * On the contrary, if unexpected bus free is 1780 * occurred, then negotiation is failed. Fall 1781 * back to ASYNC mode. 1782 */ 1783 nsp32_set_async(data, data->cur_target); 1784 } 1785 data->cur_target->sync_flag &= ~SDTR_TARGET; 1786 data->cur_target->sync_flag |= SDTR_DONE; 1787 } 1788 1789 /* 1790 * It is always ensured by SCSI standard that initiator 1791 * switches into Bus Free Phase after 1792 * receiving message 00 (Command Complete), 04 (Disconnect). 1793 * It's the reason that processing here is valid. 1794 */ 1795 if (execph & MSGIN_00_VALID) { 1796 /* MsgIn 00: Command Complete */ 1797 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete"); 1798 1799 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1800 SCpnt->SCp.Message = 0; 1801 nsp32_dbg(NSP32_DEBUG_BUSFREE, 1802 "normal end stat=0x%x resid=0x%x\n", 1803 SCpnt->SCp.Status, SCpnt->resid); 1804 SCpnt->result = (DID_OK << 16) | 1805 (SCpnt->SCp.Message << 8) | 1806 (SCpnt->SCp.Status << 0); 1807 nsp32_scsi_done(SCpnt); 1808 /* All operation is done */ 1809 return TRUE; 1810 } else if (execph & MSGIN_04_VALID) { 1811 /* MsgIn 04: Disconnect */ 1812 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1813 SCpnt->SCp.Message = 4; 1814 1815 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect"); 1816 return TRUE; 1817 } else { 1818 /* Unexpected bus free */ 1819 nsp32_msg(KERN_WARNING, "unexpected bus free occurred"); 1820 1821 /* DID_ERROR? */ 1822 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0); 1823 SCpnt->result = DID_ERROR << 16; 1824 nsp32_scsi_done(SCpnt); 1825 return TRUE; 1826 } 1827 return FALSE; 1828 } 1829 1830 1831 /* 1832 * nsp32_adjust_busfree - adjusting SG table 1833 * 1834 * Note: This driver adjust the SG table using SCSI ACK 1835 * counter instead of BMCNT counter! 1836 */ 1837 static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen) 1838 { 1839 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1840 int old_entry = data->cur_entry; 1841 int new_entry; 1842 int sg_num = data->cur_lunt->sg_num; 1843 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; 1844 unsigned int restlen, sentlen; 1845 u32_le len, addr; 1846 1847 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid); 1848 1849 /* adjust saved SACK count with 4 byte start address boundary */ 1850 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3; 1851 1852 /* 1853 * calculate new_entry from sack count and each sgt[].len 1854 * calculate the byte which is intent to send 1855 */ 1856 sentlen = 0; 1857 for (new_entry = old_entry; new_entry < sg_num; new_entry++) { 1858 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND); 1859 if (sentlen > s_sacklen) { 1860 break; 1861 } 1862 } 1863 1864 /* all sgt is processed */ 1865 if (new_entry == sg_num) { 1866 goto last; 1867 } 1868 1869 if (sentlen == s_sacklen) { 1870 /* XXX: confirm it's ok or not */ 1871 /* In this case, it's ok because we are at 1872 the head element of the sg. restlen is correctly calculated. */ 1873 } 1874 1875 /* calculate the rest length for transfering */ 1876 restlen = sentlen - s_sacklen; 1877 1878 /* update adjusting current SG table entry */ 1879 len = le32_to_cpu(sgt[new_entry].len); 1880 addr = le32_to_cpu(sgt[new_entry].addr); 1881 addr += (len - restlen); 1882 sgt[new_entry].addr = cpu_to_le32(addr); 1883 sgt[new_entry].len = cpu_to_le32(restlen); 1884 1885 /* set cur_entry with new_entry */ 1886 data->cur_entry = new_entry; 1887 1888 return; 1889 1890 last: 1891 if (SCpnt->resid < sentlen) { 1892 nsp32_msg(KERN_ERR, "resid underflow"); 1893 } 1894 1895 SCpnt->resid -= sentlen; 1896 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid); 1897 1898 /* update hostdata and lun */ 1899 1900 return; 1901 } 1902 1903 1904 /* 1905 * It's called MsgOut phase occur. 1906 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in 1907 * message out phase. It, however, has more than 3 messages, 1908 * HBA creates the interrupt and we have to process by hand. 1909 */ 1910 static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt) 1911 { 1912 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1913 unsigned int base = SCpnt->device->host->io_port; 1914 //unsigned short command; 1915 long new_sgtp; 1916 int i; 1917 1918 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, 1919 "enter: msgout_len: 0x%x", data->msgout_len); 1920 1921 /* 1922 * If MsgOut phase is occurred without having any 1923 * message, then No_Operation is sent (SCSI-2). 1924 */ 1925 if (data->msgout_len == 0) { 1926 nsp32_build_nop(SCpnt); 1927 } 1928 1929 /* 1930 * Set SGTP ADDR current entry for restarting AUTOSCSI, 1931 * because SGTP is incremented next point. 1932 * There is few statement in the specification... 1933 */ 1934 new_sgtp = data->cur_lunt->sglun_paddr + 1935 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); 1936 1937 /* 1938 * send messages 1939 */ 1940 for (i = 0; i < data->msgout_len; i++) { 1941 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, 1942 "%d : 0x%x", i, data->msgoutbuf[i]); 1943 1944 /* 1945 * Check REQ is asserted. 1946 */ 1947 nsp32_wait_req(data, ASSERT); 1948 1949 if (i == (data->msgout_len - 1)) { 1950 /* 1951 * If the last message, set the AutoSCSI restart 1952 * before send back the ack message. AutoSCSI 1953 * restart automatically negate ATN signal. 1954 */ 1955 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); 1956 //nsp32_restart_autoscsi(SCpnt, command); 1957 nsp32_write2(base, COMMAND_CONTROL, 1958 (CLEAR_CDB_FIFO_POINTER | 1959 AUTO_COMMAND_PHASE | 1960 AUTOSCSI_RESTART | 1961 AUTO_MSGIN_00_OR_04 | 1962 AUTO_MSGIN_02 )); 1963 } 1964 /* 1965 * Write data with SACK, then wait sack is 1966 * automatically negated. 1967 */ 1968 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]); 1969 nsp32_wait_sack(data, NEGATE); 1970 1971 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n", 1972 nsp32_read1(base, SCSI_BUS_MONITOR)); 1973 }; 1974 1975 data->msgout_len = 0; 1976 1977 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit"); 1978 } 1979 1980 /* 1981 * Restart AutoSCSI 1982 * 1983 * Note: Restarting AutoSCSI needs set: 1984 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL 1985 */ 1986 static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command) 1987 { 1988 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1989 unsigned int base = data->BaseAddress; 1990 unsigned short transfer = 0; 1991 1992 nsp32_dbg(NSP32_DEBUG_RESTART, "enter"); 1993 1994 if (data->cur_target == NULL || data->cur_lunt == NULL) { 1995 nsp32_msg(KERN_ERR, "Target or Lun is invalid"); 1996 } 1997 1998 /* 1999 * set SYNC_REG 2000 * Don't set BM_START_ADR before setting this register. 2001 */ 2002 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); 2003 2004 /* 2005 * set ACKWIDTH 2006 */ 2007 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); 2008 2009 /* 2010 * set SREQ hazard killer sampling rate 2011 */ 2012 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); 2013 2014 /* 2015 * set SGT ADDR (physical address) 2016 */ 2017 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); 2018 2019 /* 2020 * set TRANSFER CONTROL REG 2021 */ 2022 transfer = 0; 2023 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR); 2024 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 2025 if (SCpnt->request_bufflen > 0) { 2026 transfer |= BM_START; 2027 } 2028 } else if (data->trans_method & NSP32_TRANSFER_MMIO) { 2029 transfer |= CB_MMIO_MODE; 2030 } else if (data->trans_method & NSP32_TRANSFER_PIO) { 2031 transfer |= CB_IO_MODE; 2032 } 2033 nsp32_write2(base, TRANSFER_CONTROL, transfer); 2034 2035 /* 2036 * restart AutoSCSI 2037 * 2038 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ? 2039 */ 2040 command |= (CLEAR_CDB_FIFO_POINTER | 2041 AUTO_COMMAND_PHASE | 2042 AUTOSCSI_RESTART ); 2043 nsp32_write2(base, COMMAND_CONTROL, command); 2044 2045 nsp32_dbg(NSP32_DEBUG_RESTART, "exit"); 2046 } 2047 2048 2049 /* 2050 * cannot run automatically message in occur 2051 */ 2052 static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt, 2053 unsigned long irq_status, 2054 unsigned short execph) 2055 { 2056 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2057 unsigned int base = SCpnt->device->host->io_port; 2058 unsigned char msg; 2059 unsigned char msgtype; 2060 unsigned char newlun; 2061 unsigned short command = 0; 2062 int msgclear = TRUE; 2063 long new_sgtp; 2064 int ret; 2065 2066 /* 2067 * read first message 2068 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure 2069 * of Message-In have to be processed before sending back SCSI ACK. 2070 */ 2071 msg = nsp32_read1(base, SCSI_DATA_IN); 2072 data->msginbuf[(unsigned char)data->msgin_len] = msg; 2073 msgtype = data->msginbuf[0]; 2074 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, 2075 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x", 2076 data->msgin_len, msg, msgtype); 2077 2078 /* 2079 * TODO: We need checking whether bus phase is message in? 2080 */ 2081 2082 /* 2083 * assert SCSI ACK 2084 */ 2085 nsp32_sack_assert(data); 2086 2087 /* 2088 * processing IDENTIFY 2089 */ 2090 if (msgtype & 0x80) { 2091 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) { 2092 /* Invalid (non reselect) phase */ 2093 goto reject; 2094 } 2095 2096 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */ 2097 ret = nsp32_reselection(SCpnt, newlun); 2098 if (ret == TRUE) { 2099 goto restart; 2100 } else { 2101 goto reject; 2102 } 2103 } 2104 2105 /* 2106 * processing messages except for IDENTIFY 2107 * 2108 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO. 2109 */ 2110 switch (msgtype) { 2111 /* 2112 * 1-byte message 2113 */ 2114 case COMMAND_COMPLETE: 2115 case DISCONNECT: 2116 /* 2117 * These messages should not be occurred. 2118 * They should be processed on AutoSCSI sequencer. 2119 */ 2120 nsp32_msg(KERN_WARNING, 2121 "unexpected message of AutoSCSI MsgIn: 0x%x", msg); 2122 break; 2123 2124 case RESTORE_POINTERS: 2125 /* 2126 * AutoMsgIn03 is disabled, and HBA gets this message. 2127 */ 2128 2129 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) { 2130 unsigned int s_sacklen; 2131 2132 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); 2133 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) { 2134 nsp32_adjust_busfree(SCpnt, s_sacklen); 2135 } else { 2136 /* No need to rewrite SGT */ 2137 } 2138 } 2139 data->cur_lunt->msgin03 = FALSE; 2140 2141 /* Update with the new value */ 2142 2143 /* reset SACK/SavedACK counter (or ALL clear?) */ 2144 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 2145 2146 /* 2147 * set new sg pointer 2148 */ 2149 new_sgtp = data->cur_lunt->sglun_paddr + 2150 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); 2151 nsp32_write4(base, SGT_ADR, new_sgtp); 2152 2153 break; 2154 2155 case SAVE_POINTERS: 2156 /* 2157 * These messages should not be occurred. 2158 * They should be processed on AutoSCSI sequencer. 2159 */ 2160 nsp32_msg (KERN_WARNING, 2161 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS"); 2162 2163 break; 2164 2165 case MESSAGE_REJECT: 2166 /* If previous message_out is sending SDTR, and get 2167 message_reject from target, SDTR negotiation is failed */ 2168 if (data->cur_target->sync_flag & 2169 (SDTR_INITIATOR | SDTR_TARGET)) { 2170 /* 2171 * Current target is negotiating SDTR, but it's 2172 * failed. Fall back to async transfer mode, and set 2173 * SDTR_DONE. 2174 */ 2175 nsp32_set_async(data, data->cur_target); 2176 data->cur_target->sync_flag &= ~SDTR_INITIATOR; 2177 data->cur_target->sync_flag |= SDTR_DONE; 2178 2179 } 2180 break; 2181 2182 case LINKED_CMD_COMPLETE: 2183 case LINKED_FLG_CMD_COMPLETE: 2184 /* queue tag is not supported currently */ 2185 nsp32_msg (KERN_WARNING, 2186 "unsupported message: 0x%x", msgtype); 2187 break; 2188 2189 case INITIATE_RECOVERY: 2190 /* staring ECA (Extended Contingent Allegiance) state. */ 2191 /* This message is declined in SPI2 or later. */ 2192 2193 goto reject; 2194 2195 /* 2196 * 2-byte message 2197 */ 2198 case SIMPLE_QUEUE_TAG: 2199 case 0x23: 2200 /* 2201 * 0x23: Ignore_Wide_Residue is not declared in scsi.h. 2202 * No support is needed. 2203 */ 2204 if (data->msgin_len >= 1) { 2205 goto reject; 2206 } 2207 2208 /* current position is 1-byte of 2 byte */ 2209 msgclear = FALSE; 2210 2211 break; 2212 2213 /* 2214 * extended message 2215 */ 2216 case EXTENDED_MESSAGE: 2217 if (data->msgin_len < 1) { 2218 /* 2219 * Current position does not reach 2-byte 2220 * (2-byte is extended message length). 2221 */ 2222 msgclear = FALSE; 2223 break; 2224 } 2225 2226 if ((data->msginbuf[1] + 1) > data->msgin_len) { 2227 /* 2228 * Current extended message has msginbuf[1] + 2 2229 * (msgin_len starts counting from 0, so buf[1] + 1). 2230 * If current message position is not finished, 2231 * continue receiving message. 2232 */ 2233 msgclear = FALSE; 2234 break; 2235 } 2236 2237 /* 2238 * Reach here means regular length of each type of 2239 * extended messages. 2240 */ 2241 switch (data->msginbuf[2]) { 2242 case EXTENDED_MODIFY_DATA_POINTER: 2243 /* TODO */ 2244 goto reject; /* not implemented yet */ 2245 break; 2246 2247 case EXTENDED_SDTR: 2248 /* 2249 * Exchange this message between initiator and target. 2250 */ 2251 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) { 2252 /* 2253 * received inappropriate message. 2254 */ 2255 goto reject; 2256 break; 2257 } 2258 2259 nsp32_analyze_sdtr(SCpnt); 2260 2261 break; 2262 2263 case EXTENDED_EXTENDED_IDENTIFY: 2264 /* SCSI-I only, not supported. */ 2265 goto reject; /* not implemented yet */ 2266 2267 break; 2268 2269 case EXTENDED_WDTR: 2270 goto reject; /* not implemented yet */ 2271 2272 break; 2273 2274 default: 2275 goto reject; 2276 } 2277 break; 2278 2279 default: 2280 goto reject; 2281 } 2282 2283 restart: 2284 if (msgclear == TRUE) { 2285 data->msgin_len = 0; 2286 2287 /* 2288 * If restarting AutoSCSI, but there are some message to out 2289 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0 2290 * (MV_VALID = 0). When commandcontrol is written with 2291 * AutoSCSI restart, at the same time MsgOutOccur should be 2292 * happened (however, such situation is really possible...?). 2293 */ 2294 if (data->msgout_len > 0) { 2295 nsp32_write4(base, SCSI_MSG_OUT, 0); 2296 command |= AUTO_ATN; 2297 } 2298 2299 /* 2300 * restart AutoSCSI 2301 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed. 2302 */ 2303 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); 2304 2305 /* 2306 * If current msgin03 is TRUE, then flag on. 2307 */ 2308 if (data->cur_lunt->msgin03 == TRUE) { 2309 command |= AUTO_MSGIN_03; 2310 } 2311 data->cur_lunt->msgin03 = FALSE; 2312 } else { 2313 data->msgin_len++; 2314 } 2315 2316 /* 2317 * restart AutoSCSI 2318 */ 2319 nsp32_restart_autoscsi(SCpnt, command); 2320 2321 /* 2322 * wait SCSI REQ negate for REQ-ACK handshake 2323 */ 2324 nsp32_wait_req(data, NEGATE); 2325 2326 /* 2327 * negate SCSI ACK 2328 */ 2329 nsp32_sack_negate(data); 2330 2331 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); 2332 2333 return; 2334 2335 reject: 2336 nsp32_msg(KERN_WARNING, 2337 "invalid or unsupported MessageIn, rejected. " 2338 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x", 2339 msg, data->msgin_len, msgtype); 2340 nsp32_build_reject(SCpnt); 2341 data->msgin_len = 0; 2342 2343 goto restart; 2344 } 2345 2346 /* 2347 * 2348 */ 2349 static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt) 2350 { 2351 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2352 nsp32_target *target = data->cur_target; 2353 nsp32_sync_table *synct; 2354 unsigned char get_period = data->msginbuf[3]; 2355 unsigned char get_offset = data->msginbuf[4]; 2356 int entry; 2357 int syncnum; 2358 2359 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter"); 2360 2361 synct = data->synct; 2362 syncnum = data->syncnum; 2363 2364 /* 2365 * If this inititor sent the SDTR message, then target responds SDTR, 2366 * initiator SYNCREG, ACKWIDTH from SDTR parameter. 2367 * Messages are not appropriate, then send back reject message. 2368 * If initiator did not send the SDTR, but target sends SDTR, 2369 * initiator calculator the appropriate parameter and send back SDTR. 2370 */ 2371 if (target->sync_flag & SDTR_INITIATOR) { 2372 /* 2373 * Initiator sent SDTR, the target responds and 2374 * send back negotiation SDTR. 2375 */ 2376 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR"); 2377 2378 target->sync_flag &= ~SDTR_INITIATOR; 2379 target->sync_flag |= SDTR_DONE; 2380 2381 /* 2382 * offset: 2383 */ 2384 if (get_offset > SYNC_OFFSET) { 2385 /* 2386 * Negotiation is failed, the target send back 2387 * unexpected offset value. 2388 */ 2389 goto reject; 2390 } 2391 2392 if (get_offset == ASYNC_OFFSET) { 2393 /* 2394 * Negotiation is succeeded, the target want 2395 * to fall back into asynchronous transfer mode. 2396 */ 2397 goto async; 2398 } 2399 2400 /* 2401 * period: 2402 * Check whether sync period is too short. If too short, 2403 * fall back to async mode. If it's ok, then investigate 2404 * the received sync period. If sync period is acceptable 2405 * between sync table start_period and end_period, then 2406 * set this I_T nexus as sent offset and period. 2407 * If it's not acceptable, send back reject and fall back 2408 * to async mode. 2409 */ 2410 if (get_period < data->synct[0].period_num) { 2411 /* 2412 * Negotiation is failed, the target send back 2413 * unexpected period value. 2414 */ 2415 goto reject; 2416 } 2417 2418 entry = nsp32_search_period_entry(data, target, get_period); 2419 2420 if (entry < 0) { 2421 /* 2422 * Target want to use long period which is not 2423 * acceptable NinjaSCSI-32Bi/UDE. 2424 */ 2425 goto reject; 2426 } 2427 2428 /* 2429 * Set new sync table and offset in this I_T nexus. 2430 */ 2431 nsp32_set_sync_entry(data, target, entry, get_offset); 2432 } else { 2433 /* Target send SDTR to initiator. */ 2434 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR"); 2435 2436 target->sync_flag |= SDTR_INITIATOR; 2437 2438 /* offset: */ 2439 if (get_offset > SYNC_OFFSET) { 2440 /* send back as SYNC_OFFSET */ 2441 get_offset = SYNC_OFFSET; 2442 } 2443 2444 /* period: */ 2445 if (get_period < data->synct[0].period_num) { 2446 get_period = data->synct[0].period_num; 2447 } 2448 2449 entry = nsp32_search_period_entry(data, target, get_period); 2450 2451 if (get_offset == ASYNC_OFFSET || entry < 0) { 2452 nsp32_set_async(data, target); 2453 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET); 2454 } else { 2455 nsp32_set_sync_entry(data, target, entry, get_offset); 2456 nsp32_build_sdtr(SCpnt, get_period, get_offset); 2457 } 2458 } 2459 2460 target->period = get_period; 2461 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); 2462 return; 2463 2464 reject: 2465 /* 2466 * If the current message is unacceptable, send back to the target 2467 * with reject message. 2468 */ 2469 nsp32_build_reject(SCpnt); 2470 2471 async: 2472 nsp32_set_async(data, target); /* set as ASYNC transfer mode */ 2473 2474 target->period = 0; 2475 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async"); 2476 return; 2477 } 2478 2479 2480 /* 2481 * Search config entry number matched in sync_table from given 2482 * target and speed period value. If failed to search, return negative value. 2483 */ 2484 static int nsp32_search_period_entry(nsp32_hw_data *data, 2485 nsp32_target *target, 2486 unsigned char period) 2487 { 2488 int i; 2489 2490 if (target->limit_entry >= data->syncnum) { 2491 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!"); 2492 target->limit_entry = 0; 2493 } 2494 2495 for (i = target->limit_entry; i < data->syncnum; i++) { 2496 if (period >= data->synct[i].start_period && 2497 period <= data->synct[i].end_period) { 2498 break; 2499 } 2500 } 2501 2502 /* 2503 * Check given period value is over the sync_table value. 2504 * If so, return max value. 2505 */ 2506 if (i == data->syncnum) { 2507 i = -1; 2508 } 2509 2510 return i; 2511 } 2512 2513 2514 /* 2515 * target <-> initiator use ASYNC transfer 2516 */ 2517 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target) 2518 { 2519 unsigned char period = data->synct[target->limit_entry].period_num; 2520 2521 target->offset = ASYNC_OFFSET; 2522 target->period = 0; 2523 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET); 2524 target->ackwidth = 0; 2525 target->sample_reg = 0; 2526 2527 nsp32_dbg(NSP32_DEBUG_SYNC, "set async"); 2528 } 2529 2530 2531 /* 2532 * target <-> initiator use maximum SYNC transfer 2533 */ 2534 static void nsp32_set_max_sync(nsp32_hw_data *data, 2535 nsp32_target *target, 2536 unsigned char *period, 2537 unsigned char *offset) 2538 { 2539 unsigned char period_num, ackwidth; 2540 2541 period_num = data->synct[target->limit_entry].period_num; 2542 *period = data->synct[target->limit_entry].start_period; 2543 ackwidth = data->synct[target->limit_entry].ackwidth; 2544 *offset = SYNC_OFFSET; 2545 2546 target->syncreg = TO_SYNCREG(period_num, *offset); 2547 target->ackwidth = ackwidth; 2548 target->offset = *offset; 2549 target->sample_reg = 0; /* disable SREQ sampling */ 2550 } 2551 2552 2553 /* 2554 * target <-> initiator use entry number speed 2555 */ 2556 static void nsp32_set_sync_entry(nsp32_hw_data *data, 2557 nsp32_target *target, 2558 int entry, 2559 unsigned char offset) 2560 { 2561 unsigned char period, ackwidth, sample_rate; 2562 2563 period = data->synct[entry].period_num; 2564 ackwidth = data->synct[entry].ackwidth; 2565 offset = offset; 2566 sample_rate = data->synct[entry].sample_rate; 2567 2568 target->syncreg = TO_SYNCREG(period, offset); 2569 target->ackwidth = ackwidth; 2570 target->offset = offset; 2571 target->sample_reg = sample_rate | SAMPLING_ENABLE; 2572 2573 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync"); 2574 } 2575 2576 2577 /* 2578 * It waits until SCSI REQ becomes assertion or negation state. 2579 * 2580 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then 2581 * connected target responds SCSI REQ negation. We have to wait 2582 * SCSI REQ becomes negation in order to negate SCSI ACK signal for 2583 * REQ-ACK handshake. 2584 */ 2585 static void nsp32_wait_req(nsp32_hw_data *data, int state) 2586 { 2587 unsigned int base = data->BaseAddress; 2588 int wait_time = 0; 2589 unsigned char bus, req_bit; 2590 2591 if (!((state == ASSERT) || (state == NEGATE))) { 2592 nsp32_msg(KERN_ERR, "unknown state designation"); 2593 } 2594 /* REQ is BIT(5) */ 2595 req_bit = (state == ASSERT ? BUSMON_REQ : 0); 2596 2597 do { 2598 bus = nsp32_read1(base, SCSI_BUS_MONITOR); 2599 if ((bus & BUSMON_REQ) == req_bit) { 2600 nsp32_dbg(NSP32_DEBUG_WAIT, 2601 "wait_time: %d", wait_time); 2602 return; 2603 } 2604 udelay(1); 2605 wait_time++; 2606 } while (wait_time < REQSACK_TIMEOUT_TIME); 2607 2608 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit); 2609 } 2610 2611 /* 2612 * It waits until SCSI SACK becomes assertion or negation state. 2613 */ 2614 static void nsp32_wait_sack(nsp32_hw_data *data, int state) 2615 { 2616 unsigned int base = data->BaseAddress; 2617 int wait_time = 0; 2618 unsigned char bus, ack_bit; 2619 2620 if (!((state == ASSERT) || (state == NEGATE))) { 2621 nsp32_msg(KERN_ERR, "unknown state designation"); 2622 } 2623 /* ACK is BIT(4) */ 2624 ack_bit = (state == ASSERT ? BUSMON_ACK : 0); 2625 2626 do { 2627 bus = nsp32_read1(base, SCSI_BUS_MONITOR); 2628 if ((bus & BUSMON_ACK) == ack_bit) { 2629 nsp32_dbg(NSP32_DEBUG_WAIT, 2630 "wait_time: %d", wait_time); 2631 return; 2632 } 2633 udelay(1); 2634 wait_time++; 2635 } while (wait_time < REQSACK_TIMEOUT_TIME); 2636 2637 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit); 2638 } 2639 2640 /* 2641 * assert SCSI ACK 2642 * 2643 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1. 2644 */ 2645 static void nsp32_sack_assert(nsp32_hw_data *data) 2646 { 2647 unsigned int base = data->BaseAddress; 2648 unsigned char busctrl; 2649 2650 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); 2651 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB); 2652 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); 2653 } 2654 2655 /* 2656 * negate SCSI ACK 2657 */ 2658 static void nsp32_sack_negate(nsp32_hw_data *data) 2659 { 2660 unsigned int base = data->BaseAddress; 2661 unsigned char busctrl; 2662 2663 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); 2664 busctrl &= ~BUSCTL_ACK; 2665 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); 2666 } 2667 2668 2669 2670 /* 2671 * Note: n_io_port is defined as 0x7f because I/O register port is 2672 * assigned as: 2673 * 0x800-0x8ff: memory mapped I/O port 2674 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly) 2675 * 0xc00-0xfff: CardBus status registers 2676 */ 2677 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 2678 #define DETECT_OK 0 2679 #define DETECT_NG 1 2680 #define PCIDEV pdev 2681 static int nsp32_detect(struct pci_dev *pdev) 2682 #else 2683 #define DETECT_OK 1 2684 #define DETECT_NG 0 2685 #define PCIDEV (data->Pci) 2686 static int nsp32_detect(Scsi_Host_Template *sht) 2687 #endif 2688 { 2689 struct Scsi_Host *host; /* registered host structure */ 2690 struct resource *res; 2691 nsp32_hw_data *data; 2692 int ret; 2693 int i, j; 2694 2695 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 2696 2697 /* 2698 * register this HBA as SCSI device 2699 */ 2700 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 2701 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data)); 2702 #else 2703 host = scsi_register(sht, sizeof(nsp32_hw_data)); 2704 #endif 2705 if (host == NULL) { 2706 nsp32_msg (KERN_ERR, "failed to scsi register"); 2707 goto err; 2708 } 2709 2710 /* 2711 * set nsp32_hw_data 2712 */ 2713 data = (nsp32_hw_data *)host->hostdata; 2714 2715 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data)); 2716 2717 host->irq = data->IrqNumber; 2718 host->io_port = data->BaseAddress; 2719 host->unique_id = data->BaseAddress; 2720 host->n_io_port = data->NumAddress; 2721 host->base = (unsigned long)data->MmioAddress; 2722 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,63)) 2723 scsi_set_device(host, &PCIDEV->dev); 2724 #else 2725 scsi_set_pci_device(host, PCIDEV); 2726 #endif 2727 2728 data->Host = host; 2729 spin_lock_init(&(data->Lock)); 2730 2731 data->cur_lunt = NULL; 2732 data->cur_target = NULL; 2733 2734 /* 2735 * Bus master transfer mode is supported currently. 2736 */ 2737 data->trans_method = NSP32_TRANSFER_BUSMASTER; 2738 2739 /* 2740 * Set clock div, CLOCK_4 (HBA has own external clock, and 2741 * dividing * 100ns/4). 2742 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet. 2743 */ 2744 data->clock = CLOCK_4; 2745 2746 /* 2747 * Select appropriate nsp32_sync_table and set I_CLOCKDIV. 2748 */ 2749 switch (data->clock) { 2750 case CLOCK_4: 2751 /* If data->clock is CLOCK_4, then select 40M sync table. */ 2752 data->synct = nsp32_sync_table_40M; 2753 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); 2754 break; 2755 case CLOCK_2: 2756 /* If data->clock is CLOCK_2, then select 20M sync table. */ 2757 data->synct = nsp32_sync_table_20M; 2758 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M); 2759 break; 2760 case PCICLK: 2761 /* If data->clock is PCICLK, then select pci sync table. */ 2762 data->synct = nsp32_sync_table_pci; 2763 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci); 2764 break; 2765 default: 2766 nsp32_msg(KERN_WARNING, 2767 "Invalid clock div is selected, set CLOCK_4."); 2768 /* Use default value CLOCK_4 */ 2769 data->clock = CLOCK_4; 2770 data->synct = nsp32_sync_table_40M; 2771 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); 2772 } 2773 2774 /* 2775 * setup nsp32_lunt 2776 */ 2777 2778 /* 2779 * setup DMA 2780 */ 2781 if (pci_set_dma_mask(PCIDEV, 0xffffffffUL) != 0) { 2782 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask"); 2783 goto scsi_unregister; 2784 } 2785 2786 /* 2787 * allocate autoparam DMA resource. 2788 */ 2789 data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr)); 2790 if (data->autoparam == NULL) { 2791 nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); 2792 goto scsi_unregister; 2793 } 2794 2795 /* 2796 * allocate scatter-gather DMA resource. 2797 */ 2798 data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE, 2799 &(data->sg_paddr)); 2800 if (data->sg_list == NULL) { 2801 nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); 2802 goto free_autoparam; 2803 } 2804 2805 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) { 2806 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) { 2807 int offset = i * ARRAY_SIZE(data->lunt[0]) + j; 2808 nsp32_lunt tmp = { 2809 .SCpnt = NULL, 2810 .save_datp = 0, 2811 .msgin03 = FALSE, 2812 .sg_num = 0, 2813 .cur_entry = 0, 2814 .sglun = &(data->sg_list[offset]), 2815 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)), 2816 }; 2817 2818 data->lunt[i][j] = tmp; 2819 } 2820 } 2821 2822 /* 2823 * setup target 2824 */ 2825 for (i = 0; i < ARRAY_SIZE(data->target); i++) { 2826 nsp32_target *target = &(data->target[i]); 2827 2828 target->limit_entry = 0; 2829 target->sync_flag = 0; 2830 nsp32_set_async(data, target); 2831 } 2832 2833 /* 2834 * EEPROM check 2835 */ 2836 ret = nsp32_getprom_param(data); 2837 if (ret == FALSE) { 2838 data->resettime = 3; /* default 3 */ 2839 } 2840 2841 /* 2842 * setup HBA 2843 */ 2844 nsp32hw_init(data); 2845 2846 snprintf(data->info_str, sizeof(data->info_str), 2847 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x", 2848 host->irq, host->io_port, host->n_io_port); 2849 2850 /* 2851 * SCSI bus reset 2852 * 2853 * Note: It's important to reset SCSI bus in initialization phase. 2854 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when 2855 * system is coming up, so SCSI devices connected to HBA is set as 2856 * un-asynchronous mode. It brings the merit that this HBA is 2857 * ready to start synchronous transfer without any preparation, 2858 * but we are difficult to control transfer speed. In addition, 2859 * it prevents device transfer speed from effecting EEPROM start-up 2860 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as 2861 * Auto Mode, then FAST-10M is selected when SCSI devices are 2862 * connected same or more than 4 devices. It should be avoided 2863 * depending on this specification. Thus, resetting the SCSI bus 2864 * restores all connected SCSI devices to asynchronous mode, then 2865 * this driver set SDTR safely later, and we can control all SCSI 2866 * device transfer mode. 2867 */ 2868 nsp32_do_bus_reset(data); 2869 2870 ret = request_irq(host->irq, do_nsp32_isr, 2871 SA_SHIRQ | SA_SAMPLE_RANDOM, "nsp32", data); 2872 if (ret < 0) { 2873 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 " 2874 "SCSI PCI controller. Interrupt: %d", host->irq); 2875 goto free_sg_list; 2876 } 2877 2878 /* 2879 * PCI IO register 2880 */ 2881 res = request_region(host->io_port, host->n_io_port, "nsp32"); 2882 if (res == NULL) { 2883 nsp32_msg(KERN_ERR, 2884 "I/O region 0x%lx+0x%lx is already used", 2885 data->BaseAddress, data->NumAddress); 2886 goto free_irq; 2887 } 2888 2889 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 2890 scsi_add_host (host, &PCIDEV->dev); 2891 scsi_scan_host(host); 2892 #endif 2893 pci_set_drvdata(PCIDEV, host); 2894 return DETECT_OK; 2895 2896 free_irq: 2897 free_irq(host->irq, data); 2898 2899 free_sg_list: 2900 pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE, 2901 data->sg_list, data->sg_paddr); 2902 2903 free_autoparam: 2904 pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam), 2905 data->autoparam, data->auto_paddr); 2906 2907 scsi_unregister: 2908 scsi_host_put(host); 2909 2910 err: 2911 return DETECT_NG; 2912 } 2913 #undef DETECT_OK 2914 #undef DETECT_NG 2915 #undef PCIDEV 2916 2917 static int nsp32_release(struct Scsi_Host *host) 2918 { 2919 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 2920 2921 if (data->autoparam) { 2922 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam), 2923 data->autoparam, data->auto_paddr); 2924 } 2925 2926 if (data->sg_list) { 2927 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE, 2928 data->sg_list, data->sg_paddr); 2929 } 2930 2931 if (host->irq) { 2932 free_irq(host->irq, data); 2933 } 2934 2935 if (host->io_port && host->n_io_port) { 2936 release_region(host->io_port, host->n_io_port); 2937 } 2938 2939 if (data->MmioAddress) { 2940 iounmap(data->MmioAddress); 2941 } 2942 2943 return 0; 2944 } 2945 2946 static const char *nsp32_info(struct Scsi_Host *shpnt) 2947 { 2948 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata; 2949 2950 return data->info_str; 2951 } 2952 2953 2954 /**************************************************************************** 2955 * error handler 2956 */ 2957 static int nsp32_eh_abort(struct scsi_cmnd *SCpnt) 2958 { 2959 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2960 unsigned int base = SCpnt->device->host->io_port; 2961 2962 nsp32_msg(KERN_WARNING, "abort"); 2963 2964 if (data->cur_lunt->SCpnt == NULL) { 2965 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed"); 2966 return FAILED; 2967 } 2968 2969 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) { 2970 /* reset SDTR negotiation */ 2971 data->cur_target->sync_flag = 0; 2972 nsp32_set_async(data, data->cur_target); 2973 } 2974 2975 nsp32_write2(base, TRANSFER_CONTROL, 0); 2976 nsp32_write2(base, BM_CNT, 0); 2977 2978 SCpnt->result = DID_ABORT << 16; 2979 nsp32_scsi_done(SCpnt); 2980 2981 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success"); 2982 return SUCCESS; 2983 } 2984 2985 static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt) 2986 { 2987 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2988 unsigned int base = SCpnt->device->host->io_port; 2989 2990 nsp32_msg(KERN_INFO, "Bus Reset"); 2991 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); 2992 2993 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 2994 nsp32_do_bus_reset(data); 2995 nsp32_write2(base, IRQ_CONTROL, 0); 2996 2997 return SUCCESS; /* SCSI bus reset is succeeded at any time. */ 2998 } 2999 3000 static void nsp32_do_bus_reset(nsp32_hw_data *data) 3001 { 3002 unsigned int base = data->BaseAddress; 3003 unsigned short intrdat; 3004 int i; 3005 3006 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in"); 3007 3008 /* 3009 * stop all transfer 3010 * clear TRANSFERCONTROL_BM_START 3011 * clear counter 3012 */ 3013 nsp32_write2(base, TRANSFER_CONTROL, 0); 3014 nsp32_write4(base, BM_CNT, 0); 3015 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 3016 3017 /* 3018 * fall back to asynchronous transfer mode 3019 * initialize SDTR negotiation flag 3020 */ 3021 for (i = 0; i < ARRAY_SIZE(data->target); i++) { 3022 nsp32_target *target = &data->target[i]; 3023 3024 target->sync_flag = 0; 3025 nsp32_set_async(data, target); 3026 } 3027 3028 /* 3029 * reset SCSI bus 3030 */ 3031 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST); 3032 udelay(RESET_HOLD_TIME); 3033 nsp32_write1(base, SCSI_BUS_CONTROL, 0); 3034 for(i = 0; i < 5; i++) { 3035 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */ 3036 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat); 3037 } 3038 3039 data->CurrentSC = NULL; 3040 } 3041 3042 static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt) 3043 { 3044 struct Scsi_Host *host = SCpnt->device->host; 3045 unsigned int base = SCpnt->device->host->io_port; 3046 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 3047 3048 nsp32_msg(KERN_INFO, "Host Reset"); 3049 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); 3050 3051 nsp32hw_init(data); 3052 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 3053 nsp32_do_bus_reset(data); 3054 nsp32_write2(base, IRQ_CONTROL, 0); 3055 3056 return SUCCESS; /* Host reset is succeeded at any time. */ 3057 } 3058 3059 3060 /************************************************************************** 3061 * EEPROM handler 3062 */ 3063 3064 /* 3065 * getting EEPROM parameter 3066 */ 3067 static int nsp32_getprom_param(nsp32_hw_data *data) 3068 { 3069 int vendor = data->pci_devid->vendor; 3070 int device = data->pci_devid->device; 3071 int ret, val, i; 3072 3073 /* 3074 * EEPROM checking. 3075 */ 3076 ret = nsp32_prom_read(data, 0x7e); 3077 if (ret != 0x55) { 3078 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret); 3079 return FALSE; 3080 } 3081 ret = nsp32_prom_read(data, 0x7f); 3082 if (ret != 0xaa) { 3083 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret); 3084 return FALSE; 3085 } 3086 3087 /* 3088 * check EEPROM type 3089 */ 3090 if (vendor == PCI_VENDOR_ID_WORKBIT && 3091 device == PCI_DEVICE_ID_WORKBIT_STANDARD) { 3092 ret = nsp32_getprom_c16(data); 3093 } else if (vendor == PCI_VENDOR_ID_WORKBIT && 3094 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) { 3095 ret = nsp32_getprom_at24(data); 3096 } else if (vendor == PCI_VENDOR_ID_WORKBIT && 3097 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) { 3098 ret = nsp32_getprom_at24(data); 3099 } else { 3100 nsp32_msg(KERN_WARNING, "Unknown EEPROM"); 3101 ret = FALSE; 3102 } 3103 3104 /* for debug : SPROM data full checking */ 3105 for (i = 0; i <= 0x1f; i++) { 3106 val = nsp32_prom_read(data, i); 3107 nsp32_dbg(NSP32_DEBUG_EEPROM, 3108 "rom address 0x%x : 0x%x", i, val); 3109 } 3110 3111 return ret; 3112 } 3113 3114 3115 /* 3116 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map: 3117 * 3118 * ROMADDR 3119 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) 3120 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M 3121 * 0x07 : HBA Synchronous Transfer Period 3122 * Value 0: AutoSync, 1: Manual Setting 3123 * 0x08 - 0x0f : Not Used? (0x0) 3124 * 0x10 : Bus Termination 3125 * Value 0: Auto[ON], 1: ON, 2: OFF 3126 * 0x11 : Not Used? (0) 3127 * 0x12 : Bus Reset Delay Time (0x03) 3128 * 0x13 : Bootable CD Support 3129 * Value 0: Disable, 1: Enable 3130 * 0x14 : Device Scan 3131 * Bit 7 6 5 4 3 2 1 0 3132 * | <-----------------> 3133 * | SCSI ID: Value 0: Skip, 1: YES 3134 * |-> Value 0: ALL scan, Value 1: Manual 3135 * 0x15 - 0x1b : Not Used? (0) 3136 * 0x1c : Constant? (0x01) (clock div?) 3137 * 0x1d - 0x7c : Not Used (0xff) 3138 * 0x7d : Not Used? (0xff) 3139 * 0x7e : Constant (0x55), Validity signature 3140 * 0x7f : Constant (0xaa), Validity signature 3141 */ 3142 static int nsp32_getprom_at24(nsp32_hw_data *data) 3143 { 3144 int ret, i; 3145 int auto_sync; 3146 nsp32_target *target; 3147 int entry; 3148 3149 /* 3150 * Reset time which is designated by EEPROM. 3151 * 3152 * TODO: Not used yet. 3153 */ 3154 data->resettime = nsp32_prom_read(data, 0x12); 3155 3156 /* 3157 * HBA Synchronous Transfer Period 3158 * 3159 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says 3160 * that if auto_sync is 0 (auto), and connected SCSI devices are 3161 * same or lower than 3, then transfer speed is set as ULTRA-20M. 3162 * On the contrary if connected SCSI devices are same or higher 3163 * than 4, then transfer speed is set as FAST-10M. 3164 * 3165 * I break this rule. The number of connected SCSI devices are 3166 * only ignored. If auto_sync is 0 (auto), then transfer speed is 3167 * forced as ULTRA-20M. 3168 */ 3169 ret = nsp32_prom_read(data, 0x07); 3170 switch (ret) { 3171 case 0: 3172 auto_sync = TRUE; 3173 break; 3174 case 1: 3175 auto_sync = FALSE; 3176 break; 3177 default: 3178 nsp32_msg(KERN_WARNING, 3179 "Unsupported Auto Sync mode. Fall back to manual mode."); 3180 auto_sync = TRUE; 3181 } 3182 3183 if (trans_mode == ULTRA20M_MODE) { 3184 auto_sync = TRUE; 3185 } 3186 3187 /* 3188 * each device Synchronous Transfer Period 3189 */ 3190 for (i = 0; i < NSP32_HOST_SCSIID; i++) { 3191 target = &data->target[i]; 3192 if (auto_sync == TRUE) { 3193 target->limit_entry = 0; /* set as ULTRA20M */ 3194 } else { 3195 ret = nsp32_prom_read(data, i); 3196 entry = nsp32_search_period_entry(data, target, ret); 3197 if (entry < 0) { 3198 /* search failed... set maximum speed */ 3199 entry = 0; 3200 } 3201 target->limit_entry = entry; 3202 } 3203 } 3204 3205 return TRUE; 3206 } 3207 3208 3209 /* 3210 * C16 110 (I-O Data: SC-NBD) data map: 3211 * 3212 * ROMADDR 3213 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) 3214 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC 3215 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync) 3216 * 0x08 - 0x0f : Not Used? (0x0) 3217 * 0x10 : Transfer Mode 3218 * Value 0: PIO, 1: Busmater 3219 * 0x11 : Bus Reset Delay Time (0x00-0x20) 3220 * 0x12 : Bus Termination 3221 * Value 0: Disable, 1: Enable 3222 * 0x13 - 0x19 : Disconnection 3223 * Value 0: Disable, 1: Enable 3224 * 0x1a - 0x7c : Not Used? (0) 3225 * 0x7d : Not Used? (0xf8) 3226 * 0x7e : Constant (0x55), Validity signature 3227 * 0x7f : Constant (0xaa), Validity signature 3228 */ 3229 static int nsp32_getprom_c16(nsp32_hw_data *data) 3230 { 3231 int ret, i; 3232 nsp32_target *target; 3233 int entry, val; 3234 3235 /* 3236 * Reset time which is designated by EEPROM. 3237 * 3238 * TODO: Not used yet. 3239 */ 3240 data->resettime = nsp32_prom_read(data, 0x11); 3241 3242 /* 3243 * each device Synchronous Transfer Period 3244 */ 3245 for (i = 0; i < NSP32_HOST_SCSIID; i++) { 3246 target = &data->target[i]; 3247 ret = nsp32_prom_read(data, i); 3248 switch (ret) { 3249 case 0: /* 20MB/s */ 3250 val = 0x0c; 3251 break; 3252 case 1: /* 10MB/s */ 3253 val = 0x19; 3254 break; 3255 case 2: /* 5MB/s */ 3256 val = 0x32; 3257 break; 3258 case 3: /* ASYNC */ 3259 val = 0x00; 3260 break; 3261 default: /* default 20MB/s */ 3262 val = 0x0c; 3263 break; 3264 } 3265 entry = nsp32_search_period_entry(data, target, val); 3266 if (entry < 0 || trans_mode == ULTRA20M_MODE) { 3267 /* search failed... set maximum speed */ 3268 entry = 0; 3269 } 3270 target->limit_entry = entry; 3271 } 3272 3273 return TRUE; 3274 } 3275 3276 3277 /* 3278 * Atmel AT24C01A (drived in 5V) serial EEPROM routines 3279 */ 3280 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr) 3281 { 3282 int i, val; 3283 3284 /* start condition */ 3285 nsp32_prom_start(data); 3286 3287 /* device address */ 3288 nsp32_prom_write_bit(data, 1); /* 1 */ 3289 nsp32_prom_write_bit(data, 0); /* 0 */ 3290 nsp32_prom_write_bit(data, 1); /* 1 */ 3291 nsp32_prom_write_bit(data, 0); /* 0 */ 3292 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ 3293 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ 3294 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ 3295 3296 /* R/W: W for dummy write */ 3297 nsp32_prom_write_bit(data, 0); 3298 3299 /* ack */ 3300 nsp32_prom_write_bit(data, 0); 3301 3302 /* word address */ 3303 for (i = 7; i >= 0; i--) { 3304 nsp32_prom_write_bit(data, ((romaddr >> i) & 1)); 3305 } 3306 3307 /* ack */ 3308 nsp32_prom_write_bit(data, 0); 3309 3310 /* start condition */ 3311 nsp32_prom_start(data); 3312 3313 /* device address */ 3314 nsp32_prom_write_bit(data, 1); /* 1 */ 3315 nsp32_prom_write_bit(data, 0); /* 0 */ 3316 nsp32_prom_write_bit(data, 1); /* 1 */ 3317 nsp32_prom_write_bit(data, 0); /* 0 */ 3318 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ 3319 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ 3320 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ 3321 3322 /* R/W: R */ 3323 nsp32_prom_write_bit(data, 1); 3324 3325 /* ack */ 3326 nsp32_prom_write_bit(data, 0); 3327 3328 /* data... */ 3329 val = 0; 3330 for (i = 7; i >= 0; i--) { 3331 val += (nsp32_prom_read_bit(data) << i); 3332 } 3333 3334 /* no ack */ 3335 nsp32_prom_write_bit(data, 1); 3336 3337 /* stop condition */ 3338 nsp32_prom_stop(data); 3339 3340 return val; 3341 } 3342 3343 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val) 3344 { 3345 int base = data->BaseAddress; 3346 int tmp; 3347 3348 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL); 3349 3350 if (val == 0) { 3351 tmp &= ~bit; 3352 } else { 3353 tmp |= bit; 3354 } 3355 3356 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp); 3357 3358 udelay(10); 3359 } 3360 3361 static int nsp32_prom_get(nsp32_hw_data *data, int bit) 3362 { 3363 int base = data->BaseAddress; 3364 int tmp, ret; 3365 3366 if (bit != SDA) { 3367 nsp32_msg(KERN_ERR, "return value is not appropriate"); 3368 return 0; 3369 } 3370 3371 3372 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit; 3373 3374 if (tmp == 0) { 3375 ret = 0; 3376 } else { 3377 ret = 1; 3378 } 3379 3380 udelay(10); 3381 3382 return ret; 3383 } 3384 3385 static void nsp32_prom_start (nsp32_hw_data *data) 3386 { 3387 /* start condition */ 3388 nsp32_prom_set(data, SCL, 1); 3389 nsp32_prom_set(data, SDA, 1); 3390 nsp32_prom_set(data, ENA, 1); /* output mode */ 3391 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting 3392 * SDA 1->0 is start condition */ 3393 nsp32_prom_set(data, SCL, 0); 3394 } 3395 3396 static void nsp32_prom_stop (nsp32_hw_data *data) 3397 { 3398 /* stop condition */ 3399 nsp32_prom_set(data, SCL, 1); 3400 nsp32_prom_set(data, SDA, 0); 3401 nsp32_prom_set(data, ENA, 1); /* output mode */ 3402 nsp32_prom_set(data, SDA, 1); 3403 nsp32_prom_set(data, SCL, 0); 3404 } 3405 3406 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val) 3407 { 3408 /* write */ 3409 nsp32_prom_set(data, SDA, val); 3410 nsp32_prom_set(data, SCL, 1 ); 3411 nsp32_prom_set(data, SCL, 0 ); 3412 } 3413 3414 static int nsp32_prom_read_bit(nsp32_hw_data *data) 3415 { 3416 int val; 3417 3418 /* read */ 3419 nsp32_prom_set(data, ENA, 0); /* input mode */ 3420 nsp32_prom_set(data, SCL, 1); 3421 3422 val = nsp32_prom_get(data, SDA); 3423 3424 nsp32_prom_set(data, SCL, 0); 3425 nsp32_prom_set(data, ENA, 1); /* output mode */ 3426 3427 return val; 3428 } 3429 3430 3431 /************************************************************************** 3432 * Power Management 3433 */ 3434 #ifdef CONFIG_PM 3435 3436 /* Device suspended */ 3437 static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state) 3438 { 3439 struct Scsi_Host *host = pci_get_drvdata(pdev); 3440 3441 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host); 3442 3443 pci_save_state (pdev); 3444 pci_disable_device (pdev); 3445 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 3446 3447 return 0; 3448 } 3449 3450 /* Device woken up */ 3451 static int nsp32_resume(struct pci_dev *pdev) 3452 { 3453 struct Scsi_Host *host = pci_get_drvdata(pdev); 3454 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 3455 unsigned short reg; 3456 3457 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host); 3458 3459 pci_set_power_state(pdev, PCI_D0); 3460 pci_enable_wake (pdev, PCI_D0, 0); 3461 pci_restore_state (pdev); 3462 3463 reg = nsp32_read2(data->BaseAddress, INDEX_REG); 3464 3465 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg); 3466 3467 if (reg == 0xffff) { 3468 nsp32_msg(KERN_INFO, "missing device. abort resume."); 3469 return 0; 3470 } 3471 3472 nsp32hw_init (data); 3473 nsp32_do_bus_reset(data); 3474 3475 nsp32_msg(KERN_INFO, "resume success"); 3476 3477 return 0; 3478 } 3479 3480 /* Enable wake event */ 3481 static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable) 3482 { 3483 struct Scsi_Host *host = pci_get_drvdata(pdev); 3484 3485 nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host); 3486 3487 return 0; 3488 } 3489 #endif 3490 3491 /************************************************************************ 3492 * PCI/Cardbus probe/remove routine 3493 */ 3494 static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id) 3495 { 3496 int ret; 3497 nsp32_hw_data *data = &nsp32_data_base; 3498 3499 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 3500 3501 ret = pci_enable_device(pdev); 3502 if (ret) { 3503 nsp32_msg(KERN_ERR, "failed to enable pci device"); 3504 return ret; 3505 } 3506 3507 data->Pci = pdev; 3508 data->pci_devid = id; 3509 data->IrqNumber = pdev->irq; 3510 data->BaseAddress = pci_resource_start(pdev, 0); 3511 data->NumAddress = pci_resource_len (pdev, 0); 3512 data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1), 3513 pci_resource_len (pdev, 1)); 3514 data->MmioLength = pci_resource_len (pdev, 1); 3515 3516 pci_set_master(pdev); 3517 3518 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 3519 ret = nsp32_detect(pdev); 3520 #else 3521 ret = scsi_register_host(&nsp32_template); 3522 #endif 3523 3524 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s", 3525 pdev->irq, 3526 data->MmioAddress, data->MmioLength, 3527 pci_name(pdev), 3528 nsp32_model[id->driver_data]); 3529 3530 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret); 3531 3532 return ret; 3533 } 3534 3535 static void __devexit nsp32_remove(struct pci_dev *pdev) 3536 { 3537 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 3538 struct Scsi_Host *host = pci_get_drvdata(pdev); 3539 #endif 3540 3541 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 3542 3543 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73)) 3544 scsi_remove_host(host); 3545 3546 nsp32_release(host); 3547 3548 scsi_host_put(host); 3549 #else 3550 scsi_unregister_host(&nsp32_template); 3551 #endif 3552 } 3553 3554 3555 3556 static struct pci_driver nsp32_driver = { 3557 .name = "nsp32", 3558 .id_table = nsp32_pci_table, 3559 .probe = nsp32_probe, 3560 .remove = __devexit_p(nsp32_remove), 3561 #ifdef CONFIG_PM 3562 .suspend = nsp32_suspend, 3563 .resume = nsp32_resume, 3564 .enable_wake = nsp32_enable_wake, 3565 #endif 3566 }; 3567 3568 /********************************************************************* 3569 * Moule entry point 3570 */ 3571 static int __init init_nsp32(void) { 3572 nsp32_msg(KERN_INFO, "loading..."); 3573 return pci_module_init(&nsp32_driver); 3574 } 3575 3576 static void __exit exit_nsp32(void) { 3577 nsp32_msg(KERN_INFO, "unloading..."); 3578 pci_unregister_driver(&nsp32_driver); 3579 } 3580 3581 module_init(init_nsp32); 3582 module_exit(exit_nsp32); 3583 3584 /* end */ 3585