1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /****************************************************************************** 3 ** Device driver for the PCI-SCSI NCR538XX controller family. 4 ** 5 ** Copyright (C) 1994 Wolfgang Stanglmeier 6 ** 7 ** 8 **----------------------------------------------------------------------------- 9 ** 10 ** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver 11 ** and is currently maintained by 12 ** 13 ** Gerard Roudier <groudier@free.fr> 14 ** 15 ** Being given that this driver originates from the FreeBSD version, and 16 ** in order to keep synergy on both, any suggested enhancements and corrections 17 ** received on Linux are automatically a potential candidate for the FreeBSD 18 ** version. 19 ** 20 ** The original driver has been written for 386bsd and FreeBSD by 21 ** Wolfgang Stanglmeier <wolf@cologne.de> 22 ** Stefan Esser <se@mi.Uni-Koeln.de> 23 ** 24 ** And has been ported to NetBSD by 25 ** Charles M. Hannum <mycroft@gnu.ai.mit.edu> 26 ** 27 **----------------------------------------------------------------------------- 28 ** 29 ** Brief history 30 ** 31 ** December 10 1995 by Gerard Roudier: 32 ** Initial port to Linux. 33 ** 34 ** June 23 1996 by Gerard Roudier: 35 ** Support for 64 bits architectures (Alpha). 36 ** 37 ** November 30 1996 by Gerard Roudier: 38 ** Support for Fast-20 scsi. 39 ** Support for large DMA fifo and 128 dwords bursting. 40 ** 41 ** February 27 1997 by Gerard Roudier: 42 ** Support for Fast-40 scsi. 43 ** Support for on-Board RAM. 44 ** 45 ** May 3 1997 by Gerard Roudier: 46 ** Full support for scsi scripts instructions pre-fetching. 47 ** 48 ** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>: 49 ** Support for NvRAM detection and reading. 50 ** 51 ** August 18 1997 by Cort <cort@cs.nmt.edu>: 52 ** Support for Power/PC (Big Endian). 53 ** 54 ** June 20 1998 by Gerard Roudier 55 ** Support for up to 64 tags per lun. 56 ** O(1) everywhere (C and SCRIPTS) for normal cases. 57 ** Low PCI traffic for command handling when on-chip RAM is present. 58 ** Aggressive SCSI SCRIPTS optimizations. 59 ** 60 ** 2005 by Matthew Wilcox and James Bottomley 61 ** PCI-ectomy. This driver now supports only the 720 chip (see the 62 ** NCR_Q720 and zalon drivers for the bus probe logic). 63 ** 64 ******************************************************************************* 65 */ 66 67 /* 68 ** Supported SCSI-II features: 69 ** Synchronous negotiation 70 ** Wide negotiation (depends on the NCR Chip) 71 ** Enable disconnection 72 ** Tagged command queuing 73 ** Parity checking 74 ** Etc... 75 ** 76 ** Supported NCR/SYMBIOS chips: 77 ** 53C720 (Wide, Fast SCSI-2, intfly problems) 78 */ 79 80 /* Name and version of the driver */ 81 #define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g" 82 83 #define SCSI_NCR_DEBUG_FLAGS (0) 84 85 #include <linux/blkdev.h> 86 #include <linux/delay.h> 87 #include <linux/dma-mapping.h> 88 #include <linux/errno.h> 89 #include <linux/gfp.h> 90 #include <linux/init.h> 91 #include <linux/interrupt.h> 92 #include <linux/ioport.h> 93 #include <linux/mm.h> 94 #include <linux/module.h> 95 #include <linux/sched.h> 96 #include <linux/signal.h> 97 #include <linux/spinlock.h> 98 #include <linux/stat.h> 99 #include <linux/string.h> 100 #include <linux/time.h> 101 #include <linux/timer.h> 102 #include <linux/types.h> 103 104 #include <asm/dma.h> 105 #include <asm/io.h> 106 107 #include <scsi/scsi.h> 108 #include <scsi/scsi_cmnd.h> 109 #include <scsi/scsi_dbg.h> 110 #include <scsi/scsi_device.h> 111 #include <scsi/scsi_tcq.h> 112 #include <scsi/scsi_transport.h> 113 #include <scsi/scsi_transport_spi.h> 114 115 #include "ncr53c8xx.h" 116 117 #define NAME53C8XX "ncr53c8xx" 118 119 /*========================================================== 120 ** 121 ** Debugging tags 122 ** 123 **========================================================== 124 */ 125 126 #define DEBUG_ALLOC (0x0001) 127 #define DEBUG_PHASE (0x0002) 128 #define DEBUG_QUEUE (0x0008) 129 #define DEBUG_RESULT (0x0010) 130 #define DEBUG_POINTER (0x0020) 131 #define DEBUG_SCRIPT (0x0040) 132 #define DEBUG_TINY (0x0080) 133 #define DEBUG_TIMING (0x0100) 134 #define DEBUG_NEGO (0x0200) 135 #define DEBUG_TAGS (0x0400) 136 #define DEBUG_SCATTER (0x0800) 137 #define DEBUG_IC (0x1000) 138 139 /* 140 ** Enable/Disable debug messages. 141 ** Can be changed at runtime too. 142 */ 143 144 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT 145 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS; 146 #define DEBUG_FLAGS ncr_debug 147 #else 148 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS 149 #endif 150 151 /* 152 * Locally used status flag 153 */ 154 #define SAM_STAT_ILLEGAL 0xff 155 156 static inline struct list_head *ncr_list_pop(struct list_head *head) 157 { 158 if (!list_empty(head)) { 159 struct list_head *elem = head->next; 160 161 list_del(elem); 162 return elem; 163 } 164 165 return NULL; 166 } 167 168 /*========================================================== 169 ** 170 ** Simple power of two buddy-like allocator. 171 ** 172 ** This simple code is not intended to be fast, but to 173 ** provide power of 2 aligned memory allocations. 174 ** Since the SCRIPTS processor only supplies 8 bit 175 ** arithmetic, this allocator allows simple and fast 176 ** address calculations from the SCRIPTS code. 177 ** In addition, cache line alignment is guaranteed for 178 ** power of 2 cache line size. 179 ** Enhanced in linux-2.3.44 to provide a memory pool 180 ** per pcidev to support dynamic dma mapping. (I would 181 ** have preferred a real bus abstraction, btw). 182 ** 183 **========================================================== 184 */ 185 186 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */ 187 #if PAGE_SIZE >= 8192 188 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */ 189 #else 190 #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */ 191 #endif 192 #define MEMO_FREE_UNUSED /* Free unused pages immediately */ 193 #define MEMO_WARN 1 194 #define MEMO_GFP_FLAGS GFP_ATOMIC 195 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER) 196 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT) 197 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1) 198 199 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */ 200 typedef struct device *m_bush_t; /* Something that addresses DMAable */ 201 202 typedef struct m_link { /* Link between free memory chunks */ 203 struct m_link *next; 204 } m_link_s; 205 206 typedef struct m_vtob { /* Virtual to Bus address translation */ 207 struct m_vtob *next; 208 m_addr_t vaddr; 209 m_addr_t baddr; 210 } m_vtob_s; 211 #define VTOB_HASH_SHIFT 5 212 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT) 213 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1) 214 #define VTOB_HASH_CODE(m) \ 215 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK) 216 217 typedef struct m_pool { /* Memory pool of a given kind */ 218 m_bush_t bush; 219 m_addr_t (*getp)(struct m_pool *); 220 void (*freep)(struct m_pool *, m_addr_t); 221 int nump; 222 m_vtob_s *(vtob[VTOB_HASH_SIZE]); 223 struct m_pool *next; 224 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1]; 225 } m_pool_s; 226 227 static void *___m_alloc(m_pool_s *mp, int size) 228 { 229 int i = 0; 230 int s = (1 << MEMO_SHIFT); 231 int j; 232 m_addr_t a; 233 m_link_s *h = mp->h; 234 235 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 236 return NULL; 237 238 while (size > s) { 239 s <<= 1; 240 ++i; 241 } 242 243 j = i; 244 while (!h[j].next) { 245 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 246 h[j].next = (m_link_s *)mp->getp(mp); 247 if (h[j].next) 248 h[j].next->next = NULL; 249 break; 250 } 251 ++j; 252 s <<= 1; 253 } 254 a = (m_addr_t) h[j].next; 255 if (a) { 256 h[j].next = h[j].next->next; 257 while (j > i) { 258 j -= 1; 259 s >>= 1; 260 h[j].next = (m_link_s *) (a+s); 261 h[j].next->next = NULL; 262 } 263 } 264 #ifdef DEBUG 265 printk("___m_alloc(%d) = %p\n", size, (void *) a); 266 #endif 267 return (void *) a; 268 } 269 270 static void ___m_free(m_pool_s *mp, void *ptr, int size) 271 { 272 int i = 0; 273 int s = (1 << MEMO_SHIFT); 274 m_link_s *q; 275 m_addr_t a, b; 276 m_link_s *h = mp->h; 277 278 #ifdef DEBUG 279 printk("___m_free(%p, %d)\n", ptr, size); 280 #endif 281 282 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 283 return; 284 285 while (size > s) { 286 s <<= 1; 287 ++i; 288 } 289 290 a = (m_addr_t) ptr; 291 292 while (1) { 293 #ifdef MEMO_FREE_UNUSED 294 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 295 mp->freep(mp, a); 296 break; 297 } 298 #endif 299 b = a ^ s; 300 q = &h[i]; 301 while (q->next && q->next != (m_link_s *) b) { 302 q = q->next; 303 } 304 if (!q->next) { 305 ((m_link_s *) a)->next = h[i].next; 306 h[i].next = (m_link_s *) a; 307 break; 308 } 309 q->next = q->next->next; 310 a = a & b; 311 s <<= 1; 312 ++i; 313 } 314 } 315 316 static DEFINE_SPINLOCK(ncr53c8xx_lock); 317 318 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags) 319 { 320 void *p; 321 322 p = ___m_alloc(mp, size); 323 324 if (DEBUG_FLAGS & DEBUG_ALLOC) 325 printk ("new %-10s[%4d] @%p.\n", name, size, p); 326 327 if (p) 328 memset(p, 0, size); 329 else if (uflags & MEMO_WARN) 330 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size); 331 332 return p; 333 } 334 335 #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN) 336 337 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name) 338 { 339 if (DEBUG_FLAGS & DEBUG_ALLOC) 340 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr); 341 342 ___m_free(mp, ptr, size); 343 344 } 345 346 /* 347 * With pci bus iommu support, we use a default pool of unmapped memory 348 * for memory we donnot need to DMA from/to and one pool per pcidev for 349 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool. 350 */ 351 352 static m_addr_t ___mp0_getp(m_pool_s *mp) 353 { 354 m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER); 355 if (m) 356 ++mp->nump; 357 return m; 358 } 359 360 static void ___mp0_freep(m_pool_s *mp, m_addr_t m) 361 { 362 free_pages(m, MEMO_PAGE_ORDER); 363 --mp->nump; 364 } 365 366 static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep}; 367 368 /* 369 * DMAable pools. 370 */ 371 372 /* 373 * With pci bus iommu support, we maintain one pool per pcidev and a 374 * hashed reverse table for virtual to bus physical address translations. 375 */ 376 static m_addr_t ___dma_getp(m_pool_s *mp) 377 { 378 m_addr_t vp; 379 m_vtob_s *vbp; 380 381 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB"); 382 if (vbp) { 383 dma_addr_t daddr; 384 vp = (m_addr_t) dma_alloc_coherent(mp->bush, 385 PAGE_SIZE<<MEMO_PAGE_ORDER, 386 &daddr, GFP_ATOMIC); 387 if (vp) { 388 int hc = VTOB_HASH_CODE(vp); 389 vbp->vaddr = vp; 390 vbp->baddr = daddr; 391 vbp->next = mp->vtob[hc]; 392 mp->vtob[hc] = vbp; 393 ++mp->nump; 394 return vp; 395 } 396 } 397 if (vbp) 398 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 399 return 0; 400 } 401 402 static void ___dma_freep(m_pool_s *mp, m_addr_t m) 403 { 404 m_vtob_s **vbpp, *vbp; 405 int hc = VTOB_HASH_CODE(m); 406 407 vbpp = &mp->vtob[hc]; 408 while (*vbpp && (*vbpp)->vaddr != m) 409 vbpp = &(*vbpp)->next; 410 if (*vbpp) { 411 vbp = *vbpp; 412 *vbpp = (*vbpp)->next; 413 dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER, 414 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr); 415 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 416 --mp->nump; 417 } 418 } 419 420 static inline m_pool_s *___get_dma_pool(m_bush_t bush) 421 { 422 m_pool_s *mp; 423 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next); 424 return mp; 425 } 426 427 static m_pool_s *___cre_dma_pool(m_bush_t bush) 428 { 429 m_pool_s *mp; 430 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL"); 431 if (mp) { 432 memset(mp, 0, sizeof(*mp)); 433 mp->bush = bush; 434 mp->getp = ___dma_getp; 435 mp->freep = ___dma_freep; 436 mp->next = mp0.next; 437 mp0.next = mp; 438 } 439 return mp; 440 } 441 442 static void ___del_dma_pool(m_pool_s *p) 443 { 444 struct m_pool **pp = &mp0.next; 445 446 while (*pp && *pp != p) 447 pp = &(*pp)->next; 448 if (*pp) { 449 *pp = (*pp)->next; 450 __m_free(&mp0, p, sizeof(*p), "MPOOL"); 451 } 452 } 453 454 static void *__m_calloc_dma(m_bush_t bush, int size, char *name) 455 { 456 u_long flags; 457 struct m_pool *mp; 458 void *m = NULL; 459 460 spin_lock_irqsave(&ncr53c8xx_lock, flags); 461 mp = ___get_dma_pool(bush); 462 if (!mp) 463 mp = ___cre_dma_pool(bush); 464 if (mp) 465 m = __m_calloc(mp, size, name); 466 if (mp && !mp->nump) 467 ___del_dma_pool(mp); 468 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 469 470 return m; 471 } 472 473 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name) 474 { 475 u_long flags; 476 struct m_pool *mp; 477 478 spin_lock_irqsave(&ncr53c8xx_lock, flags); 479 mp = ___get_dma_pool(bush); 480 if (mp) 481 __m_free(mp, m, size, name); 482 if (mp && !mp->nump) 483 ___del_dma_pool(mp); 484 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 485 } 486 487 static m_addr_t __vtobus(m_bush_t bush, void *m) 488 { 489 u_long flags; 490 m_pool_s *mp; 491 int hc = VTOB_HASH_CODE(m); 492 m_vtob_s *vp = NULL; 493 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; 494 495 spin_lock_irqsave(&ncr53c8xx_lock, flags); 496 mp = ___get_dma_pool(bush); 497 if (mp) { 498 vp = mp->vtob[hc]; 499 while (vp && (m_addr_t) vp->vaddr != a) 500 vp = vp->next; 501 } 502 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 503 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0; 504 } 505 506 #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n) 507 #define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n) 508 #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n) 509 #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n) 510 #define _vtobus(np, p) __vtobus(np->dev, p) 511 #define vtobus(p) _vtobus(np, p) 512 513 /* 514 * Deal with DMA mapping/unmapping. 515 */ 516 517 /* To keep track of the dma mapping (sg/single) that has been set */ 518 #define __data_mapped SCp.phase 519 #define __data_mapping SCp.have_data_in 520 521 static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd) 522 { 523 switch(cmd->__data_mapped) { 524 case 2: 525 scsi_dma_unmap(cmd); 526 break; 527 } 528 cmd->__data_mapped = 0; 529 } 530 531 static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd) 532 { 533 int use_sg; 534 535 use_sg = scsi_dma_map(cmd); 536 if (!use_sg) 537 return 0; 538 539 cmd->__data_mapped = 2; 540 cmd->__data_mapping = use_sg; 541 542 return use_sg; 543 } 544 545 #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd) 546 #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd) 547 548 /*========================================================== 549 ** 550 ** Driver setup. 551 ** 552 ** This structure is initialized from linux config 553 ** options. It can be overridden at boot-up by the boot 554 ** command line. 555 ** 556 **========================================================== 557 */ 558 static struct ncr_driver_setup 559 driver_setup = SCSI_NCR_DRIVER_SETUP; 560 561 #ifndef MODULE 562 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 563 static struct ncr_driver_setup 564 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP; 565 #endif 566 #endif /* !MODULE */ 567 568 #define initverbose (driver_setup.verbose) 569 #define bootverbose (np->verbose) 570 571 572 /*=================================================================== 573 ** 574 ** Driver setup from the boot command line 575 ** 576 **=================================================================== 577 */ 578 579 #ifdef MODULE 580 #define ARG_SEP ' ' 581 #else 582 #define ARG_SEP ',' 583 #endif 584 585 #define OPT_TAGS 1 586 #define OPT_MASTER_PARITY 2 587 #define OPT_SCSI_PARITY 3 588 #define OPT_DISCONNECTION 4 589 #define OPT_SPECIAL_FEATURES 5 590 #define OPT_UNUSED_1 6 591 #define OPT_FORCE_SYNC_NEGO 7 592 #define OPT_REVERSE_PROBE 8 593 #define OPT_DEFAULT_SYNC 9 594 #define OPT_VERBOSE 10 595 #define OPT_DEBUG 11 596 #define OPT_BURST_MAX 12 597 #define OPT_LED_PIN 13 598 #define OPT_MAX_WIDE 14 599 #define OPT_SETTLE_DELAY 15 600 #define OPT_DIFF_SUPPORT 16 601 #define OPT_IRQM 17 602 #define OPT_PCI_FIX_UP 18 603 #define OPT_BUS_CHECK 19 604 #define OPT_OPTIMIZE 20 605 #define OPT_RECOVERY 21 606 #define OPT_SAFE_SETUP 22 607 #define OPT_USE_NVRAM 23 608 #define OPT_EXCLUDE 24 609 #define OPT_HOST_ID 25 610 611 #ifdef SCSI_NCR_IARB_SUPPORT 612 #define OPT_IARB 26 613 #endif 614 615 #ifdef MODULE 616 #define ARG_SEP ' ' 617 #else 618 #define ARG_SEP ',' 619 #endif 620 621 #ifndef MODULE 622 static char setup_token[] __initdata = 623 "tags:" "mpar:" 624 "spar:" "disc:" 625 "specf:" "ultra:" 626 "fsn:" "revprob:" 627 "sync:" "verb:" 628 "debug:" "burst:" 629 "led:" "wide:" 630 "settle:" "diff:" 631 "irqm:" "pcifix:" 632 "buschk:" "optim:" 633 "recovery:" 634 "safe:" "nvram:" 635 "excl:" "hostid:" 636 #ifdef SCSI_NCR_IARB_SUPPORT 637 "iarb:" 638 #endif 639 ; /* DONNOT REMOVE THIS ';' */ 640 641 static int __init get_setup_token(char *p) 642 { 643 char *cur = setup_token; 644 char *pc; 645 int i = 0; 646 647 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 648 ++pc; 649 ++i; 650 if (!strncmp(p, cur, pc - cur)) 651 return i; 652 cur = pc; 653 } 654 return 0; 655 } 656 657 static int __init sym53c8xx__setup(char *str) 658 { 659 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 660 char *cur = str; 661 char *pc, *pv; 662 int i, val, c; 663 int xi = 0; 664 665 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 666 char *pe; 667 668 val = 0; 669 pv = pc; 670 c = *++pv; 671 672 if (c == 'n') 673 val = 0; 674 else if (c == 'y') 675 val = 1; 676 else 677 val = (int) simple_strtoul(pv, &pe, 0); 678 679 switch (get_setup_token(cur)) { 680 case OPT_TAGS: 681 driver_setup.default_tags = val; 682 if (pe && *pe == '/') { 683 i = 0; 684 while (*pe && *pe != ARG_SEP && 685 i < sizeof(driver_setup.tag_ctrl)-1) { 686 driver_setup.tag_ctrl[i++] = *pe++; 687 } 688 driver_setup.tag_ctrl[i] = '\0'; 689 } 690 break; 691 case OPT_MASTER_PARITY: 692 driver_setup.master_parity = val; 693 break; 694 case OPT_SCSI_PARITY: 695 driver_setup.scsi_parity = val; 696 break; 697 case OPT_DISCONNECTION: 698 driver_setup.disconnection = val; 699 break; 700 case OPT_SPECIAL_FEATURES: 701 driver_setup.special_features = val; 702 break; 703 case OPT_FORCE_SYNC_NEGO: 704 driver_setup.force_sync_nego = val; 705 break; 706 case OPT_REVERSE_PROBE: 707 driver_setup.reverse_probe = val; 708 break; 709 case OPT_DEFAULT_SYNC: 710 driver_setup.default_sync = val; 711 break; 712 case OPT_VERBOSE: 713 driver_setup.verbose = val; 714 break; 715 case OPT_DEBUG: 716 driver_setup.debug = val; 717 break; 718 case OPT_BURST_MAX: 719 driver_setup.burst_max = val; 720 break; 721 case OPT_LED_PIN: 722 driver_setup.led_pin = val; 723 break; 724 case OPT_MAX_WIDE: 725 driver_setup.max_wide = val? 1:0; 726 break; 727 case OPT_SETTLE_DELAY: 728 driver_setup.settle_delay = val; 729 break; 730 case OPT_DIFF_SUPPORT: 731 driver_setup.diff_support = val; 732 break; 733 case OPT_IRQM: 734 driver_setup.irqm = val; 735 break; 736 case OPT_PCI_FIX_UP: 737 driver_setup.pci_fix_up = val; 738 break; 739 case OPT_BUS_CHECK: 740 driver_setup.bus_check = val; 741 break; 742 case OPT_OPTIMIZE: 743 driver_setup.optimize = val; 744 break; 745 case OPT_RECOVERY: 746 driver_setup.recovery = val; 747 break; 748 case OPT_USE_NVRAM: 749 driver_setup.use_nvram = val; 750 break; 751 case OPT_SAFE_SETUP: 752 memcpy(&driver_setup, &driver_safe_setup, 753 sizeof(driver_setup)); 754 break; 755 case OPT_EXCLUDE: 756 if (xi < SCSI_NCR_MAX_EXCLUDES) 757 driver_setup.excludes[xi++] = val; 758 break; 759 case OPT_HOST_ID: 760 driver_setup.host_id = val; 761 break; 762 #ifdef SCSI_NCR_IARB_SUPPORT 763 case OPT_IARB: 764 driver_setup.iarb = val; 765 break; 766 #endif 767 default: 768 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur); 769 break; 770 } 771 772 if ((cur = strchr(cur, ARG_SEP)) != NULL) 773 ++cur; 774 } 775 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */ 776 return 1; 777 } 778 #endif /* !MODULE */ 779 780 /*=================================================================== 781 ** 782 ** Get device queue depth from boot command line. 783 ** 784 **=================================================================== 785 */ 786 #define DEF_DEPTH (driver_setup.default_tags) 787 #define ALL_TARGETS -2 788 #define NO_TARGET -1 789 #define ALL_LUNS -2 790 #define NO_LUN -1 791 792 static int device_queue_depth(int unit, int target, int lun) 793 { 794 int c, h, t, u, v; 795 char *p = driver_setup.tag_ctrl; 796 char *ep; 797 798 h = -1; 799 t = NO_TARGET; 800 u = NO_LUN; 801 while ((c = *p++) != 0) { 802 v = simple_strtoul(p, &ep, 0); 803 switch(c) { 804 case '/': 805 ++h; 806 t = ALL_TARGETS; 807 u = ALL_LUNS; 808 break; 809 case 't': 810 if (t != target) 811 t = (target == v) ? v : NO_TARGET; 812 u = ALL_LUNS; 813 break; 814 case 'u': 815 if (u != lun) 816 u = (lun == v) ? v : NO_LUN; 817 break; 818 case 'q': 819 if (h == unit && 820 (t == ALL_TARGETS || t == target) && 821 (u == ALL_LUNS || u == lun)) 822 return v; 823 break; 824 case '-': 825 t = ALL_TARGETS; 826 u = ALL_LUNS; 827 break; 828 default: 829 break; 830 } 831 p = ep; 832 } 833 return DEF_DEPTH; 834 } 835 836 837 /*========================================================== 838 ** 839 ** The CCB done queue uses an array of CCB virtual 840 ** addresses. Empty entries are flagged using the bogus 841 ** virtual address 0xffffffff. 842 ** 843 ** Since PCI ensures that only aligned DWORDs are accessed 844 ** atomically, 64 bit little-endian architecture requires 845 ** to test the high order DWORD of the entry to determine 846 ** if it is empty or valid. 847 ** 848 ** BTW, I will make things differently as soon as I will 849 ** have a better idea, but this is simple and should work. 850 ** 851 **========================================================== 852 */ 853 854 #define SCSI_NCR_CCB_DONE_SUPPORT 855 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 856 857 #define MAX_DONE 24 858 #define CCB_DONE_EMPTY 0xffffffffUL 859 860 /* All 32 bit architectures */ 861 #if BITS_PER_LONG == 32 862 #define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY) 863 864 /* All > 32 bit (64 bit) architectures regardless endian-ness */ 865 #else 866 #define CCB_DONE_VALID(cp) \ 867 ((((u_long) cp) & 0xffffffff00000000ul) && \ 868 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY) 869 #endif 870 871 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 872 873 /*========================================================== 874 ** 875 ** Configuration and Debugging 876 ** 877 **========================================================== 878 */ 879 880 /* 881 ** SCSI address of this device. 882 ** The boot routines should have set it. 883 ** If not, use this. 884 */ 885 886 #ifndef SCSI_NCR_MYADDR 887 #define SCSI_NCR_MYADDR (7) 888 #endif 889 890 /* 891 ** The maximum number of tags per logic unit. 892 ** Used only for disk devices that support tags. 893 */ 894 895 #ifndef SCSI_NCR_MAX_TAGS 896 #define SCSI_NCR_MAX_TAGS (8) 897 #endif 898 899 /* 900 ** TAGS are actually limited to 64 tags/lun. 901 ** We need to deal with power of 2, for alignment constraints. 902 */ 903 #if SCSI_NCR_MAX_TAGS > 64 904 #define MAX_TAGS (64) 905 #else 906 #define MAX_TAGS SCSI_NCR_MAX_TAGS 907 #endif 908 909 #define NO_TAG (255) 910 911 /* 912 ** Choose appropriate type for tag bitmap. 913 */ 914 #if MAX_TAGS > 32 915 typedef u64 tagmap_t; 916 #else 917 typedef u32 tagmap_t; 918 #endif 919 920 /* 921 ** Number of targets supported by the driver. 922 ** n permits target numbers 0..n-1. 923 ** Default is 16, meaning targets #0..#15. 924 ** #7 .. is myself. 925 */ 926 927 #ifdef SCSI_NCR_MAX_TARGET 928 #define MAX_TARGET (SCSI_NCR_MAX_TARGET) 929 #else 930 #define MAX_TARGET (16) 931 #endif 932 933 /* 934 ** Number of logic units supported by the driver. 935 ** n enables logic unit numbers 0..n-1. 936 ** The common SCSI devices require only 937 ** one lun, so take 1 as the default. 938 */ 939 940 #ifdef SCSI_NCR_MAX_LUN 941 #define MAX_LUN SCSI_NCR_MAX_LUN 942 #else 943 #define MAX_LUN (1) 944 #endif 945 946 /* 947 ** Asynchronous pre-scaler (ns). Shall be 40 948 */ 949 950 #ifndef SCSI_NCR_MIN_ASYNC 951 #define SCSI_NCR_MIN_ASYNC (40) 952 #endif 953 954 /* 955 ** The maximum number of jobs scheduled for starting. 956 ** There should be one slot per target, and one slot 957 ** for each tag of each target in use. 958 ** The calculation below is actually quite silly ... 959 */ 960 961 #ifdef SCSI_NCR_CAN_QUEUE 962 #define MAX_START (SCSI_NCR_CAN_QUEUE + 4) 963 #else 964 #define MAX_START (MAX_TARGET + 7 * MAX_TAGS) 965 #endif 966 967 /* 968 ** We limit the max number of pending IO to 250. 969 ** since we donnot want to allocate more than 1 970 ** PAGE for 'scripth'. 971 */ 972 #if MAX_START > 250 973 #undef MAX_START 974 #define MAX_START 250 975 #endif 976 977 /* 978 ** The maximum number of segments a transfer is split into. 979 ** We support up to 127 segments for both read and write. 980 ** The data scripts are broken into 2 sub-scripts. 981 ** 80 (MAX_SCATTERL) segments are moved from a sub-script 982 ** in on-chip RAM. This makes data transfers shorter than 983 ** 80k (assuming 1k fs) as fast as possible. 984 */ 985 986 #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER) 987 988 #if (MAX_SCATTER > 80) 989 #define MAX_SCATTERL 80 990 #define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL) 991 #else 992 #define MAX_SCATTERL (MAX_SCATTER-1) 993 #define MAX_SCATTERH 1 994 #endif 995 996 /* 997 ** other 998 */ 999 1000 #define NCR_SNOOP_TIMEOUT (1000000) 1001 1002 /* 1003 ** Other definitions 1004 */ 1005 1006 #define initverbose (driver_setup.verbose) 1007 #define bootverbose (np->verbose) 1008 1009 /*========================================================== 1010 ** 1011 ** Command control block states. 1012 ** 1013 **========================================================== 1014 */ 1015 1016 #define HS_IDLE (0) 1017 #define HS_BUSY (1) 1018 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 1019 #define HS_DISCONNECT (3) /* Disconnected by target */ 1020 1021 #define HS_DONEMASK (0x80) 1022 #define HS_COMPLETE (4|HS_DONEMASK) 1023 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */ 1024 #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */ 1025 #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */ 1026 #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */ 1027 #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */ 1028 #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */ 1029 1030 /* 1031 ** Invalid host status values used by the SCRIPTS processor 1032 ** when the nexus is not fully identified. 1033 ** Shall never appear in a CCB. 1034 */ 1035 1036 #define HS_INVALMASK (0x40) 1037 #define HS_SELECTING (0|HS_INVALMASK) 1038 #define HS_IN_RESELECT (1|HS_INVALMASK) 1039 #define HS_STARTING (2|HS_INVALMASK) 1040 1041 /* 1042 ** Flags set by the SCRIPT processor for commands 1043 ** that have been skipped. 1044 */ 1045 #define HS_SKIPMASK (0x20) 1046 1047 /*========================================================== 1048 ** 1049 ** Software Interrupt Codes 1050 ** 1051 **========================================================== 1052 */ 1053 1054 #define SIR_BAD_STATUS (1) 1055 #define SIR_XXXXXXXXXX (2) 1056 #define SIR_NEGO_SYNC (3) 1057 #define SIR_NEGO_WIDE (4) 1058 #define SIR_NEGO_FAILED (5) 1059 #define SIR_NEGO_PROTO (6) 1060 #define SIR_REJECT_RECEIVED (7) 1061 #define SIR_REJECT_SENT (8) 1062 #define SIR_IGN_RESIDUE (9) 1063 #define SIR_MISSING_SAVE (10) 1064 #define SIR_RESEL_NO_MSG_IN (11) 1065 #define SIR_RESEL_NO_IDENTIFY (12) 1066 #define SIR_RESEL_BAD_LUN (13) 1067 #define SIR_RESEL_BAD_TARGET (14) 1068 #define SIR_RESEL_BAD_I_T_L (15) 1069 #define SIR_RESEL_BAD_I_T_L_Q (16) 1070 #define SIR_DONE_OVERFLOW (17) 1071 #define SIR_INTFLY (18) 1072 #define SIR_MAX (18) 1073 1074 /*========================================================== 1075 ** 1076 ** Extended error codes. 1077 ** xerr_status field of struct ccb. 1078 ** 1079 **========================================================== 1080 */ 1081 1082 #define XE_OK (0) 1083 #define XE_EXTRA_DATA (1) /* unexpected data phase */ 1084 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 1085 1086 /*========================================================== 1087 ** 1088 ** Negotiation status. 1089 ** nego_status field of struct ccb. 1090 ** 1091 **========================================================== 1092 */ 1093 1094 #define NS_NOCHANGE (0) 1095 #define NS_SYNC (1) 1096 #define NS_WIDE (2) 1097 #define NS_PPR (4) 1098 1099 /*========================================================== 1100 ** 1101 ** Misc. 1102 ** 1103 **========================================================== 1104 */ 1105 1106 #define CCB_MAGIC (0xf2691ad2) 1107 1108 /*========================================================== 1109 ** 1110 ** Declaration of structs. 1111 ** 1112 **========================================================== 1113 */ 1114 1115 static struct scsi_transport_template *ncr53c8xx_transport_template = NULL; 1116 1117 struct tcb; 1118 struct lcb; 1119 struct ccb; 1120 struct ncb; 1121 struct script; 1122 1123 struct link { 1124 ncrcmd l_cmd; 1125 ncrcmd l_paddr; 1126 }; 1127 1128 struct usrcmd { 1129 u_long target; 1130 u_long lun; 1131 u_long data; 1132 u_long cmd; 1133 }; 1134 1135 #define UC_SETSYNC 10 1136 #define UC_SETTAGS 11 1137 #define UC_SETDEBUG 12 1138 #define UC_SETORDER 13 1139 #define UC_SETWIDE 14 1140 #define UC_SETFLAG 15 1141 #define UC_SETVERBOSE 17 1142 1143 #define UF_TRACE (0x01) 1144 #define UF_NODISC (0x02) 1145 #define UF_NOSCAN (0x04) 1146 1147 /*======================================================================== 1148 ** 1149 ** Declaration of structs: target control block 1150 ** 1151 **======================================================================== 1152 */ 1153 struct tcb { 1154 /*---------------------------------------------------------------- 1155 ** During reselection the ncr jumps to this point with SFBR 1156 ** set to the encoded target number with bit 7 set. 1157 ** if it's not this target, jump to the next. 1158 ** 1159 ** JUMP IF (SFBR != #target#), @(next tcb) 1160 **---------------------------------------------------------------- 1161 */ 1162 struct link jump_tcb; 1163 1164 /*---------------------------------------------------------------- 1165 ** Load the actual values for the sxfer and the scntl3 1166 ** register (sync/wide mode). 1167 ** 1168 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register) 1169 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register) 1170 **---------------------------------------------------------------- 1171 */ 1172 ncrcmd getscr[6]; 1173 1174 /*---------------------------------------------------------------- 1175 ** Get the IDENTIFY message and load the LUN to SFBR. 1176 ** 1177 ** CALL, <RESEL_LUN> 1178 **---------------------------------------------------------------- 1179 */ 1180 struct link call_lun; 1181 1182 /*---------------------------------------------------------------- 1183 ** Now look for the right lun. 1184 ** 1185 ** For i = 0 to 3 1186 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i) 1187 ** 1188 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1189 ** It is kind of hashcoding. 1190 **---------------------------------------------------------------- 1191 */ 1192 struct link jump_lcb[4]; /* JUMPs for reselection */ 1193 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */ 1194 1195 /*---------------------------------------------------------------- 1196 ** Pointer to the ccb used for negotiation. 1197 ** Prevent from starting a negotiation for all queued commands 1198 ** when tagged command queuing is enabled. 1199 **---------------------------------------------------------------- 1200 */ 1201 struct ccb * nego_cp; 1202 1203 /*---------------------------------------------------------------- 1204 ** statistical data 1205 **---------------------------------------------------------------- 1206 */ 1207 u_long transfers; 1208 u_long bytes; 1209 1210 /*---------------------------------------------------------------- 1211 ** negotiation of wide and synch transfer and device quirks. 1212 **---------------------------------------------------------------- 1213 */ 1214 #ifdef SCSI_NCR_BIG_ENDIAN 1215 /*0*/ u16 period; 1216 /*2*/ u_char sval; 1217 /*3*/ u_char minsync; 1218 /*0*/ u_char wval; 1219 /*1*/ u_char widedone; 1220 /*2*/ u_char quirks; 1221 /*3*/ u_char maxoffs; 1222 #else 1223 /*0*/ u_char minsync; 1224 /*1*/ u_char sval; 1225 /*2*/ u16 period; 1226 /*0*/ u_char maxoffs; 1227 /*1*/ u_char quirks; 1228 /*2*/ u_char widedone; 1229 /*3*/ u_char wval; 1230 #endif 1231 1232 /* User settable limits and options. */ 1233 u_char usrsync; 1234 u_char usrwide; 1235 u_char usrtags; 1236 u_char usrflag; 1237 struct scsi_target *starget; 1238 }; 1239 1240 /*======================================================================== 1241 ** 1242 ** Declaration of structs: lun control block 1243 ** 1244 **======================================================================== 1245 */ 1246 struct lcb { 1247 /*---------------------------------------------------------------- 1248 ** During reselection the ncr jumps to this point 1249 ** with SFBR set to the "Identify" message. 1250 ** if it's not this lun, jump to the next. 1251 ** 1252 ** JUMP IF (SFBR != #lun#), @(next lcb of this target) 1253 ** 1254 ** It is this lun. Load TEMP with the nexus jumps table 1255 ** address and jump to RESEL_TAG (or RESEL_NOTAG). 1256 ** 1257 ** SCR_COPY (4), p_jump_ccb, TEMP, 1258 ** SCR_JUMP, <RESEL_TAG> 1259 **---------------------------------------------------------------- 1260 */ 1261 struct link jump_lcb; 1262 ncrcmd load_jump_ccb[3]; 1263 struct link jump_tag; 1264 ncrcmd p_jump_ccb; /* Jump table bus address */ 1265 1266 /*---------------------------------------------------------------- 1267 ** Jump table used by the script processor to directly jump 1268 ** to the CCB corresponding to the reselected nexus. 1269 ** Address is allocated on 256 bytes boundary in order to 1270 ** allow 8 bit calculation of the tag jump entry for up to 1271 ** 64 possible tags. 1272 **---------------------------------------------------------------- 1273 */ 1274 u32 jump_ccb_0; /* Default table if no tags */ 1275 u32 *jump_ccb; /* Virtual address */ 1276 1277 /*---------------------------------------------------------------- 1278 ** CCB queue management. 1279 **---------------------------------------------------------------- 1280 */ 1281 struct list_head free_ccbq; /* Queue of available CCBs */ 1282 struct list_head busy_ccbq; /* Queue of busy CCBs */ 1283 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */ 1284 struct list_head skip_ccbq; /* Queue of skipped CCBs */ 1285 u_char actccbs; /* Number of allocated CCBs */ 1286 u_char busyccbs; /* CCBs busy for this lun */ 1287 u_char queuedccbs; /* CCBs queued to the controller*/ 1288 u_char queuedepth; /* Queue depth for this lun */ 1289 u_char scdev_depth; /* SCSI device queue depth */ 1290 u_char maxnxs; /* Max possible nexuses */ 1291 1292 /*---------------------------------------------------------------- 1293 ** Control of tagged command queuing. 1294 ** Tags allocation is performed using a circular buffer. 1295 ** This avoids using a loop for tag allocation. 1296 **---------------------------------------------------------------- 1297 */ 1298 u_char ia_tag; /* Allocation index */ 1299 u_char if_tag; /* Freeing index */ 1300 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */ 1301 u_char usetags; /* Command queuing is active */ 1302 u_char maxtags; /* Max nr of tags asked by user */ 1303 u_char numtags; /* Current number of tags */ 1304 1305 /*---------------------------------------------------------------- 1306 ** QUEUE FULL control and ORDERED tag control. 1307 **---------------------------------------------------------------- 1308 */ 1309 /*---------------------------------------------------------------- 1310 ** QUEUE FULL and ORDERED tag control. 1311 **---------------------------------------------------------------- 1312 */ 1313 u16 num_good; /* Nr of GOOD since QUEUE FULL */ 1314 tagmap_t tags_umap; /* Used tags bitmap */ 1315 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */ 1316 u_long tags_stime; /* Last time we set smap=umap */ 1317 struct ccb * held_ccb; /* CCB held for QUEUE FULL */ 1318 }; 1319 1320 /*======================================================================== 1321 ** 1322 ** Declaration of structs: the launch script. 1323 ** 1324 **======================================================================== 1325 ** 1326 ** It is part of the CCB and is called by the scripts processor to 1327 ** start or restart the data structure (nexus). 1328 ** This 6 DWORDs mini script makes use of prefetching. 1329 ** 1330 **------------------------------------------------------------------------ 1331 */ 1332 struct launch { 1333 /*---------------------------------------------------------------- 1334 ** SCR_COPY(4), @(p_phys), @(dsa register) 1335 ** SCR_JUMP, @(scheduler_point) 1336 **---------------------------------------------------------------- 1337 */ 1338 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */ 1339 struct link schedule; /* Jump to scheduler point */ 1340 ncrcmd p_phys; /* 'phys' header bus address */ 1341 }; 1342 1343 /*======================================================================== 1344 ** 1345 ** Declaration of structs: global HEADER. 1346 ** 1347 **======================================================================== 1348 ** 1349 ** This substructure is copied from the ccb to a global address after 1350 ** selection (or reselection) and copied back before disconnect. 1351 ** 1352 ** These fields are accessible to the script processor. 1353 ** 1354 **------------------------------------------------------------------------ 1355 */ 1356 1357 struct head { 1358 /*---------------------------------------------------------------- 1359 ** Saved data pointer. 1360 ** Points to the position in the script responsible for the 1361 ** actual transfer transfer of data. 1362 ** It's written after reception of a SAVE_DATA_POINTER message. 1363 ** The goalpointer points after the last transfer command. 1364 **---------------------------------------------------------------- 1365 */ 1366 u32 savep; 1367 u32 lastp; 1368 u32 goalp; 1369 1370 /*---------------------------------------------------------------- 1371 ** Alternate data pointer. 1372 ** They are copied back to savep/lastp/goalp by the SCRIPTS 1373 ** when the direction is unknown and the device claims data out. 1374 **---------------------------------------------------------------- 1375 */ 1376 u32 wlastp; 1377 u32 wgoalp; 1378 1379 /*---------------------------------------------------------------- 1380 ** The virtual address of the ccb containing this header. 1381 **---------------------------------------------------------------- 1382 */ 1383 struct ccb * cp; 1384 1385 /*---------------------------------------------------------------- 1386 ** Status fields. 1387 **---------------------------------------------------------------- 1388 */ 1389 u_char scr_st[4]; /* script status */ 1390 u_char status[4]; /* host status. must be the */ 1391 /* last DWORD of the header. */ 1392 }; 1393 1394 /* 1395 ** The status bytes are used by the host and the script processor. 1396 ** 1397 ** The byte corresponding to the host_status must be stored in the 1398 ** last DWORD of the CCB header since it is used for command 1399 ** completion (ncr_wakeup()). Doing so, we are sure that the header 1400 ** has been entirely copied back to the CCB when the host_status is 1401 ** seen complete by the CPU. 1402 ** 1403 ** The last four bytes (status[4]) are copied to the scratchb register 1404 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 1405 ** and copied back just after disconnecting. 1406 ** Inside the script the XX_REG are used. 1407 ** 1408 ** The first four bytes (scr_st[4]) are used inside the script by 1409 ** "COPY" commands. 1410 ** Because source and destination must have the same alignment 1411 ** in a DWORD, the fields HAVE to be at the chosen offsets. 1412 ** xerr_st 0 (0x34) scratcha 1413 ** sync_st 1 (0x05) sxfer 1414 ** wide_st 3 (0x03) scntl3 1415 */ 1416 1417 /* 1418 ** Last four bytes (script) 1419 */ 1420 #define QU_REG scr0 1421 #define HS_REG scr1 1422 #define HS_PRT nc_scr1 1423 #define SS_REG scr2 1424 #define SS_PRT nc_scr2 1425 #define PS_REG scr3 1426 1427 /* 1428 ** Last four bytes (host) 1429 */ 1430 #ifdef SCSI_NCR_BIG_ENDIAN 1431 #define actualquirks phys.header.status[3] 1432 #define host_status phys.header.status[2] 1433 #define scsi_status phys.header.status[1] 1434 #define parity_status phys.header.status[0] 1435 #else 1436 #define actualquirks phys.header.status[0] 1437 #define host_status phys.header.status[1] 1438 #define scsi_status phys.header.status[2] 1439 #define parity_status phys.header.status[3] 1440 #endif 1441 1442 /* 1443 ** First four bytes (script) 1444 */ 1445 #define xerr_st header.scr_st[0] 1446 #define sync_st header.scr_st[1] 1447 #define nego_st header.scr_st[2] 1448 #define wide_st header.scr_st[3] 1449 1450 /* 1451 ** First four bytes (host) 1452 */ 1453 #define xerr_status phys.xerr_st 1454 #define nego_status phys.nego_st 1455 1456 /*========================================================== 1457 ** 1458 ** Declaration of structs: Data structure block 1459 ** 1460 **========================================================== 1461 ** 1462 ** During execution of a ccb by the script processor, 1463 ** the DSA (data structure address) register points 1464 ** to this substructure of the ccb. 1465 ** This substructure contains the header with 1466 ** the script-processor-changeable data and 1467 ** data blocks for the indirect move commands. 1468 ** 1469 **---------------------------------------------------------- 1470 */ 1471 1472 struct dsb { 1473 1474 /* 1475 ** Header. 1476 */ 1477 1478 struct head header; 1479 1480 /* 1481 ** Table data for Script 1482 */ 1483 1484 struct scr_tblsel select; 1485 struct scr_tblmove smsg ; 1486 struct scr_tblmove cmd ; 1487 struct scr_tblmove sense ; 1488 struct scr_tblmove data[MAX_SCATTER]; 1489 }; 1490 1491 1492 /*======================================================================== 1493 ** 1494 ** Declaration of structs: Command control block. 1495 ** 1496 **======================================================================== 1497 */ 1498 struct ccb { 1499 /*---------------------------------------------------------------- 1500 ** This is the data structure which is pointed by the DSA 1501 ** register when it is executed by the script processor. 1502 ** It must be the first entry because it contains the header 1503 ** as first entry that must be cache line aligned. 1504 **---------------------------------------------------------------- 1505 */ 1506 struct dsb phys; 1507 1508 /*---------------------------------------------------------------- 1509 ** Mini-script used at CCB execution start-up. 1510 ** Load the DSA with the data structure address (phys) and 1511 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled. 1512 **---------------------------------------------------------------- 1513 */ 1514 struct launch start; 1515 1516 /*---------------------------------------------------------------- 1517 ** Mini-script used at CCB relection to restart the nexus. 1518 ** Load the DSA with the data structure address (phys) and 1519 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted. 1520 **---------------------------------------------------------------- 1521 */ 1522 struct launch restart; 1523 1524 /*---------------------------------------------------------------- 1525 ** If a data transfer phase is terminated too early 1526 ** (after reception of a message (i.e. DISCONNECT)), 1527 ** we have to prepare a mini script to transfer 1528 ** the rest of the data. 1529 **---------------------------------------------------------------- 1530 */ 1531 ncrcmd patch[8]; 1532 1533 /*---------------------------------------------------------------- 1534 ** The general SCSI driver provides a 1535 ** pointer to a control block. 1536 **---------------------------------------------------------------- 1537 */ 1538 struct scsi_cmnd *cmd; /* SCSI command */ 1539 u_char cdb_buf[16]; /* Copy of CDB */ 1540 u_char sense_buf[64]; 1541 int data_len; /* Total data length */ 1542 1543 /*---------------------------------------------------------------- 1544 ** Message areas. 1545 ** We prepare a message to be sent after selection. 1546 ** We may use a second one if the command is rescheduled 1547 ** due to GETCC or QFULL. 1548 ** Contents are IDENTIFY and SIMPLE_TAG. 1549 ** While negotiating sync or wide transfer, 1550 ** a SDTR or WDTR message is appended. 1551 **---------------------------------------------------------------- 1552 */ 1553 u_char scsi_smsg [8]; 1554 u_char scsi_smsg2[8]; 1555 1556 /*---------------------------------------------------------------- 1557 ** Other fields. 1558 **---------------------------------------------------------------- 1559 */ 1560 u_long p_ccb; /* BUS address of this CCB */ 1561 u_char sensecmd[6]; /* Sense command */ 1562 u_char tag; /* Tag for this transfer */ 1563 /* 255 means no tag */ 1564 u_char target; 1565 u_char lun; 1566 u_char queued; 1567 u_char auto_sense; 1568 struct ccb * link_ccb; /* Host adapter CCB chain */ 1569 struct list_head link_ccbq; /* Link to unit CCB queue */ 1570 u32 startp; /* Initial data pointer */ 1571 u_long magic; /* Free / busy CCB flag */ 1572 }; 1573 1574 #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) 1575 1576 1577 /*======================================================================== 1578 ** 1579 ** Declaration of structs: NCR device descriptor 1580 ** 1581 **======================================================================== 1582 */ 1583 struct ncb { 1584 /*---------------------------------------------------------------- 1585 ** The global header. 1586 ** It is accessible to both the host and the script processor. 1587 ** Must be cache line size aligned (32 for x86) in order to 1588 ** allow cache line bursting when it is copied to/from CCB. 1589 **---------------------------------------------------------------- 1590 */ 1591 struct head header; 1592 1593 /*---------------------------------------------------------------- 1594 ** CCBs management queues. 1595 **---------------------------------------------------------------- 1596 */ 1597 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */ 1598 /* when lcb is not allocated. */ 1599 struct scsi_cmnd *done_list; /* Commands waiting for done() */ 1600 /* callback to be invoked. */ 1601 spinlock_t smp_lock; /* Lock for SMP threading */ 1602 1603 /*---------------------------------------------------------------- 1604 ** Chip and controller identification. 1605 **---------------------------------------------------------------- 1606 */ 1607 int unit; /* Unit number */ 1608 char inst_name[16]; /* ncb instance name */ 1609 1610 /*---------------------------------------------------------------- 1611 ** Initial value of some IO register bits. 1612 ** These values are assumed to have been set by BIOS, and may 1613 ** be used for probing adapter implementation differences. 1614 **---------------------------------------------------------------- 1615 */ 1616 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3, 1617 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4; 1618 1619 /*---------------------------------------------------------------- 1620 ** Actual initial value of IO register bits used by the 1621 ** driver. They are loaded at initialisation according to 1622 ** features that are to be enabled. 1623 **---------------------------------------------------------------- 1624 */ 1625 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3, 1626 rv_ctest4, rv_ctest5, rv_stest2; 1627 1628 /*---------------------------------------------------------------- 1629 ** Targets management. 1630 ** During reselection the ncr jumps to jump_tcb. 1631 ** The SFBR register is loaded with the encoded target id. 1632 ** For i = 0 to 3 1633 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i) 1634 ** 1635 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1636 ** It is kind of hashcoding. 1637 **---------------------------------------------------------------- 1638 */ 1639 struct link jump_tcb[4]; /* JUMPs for reselection */ 1640 struct tcb target[MAX_TARGET]; /* Target data */ 1641 1642 /*---------------------------------------------------------------- 1643 ** Virtual and physical bus addresses of the chip. 1644 **---------------------------------------------------------------- 1645 */ 1646 void __iomem *vaddr; /* Virtual and bus address of */ 1647 unsigned long paddr; /* chip's IO registers. */ 1648 unsigned long paddr2; /* On-chip RAM bus address. */ 1649 volatile /* Pointer to volatile for */ 1650 struct ncr_reg __iomem *reg; /* memory mapped IO. */ 1651 1652 /*---------------------------------------------------------------- 1653 ** SCRIPTS virtual and physical bus addresses. 1654 ** 'script' is loaded in the on-chip RAM if present. 1655 ** 'scripth' stays in main memory. 1656 **---------------------------------------------------------------- 1657 */ 1658 struct script *script0; /* Copies of script and scripth */ 1659 struct scripth *scripth0; /* relocated for this ncb. */ 1660 struct scripth *scripth; /* Actual scripth virt. address */ 1661 u_long p_script; /* Actual script and scripth */ 1662 u_long p_scripth; /* bus addresses. */ 1663 1664 /*---------------------------------------------------------------- 1665 ** General controller parameters and configuration. 1666 **---------------------------------------------------------------- 1667 */ 1668 struct device *dev; 1669 u_char revision_id; /* PCI device revision id */ 1670 u32 irq; /* IRQ level */ 1671 u32 features; /* Chip features map */ 1672 u_char myaddr; /* SCSI id of the adapter */ 1673 u_char maxburst; /* log base 2 of dwords burst */ 1674 u_char maxwide; /* Maximum transfer width */ 1675 u_char minsync; /* Minimum sync period factor */ 1676 u_char maxsync; /* Maximum sync period factor */ 1677 u_char maxoffs; /* Max scsi offset */ 1678 u_char multiplier; /* Clock multiplier (1,2,4) */ 1679 u_char clock_divn; /* Number of clock divisors */ 1680 u_long clock_khz; /* SCSI clock frequency in KHz */ 1681 1682 /*---------------------------------------------------------------- 1683 ** Start queue management. 1684 ** It is filled up by the host processor and accessed by the 1685 ** SCRIPTS processor in order to start SCSI commands. 1686 **---------------------------------------------------------------- 1687 */ 1688 u16 squeueput; /* Next free slot of the queue */ 1689 u16 actccbs; /* Number of allocated CCBs */ 1690 u16 queuedccbs; /* Number of CCBs in start queue*/ 1691 u16 queuedepth; /* Start queue depth */ 1692 1693 /*---------------------------------------------------------------- 1694 ** Timeout handler. 1695 **---------------------------------------------------------------- 1696 */ 1697 struct timer_list timer; /* Timer handler link header */ 1698 u_long lasttime; 1699 u_long settle_time; /* Resetting the SCSI BUS */ 1700 1701 /*---------------------------------------------------------------- 1702 ** Debugging and profiling. 1703 **---------------------------------------------------------------- 1704 */ 1705 struct ncr_reg regdump; /* Register dump */ 1706 u_long regtime; /* Time it has been done */ 1707 1708 /*---------------------------------------------------------------- 1709 ** Miscellaneous buffers accessed by the scripts-processor. 1710 ** They shall be DWORD aligned, because they may be read or 1711 ** written with a SCR_COPY script command. 1712 **---------------------------------------------------------------- 1713 */ 1714 u_char msgout[8]; /* Buffer for MESSAGE OUT */ 1715 u_char msgin [8]; /* Buffer for MESSAGE IN */ 1716 u32 lastmsg; /* Last SCSI message sent */ 1717 u_char scratch; /* Scratch for SCSI receive */ 1718 1719 /*---------------------------------------------------------------- 1720 ** Miscellaneous configuration and status parameters. 1721 **---------------------------------------------------------------- 1722 */ 1723 u_char disc; /* Disconnection allowed */ 1724 u_char scsi_mode; /* Current SCSI BUS mode */ 1725 u_char order; /* Tag order to use */ 1726 u_char verbose; /* Verbosity for this controller*/ 1727 int ncr_cache; /* Used for cache test at init. */ 1728 u_long p_ncb; /* BUS address of this NCB */ 1729 1730 /*---------------------------------------------------------------- 1731 ** Command completion handling. 1732 **---------------------------------------------------------------- 1733 */ 1734 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 1735 struct ccb *(ccb_done[MAX_DONE]); 1736 int ccb_done_ic; 1737 #endif 1738 /*---------------------------------------------------------------- 1739 ** Fields that should be removed or changed. 1740 **---------------------------------------------------------------- 1741 */ 1742 struct ccb *ccb; /* Global CCB */ 1743 struct usrcmd user; /* Command from user */ 1744 volatile u_char release_stage; /* Synchronisation stage on release */ 1745 }; 1746 1747 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1748 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) 1749 1750 /*========================================================== 1751 ** 1752 ** 1753 ** Script for NCR-Processor. 1754 ** 1755 ** Use ncr_script_fill() to create the variable parts. 1756 ** Use ncr_script_copy_and_bind() to make a copy and 1757 ** bind to physical addresses. 1758 ** 1759 ** 1760 **========================================================== 1761 ** 1762 ** We have to know the offsets of all labels before 1763 ** we reach them (for forward jumps). 1764 ** Therefore we declare a struct here. 1765 ** If you make changes inside the script, 1766 ** DONT FORGET TO CHANGE THE LENGTHS HERE! 1767 ** 1768 **---------------------------------------------------------- 1769 */ 1770 1771 /* 1772 ** For HP Zalon/53c720 systems, the Zalon interface 1773 ** between CPU and 53c720 does prefetches, which causes 1774 ** problems with self modifying scripts. The problem 1775 ** is overcome by calling a dummy subroutine after each 1776 ** modification, to force a refetch of the script on 1777 ** return from the subroutine. 1778 */ 1779 1780 #ifdef CONFIG_NCR53C8XX_PREFETCH 1781 #define PREFETCH_FLUSH_CNT 2 1782 #define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma), 1783 #else 1784 #define PREFETCH_FLUSH_CNT 0 1785 #define PREFETCH_FLUSH 1786 #endif 1787 1788 /* 1789 ** Script fragments which are loaded into the on-chip RAM 1790 ** of 825A, 875 and 895 chips. 1791 */ 1792 struct script { 1793 ncrcmd start [ 5]; 1794 ncrcmd startpos [ 1]; 1795 ncrcmd select [ 6]; 1796 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT]; 1797 ncrcmd loadpos [ 4]; 1798 ncrcmd send_ident [ 9]; 1799 ncrcmd prepare [ 6]; 1800 ncrcmd prepare2 [ 7]; 1801 ncrcmd command [ 6]; 1802 ncrcmd dispatch [ 32]; 1803 ncrcmd clrack [ 4]; 1804 ncrcmd no_data [ 17]; 1805 ncrcmd status [ 8]; 1806 ncrcmd msg_in [ 2]; 1807 ncrcmd msg_in2 [ 16]; 1808 ncrcmd msg_bad [ 4]; 1809 ncrcmd setmsg [ 7]; 1810 ncrcmd cleanup [ 6]; 1811 ncrcmd complete [ 9]; 1812 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT]; 1813 ncrcmd cleanup0 [ 1]; 1814 #ifndef SCSI_NCR_CCB_DONE_SUPPORT 1815 ncrcmd signal [ 12]; 1816 #else 1817 ncrcmd signal [ 9]; 1818 ncrcmd done_pos [ 1]; 1819 ncrcmd done_plug [ 2]; 1820 ncrcmd done_end [ 7]; 1821 #endif 1822 ncrcmd save_dp [ 7]; 1823 ncrcmd restore_dp [ 5]; 1824 ncrcmd disconnect [ 10]; 1825 ncrcmd msg_out [ 9]; 1826 ncrcmd msg_out_done [ 7]; 1827 ncrcmd idle [ 2]; 1828 ncrcmd reselect [ 8]; 1829 ncrcmd reselected [ 8]; 1830 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT]; 1831 ncrcmd loadpos1 [ 4]; 1832 ncrcmd resel_lun [ 6]; 1833 ncrcmd resel_tag [ 6]; 1834 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT]; 1835 ncrcmd nexus_indirect [ 4]; 1836 ncrcmd resel_notag [ 4]; 1837 ncrcmd data_in [MAX_SCATTERL * 4]; 1838 ncrcmd data_in2 [ 4]; 1839 ncrcmd data_out [MAX_SCATTERL * 4]; 1840 ncrcmd data_out2 [ 4]; 1841 }; 1842 1843 /* 1844 ** Script fragments which stay in main memory for all chips. 1845 */ 1846 struct scripth { 1847 ncrcmd tryloop [MAX_START*2]; 1848 ncrcmd tryloop2 [ 2]; 1849 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 1850 ncrcmd done_queue [MAX_DONE*5]; 1851 ncrcmd done_queue2 [ 2]; 1852 #endif 1853 ncrcmd select_no_atn [ 8]; 1854 ncrcmd cancel [ 4]; 1855 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT]; 1856 ncrcmd skip2 [ 19]; 1857 ncrcmd par_err_data_in [ 6]; 1858 ncrcmd par_err_other [ 4]; 1859 ncrcmd msg_reject [ 8]; 1860 ncrcmd msg_ign_residue [ 24]; 1861 ncrcmd msg_extended [ 10]; 1862 ncrcmd msg_ext_2 [ 10]; 1863 ncrcmd msg_wdtr [ 14]; 1864 ncrcmd send_wdtr [ 7]; 1865 ncrcmd msg_ext_3 [ 10]; 1866 ncrcmd msg_sdtr [ 14]; 1867 ncrcmd send_sdtr [ 7]; 1868 ncrcmd nego_bad_phase [ 4]; 1869 ncrcmd msg_out_abort [ 10]; 1870 ncrcmd hdata_in [MAX_SCATTERH * 4]; 1871 ncrcmd hdata_in2 [ 2]; 1872 ncrcmd hdata_out [MAX_SCATTERH * 4]; 1873 ncrcmd hdata_out2 [ 2]; 1874 ncrcmd reset [ 4]; 1875 ncrcmd aborttag [ 4]; 1876 ncrcmd abort [ 2]; 1877 ncrcmd abort_resel [ 20]; 1878 ncrcmd resend_ident [ 4]; 1879 ncrcmd clratn_go_on [ 3]; 1880 ncrcmd nxtdsp_go_on [ 1]; 1881 ncrcmd sdata_in [ 8]; 1882 ncrcmd data_io [ 18]; 1883 ncrcmd bad_identify [ 12]; 1884 ncrcmd bad_i_t_l [ 4]; 1885 ncrcmd bad_i_t_l_q [ 4]; 1886 ncrcmd bad_target [ 8]; 1887 ncrcmd bad_status [ 8]; 1888 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT]; 1889 ncrcmd start_ram0 [ 4]; 1890 ncrcmd sto_restart [ 5]; 1891 ncrcmd wait_dma [ 2]; 1892 ncrcmd snooptest [ 9]; 1893 ncrcmd snoopend [ 2]; 1894 }; 1895 1896 /*========================================================== 1897 ** 1898 ** 1899 ** Function headers. 1900 ** 1901 ** 1902 **========================================================== 1903 */ 1904 1905 static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln); 1906 static void ncr_complete (struct ncb *np, struct ccb *cp); 1907 static void ncr_exception (struct ncb *np); 1908 static void ncr_free_ccb (struct ncb *np, struct ccb *cp); 1909 static void ncr_init_ccb (struct ncb *np, struct ccb *cp); 1910 static void ncr_init_tcb (struct ncb *np, u_char tn); 1911 static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln); 1912 static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev); 1913 static void ncr_getclock (struct ncb *np, int mult); 1914 static void ncr_selectclock (struct ncb *np, u_char scntl3); 1915 static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd); 1916 static void ncr_chip_reset (struct ncb *np, int delay); 1917 static void ncr_init (struct ncb *np, int reset, char * msg, u_long code); 1918 static int ncr_int_sbmc (struct ncb *np); 1919 static int ncr_int_par (struct ncb *np); 1920 static void ncr_int_ma (struct ncb *np); 1921 static void ncr_int_sir (struct ncb *np); 1922 static void ncr_int_sto (struct ncb *np); 1923 static void ncr_negotiate (struct ncb* np, struct tcb* tp); 1924 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr); 1925 1926 static void ncr_script_copy_and_bind 1927 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len); 1928 static void ncr_script_fill (struct script * scr, struct scripth * scripth); 1929 static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd); 1930 static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p); 1931 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer); 1932 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev); 1933 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack); 1934 static int ncr_snooptest (struct ncb *np); 1935 static void ncr_timeout (struct ncb *np); 1936 static void ncr_wakeup (struct ncb *np, u_long code); 1937 static void ncr_wakeup_done (struct ncb *np); 1938 static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn); 1939 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp); 1940 1941 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd); 1942 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd); 1943 static void process_waiting_list(struct ncb *np, int sts); 1944 1945 #define remove_from_waiting_list(np, cmd) \ 1946 retrieve_from_waiting_list(1, (np), (cmd)) 1947 #define requeue_waiting_list(np) process_waiting_list((np), DID_OK) 1948 #define reset_waiting_list(np) process_waiting_list((np), DID_RESET) 1949 1950 static inline char *ncr_name (struct ncb *np) 1951 { 1952 return np->inst_name; 1953 } 1954 1955 1956 /*========================================================== 1957 ** 1958 ** 1959 ** Scripts for NCR-Processor. 1960 ** 1961 ** Use ncr_script_bind for binding to physical addresses. 1962 ** 1963 ** 1964 **========================================================== 1965 ** 1966 ** NADDR generates a reference to a field of the controller data. 1967 ** PADDR generates a reference to another part of the script. 1968 ** RADDR generates a reference to a script processor register. 1969 ** FADDR generates a reference to a script processor register 1970 ** with offset. 1971 ** 1972 **---------------------------------------------------------- 1973 */ 1974 1975 #define RELOC_SOFTC 0x40000000 1976 #define RELOC_LABEL 0x50000000 1977 #define RELOC_REGISTER 0x60000000 1978 #define RELOC_LABELH 0x80000000 1979 #define RELOC_MASK 0xf0000000 1980 1981 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 1982 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 1983 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) 1984 #define RADDR(label) (RELOC_REGISTER | REG(label)) 1985 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 1986 1987 1988 static struct script script0 __initdata = { 1989 /*--------------------------< START >-----------------------*/ { 1990 /* 1991 ** This NOP will be patched with LED ON 1992 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 1993 */ 1994 SCR_NO_OP, 1995 0, 1996 /* 1997 ** Clear SIGP. 1998 */ 1999 SCR_FROM_REG (ctest2), 2000 0, 2001 /* 2002 ** Then jump to a certain point in tryloop. 2003 ** Due to the lack of indirect addressing the code 2004 ** is self modifying here. 2005 */ 2006 SCR_JUMP, 2007 }/*-------------------------< STARTPOS >--------------------*/,{ 2008 PADDRH(tryloop), 2009 2010 }/*-------------------------< SELECT >----------------------*/,{ 2011 /* 2012 ** DSA contains the address of a scheduled 2013 ** data structure. 2014 ** 2015 ** SCRATCHA contains the address of the script, 2016 ** which starts the next entry. 2017 ** 2018 ** Set Initiator mode. 2019 ** 2020 ** (Target mode is left as an exercise for the reader) 2021 */ 2022 2023 SCR_CLR (SCR_TRG), 2024 0, 2025 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2026 0, 2027 2028 /* 2029 ** And try to select this target. 2030 */ 2031 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2032 PADDR (reselect), 2033 2034 }/*-------------------------< SELECT2 >----------------------*/,{ 2035 /* 2036 ** Now there are 4 possibilities: 2037 ** 2038 ** (1) The ncr loses arbitration. 2039 ** This is ok, because it will try again, 2040 ** when the bus becomes idle. 2041 ** (But beware of the timeout function!) 2042 ** 2043 ** (2) The ncr is reselected. 2044 ** Then the script processor takes the jump 2045 ** to the RESELECT label. 2046 ** 2047 ** (3) The ncr wins arbitration. 2048 ** Then it will execute SCRIPTS instruction until 2049 ** the next instruction that checks SCSI phase. 2050 ** Then will stop and wait for selection to be 2051 ** complete or selection time-out to occur. 2052 ** As a result the SCRIPTS instructions until 2053 ** LOADPOS + 2 should be executed in parallel with 2054 ** the SCSI core performing selection. 2055 */ 2056 2057 /* 2058 ** The MESSAGE_REJECT problem seems to be due to a selection 2059 ** timing problem. 2060 ** Wait immediately for the selection to complete. 2061 ** (2.5x behaves so) 2062 */ 2063 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2064 0, 2065 2066 /* 2067 ** Next time use the next slot. 2068 */ 2069 SCR_COPY (4), 2070 RADDR (temp), 2071 PADDR (startpos), 2072 /* 2073 ** The ncr doesn't have an indirect load 2074 ** or store command. So we have to 2075 ** copy part of the control block to a 2076 ** fixed place, where we can access it. 2077 ** 2078 ** We patch the address part of a 2079 ** COPY command with the DSA-register. 2080 */ 2081 SCR_COPY_F (4), 2082 RADDR (dsa), 2083 PADDR (loadpos), 2084 /* 2085 ** Flush script prefetch if required 2086 */ 2087 PREFETCH_FLUSH 2088 /* 2089 ** then we do the actual copy. 2090 */ 2091 SCR_COPY (sizeof (struct head)), 2092 /* 2093 ** continued after the next label ... 2094 */ 2095 }/*-------------------------< LOADPOS >---------------------*/,{ 2096 0, 2097 NADDR (header), 2098 /* 2099 ** Wait for the next phase or the selection 2100 ** to complete or time-out. 2101 */ 2102 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2103 PADDR (prepare), 2104 2105 }/*-------------------------< SEND_IDENT >----------------------*/,{ 2106 /* 2107 ** Selection complete. 2108 ** Send the IDENTIFY and SIMPLE_TAG messages 2109 ** (and the EXTENDED_SDTR message) 2110 */ 2111 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2112 offsetof (struct dsb, smsg), 2113 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2114 PADDRH (resend_ident), 2115 SCR_LOAD_REG (scratcha, 0x80), 2116 0, 2117 SCR_COPY (1), 2118 RADDR (scratcha), 2119 NADDR (lastmsg), 2120 }/*-------------------------< PREPARE >----------------------*/,{ 2121 /* 2122 ** load the savep (saved pointer) into 2123 ** the TEMP register (actual pointer) 2124 */ 2125 SCR_COPY (4), 2126 NADDR (header.savep), 2127 RADDR (temp), 2128 /* 2129 ** Initialize the status registers 2130 */ 2131 SCR_COPY (4), 2132 NADDR (header.status), 2133 RADDR (scr0), 2134 }/*-------------------------< PREPARE2 >---------------------*/,{ 2135 /* 2136 ** Initialize the msgout buffer with a NOOP message. 2137 */ 2138 SCR_LOAD_REG (scratcha, NOP), 2139 0, 2140 SCR_COPY (1), 2141 RADDR (scratcha), 2142 NADDR (msgout), 2143 /* 2144 ** Anticipate the COMMAND phase. 2145 ** This is the normal case for initial selection. 2146 */ 2147 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)), 2148 PADDR (dispatch), 2149 2150 }/*-------------------------< COMMAND >--------------------*/,{ 2151 /* 2152 ** ... and send the command 2153 */ 2154 SCR_MOVE_TBL ^ SCR_COMMAND, 2155 offsetof (struct dsb, cmd), 2156 /* 2157 ** If status is still HS_NEGOTIATE, negotiation failed. 2158 ** We check this here, since we want to do that 2159 ** only once. 2160 */ 2161 SCR_FROM_REG (HS_REG), 2162 0, 2163 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2164 SIR_NEGO_FAILED, 2165 2166 }/*-----------------------< DISPATCH >----------------------*/,{ 2167 /* 2168 ** MSG_IN is the only phase that shall be 2169 ** entered at least once for each (re)selection. 2170 ** So we test it first. 2171 */ 2172 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)), 2173 PADDR (msg_in), 2174 2175 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)), 2176 0, 2177 /* 2178 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4. 2179 ** Possible data corruption during Memory Write and Invalidate. 2180 ** This work-around resets the addressing logic prior to the 2181 ** start of the first MOVE of a DATA IN phase. 2182 ** (See Documentation/scsi/ncr53c8xx.rst for more information) 2183 */ 2184 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2185 20, 2186 SCR_COPY (4), 2187 RADDR (scratcha), 2188 RADDR (scratcha), 2189 SCR_RETURN, 2190 0, 2191 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 2192 PADDR (status), 2193 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 2194 PADDR (command), 2195 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 2196 PADDR (msg_out), 2197 /* 2198 ** Discard one illegal phase byte, if required. 2199 */ 2200 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 2201 0, 2202 SCR_COPY (1), 2203 RADDR (scratcha), 2204 NADDR (xerr_st), 2205 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 2206 8, 2207 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 2208 NADDR (scratch), 2209 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 2210 8, 2211 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 2212 NADDR (scratch), 2213 SCR_JUMP, 2214 PADDR (dispatch), 2215 2216 }/*-------------------------< CLRACK >----------------------*/,{ 2217 /* 2218 ** Terminate possible pending message phase. 2219 */ 2220 SCR_CLR (SCR_ACK), 2221 0, 2222 SCR_JUMP, 2223 PADDR (dispatch), 2224 2225 }/*-------------------------< NO_DATA >--------------------*/,{ 2226 /* 2227 ** The target wants to tranfer too much data 2228 ** or in the wrong direction. 2229 ** Remember that in extended error. 2230 */ 2231 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 2232 0, 2233 SCR_COPY (1), 2234 RADDR (scratcha), 2235 NADDR (xerr_st), 2236 /* 2237 ** Discard one data byte, if required. 2238 */ 2239 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2240 8, 2241 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 2242 NADDR (scratch), 2243 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2244 8, 2245 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2246 NADDR (scratch), 2247 /* 2248 ** .. and repeat as required. 2249 */ 2250 SCR_CALL, 2251 PADDR (dispatch), 2252 SCR_JUMP, 2253 PADDR (no_data), 2254 2255 }/*-------------------------< STATUS >--------------------*/,{ 2256 /* 2257 ** get the status 2258 */ 2259 SCR_MOVE_ABS (1) ^ SCR_STATUS, 2260 NADDR (scratch), 2261 /* 2262 ** save status to scsi_status. 2263 ** mark as complete. 2264 */ 2265 SCR_TO_REG (SS_REG), 2266 0, 2267 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 2268 0, 2269 SCR_JUMP, 2270 PADDR (dispatch), 2271 }/*-------------------------< MSG_IN >--------------------*/,{ 2272 /* 2273 ** Get the first byte of the message 2274 ** and save it to SCRATCHA. 2275 ** 2276 ** The script processor doesn't negate the 2277 ** ACK signal after this transfer. 2278 */ 2279 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2280 NADDR (msgin[0]), 2281 }/*-------------------------< MSG_IN2 >--------------------*/,{ 2282 /* 2283 ** Handle this message. 2284 */ 2285 SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)), 2286 PADDR (complete), 2287 SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)), 2288 PADDR (disconnect), 2289 SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)), 2290 PADDR (save_dp), 2291 SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)), 2292 PADDR (restore_dp), 2293 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)), 2294 PADDRH (msg_extended), 2295 SCR_JUMP ^ IFTRUE (DATA (NOP)), 2296 PADDR (clrack), 2297 SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)), 2298 PADDRH (msg_reject), 2299 SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)), 2300 PADDRH (msg_ign_residue), 2301 /* 2302 ** Rest of the messages left as 2303 ** an exercise ... 2304 ** 2305 ** Unimplemented messages: 2306 ** fall through to MSG_BAD. 2307 */ 2308 }/*-------------------------< MSG_BAD >------------------*/,{ 2309 /* 2310 ** unimplemented message - reject it. 2311 */ 2312 SCR_INT, 2313 SIR_REJECT_SENT, 2314 SCR_LOAD_REG (scratcha, MESSAGE_REJECT), 2315 0, 2316 }/*-------------------------< SETMSG >----------------------*/,{ 2317 SCR_COPY (1), 2318 RADDR (scratcha), 2319 NADDR (msgout), 2320 SCR_SET (SCR_ATN), 2321 0, 2322 SCR_JUMP, 2323 PADDR (clrack), 2324 }/*-------------------------< CLEANUP >-------------------*/,{ 2325 /* 2326 ** dsa: Pointer to ccb 2327 ** or xxxxxxFF (no ccb) 2328 ** 2329 ** HS_REG: Host-Status (<>0!) 2330 */ 2331 SCR_FROM_REG (dsa), 2332 0, 2333 SCR_JUMP ^ IFTRUE (DATA (0xff)), 2334 PADDR (start), 2335 /* 2336 ** dsa is valid. 2337 ** complete the cleanup. 2338 */ 2339 SCR_JUMP, 2340 PADDR (cleanup_ok), 2341 2342 }/*-------------------------< COMPLETE >-----------------*/,{ 2343 /* 2344 ** Complete message. 2345 ** 2346 ** Copy TEMP register to LASTP in header. 2347 */ 2348 SCR_COPY (4), 2349 RADDR (temp), 2350 NADDR (header.lastp), 2351 /* 2352 ** When we terminate the cycle by clearing ACK, 2353 ** the target may disconnect immediately. 2354 ** 2355 ** We don't want to be told of an 2356 ** "unexpected disconnect", 2357 ** so we disable this feature. 2358 */ 2359 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2360 0, 2361 /* 2362 ** Terminate cycle ... 2363 */ 2364 SCR_CLR (SCR_ACK|SCR_ATN), 2365 0, 2366 /* 2367 ** ... and wait for the disconnect. 2368 */ 2369 SCR_WAIT_DISC, 2370 0, 2371 }/*-------------------------< CLEANUP_OK >----------------*/,{ 2372 /* 2373 ** Save host status to header. 2374 */ 2375 SCR_COPY (4), 2376 RADDR (scr0), 2377 NADDR (header.status), 2378 /* 2379 ** and copy back the header to the ccb. 2380 */ 2381 SCR_COPY_F (4), 2382 RADDR (dsa), 2383 PADDR (cleanup0), 2384 /* 2385 ** Flush script prefetch if required 2386 */ 2387 PREFETCH_FLUSH 2388 SCR_COPY (sizeof (struct head)), 2389 NADDR (header), 2390 }/*-------------------------< CLEANUP0 >--------------------*/,{ 2391 0, 2392 }/*-------------------------< SIGNAL >----------------------*/,{ 2393 /* 2394 ** if job not completed ... 2395 */ 2396 SCR_FROM_REG (HS_REG), 2397 0, 2398 /* 2399 ** ... start the next command. 2400 */ 2401 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))), 2402 PADDR(start), 2403 /* 2404 ** If command resulted in not GOOD status, 2405 ** call the C code if needed. 2406 */ 2407 SCR_FROM_REG (SS_REG), 2408 0, 2409 SCR_CALL ^ IFFALSE (DATA (SAM_STAT_GOOD)), 2410 PADDRH (bad_status), 2411 2412 #ifndef SCSI_NCR_CCB_DONE_SUPPORT 2413 2414 /* 2415 ** ... signal completion to the host 2416 */ 2417 SCR_INT, 2418 SIR_INTFLY, 2419 /* 2420 ** Auf zu neuen Schandtaten! 2421 */ 2422 SCR_JUMP, 2423 PADDR(start), 2424 2425 #else /* defined SCSI_NCR_CCB_DONE_SUPPORT */ 2426 2427 /* 2428 ** ... signal completion to the host 2429 */ 2430 SCR_JUMP, 2431 }/*------------------------< DONE_POS >---------------------*/,{ 2432 PADDRH (done_queue), 2433 }/*------------------------< DONE_PLUG >--------------------*/,{ 2434 SCR_INT, 2435 SIR_DONE_OVERFLOW, 2436 }/*------------------------< DONE_END >---------------------*/,{ 2437 SCR_INT, 2438 SIR_INTFLY, 2439 SCR_COPY (4), 2440 RADDR (temp), 2441 PADDR (done_pos), 2442 SCR_JUMP, 2443 PADDR (start), 2444 2445 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2446 2447 }/*-------------------------< SAVE_DP >------------------*/,{ 2448 /* 2449 ** SAVE_DP message: 2450 ** Copy TEMP register to SAVEP in header. 2451 */ 2452 SCR_COPY (4), 2453 RADDR (temp), 2454 NADDR (header.savep), 2455 SCR_CLR (SCR_ACK), 2456 0, 2457 SCR_JUMP, 2458 PADDR (dispatch), 2459 }/*-------------------------< RESTORE_DP >---------------*/,{ 2460 /* 2461 ** RESTORE_DP message: 2462 ** Copy SAVEP in header to TEMP register. 2463 */ 2464 SCR_COPY (4), 2465 NADDR (header.savep), 2466 RADDR (temp), 2467 SCR_JUMP, 2468 PADDR (clrack), 2469 2470 }/*-------------------------< DISCONNECT >---------------*/,{ 2471 /* 2472 ** DISCONNECTing ... 2473 ** 2474 ** disable the "unexpected disconnect" feature, 2475 ** and remove the ACK signal. 2476 */ 2477 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2478 0, 2479 SCR_CLR (SCR_ACK|SCR_ATN), 2480 0, 2481 /* 2482 ** Wait for the disconnect. 2483 */ 2484 SCR_WAIT_DISC, 2485 0, 2486 /* 2487 ** Status is: DISCONNECTED. 2488 */ 2489 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2490 0, 2491 SCR_JUMP, 2492 PADDR (cleanup_ok), 2493 2494 }/*-------------------------< MSG_OUT >-------------------*/,{ 2495 /* 2496 ** The target requests a message. 2497 */ 2498 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2499 NADDR (msgout), 2500 SCR_COPY (1), 2501 NADDR (msgout), 2502 NADDR (lastmsg), 2503 /* 2504 ** If it was no ABORT message ... 2505 */ 2506 SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)), 2507 PADDRH (msg_out_abort), 2508 /* 2509 ** ... wait for the next phase 2510 ** if it's a message out, send it again, ... 2511 */ 2512 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2513 PADDR (msg_out), 2514 }/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2515 /* 2516 ** ... else clear the message ... 2517 */ 2518 SCR_LOAD_REG (scratcha, NOP), 2519 0, 2520 SCR_COPY (4), 2521 RADDR (scratcha), 2522 NADDR (msgout), 2523 /* 2524 ** ... and process the next phase 2525 */ 2526 SCR_JUMP, 2527 PADDR (dispatch), 2528 }/*-------------------------< IDLE >------------------------*/,{ 2529 /* 2530 ** Nothing to do? 2531 ** Wait for reselect. 2532 ** This NOP will be patched with LED OFF 2533 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2534 */ 2535 SCR_NO_OP, 2536 0, 2537 }/*-------------------------< RESELECT >--------------------*/,{ 2538 /* 2539 ** make the DSA invalid. 2540 */ 2541 SCR_LOAD_REG (dsa, 0xff), 2542 0, 2543 SCR_CLR (SCR_TRG), 2544 0, 2545 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT), 2546 0, 2547 /* 2548 ** Sleep waiting for a reselection. 2549 ** If SIGP is set, special treatment. 2550 ** 2551 ** Zu allem bereit .. 2552 */ 2553 SCR_WAIT_RESEL, 2554 PADDR(start), 2555 }/*-------------------------< RESELECTED >------------------*/,{ 2556 /* 2557 ** This NOP will be patched with LED ON 2558 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2559 */ 2560 SCR_NO_OP, 2561 0, 2562 /* 2563 ** ... zu nichts zu gebrauchen ? 2564 ** 2565 ** load the target id into the SFBR 2566 ** and jump to the control block. 2567 ** 2568 ** Look at the declarations of 2569 ** - struct ncb 2570 ** - struct tcb 2571 ** - struct lcb 2572 ** - struct ccb 2573 ** to understand what's going on. 2574 */ 2575 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2576 0, 2577 SCR_TO_REG (sdid), 2578 0, 2579 SCR_JUMP, 2580 NADDR (jump_tcb), 2581 2582 }/*-------------------------< RESEL_DSA >-------------------*/,{ 2583 /* 2584 ** Ack the IDENTIFY or TAG previously received. 2585 */ 2586 SCR_CLR (SCR_ACK), 2587 0, 2588 /* 2589 ** The ncr doesn't have an indirect load 2590 ** or store command. So we have to 2591 ** copy part of the control block to a 2592 ** fixed place, where we can access it. 2593 ** 2594 ** We patch the address part of a 2595 ** COPY command with the DSA-register. 2596 */ 2597 SCR_COPY_F (4), 2598 RADDR (dsa), 2599 PADDR (loadpos1), 2600 /* 2601 ** Flush script prefetch if required 2602 */ 2603 PREFETCH_FLUSH 2604 /* 2605 ** then we do the actual copy. 2606 */ 2607 SCR_COPY (sizeof (struct head)), 2608 /* 2609 ** continued after the next label ... 2610 */ 2611 2612 }/*-------------------------< LOADPOS1 >-------------------*/,{ 2613 0, 2614 NADDR (header), 2615 /* 2616 ** The DSA contains the data structure address. 2617 */ 2618 SCR_JUMP, 2619 PADDR (prepare), 2620 2621 }/*-------------------------< RESEL_LUN >-------------------*/,{ 2622 /* 2623 ** come back to this point 2624 ** to get an IDENTIFY message 2625 ** Wait for a msg_in phase. 2626 */ 2627 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)), 2628 SIR_RESEL_NO_MSG_IN, 2629 /* 2630 ** message phase. 2631 ** Read the data directly from the BUS DATA lines. 2632 ** This helps to support very old SCSI devices that 2633 ** may reselect without sending an IDENTIFY. 2634 */ 2635 SCR_FROM_REG (sbdl), 2636 0, 2637 /* 2638 ** It should be an Identify message. 2639 */ 2640 SCR_RETURN, 2641 0, 2642 }/*-------------------------< RESEL_TAG >-------------------*/,{ 2643 /* 2644 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE. 2645 ** Aggressive optimization, is'nt it? 2646 ** No need to test the SIMPLE TAG message, since the 2647 ** driver only supports conformant devices for tags. ;-) 2648 */ 2649 SCR_MOVE_ABS (3) ^ SCR_MSG_IN, 2650 NADDR (msgin), 2651 /* 2652 ** Read the TAG from the SIDL. 2653 ** Still an aggressive optimization. ;-) 2654 ** Compute the CCB indirect jump address which 2655 ** is (#TAG*2 & 0xfc) due to tag numbering using 2656 ** 1,3,5..MAXTAGS*2+1 actual values. 2657 */ 2658 SCR_REG_SFBR (sidl, SCR_SHL, 0), 2659 0, 2660 SCR_SFBR_REG (temp, SCR_AND, 0xfc), 2661 0, 2662 }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{ 2663 SCR_COPY_F (4), 2664 RADDR (temp), 2665 PADDR (nexus_indirect), 2666 /* 2667 ** Flush script prefetch if required 2668 */ 2669 PREFETCH_FLUSH 2670 SCR_COPY (4), 2671 }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{ 2672 0, 2673 RADDR (temp), 2674 SCR_RETURN, 2675 0, 2676 }/*-------------------------< RESEL_NOTAG >-------------------*/,{ 2677 /* 2678 ** No tag expected. 2679 ** Read an throw away the IDENTIFY. 2680 */ 2681 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2682 NADDR (msgin), 2683 SCR_JUMP, 2684 PADDR (jump_to_nexus), 2685 }/*-------------------------< DATA_IN >--------------------*/,{ 2686 /* 2687 ** Because the size depends on the 2688 ** #define MAX_SCATTERL parameter, 2689 ** it is filled in at runtime. 2690 ** 2691 ** ##===========< i=0; i<MAX_SCATTERL >========= 2692 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2693 ** || PADDR (dispatch), 2694 ** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2695 ** || offsetof (struct dsb, data[ i]), 2696 ** ##========================================== 2697 ** 2698 **--------------------------------------------------------- 2699 */ 2700 0 2701 }/*-------------------------< DATA_IN2 >-------------------*/,{ 2702 SCR_CALL, 2703 PADDR (dispatch), 2704 SCR_JUMP, 2705 PADDR (no_data), 2706 }/*-------------------------< DATA_OUT >--------------------*/,{ 2707 /* 2708 ** Because the size depends on the 2709 ** #define MAX_SCATTERL parameter, 2710 ** it is filled in at runtime. 2711 ** 2712 ** ##===========< i=0; i<MAX_SCATTERL >========= 2713 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2714 ** || PADDR (dispatch), 2715 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2716 ** || offsetof (struct dsb, data[ i]), 2717 ** ##========================================== 2718 ** 2719 **--------------------------------------------------------- 2720 */ 2721 0 2722 }/*-------------------------< DATA_OUT2 >-------------------*/,{ 2723 SCR_CALL, 2724 PADDR (dispatch), 2725 SCR_JUMP, 2726 PADDR (no_data), 2727 }/*--------------------------------------------------------*/ 2728 }; 2729 2730 static struct scripth scripth0 __initdata = { 2731 /*-------------------------< TRYLOOP >---------------------*/{ 2732 /* 2733 ** Start the next entry. 2734 ** Called addresses point to the launch script in the CCB. 2735 ** They are patched by the main processor. 2736 ** 2737 ** Because the size depends on the 2738 ** #define MAX_START parameter, it is filled 2739 ** in at runtime. 2740 ** 2741 **----------------------------------------------------------- 2742 ** 2743 ** ##===========< I=0; i<MAX_START >=========== 2744 ** || SCR_CALL, 2745 ** || PADDR (idle), 2746 ** ##========================================== 2747 ** 2748 **----------------------------------------------------------- 2749 */ 2750 0 2751 }/*------------------------< TRYLOOP2 >---------------------*/,{ 2752 SCR_JUMP, 2753 PADDRH(tryloop), 2754 2755 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 2756 2757 }/*------------------------< DONE_QUEUE >-------------------*/,{ 2758 /* 2759 ** Copy the CCB address to the next done entry. 2760 ** Because the size depends on the 2761 ** #define MAX_DONE parameter, it is filled 2762 ** in at runtime. 2763 ** 2764 **----------------------------------------------------------- 2765 ** 2766 ** ##===========< I=0; i<MAX_DONE >=========== 2767 ** || SCR_COPY (sizeof(struct ccb *), 2768 ** || NADDR (header.cp), 2769 ** || NADDR (ccb_done[i]), 2770 ** || SCR_CALL, 2771 ** || PADDR (done_end), 2772 ** ##========================================== 2773 ** 2774 **----------------------------------------------------------- 2775 */ 2776 0 2777 }/*------------------------< DONE_QUEUE2 >------------------*/,{ 2778 SCR_JUMP, 2779 PADDRH (done_queue), 2780 2781 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2782 }/*------------------------< SELECT_NO_ATN >-----------------*/,{ 2783 /* 2784 ** Set Initiator mode. 2785 ** And try to select this target without ATN. 2786 */ 2787 2788 SCR_CLR (SCR_TRG), 2789 0, 2790 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2791 0, 2792 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2793 PADDR (reselect), 2794 SCR_JUMP, 2795 PADDR (select2), 2796 2797 }/*-------------------------< CANCEL >------------------------*/,{ 2798 2799 SCR_LOAD_REG (scratcha, HS_ABORTED), 2800 0, 2801 SCR_JUMPR, 2802 8, 2803 }/*-------------------------< SKIP >------------------------*/,{ 2804 SCR_LOAD_REG (scratcha, 0), 2805 0, 2806 /* 2807 ** This entry has been canceled. 2808 ** Next time use the next slot. 2809 */ 2810 SCR_COPY (4), 2811 RADDR (temp), 2812 PADDR (startpos), 2813 /* 2814 ** The ncr doesn't have an indirect load 2815 ** or store command. So we have to 2816 ** copy part of the control block to a 2817 ** fixed place, where we can access it. 2818 ** 2819 ** We patch the address part of a 2820 ** COPY command with the DSA-register. 2821 */ 2822 SCR_COPY_F (4), 2823 RADDR (dsa), 2824 PADDRH (skip2), 2825 /* 2826 ** Flush script prefetch if required 2827 */ 2828 PREFETCH_FLUSH 2829 /* 2830 ** then we do the actual copy. 2831 */ 2832 SCR_COPY (sizeof (struct head)), 2833 /* 2834 ** continued after the next label ... 2835 */ 2836 }/*-------------------------< SKIP2 >---------------------*/,{ 2837 0, 2838 NADDR (header), 2839 /* 2840 ** Initialize the status registers 2841 */ 2842 SCR_COPY (4), 2843 NADDR (header.status), 2844 RADDR (scr0), 2845 /* 2846 ** Force host status. 2847 */ 2848 SCR_FROM_REG (scratcha), 2849 0, 2850 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 2851 16, 2852 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK), 2853 0, 2854 SCR_JUMPR, 2855 8, 2856 SCR_TO_REG (HS_REG), 2857 0, 2858 SCR_LOAD_REG (SS_REG, SAM_STAT_GOOD), 2859 0, 2860 SCR_JUMP, 2861 PADDR (cleanup_ok), 2862 2863 },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{ 2864 /* 2865 ** Ignore all data in byte, until next phase 2866 */ 2867 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2868 PADDRH (par_err_other), 2869 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2870 NADDR (scratch), 2871 SCR_JUMPR, 2872 -24, 2873 },/*-------------------------< PAR_ERR_OTHER >------------------*/{ 2874 /* 2875 ** count it. 2876 */ 2877 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2878 0, 2879 /* 2880 ** jump to dispatcher. 2881 */ 2882 SCR_JUMP, 2883 PADDR (dispatch), 2884 }/*-------------------------< MSG_REJECT >---------------*/,{ 2885 /* 2886 ** If a negotiation was in progress, 2887 ** negotiation failed. 2888 ** Otherwise, let the C code print 2889 ** some message. 2890 */ 2891 SCR_FROM_REG (HS_REG), 2892 0, 2893 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2894 SIR_REJECT_RECEIVED, 2895 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2896 SIR_NEGO_FAILED, 2897 SCR_JUMP, 2898 PADDR (clrack), 2899 2900 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2901 /* 2902 ** Terminate cycle 2903 */ 2904 SCR_CLR (SCR_ACK), 2905 0, 2906 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2907 PADDR (dispatch), 2908 /* 2909 ** get residue size. 2910 */ 2911 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2912 NADDR (msgin[1]), 2913 /* 2914 ** Size is 0 .. ignore message. 2915 */ 2916 SCR_JUMP ^ IFTRUE (DATA (0)), 2917 PADDR (clrack), 2918 /* 2919 ** Size is not 1 .. have to interrupt. 2920 */ 2921 SCR_JUMPR ^ IFFALSE (DATA (1)), 2922 40, 2923 /* 2924 ** Check for residue byte in swide register 2925 */ 2926 SCR_FROM_REG (scntl2), 2927 0, 2928 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2929 16, 2930 /* 2931 ** There IS data in the swide register. 2932 ** Discard it. 2933 */ 2934 SCR_REG_REG (scntl2, SCR_OR, WSR), 2935 0, 2936 SCR_JUMP, 2937 PADDR (clrack), 2938 /* 2939 ** Load again the size to the sfbr register. 2940 */ 2941 SCR_FROM_REG (scratcha), 2942 0, 2943 SCR_INT, 2944 SIR_IGN_RESIDUE, 2945 SCR_JUMP, 2946 PADDR (clrack), 2947 2948 }/*-------------------------< MSG_EXTENDED >-------------*/,{ 2949 /* 2950 ** Terminate cycle 2951 */ 2952 SCR_CLR (SCR_ACK), 2953 0, 2954 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2955 PADDR (dispatch), 2956 /* 2957 ** get length. 2958 */ 2959 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2960 NADDR (msgin[1]), 2961 /* 2962 */ 2963 SCR_JUMP ^ IFTRUE (DATA (3)), 2964 PADDRH (msg_ext_3), 2965 SCR_JUMP ^ IFFALSE (DATA (2)), 2966 PADDR (msg_bad), 2967 }/*-------------------------< MSG_EXT_2 >----------------*/,{ 2968 SCR_CLR (SCR_ACK), 2969 0, 2970 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2971 PADDR (dispatch), 2972 /* 2973 ** get extended message code. 2974 */ 2975 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2976 NADDR (msgin[2]), 2977 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)), 2978 PADDRH (msg_wdtr), 2979 /* 2980 ** unknown extended message 2981 */ 2982 SCR_JUMP, 2983 PADDR (msg_bad) 2984 }/*-------------------------< MSG_WDTR >-----------------*/,{ 2985 SCR_CLR (SCR_ACK), 2986 0, 2987 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2988 PADDR (dispatch), 2989 /* 2990 ** get data bus width 2991 */ 2992 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2993 NADDR (msgin[3]), 2994 /* 2995 ** let the host do the real work. 2996 */ 2997 SCR_INT, 2998 SIR_NEGO_WIDE, 2999 /* 3000 ** let the target fetch our answer. 3001 */ 3002 SCR_SET (SCR_ATN), 3003 0, 3004 SCR_CLR (SCR_ACK), 3005 0, 3006 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3007 PADDRH (nego_bad_phase), 3008 3009 }/*-------------------------< SEND_WDTR >----------------*/,{ 3010 /* 3011 ** Send the EXTENDED_WDTR 3012 */ 3013 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 3014 NADDR (msgout), 3015 SCR_COPY (1), 3016 NADDR (msgout), 3017 NADDR (lastmsg), 3018 SCR_JUMP, 3019 PADDR (msg_out_done), 3020 3021 }/*-------------------------< MSG_EXT_3 >----------------*/,{ 3022 SCR_CLR (SCR_ACK), 3023 0, 3024 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3025 PADDR (dispatch), 3026 /* 3027 ** get extended message code. 3028 */ 3029 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3030 NADDR (msgin[2]), 3031 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)), 3032 PADDRH (msg_sdtr), 3033 /* 3034 ** unknown extended message 3035 */ 3036 SCR_JUMP, 3037 PADDR (msg_bad) 3038 3039 }/*-------------------------< MSG_SDTR >-----------------*/,{ 3040 SCR_CLR (SCR_ACK), 3041 0, 3042 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3043 PADDR (dispatch), 3044 /* 3045 ** get period and offset 3046 */ 3047 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 3048 NADDR (msgin[3]), 3049 /* 3050 ** let the host do the real work. 3051 */ 3052 SCR_INT, 3053 SIR_NEGO_SYNC, 3054 /* 3055 ** let the target fetch our answer. 3056 */ 3057 SCR_SET (SCR_ATN), 3058 0, 3059 SCR_CLR (SCR_ACK), 3060 0, 3061 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3062 PADDRH (nego_bad_phase), 3063 3064 }/*-------------------------< SEND_SDTR >-------------*/,{ 3065 /* 3066 ** Send the EXTENDED_SDTR 3067 */ 3068 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 3069 NADDR (msgout), 3070 SCR_COPY (1), 3071 NADDR (msgout), 3072 NADDR (lastmsg), 3073 SCR_JUMP, 3074 PADDR (msg_out_done), 3075 3076 }/*-------------------------< NEGO_BAD_PHASE >------------*/,{ 3077 SCR_INT, 3078 SIR_NEGO_PROTO, 3079 SCR_JUMP, 3080 PADDR (dispatch), 3081 3082 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 3083 /* 3084 ** After ABORT message, 3085 ** 3086 ** expect an immediate disconnect, ... 3087 */ 3088 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3089 0, 3090 SCR_CLR (SCR_ACK|SCR_ATN), 3091 0, 3092 SCR_WAIT_DISC, 3093 0, 3094 /* 3095 ** ... and set the status to "ABORTED" 3096 */ 3097 SCR_LOAD_REG (HS_REG, HS_ABORTED), 3098 0, 3099 SCR_JUMP, 3100 PADDR (cleanup), 3101 3102 }/*-------------------------< HDATA_IN >-------------------*/,{ 3103 /* 3104 ** Because the size depends on the 3105 ** #define MAX_SCATTERH parameter, 3106 ** it is filled in at runtime. 3107 ** 3108 ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3109 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3110 ** || PADDR (dispatch), 3111 ** || SCR_MOVE_TBL ^ SCR_DATA_IN, 3112 ** || offsetof (struct dsb, data[ i]), 3113 ** ##=================================================== 3114 ** 3115 **--------------------------------------------------------- 3116 */ 3117 0 3118 }/*-------------------------< HDATA_IN2 >------------------*/,{ 3119 SCR_JUMP, 3120 PADDR (data_in), 3121 3122 }/*-------------------------< HDATA_OUT >-------------------*/,{ 3123 /* 3124 ** Because the size depends on the 3125 ** #define MAX_SCATTERH parameter, 3126 ** it is filled in at runtime. 3127 ** 3128 ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3129 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 3130 ** || PADDR (dispatch), 3131 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 3132 ** || offsetof (struct dsb, data[ i]), 3133 ** ##=================================================== 3134 ** 3135 **--------------------------------------------------------- 3136 */ 3137 0 3138 }/*-------------------------< HDATA_OUT2 >------------------*/,{ 3139 SCR_JUMP, 3140 PADDR (data_out), 3141 3142 }/*-------------------------< RESET >----------------------*/,{ 3143 /* 3144 ** Send a TARGET_RESET message if bad IDENTIFY 3145 ** received on reselection. 3146 */ 3147 SCR_LOAD_REG (scratcha, ABORT_TASK), 3148 0, 3149 SCR_JUMP, 3150 PADDRH (abort_resel), 3151 }/*-------------------------< ABORTTAG >-------------------*/,{ 3152 /* 3153 ** Abort a wrong tag received on reselection. 3154 */ 3155 SCR_LOAD_REG (scratcha, ABORT_TASK), 3156 0, 3157 SCR_JUMP, 3158 PADDRH (abort_resel), 3159 }/*-------------------------< ABORT >----------------------*/,{ 3160 /* 3161 ** Abort a reselection when no active CCB. 3162 */ 3163 SCR_LOAD_REG (scratcha, ABORT_TASK_SET), 3164 0, 3165 }/*-------------------------< ABORT_RESEL >----------------*/,{ 3166 SCR_COPY (1), 3167 RADDR (scratcha), 3168 NADDR (msgout), 3169 SCR_SET (SCR_ATN), 3170 0, 3171 SCR_CLR (SCR_ACK), 3172 0, 3173 /* 3174 ** and send it. 3175 ** we expect an immediate disconnect 3176 */ 3177 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3178 0, 3179 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 3180 NADDR (msgout), 3181 SCR_COPY (1), 3182 NADDR (msgout), 3183 NADDR (lastmsg), 3184 SCR_CLR (SCR_ACK|SCR_ATN), 3185 0, 3186 SCR_WAIT_DISC, 3187 0, 3188 SCR_JUMP, 3189 PADDR (start), 3190 }/*-------------------------< RESEND_IDENT >-------------------*/,{ 3191 /* 3192 ** The target stays in MSG OUT phase after having acked 3193 ** Identify [+ Tag [+ Extended message ]]. Targets shall 3194 ** behave this way on parity error. 3195 ** We must send it again all the messages. 3196 */ 3197 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */ 3198 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */ 3199 SCR_JUMP, 3200 PADDR (send_ident), 3201 }/*-------------------------< CLRATN_GO_ON >-------------------*/,{ 3202 SCR_CLR (SCR_ATN), 3203 0, 3204 SCR_JUMP, 3205 }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{ 3206 0, 3207 }/*-------------------------< SDATA_IN >-------------------*/,{ 3208 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3209 PADDR (dispatch), 3210 SCR_MOVE_TBL ^ SCR_DATA_IN, 3211 offsetof (struct dsb, sense), 3212 SCR_CALL, 3213 PADDR (dispatch), 3214 SCR_JUMP, 3215 PADDR (no_data), 3216 }/*-------------------------< DATA_IO >--------------------*/,{ 3217 /* 3218 ** We jump here if the data direction was unknown at the 3219 ** time we had to queue the command to the scripts processor. 3220 ** Pointers had been set as follow in this situation: 3221 ** savep --> DATA_IO 3222 ** lastp --> start pointer when DATA_IN 3223 ** goalp --> goal pointer when DATA_IN 3224 ** wlastp --> start pointer when DATA_OUT 3225 ** wgoalp --> goal pointer when DATA_OUT 3226 ** This script sets savep/lastp/goalp according to the 3227 ** direction chosen by the target. 3228 */ 3229 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)), 3230 32, 3231 /* 3232 ** Direction is DATA IN. 3233 ** Warning: we jump here, even when phase is DATA OUT. 3234 */ 3235 SCR_COPY (4), 3236 NADDR (header.lastp), 3237 NADDR (header.savep), 3238 3239 /* 3240 ** Jump to the SCRIPTS according to actual direction. 3241 */ 3242 SCR_COPY (4), 3243 NADDR (header.savep), 3244 RADDR (temp), 3245 SCR_RETURN, 3246 0, 3247 /* 3248 ** Direction is DATA OUT. 3249 */ 3250 SCR_COPY (4), 3251 NADDR (header.wlastp), 3252 NADDR (header.lastp), 3253 SCR_COPY (4), 3254 NADDR (header.wgoalp), 3255 NADDR (header.goalp), 3256 SCR_JUMPR, 3257 -64, 3258 }/*-------------------------< BAD_IDENTIFY >---------------*/,{ 3259 /* 3260 ** If message phase but not an IDENTIFY, 3261 ** get some help from the C code. 3262 ** Old SCSI device may behave so. 3263 */ 3264 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)), 3265 16, 3266 SCR_INT, 3267 SIR_RESEL_NO_IDENTIFY, 3268 SCR_JUMP, 3269 PADDRH (reset), 3270 /* 3271 ** Message is an IDENTIFY, but lun is unknown. 3272 ** Read the message, since we got it directly 3273 ** from the SCSI BUS data lines. 3274 ** Signal problem to C code for logging the event. 3275 ** Send an ABORT_TASK_SET to clear all pending tasks. 3276 */ 3277 SCR_INT, 3278 SIR_RESEL_BAD_LUN, 3279 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3280 NADDR (msgin), 3281 SCR_JUMP, 3282 PADDRH (abort), 3283 }/*-------------------------< BAD_I_T_L >------------------*/,{ 3284 /* 3285 ** We donnot have a task for that I_T_L. 3286 ** Signal problem to C code for logging the event. 3287 ** Send an ABORT_TASK_SET message. 3288 */ 3289 SCR_INT, 3290 SIR_RESEL_BAD_I_T_L, 3291 SCR_JUMP, 3292 PADDRH (abort), 3293 }/*-------------------------< BAD_I_T_L_Q >----------------*/,{ 3294 /* 3295 ** We donnot have a task that matches the tag. 3296 ** Signal problem to C code for logging the event. 3297 ** Send an ABORT_TASK message. 3298 */ 3299 SCR_INT, 3300 SIR_RESEL_BAD_I_T_L_Q, 3301 SCR_JUMP, 3302 PADDRH (aborttag), 3303 }/*-------------------------< BAD_TARGET >-----------------*/,{ 3304 /* 3305 ** We donnot know the target that reselected us. 3306 ** Grab the first message if any (IDENTIFY). 3307 ** Signal problem to C code for logging the event. 3308 ** TARGET_RESET message. 3309 */ 3310 SCR_INT, 3311 SIR_RESEL_BAD_TARGET, 3312 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 3313 8, 3314 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3315 NADDR (msgin), 3316 SCR_JUMP, 3317 PADDRH (reset), 3318 }/*-------------------------< BAD_STATUS >-----------------*/,{ 3319 /* 3320 ** If command resulted in either TASK_SET FULL, 3321 ** CHECK CONDITION or COMMAND TERMINATED, 3322 ** call the C code. 3323 */ 3324 SCR_INT ^ IFTRUE (DATA (SAM_STAT_TASK_SET_FULL)), 3325 SIR_BAD_STATUS, 3326 SCR_INT ^ IFTRUE (DATA (SAM_STAT_CHECK_CONDITION)), 3327 SIR_BAD_STATUS, 3328 SCR_INT ^ IFTRUE (DATA (SAM_STAT_COMMAND_TERMINATED)), 3329 SIR_BAD_STATUS, 3330 SCR_RETURN, 3331 0, 3332 }/*-------------------------< START_RAM >-------------------*/,{ 3333 /* 3334 ** Load the script into on-chip RAM, 3335 ** and jump to start point. 3336 */ 3337 SCR_COPY_F (4), 3338 RADDR (scratcha), 3339 PADDRH (start_ram0), 3340 /* 3341 ** Flush script prefetch if required 3342 */ 3343 PREFETCH_FLUSH 3344 SCR_COPY (sizeof (struct script)), 3345 }/*-------------------------< START_RAM0 >--------------------*/,{ 3346 0, 3347 PADDR (start), 3348 SCR_JUMP, 3349 PADDR (start), 3350 }/*-------------------------< STO_RESTART >-------------------*/,{ 3351 /* 3352 ** 3353 ** Repair start queue (e.g. next time use the next slot) 3354 ** and jump to start point. 3355 */ 3356 SCR_COPY (4), 3357 RADDR (temp), 3358 PADDR (startpos), 3359 SCR_JUMP, 3360 PADDR (start), 3361 }/*-------------------------< WAIT_DMA >-------------------*/,{ 3362 /* 3363 ** For HP Zalon/53c720 systems, the Zalon interface 3364 ** between CPU and 53c720 does prefetches, which causes 3365 ** problems with self modifying scripts. The problem 3366 ** is overcome by calling a dummy subroutine after each 3367 ** modification, to force a refetch of the script on 3368 ** return from the subroutine. 3369 */ 3370 SCR_RETURN, 3371 0, 3372 }/*-------------------------< SNOOPTEST >-------------------*/,{ 3373 /* 3374 ** Read the variable. 3375 */ 3376 SCR_COPY (4), 3377 NADDR(ncr_cache), 3378 RADDR (scratcha), 3379 /* 3380 ** Write the variable. 3381 */ 3382 SCR_COPY (4), 3383 RADDR (temp), 3384 NADDR(ncr_cache), 3385 /* 3386 ** Read back the variable. 3387 */ 3388 SCR_COPY (4), 3389 NADDR(ncr_cache), 3390 RADDR (temp), 3391 }/*-------------------------< SNOOPEND >-------------------*/,{ 3392 /* 3393 ** And stop. 3394 */ 3395 SCR_INT, 3396 99, 3397 }/*--------------------------------------------------------*/ 3398 }; 3399 3400 /*========================================================== 3401 ** 3402 ** 3403 ** Fill in #define dependent parts of the script 3404 ** 3405 ** 3406 **========================================================== 3407 */ 3408 3409 void __init ncr_script_fill (struct script * scr, struct scripth * scrh) 3410 { 3411 int i; 3412 ncrcmd *p; 3413 3414 p = scrh->tryloop; 3415 for (i=0; i<MAX_START; i++) { 3416 *p++ =SCR_CALL; 3417 *p++ =PADDR (idle); 3418 } 3419 3420 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop)); 3421 3422 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 3423 3424 p = scrh->done_queue; 3425 for (i = 0; i<MAX_DONE; i++) { 3426 *p++ =SCR_COPY (sizeof(struct ccb *)); 3427 *p++ =NADDR (header.cp); 3428 *p++ =NADDR (ccb_done[i]); 3429 *p++ =SCR_CALL; 3430 *p++ =PADDR (done_end); 3431 } 3432 3433 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue)); 3434 3435 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 3436 3437 p = scrh->hdata_in; 3438 for (i=0; i<MAX_SCATTERH; i++) { 3439 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3440 *p++ =PADDR (dispatch); 3441 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3442 *p++ =offsetof (struct dsb, data[i]); 3443 } 3444 3445 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in)); 3446 3447 p = scr->data_in; 3448 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3449 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3450 *p++ =PADDR (dispatch); 3451 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3452 *p++ =offsetof (struct dsb, data[i]); 3453 } 3454 3455 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in)); 3456 3457 p = scrh->hdata_out; 3458 for (i=0; i<MAX_SCATTERH; i++) { 3459 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3460 *p++ =PADDR (dispatch); 3461 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3462 *p++ =offsetof (struct dsb, data[i]); 3463 } 3464 3465 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out)); 3466 3467 p = scr->data_out; 3468 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3469 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3470 *p++ =PADDR (dispatch); 3471 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3472 *p++ =offsetof (struct dsb, data[i]); 3473 } 3474 3475 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out)); 3476 } 3477 3478 /*========================================================== 3479 ** 3480 ** 3481 ** Copy and rebind a script. 3482 ** 3483 ** 3484 **========================================================== 3485 */ 3486 3487 static void __init 3488 ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len) 3489 { 3490 ncrcmd opcode, new, old, tmp1, tmp2; 3491 ncrcmd *start, *end; 3492 int relocs; 3493 int opchanged = 0; 3494 3495 start = src; 3496 end = src + len/4; 3497 3498 while (src < end) { 3499 3500 opcode = *src++; 3501 *dst++ = cpu_to_scr(opcode); 3502 3503 /* 3504 ** If we forget to change the length 3505 ** in struct script, a field will be 3506 ** padded with 0. This is an illegal 3507 ** command. 3508 */ 3509 3510 if (opcode == 0) { 3511 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n", 3512 ncr_name(np), (int) (src-start-1)); 3513 mdelay(1000); 3514 } 3515 3516 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3517 printk (KERN_DEBUG "%p: <%x>\n", 3518 (src-1), (unsigned)opcode); 3519 3520 /* 3521 ** We don't have to decode ALL commands 3522 */ 3523 switch (opcode >> 28) { 3524 3525 case 0xc: 3526 /* 3527 ** COPY has TWO arguments. 3528 */ 3529 relocs = 2; 3530 tmp1 = src[0]; 3531 #ifdef RELOC_KVAR 3532 if ((tmp1 & RELOC_MASK) == RELOC_KVAR) 3533 tmp1 = 0; 3534 #endif 3535 tmp2 = src[1]; 3536 #ifdef RELOC_KVAR 3537 if ((tmp2 & RELOC_MASK) == RELOC_KVAR) 3538 tmp2 = 0; 3539 #endif 3540 if ((tmp1 ^ tmp2) & 3) { 3541 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n", 3542 ncr_name(np), (int) (src-start-1)); 3543 mdelay(1000); 3544 } 3545 /* 3546 ** If PREFETCH feature not enabled, remove 3547 ** the NO FLUSH bit if present. 3548 */ 3549 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) { 3550 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH); 3551 ++opchanged; 3552 } 3553 break; 3554 3555 case 0x0: 3556 /* 3557 ** MOVE (absolute address) 3558 */ 3559 relocs = 1; 3560 break; 3561 3562 case 0x8: 3563 /* 3564 ** JUMP / CALL 3565 ** don't relocate if relative :-) 3566 */ 3567 if (opcode & 0x00800000) 3568 relocs = 0; 3569 else 3570 relocs = 1; 3571 break; 3572 3573 case 0x4: 3574 case 0x5: 3575 case 0x6: 3576 case 0x7: 3577 relocs = 1; 3578 break; 3579 3580 default: 3581 relocs = 0; 3582 break; 3583 } 3584 3585 if (relocs) { 3586 while (relocs--) { 3587 old = *src++; 3588 3589 switch (old & RELOC_MASK) { 3590 case RELOC_REGISTER: 3591 new = (old & ~RELOC_MASK) + np->paddr; 3592 break; 3593 case RELOC_LABEL: 3594 new = (old & ~RELOC_MASK) + np->p_script; 3595 break; 3596 case RELOC_LABELH: 3597 new = (old & ~RELOC_MASK) + np->p_scripth; 3598 break; 3599 case RELOC_SOFTC: 3600 new = (old & ~RELOC_MASK) + np->p_ncb; 3601 break; 3602 #ifdef RELOC_KVAR 3603 case RELOC_KVAR: 3604 if (((old & ~RELOC_MASK) < 3605 SCRIPT_KVAR_FIRST) || 3606 ((old & ~RELOC_MASK) > 3607 SCRIPT_KVAR_LAST)) 3608 panic("ncr KVAR out of range"); 3609 new = vtophys(script_kvars[old & 3610 ~RELOC_MASK]); 3611 break; 3612 #endif 3613 case 0: 3614 /* Don't relocate a 0 address. */ 3615 if (old == 0) { 3616 new = old; 3617 break; 3618 } 3619 fallthrough; 3620 default: 3621 panic("ncr_script_copy_and_bind: weird relocation %x\n", old); 3622 break; 3623 } 3624 3625 *dst++ = cpu_to_scr(new); 3626 } 3627 } else 3628 *dst++ = cpu_to_scr(*src++); 3629 3630 } 3631 } 3632 3633 /* 3634 ** Linux host data structure 3635 */ 3636 3637 struct host_data { 3638 struct ncb *ncb; 3639 }; 3640 3641 #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) 3642 3643 static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg) 3644 { 3645 PRINT_ADDR(cp->cmd, "%s: ", label); 3646 3647 spi_print_msg(msg); 3648 printk("\n"); 3649 } 3650 3651 /*========================================================== 3652 ** 3653 ** NCR chip clock divisor table. 3654 ** Divisors are multiplied by 10,000,000 in order to make 3655 ** calculations more simple. 3656 ** 3657 **========================================================== 3658 */ 3659 3660 #define _5M 5000000 3661 static u_long div_10M[] = 3662 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3663 3664 3665 /*=============================================================== 3666 ** 3667 ** Prepare io register values used by ncr_init() according 3668 ** to selected and supported features. 3669 ** 3670 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3671 ** transfers. 32,64,128 are only supported by 875 and 895 chips. 3672 ** We use log base 2 (burst length) as internal code, with 3673 ** value 0 meaning "burst disabled". 3674 ** 3675 **=============================================================== 3676 */ 3677 3678 /* 3679 * Burst length from burst code. 3680 */ 3681 #define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3682 3683 /* 3684 * Burst code from io register bits. Burst enable is ctest0 for c720 3685 */ 3686 #define burst_code(dmode, ctest0) \ 3687 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1 3688 3689 /* 3690 * Set initial io register bits from burst code. 3691 */ 3692 static inline void ncr_init_burst(struct ncb *np, u_char bc) 3693 { 3694 u_char *be = &np->rv_ctest0; 3695 *be &= ~0x80; 3696 np->rv_dmode &= ~(0x3 << 6); 3697 np->rv_ctest5 &= ~0x4; 3698 3699 if (!bc) { 3700 *be |= 0x80; 3701 } else { 3702 --bc; 3703 np->rv_dmode |= ((bc & 0x3) << 6); 3704 np->rv_ctest5 |= (bc & 0x4); 3705 } 3706 } 3707 3708 static void __init ncr_prepare_setting(struct ncb *np) 3709 { 3710 u_char burst_max; 3711 u_long period; 3712 int i; 3713 3714 /* 3715 ** Save assumed BIOS setting 3716 */ 3717 3718 np->sv_scntl0 = INB(nc_scntl0) & 0x0a; 3719 np->sv_scntl3 = INB(nc_scntl3) & 0x07; 3720 np->sv_dmode = INB(nc_dmode) & 0xce; 3721 np->sv_dcntl = INB(nc_dcntl) & 0xa8; 3722 np->sv_ctest0 = INB(nc_ctest0) & 0x84; 3723 np->sv_ctest3 = INB(nc_ctest3) & 0x01; 3724 np->sv_ctest4 = INB(nc_ctest4) & 0x80; 3725 np->sv_ctest5 = INB(nc_ctest5) & 0x24; 3726 np->sv_gpcntl = INB(nc_gpcntl); 3727 np->sv_stest2 = INB(nc_stest2) & 0x20; 3728 np->sv_stest4 = INB(nc_stest4); 3729 3730 /* 3731 ** Wide ? 3732 */ 3733 3734 np->maxwide = (np->features & FE_WIDE)? 1 : 0; 3735 3736 /* 3737 * Guess the frequency of the chip's clock. 3738 */ 3739 if (np->features & FE_ULTRA) 3740 np->clock_khz = 80000; 3741 else 3742 np->clock_khz = 40000; 3743 3744 /* 3745 * Get the clock multiplier factor. 3746 */ 3747 if (np->features & FE_QUAD) 3748 np->multiplier = 4; 3749 else if (np->features & FE_DBLR) 3750 np->multiplier = 2; 3751 else 3752 np->multiplier = 1; 3753 3754 /* 3755 * Measure SCSI clock frequency for chips 3756 * it may vary from assumed one. 3757 */ 3758 if (np->features & FE_VARCLK) 3759 ncr_getclock(np, np->multiplier); 3760 3761 /* 3762 * Divisor to be used for async (timer pre-scaler). 3763 */ 3764 i = np->clock_divn - 1; 3765 while (--i >= 0) { 3766 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3767 ++i; 3768 break; 3769 } 3770 } 3771 np->rv_scntl3 = i+1; 3772 3773 /* 3774 * Minimum synchronous period factor supported by the chip. 3775 * Btw, 'period' is in tenths of nanoseconds. 3776 */ 3777 3778 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3779 if (period <= 250) np->minsync = 10; 3780 else if (period <= 303) np->minsync = 11; 3781 else if (period <= 500) np->minsync = 12; 3782 else np->minsync = (period + 40 - 1) / 40; 3783 3784 /* 3785 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3786 */ 3787 3788 if (np->minsync < 25 && !(np->features & FE_ULTRA)) 3789 np->minsync = 25; 3790 3791 /* 3792 * Maximum synchronous period factor supported by the chip. 3793 */ 3794 3795 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3796 np->maxsync = period > 2540 ? 254 : period / 10; 3797 3798 /* 3799 ** Prepare initial value of other IO registers 3800 */ 3801 #if defined SCSI_NCR_TRUST_BIOS_SETTING 3802 np->rv_scntl0 = np->sv_scntl0; 3803 np->rv_dmode = np->sv_dmode; 3804 np->rv_dcntl = np->sv_dcntl; 3805 np->rv_ctest0 = np->sv_ctest0; 3806 np->rv_ctest3 = np->sv_ctest3; 3807 np->rv_ctest4 = np->sv_ctest4; 3808 np->rv_ctest5 = np->sv_ctest5; 3809 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3810 #else 3811 3812 /* 3813 ** Select burst length (dwords) 3814 */ 3815 burst_max = driver_setup.burst_max; 3816 if (burst_max == 255) 3817 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3818 if (burst_max > 7) 3819 burst_max = 7; 3820 if (burst_max > np->maxburst) 3821 burst_max = np->maxburst; 3822 3823 /* 3824 ** Select all supported special features 3825 */ 3826 if (np->features & FE_ERL) 3827 np->rv_dmode |= ERL; /* Enable Read Line */ 3828 if (np->features & FE_BOF) 3829 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3830 if (np->features & FE_ERMP) 3831 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3832 if (np->features & FE_PFEN) 3833 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3834 if (np->features & FE_CLSE) 3835 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3836 if (np->features & FE_WRIE) 3837 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3838 if (np->features & FE_DFS) 3839 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3840 if (np->features & FE_MUX) 3841 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ 3842 if (np->features & FE_EA) 3843 np->rv_dcntl |= EA; /* Enable ACK */ 3844 if (np->features & FE_EHP) 3845 np->rv_ctest0 |= EHP; /* Even host parity */ 3846 3847 /* 3848 ** Select some other 3849 */ 3850 if (driver_setup.master_parity) 3851 np->rv_ctest4 |= MPEE; /* Master parity checking */ 3852 if (driver_setup.scsi_parity) 3853 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ 3854 3855 /* 3856 ** Get SCSI addr of host adapter (set by bios?). 3857 */ 3858 if (np->myaddr == 255) { 3859 np->myaddr = INB(nc_scid) & 0x07; 3860 if (!np->myaddr) 3861 np->myaddr = SCSI_NCR_MYADDR; 3862 } 3863 3864 #endif /* SCSI_NCR_TRUST_BIOS_SETTING */ 3865 3866 /* 3867 * Prepare initial io register bits for burst length 3868 */ 3869 ncr_init_burst(np, burst_max); 3870 3871 /* 3872 ** Set SCSI BUS mode. 3873 ** 3874 ** - ULTRA2 chips (895/895A/896) report the current 3875 ** BUS mode through the STEST4 IO register. 3876 ** - For previous generation chips (825/825A/875), 3877 ** user has to tell us how to check against HVD, 3878 ** since a 100% safe algorithm is not possible. 3879 */ 3880 np->scsi_mode = SMODE_SE; 3881 if (np->features & FE_DIFF) { 3882 switch(driver_setup.diff_support) { 3883 case 4: /* Trust previous settings if present, then GPIO3 */ 3884 if (np->sv_scntl3) { 3885 if (np->sv_stest2 & 0x20) 3886 np->scsi_mode = SMODE_HVD; 3887 break; 3888 } 3889 fallthrough; 3890 case 3: /* SYMBIOS controllers report HVD through GPIO3 */ 3891 if (INB(nc_gpreg) & 0x08) 3892 break; 3893 fallthrough; 3894 case 2: /* Set HVD unconditionally */ 3895 np->scsi_mode = SMODE_HVD; 3896 fallthrough; 3897 case 1: /* Trust previous settings for HVD */ 3898 if (np->sv_stest2 & 0x20) 3899 np->scsi_mode = SMODE_HVD; 3900 break; 3901 default:/* Don't care about HVD */ 3902 break; 3903 } 3904 } 3905 if (np->scsi_mode == SMODE_HVD) 3906 np->rv_stest2 |= 0x20; 3907 3908 /* 3909 ** Set LED support from SCRIPTS. 3910 ** Ignore this feature for boards known to use a 3911 ** specific GPIO wiring and for the 895A or 896 3912 ** that drive the LED directly. 3913 ** Also probe initial setting of GPIO0 as output. 3914 */ 3915 if ((driver_setup.led_pin) && 3916 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) 3917 np->features |= FE_LED0; 3918 3919 /* 3920 ** Set irq mode. 3921 */ 3922 switch(driver_setup.irqm & 3) { 3923 case 2: 3924 np->rv_dcntl |= IRQM; 3925 break; 3926 case 1: 3927 np->rv_dcntl |= (np->sv_dcntl & IRQM); 3928 break; 3929 default: 3930 break; 3931 } 3932 3933 /* 3934 ** Configure targets according to driver setup. 3935 ** Allow to override sync, wide and NOSCAN from 3936 ** boot command line. 3937 */ 3938 for (i = 0 ; i < MAX_TARGET ; i++) { 3939 struct tcb *tp = &np->target[i]; 3940 3941 tp->usrsync = driver_setup.default_sync; 3942 tp->usrwide = driver_setup.max_wide; 3943 tp->usrtags = MAX_TAGS; 3944 tp->period = 0xffff; 3945 if (!driver_setup.disconnection) 3946 np->target[i].usrflag = UF_NODISC; 3947 } 3948 3949 /* 3950 ** Announce all that stuff to user. 3951 */ 3952 3953 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np), 3954 np->myaddr, 3955 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10), 3956 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity", 3957 (np->rv_stest2 & 0x20) ? ", Differential" : ""); 3958 3959 if (bootverbose > 1) { 3960 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 3961 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 3962 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, 3963 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); 3964 3965 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 3966 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 3967 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, 3968 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 3969 } 3970 3971 if (bootverbose && np->paddr2) 3972 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n", 3973 ncr_name(np), np->paddr2); 3974 } 3975 3976 /*========================================================== 3977 ** 3978 ** 3979 ** Done SCSI commands list management. 3980 ** 3981 ** We donnot enter the scsi_done() callback immediately 3982 ** after a command has been seen as completed but we 3983 ** insert it into a list which is flushed outside any kind 3984 ** of driver critical section. 3985 ** This allows to do minimal stuff under interrupt and 3986 ** inside critical sections and to also avoid locking up 3987 ** on recursive calls to driver entry points under SMP. 3988 ** In fact, the only kernel point which is entered by the 3989 ** driver with a driver lock set is kmalloc(GFP_ATOMIC) 3990 ** that shall not reenter the driver under any circumstances, 3991 ** AFAIK. 3992 ** 3993 **========================================================== 3994 */ 3995 static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd) 3996 { 3997 unmap_scsi_data(np, cmd); 3998 cmd->host_scribble = (char *) np->done_list; 3999 np->done_list = cmd; 4000 } 4001 4002 static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd) 4003 { 4004 struct scsi_cmnd *cmd; 4005 4006 while (lcmd) { 4007 cmd = lcmd; 4008 lcmd = (struct scsi_cmnd *) cmd->host_scribble; 4009 cmd->scsi_done(cmd); 4010 } 4011 } 4012 4013 /*========================================================== 4014 ** 4015 ** 4016 ** Prepare the next negotiation message if needed. 4017 ** 4018 ** Fill in the part of message buffer that contains the 4019 ** negotiation and the nego_status field of the CCB. 4020 ** Returns the size of the message in bytes. 4021 ** 4022 ** 4023 **========================================================== 4024 */ 4025 4026 4027 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr) 4028 { 4029 struct tcb *tp = &np->target[cp->target]; 4030 int msglen = 0; 4031 int nego = 0; 4032 struct scsi_target *starget = tp->starget; 4033 4034 /* negotiate wide transfers ? */ 4035 if (!tp->widedone) { 4036 if (spi_support_wide(starget)) { 4037 nego = NS_WIDE; 4038 } else 4039 tp->widedone=1; 4040 } 4041 4042 /* negotiate synchronous transfers? */ 4043 if (!nego && !tp->period) { 4044 if (spi_support_sync(starget)) { 4045 nego = NS_SYNC; 4046 } else { 4047 tp->period =0xffff; 4048 dev_info(&starget->dev, "target did not report SYNC.\n"); 4049 } 4050 } 4051 4052 switch (nego) { 4053 case NS_SYNC: 4054 msglen += spi_populate_sync_msg(msgptr + msglen, 4055 tp->maxoffs ? tp->minsync : 0, tp->maxoffs); 4056 break; 4057 case NS_WIDE: 4058 msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide); 4059 break; 4060 } 4061 4062 cp->nego_status = nego; 4063 4064 if (nego) { 4065 tp->nego_cp = cp; 4066 if (DEBUG_FLAGS & DEBUG_NEGO) { 4067 ncr_print_msg(cp, nego == NS_WIDE ? 4068 "wide msgout":"sync_msgout", msgptr); 4069 } 4070 } 4071 4072 return msglen; 4073 } 4074 4075 4076 4077 /*========================================================== 4078 ** 4079 ** 4080 ** Start execution of a SCSI command. 4081 ** This is called from the generic SCSI driver. 4082 ** 4083 ** 4084 **========================================================== 4085 */ 4086 static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd) 4087 { 4088 struct scsi_device *sdev = cmd->device; 4089 struct tcb *tp = &np->target[sdev->id]; 4090 struct lcb *lp = tp->lp[sdev->lun]; 4091 struct ccb *cp; 4092 4093 int segments; 4094 u_char idmsg, *msgptr; 4095 u32 msglen; 4096 int direction; 4097 u32 lastp, goalp; 4098 4099 /*--------------------------------------------- 4100 ** 4101 ** Some shortcuts ... 4102 ** 4103 **--------------------------------------------- 4104 */ 4105 if ((sdev->id == np->myaddr ) || 4106 (sdev->id >= MAX_TARGET) || 4107 (sdev->lun >= MAX_LUN )) { 4108 return(DID_BAD_TARGET); 4109 } 4110 4111 /*--------------------------------------------- 4112 ** 4113 ** Complete the 1st TEST UNIT READY command 4114 ** with error condition if the device is 4115 ** flagged NOSCAN, in order to speed up 4116 ** the boot. 4117 ** 4118 **--------------------------------------------- 4119 */ 4120 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && 4121 (tp->usrflag & UF_NOSCAN)) { 4122 tp->usrflag &= ~UF_NOSCAN; 4123 return DID_BAD_TARGET; 4124 } 4125 4126 if (DEBUG_FLAGS & DEBUG_TINY) { 4127 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]); 4128 } 4129 4130 /*--------------------------------------------------- 4131 ** 4132 ** Assign a ccb / bind cmd. 4133 ** If resetting, shorten settle_time if necessary 4134 ** in order to avoid spurious timeouts. 4135 ** If resetting or no free ccb, 4136 ** insert cmd into the waiting list. 4137 ** 4138 **---------------------------------------------------- 4139 */ 4140 if (np->settle_time && scsi_cmd_to_rq(cmd)->timeout >= HZ) { 4141 u_long tlimit = jiffies + scsi_cmd_to_rq(cmd)->timeout - HZ; 4142 if (time_after(np->settle_time, tlimit)) 4143 np->settle_time = tlimit; 4144 } 4145 4146 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) { 4147 insert_into_waiting_list(np, cmd); 4148 return(DID_OK); 4149 } 4150 cp->cmd = cmd; 4151 4152 /*---------------------------------------------------- 4153 ** 4154 ** Build the identify / tag / sdtr message 4155 ** 4156 **---------------------------------------------------- 4157 */ 4158 4159 idmsg = IDENTIFY(0, sdev->lun); 4160 4161 if (cp ->tag != NO_TAG || 4162 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC))) 4163 idmsg |= 0x40; 4164 4165 msgptr = cp->scsi_smsg; 4166 msglen = 0; 4167 msgptr[msglen++] = idmsg; 4168 4169 if (cp->tag != NO_TAG) { 4170 char order = np->order; 4171 4172 /* 4173 ** Force ordered tag if necessary to avoid timeouts 4174 ** and to preserve interactivity. 4175 */ 4176 if (lp && time_after(jiffies, lp->tags_stime)) { 4177 if (lp->tags_smap) { 4178 order = ORDERED_QUEUE_TAG; 4179 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){ 4180 PRINT_ADDR(cmd, 4181 "ordered tag forced.\n"); 4182 } 4183 } 4184 lp->tags_stime = jiffies + 3*HZ; 4185 lp->tags_smap = lp->tags_umap; 4186 } 4187 4188 if (order == 0) { 4189 /* 4190 ** Ordered write ops, unordered read ops. 4191 */ 4192 switch (cmd->cmnd[0]) { 4193 case 0x08: /* READ_SMALL (6) */ 4194 case 0x28: /* READ_BIG (10) */ 4195 case 0xa8: /* READ_HUGE (12) */ 4196 order = SIMPLE_QUEUE_TAG; 4197 break; 4198 default: 4199 order = ORDERED_QUEUE_TAG; 4200 } 4201 } 4202 msgptr[msglen++] = order; 4203 /* 4204 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1, 4205 ** since we may have to deal with devices that have 4206 ** problems with #TAG 0 or too great #TAG numbers. 4207 */ 4208 msgptr[msglen++] = (cp->tag << 1) + 1; 4209 } 4210 4211 /*---------------------------------------------------- 4212 ** 4213 ** Build the data descriptors 4214 ** 4215 **---------------------------------------------------- 4216 */ 4217 4218 direction = cmd->sc_data_direction; 4219 if (direction != DMA_NONE) { 4220 segments = ncr_scatter(np, cp, cp->cmd); 4221 if (segments < 0) { 4222 ncr_free_ccb(np, cp); 4223 return(DID_ERROR); 4224 } 4225 } 4226 else { 4227 cp->data_len = 0; 4228 segments = 0; 4229 } 4230 4231 /*--------------------------------------------------- 4232 ** 4233 ** negotiation required? 4234 ** 4235 ** (nego_status is filled by ncr_prepare_nego()) 4236 ** 4237 **--------------------------------------------------- 4238 */ 4239 4240 cp->nego_status = 0; 4241 4242 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) { 4243 msglen += ncr_prepare_nego (np, cp, msgptr + msglen); 4244 } 4245 4246 /*---------------------------------------------------- 4247 ** 4248 ** Determine xfer direction. 4249 ** 4250 **---------------------------------------------------- 4251 */ 4252 if (!cp->data_len) 4253 direction = DMA_NONE; 4254 4255 /* 4256 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE 4257 ** but prepare alternate pointers for TO_DEVICE in case 4258 ** of our speculation will be just wrong. 4259 ** SCRIPTS will swap values if needed. 4260 */ 4261 switch(direction) { 4262 case DMA_BIDIRECTIONAL: 4263 case DMA_TO_DEVICE: 4264 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8; 4265 if (segments <= MAX_SCATTERL) 4266 lastp = goalp - 8 - (segments * 16); 4267 else { 4268 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2); 4269 lastp -= (segments - MAX_SCATTERL) * 16; 4270 } 4271 if (direction != DMA_BIDIRECTIONAL) 4272 break; 4273 cp->phys.header.wgoalp = cpu_to_scr(goalp); 4274 cp->phys.header.wlastp = cpu_to_scr(lastp); 4275 fallthrough; 4276 case DMA_FROM_DEVICE: 4277 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8; 4278 if (segments <= MAX_SCATTERL) 4279 lastp = goalp - 8 - (segments * 16); 4280 else { 4281 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2); 4282 lastp -= (segments - MAX_SCATTERL) * 16; 4283 } 4284 break; 4285 default: 4286 case DMA_NONE: 4287 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data); 4288 break; 4289 } 4290 4291 /* 4292 ** Set all pointers values needed by SCRIPTS. 4293 ** If direction is unknown, start at data_io. 4294 */ 4295 cp->phys.header.lastp = cpu_to_scr(lastp); 4296 cp->phys.header.goalp = cpu_to_scr(goalp); 4297 4298 if (direction == DMA_BIDIRECTIONAL) 4299 cp->phys.header.savep = 4300 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io)); 4301 else 4302 cp->phys.header.savep= cpu_to_scr(lastp); 4303 4304 /* 4305 ** Save the initial data pointer in order to be able 4306 ** to redo the command. 4307 */ 4308 cp->startp = cp->phys.header.savep; 4309 4310 /*---------------------------------------------------- 4311 ** 4312 ** fill in ccb 4313 ** 4314 **---------------------------------------------------- 4315 ** 4316 ** 4317 ** physical -> virtual backlink 4318 ** Generic SCSI command 4319 */ 4320 4321 /* 4322 ** Startqueue 4323 */ 4324 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 4325 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa)); 4326 /* 4327 ** select 4328 */ 4329 cp->phys.select.sel_id = sdev_id(sdev); 4330 cp->phys.select.sel_scntl3 = tp->wval; 4331 cp->phys.select.sel_sxfer = tp->sval; 4332 /* 4333 ** message 4334 */ 4335 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg)); 4336 cp->phys.smsg.size = cpu_to_scr(msglen); 4337 4338 /* 4339 ** command 4340 */ 4341 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf))); 4342 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0])); 4343 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len); 4344 4345 /* 4346 ** status 4347 */ 4348 cp->actualquirks = 0; 4349 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; 4350 cp->scsi_status = SAM_STAT_ILLEGAL; 4351 cp->parity_status = 0; 4352 4353 cp->xerr_status = XE_OK; 4354 4355 /*---------------------------------------------------- 4356 ** 4357 ** Critical region: start this job. 4358 ** 4359 **---------------------------------------------------- 4360 */ 4361 4362 /* activate this job. */ 4363 cp->magic = CCB_MAGIC; 4364 4365 /* 4366 ** insert next CCBs into start queue. 4367 ** 2 max at a time is enough to flush the CCB wait queue. 4368 */ 4369 cp->auto_sense = 0; 4370 if (lp) 4371 ncr_start_next_ccb(np, lp, 2); 4372 else 4373 ncr_put_start_queue(np, cp); 4374 4375 /* Command is successfully queued. */ 4376 4377 return DID_OK; 4378 } 4379 4380 4381 /*========================================================== 4382 ** 4383 ** 4384 ** Insert a CCB into the start queue and wake up the 4385 ** SCRIPTS processor. 4386 ** 4387 ** 4388 **========================================================== 4389 */ 4390 4391 static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn) 4392 { 4393 struct list_head *qp; 4394 struct ccb *cp; 4395 4396 if (lp->held_ccb) 4397 return; 4398 4399 while (maxn-- && lp->queuedccbs < lp->queuedepth) { 4400 qp = ncr_list_pop(&lp->wait_ccbq); 4401 if (!qp) 4402 break; 4403 ++lp->queuedccbs; 4404 cp = list_entry(qp, struct ccb, link_ccbq); 4405 list_add_tail(qp, &lp->busy_ccbq); 4406 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] = 4407 cpu_to_scr(CCB_PHYS (cp, restart)); 4408 ncr_put_start_queue(np, cp); 4409 } 4410 } 4411 4412 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp) 4413 { 4414 u16 qidx; 4415 4416 /* 4417 ** insert into start queue. 4418 */ 4419 if (!np->squeueput) np->squeueput = 1; 4420 qidx = np->squeueput + 2; 4421 if (qidx >= MAX_START + MAX_START) qidx = 1; 4422 4423 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 4424 MEMORY_BARRIER(); 4425 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start)); 4426 4427 np->squeueput = qidx; 4428 ++np->queuedccbs; 4429 cp->queued = 1; 4430 4431 if (DEBUG_FLAGS & DEBUG_QUEUE) 4432 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput); 4433 4434 /* 4435 ** Script processor may be waiting for reselect. 4436 ** Wake it up. 4437 */ 4438 MEMORY_BARRIER(); 4439 OUTB (nc_istat, SIGP); 4440 } 4441 4442 4443 static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay) 4444 { 4445 u32 term; 4446 int retv = 0; 4447 4448 np->settle_time = jiffies + settle_delay * HZ; 4449 4450 if (bootverbose > 1) 4451 printk("%s: resetting, " 4452 "command processing suspended for %d seconds\n", 4453 ncr_name(np), settle_delay); 4454 4455 ncr_chip_reset(np, 100); 4456 udelay(2000); /* The 895 needs time for the bus mode to settle */ 4457 if (enab_int) 4458 OUTW (nc_sien, RST); 4459 /* 4460 ** Enable Tolerant, reset IRQD if present and 4461 ** properly set IRQ mode, prior to resetting the bus. 4462 */ 4463 OUTB (nc_stest3, TE); 4464 OUTB (nc_scntl1, CRST); 4465 udelay(200); 4466 4467 if (!driver_setup.bus_check) 4468 goto out; 4469 /* 4470 ** Check for no terminators or SCSI bus shorts to ground. 4471 ** Read SCSI data bus, data parity bits and control signals. 4472 ** We are expecting RESET to be TRUE and other signals to be 4473 ** FALSE. 4474 */ 4475 4476 term = INB(nc_sstat0); 4477 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ 4478 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */ 4479 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */ 4480 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */ 4481 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */ 4482 4483 if (!(np->features & FE_WIDE)) 4484 term &= 0x3ffff; 4485 4486 if (term != (2<<7)) { 4487 printk("%s: suspicious SCSI data while resetting the BUS.\n", 4488 ncr_name(np)); 4489 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " 4490 "0x%lx, expecting 0x%lx\n", 4491 ncr_name(np), 4492 (np->features & FE_WIDE) ? "dp1,d15-8," : "", 4493 (u_long)term, (u_long)(2<<7)); 4494 if (driver_setup.bus_check == 1) 4495 retv = 1; 4496 } 4497 out: 4498 OUTB (nc_scntl1, 0); 4499 return retv; 4500 } 4501 4502 /* 4503 * Start reset process. 4504 * If reset in progress do nothing. 4505 * The interrupt handler will reinitialize the chip. 4506 * The timeout handler will wait for settle_time before 4507 * clearing it and so resuming command processing. 4508 */ 4509 static void ncr_start_reset(struct ncb *np) 4510 { 4511 if (!np->settle_time) { 4512 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay); 4513 } 4514 } 4515 4516 /*========================================================== 4517 ** 4518 ** 4519 ** Reset the SCSI BUS. 4520 ** This is called from the generic SCSI driver. 4521 ** 4522 ** 4523 **========================================================== 4524 */ 4525 static int ncr_reset_bus (struct ncb *np) 4526 { 4527 /* 4528 * Return immediately if reset is in progress. 4529 */ 4530 if (np->settle_time) { 4531 return FAILED; 4532 } 4533 /* 4534 * Start the reset process. 4535 * The script processor is then assumed to be stopped. 4536 * Commands will now be queued in the waiting list until a settle 4537 * delay of 2 seconds will be completed. 4538 */ 4539 ncr_start_reset(np); 4540 /* 4541 * Wake-up all awaiting commands with DID_RESET. 4542 */ 4543 reset_waiting_list(np); 4544 /* 4545 * Wake-up all pending commands with HS_RESET -> DID_RESET. 4546 */ 4547 ncr_wakeup(np, HS_RESET); 4548 4549 return SUCCESS; 4550 } 4551 4552 static void ncr_detach(struct ncb *np) 4553 { 4554 struct ccb *cp; 4555 struct tcb *tp; 4556 struct lcb *lp; 4557 int target, lun; 4558 int i; 4559 char inst_name[16]; 4560 4561 /* Local copy so we don't access np after freeing it! */ 4562 strlcpy(inst_name, ncr_name(np), sizeof(inst_name)); 4563 4564 printk("%s: releasing host resources\n", ncr_name(np)); 4565 4566 /* 4567 ** Stop the ncr_timeout process 4568 ** Set release_stage to 1 and wait that ncr_timeout() set it to 2. 4569 */ 4570 4571 #ifdef DEBUG_NCR53C8XX 4572 printk("%s: stopping the timer\n", ncr_name(np)); 4573 #endif 4574 np->release_stage = 1; 4575 for (i = 50 ; i && np->release_stage != 2 ; i--) 4576 mdelay(100); 4577 if (np->release_stage != 2) 4578 printk("%s: the timer seems to be already stopped\n", ncr_name(np)); 4579 else np->release_stage = 2; 4580 4581 /* 4582 ** Disable chip interrupts 4583 */ 4584 4585 #ifdef DEBUG_NCR53C8XX 4586 printk("%s: disabling chip interrupts\n", ncr_name(np)); 4587 #endif 4588 OUTW (nc_sien , 0); 4589 OUTB (nc_dien , 0); 4590 4591 /* 4592 ** Reset NCR chip 4593 ** Restore bios setting for automatic clock detection. 4594 */ 4595 4596 printk("%s: resetting chip\n", ncr_name(np)); 4597 ncr_chip_reset(np, 100); 4598 4599 OUTB(nc_dmode, np->sv_dmode); 4600 OUTB(nc_dcntl, np->sv_dcntl); 4601 OUTB(nc_ctest0, np->sv_ctest0); 4602 OUTB(nc_ctest3, np->sv_ctest3); 4603 OUTB(nc_ctest4, np->sv_ctest4); 4604 OUTB(nc_ctest5, np->sv_ctest5); 4605 OUTB(nc_gpcntl, np->sv_gpcntl); 4606 OUTB(nc_stest2, np->sv_stest2); 4607 4608 ncr_selectclock(np, np->sv_scntl3); 4609 4610 /* 4611 ** Free allocated ccb(s) 4612 */ 4613 4614 while ((cp=np->ccb->link_ccb) != NULL) { 4615 np->ccb->link_ccb = cp->link_ccb; 4616 if (cp->host_status) { 4617 printk("%s: shall free an active ccb (host_status=%d)\n", 4618 ncr_name(np), cp->host_status); 4619 } 4620 #ifdef DEBUG_NCR53C8XX 4621 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp); 4622 #endif 4623 m_free_dma(cp, sizeof(*cp), "CCB"); 4624 } 4625 4626 /* Free allocated tp(s) */ 4627 4628 for (target = 0; target < MAX_TARGET ; target++) { 4629 tp=&np->target[target]; 4630 for (lun = 0 ; lun < MAX_LUN ; lun++) { 4631 lp = tp->lp[lun]; 4632 if (lp) { 4633 #ifdef DEBUG_NCR53C8XX 4634 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp); 4635 #endif 4636 if (lp->jump_ccb != &lp->jump_ccb_0) 4637 m_free_dma(lp->jump_ccb,256,"JUMP_CCB"); 4638 m_free_dma(lp, sizeof(*lp), "LCB"); 4639 } 4640 } 4641 } 4642 4643 if (np->scripth0) 4644 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 4645 if (np->script0) 4646 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 4647 if (np->ccb) 4648 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 4649 m_free_dma(np, sizeof(struct ncb), "NCB"); 4650 4651 printk("%s: host resources successfully released\n", inst_name); 4652 } 4653 4654 /*========================================================== 4655 ** 4656 ** 4657 ** Complete execution of a SCSI command. 4658 ** Signal completion to the generic SCSI driver. 4659 ** 4660 ** 4661 **========================================================== 4662 */ 4663 4664 void ncr_complete (struct ncb *np, struct ccb *cp) 4665 { 4666 struct scsi_cmnd *cmd; 4667 struct tcb *tp; 4668 struct lcb *lp; 4669 4670 /* 4671 ** Sanity check 4672 */ 4673 4674 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd) 4675 return; 4676 4677 /* 4678 ** Print minimal debug information. 4679 */ 4680 4681 if (DEBUG_FLAGS & DEBUG_TINY) 4682 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp, 4683 cp->host_status,cp->scsi_status); 4684 4685 /* 4686 ** Get command, target and lun pointers. 4687 */ 4688 4689 cmd = cp->cmd; 4690 cp->cmd = NULL; 4691 tp = &np->target[cmd->device->id]; 4692 lp = tp->lp[cmd->device->lun]; 4693 4694 /* 4695 ** We donnot queue more than 1 ccb per target 4696 ** with negotiation at any time. If this ccb was 4697 ** used for negotiation, clear this info in the tcb. 4698 */ 4699 4700 if (cp == tp->nego_cp) 4701 tp->nego_cp = NULL; 4702 4703 /* 4704 ** If auto-sense performed, change scsi status. 4705 */ 4706 if (cp->auto_sense) { 4707 cp->scsi_status = cp->auto_sense; 4708 } 4709 4710 /* 4711 ** If we were recovering from queue full or performing 4712 ** auto-sense, requeue skipped CCBs to the wait queue. 4713 */ 4714 4715 if (lp && lp->held_ccb) { 4716 if (cp == lp->held_ccb) { 4717 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq); 4718 lp->held_ccb = NULL; 4719 } 4720 } 4721 4722 /* 4723 ** Check for parity errors. 4724 */ 4725 4726 if (cp->parity_status > 1) { 4727 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status); 4728 } 4729 4730 /* 4731 ** Check for extended errors. 4732 */ 4733 4734 if (cp->xerr_status != XE_OK) { 4735 switch (cp->xerr_status) { 4736 case XE_EXTRA_DATA: 4737 PRINT_ADDR(cmd, "extraneous data discarded.\n"); 4738 break; 4739 case XE_BAD_PHASE: 4740 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n"); 4741 break; 4742 default: 4743 PRINT_ADDR(cmd, "extended error %d.\n", 4744 cp->xerr_status); 4745 break; 4746 } 4747 if (cp->host_status==HS_COMPLETE) 4748 cp->host_status = HS_FAIL; 4749 } 4750 4751 /* 4752 ** Print out any error for debugging purpose. 4753 */ 4754 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4755 if (cp->host_status != HS_COMPLETE || 4756 cp->scsi_status != SAM_STAT_GOOD) { 4757 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x " 4758 "scsi_status=%x\n", cmd->cmnd[0], 4759 cp->host_status, cp->scsi_status); 4760 } 4761 } 4762 4763 /* 4764 ** Check the status. 4765 */ 4766 cmd->result = 0; 4767 if ( (cp->host_status == HS_COMPLETE) 4768 && (cp->scsi_status == SAM_STAT_GOOD || 4769 cp->scsi_status == SAM_STAT_CONDITION_MET)) { 4770 /* 4771 * All went well (GOOD status). 4772 * CONDITION MET status is returned on 4773 * `Pre-Fetch' or `Search data' success. 4774 */ 4775 set_status_byte(cmd, cp->scsi_status); 4776 4777 /* 4778 ** @RESID@ 4779 ** Could dig out the correct value for resid, 4780 ** but it would be quite complicated. 4781 */ 4782 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */ 4783 4784 /* 4785 ** Allocate the lcb if not yet. 4786 */ 4787 if (!lp) 4788 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun); 4789 4790 tp->bytes += cp->data_len; 4791 tp->transfers ++; 4792 4793 /* 4794 ** If tags was reduced due to queue full, 4795 ** increase tags if 1000 good status received. 4796 */ 4797 if (lp && lp->usetags && lp->numtags < lp->maxtags) { 4798 ++lp->num_good; 4799 if (lp->num_good >= 1000) { 4800 lp->num_good = 0; 4801 ++lp->numtags; 4802 ncr_setup_tags (np, cmd->device); 4803 } 4804 } 4805 } else if ((cp->host_status == HS_COMPLETE) 4806 && (cp->scsi_status == SAM_STAT_CHECK_CONDITION)) { 4807 /* 4808 ** Check condition code 4809 */ 4810 set_status_byte(cmd, SAM_STAT_CHECK_CONDITION); 4811 4812 /* 4813 ** Copy back sense data to caller's buffer. 4814 */ 4815 memcpy(cmd->sense_buffer, cp->sense_buf, 4816 min_t(size_t, SCSI_SENSE_BUFFERSIZE, 4817 sizeof(cp->sense_buf))); 4818 4819 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4820 u_char *p = cmd->sense_buffer; 4821 int i; 4822 PRINT_ADDR(cmd, "sense data:"); 4823 for (i=0; i<14; i++) printk (" %x", *p++); 4824 printk (".\n"); 4825 } 4826 } else if ((cp->host_status == HS_COMPLETE) 4827 && (cp->scsi_status == SAM_STAT_RESERVATION_CONFLICT)) { 4828 /* 4829 ** Reservation Conflict condition code 4830 */ 4831 set_status_byte(cmd, SAM_STAT_RESERVATION_CONFLICT); 4832 4833 } else if ((cp->host_status == HS_COMPLETE) 4834 && (cp->scsi_status == SAM_STAT_BUSY || 4835 cp->scsi_status == SAM_STAT_TASK_SET_FULL)) { 4836 4837 /* 4838 ** Target is busy. 4839 */ 4840 set_status_byte(cmd, cp->scsi_status); 4841 4842 } else if ((cp->host_status == HS_SEL_TIMEOUT) 4843 || (cp->host_status == HS_TIMEOUT)) { 4844 4845 /* 4846 ** No response 4847 */ 4848 set_status_byte(cmd, cp->scsi_status); 4849 set_host_byte(cmd, DID_TIME_OUT); 4850 4851 } else if (cp->host_status == HS_RESET) { 4852 4853 /* 4854 ** SCSI bus reset 4855 */ 4856 set_status_byte(cmd, cp->scsi_status); 4857 set_host_byte(cmd, DID_RESET); 4858 4859 } else if (cp->host_status == HS_ABORTED) { 4860 4861 /* 4862 ** Transfer aborted 4863 */ 4864 set_status_byte(cmd, cp->scsi_status); 4865 set_host_byte(cmd, DID_ABORT); 4866 4867 } else { 4868 4869 /* 4870 ** Other protocol messes 4871 */ 4872 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n", 4873 cp->host_status, cp->scsi_status, cp); 4874 4875 set_status_byte(cmd, cp->scsi_status); 4876 set_host_byte(cmd, DID_ERROR); 4877 } 4878 4879 /* 4880 ** trace output 4881 */ 4882 4883 if (tp->usrflag & UF_TRACE) { 4884 u_char * p; 4885 int i; 4886 PRINT_ADDR(cmd, " CMD:"); 4887 p = (u_char*) &cmd->cmnd[0]; 4888 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++); 4889 4890 if (cp->host_status==HS_COMPLETE) { 4891 switch (cp->scsi_status) { 4892 case SAM_STAT_GOOD: 4893 printk (" GOOD"); 4894 break; 4895 case SAM_STAT_CHECK_CONDITION: 4896 printk (" SENSE:"); 4897 p = (u_char*) &cmd->sense_buffer; 4898 for (i=0; i<14; i++) 4899 printk (" %x", *p++); 4900 break; 4901 default: 4902 printk (" STAT: %x\n", cp->scsi_status); 4903 break; 4904 } 4905 } else printk (" HOSTERROR: %x", cp->host_status); 4906 printk ("\n"); 4907 } 4908 4909 /* 4910 ** Free this ccb 4911 */ 4912 ncr_free_ccb (np, cp); 4913 4914 /* 4915 ** requeue awaiting scsi commands for this lun. 4916 */ 4917 if (lp && lp->queuedccbs < lp->queuedepth && 4918 !list_empty(&lp->wait_ccbq)) 4919 ncr_start_next_ccb(np, lp, 2); 4920 4921 /* 4922 ** requeue awaiting scsi commands for this controller. 4923 */ 4924 if (np->waiting_list) 4925 requeue_waiting_list(np); 4926 4927 /* 4928 ** signal completion to generic driver. 4929 */ 4930 ncr_queue_done_cmd(np, cmd); 4931 } 4932 4933 /*========================================================== 4934 ** 4935 ** 4936 ** Signal all (or one) control block done. 4937 ** 4938 ** 4939 **========================================================== 4940 */ 4941 4942 /* 4943 ** This CCB has been skipped by the NCR. 4944 ** Queue it in the corresponding unit queue. 4945 */ 4946 static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp) 4947 { 4948 struct tcb *tp = &np->target[cp->target]; 4949 struct lcb *lp = tp->lp[cp->lun]; 4950 4951 if (lp && cp != np->ccb) { 4952 cp->host_status &= ~HS_SKIPMASK; 4953 cp->start.schedule.l_paddr = 4954 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 4955 list_move_tail(&cp->link_ccbq, &lp->skip_ccbq); 4956 if (cp->queued) { 4957 --lp->queuedccbs; 4958 } 4959 } 4960 if (cp->queued) { 4961 --np->queuedccbs; 4962 cp->queued = 0; 4963 } 4964 } 4965 4966 /* 4967 ** The NCR has completed CCBs. 4968 ** Look at the DONE QUEUE if enabled, otherwise scan all CCBs 4969 */ 4970 void ncr_wakeup_done (struct ncb *np) 4971 { 4972 struct ccb *cp; 4973 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 4974 int i, j; 4975 4976 i = np->ccb_done_ic; 4977 while (1) { 4978 j = i+1; 4979 if (j >= MAX_DONE) 4980 j = 0; 4981 4982 cp = np->ccb_done[j]; 4983 if (!CCB_DONE_VALID(cp)) 4984 break; 4985 4986 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY; 4987 np->scripth->done_queue[5*j + 4] = 4988 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 4989 MEMORY_BARRIER(); 4990 np->scripth->done_queue[5*i + 4] = 4991 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 4992 4993 if (cp->host_status & HS_DONEMASK) 4994 ncr_complete (np, cp); 4995 else if (cp->host_status & HS_SKIPMASK) 4996 ncr_ccb_skipped (np, cp); 4997 4998 i = j; 4999 } 5000 np->ccb_done_ic = i; 5001 #else 5002 cp = np->ccb; 5003 while (cp) { 5004 if (cp->host_status & HS_DONEMASK) 5005 ncr_complete (np, cp); 5006 else if (cp->host_status & HS_SKIPMASK) 5007 ncr_ccb_skipped (np, cp); 5008 cp = cp->link_ccb; 5009 } 5010 #endif 5011 } 5012 5013 /* 5014 ** Complete all active CCBs. 5015 */ 5016 void ncr_wakeup (struct ncb *np, u_long code) 5017 { 5018 struct ccb *cp = np->ccb; 5019 5020 while (cp) { 5021 if (cp->host_status != HS_IDLE) { 5022 cp->host_status = code; 5023 ncr_complete (np, cp); 5024 } 5025 cp = cp->link_ccb; 5026 } 5027 } 5028 5029 /* 5030 ** Reset ncr chip. 5031 */ 5032 5033 /* Some initialisation must be done immediately following reset, for 53c720, 5034 * at least. EA (dcntl bit 5) isn't set here as it is set once only in 5035 * the _detect function. 5036 */ 5037 static void ncr_chip_reset(struct ncb *np, int delay) 5038 { 5039 OUTB (nc_istat, SRST); 5040 udelay(delay); 5041 OUTB (nc_istat, 0 ); 5042 5043 if (np->features & FE_EHP) 5044 OUTB (nc_ctest0, EHP); 5045 if (np->features & FE_MUX) 5046 OUTB (nc_ctest4, MUX); 5047 } 5048 5049 5050 /*========================================================== 5051 ** 5052 ** 5053 ** Start NCR chip. 5054 ** 5055 ** 5056 **========================================================== 5057 */ 5058 5059 void ncr_init (struct ncb *np, int reset, char * msg, u_long code) 5060 { 5061 int i; 5062 5063 /* 5064 ** Reset chip if asked, otherwise just clear fifos. 5065 */ 5066 5067 if (reset) { 5068 OUTB (nc_istat, SRST); 5069 udelay(100); 5070 } 5071 else { 5072 OUTB (nc_stest3, TE|CSF); 5073 OUTONB (nc_ctest3, CLF); 5074 } 5075 5076 /* 5077 ** Message. 5078 */ 5079 5080 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg); 5081 5082 /* 5083 ** Clear Start Queue 5084 */ 5085 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */ 5086 for (i = 1; i < MAX_START + MAX_START; i += 2) 5087 np->scripth0->tryloop[i] = 5088 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 5089 5090 /* 5091 ** Start at first entry. 5092 */ 5093 np->squeueput = 0; 5094 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop)); 5095 5096 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 5097 /* 5098 ** Clear Done Queue 5099 */ 5100 for (i = 0; i < MAX_DONE; i++) { 5101 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY; 5102 np->scripth0->done_queue[5*i + 4] = 5103 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5104 } 5105 #endif 5106 5107 /* 5108 ** Start at first entry. 5109 */ 5110 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue)); 5111 np->ccb_done_ic = MAX_DONE-1; 5112 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] = 5113 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5114 5115 /* 5116 ** Wakeup all pending jobs. 5117 */ 5118 ncr_wakeup (np, code); 5119 5120 /* 5121 ** Init chip. 5122 */ 5123 5124 /* 5125 ** Remove reset; big delay because the 895 needs time for the 5126 ** bus mode to settle 5127 */ 5128 ncr_chip_reset(np, 2000); 5129 5130 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0); 5131 /* full arb., ena parity, par->ATN */ 5132 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ 5133 5134 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 5135 5136 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ 5137 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */ 5138 OUTB (nc_istat , SIGP ); /* Signal Process */ 5139 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */ 5140 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ 5141 5142 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ 5143 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */ 5144 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */ 5145 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */ 5146 5147 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */ 5148 OUTB (nc_stest3, TE); /* TolerANT enable */ 5149 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */ 5150 5151 /* 5152 ** Disable disconnects. 5153 */ 5154 5155 np->disc = 0; 5156 5157 /* 5158 ** Enable GPIO0 pin for writing if LED support. 5159 */ 5160 5161 if (np->features & FE_LED0) { 5162 OUTOFFB (nc_gpcntl, 0x01); 5163 } 5164 5165 /* 5166 ** enable ints 5167 */ 5168 5169 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); 5170 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 5171 5172 /* 5173 ** Fill in target structure. 5174 ** Reinitialize usrsync. 5175 ** Reinitialize usrwide. 5176 ** Prepare sync negotiation according to actual SCSI bus mode. 5177 */ 5178 5179 for (i=0;i<MAX_TARGET;i++) { 5180 struct tcb *tp = &np->target[i]; 5181 5182 tp->sval = 0; 5183 tp->wval = np->rv_scntl3; 5184 5185 if (tp->usrsync != 255) { 5186 if (tp->usrsync <= np->maxsync) { 5187 if (tp->usrsync < np->minsync) { 5188 tp->usrsync = np->minsync; 5189 } 5190 } 5191 else 5192 tp->usrsync = 255; 5193 } 5194 5195 if (tp->usrwide > np->maxwide) 5196 tp->usrwide = np->maxwide; 5197 5198 } 5199 5200 /* 5201 ** Start script processor. 5202 */ 5203 if (np->paddr2) { 5204 if (bootverbose) 5205 printk ("%s: Downloading SCSI SCRIPTS.\n", 5206 ncr_name(np)); 5207 OUTL (nc_scratcha, vtobus(np->script0)); 5208 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram)); 5209 } 5210 else 5211 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 5212 } 5213 5214 /*========================================================== 5215 ** 5216 ** Prepare the negotiation values for wide and 5217 ** synchronous transfers. 5218 ** 5219 **========================================================== 5220 */ 5221 5222 static void ncr_negotiate (struct ncb* np, struct tcb* tp) 5223 { 5224 /* 5225 ** minsync unit is 4ns ! 5226 */ 5227 5228 u_long minsync = tp->usrsync; 5229 5230 /* 5231 ** SCSI bus mode limit 5232 */ 5233 5234 if (np->scsi_mode && np->scsi_mode == SMODE_SE) { 5235 if (minsync < 12) minsync = 12; 5236 } 5237 5238 /* 5239 ** our limit .. 5240 */ 5241 5242 if (minsync < np->minsync) 5243 minsync = np->minsync; 5244 5245 /* 5246 ** divider limit 5247 */ 5248 5249 if (minsync > np->maxsync) 5250 minsync = 255; 5251 5252 if (tp->maxoffs > np->maxoffs) 5253 tp->maxoffs = np->maxoffs; 5254 5255 tp->minsync = minsync; 5256 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0); 5257 5258 /* 5259 ** period=0: has to negotiate sync transfer 5260 */ 5261 5262 tp->period=0; 5263 5264 /* 5265 ** widedone=0: has to negotiate wide transfer 5266 */ 5267 tp->widedone=0; 5268 } 5269 5270 /*========================================================== 5271 ** 5272 ** Get clock factor and sync divisor for a given 5273 ** synchronous factor period. 5274 ** Returns the clock factor (in sxfer) and scntl3 5275 ** synchronous divisor field. 5276 ** 5277 **========================================================== 5278 */ 5279 5280 static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p) 5281 { 5282 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 5283 int div = np->clock_divn; /* Number of divisors supported */ 5284 u_long fak; /* Sync factor in sxfer */ 5285 u_long per; /* Period in tenths of ns */ 5286 u_long kpc; /* (per * clk) */ 5287 5288 /* 5289 ** Compute the synchronous period in tenths of nano-seconds 5290 */ 5291 if (sfac <= 10) per = 250; 5292 else if (sfac == 11) per = 303; 5293 else if (sfac == 12) per = 500; 5294 else per = 40 * sfac; 5295 5296 /* 5297 ** Look for the greatest clock divisor that allows an 5298 ** input speed faster than the period. 5299 */ 5300 kpc = per * clk; 5301 while (--div > 0) 5302 if (kpc >= (div_10M[div] << 2)) break; 5303 5304 /* 5305 ** Calculate the lowest clock factor that allows an output 5306 ** speed not faster than the period. 5307 */ 5308 fak = (kpc - 1) / div_10M[div] + 1; 5309 5310 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 5311 5312 /* 5313 ** Compute and return sync parameters for the ncr 5314 */ 5315 *fakp = fak - 4; 5316 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 5317 } 5318 5319 5320 /*========================================================== 5321 ** 5322 ** Set actual values, sync status and patch all ccbs of 5323 ** a target according to new sync/wide agreement. 5324 ** 5325 **========================================================== 5326 */ 5327 5328 static void ncr_set_sync_wide_status (struct ncb *np, u_char target) 5329 { 5330 struct ccb *cp; 5331 struct tcb *tp = &np->target[target]; 5332 5333 /* 5334 ** set actual value and sync_status 5335 */ 5336 OUTB (nc_sxfer, tp->sval); 5337 np->sync_st = tp->sval; 5338 OUTB (nc_scntl3, tp->wval); 5339 np->wide_st = tp->wval; 5340 5341 /* 5342 ** patch ALL ccbs of this target. 5343 */ 5344 for (cp = np->ccb; cp; cp = cp->link_ccb) { 5345 if (!cp->cmd) continue; 5346 if (scmd_id(cp->cmd) != target) continue; 5347 cp->phys.select.sel_scntl3 = tp->wval; 5348 cp->phys.select.sel_sxfer = tp->sval; 5349 } 5350 } 5351 5352 /*========================================================== 5353 ** 5354 ** Switch sync mode for current job and it's target 5355 ** 5356 **========================================================== 5357 */ 5358 5359 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer) 5360 { 5361 struct scsi_cmnd *cmd = cp->cmd; 5362 struct tcb *tp; 5363 u_char target = INB (nc_sdid) & 0x0f; 5364 u_char idiv; 5365 5366 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5367 5368 tp = &np->target[target]; 5369 5370 if (!scntl3 || !(sxfer & 0x1f)) 5371 scntl3 = np->rv_scntl3; 5372 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); 5373 5374 /* 5375 ** Deduce the value of controller sync period from scntl3. 5376 ** period is in tenths of nano-seconds. 5377 */ 5378 5379 idiv = ((scntl3 >> 4) & 0x7); 5380 if ((sxfer & 0x1f) && idiv) 5381 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; 5382 else 5383 tp->period = 0xffff; 5384 5385 /* Stop there if sync parameters are unchanged */ 5386 if (tp->sval == sxfer && tp->wval == scntl3) 5387 return; 5388 tp->sval = sxfer; 5389 tp->wval = scntl3; 5390 5391 if (sxfer & 0x01f) { 5392 /* Disable extended Sreq/Sack filtering */ 5393 if (tp->period <= 2000) 5394 OUTOFFB(nc_stest2, EXT); 5395 } 5396 5397 spi_display_xfer_agreement(tp->starget); 5398 5399 /* 5400 ** set actual value and sync_status 5401 ** patch ALL ccbs of this target. 5402 */ 5403 ncr_set_sync_wide_status(np, target); 5404 } 5405 5406 /*========================================================== 5407 ** 5408 ** Switch wide mode for current job and it's target 5409 ** SCSI specs say: a SCSI device that accepts a WDTR 5410 ** message shall reset the synchronous agreement to 5411 ** asynchronous mode. 5412 ** 5413 **========================================================== 5414 */ 5415 5416 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack) 5417 { 5418 struct scsi_cmnd *cmd = cp->cmd; 5419 u16 target = INB (nc_sdid) & 0x0f; 5420 struct tcb *tp; 5421 u_char scntl3; 5422 u_char sxfer; 5423 5424 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5425 5426 tp = &np->target[target]; 5427 tp->widedone = wide+1; 5428 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); 5429 5430 sxfer = ack ? 0 : tp->sval; 5431 5432 /* 5433 ** Stop there if sync/wide parameters are unchanged 5434 */ 5435 if (tp->sval == sxfer && tp->wval == scntl3) return; 5436 tp->sval = sxfer; 5437 tp->wval = scntl3; 5438 5439 /* 5440 ** Bells and whistles ;-) 5441 */ 5442 if (bootverbose >= 2) { 5443 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n", 5444 (scntl3 & EWS) ? "en" : "dis"); 5445 } 5446 5447 /* 5448 ** set actual value and sync_status 5449 ** patch ALL ccbs of this target. 5450 */ 5451 ncr_set_sync_wide_status(np, target); 5452 } 5453 5454 /*========================================================== 5455 ** 5456 ** Switch tagged mode for a target. 5457 ** 5458 **========================================================== 5459 */ 5460 5461 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev) 5462 { 5463 unsigned char tn = sdev->id, ln = sdev->lun; 5464 struct tcb *tp = &np->target[tn]; 5465 struct lcb *lp = tp->lp[ln]; 5466 u_char reqtags, maxdepth; 5467 5468 /* 5469 ** Just in case ... 5470 */ 5471 if ((!tp) || (!lp) || !sdev) 5472 return; 5473 5474 /* 5475 ** If SCSI device queue depth is not yet set, leave here. 5476 */ 5477 if (!lp->scdev_depth) 5478 return; 5479 5480 /* 5481 ** Donnot allow more tags than the SCSI driver can queue 5482 ** for this device. 5483 ** Donnot allow more tags than we can handle. 5484 */ 5485 maxdepth = lp->scdev_depth; 5486 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs; 5487 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth; 5488 if (lp->numtags > maxdepth) lp->numtags = maxdepth; 5489 5490 /* 5491 ** only devices conformant to ANSI Version >= 2 5492 ** only devices capable of tagged commands 5493 ** only if enabled by user .. 5494 */ 5495 if (sdev->tagged_supported && lp->numtags > 1) { 5496 reqtags = lp->numtags; 5497 } else { 5498 reqtags = 1; 5499 } 5500 5501 /* 5502 ** Update max number of tags 5503 */ 5504 lp->numtags = reqtags; 5505 if (lp->numtags > lp->maxtags) 5506 lp->maxtags = lp->numtags; 5507 5508 /* 5509 ** If we want to switch tag mode, we must wait 5510 ** for no CCB to be active. 5511 */ 5512 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */ 5513 if (lp->queuedepth == reqtags) /* Already announced */ 5514 return; 5515 lp->queuedepth = reqtags; 5516 } 5517 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */ 5518 lp->queuedepth = reqtags; 5519 return; 5520 } 5521 else { /* Want to switch tag mode */ 5522 if (lp->busyccbs) /* If not yet safe, return */ 5523 return; 5524 lp->queuedepth = reqtags; 5525 lp->usetags = reqtags > 1 ? 1 : 0; 5526 } 5527 5528 /* 5529 ** Patch the lun mini-script, according to tag mode. 5530 */ 5531 lp->jump_tag.l_paddr = lp->usetags? 5532 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) : 5533 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag)); 5534 5535 /* 5536 ** Announce change to user. 5537 */ 5538 if (bootverbose) { 5539 if (lp->usetags) { 5540 dev_info(&sdev->sdev_gendev, 5541 "tagged command queue depth set to %d\n", 5542 reqtags); 5543 } else { 5544 dev_info(&sdev->sdev_gendev, 5545 "tagged command queueing disabled\n"); 5546 } 5547 } 5548 } 5549 5550 /*========================================================== 5551 ** 5552 ** 5553 ** ncr timeout handler. 5554 ** 5555 ** 5556 **========================================================== 5557 ** 5558 ** Misused to keep the driver running when 5559 ** interrupts are not configured correctly. 5560 ** 5561 **---------------------------------------------------------- 5562 */ 5563 5564 static void ncr_timeout (struct ncb *np) 5565 { 5566 u_long thistime = jiffies; 5567 5568 /* 5569 ** If release process in progress, let's go 5570 ** Set the release stage from 1 to 2 to synchronize 5571 ** with the release process. 5572 */ 5573 5574 if (np->release_stage) { 5575 if (np->release_stage == 1) np->release_stage = 2; 5576 return; 5577 } 5578 5579 np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL; 5580 add_timer(&np->timer); 5581 5582 /* 5583 ** If we are resetting the ncr, wait for settle_time before 5584 ** clearing it. Then command processing will be resumed. 5585 */ 5586 if (np->settle_time) { 5587 if (np->settle_time <= thistime) { 5588 if (bootverbose > 1) 5589 printk("%s: command processing resumed\n", ncr_name(np)); 5590 np->settle_time = 0; 5591 np->disc = 1; 5592 requeue_waiting_list(np); 5593 } 5594 return; 5595 } 5596 5597 /* 5598 ** Since the generic scsi driver only allows us 0.5 second 5599 ** to perform abort of a command, we must look at ccbs about 5600 ** every 0.25 second. 5601 */ 5602 if (np->lasttime + 4*HZ < thistime) { 5603 /* 5604 ** block ncr interrupts 5605 */ 5606 np->lasttime = thistime; 5607 } 5608 5609 #ifdef SCSI_NCR_BROKEN_INTR 5610 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5611 5612 /* 5613 ** Process pending interrupts. 5614 */ 5615 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{"); 5616 ncr_exception (np); 5617 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}"); 5618 } 5619 #endif /* SCSI_NCR_BROKEN_INTR */ 5620 } 5621 5622 /*========================================================== 5623 ** 5624 ** log message for real hard errors 5625 ** 5626 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." 5627 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5628 ** 5629 ** exception register: 5630 ** ds: dstat 5631 ** si: sist 5632 ** 5633 ** SCSI bus lines: 5634 ** so: control lines as driver by NCR. 5635 ** si: control lines as seen by NCR. 5636 ** sd: scsi data lines as seen by NCR. 5637 ** 5638 ** wide/fastmode: 5639 ** sxfer: (see the manual) 5640 ** scntl3: (see the manual) 5641 ** 5642 ** current script command: 5643 ** dsp: script address (relative to start of script). 5644 ** dbc: first word of script command. 5645 ** 5646 ** First 16 register of the chip: 5647 ** r0..rf 5648 ** 5649 **========================================================== 5650 */ 5651 5652 static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat) 5653 { 5654 u32 dsp; 5655 int script_ofs; 5656 int script_size; 5657 char *script_name; 5658 u_char *script_base; 5659 int i; 5660 5661 dsp = INL (nc_dsp); 5662 5663 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) { 5664 script_ofs = dsp - np->p_script; 5665 script_size = sizeof(struct script); 5666 script_base = (u_char *) np->script0; 5667 script_name = "script"; 5668 } 5669 else if (np->p_scripth < dsp && 5670 dsp <= np->p_scripth + sizeof(struct scripth)) { 5671 script_ofs = dsp - np->p_scripth; 5672 script_size = sizeof(struct scripth); 5673 script_base = (u_char *) np->scripth0; 5674 script_name = "scripth"; 5675 } else { 5676 script_ofs = dsp; 5677 script_size = 0; 5678 script_base = NULL; 5679 script_name = "mem"; 5680 } 5681 5682 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", 5683 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, 5684 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), 5685 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, 5686 (unsigned)INL (nc_dbc)); 5687 5688 if (((script_ofs & 3) == 0) && 5689 (unsigned)script_ofs < script_size) { 5690 printk ("%s: script cmd = %08x\n", ncr_name(np), 5691 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs))); 5692 } 5693 5694 printk ("%s: regdump:", ncr_name(np)); 5695 for (i=0; i<16;i++) 5696 printk (" %02x", (unsigned)INB_OFF(i)); 5697 printk (".\n"); 5698 } 5699 5700 /*============================================================ 5701 ** 5702 ** ncr chip exception handler. 5703 ** 5704 **============================================================ 5705 ** 5706 ** In normal cases, interrupt conditions occur one at a 5707 ** time. The ncr is able to stack in some extra registers 5708 ** other interrupts that will occur after the first one. 5709 ** But, several interrupts may occur at the same time. 5710 ** 5711 ** We probably should only try to deal with the normal 5712 ** case, but it seems that multiple interrupts occur in 5713 ** some cases that are not abnormal at all. 5714 ** 5715 ** The most frequent interrupt condition is Phase Mismatch. 5716 ** We should want to service this interrupt quickly. 5717 ** A SCSI parity error may be delivered at the same time. 5718 ** The SIR interrupt is not very frequent in this driver, 5719 ** since the INTFLY is likely used for command completion 5720 ** signaling. 5721 ** The Selection Timeout interrupt may be triggered with 5722 ** IID and/or UDC. 5723 ** The SBMC interrupt (SCSI Bus Mode Change) may probably 5724 ** occur at any time. 5725 ** 5726 ** This handler try to deal as cleverly as possible with all 5727 ** the above. 5728 ** 5729 **============================================================ 5730 */ 5731 5732 void ncr_exception (struct ncb *np) 5733 { 5734 u_char istat, dstat; 5735 u16 sist; 5736 int i; 5737 5738 /* 5739 ** interrupt on the fly ? 5740 ** Since the global header may be copied back to a CCB 5741 ** using a posted PCI memory write, the last operation on 5742 ** the istat register is a READ in order to flush posted 5743 ** PCI write commands. 5744 */ 5745 istat = INB (nc_istat); 5746 if (istat & INTF) { 5747 OUTB (nc_istat, (istat & SIGP) | INTF); 5748 istat = INB (nc_istat); 5749 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F "); 5750 ncr_wakeup_done (np); 5751 } 5752 5753 if (!(istat & (SIP|DIP))) 5754 return; 5755 5756 if (istat & CABRT) 5757 OUTB (nc_istat, CABRT); 5758 5759 /* 5760 ** Steinbach's Guideline for Systems Programming: 5761 ** Never test for an error condition you don't know how to handle. 5762 */ 5763 5764 sist = (istat & SIP) ? INW (nc_sist) : 0; 5765 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5766 5767 if (DEBUG_FLAGS & DEBUG_TINY) 5768 printk ("<%d|%x:%x|%x:%x>", 5769 (int)INB(nc_scr0), 5770 dstat,sist, 5771 (unsigned)INL(nc_dsp), 5772 (unsigned)INL(nc_dbc)); 5773 5774 /*======================================================== 5775 ** First, interrupts we want to service cleanly. 5776 ** 5777 ** Phase mismatch is the most frequent interrupt, and 5778 ** so we have to service it as quickly and as cleanly 5779 ** as possible. 5780 ** Programmed interrupts are rarely used in this driver, 5781 ** but we must handle them cleanly anyway. 5782 ** We try to deal with PAR and SBMC combined with 5783 ** some other interrupt(s). 5784 **========================================================= 5785 */ 5786 5787 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) && 5788 !(dstat & (MDPE|BF|ABRT|IID))) { 5789 if ((sist & SBMC) && ncr_int_sbmc (np)) 5790 return; 5791 if ((sist & PAR) && ncr_int_par (np)) 5792 return; 5793 if (sist & MA) { 5794 ncr_int_ma (np); 5795 return; 5796 } 5797 if (dstat & SIR) { 5798 ncr_int_sir (np); 5799 return; 5800 } 5801 /* 5802 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2. 5803 */ 5804 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { 5805 printk( "%s: unknown interrupt(s) ignored, " 5806 "ISTAT=%x DSTAT=%x SIST=%x\n", 5807 ncr_name(np), istat, dstat, sist); 5808 return; 5809 } 5810 OUTONB_STD (); 5811 return; 5812 } 5813 5814 /*======================================================== 5815 ** Now, interrupts that need some fixing up. 5816 ** Order and multiple interrupts is so less important. 5817 ** 5818 ** If SRST has been asserted, we just reset the chip. 5819 ** 5820 ** Selection is intirely handled by the chip. If the 5821 ** chip says STO, we trust it. Seems some other 5822 ** interrupts may occur at the same time (UDC, IID), so 5823 ** we ignore them. In any case we do enough fix-up 5824 ** in the service routine. 5825 ** We just exclude some fatal dma errors. 5826 **========================================================= 5827 */ 5828 5829 if (sist & RST) { 5830 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET); 5831 return; 5832 } 5833 5834 if ((sist & STO) && 5835 !(dstat & (MDPE|BF|ABRT))) { 5836 /* 5837 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1. 5838 */ 5839 OUTONB (nc_ctest3, CLF); 5840 5841 ncr_int_sto (np); 5842 return; 5843 } 5844 5845 /*========================================================= 5846 ** Now, interrupts we are not able to recover cleanly. 5847 ** (At least for the moment). 5848 ** 5849 ** Do the register dump. 5850 ** Log message for real hard errors. 5851 ** Clear all fifos. 5852 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the 5853 ** BUS and the chip. 5854 ** We are more soft for UDC. 5855 **========================================================= 5856 */ 5857 5858 if (time_after(jiffies, np->regtime)) { 5859 np->regtime = jiffies + 10*HZ; 5860 for (i = 0; i<sizeof(np->regdump); i++) 5861 ((char*)&np->regdump)[i] = INB_OFF(i); 5862 np->regdump.nc_dstat = dstat; 5863 np->regdump.nc_sist = sist; 5864 } 5865 5866 ncr_log_hard_error(np, sist, dstat); 5867 5868 printk ("%s: have to clear fifos.\n", ncr_name (np)); 5869 OUTB (nc_stest3, TE|CSF); 5870 OUTONB (nc_ctest3, CLF); 5871 5872 if ((sist & (SGE)) || 5873 (dstat & (MDPE|BF|ABRT|IID))) { 5874 ncr_start_reset(np); 5875 return; 5876 } 5877 5878 if (sist & HTH) { 5879 printk ("%s: handshake timeout\n", ncr_name(np)); 5880 ncr_start_reset(np); 5881 return; 5882 } 5883 5884 if (sist & UDC) { 5885 printk ("%s: unexpected disconnect\n", ncr_name(np)); 5886 OUTB (HS_PRT, HS_UNEXPECTED); 5887 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup)); 5888 return; 5889 } 5890 5891 /*========================================================= 5892 ** We just miss the cause of the interrupt. :( 5893 ** Print a message. The timeout will do the real work. 5894 **========================================================= 5895 */ 5896 printk ("%s: unknown interrupt\n", ncr_name(np)); 5897 } 5898 5899 /*========================================================== 5900 ** 5901 ** ncr chip exception handler for selection timeout 5902 ** 5903 **========================================================== 5904 ** 5905 ** There seems to be a bug in the 53c810. 5906 ** Although a STO-Interrupt is pending, 5907 ** it continues executing script commands. 5908 ** But it will fail and interrupt (IID) on 5909 ** the next instruction where it's looking 5910 ** for a valid phase. 5911 ** 5912 **---------------------------------------------------------- 5913 */ 5914 5915 void ncr_int_sto (struct ncb *np) 5916 { 5917 u_long dsa; 5918 struct ccb *cp; 5919 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T"); 5920 5921 /* 5922 ** look for ccb and set the status. 5923 */ 5924 5925 dsa = INL (nc_dsa); 5926 cp = np->ccb; 5927 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5928 cp = cp->link_ccb; 5929 5930 if (cp) { 5931 cp-> host_status = HS_SEL_TIMEOUT; 5932 ncr_complete (np, cp); 5933 } 5934 5935 /* 5936 ** repair start queue and jump to start point. 5937 */ 5938 5939 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart)); 5940 return; 5941 } 5942 5943 /*========================================================== 5944 ** 5945 ** ncr chip exception handler for SCSI bus mode change 5946 ** 5947 **========================================================== 5948 ** 5949 ** spi2-r12 11.2.3 says a transceiver mode change must 5950 ** generate a reset event and a device that detects a reset 5951 ** event shall initiate a hard reset. It says also that a 5952 ** device that detects a mode change shall set data transfer 5953 ** mode to eight bit asynchronous, etc... 5954 ** So, just resetting should be enough. 5955 ** 5956 ** 5957 **---------------------------------------------------------- 5958 */ 5959 5960 static int ncr_int_sbmc (struct ncb *np) 5961 { 5962 u_char scsi_mode = INB (nc_stest4) & SMODE; 5963 5964 if (scsi_mode != np->scsi_mode) { 5965 printk("%s: SCSI bus mode change from %x to %x.\n", 5966 ncr_name(np), np->scsi_mode, scsi_mode); 5967 5968 np->scsi_mode = scsi_mode; 5969 5970 5971 /* 5972 ** Suspend command processing for 1 second and 5973 ** reinitialize all except the chip. 5974 */ 5975 np->settle_time = jiffies + HZ; 5976 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET); 5977 return 1; 5978 } 5979 return 0; 5980 } 5981 5982 /*========================================================== 5983 ** 5984 ** ncr chip exception handler for SCSI parity error. 5985 ** 5986 **========================================================== 5987 ** 5988 ** 5989 **---------------------------------------------------------- 5990 */ 5991 5992 static int ncr_int_par (struct ncb *np) 5993 { 5994 u_char hsts = INB (HS_PRT); 5995 u32 dbc = INL (nc_dbc); 5996 u_char sstat1 = INB (nc_sstat1); 5997 int phase = -1; 5998 int msg = -1; 5999 u32 jmp; 6000 6001 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n", 6002 ncr_name(np), hsts, dbc, sstat1); 6003 6004 /* 6005 * Ignore the interrupt if the NCR is not connected 6006 * to the SCSI bus, since the right work should have 6007 * been done on unexpected disconnection handling. 6008 */ 6009 if (!(INB (nc_scntl1) & ISCON)) 6010 return 0; 6011 6012 /* 6013 * If the nexus is not clearly identified, reset the bus. 6014 * We will try to do better later. 6015 */ 6016 if (hsts & HS_INVALMASK) 6017 goto reset_all; 6018 6019 /* 6020 * If the SCSI parity error occurs in MSG IN phase, prepare a 6021 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED 6022 * ERROR message and let the device decide to retry the command 6023 * or to terminate with check condition. If we were in MSG IN 6024 * phase waiting for the response of a negotiation, we will 6025 * get SIR_NEGO_FAILED at dispatch. 6026 */ 6027 if (!(dbc & 0xc0000000)) 6028 phase = (dbc >> 24) & 7; 6029 if (phase == 7) 6030 msg = MSG_PARITY_ERROR; 6031 else 6032 msg = INITIATOR_ERROR; 6033 6034 6035 /* 6036 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a 6037 * script that will ignore all data in bytes until phase 6038 * change, since we are not sure the chip will wait the phase 6039 * change prior to delivering the interrupt. 6040 */ 6041 if (phase == 1) 6042 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in); 6043 else 6044 jmp = NCB_SCRIPTH_PHYS (np, par_err_other); 6045 6046 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6047 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6048 6049 np->msgout[0] = msg; 6050 OUTL_DSP (jmp); 6051 return 1; 6052 6053 reset_all: 6054 ncr_start_reset(np); 6055 return 1; 6056 } 6057 6058 /*========================================================== 6059 ** 6060 ** 6061 ** ncr chip exception handler for phase errors. 6062 ** 6063 ** 6064 **========================================================== 6065 ** 6066 ** We have to construct a new transfer descriptor, 6067 ** to transfer the rest of the current block. 6068 ** 6069 **---------------------------------------------------------- 6070 */ 6071 6072 static void ncr_int_ma (struct ncb *np) 6073 { 6074 u32 dbc; 6075 u32 rest; 6076 u32 dsp; 6077 u32 dsa; 6078 u32 nxtdsp; 6079 u32 newtmp; 6080 u32 *vdsp; 6081 u32 oadr, olen; 6082 u32 *tblp; 6083 ncrcmd *newcmd; 6084 u_char cmd, sbcl; 6085 struct ccb *cp; 6086 6087 dsp = INL (nc_dsp); 6088 dbc = INL (nc_dbc); 6089 sbcl = INB (nc_sbcl); 6090 6091 cmd = dbc >> 24; 6092 rest = dbc & 0xffffff; 6093 6094 /* 6095 ** Take into account dma fifo and various buffers and latches, 6096 ** only if the interrupted phase is an OUTPUT phase. 6097 */ 6098 6099 if ((cmd & 1) == 0) { 6100 u_char ctest5, ss0, ss2; 6101 u16 delta; 6102 6103 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 6104 if (ctest5 & DFS) 6105 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 6106 else 6107 delta=(INB (nc_dfifo) - rest) & 0x7f; 6108 6109 /* 6110 ** The data in the dma fifo has not been transferred to 6111 ** the target -> add the amount to the rest 6112 ** and clear the data. 6113 ** Check the sstat2 register in case of wide transfer. 6114 */ 6115 6116 rest += delta; 6117 ss0 = INB (nc_sstat0); 6118 if (ss0 & OLF) rest++; 6119 if (ss0 & ORF) rest++; 6120 if (INB(nc_scntl3) & EWS) { 6121 ss2 = INB (nc_sstat2); 6122 if (ss2 & OLF1) rest++; 6123 if (ss2 & ORF1) rest++; 6124 } 6125 6126 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6127 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7, 6128 (unsigned) rest, (unsigned) delta, ss0); 6129 6130 } else { 6131 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6132 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest); 6133 } 6134 6135 /* 6136 ** Clear fifos. 6137 */ 6138 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6139 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6140 6141 /* 6142 ** locate matching cp. 6143 ** if the interrupted phase is DATA IN or DATA OUT, 6144 ** trust the global header. 6145 */ 6146 dsa = INL (nc_dsa); 6147 if (!(cmd & 6)) { 6148 cp = np->header.cp; 6149 if (CCB_PHYS(cp, phys) != dsa) 6150 cp = NULL; 6151 } else { 6152 cp = np->ccb; 6153 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6154 cp = cp->link_ccb; 6155 } 6156 6157 /* 6158 ** try to find the interrupted script command, 6159 ** and the address at which to continue. 6160 */ 6161 vdsp = NULL; 6162 nxtdsp = 0; 6163 if (dsp > np->p_script && 6164 dsp <= np->p_script + sizeof(struct script)) { 6165 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8)); 6166 nxtdsp = dsp; 6167 } 6168 else if (dsp > np->p_scripth && 6169 dsp <= np->p_scripth + sizeof(struct scripth)) { 6170 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); 6171 nxtdsp = dsp; 6172 } 6173 else if (cp) { 6174 if (dsp == CCB_PHYS (cp, patch[2])) { 6175 vdsp = &cp->patch[0]; 6176 nxtdsp = scr_to_cpu(vdsp[3]); 6177 } 6178 else if (dsp == CCB_PHYS (cp, patch[6])) { 6179 vdsp = &cp->patch[4]; 6180 nxtdsp = scr_to_cpu(vdsp[3]); 6181 } 6182 } 6183 6184 /* 6185 ** log the information 6186 */ 6187 6188 if (DEBUG_FLAGS & DEBUG_PHASE) { 6189 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 6190 cp, np->header.cp, 6191 (unsigned)dsp, 6192 (unsigned)nxtdsp, vdsp, cmd); 6193 } 6194 6195 /* 6196 ** cp=0 means that the DSA does not point to a valid control 6197 ** block. This should not happen since we donnot use multi-byte 6198 ** move while we are being reselected ot after command complete. 6199 ** We are not able to recover from such a phase error. 6200 */ 6201 if (!cp) { 6202 printk ("%s: SCSI phase error fixup: " 6203 "CCB already dequeued (0x%08lx)\n", 6204 ncr_name (np), (u_long) np->header.cp); 6205 goto reset_all; 6206 } 6207 6208 /* 6209 ** get old startaddress and old length. 6210 */ 6211 6212 oadr = scr_to_cpu(vdsp[1]); 6213 6214 if (cmd & 0x10) { /* Table indirect */ 6215 tblp = (u32 *) ((char*) &cp->phys + oadr); 6216 olen = scr_to_cpu(tblp[0]); 6217 oadr = scr_to_cpu(tblp[1]); 6218 } else { 6219 tblp = (u32 *) 0; 6220 olen = scr_to_cpu(vdsp[0]) & 0xffffff; 6221 } 6222 6223 if (DEBUG_FLAGS & DEBUG_PHASE) { 6224 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", 6225 (unsigned) (scr_to_cpu(vdsp[0]) >> 24), 6226 tblp, 6227 (unsigned) olen, 6228 (unsigned) oadr); 6229 } 6230 6231 /* 6232 ** check cmd against assumed interrupted script command. 6233 */ 6234 6235 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) { 6236 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] " 6237 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24); 6238 6239 goto reset_all; 6240 } 6241 6242 /* 6243 ** cp != np->header.cp means that the header of the CCB 6244 ** currently being processed has not yet been copied to 6245 ** the global header area. That may happen if the device did 6246 ** not accept all our messages after having been selected. 6247 */ 6248 if (cp != np->header.cp) { 6249 printk ("%s: SCSI phase error fixup: " 6250 "CCB address mismatch (0x%08lx != 0x%08lx)\n", 6251 ncr_name (np), (u_long) cp, (u_long) np->header.cp); 6252 } 6253 6254 /* 6255 ** if old phase not dataphase, leave here. 6256 */ 6257 6258 if (cmd & 0x06) { 6259 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n", 6260 cmd&7, sbcl&7, (unsigned)olen, 6261 (unsigned)oadr, (unsigned)rest); 6262 goto unexpected_phase; 6263 } 6264 6265 /* 6266 ** choose the correct patch area. 6267 ** if savep points to one, choose the other. 6268 */ 6269 6270 newcmd = cp->patch; 6271 newtmp = CCB_PHYS (cp, patch); 6272 if (newtmp == scr_to_cpu(cp->phys.header.savep)) { 6273 newcmd = &cp->patch[4]; 6274 newtmp = CCB_PHYS (cp, patch[4]); 6275 } 6276 6277 /* 6278 ** fillin the commands 6279 */ 6280 6281 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest); 6282 newcmd[1] = cpu_to_scr(oadr + olen - rest); 6283 newcmd[2] = cpu_to_scr(SCR_JUMP); 6284 newcmd[3] = cpu_to_scr(nxtdsp); 6285 6286 if (DEBUG_FLAGS & DEBUG_PHASE) { 6287 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n", 6288 (int) (newcmd - cp->patch), 6289 (unsigned)scr_to_cpu(newcmd[0]), 6290 (unsigned)scr_to_cpu(newcmd[1]), 6291 (unsigned)scr_to_cpu(newcmd[2]), 6292 (unsigned)scr_to_cpu(newcmd[3])); 6293 } 6294 /* 6295 ** fake the return address (to the patch). 6296 ** and restart script processor at dispatcher. 6297 */ 6298 OUTL (nc_temp, newtmp); 6299 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch)); 6300 return; 6301 6302 /* 6303 ** Unexpected phase changes that occurs when the current phase 6304 ** is not a DATA IN or DATA OUT phase are due to error conditions. 6305 ** Such event may only happen when the SCRIPTS is using a 6306 ** multibyte SCSI MOVE. 6307 ** 6308 ** Phase change Some possible cause 6309 ** 6310 ** COMMAND --> MSG IN SCSI parity error detected by target. 6311 ** COMMAND --> STATUS Bad command or refused by target. 6312 ** MSG OUT --> MSG IN Message rejected by target. 6313 ** MSG OUT --> COMMAND Bogus target that discards extended 6314 ** negotiation messages. 6315 ** 6316 ** The code below does not care of the new phase and so 6317 ** trusts the target. Why to annoy it ? 6318 ** If the interrupted phase is COMMAND phase, we restart at 6319 ** dispatcher. 6320 ** If a target does not get all the messages after selection, 6321 ** the code assumes blindly that the target discards extended 6322 ** messages and clears the negotiation status. 6323 ** If the target does not want all our response to negotiation, 6324 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids 6325 ** bloat for such a should_not_happen situation). 6326 ** In all other situation, we reset the BUS. 6327 ** Are these assumptions reasonable ? (Wait and see ...) 6328 */ 6329 unexpected_phase: 6330 dsp -= 8; 6331 nxtdsp = 0; 6332 6333 switch (cmd & 7) { 6334 case 2: /* COMMAND phase */ 6335 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); 6336 break; 6337 #if 0 6338 case 3: /* STATUS phase */ 6339 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); 6340 break; 6341 #endif 6342 case 6: /* MSG OUT phase */ 6343 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8); 6344 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) { 6345 cp->host_status = HS_BUSY; 6346 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on); 6347 } 6348 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) || 6349 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) { 6350 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase); 6351 } 6352 break; 6353 #if 0 6354 case 7: /* MSG IN phase */ 6355 nxtdsp = NCB_SCRIPT_PHYS (np, clrack); 6356 break; 6357 #endif 6358 } 6359 6360 if (nxtdsp) { 6361 OUTL_DSP (nxtdsp); 6362 return; 6363 } 6364 6365 reset_all: 6366 ncr_start_reset(np); 6367 } 6368 6369 6370 static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp) 6371 { 6372 struct scsi_cmnd *cmd = cp->cmd; 6373 struct tcb *tp = &np->target[cmd->device->id]; 6374 struct lcb *lp = tp->lp[cmd->device->lun]; 6375 struct list_head *qp; 6376 struct ccb * cp2; 6377 int disc_cnt = 0; 6378 int busy_cnt = 0; 6379 u32 startp; 6380 u_char s_status = INB (SS_PRT); 6381 6382 /* 6383 ** Let the SCRIPTS processor skip all not yet started CCBs, 6384 ** and count disconnected CCBs. Since the busy queue is in 6385 ** the same order as the chip start queue, disconnected CCBs 6386 ** are before cp and busy ones after. 6387 */ 6388 if (lp) { 6389 qp = lp->busy_ccbq.prev; 6390 while (qp != &lp->busy_ccbq) { 6391 cp2 = list_entry(qp, struct ccb, link_ccbq); 6392 qp = qp->prev; 6393 ++busy_cnt; 6394 if (cp2 == cp) 6395 break; 6396 cp2->start.schedule.l_paddr = 6397 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip)); 6398 } 6399 lp->held_ccb = cp; /* Requeue when this one completes */ 6400 disc_cnt = lp->queuedccbs - busy_cnt; 6401 } 6402 6403 switch(s_status) { 6404 default: /* Just for safety, should never happen */ 6405 case SAM_STAT_TASK_SET_FULL: 6406 /* 6407 ** Decrease number of tags to the number of 6408 ** disconnected commands. 6409 */ 6410 if (!lp) 6411 goto out; 6412 if (bootverbose >= 1) { 6413 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected " 6414 "CCBs\n", busy_cnt, disc_cnt); 6415 } 6416 if (disc_cnt < lp->numtags) { 6417 lp->numtags = disc_cnt > 2 ? disc_cnt : 2; 6418 lp->num_good = 0; 6419 ncr_setup_tags (np, cmd->device); 6420 } 6421 /* 6422 ** Requeue the command to the start queue. 6423 ** If any disconnected commands, 6424 ** Clear SIGP. 6425 ** Jump to reselect. 6426 */ 6427 cp->phys.header.savep = cp->startp; 6428 cp->host_status = HS_BUSY; 6429 cp->scsi_status = SAM_STAT_ILLEGAL; 6430 6431 ncr_put_start_queue(np, cp); 6432 if (disc_cnt) 6433 INB (nc_ctest2); /* Clear SIGP */ 6434 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect)); 6435 return; 6436 case SAM_STAT_COMMAND_TERMINATED: 6437 case SAM_STAT_CHECK_CONDITION: 6438 /* 6439 ** If we were requesting sense, give up. 6440 */ 6441 if (cp->auto_sense) 6442 goto out; 6443 6444 /* 6445 ** Device returned CHECK CONDITION status. 6446 ** Prepare all needed data strutures for getting 6447 ** sense data. 6448 ** 6449 ** identify message 6450 */ 6451 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun); 6452 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2)); 6453 cp->phys.smsg.size = cpu_to_scr(1); 6454 6455 /* 6456 ** sense command 6457 */ 6458 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd)); 6459 cp->phys.cmd.size = cpu_to_scr(6); 6460 6461 /* 6462 ** patch requested size into sense command 6463 */ 6464 cp->sensecmd[0] = 0x03; 6465 cp->sensecmd[1] = (cmd->device->lun & 0x7) << 5; 6466 cp->sensecmd[4] = sizeof(cp->sense_buf); 6467 6468 /* 6469 ** sense data 6470 */ 6471 memset(cp->sense_buf, 0, sizeof(cp->sense_buf)); 6472 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0])); 6473 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf)); 6474 6475 /* 6476 ** requeue the command. 6477 */ 6478 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in)); 6479 6480 cp->phys.header.savep = startp; 6481 cp->phys.header.goalp = startp + 24; 6482 cp->phys.header.lastp = startp; 6483 cp->phys.header.wgoalp = startp + 24; 6484 cp->phys.header.wlastp = startp; 6485 6486 cp->host_status = HS_BUSY; 6487 cp->scsi_status = SAM_STAT_ILLEGAL; 6488 cp->auto_sense = s_status; 6489 6490 cp->start.schedule.l_paddr = 6491 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 6492 6493 /* 6494 ** Select without ATN for quirky devices. 6495 */ 6496 if (cmd->device->select_no_atn) 6497 cp->start.schedule.l_paddr = 6498 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn)); 6499 6500 ncr_put_start_queue(np, cp); 6501 6502 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 6503 return; 6504 } 6505 6506 out: 6507 OUTONB_STD (); 6508 return; 6509 } 6510 6511 6512 /*========================================================== 6513 ** 6514 ** 6515 ** ncr chip exception handler for programmed interrupts. 6516 ** 6517 ** 6518 **========================================================== 6519 */ 6520 6521 void ncr_int_sir (struct ncb *np) 6522 { 6523 u_char scntl3; 6524 u_char chg, ofs, per, fak, wide; 6525 u_char num = INB (nc_dsps); 6526 struct ccb *cp=NULL; 6527 u_long dsa = INL (nc_dsa); 6528 u_char target = INB (nc_sdid) & 0x0f; 6529 struct tcb *tp = &np->target[target]; 6530 struct scsi_target *starget = tp->starget; 6531 6532 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num); 6533 6534 switch (num) { 6535 case SIR_INTFLY: 6536 /* 6537 ** This is used for HP Zalon/53c720 where INTFLY 6538 ** operation is currently broken. 6539 */ 6540 ncr_wakeup_done(np); 6541 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 6542 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8); 6543 #else 6544 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start)); 6545 #endif 6546 return; 6547 case SIR_RESEL_NO_MSG_IN: 6548 case SIR_RESEL_NO_IDENTIFY: 6549 /* 6550 ** If devices reselecting without sending an IDENTIFY 6551 ** message still exist, this should help. 6552 ** We just assume lun=0, 1 CCB, no tag. 6553 */ 6554 if (tp->lp[0]) { 6555 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); 6556 return; 6557 } 6558 fallthrough; 6559 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ 6560 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ 6561 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */ 6562 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */ 6563 printk ("%s:%d: SIR %d, " 6564 "incorrect nexus identification on reselection\n", 6565 ncr_name (np), target, num); 6566 goto out; 6567 case SIR_DONE_OVERFLOW: 6568 printk ("%s:%d: SIR %d, " 6569 "CCB done queue overflow\n", 6570 ncr_name (np), target, num); 6571 goto out; 6572 case SIR_BAD_STATUS: 6573 cp = np->header.cp; 6574 if (!cp || CCB_PHYS (cp, phys) != dsa) 6575 goto out; 6576 ncr_sir_to_redo(np, num, cp); 6577 return; 6578 default: 6579 /* 6580 ** lookup the ccb 6581 */ 6582 cp = np->ccb; 6583 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6584 cp = cp->link_ccb; 6585 6586 BUG_ON(!cp); 6587 BUG_ON(cp != np->header.cp); 6588 6589 if (!cp || cp != np->header.cp) 6590 goto out; 6591 } 6592 6593 switch (num) { 6594 /*----------------------------------------------------------------------------- 6595 ** 6596 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 6597 ** ("Everything you've always wanted to know about transfer mode 6598 ** negotiation") 6599 ** 6600 ** We try to negotiate sync and wide transfer only after 6601 ** a successful inquire command. We look at byte 7 of the 6602 ** inquire data to determine the capabilities of the target. 6603 ** 6604 ** When we try to negotiate, we append the negotiation message 6605 ** to the identify and (maybe) simple tag message. 6606 ** The host status field is set to HS_NEGOTIATE to mark this 6607 ** situation. 6608 ** 6609 ** If the target doesn't answer this message immediately 6610 ** (as required by the standard), the SIR_NEGO_FAIL interrupt 6611 ** will be raised eventually. 6612 ** The handler removes the HS_NEGOTIATE status, and sets the 6613 ** negotiated value to the default (async / nowide). 6614 ** 6615 ** If we receive a matching answer immediately, we check it 6616 ** for validity, and set the values. 6617 ** 6618 ** If we receive a Reject message immediately, we assume the 6619 ** negotiation has failed, and fall back to standard values. 6620 ** 6621 ** If we receive a negotiation message while not in HS_NEGOTIATE 6622 ** state, it's a target initiated negotiation. We prepare a 6623 ** (hopefully) valid answer, set our parameters, and send back 6624 ** this answer to the target. 6625 ** 6626 ** If the target doesn't fetch the answer (no message out phase), 6627 ** we assume the negotiation has failed, and fall back to default 6628 ** settings. 6629 ** 6630 ** When we set the values, we adjust them in all ccbs belonging 6631 ** to this target, in the controller's register, and in the "phys" 6632 ** field of the controller's struct ncb. 6633 ** 6634 ** Possible cases: hs sir msg_in value send goto 6635 ** We try to negotiate: 6636 ** -> target doesn't msgin NEG FAIL noop defa. - dispatch 6637 ** -> target rejected our msg NEG FAIL reject defa. - dispatch 6638 ** -> target answered (ok) NEG SYNC sdtr set - clrack 6639 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6640 ** -> target answered (ok) NEG WIDE wdtr set - clrack 6641 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6642 ** -> any other msgin NEG FAIL noop defa. - dispatch 6643 ** 6644 ** Target tries to negotiate: 6645 ** -> incoming message --- SYNC sdtr set SDTR - 6646 ** -> incoming message --- WIDE wdtr set WDTR - 6647 ** We sent our answer: 6648 ** -> target doesn't msgout --- PROTO ? defa. - dispatch 6649 ** 6650 **----------------------------------------------------------------------------- 6651 */ 6652 6653 case SIR_NEGO_FAILED: 6654 /*------------------------------------------------------- 6655 ** 6656 ** Negotiation failed. 6657 ** Target doesn't send an answer message, 6658 ** or target rejected our message. 6659 ** 6660 ** Remove negotiation request. 6661 ** 6662 **------------------------------------------------------- 6663 */ 6664 OUTB (HS_PRT, HS_BUSY); 6665 6666 fallthrough; 6667 6668 case SIR_NEGO_PROTO: 6669 /*------------------------------------------------------- 6670 ** 6671 ** Negotiation failed. 6672 ** Target doesn't fetch the answer message. 6673 ** 6674 **------------------------------------------------------- 6675 */ 6676 6677 if (DEBUG_FLAGS & DEBUG_NEGO) { 6678 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x " 6679 "status=%x.\n", num, cp->nego_status); 6680 } 6681 6682 /* 6683 ** any error in negotiation: 6684 ** fall back to default mode. 6685 */ 6686 switch (cp->nego_status) { 6687 6688 case NS_SYNC: 6689 spi_period(starget) = 0; 6690 spi_offset(starget) = 0; 6691 ncr_setsync (np, cp, 0, 0xe0); 6692 break; 6693 6694 case NS_WIDE: 6695 spi_width(starget) = 0; 6696 ncr_setwide (np, cp, 0, 0); 6697 break; 6698 6699 } 6700 np->msgin [0] = NOP; 6701 np->msgout[0] = NOP; 6702 cp->nego_status = 0; 6703 break; 6704 6705 case SIR_NEGO_SYNC: 6706 if (DEBUG_FLAGS & DEBUG_NEGO) { 6707 ncr_print_msg(cp, "sync msgin", np->msgin); 6708 } 6709 6710 chg = 0; 6711 per = np->msgin[3]; 6712 ofs = np->msgin[4]; 6713 if (ofs==0) per=255; 6714 6715 /* 6716 ** if target sends SDTR message, 6717 ** it CAN transfer synch. 6718 */ 6719 6720 if (ofs && starget) 6721 spi_support_sync(starget) = 1; 6722 6723 /* 6724 ** check values against driver limits. 6725 */ 6726 6727 if (per < np->minsync) 6728 {chg = 1; per = np->minsync;} 6729 if (per < tp->minsync) 6730 {chg = 1; per = tp->minsync;} 6731 if (ofs > tp->maxoffs) 6732 {chg = 1; ofs = tp->maxoffs;} 6733 6734 /* 6735 ** Check against controller limits. 6736 */ 6737 fak = 7; 6738 scntl3 = 0; 6739 if (ofs != 0) { 6740 ncr_getsync(np, per, &fak, &scntl3); 6741 if (fak > 7) { 6742 chg = 1; 6743 ofs = 0; 6744 } 6745 } 6746 if (ofs == 0) { 6747 fak = 7; 6748 per = 0; 6749 scntl3 = 0; 6750 tp->minsync = 0; 6751 } 6752 6753 if (DEBUG_FLAGS & DEBUG_NEGO) { 6754 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d " 6755 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg); 6756 } 6757 6758 if (INB (HS_PRT) == HS_NEGOTIATE) { 6759 OUTB (HS_PRT, HS_BUSY); 6760 switch (cp->nego_status) { 6761 6762 case NS_SYNC: 6763 /* This was an answer message */ 6764 if (chg) { 6765 /* Answer wasn't acceptable. */ 6766 spi_period(starget) = 0; 6767 spi_offset(starget) = 0; 6768 ncr_setsync(np, cp, 0, 0xe0); 6769 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad)); 6770 } else { 6771 /* Answer is ok. */ 6772 spi_period(starget) = per; 6773 spi_offset(starget) = ofs; 6774 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6775 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack)); 6776 } 6777 return; 6778 6779 case NS_WIDE: 6780 spi_width(starget) = 0; 6781 ncr_setwide(np, cp, 0, 0); 6782 break; 6783 } 6784 } 6785 6786 /* 6787 ** It was a request. Set value and 6788 ** prepare an answer message 6789 */ 6790 6791 spi_period(starget) = per; 6792 spi_offset(starget) = ofs; 6793 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6794 6795 spi_populate_sync_msg(np->msgout, per, ofs); 6796 cp->nego_status = NS_SYNC; 6797 6798 if (DEBUG_FLAGS & DEBUG_NEGO) { 6799 ncr_print_msg(cp, "sync msgout", np->msgout); 6800 } 6801 6802 if (!ofs) { 6803 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6804 return; 6805 } 6806 np->msgin [0] = NOP; 6807 6808 break; 6809 6810 case SIR_NEGO_WIDE: 6811 /* 6812 ** Wide request message received. 6813 */ 6814 if (DEBUG_FLAGS & DEBUG_NEGO) { 6815 ncr_print_msg(cp, "wide msgin", np->msgin); 6816 } 6817 6818 /* 6819 ** get requested values. 6820 */ 6821 6822 chg = 0; 6823 wide = np->msgin[3]; 6824 6825 /* 6826 ** if target sends WDTR message, 6827 ** it CAN transfer wide. 6828 */ 6829 6830 if (wide && starget) 6831 spi_support_wide(starget) = 1; 6832 6833 /* 6834 ** check values against driver limits. 6835 */ 6836 6837 if (wide > tp->usrwide) 6838 {chg = 1; wide = tp->usrwide;} 6839 6840 if (DEBUG_FLAGS & DEBUG_NEGO) { 6841 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide, 6842 chg); 6843 } 6844 6845 if (INB (HS_PRT) == HS_NEGOTIATE) { 6846 OUTB (HS_PRT, HS_BUSY); 6847 switch (cp->nego_status) { 6848 6849 case NS_WIDE: 6850 /* 6851 ** This was an answer message 6852 */ 6853 if (chg) { 6854 /* Answer wasn't acceptable. */ 6855 spi_width(starget) = 0; 6856 ncr_setwide(np, cp, 0, 1); 6857 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6858 } else { 6859 /* Answer is ok. */ 6860 spi_width(starget) = wide; 6861 ncr_setwide(np, cp, wide, 1); 6862 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack)); 6863 } 6864 return; 6865 6866 case NS_SYNC: 6867 spi_period(starget) = 0; 6868 spi_offset(starget) = 0; 6869 ncr_setsync(np, cp, 0, 0xe0); 6870 break; 6871 } 6872 } 6873 6874 /* 6875 ** It was a request, set value and 6876 ** prepare an answer message 6877 */ 6878 6879 spi_width(starget) = wide; 6880 ncr_setwide(np, cp, wide, 1); 6881 spi_populate_width_msg(np->msgout, wide); 6882 6883 np->msgin [0] = NOP; 6884 6885 cp->nego_status = NS_WIDE; 6886 6887 if (DEBUG_FLAGS & DEBUG_NEGO) { 6888 ncr_print_msg(cp, "wide msgout", np->msgin); 6889 } 6890 break; 6891 6892 /*-------------------------------------------------------------------- 6893 ** 6894 ** Processing of special messages 6895 ** 6896 **-------------------------------------------------------------------- 6897 */ 6898 6899 case SIR_REJECT_RECEIVED: 6900 /*----------------------------------------------- 6901 ** 6902 ** We received a MESSAGE_REJECT. 6903 ** 6904 **----------------------------------------------- 6905 */ 6906 6907 PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n", 6908 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]); 6909 break; 6910 6911 case SIR_REJECT_SENT: 6912 /*----------------------------------------------- 6913 ** 6914 ** We received an unknown message 6915 ** 6916 **----------------------------------------------- 6917 */ 6918 6919 ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin); 6920 break; 6921 6922 /*-------------------------------------------------------------------- 6923 ** 6924 ** Processing of special messages 6925 ** 6926 **-------------------------------------------------------------------- 6927 */ 6928 6929 case SIR_IGN_RESIDUE: 6930 /*----------------------------------------------- 6931 ** 6932 ** We received an IGNORE RESIDUE message, 6933 ** which couldn't be handled by the script. 6934 ** 6935 **----------------------------------------------- 6936 */ 6937 6938 PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet " 6939 "implemented.\n"); 6940 break; 6941 #if 0 6942 case SIR_MISSING_SAVE: 6943 /*----------------------------------------------- 6944 ** 6945 ** We received an DISCONNECT message, 6946 ** but the datapointer wasn't saved before. 6947 ** 6948 **----------------------------------------------- 6949 */ 6950 6951 PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer " 6952 "not saved: data=%x save=%x goal=%x.\n", 6953 (unsigned) INL (nc_temp), 6954 (unsigned) scr_to_cpu(np->header.savep), 6955 (unsigned) scr_to_cpu(np->header.goalp)); 6956 break; 6957 #endif 6958 } 6959 6960 out: 6961 OUTONB_STD (); 6962 } 6963 6964 /*========================================================== 6965 ** 6966 ** 6967 ** Acquire a control block 6968 ** 6969 ** 6970 **========================================================== 6971 */ 6972 6973 static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd) 6974 { 6975 u_char tn = cmd->device->id; 6976 u_char ln = cmd->device->lun; 6977 struct tcb *tp = &np->target[tn]; 6978 struct lcb *lp = tp->lp[ln]; 6979 u_char tag = NO_TAG; 6980 struct ccb *cp = NULL; 6981 6982 /* 6983 ** Lun structure available ? 6984 */ 6985 if (lp) { 6986 struct list_head *qp; 6987 /* 6988 ** Keep from using more tags than we can handle. 6989 */ 6990 if (lp->usetags && lp->busyccbs >= lp->maxnxs) 6991 return NULL; 6992 6993 /* 6994 ** Allocate a new CCB if needed. 6995 */ 6996 if (list_empty(&lp->free_ccbq)) 6997 ncr_alloc_ccb(np, tn, ln); 6998 6999 /* 7000 ** Look for free CCB 7001 */ 7002 qp = ncr_list_pop(&lp->free_ccbq); 7003 if (qp) { 7004 cp = list_entry(qp, struct ccb, link_ccbq); 7005 if (cp->magic) { 7006 PRINT_ADDR(cmd, "ccb free list corrupted " 7007 "(@%p)\n", cp); 7008 cp = NULL; 7009 } else { 7010 list_add_tail(qp, &lp->wait_ccbq); 7011 ++lp->busyccbs; 7012 } 7013 } 7014 7015 /* 7016 ** If a CCB is available, 7017 ** Get a tag for this nexus if required. 7018 */ 7019 if (cp) { 7020 if (lp->usetags) 7021 tag = lp->cb_tags[lp->ia_tag]; 7022 } 7023 else if (lp->actccbs > 0) 7024 return NULL; 7025 } 7026 7027 /* 7028 ** if nothing available, take the default. 7029 */ 7030 if (!cp) 7031 cp = np->ccb; 7032 7033 /* 7034 ** Wait until available. 7035 */ 7036 #if 0 7037 while (cp->magic) { 7038 if (flags & SCSI_NOSLEEP) break; 7039 if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0)) 7040 break; 7041 } 7042 #endif 7043 7044 if (cp->magic) 7045 return NULL; 7046 7047 cp->magic = 1; 7048 7049 /* 7050 ** Move to next available tag if tag used. 7051 */ 7052 if (lp) { 7053 if (tag != NO_TAG) { 7054 ++lp->ia_tag; 7055 if (lp->ia_tag == MAX_TAGS) 7056 lp->ia_tag = 0; 7057 lp->tags_umap |= (((tagmap_t) 1) << tag); 7058 } 7059 } 7060 7061 /* 7062 ** Remember all informations needed to free this CCB. 7063 */ 7064 cp->tag = tag; 7065 cp->target = tn; 7066 cp->lun = ln; 7067 7068 if (DEBUG_FLAGS & DEBUG_TAGS) { 7069 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag); 7070 } 7071 7072 return cp; 7073 } 7074 7075 /*========================================================== 7076 ** 7077 ** 7078 ** Release one control block 7079 ** 7080 ** 7081 **========================================================== 7082 */ 7083 7084 static void ncr_free_ccb (struct ncb *np, struct ccb *cp) 7085 { 7086 struct tcb *tp = &np->target[cp->target]; 7087 struct lcb *lp = tp->lp[cp->lun]; 7088 7089 if (DEBUG_FLAGS & DEBUG_TAGS) { 7090 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag); 7091 } 7092 7093 /* 7094 ** If lun control block available, 7095 ** decrement active commands and increment credit, 7096 ** free the tag if any and remove the JUMP for reselect. 7097 */ 7098 if (lp) { 7099 if (cp->tag != NO_TAG) { 7100 lp->cb_tags[lp->if_tag++] = cp->tag; 7101 if (lp->if_tag == MAX_TAGS) 7102 lp->if_tag = 0; 7103 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag); 7104 lp->tags_smap &= lp->tags_umap; 7105 lp->jump_ccb[cp->tag] = 7106 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q)); 7107 } else { 7108 lp->jump_ccb[0] = 7109 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l)); 7110 } 7111 } 7112 7113 /* 7114 ** Make this CCB available. 7115 */ 7116 7117 if (lp) { 7118 if (cp != np->ccb) 7119 list_move(&cp->link_ccbq, &lp->free_ccbq); 7120 --lp->busyccbs; 7121 if (cp->queued) { 7122 --lp->queuedccbs; 7123 } 7124 } 7125 cp -> host_status = HS_IDLE; 7126 cp -> magic = 0; 7127 if (cp->queued) { 7128 --np->queuedccbs; 7129 cp->queued = 0; 7130 } 7131 7132 #if 0 7133 if (cp == np->ccb) 7134 wakeup ((caddr_t) cp); 7135 #endif 7136 } 7137 7138 7139 #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r)) 7140 7141 /*------------------------------------------------------------------------ 7142 ** Initialize the fixed part of a CCB structure. 7143 **------------------------------------------------------------------------ 7144 **------------------------------------------------------------------------ 7145 */ 7146 static void ncr_init_ccb(struct ncb *np, struct ccb *cp) 7147 { 7148 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7149 7150 /* 7151 ** Remember virtual and bus address of this ccb. 7152 */ 7153 cp->p_ccb = vtobus(cp); 7154 cp->phys.header.cp = cp; 7155 7156 /* 7157 ** This allows list_del to work for the default ccb. 7158 */ 7159 INIT_LIST_HEAD(&cp->link_ccbq); 7160 7161 /* 7162 ** Initialyze the start and restart launch script. 7163 ** 7164 ** COPY(4) @(...p_phys), @(dsa) 7165 ** JUMP @(sched_point) 7166 */ 7167 cp->start.setup_dsa[0] = cpu_to_scr(copy_4); 7168 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys)); 7169 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa)); 7170 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP); 7171 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys)); 7172 7173 memcpy(&cp->restart, &cp->start, sizeof(cp->restart)); 7174 7175 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 7176 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); 7177 } 7178 7179 7180 /*------------------------------------------------------------------------ 7181 ** Allocate a CCB and initialize its fixed part. 7182 **------------------------------------------------------------------------ 7183 **------------------------------------------------------------------------ 7184 */ 7185 static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln) 7186 { 7187 struct tcb *tp = &np->target[tn]; 7188 struct lcb *lp = tp->lp[ln]; 7189 struct ccb *cp = NULL; 7190 7191 /* 7192 ** Allocate memory for this CCB. 7193 */ 7194 cp = m_calloc_dma(sizeof(struct ccb), "CCB"); 7195 if (!cp) 7196 return; 7197 7198 /* 7199 ** Count it and initialyze it. 7200 */ 7201 lp->actccbs++; 7202 np->actccbs++; 7203 memset(cp, 0, sizeof (*cp)); 7204 ncr_init_ccb(np, cp); 7205 7206 /* 7207 ** Chain into wakeup list and free ccb queue and take it 7208 ** into account for tagged commands. 7209 */ 7210 cp->link_ccb = np->ccb->link_ccb; 7211 np->ccb->link_ccb = cp; 7212 7213 list_add(&cp->link_ccbq, &lp->free_ccbq); 7214 } 7215 7216 /*========================================================== 7217 ** 7218 ** 7219 ** Allocation of resources for Targets/Luns/Tags. 7220 ** 7221 ** 7222 **========================================================== 7223 */ 7224 7225 7226 /*------------------------------------------------------------------------ 7227 ** Target control block initialisation. 7228 **------------------------------------------------------------------------ 7229 ** This data structure is fully initialized after a SCSI command 7230 ** has been successfully completed for this target. 7231 ** It contains a SCRIPT that is called on target reselection. 7232 **------------------------------------------------------------------------ 7233 */ 7234 static void ncr_init_tcb (struct ncb *np, u_char tn) 7235 { 7236 struct tcb *tp = &np->target[tn]; 7237 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1); 7238 int th = tn & 3; 7239 int i; 7240 7241 /* 7242 ** Jump to next tcb if SFBR does not match this target. 7243 ** JUMP IF (SFBR != #target#), @(next tcb) 7244 */ 7245 tp->jump_tcb.l_cmd = 7246 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn)))); 7247 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr; 7248 7249 /* 7250 ** Load the synchronous transfer register. 7251 ** COPY @(tp->sval), @(sxfer) 7252 */ 7253 tp->getscr[0] = cpu_to_scr(copy_1); 7254 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval)); 7255 #ifdef SCSI_NCR_BIG_ENDIAN 7256 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3); 7257 #else 7258 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer)); 7259 #endif 7260 7261 /* 7262 ** Load the timing register. 7263 ** COPY @(tp->wval), @(scntl3) 7264 */ 7265 tp->getscr[3] = cpu_to_scr(copy_1); 7266 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval)); 7267 #ifdef SCSI_NCR_BIG_ENDIAN 7268 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3); 7269 #else 7270 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3)); 7271 #endif 7272 7273 /* 7274 ** Get the IDENTIFY message and the lun. 7275 ** CALL @script(resel_lun) 7276 */ 7277 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL); 7278 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun)); 7279 7280 /* 7281 ** Look for the lun control block of this nexus. 7282 ** For i = 0 to 3 7283 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 7284 */ 7285 for (i = 0 ; i < 4 ; i++) { 7286 tp->jump_lcb[i].l_cmd = 7287 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 7288 tp->jump_lcb[i].l_paddr = 7289 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify)); 7290 } 7291 7292 /* 7293 ** Link this target control block to the JUMP chain. 7294 */ 7295 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb)); 7296 7297 /* 7298 ** These assert's should be moved at driver initialisations. 7299 */ 7300 #ifdef SCSI_NCR_BIG_ENDIAN 7301 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7302 offsetof(struct tcb , sval )) &3) != 3); 7303 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7304 offsetof(struct tcb , wval )) &3) != 3); 7305 #else 7306 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7307 offsetof(struct tcb , sval )) &3) != 0); 7308 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7309 offsetof(struct tcb , wval )) &3) != 0); 7310 #endif 7311 } 7312 7313 7314 /*------------------------------------------------------------------------ 7315 ** Lun control block allocation and initialization. 7316 **------------------------------------------------------------------------ 7317 ** This data structure is allocated and initialized after a SCSI 7318 ** command has been successfully completed for this target/lun. 7319 **------------------------------------------------------------------------ 7320 */ 7321 static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln) 7322 { 7323 struct tcb *tp = &np->target[tn]; 7324 struct lcb *lp = tp->lp[ln]; 7325 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7326 int lh = ln & 3; 7327 7328 /* 7329 ** Already done, return. 7330 */ 7331 if (lp) 7332 return lp; 7333 7334 /* 7335 ** Allocate the lcb. 7336 */ 7337 lp = m_calloc_dma(sizeof(struct lcb), "LCB"); 7338 if (!lp) 7339 goto fail; 7340 memset(lp, 0, sizeof(*lp)); 7341 tp->lp[ln] = lp; 7342 7343 /* 7344 ** Initialize the target control block if not yet. 7345 */ 7346 if (!tp->jump_tcb.l_cmd) 7347 ncr_init_tcb(np, tn); 7348 7349 /* 7350 ** Initialize the CCB queue headers. 7351 */ 7352 INIT_LIST_HEAD(&lp->free_ccbq); 7353 INIT_LIST_HEAD(&lp->busy_ccbq); 7354 INIT_LIST_HEAD(&lp->wait_ccbq); 7355 INIT_LIST_HEAD(&lp->skip_ccbq); 7356 7357 /* 7358 ** Set max CCBs to 1 and use the default 1 entry 7359 ** jump table by default. 7360 */ 7361 lp->maxnxs = 1; 7362 lp->jump_ccb = &lp->jump_ccb_0; 7363 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7364 7365 /* 7366 ** Initilialyze the reselect script: 7367 ** 7368 ** Jump to next lcb if SFBR does not match this lun. 7369 ** Load TEMP with the CCB direct jump table bus address. 7370 ** Get the SIMPLE TAG message and the tag. 7371 ** 7372 ** JUMP IF (SFBR != #lun#), @(next lcb) 7373 ** COPY @(lp->p_jump_ccb), @(temp) 7374 ** JUMP @script(resel_notag) 7375 */ 7376 lp->jump_lcb.l_cmd = 7377 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff)))); 7378 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr; 7379 7380 lp->load_jump_ccb[0] = cpu_to_scr(copy_4); 7381 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb)); 7382 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp)); 7383 7384 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP); 7385 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag)); 7386 7387 /* 7388 ** Link this lun control block to the JUMP chain. 7389 */ 7390 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb)); 7391 7392 /* 7393 ** Initialize command queuing control. 7394 */ 7395 lp->busyccbs = 1; 7396 lp->queuedccbs = 1; 7397 lp->queuedepth = 1; 7398 fail: 7399 return lp; 7400 } 7401 7402 7403 /*------------------------------------------------------------------------ 7404 ** Lun control block setup on INQUIRY data received. 7405 **------------------------------------------------------------------------ 7406 ** We only support WIDE, SYNC for targets and CMDQ for logical units. 7407 ** This setup is done on each INQUIRY since we are expecting user 7408 ** will play with CHANGE DEFINITION commands. :-) 7409 **------------------------------------------------------------------------ 7410 */ 7411 static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev) 7412 { 7413 unsigned char tn = sdev->id, ln = sdev->lun; 7414 struct tcb *tp = &np->target[tn]; 7415 struct lcb *lp = tp->lp[ln]; 7416 7417 /* If no lcb, try to allocate it. */ 7418 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln))) 7419 goto fail; 7420 7421 /* 7422 ** If unit supports tagged commands, allocate the 7423 ** CCB JUMP table if not yet. 7424 */ 7425 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) { 7426 int i; 7427 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB"); 7428 if (!lp->jump_ccb) { 7429 lp->jump_ccb = &lp->jump_ccb_0; 7430 goto fail; 7431 } 7432 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7433 for (i = 0 ; i < 64 ; i++) 7434 lp->jump_ccb[i] = 7435 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q)); 7436 for (i = 0 ; i < MAX_TAGS ; i++) 7437 lp->cb_tags[i] = i; 7438 lp->maxnxs = MAX_TAGS; 7439 lp->tags_stime = jiffies + 3*HZ; 7440 ncr_setup_tags (np, sdev); 7441 } 7442 7443 7444 fail: 7445 return lp; 7446 } 7447 7448 /*========================================================== 7449 ** 7450 ** 7451 ** Build Scatter Gather Block 7452 ** 7453 ** 7454 **========================================================== 7455 ** 7456 ** The transfer area may be scattered among 7457 ** several non adjacent physical pages. 7458 ** 7459 ** We may use MAX_SCATTER blocks. 7460 ** 7461 **---------------------------------------------------------- 7462 */ 7463 7464 /* 7465 ** We try to reduce the number of interrupts caused 7466 ** by unexpected phase changes due to disconnects. 7467 ** A typical harddisk may disconnect before ANY block. 7468 ** If we wanted to avoid unexpected phase changes at all 7469 ** we had to use a break point every 512 bytes. 7470 ** Of course the number of scatter/gather blocks is 7471 ** limited. 7472 ** Under Linux, the scatter/gatter blocks are provided by 7473 ** the generic driver. We just have to copy addresses and 7474 ** sizes to the data segment array. 7475 */ 7476 7477 static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) 7478 { 7479 int segment = 0; 7480 int use_sg = scsi_sg_count(cmd); 7481 7482 cp->data_len = 0; 7483 7484 use_sg = map_scsi_sg_data(np, cmd); 7485 if (use_sg > 0) { 7486 struct scatterlist *sg; 7487 struct scr_tblmove *data; 7488 7489 if (use_sg > MAX_SCATTER) { 7490 unmap_scsi_data(np, cmd); 7491 return -1; 7492 } 7493 7494 data = &cp->phys.data[MAX_SCATTER - use_sg]; 7495 7496 scsi_for_each_sg(cmd, sg, use_sg, segment) { 7497 dma_addr_t baddr = sg_dma_address(sg); 7498 unsigned int len = sg_dma_len(sg); 7499 7500 ncr_build_sge(np, &data[segment], baddr, len); 7501 cp->data_len += len; 7502 } 7503 } else 7504 segment = -2; 7505 7506 return segment; 7507 } 7508 7509 /*========================================================== 7510 ** 7511 ** 7512 ** Test the bus snoop logic :-( 7513 ** 7514 ** Has to be called with interrupts disabled. 7515 ** 7516 ** 7517 **========================================================== 7518 */ 7519 7520 static int __init ncr_regtest (struct ncb* np) 7521 { 7522 register volatile u32 data; 7523 /* 7524 ** ncr registers may NOT be cached. 7525 ** write 0xffffffff to a read only register area, 7526 ** and try to read it back. 7527 */ 7528 data = 0xffffffff; 7529 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); 7530 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); 7531 #if 1 7532 if (data == 0xffffffff) { 7533 #else 7534 if ((data & 0xe2f0fffd) != 0x02000080) { 7535 #endif 7536 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 7537 (unsigned) data); 7538 return (0x10); 7539 } 7540 return (0); 7541 } 7542 7543 static int __init ncr_snooptest (struct ncb* np) 7544 { 7545 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; 7546 int i, err=0; 7547 if (np->reg) { 7548 err |= ncr_regtest (np); 7549 if (err) 7550 return (err); 7551 } 7552 7553 /* init */ 7554 pc = NCB_SCRIPTH_PHYS (np, snooptest); 7555 host_wr = 1; 7556 ncr_wr = 2; 7557 /* 7558 ** Set memory and register. 7559 */ 7560 np->ncr_cache = cpu_to_scr(host_wr); 7561 OUTL (nc_temp, ncr_wr); 7562 /* 7563 ** Start script (exchange values) 7564 */ 7565 OUTL_DSP (pc); 7566 /* 7567 ** Wait 'til done (with timeout) 7568 */ 7569 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 7570 if (INB(nc_istat) & (INTF|SIP|DIP)) 7571 break; 7572 /* 7573 ** Save termination position. 7574 */ 7575 pc = INL (nc_dsp); 7576 /* 7577 ** Read memory and register. 7578 */ 7579 host_rd = scr_to_cpu(np->ncr_cache); 7580 ncr_rd = INL (nc_scratcha); 7581 ncr_bk = INL (nc_temp); 7582 /* 7583 ** Reset ncr chip 7584 */ 7585 ncr_chip_reset(np, 100); 7586 /* 7587 ** check for timeout 7588 */ 7589 if (i>=NCR_SNOOP_TIMEOUT) { 7590 printk ("CACHE TEST FAILED: timeout.\n"); 7591 return (0x20); 7592 } 7593 /* 7594 ** Check termination position. 7595 */ 7596 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { 7597 printk ("CACHE TEST FAILED: script execution failed.\n"); 7598 printk ("start=%08lx, pc=%08lx, end=%08lx\n", 7599 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, 7600 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); 7601 return (0x40); 7602 } 7603 /* 7604 ** Show results. 7605 */ 7606 if (host_wr != ncr_rd) { 7607 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 7608 (int) host_wr, (int) ncr_rd); 7609 err |= 1; 7610 } 7611 if (host_rd != ncr_wr) { 7612 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 7613 (int) ncr_wr, (int) host_rd); 7614 err |= 2; 7615 } 7616 if (ncr_bk != ncr_wr) { 7617 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 7618 (int) ncr_wr, (int) ncr_bk); 7619 err |= 4; 7620 } 7621 return (err); 7622 } 7623 7624 /*========================================================== 7625 ** 7626 ** Determine the ncr's clock frequency. 7627 ** This is essential for the negotiation 7628 ** of the synchronous transfer rate. 7629 ** 7630 **========================================================== 7631 ** 7632 ** Note: we have to return the correct value. 7633 ** THERE IS NO SAFE DEFAULT VALUE. 7634 ** 7635 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 7636 ** 53C860 and 53C875 rev. 1 support fast20 transfers but 7637 ** do not have a clock doubler and so are provided with a 7638 ** 80 MHz clock. All other fast20 boards incorporate a doubler 7639 ** and so should be delivered with a 40 MHz clock. 7640 ** The future fast40 chips (895/895) use a 40 Mhz base clock 7641 ** and provide a clock quadrupler (160 Mhz). The code below 7642 ** tries to deal as cleverly as possible with all this stuff. 7643 ** 7644 **---------------------------------------------------------- 7645 */ 7646 7647 /* 7648 * Select NCR SCSI clock frequency 7649 */ 7650 static void ncr_selectclock(struct ncb *np, u_char scntl3) 7651 { 7652 if (np->multiplier < 2) { 7653 OUTB(nc_scntl3, scntl3); 7654 return; 7655 } 7656 7657 if (bootverbose >= 2) 7658 printk ("%s: enabling clock multiplier\n", ncr_name(np)); 7659 7660 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 7661 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 7662 int i = 20; 7663 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 7664 udelay(20); 7665 if (!i) 7666 printk("%s: the chip cannot lock the frequency\n", ncr_name(np)); 7667 } else /* Wait 20 micro-seconds for doubler */ 7668 udelay(20); 7669 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 7670 OUTB(nc_scntl3, scntl3); 7671 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 7672 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 7673 } 7674 7675 7676 /* 7677 * calculate NCR SCSI clock frequency (in KHz) 7678 */ 7679 static unsigned __init ncrgetfreq (struct ncb *np, int gen) 7680 { 7681 unsigned ms = 0; 7682 char count = 0; 7683 7684 /* 7685 * Measure GEN timer delay in order 7686 * to calculate SCSI clock frequency 7687 * 7688 * This code will never execute too 7689 * many loop iterations (if DELAY is 7690 * reasonably correct). It could get 7691 * too low a delay (too high a freq.) 7692 * if the CPU is slow executing the 7693 * loop for some reason (an NMI, for 7694 * example). For this reason we will 7695 * if multiple measurements are to be 7696 * performed trust the higher delay 7697 * (lower frequency returned). 7698 */ 7699 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 7700 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 7701 (void) INW (nc_sist); /* clear pending scsi interrupt */ 7702 OUTB (nc_dien , 0); /* mask all dma interrupts */ 7703 (void) INW (nc_sist); /* another one, just to be sure :) */ 7704 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 7705 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7706 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ 7707 while (!(INW(nc_sist) & GEN) && ms++ < 100000) { 7708 for (count = 0; count < 10; count ++) 7709 udelay(100); /* count ms */ 7710 } 7711 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7712 /* 7713 * set prescaler to divide by whatever 0 means 7714 * 0 ought to choose divide by 2, but appears 7715 * to set divide by 3.5 mode in my 53c810 ... 7716 */ 7717 OUTB (nc_scntl3, 0); 7718 7719 if (bootverbose >= 2) 7720 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms); 7721 /* 7722 * adjust for prescaler, and convert into KHz 7723 */ 7724 return ms ? ((1 << gen) * 4340) / ms : 0; 7725 } 7726 7727 /* 7728 * Get/probe NCR SCSI clock frequency 7729 */ 7730 static void __init ncr_getclock (struct ncb *np, int mult) 7731 { 7732 unsigned char scntl3 = INB(nc_scntl3); 7733 unsigned char stest1 = INB(nc_stest1); 7734 unsigned f1; 7735 7736 np->multiplier = 1; 7737 f1 = 40000; 7738 7739 /* 7740 ** True with 875 or 895 with clock multiplier selected 7741 */ 7742 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { 7743 if (bootverbose >= 2) 7744 printk ("%s: clock multiplier found\n", ncr_name(np)); 7745 np->multiplier = mult; 7746 } 7747 7748 /* 7749 ** If multiplier not found or scntl3 not 7,5,3, 7750 ** reset chip and get frequency from general purpose timer. 7751 ** Otherwise trust scntl3 BIOS setting. 7752 */ 7753 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { 7754 unsigned f2; 7755 7756 ncr_chip_reset(np, 5); 7757 7758 (void) ncrgetfreq (np, 11); /* throw away first result */ 7759 f1 = ncrgetfreq (np, 11); 7760 f2 = ncrgetfreq (np, 11); 7761 7762 if(bootverbose) 7763 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2); 7764 7765 if (f1 > f2) f1 = f2; /* trust lower result */ 7766 7767 if (f1 < 45000) f1 = 40000; 7768 else if (f1 < 55000) f1 = 50000; 7769 else f1 = 80000; 7770 7771 if (f1 < 80000 && mult > 1) { 7772 if (bootverbose >= 2) 7773 printk ("%s: clock multiplier assumed\n", ncr_name(np)); 7774 np->multiplier = mult; 7775 } 7776 } else { 7777 if ((scntl3 & 7) == 3) f1 = 40000; 7778 else if ((scntl3 & 7) == 5) f1 = 80000; 7779 else f1 = 160000; 7780 7781 f1 /= np->multiplier; 7782 } 7783 7784 /* 7785 ** Compute controller synchronous parameters. 7786 */ 7787 f1 *= np->multiplier; 7788 np->clock_khz = f1; 7789 } 7790 7791 /*===================== LINUX ENTRY POINTS SECTION ==========================*/ 7792 7793 static int ncr53c8xx_slave_alloc(struct scsi_device *device) 7794 { 7795 struct Scsi_Host *host = device->host; 7796 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 7797 struct tcb *tp = &np->target[device->id]; 7798 tp->starget = device->sdev_target; 7799 7800 return 0; 7801 } 7802 7803 static int ncr53c8xx_slave_configure(struct scsi_device *device) 7804 { 7805 struct Scsi_Host *host = device->host; 7806 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 7807 struct tcb *tp = &np->target[device->id]; 7808 struct lcb *lp = tp->lp[device->lun]; 7809 int numtags, depth_to_use; 7810 7811 ncr_setup_lcb(np, device); 7812 7813 /* 7814 ** Select queue depth from driver setup. 7815 ** Donnot use more than configured by user. 7816 ** Use at least 2. 7817 ** Donnot use more than our maximum. 7818 */ 7819 numtags = device_queue_depth(np->unit, device->id, device->lun); 7820 if (numtags > tp->usrtags) 7821 numtags = tp->usrtags; 7822 if (!device->tagged_supported) 7823 numtags = 1; 7824 depth_to_use = numtags; 7825 if (depth_to_use < 2) 7826 depth_to_use = 2; 7827 if (depth_to_use > MAX_TAGS) 7828 depth_to_use = MAX_TAGS; 7829 7830 scsi_change_queue_depth(device, depth_to_use); 7831 7832 /* 7833 ** Since the queue depth is not tunable under Linux, 7834 ** we need to know this value in order not to 7835 ** announce stupid things to user. 7836 ** 7837 ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable.. 7838 ** In fact we just tuned it, or did I miss 7839 ** something important? :) 7840 */ 7841 if (lp) { 7842 lp->numtags = lp->maxtags = numtags; 7843 lp->scdev_depth = depth_to_use; 7844 } 7845 ncr_setup_tags (np, device); 7846 7847 #ifdef DEBUG_NCR53C8XX 7848 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n", 7849 np->unit, device->id, device->lun, depth_to_use); 7850 #endif 7851 7852 if (spi_support_sync(device->sdev_target) && 7853 !spi_initial_dv(device->sdev_target)) 7854 spi_dv_device(device); 7855 return 0; 7856 } 7857 7858 static int ncr53c8xx_queue_command_lck (struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)) 7859 { 7860 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 7861 unsigned long flags; 7862 int sts; 7863 7864 #ifdef DEBUG_NCR53C8XX 7865 printk("ncr53c8xx_queue_command\n"); 7866 #endif 7867 7868 cmd->scsi_done = done; 7869 cmd->host_scribble = NULL; 7870 cmd->__data_mapped = 0; 7871 cmd->__data_mapping = 0; 7872 7873 spin_lock_irqsave(&np->smp_lock, flags); 7874 7875 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) { 7876 set_host_byte(cmd, sts); 7877 #ifdef DEBUG_NCR53C8XX 7878 printk("ncr53c8xx : command not queued - result=%d\n", sts); 7879 #endif 7880 } 7881 #ifdef DEBUG_NCR53C8XX 7882 else 7883 printk("ncr53c8xx : command successfully queued\n"); 7884 #endif 7885 7886 spin_unlock_irqrestore(&np->smp_lock, flags); 7887 7888 if (sts != DID_OK) { 7889 unmap_scsi_data(np, cmd); 7890 done(cmd); 7891 sts = 0; 7892 } 7893 7894 return sts; 7895 } 7896 7897 static DEF_SCSI_QCMD(ncr53c8xx_queue_command) 7898 7899 irqreturn_t ncr53c8xx_intr(int irq, void *dev_id) 7900 { 7901 unsigned long flags; 7902 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id; 7903 struct host_data *host_data = (struct host_data *)shost->hostdata; 7904 struct ncb *np = host_data->ncb; 7905 struct scsi_cmnd *done_list; 7906 7907 #ifdef DEBUG_NCR53C8XX 7908 printk("ncr53c8xx : interrupt received\n"); 7909 #endif 7910 7911 if (DEBUG_FLAGS & DEBUG_TINY) printk ("["); 7912 7913 spin_lock_irqsave(&np->smp_lock, flags); 7914 ncr_exception(np); 7915 done_list = np->done_list; 7916 np->done_list = NULL; 7917 spin_unlock_irqrestore(&np->smp_lock, flags); 7918 7919 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n"); 7920 7921 if (done_list) 7922 ncr_flush_done_cmds(done_list); 7923 return IRQ_HANDLED; 7924 } 7925 7926 static void ncr53c8xx_timeout(struct timer_list *t) 7927 { 7928 struct ncb *np = from_timer(np, t, timer); 7929 unsigned long flags; 7930 struct scsi_cmnd *done_list; 7931 7932 spin_lock_irqsave(&np->smp_lock, flags); 7933 ncr_timeout(np); 7934 done_list = np->done_list; 7935 np->done_list = NULL; 7936 spin_unlock_irqrestore(&np->smp_lock, flags); 7937 7938 if (done_list) 7939 ncr_flush_done_cmds(done_list); 7940 } 7941 7942 static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd) 7943 { 7944 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 7945 int sts; 7946 unsigned long flags; 7947 struct scsi_cmnd *done_list; 7948 7949 /* 7950 * If the mid-level driver told us reset is synchronous, it seems 7951 * that we must call the done() callback for the involved command, 7952 * even if this command was not queued to the low-level driver, 7953 * before returning SUCCESS. 7954 */ 7955 7956 spin_lock_irqsave(&np->smp_lock, flags); 7957 sts = ncr_reset_bus(np); 7958 7959 done_list = np->done_list; 7960 np->done_list = NULL; 7961 spin_unlock_irqrestore(&np->smp_lock, flags); 7962 7963 ncr_flush_done_cmds(done_list); 7964 7965 return sts; 7966 } 7967 7968 7969 /* 7970 ** Scsi command waiting list management. 7971 ** 7972 ** It may happen that we cannot insert a scsi command into the start queue, 7973 ** in the following circumstances. 7974 ** Too few preallocated ccb(s), 7975 ** maxtags < cmd_per_lun of the Linux host control block, 7976 ** etc... 7977 ** Such scsi commands are inserted into a waiting list. 7978 ** When a scsi command complete, we try to requeue the commands of the 7979 ** waiting list. 7980 */ 7981 7982 #define next_wcmd host_scribble 7983 7984 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd) 7985 { 7986 struct scsi_cmnd *wcmd; 7987 7988 #ifdef DEBUG_WAITING_LIST 7989 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd); 7990 #endif 7991 cmd->next_wcmd = NULL; 7992 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd; 7993 else { 7994 while (wcmd->next_wcmd) 7995 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd; 7996 wcmd->next_wcmd = (char *) cmd; 7997 } 7998 } 7999 8000 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd) 8001 { 8002 struct scsi_cmnd **pcmd = &np->waiting_list; 8003 8004 while (*pcmd) { 8005 if (cmd == *pcmd) { 8006 if (to_remove) { 8007 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd; 8008 cmd->next_wcmd = NULL; 8009 } 8010 #ifdef DEBUG_WAITING_LIST 8011 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd); 8012 #endif 8013 return cmd; 8014 } 8015 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd; 8016 } 8017 return NULL; 8018 } 8019 8020 static void process_waiting_list(struct ncb *np, int sts) 8021 { 8022 struct scsi_cmnd *waiting_list, *wcmd; 8023 8024 waiting_list = np->waiting_list; 8025 np->waiting_list = NULL; 8026 8027 #ifdef DEBUG_WAITING_LIST 8028 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts); 8029 #endif 8030 while ((wcmd = waiting_list) != NULL) { 8031 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd; 8032 wcmd->next_wcmd = NULL; 8033 if (sts == DID_OK) { 8034 #ifdef DEBUG_WAITING_LIST 8035 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd); 8036 #endif 8037 sts = ncr_queue_command(np, wcmd); 8038 } 8039 if (sts != DID_OK) { 8040 #ifdef DEBUG_WAITING_LIST 8041 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts); 8042 #endif 8043 set_host_byte(wcmd, sts); 8044 ncr_queue_done_cmd(np, wcmd); 8045 } 8046 } 8047 } 8048 8049 #undef next_wcmd 8050 8051 static ssize_t show_ncr53c8xx_revision(struct device *dev, 8052 struct device_attribute *attr, char *buf) 8053 { 8054 struct Scsi_Host *host = class_to_shost(dev); 8055 struct host_data *host_data = (struct host_data *)host->hostdata; 8056 8057 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id); 8058 } 8059 8060 static struct device_attribute ncr53c8xx_revision_attr = { 8061 .attr = { .name = "revision", .mode = S_IRUGO, }, 8062 .show = show_ncr53c8xx_revision, 8063 }; 8064 8065 static struct device_attribute *ncr53c8xx_host_attrs[] = { 8066 &ncr53c8xx_revision_attr, 8067 NULL 8068 }; 8069 8070 /*========================================================== 8071 ** 8072 ** Boot command line. 8073 ** 8074 **========================================================== 8075 */ 8076 #ifdef MODULE 8077 char *ncr53c8xx; /* command line passed by insmod */ 8078 module_param(ncr53c8xx, charp, 0); 8079 #endif 8080 8081 #ifndef MODULE 8082 static int __init ncr53c8xx_setup(char *str) 8083 { 8084 return sym53c8xx__setup(str); 8085 } 8086 8087 __setup("ncr53c8xx=", ncr53c8xx_setup); 8088 #endif 8089 8090 8091 /* 8092 * Host attach and initialisations. 8093 * 8094 * Allocate host data and ncb structure. 8095 * Request IO region and remap MMIO region. 8096 * Do chip initialization. 8097 * If all is OK, install interrupt handling and 8098 * start the timer daemon. 8099 */ 8100 struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt, 8101 int unit, struct ncr_device *device) 8102 { 8103 struct host_data *host_data; 8104 struct ncb *np = NULL; 8105 struct Scsi_Host *instance = NULL; 8106 u_long flags = 0; 8107 int i; 8108 8109 if (!tpnt->name) 8110 tpnt->name = SCSI_NCR_DRIVER_NAME; 8111 if (!tpnt->shost_attrs) 8112 tpnt->shost_attrs = ncr53c8xx_host_attrs; 8113 8114 tpnt->queuecommand = ncr53c8xx_queue_command; 8115 tpnt->slave_configure = ncr53c8xx_slave_configure; 8116 tpnt->slave_alloc = ncr53c8xx_slave_alloc; 8117 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset; 8118 tpnt->can_queue = SCSI_NCR_CAN_QUEUE; 8119 tpnt->this_id = 7; 8120 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE; 8121 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN; 8122 8123 if (device->differential) 8124 driver_setup.diff_support = device->differential; 8125 8126 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n", 8127 unit, device->chip.revision_id, device->slot.irq); 8128 8129 instance = scsi_host_alloc(tpnt, sizeof(*host_data)); 8130 if (!instance) 8131 goto attach_error; 8132 host_data = (struct host_data *) instance->hostdata; 8133 8134 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB"); 8135 if (!np) 8136 goto attach_error; 8137 spin_lock_init(&np->smp_lock); 8138 np->dev = device->dev; 8139 np->p_ncb = vtobus(np); 8140 host_data->ncb = np; 8141 8142 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB"); 8143 if (!np->ccb) 8144 goto attach_error; 8145 8146 /* Store input information in the host data structure. */ 8147 np->unit = unit; 8148 np->verbose = driver_setup.verbose; 8149 sprintf(np->inst_name, "ncr53c720-%d", np->unit); 8150 np->revision_id = device->chip.revision_id; 8151 np->features = device->chip.features; 8152 np->clock_divn = device->chip.nr_divisor; 8153 np->maxoffs = device->chip.offset_max; 8154 np->maxburst = device->chip.burst_max; 8155 np->myaddr = device->host_id; 8156 8157 /* Allocate SCRIPTS areas. */ 8158 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT"); 8159 if (!np->script0) 8160 goto attach_error; 8161 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH"); 8162 if (!np->scripth0) 8163 goto attach_error; 8164 8165 timer_setup(&np->timer, ncr53c8xx_timeout, 0); 8166 8167 /* Try to map the controller chip to virtual and physical memory. */ 8168 8169 np->paddr = device->slot.base; 8170 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0; 8171 8172 if (device->slot.base_v) 8173 np->vaddr = device->slot.base_v; 8174 else 8175 np->vaddr = ioremap(device->slot.base_c, 128); 8176 8177 if (!np->vaddr) { 8178 printk(KERN_ERR 8179 "%s: can't map memory mapped IO region\n",ncr_name(np)); 8180 goto attach_error; 8181 } else { 8182 if (bootverbose > 1) 8183 printk(KERN_INFO 8184 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr); 8185 } 8186 8187 /* Make the controller's registers available. Now the INB INW INL 8188 * OUTB OUTW OUTL macros can be used safely. 8189 */ 8190 8191 np->reg = (struct ncr_reg __iomem *)np->vaddr; 8192 8193 /* Do chip dependent initialization. */ 8194 ncr_prepare_setting(np); 8195 8196 if (np->paddr2 && sizeof(struct script) > 4096) { 8197 np->paddr2 = 0; 8198 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n", 8199 ncr_name(np)); 8200 } 8201 8202 instance->max_channel = 0; 8203 instance->this_id = np->myaddr; 8204 instance->max_id = np->maxwide ? 16 : 8; 8205 instance->max_lun = SCSI_NCR_MAX_LUN; 8206 instance->base = (unsigned long) np->reg; 8207 instance->irq = device->slot.irq; 8208 instance->unique_id = device->slot.base; 8209 instance->dma_channel = 0; 8210 instance->cmd_per_lun = MAX_TAGS; 8211 instance->can_queue = (MAX_START-4); 8212 /* This can happen if you forget to call ncr53c8xx_init from 8213 * your module_init */ 8214 BUG_ON(!ncr53c8xx_transport_template); 8215 instance->transportt = ncr53c8xx_transport_template; 8216 8217 /* Patch script to physical addresses */ 8218 ncr_script_fill(&script0, &scripth0); 8219 8220 np->scripth = np->scripth0; 8221 np->p_scripth = vtobus(np->scripth); 8222 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0); 8223 8224 ncr_script_copy_and_bind(np, (ncrcmd *) &script0, 8225 (ncrcmd *) np->script0, sizeof(struct script)); 8226 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0, 8227 (ncrcmd *) np->scripth0, sizeof(struct scripth)); 8228 np->ccb->p_ccb = vtobus (np->ccb); 8229 8230 /* Patch the script for LED support. */ 8231 8232 if (np->features & FE_LED0) { 8233 np->script0->idle[0] = 8234 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01)); 8235 np->script0->reselected[0] = 8236 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8237 np->script0->start[0] = 8238 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8239 } 8240 8241 /* 8242 * Look for the target control block of this nexus. 8243 * For i = 0 to 3 8244 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 8245 */ 8246 for (i = 0 ; i < 4 ; i++) { 8247 np->jump_tcb[i].l_cmd = 8248 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 8249 np->jump_tcb[i].l_paddr = 8250 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target)); 8251 } 8252 8253 ncr_chip_reset(np, 100); 8254 8255 /* Now check the cache handling of the chipset. */ 8256 8257 if (ncr_snooptest(np)) { 8258 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n"); 8259 goto attach_error; 8260 } 8261 8262 /* Install the interrupt handler. */ 8263 np->irq = device->slot.irq; 8264 8265 /* Initialize the fixed part of the default ccb. */ 8266 ncr_init_ccb(np, np->ccb); 8267 8268 /* 8269 * After SCSI devices have been opened, we cannot reset the bus 8270 * safely, so we do it here. Interrupt handler does the real work. 8271 * Process the reset exception if interrupts are not enabled yet. 8272 * Then enable disconnects. 8273 */ 8274 spin_lock_irqsave(&np->smp_lock, flags); 8275 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) { 8276 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np)); 8277 8278 spin_unlock_irqrestore(&np->smp_lock, flags); 8279 goto attach_error; 8280 } 8281 ncr_exception(np); 8282 8283 np->disc = 1; 8284 8285 /* 8286 * The middle-level SCSI driver does not wait for devices to settle. 8287 * Wait synchronously if more than 2 seconds. 8288 */ 8289 if (driver_setup.settle_delay > 2) { 8290 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n", 8291 ncr_name(np), driver_setup.settle_delay); 8292 mdelay(1000 * driver_setup.settle_delay); 8293 } 8294 8295 /* start the timeout daemon */ 8296 np->lasttime=0; 8297 ncr_timeout (np); 8298 8299 /* use SIMPLE TAG messages by default */ 8300 #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG 8301 np->order = SIMPLE_QUEUE_TAG; 8302 #endif 8303 8304 spin_unlock_irqrestore(&np->smp_lock, flags); 8305 8306 return instance; 8307 8308 attach_error: 8309 if (!instance) 8310 return NULL; 8311 printk(KERN_INFO "%s: detaching...\n", ncr_name(np)); 8312 if (!np) 8313 goto unregister; 8314 if (np->scripth0) 8315 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 8316 if (np->script0) 8317 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 8318 if (np->ccb) 8319 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 8320 m_free_dma(np, sizeof(struct ncb), "NCB"); 8321 host_data->ncb = NULL; 8322 8323 unregister: 8324 scsi_host_put(instance); 8325 8326 return NULL; 8327 } 8328 8329 8330 void ncr53c8xx_release(struct Scsi_Host *host) 8331 { 8332 struct host_data *host_data = shost_priv(host); 8333 #ifdef DEBUG_NCR53C8XX 8334 printk("ncr53c8xx: release\n"); 8335 #endif 8336 if (host_data->ncb) 8337 ncr_detach(host_data->ncb); 8338 scsi_host_put(host); 8339 } 8340 8341 static void ncr53c8xx_set_period(struct scsi_target *starget, int period) 8342 { 8343 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8344 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8345 struct tcb *tp = &np->target[starget->id]; 8346 8347 if (period > np->maxsync) 8348 period = np->maxsync; 8349 else if (period < np->minsync) 8350 period = np->minsync; 8351 8352 tp->usrsync = period; 8353 8354 ncr_negotiate(np, tp); 8355 } 8356 8357 static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset) 8358 { 8359 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8360 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8361 struct tcb *tp = &np->target[starget->id]; 8362 8363 if (offset > np->maxoffs) 8364 offset = np->maxoffs; 8365 else if (offset < 0) 8366 offset = 0; 8367 8368 tp->maxoffs = offset; 8369 8370 ncr_negotiate(np, tp); 8371 } 8372 8373 static void ncr53c8xx_set_width(struct scsi_target *starget, int width) 8374 { 8375 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8376 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8377 struct tcb *tp = &np->target[starget->id]; 8378 8379 if (width > np->maxwide) 8380 width = np->maxwide; 8381 else if (width < 0) 8382 width = 0; 8383 8384 tp->usrwide = width; 8385 8386 ncr_negotiate(np, tp); 8387 } 8388 8389 static void ncr53c8xx_get_signalling(struct Scsi_Host *shost) 8390 { 8391 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8392 enum spi_signal_type type; 8393 8394 switch (np->scsi_mode) { 8395 case SMODE_SE: 8396 type = SPI_SIGNAL_SE; 8397 break; 8398 case SMODE_HVD: 8399 type = SPI_SIGNAL_HVD; 8400 break; 8401 default: 8402 type = SPI_SIGNAL_UNKNOWN; 8403 break; 8404 } 8405 spi_signalling(shost) = type; 8406 } 8407 8408 static struct spi_function_template ncr53c8xx_transport_functions = { 8409 .set_period = ncr53c8xx_set_period, 8410 .show_period = 1, 8411 .set_offset = ncr53c8xx_set_offset, 8412 .show_offset = 1, 8413 .set_width = ncr53c8xx_set_width, 8414 .show_width = 1, 8415 .get_signalling = ncr53c8xx_get_signalling, 8416 }; 8417 8418 int __init ncr53c8xx_init(void) 8419 { 8420 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions); 8421 if (!ncr53c8xx_transport_template) 8422 return -ENODEV; 8423 return 0; 8424 } 8425 8426 void ncr53c8xx_exit(void) 8427 { 8428 spi_release_transport(ncr53c8xx_transport_template); 8429 } 8430