xref: /openbmc/linux/drivers/scsi/ncr53c8xx.c (revision 911b8eac)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /******************************************************************************
3 **  Device driver for the PCI-SCSI NCR538XX controller family.
4 **
5 **  Copyright (C) 1994  Wolfgang Stanglmeier
6 **
7 **
8 **-----------------------------------------------------------------------------
9 **
10 **  This driver has been ported to Linux from the FreeBSD NCR53C8XX driver
11 **  and is currently maintained by
12 **
13 **          Gerard Roudier              <groudier@free.fr>
14 **
15 **  Being given that this driver originates from the FreeBSD version, and
16 **  in order to keep synergy on both, any suggested enhancements and corrections
17 **  received on Linux are automatically a potential candidate for the FreeBSD
18 **  version.
19 **
20 **  The original driver has been written for 386bsd and FreeBSD by
21 **          Wolfgang Stanglmeier        <wolf@cologne.de>
22 **          Stefan Esser                <se@mi.Uni-Koeln.de>
23 **
24 **  And has been ported to NetBSD by
25 **          Charles M. Hannum           <mycroft@gnu.ai.mit.edu>
26 **
27 **-----------------------------------------------------------------------------
28 **
29 **                     Brief history
30 **
31 **  December 10 1995 by Gerard Roudier:
32 **     Initial port to Linux.
33 **
34 **  June 23 1996 by Gerard Roudier:
35 **     Support for 64 bits architectures (Alpha).
36 **
37 **  November 30 1996 by Gerard Roudier:
38 **     Support for Fast-20 scsi.
39 **     Support for large DMA fifo and 128 dwords bursting.
40 **
41 **  February 27 1997 by Gerard Roudier:
42 **     Support for Fast-40 scsi.
43 **     Support for on-Board RAM.
44 **
45 **  May 3 1997 by Gerard Roudier:
46 **     Full support for scsi scripts instructions pre-fetching.
47 **
48 **  May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>:
49 **     Support for NvRAM detection and reading.
50 **
51 **  August 18 1997 by Cort <cort@cs.nmt.edu>:
52 **     Support for Power/PC (Big Endian).
53 **
54 **  June 20 1998 by Gerard Roudier
55 **     Support for up to 64 tags per lun.
56 **     O(1) everywhere (C and SCRIPTS) for normal cases.
57 **     Low PCI traffic for command handling when on-chip RAM is present.
58 **     Aggressive SCSI SCRIPTS optimizations.
59 **
60 **  2005 by Matthew Wilcox and James Bottomley
61 **     PCI-ectomy.  This driver now supports only the 720 chip (see the
62 **     NCR_Q720 and zalon drivers for the bus probe logic).
63 **
64 *******************************************************************************
65 */
66 
67 /*
68 **	Supported SCSI-II features:
69 **	    Synchronous negotiation
70 **	    Wide negotiation        (depends on the NCR Chip)
71 **	    Enable disconnection
72 **	    Tagged command queuing
73 **	    Parity checking
74 **	    Etc...
75 **
76 **	Supported NCR/SYMBIOS chips:
77 **		53C720		(Wide,   Fast SCSI-2, intfly problems)
78 */
79 
80 /* Name and version of the driver */
81 #define SCSI_NCR_DRIVER_NAME	"ncr53c8xx-3.4.3g"
82 
83 #define SCSI_NCR_DEBUG_FLAGS	(0)
84 
85 #include <linux/blkdev.h>
86 #include <linux/delay.h>
87 #include <linux/dma-mapping.h>
88 #include <linux/errno.h>
89 #include <linux/gfp.h>
90 #include <linux/init.h>
91 #include <linux/interrupt.h>
92 #include <linux/ioport.h>
93 #include <linux/mm.h>
94 #include <linux/module.h>
95 #include <linux/sched.h>
96 #include <linux/signal.h>
97 #include <linux/spinlock.h>
98 #include <linux/stat.h>
99 #include <linux/string.h>
100 #include <linux/time.h>
101 #include <linux/timer.h>
102 #include <linux/types.h>
103 
104 #include <asm/dma.h>
105 #include <asm/io.h>
106 
107 #include <scsi/scsi.h>
108 #include <scsi/scsi_cmnd.h>
109 #include <scsi/scsi_dbg.h>
110 #include <scsi/scsi_device.h>
111 #include <scsi/scsi_tcq.h>
112 #include <scsi/scsi_transport.h>
113 #include <scsi/scsi_transport_spi.h>
114 
115 #include "ncr53c8xx.h"
116 
117 #define NAME53C8XX		"ncr53c8xx"
118 
119 /*==========================================================
120 **
121 **	Debugging tags
122 **
123 **==========================================================
124 */
125 
126 #define DEBUG_ALLOC    (0x0001)
127 #define DEBUG_PHASE    (0x0002)
128 #define DEBUG_QUEUE    (0x0008)
129 #define DEBUG_RESULT   (0x0010)
130 #define DEBUG_POINTER  (0x0020)
131 #define DEBUG_SCRIPT   (0x0040)
132 #define DEBUG_TINY     (0x0080)
133 #define DEBUG_TIMING   (0x0100)
134 #define DEBUG_NEGO     (0x0200)
135 #define DEBUG_TAGS     (0x0400)
136 #define DEBUG_SCATTER  (0x0800)
137 #define DEBUG_IC        (0x1000)
138 
139 /*
140 **    Enable/Disable debug messages.
141 **    Can be changed at runtime too.
142 */
143 
144 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
145 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
146 	#define DEBUG_FLAGS ncr_debug
147 #else
148 	#define DEBUG_FLAGS	SCSI_NCR_DEBUG_FLAGS
149 #endif
150 
151 static inline struct list_head *ncr_list_pop(struct list_head *head)
152 {
153 	if (!list_empty(head)) {
154 		struct list_head *elem = head->next;
155 
156 		list_del(elem);
157 		return elem;
158 	}
159 
160 	return NULL;
161 }
162 
163 /*==========================================================
164 **
165 **	Simple power of two buddy-like allocator.
166 **
167 **	This simple code is not intended to be fast, but to
168 **	provide power of 2 aligned memory allocations.
169 **	Since the SCRIPTS processor only supplies 8 bit
170 **	arithmetic, this allocator allows simple and fast
171 **	address calculations  from the SCRIPTS code.
172 **	In addition, cache line alignment is guaranteed for
173 **	power of 2 cache line size.
174 **	Enhanced in linux-2.3.44 to provide a memory pool
175 **	per pcidev to support dynamic dma mapping. (I would
176 **	have preferred a real bus abstraction, btw).
177 **
178 **==========================================================
179 */
180 
181 #define MEMO_SHIFT	4	/* 16 bytes minimum memory chunk */
182 #if PAGE_SIZE >= 8192
183 #define MEMO_PAGE_ORDER	0	/* 1 PAGE  maximum */
184 #else
185 #define MEMO_PAGE_ORDER	1	/* 2 PAGES maximum */
186 #endif
187 #define MEMO_FREE_UNUSED	/* Free unused pages immediately */
188 #define MEMO_WARN	1
189 #define MEMO_GFP_FLAGS	GFP_ATOMIC
190 #define MEMO_CLUSTER_SHIFT	(PAGE_SHIFT+MEMO_PAGE_ORDER)
191 #define MEMO_CLUSTER_SIZE	(1UL << MEMO_CLUSTER_SHIFT)
192 #define MEMO_CLUSTER_MASK	(MEMO_CLUSTER_SIZE-1)
193 
194 typedef u_long m_addr_t;	/* Enough bits to bit-hack addresses */
195 typedef struct device *m_bush_t;	/* Something that addresses DMAable */
196 
197 typedef struct m_link {		/* Link between free memory chunks */
198 	struct m_link *next;
199 } m_link_s;
200 
201 typedef struct m_vtob {		/* Virtual to Bus address translation */
202 	struct m_vtob *next;
203 	m_addr_t vaddr;
204 	m_addr_t baddr;
205 } m_vtob_s;
206 #define VTOB_HASH_SHIFT		5
207 #define VTOB_HASH_SIZE		(1UL << VTOB_HASH_SHIFT)
208 #define VTOB_HASH_MASK		(VTOB_HASH_SIZE-1)
209 #define VTOB_HASH_CODE(m)	\
210 	((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
211 
212 typedef struct m_pool {		/* Memory pool of a given kind */
213 	m_bush_t bush;
214 	m_addr_t (*getp)(struct m_pool *);
215 	void (*freep)(struct m_pool *, m_addr_t);
216 	int nump;
217 	m_vtob_s *(vtob[VTOB_HASH_SIZE]);
218 	struct m_pool *next;
219 	struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
220 } m_pool_s;
221 
222 static void *___m_alloc(m_pool_s *mp, int size)
223 {
224 	int i = 0;
225 	int s = (1 << MEMO_SHIFT);
226 	int j;
227 	m_addr_t a;
228 	m_link_s *h = mp->h;
229 
230 	if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
231 		return NULL;
232 
233 	while (size > s) {
234 		s <<= 1;
235 		++i;
236 	}
237 
238 	j = i;
239 	while (!h[j].next) {
240 		if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
241 			h[j].next = (m_link_s *)mp->getp(mp);
242 			if (h[j].next)
243 				h[j].next->next = NULL;
244 			break;
245 		}
246 		++j;
247 		s <<= 1;
248 	}
249 	a = (m_addr_t) h[j].next;
250 	if (a) {
251 		h[j].next = h[j].next->next;
252 		while (j > i) {
253 			j -= 1;
254 			s >>= 1;
255 			h[j].next = (m_link_s *) (a+s);
256 			h[j].next->next = NULL;
257 		}
258 	}
259 #ifdef DEBUG
260 	printk("___m_alloc(%d) = %p\n", size, (void *) a);
261 #endif
262 	return (void *) a;
263 }
264 
265 static void ___m_free(m_pool_s *mp, void *ptr, int size)
266 {
267 	int i = 0;
268 	int s = (1 << MEMO_SHIFT);
269 	m_link_s *q;
270 	m_addr_t a, b;
271 	m_link_s *h = mp->h;
272 
273 #ifdef DEBUG
274 	printk("___m_free(%p, %d)\n", ptr, size);
275 #endif
276 
277 	if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
278 		return;
279 
280 	while (size > s) {
281 		s <<= 1;
282 		++i;
283 	}
284 
285 	a = (m_addr_t) ptr;
286 
287 	while (1) {
288 #ifdef MEMO_FREE_UNUSED
289 		if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
290 			mp->freep(mp, a);
291 			break;
292 		}
293 #endif
294 		b = a ^ s;
295 		q = &h[i];
296 		while (q->next && q->next != (m_link_s *) b) {
297 			q = q->next;
298 		}
299 		if (!q->next) {
300 			((m_link_s *) a)->next = h[i].next;
301 			h[i].next = (m_link_s *) a;
302 			break;
303 		}
304 		q->next = q->next->next;
305 		a = a & b;
306 		s <<= 1;
307 		++i;
308 	}
309 }
310 
311 static DEFINE_SPINLOCK(ncr53c8xx_lock);
312 
313 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
314 {
315 	void *p;
316 
317 	p = ___m_alloc(mp, size);
318 
319 	if (DEBUG_FLAGS & DEBUG_ALLOC)
320 		printk ("new %-10s[%4d] @%p.\n", name, size, p);
321 
322 	if (p)
323 		memset(p, 0, size);
324 	else if (uflags & MEMO_WARN)
325 		printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
326 
327 	return p;
328 }
329 
330 #define __m_calloc(mp, s, n)	__m_calloc2(mp, s, n, MEMO_WARN)
331 
332 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
333 {
334 	if (DEBUG_FLAGS & DEBUG_ALLOC)
335 		printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
336 
337 	___m_free(mp, ptr, size);
338 
339 }
340 
341 /*
342  * With pci bus iommu support, we use a default pool of unmapped memory
343  * for memory we donnot need to DMA from/to and one pool per pcidev for
344  * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
345  */
346 
347 static m_addr_t ___mp0_getp(m_pool_s *mp)
348 {
349 	m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER);
350 	if (m)
351 		++mp->nump;
352 	return m;
353 }
354 
355 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
356 {
357 	free_pages(m, MEMO_PAGE_ORDER);
358 	--mp->nump;
359 }
360 
361 static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep};
362 
363 /*
364  * DMAable pools.
365  */
366 
367 /*
368  * With pci bus iommu support, we maintain one pool per pcidev and a
369  * hashed reverse table for virtual to bus physical address translations.
370  */
371 static m_addr_t ___dma_getp(m_pool_s *mp)
372 {
373 	m_addr_t vp;
374 	m_vtob_s *vbp;
375 
376 	vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
377 	if (vbp) {
378 		dma_addr_t daddr;
379 		vp = (m_addr_t) dma_alloc_coherent(mp->bush,
380 						PAGE_SIZE<<MEMO_PAGE_ORDER,
381 						&daddr, GFP_ATOMIC);
382 		if (vp) {
383 			int hc = VTOB_HASH_CODE(vp);
384 			vbp->vaddr = vp;
385 			vbp->baddr = daddr;
386 			vbp->next = mp->vtob[hc];
387 			mp->vtob[hc] = vbp;
388 			++mp->nump;
389 			return vp;
390 		}
391 	}
392 	if (vbp)
393 		__m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
394 	return 0;
395 }
396 
397 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
398 {
399 	m_vtob_s **vbpp, *vbp;
400 	int hc = VTOB_HASH_CODE(m);
401 
402 	vbpp = &mp->vtob[hc];
403 	while (*vbpp && (*vbpp)->vaddr != m)
404 		vbpp = &(*vbpp)->next;
405 	if (*vbpp) {
406 		vbp = *vbpp;
407 		*vbpp = (*vbpp)->next;
408 		dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
409 				  (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
410 		__m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
411 		--mp->nump;
412 	}
413 }
414 
415 static inline m_pool_s *___get_dma_pool(m_bush_t bush)
416 {
417 	m_pool_s *mp;
418 	for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
419 	return mp;
420 }
421 
422 static m_pool_s *___cre_dma_pool(m_bush_t bush)
423 {
424 	m_pool_s *mp;
425 	mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
426 	if (mp) {
427 		memset(mp, 0, sizeof(*mp));
428 		mp->bush = bush;
429 		mp->getp = ___dma_getp;
430 		mp->freep = ___dma_freep;
431 		mp->next = mp0.next;
432 		mp0.next = mp;
433 	}
434 	return mp;
435 }
436 
437 static void ___del_dma_pool(m_pool_s *p)
438 {
439 	struct m_pool **pp = &mp0.next;
440 
441 	while (*pp && *pp != p)
442 		pp = &(*pp)->next;
443 	if (*pp) {
444 		*pp = (*pp)->next;
445 		__m_free(&mp0, p, sizeof(*p), "MPOOL");
446 	}
447 }
448 
449 static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
450 {
451 	u_long flags;
452 	struct m_pool *mp;
453 	void *m = NULL;
454 
455 	spin_lock_irqsave(&ncr53c8xx_lock, flags);
456 	mp = ___get_dma_pool(bush);
457 	if (!mp)
458 		mp = ___cre_dma_pool(bush);
459 	if (mp)
460 		m = __m_calloc(mp, size, name);
461 	if (mp && !mp->nump)
462 		___del_dma_pool(mp);
463 	spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
464 
465 	return m;
466 }
467 
468 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
469 {
470 	u_long flags;
471 	struct m_pool *mp;
472 
473 	spin_lock_irqsave(&ncr53c8xx_lock, flags);
474 	mp = ___get_dma_pool(bush);
475 	if (mp)
476 		__m_free(mp, m, size, name);
477 	if (mp && !mp->nump)
478 		___del_dma_pool(mp);
479 	spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
480 }
481 
482 static m_addr_t __vtobus(m_bush_t bush, void *m)
483 {
484 	u_long flags;
485 	m_pool_s *mp;
486 	int hc = VTOB_HASH_CODE(m);
487 	m_vtob_s *vp = NULL;
488 	m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
489 
490 	spin_lock_irqsave(&ncr53c8xx_lock, flags);
491 	mp = ___get_dma_pool(bush);
492 	if (mp) {
493 		vp = mp->vtob[hc];
494 		while (vp && (m_addr_t) vp->vaddr != a)
495 			vp = vp->next;
496 	}
497 	spin_unlock_irqrestore(&ncr53c8xx_lock, flags);
498 	return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
499 }
500 
501 #define _m_calloc_dma(np, s, n)		__m_calloc_dma(np->dev, s, n)
502 #define _m_free_dma(np, p, s, n)	__m_free_dma(np->dev, p, s, n)
503 #define m_calloc_dma(s, n)		_m_calloc_dma(np, s, n)
504 #define m_free_dma(p, s, n)		_m_free_dma(np, p, s, n)
505 #define _vtobus(np, p)			__vtobus(np->dev, p)
506 #define vtobus(p)			_vtobus(np, p)
507 
508 /*
509  *  Deal with DMA mapping/unmapping.
510  */
511 
512 /* To keep track of the dma mapping (sg/single) that has been set */
513 #define __data_mapped	SCp.phase
514 #define __data_mapping	SCp.have_data_in
515 
516 static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd)
517 {
518 	switch(cmd->__data_mapped) {
519 	case 2:
520 		scsi_dma_unmap(cmd);
521 		break;
522 	}
523 	cmd->__data_mapped = 0;
524 }
525 
526 static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd)
527 {
528 	int use_sg;
529 
530 	use_sg = scsi_dma_map(cmd);
531 	if (!use_sg)
532 		return 0;
533 
534 	cmd->__data_mapped = 2;
535 	cmd->__data_mapping = use_sg;
536 
537 	return use_sg;
538 }
539 
540 #define unmap_scsi_data(np, cmd)	__unmap_scsi_data(np->dev, cmd)
541 #define map_scsi_sg_data(np, cmd)	__map_scsi_sg_data(np->dev, cmd)
542 
543 /*==========================================================
544 **
545 **	Driver setup.
546 **
547 **	This structure is initialized from linux config
548 **	options. It can be overridden at boot-up by the boot
549 **	command line.
550 **
551 **==========================================================
552 */
553 static struct ncr_driver_setup
554 	driver_setup			= SCSI_NCR_DRIVER_SETUP;
555 
556 #ifndef MODULE
557 #ifdef	SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
558 static struct ncr_driver_setup
559 	driver_safe_setup __initdata	= SCSI_NCR_DRIVER_SAFE_SETUP;
560 #endif
561 #endif /* !MODULE */
562 
563 #define initverbose (driver_setup.verbose)
564 #define bootverbose (np->verbose)
565 
566 
567 /*===================================================================
568 **
569 **	Driver setup from the boot command line
570 **
571 **===================================================================
572 */
573 
574 #ifdef MODULE
575 #define	ARG_SEP	' '
576 #else
577 #define	ARG_SEP	','
578 #endif
579 
580 #define OPT_TAGS		1
581 #define OPT_MASTER_PARITY	2
582 #define OPT_SCSI_PARITY		3
583 #define OPT_DISCONNECTION	4
584 #define OPT_SPECIAL_FEATURES	5
585 #define OPT_UNUSED_1		6
586 #define OPT_FORCE_SYNC_NEGO	7
587 #define OPT_REVERSE_PROBE	8
588 #define OPT_DEFAULT_SYNC	9
589 #define OPT_VERBOSE		10
590 #define OPT_DEBUG		11
591 #define OPT_BURST_MAX		12
592 #define OPT_LED_PIN		13
593 #define OPT_MAX_WIDE		14
594 #define OPT_SETTLE_DELAY	15
595 #define OPT_DIFF_SUPPORT	16
596 #define OPT_IRQM		17
597 #define OPT_PCI_FIX_UP		18
598 #define OPT_BUS_CHECK		19
599 #define OPT_OPTIMIZE		20
600 #define OPT_RECOVERY		21
601 #define OPT_SAFE_SETUP		22
602 #define OPT_USE_NVRAM		23
603 #define OPT_EXCLUDE		24
604 #define OPT_HOST_ID		25
605 
606 #ifdef SCSI_NCR_IARB_SUPPORT
607 #define OPT_IARB		26
608 #endif
609 
610 #ifdef MODULE
611 #define	ARG_SEP	' '
612 #else
613 #define	ARG_SEP	','
614 #endif
615 
616 #ifndef MODULE
617 static char setup_token[] __initdata =
618 	"tags:"   "mpar:"
619 	"spar:"   "disc:"
620 	"specf:"  "ultra:"
621 	"fsn:"    "revprob:"
622 	"sync:"   "verb:"
623 	"debug:"  "burst:"
624 	"led:"    "wide:"
625 	"settle:" "diff:"
626 	"irqm:"   "pcifix:"
627 	"buschk:" "optim:"
628 	"recovery:"
629 	"safe:"   "nvram:"
630 	"excl:"   "hostid:"
631 #ifdef SCSI_NCR_IARB_SUPPORT
632 	"iarb:"
633 #endif
634 	;	/* DONNOT REMOVE THIS ';' */
635 
636 static int __init get_setup_token(char *p)
637 {
638 	char *cur = setup_token;
639 	char *pc;
640 	int i = 0;
641 
642 	while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
643 		++pc;
644 		++i;
645 		if (!strncmp(p, cur, pc - cur))
646 			return i;
647 		cur = pc;
648 	}
649 	return 0;
650 }
651 
652 static int __init sym53c8xx__setup(char *str)
653 {
654 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
655 	char *cur = str;
656 	char *pc, *pv;
657 	int i, val, c;
658 	int xi = 0;
659 
660 	while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
661 		char *pe;
662 
663 		val = 0;
664 		pv = pc;
665 		c = *++pv;
666 
667 		if	(c == 'n')
668 			val = 0;
669 		else if	(c == 'y')
670 			val = 1;
671 		else
672 			val = (int) simple_strtoul(pv, &pe, 0);
673 
674 		switch (get_setup_token(cur)) {
675 		case OPT_TAGS:
676 			driver_setup.default_tags = val;
677 			if (pe && *pe == '/') {
678 				i = 0;
679 				while (*pe && *pe != ARG_SEP &&
680 					i < sizeof(driver_setup.tag_ctrl)-1) {
681 					driver_setup.tag_ctrl[i++] = *pe++;
682 				}
683 				driver_setup.tag_ctrl[i] = '\0';
684 			}
685 			break;
686 		case OPT_MASTER_PARITY:
687 			driver_setup.master_parity = val;
688 			break;
689 		case OPT_SCSI_PARITY:
690 			driver_setup.scsi_parity = val;
691 			break;
692 		case OPT_DISCONNECTION:
693 			driver_setup.disconnection = val;
694 			break;
695 		case OPT_SPECIAL_FEATURES:
696 			driver_setup.special_features = val;
697 			break;
698 		case OPT_FORCE_SYNC_NEGO:
699 			driver_setup.force_sync_nego = val;
700 			break;
701 		case OPT_REVERSE_PROBE:
702 			driver_setup.reverse_probe = val;
703 			break;
704 		case OPT_DEFAULT_SYNC:
705 			driver_setup.default_sync = val;
706 			break;
707 		case OPT_VERBOSE:
708 			driver_setup.verbose = val;
709 			break;
710 		case OPT_DEBUG:
711 			driver_setup.debug = val;
712 			break;
713 		case OPT_BURST_MAX:
714 			driver_setup.burst_max = val;
715 			break;
716 		case OPT_LED_PIN:
717 			driver_setup.led_pin = val;
718 			break;
719 		case OPT_MAX_WIDE:
720 			driver_setup.max_wide = val? 1:0;
721 			break;
722 		case OPT_SETTLE_DELAY:
723 			driver_setup.settle_delay = val;
724 			break;
725 		case OPT_DIFF_SUPPORT:
726 			driver_setup.diff_support = val;
727 			break;
728 		case OPT_IRQM:
729 			driver_setup.irqm = val;
730 			break;
731 		case OPT_PCI_FIX_UP:
732 			driver_setup.pci_fix_up	= val;
733 			break;
734 		case OPT_BUS_CHECK:
735 			driver_setup.bus_check = val;
736 			break;
737 		case OPT_OPTIMIZE:
738 			driver_setup.optimize = val;
739 			break;
740 		case OPT_RECOVERY:
741 			driver_setup.recovery = val;
742 			break;
743 		case OPT_USE_NVRAM:
744 			driver_setup.use_nvram = val;
745 			break;
746 		case OPT_SAFE_SETUP:
747 			memcpy(&driver_setup, &driver_safe_setup,
748 				sizeof(driver_setup));
749 			break;
750 		case OPT_EXCLUDE:
751 			if (xi < SCSI_NCR_MAX_EXCLUDES)
752 				driver_setup.excludes[xi++] = val;
753 			break;
754 		case OPT_HOST_ID:
755 			driver_setup.host_id = val;
756 			break;
757 #ifdef SCSI_NCR_IARB_SUPPORT
758 		case OPT_IARB:
759 			driver_setup.iarb = val;
760 			break;
761 #endif
762 		default:
763 			printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
764 			break;
765 		}
766 
767 		if ((cur = strchr(cur, ARG_SEP)) != NULL)
768 			++cur;
769 	}
770 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
771 	return 1;
772 }
773 #endif /* !MODULE */
774 
775 /*===================================================================
776 **
777 **	Get device queue depth from boot command line.
778 **
779 **===================================================================
780 */
781 #define DEF_DEPTH	(driver_setup.default_tags)
782 #define ALL_TARGETS	-2
783 #define NO_TARGET	-1
784 #define ALL_LUNS	-2
785 #define NO_LUN		-1
786 
787 static int device_queue_depth(int unit, int target, int lun)
788 {
789 	int c, h, t, u, v;
790 	char *p = driver_setup.tag_ctrl;
791 	char *ep;
792 
793 	h = -1;
794 	t = NO_TARGET;
795 	u = NO_LUN;
796 	while ((c = *p++) != 0) {
797 		v = simple_strtoul(p, &ep, 0);
798 		switch(c) {
799 		case '/':
800 			++h;
801 			t = ALL_TARGETS;
802 			u = ALL_LUNS;
803 			break;
804 		case 't':
805 			if (t != target)
806 				t = (target == v) ? v : NO_TARGET;
807 			u = ALL_LUNS;
808 			break;
809 		case 'u':
810 			if (u != lun)
811 				u = (lun == v) ? v : NO_LUN;
812 			break;
813 		case 'q':
814 			if (h == unit &&
815 				(t == ALL_TARGETS || t == target) &&
816 				(u == ALL_LUNS    || u == lun))
817 				return v;
818 			break;
819 		case '-':
820 			t = ALL_TARGETS;
821 			u = ALL_LUNS;
822 			break;
823 		default:
824 			break;
825 		}
826 		p = ep;
827 	}
828 	return DEF_DEPTH;
829 }
830 
831 
832 /*==========================================================
833 **
834 **	The CCB done queue uses an array of CCB virtual
835 **	addresses. Empty entries are flagged using the bogus
836 **	virtual address 0xffffffff.
837 **
838 **	Since PCI ensures that only aligned DWORDs are accessed
839 **	atomically, 64 bit little-endian architecture requires
840 **	to test the high order DWORD of the entry to determine
841 **	if it is empty or valid.
842 **
843 **	BTW, I will make things differently as soon as I will
844 **	have a better idea, but this is simple and should work.
845 **
846 **==========================================================
847 */
848 
849 #define SCSI_NCR_CCB_DONE_SUPPORT
850 #ifdef  SCSI_NCR_CCB_DONE_SUPPORT
851 
852 #define MAX_DONE 24
853 #define CCB_DONE_EMPTY 0xffffffffUL
854 
855 /* All 32 bit architectures */
856 #if BITS_PER_LONG == 32
857 #define CCB_DONE_VALID(cp)  (((u_long) cp) != CCB_DONE_EMPTY)
858 
859 /* All > 32 bit (64 bit) architectures regardless endian-ness */
860 #else
861 #define CCB_DONE_VALID(cp)  \
862 	((((u_long) cp) & 0xffffffff00000000ul) && 	\
863 	 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY)
864 #endif
865 
866 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
867 
868 /*==========================================================
869 **
870 **	Configuration and Debugging
871 **
872 **==========================================================
873 */
874 
875 /*
876 **    SCSI address of this device.
877 **    The boot routines should have set it.
878 **    If not, use this.
879 */
880 
881 #ifndef SCSI_NCR_MYADDR
882 #define SCSI_NCR_MYADDR      (7)
883 #endif
884 
885 /*
886 **    The maximum number of tags per logic unit.
887 **    Used only for disk devices that support tags.
888 */
889 
890 #ifndef SCSI_NCR_MAX_TAGS
891 #define SCSI_NCR_MAX_TAGS    (8)
892 #endif
893 
894 /*
895 **    TAGS are actually limited to 64 tags/lun.
896 **    We need to deal with power of 2, for alignment constraints.
897 */
898 #if	SCSI_NCR_MAX_TAGS > 64
899 #define	MAX_TAGS (64)
900 #else
901 #define	MAX_TAGS SCSI_NCR_MAX_TAGS
902 #endif
903 
904 #define NO_TAG	(255)
905 
906 /*
907 **	Choose appropriate type for tag bitmap.
908 */
909 #if	MAX_TAGS > 32
910 typedef u64 tagmap_t;
911 #else
912 typedef u32 tagmap_t;
913 #endif
914 
915 /*
916 **    Number of targets supported by the driver.
917 **    n permits target numbers 0..n-1.
918 **    Default is 16, meaning targets #0..#15.
919 **    #7 .. is myself.
920 */
921 
922 #ifdef SCSI_NCR_MAX_TARGET
923 #define MAX_TARGET  (SCSI_NCR_MAX_TARGET)
924 #else
925 #define MAX_TARGET  (16)
926 #endif
927 
928 /*
929 **    Number of logic units supported by the driver.
930 **    n enables logic unit numbers 0..n-1.
931 **    The common SCSI devices require only
932 **    one lun, so take 1 as the default.
933 */
934 
935 #ifdef SCSI_NCR_MAX_LUN
936 #define MAX_LUN    SCSI_NCR_MAX_LUN
937 #else
938 #define MAX_LUN    (1)
939 #endif
940 
941 /*
942 **    Asynchronous pre-scaler (ns). Shall be 40
943 */
944 
945 #ifndef SCSI_NCR_MIN_ASYNC
946 #define SCSI_NCR_MIN_ASYNC (40)
947 #endif
948 
949 /*
950 **    The maximum number of jobs scheduled for starting.
951 **    There should be one slot per target, and one slot
952 **    for each tag of each target in use.
953 **    The calculation below is actually quite silly ...
954 */
955 
956 #ifdef SCSI_NCR_CAN_QUEUE
957 #define MAX_START   (SCSI_NCR_CAN_QUEUE + 4)
958 #else
959 #define MAX_START   (MAX_TARGET + 7 * MAX_TAGS)
960 #endif
961 
962 /*
963 **   We limit the max number of pending IO to 250.
964 **   since we donnot want to allocate more than 1
965 **   PAGE for 'scripth'.
966 */
967 #if	MAX_START > 250
968 #undef	MAX_START
969 #define	MAX_START 250
970 #endif
971 
972 /*
973 **    The maximum number of segments a transfer is split into.
974 **    We support up to 127 segments for both read and write.
975 **    The data scripts are broken into 2 sub-scripts.
976 **    80 (MAX_SCATTERL) segments are moved from a sub-script
977 **    in on-chip RAM. This makes data transfers shorter than
978 **    80k (assuming 1k fs) as fast as possible.
979 */
980 
981 #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
982 
983 #if (MAX_SCATTER > 80)
984 #define MAX_SCATTERL	80
985 #define	MAX_SCATTERH	(MAX_SCATTER - MAX_SCATTERL)
986 #else
987 #define MAX_SCATTERL	(MAX_SCATTER-1)
988 #define	MAX_SCATTERH	1
989 #endif
990 
991 /*
992 **	other
993 */
994 
995 #define NCR_SNOOP_TIMEOUT (1000000)
996 
997 /*
998 **	Other definitions
999 */
1000 
1001 #define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f))
1002 
1003 #define initverbose (driver_setup.verbose)
1004 #define bootverbose (np->verbose)
1005 
1006 /*==========================================================
1007 **
1008 **	Command control block states.
1009 **
1010 **==========================================================
1011 */
1012 
1013 #define HS_IDLE		(0)
1014 #define HS_BUSY		(1)
1015 #define HS_NEGOTIATE	(2)	/* sync/wide data transfer*/
1016 #define HS_DISCONNECT	(3)	/* Disconnected by target */
1017 
1018 #define HS_DONEMASK	(0x80)
1019 #define HS_COMPLETE	(4|HS_DONEMASK)
1020 #define HS_SEL_TIMEOUT	(5|HS_DONEMASK)	/* Selection timeout      */
1021 #define HS_RESET	(6|HS_DONEMASK)	/* SCSI reset	          */
1022 #define HS_ABORTED	(7|HS_DONEMASK)	/* Transfer aborted       */
1023 #define HS_TIMEOUT	(8|HS_DONEMASK)	/* Software timeout       */
1024 #define HS_FAIL		(9|HS_DONEMASK)	/* SCSI or PCI bus errors */
1025 #define HS_UNEXPECTED	(10|HS_DONEMASK)/* Unexpected disconnect  */
1026 
1027 /*
1028 **	Invalid host status values used by the SCRIPTS processor
1029 **	when the nexus is not fully identified.
1030 **	Shall never appear in a CCB.
1031 */
1032 
1033 #define HS_INVALMASK	(0x40)
1034 #define	HS_SELECTING	(0|HS_INVALMASK)
1035 #define	HS_IN_RESELECT	(1|HS_INVALMASK)
1036 #define	HS_STARTING	(2|HS_INVALMASK)
1037 
1038 /*
1039 **	Flags set by the SCRIPT processor for commands
1040 **	that have been skipped.
1041 */
1042 #define HS_SKIPMASK	(0x20)
1043 
1044 /*==========================================================
1045 **
1046 **	Software Interrupt Codes
1047 **
1048 **==========================================================
1049 */
1050 
1051 #define	SIR_BAD_STATUS		(1)
1052 #define	SIR_XXXXXXXXXX		(2)
1053 #define	SIR_NEGO_SYNC		(3)
1054 #define	SIR_NEGO_WIDE		(4)
1055 #define	SIR_NEGO_FAILED		(5)
1056 #define	SIR_NEGO_PROTO		(6)
1057 #define	SIR_REJECT_RECEIVED	(7)
1058 #define	SIR_REJECT_SENT		(8)
1059 #define	SIR_IGN_RESIDUE		(9)
1060 #define	SIR_MISSING_SAVE	(10)
1061 #define	SIR_RESEL_NO_MSG_IN	(11)
1062 #define	SIR_RESEL_NO_IDENTIFY	(12)
1063 #define	SIR_RESEL_BAD_LUN	(13)
1064 #define	SIR_RESEL_BAD_TARGET	(14)
1065 #define	SIR_RESEL_BAD_I_T_L	(15)
1066 #define	SIR_RESEL_BAD_I_T_L_Q	(16)
1067 #define	SIR_DONE_OVERFLOW	(17)
1068 #define	SIR_INTFLY		(18)
1069 #define	SIR_MAX			(18)
1070 
1071 /*==========================================================
1072 **
1073 **	Extended error codes.
1074 **	xerr_status field of struct ccb.
1075 **
1076 **==========================================================
1077 */
1078 
1079 #define	XE_OK		(0)
1080 #define	XE_EXTRA_DATA	(1)	/* unexpected data phase */
1081 #define	XE_BAD_PHASE	(2)	/* illegal phase (4/5)   */
1082 
1083 /*==========================================================
1084 **
1085 **	Negotiation status.
1086 **	nego_status field	of struct ccb.
1087 **
1088 **==========================================================
1089 */
1090 
1091 #define NS_NOCHANGE	(0)
1092 #define NS_SYNC		(1)
1093 #define NS_WIDE		(2)
1094 #define NS_PPR		(4)
1095 
1096 /*==========================================================
1097 **
1098 **	Misc.
1099 **
1100 **==========================================================
1101 */
1102 
1103 #define CCB_MAGIC	(0xf2691ad2)
1104 
1105 /*==========================================================
1106 **
1107 **	Declaration of structs.
1108 **
1109 **==========================================================
1110 */
1111 
1112 static struct scsi_transport_template *ncr53c8xx_transport_template = NULL;
1113 
1114 struct tcb;
1115 struct lcb;
1116 struct ccb;
1117 struct ncb;
1118 struct script;
1119 
1120 struct link {
1121 	ncrcmd	l_cmd;
1122 	ncrcmd	l_paddr;
1123 };
1124 
1125 struct	usrcmd {
1126 	u_long	target;
1127 	u_long	lun;
1128 	u_long	data;
1129 	u_long	cmd;
1130 };
1131 
1132 #define UC_SETSYNC      10
1133 #define UC_SETTAGS	11
1134 #define UC_SETDEBUG	12
1135 #define UC_SETORDER	13
1136 #define UC_SETWIDE	14
1137 #define UC_SETFLAG	15
1138 #define UC_SETVERBOSE	17
1139 
1140 #define	UF_TRACE	(0x01)
1141 #define	UF_NODISC	(0x02)
1142 #define	UF_NOSCAN	(0x04)
1143 
1144 /*========================================================================
1145 **
1146 **	Declaration of structs:		target control block
1147 **
1148 **========================================================================
1149 */
1150 struct tcb {
1151 	/*----------------------------------------------------------------
1152 	**	During reselection the ncr jumps to this point with SFBR
1153 	**	set to the encoded target number with bit 7 set.
1154 	**	if it's not this target, jump to the next.
1155 	**
1156 	**	JUMP  IF (SFBR != #target#), @(next tcb)
1157 	**----------------------------------------------------------------
1158 	*/
1159 	struct link   jump_tcb;
1160 
1161 	/*----------------------------------------------------------------
1162 	**	Load the actual values for the sxfer and the scntl3
1163 	**	register (sync/wide mode).
1164 	**
1165 	**	SCR_COPY (1), @(sval field of this tcb), @(sxfer  register)
1166 	**	SCR_COPY (1), @(wval field of this tcb), @(scntl3 register)
1167 	**----------------------------------------------------------------
1168 	*/
1169 	ncrcmd	getscr[6];
1170 
1171 	/*----------------------------------------------------------------
1172 	**	Get the IDENTIFY message and load the LUN to SFBR.
1173 	**
1174 	**	CALL, <RESEL_LUN>
1175 	**----------------------------------------------------------------
1176 	*/
1177 	struct link   call_lun;
1178 
1179 	/*----------------------------------------------------------------
1180 	**	Now look for the right lun.
1181 	**
1182 	**	For i = 0 to 3
1183 	**		SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i)
1184 	**
1185 	**	Recent chips will prefetch the 4 JUMPS using only 1 burst.
1186 	**	It is kind of hashcoding.
1187 	**----------------------------------------------------------------
1188 	*/
1189 	struct link     jump_lcb[4];	/* JUMPs for reselection	*/
1190 	struct lcb *	lp[MAX_LUN];	/* The lcb's of this tcb	*/
1191 
1192 	/*----------------------------------------------------------------
1193 	**	Pointer to the ccb used for negotiation.
1194 	**	Prevent from starting a negotiation for all queued commands
1195 	**	when tagged command queuing is enabled.
1196 	**----------------------------------------------------------------
1197 	*/
1198 	struct ccb *   nego_cp;
1199 
1200 	/*----------------------------------------------------------------
1201 	**	statistical data
1202 	**----------------------------------------------------------------
1203 	*/
1204 	u_long	transfers;
1205 	u_long	bytes;
1206 
1207 	/*----------------------------------------------------------------
1208 	**	negotiation of wide and synch transfer and device quirks.
1209 	**----------------------------------------------------------------
1210 	*/
1211 #ifdef SCSI_NCR_BIG_ENDIAN
1212 /*0*/	u16	period;
1213 /*2*/	u_char	sval;
1214 /*3*/	u_char	minsync;
1215 /*0*/	u_char	wval;
1216 /*1*/	u_char	widedone;
1217 /*2*/	u_char	quirks;
1218 /*3*/	u_char	maxoffs;
1219 #else
1220 /*0*/	u_char	minsync;
1221 /*1*/	u_char	sval;
1222 /*2*/	u16	period;
1223 /*0*/	u_char	maxoffs;
1224 /*1*/	u_char	quirks;
1225 /*2*/	u_char	widedone;
1226 /*3*/	u_char	wval;
1227 #endif
1228 
1229 	/* User settable limits and options.  */
1230 	u_char	usrsync;
1231 	u_char	usrwide;
1232 	u_char	usrtags;
1233 	u_char	usrflag;
1234 	struct scsi_target *starget;
1235 };
1236 
1237 /*========================================================================
1238 **
1239 **	Declaration of structs:		lun control block
1240 **
1241 **========================================================================
1242 */
1243 struct lcb {
1244 	/*----------------------------------------------------------------
1245 	**	During reselection the ncr jumps to this point
1246 	**	with SFBR set to the "Identify" message.
1247 	**	if it's not this lun, jump to the next.
1248 	**
1249 	**	JUMP  IF (SFBR != #lun#), @(next lcb of this target)
1250 	**
1251 	**	It is this lun. Load TEMP with the nexus jumps table
1252 	**	address and jump to RESEL_TAG (or RESEL_NOTAG).
1253 	**
1254 	**		SCR_COPY (4), p_jump_ccb, TEMP,
1255 	**		SCR_JUMP, <RESEL_TAG>
1256 	**----------------------------------------------------------------
1257 	*/
1258 	struct link	jump_lcb;
1259 	ncrcmd		load_jump_ccb[3];
1260 	struct link	jump_tag;
1261 	ncrcmd		p_jump_ccb;	/* Jump table bus address	*/
1262 
1263 	/*----------------------------------------------------------------
1264 	**	Jump table used by the script processor to directly jump
1265 	**	to the CCB corresponding to the reselected nexus.
1266 	**	Address is allocated on 256 bytes boundary in order to
1267 	**	allow 8 bit calculation of the tag jump entry for up to
1268 	**	64 possible tags.
1269 	**----------------------------------------------------------------
1270 	*/
1271 	u32		jump_ccb_0;	/* Default table if no tags	*/
1272 	u32		*jump_ccb;	/* Virtual address		*/
1273 
1274 	/*----------------------------------------------------------------
1275 	**	CCB queue management.
1276 	**----------------------------------------------------------------
1277 	*/
1278 	struct list_head free_ccbq;	/* Queue of available CCBs	*/
1279 	struct list_head busy_ccbq;	/* Queue of busy CCBs		*/
1280 	struct list_head wait_ccbq;	/* Queue of waiting for IO CCBs	*/
1281 	struct list_head skip_ccbq;	/* Queue of skipped CCBs	*/
1282 	u_char		actccbs;	/* Number of allocated CCBs	*/
1283 	u_char		busyccbs;	/* CCBs busy for this lun	*/
1284 	u_char		queuedccbs;	/* CCBs queued to the controller*/
1285 	u_char		queuedepth;	/* Queue depth for this lun	*/
1286 	u_char		scdev_depth;	/* SCSI device queue depth	*/
1287 	u_char		maxnxs;		/* Max possible nexuses		*/
1288 
1289 	/*----------------------------------------------------------------
1290 	**	Control of tagged command queuing.
1291 	**	Tags allocation is performed using a circular buffer.
1292 	**	This avoids using a loop for tag allocation.
1293 	**----------------------------------------------------------------
1294 	*/
1295 	u_char		ia_tag;		/* Allocation index		*/
1296 	u_char		if_tag;		/* Freeing index		*/
1297 	u_char cb_tags[MAX_TAGS];	/* Circular tags buffer	*/
1298 	u_char		usetags;	/* Command queuing is active	*/
1299 	u_char		maxtags;	/* Max nr of tags asked by user	*/
1300 	u_char		numtags;	/* Current number of tags	*/
1301 
1302 	/*----------------------------------------------------------------
1303 	**	QUEUE FULL control and ORDERED tag control.
1304 	**----------------------------------------------------------------
1305 	*/
1306 	/*----------------------------------------------------------------
1307 	**	QUEUE FULL and ORDERED tag control.
1308 	**----------------------------------------------------------------
1309 	*/
1310 	u16		num_good;	/* Nr of GOOD since QUEUE FULL	*/
1311 	tagmap_t	tags_umap;	/* Used tags bitmap		*/
1312 	tagmap_t	tags_smap;	/* Tags in use at 'tag_stime'	*/
1313 	u_long		tags_stime;	/* Last time we set smap=umap	*/
1314 	struct ccb *	held_ccb;	/* CCB held for QUEUE FULL	*/
1315 };
1316 
1317 /*========================================================================
1318 **
1319 **      Declaration of structs:     the launch script.
1320 **
1321 **========================================================================
1322 **
1323 **	It is part of the CCB and is called by the scripts processor to
1324 **	start or restart the data structure (nexus).
1325 **	This 6 DWORDs mini script makes use of prefetching.
1326 **
1327 **------------------------------------------------------------------------
1328 */
1329 struct launch {
1330 	/*----------------------------------------------------------------
1331 	**	SCR_COPY(4),	@(p_phys), @(dsa register)
1332 	**	SCR_JUMP,	@(scheduler_point)
1333 	**----------------------------------------------------------------
1334 	*/
1335 	ncrcmd		setup_dsa[3];	/* Copy 'phys' address to dsa	*/
1336 	struct link	schedule;	/* Jump to scheduler point	*/
1337 	ncrcmd		p_phys;		/* 'phys' header bus address	*/
1338 };
1339 
1340 /*========================================================================
1341 **
1342 **      Declaration of structs:     global HEADER.
1343 **
1344 **========================================================================
1345 **
1346 **	This substructure is copied from the ccb to a global address after
1347 **	selection (or reselection) and copied back before disconnect.
1348 **
1349 **	These fields are accessible to the script processor.
1350 **
1351 **------------------------------------------------------------------------
1352 */
1353 
1354 struct head {
1355 	/*----------------------------------------------------------------
1356 	**	Saved data pointer.
1357 	**	Points to the position in the script responsible for the
1358 	**	actual transfer transfer of data.
1359 	**	It's written after reception of a SAVE_DATA_POINTER message.
1360 	**	The goalpointer points after the last transfer command.
1361 	**----------------------------------------------------------------
1362 	*/
1363 	u32		savep;
1364 	u32		lastp;
1365 	u32		goalp;
1366 
1367 	/*----------------------------------------------------------------
1368 	**	Alternate data pointer.
1369 	**	They are copied back to savep/lastp/goalp by the SCRIPTS
1370 	**	when the direction is unknown and the device claims data out.
1371 	**----------------------------------------------------------------
1372 	*/
1373 	u32		wlastp;
1374 	u32		wgoalp;
1375 
1376 	/*----------------------------------------------------------------
1377 	**	The virtual address of the ccb containing this header.
1378 	**----------------------------------------------------------------
1379 	*/
1380 	struct ccb *	cp;
1381 
1382 	/*----------------------------------------------------------------
1383 	**	Status fields.
1384 	**----------------------------------------------------------------
1385 	*/
1386 	u_char		scr_st[4];	/* script status		*/
1387 	u_char		status[4];	/* host status. must be the 	*/
1388 					/*  last DWORD of the header.	*/
1389 };
1390 
1391 /*
1392 **	The status bytes are used by the host and the script processor.
1393 **
1394 **	The byte corresponding to the host_status must be stored in the
1395 **	last DWORD of the CCB header since it is used for command
1396 **	completion (ncr_wakeup()). Doing so, we are sure that the header
1397 **	has been entirely copied back to the CCB when the host_status is
1398 **	seen complete by the CPU.
1399 **
1400 **	The last four bytes (status[4]) are copied to the scratchb register
1401 **	(declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1402 **	and copied back just after disconnecting.
1403 **	Inside the script the XX_REG are used.
1404 **
1405 **	The first four bytes (scr_st[4]) are used inside the script by
1406 **	"COPY" commands.
1407 **	Because source and destination must have the same alignment
1408 **	in a DWORD, the fields HAVE to be at the chosen offsets.
1409 **		xerr_st		0	(0x34)	scratcha
1410 **		sync_st		1	(0x05)	sxfer
1411 **		wide_st		3	(0x03)	scntl3
1412 */
1413 
1414 /*
1415 **	Last four bytes (script)
1416 */
1417 #define  QU_REG	scr0
1418 #define  HS_REG	scr1
1419 #define  HS_PRT	nc_scr1
1420 #define  SS_REG	scr2
1421 #define  SS_PRT	nc_scr2
1422 #define  PS_REG	scr3
1423 
1424 /*
1425 **	Last four bytes (host)
1426 */
1427 #ifdef SCSI_NCR_BIG_ENDIAN
1428 #define  actualquirks  phys.header.status[3]
1429 #define  host_status   phys.header.status[2]
1430 #define  scsi_status   phys.header.status[1]
1431 #define  parity_status phys.header.status[0]
1432 #else
1433 #define  actualquirks  phys.header.status[0]
1434 #define  host_status   phys.header.status[1]
1435 #define  scsi_status   phys.header.status[2]
1436 #define  parity_status phys.header.status[3]
1437 #endif
1438 
1439 /*
1440 **	First four bytes (script)
1441 */
1442 #define  xerr_st       header.scr_st[0]
1443 #define  sync_st       header.scr_st[1]
1444 #define  nego_st       header.scr_st[2]
1445 #define  wide_st       header.scr_st[3]
1446 
1447 /*
1448 **	First four bytes (host)
1449 */
1450 #define  xerr_status   phys.xerr_st
1451 #define  nego_status   phys.nego_st
1452 
1453 #if 0
1454 #define  sync_status   phys.sync_st
1455 #define  wide_status   phys.wide_st
1456 #endif
1457 
1458 /*==========================================================
1459 **
1460 **      Declaration of structs:     Data structure block
1461 **
1462 **==========================================================
1463 **
1464 **	During execution of a ccb by the script processor,
1465 **	the DSA (data structure address) register points
1466 **	to this substructure of the ccb.
1467 **	This substructure contains the header with
1468 **	the script-processor-changeable data and
1469 **	data blocks for the indirect move commands.
1470 **
1471 **----------------------------------------------------------
1472 */
1473 
1474 struct dsb {
1475 
1476 	/*
1477 	**	Header.
1478 	*/
1479 
1480 	struct head	header;
1481 
1482 	/*
1483 	**	Table data for Script
1484 	*/
1485 
1486 	struct scr_tblsel  select;
1487 	struct scr_tblmove smsg  ;
1488 	struct scr_tblmove cmd   ;
1489 	struct scr_tblmove sense ;
1490 	struct scr_tblmove data[MAX_SCATTER];
1491 };
1492 
1493 
1494 /*========================================================================
1495 **
1496 **      Declaration of structs:     Command control block.
1497 **
1498 **========================================================================
1499 */
1500 struct ccb {
1501 	/*----------------------------------------------------------------
1502 	**	This is the data structure which is pointed by the DSA
1503 	**	register when it is executed by the script processor.
1504 	**	It must be the first entry because it contains the header
1505 	**	as first entry that must be cache line aligned.
1506 	**----------------------------------------------------------------
1507 	*/
1508 	struct dsb	phys;
1509 
1510 	/*----------------------------------------------------------------
1511 	**	Mini-script used at CCB execution start-up.
1512 	**	Load the DSA with the data structure address (phys) and
1513 	**	jump to SELECT. Jump to CANCEL if CCB is to be canceled.
1514 	**----------------------------------------------------------------
1515 	*/
1516 	struct launch	start;
1517 
1518 	/*----------------------------------------------------------------
1519 	**	Mini-script used at CCB relection to restart the nexus.
1520 	**	Load the DSA with the data structure address (phys) and
1521 	**	jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted.
1522 	**----------------------------------------------------------------
1523 	*/
1524 	struct launch	restart;
1525 
1526 	/*----------------------------------------------------------------
1527 	**	If a data transfer phase is terminated too early
1528 	**	(after reception of a message (i.e. DISCONNECT)),
1529 	**	we have to prepare a mini script to transfer
1530 	**	the rest of the data.
1531 	**----------------------------------------------------------------
1532 	*/
1533 	ncrcmd		patch[8];
1534 
1535 	/*----------------------------------------------------------------
1536 	**	The general SCSI driver provides a
1537 	**	pointer to a control block.
1538 	**----------------------------------------------------------------
1539 	*/
1540 	struct scsi_cmnd	*cmd;		/* SCSI command 		*/
1541 	u_char		cdb_buf[16];	/* Copy of CDB			*/
1542 	u_char		sense_buf[64];
1543 	int		data_len;	/* Total data length		*/
1544 
1545 	/*----------------------------------------------------------------
1546 	**	Message areas.
1547 	**	We prepare a message to be sent after selection.
1548 	**	We may use a second one if the command is rescheduled
1549 	**	due to GETCC or QFULL.
1550 	**      Contents are IDENTIFY and SIMPLE_TAG.
1551 	**	While negotiating sync or wide transfer,
1552 	**	a SDTR or WDTR message is appended.
1553 	**----------------------------------------------------------------
1554 	*/
1555 	u_char		scsi_smsg [8];
1556 	u_char		scsi_smsg2[8];
1557 
1558 	/*----------------------------------------------------------------
1559 	**	Other fields.
1560 	**----------------------------------------------------------------
1561 	*/
1562 	u_long		p_ccb;		/* BUS address of this CCB	*/
1563 	u_char		sensecmd[6];	/* Sense command		*/
1564 	u_char		tag;		/* Tag for this transfer	*/
1565 					/*  255 means no tag		*/
1566 	u_char		target;
1567 	u_char		lun;
1568 	u_char		queued;
1569 	u_char		auto_sense;
1570 	struct ccb *	link_ccb;	/* Host adapter CCB chain	*/
1571 	struct list_head link_ccbq;	/* Link to unit CCB queue	*/
1572 	u32		startp;		/* Initial data pointer		*/
1573 	u_long		magic;		/* Free / busy  CCB flag	*/
1574 };
1575 
1576 #define CCB_PHYS(cp,lbl)	(cp->p_ccb + offsetof(struct ccb, lbl))
1577 
1578 
1579 /*========================================================================
1580 **
1581 **      Declaration of structs:     NCR device descriptor
1582 **
1583 **========================================================================
1584 */
1585 struct ncb {
1586 	/*----------------------------------------------------------------
1587 	**	The global header.
1588 	**	It is accessible to both the host and the script processor.
1589 	**	Must be cache line size aligned (32 for x86) in order to
1590 	**	allow cache line bursting when it is copied to/from CCB.
1591 	**----------------------------------------------------------------
1592 	*/
1593 	struct head     header;
1594 
1595 	/*----------------------------------------------------------------
1596 	**	CCBs management queues.
1597 	**----------------------------------------------------------------
1598 	*/
1599 	struct scsi_cmnd	*waiting_list;	/* Commands waiting for a CCB	*/
1600 					/*  when lcb is not allocated.	*/
1601 	struct scsi_cmnd	*done_list;	/* Commands waiting for done()  */
1602 					/* callback to be invoked.      */
1603 	spinlock_t	smp_lock;	/* Lock for SMP threading       */
1604 
1605 	/*----------------------------------------------------------------
1606 	**	Chip and controller identification.
1607 	**----------------------------------------------------------------
1608 	*/
1609 	int		unit;		/* Unit number			*/
1610 	char		inst_name[16];	/* ncb instance name		*/
1611 
1612 	/*----------------------------------------------------------------
1613 	**	Initial value of some IO register bits.
1614 	**	These values are assumed to have been set by BIOS, and may
1615 	**	be used for probing adapter implementation differences.
1616 	**----------------------------------------------------------------
1617 	*/
1618 	u_char	sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3,
1619 		sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
1620 
1621 	/*----------------------------------------------------------------
1622 	**	Actual initial value of IO register bits used by the
1623 	**	driver. They are loaded at initialisation according to
1624 	**	features that are to be enabled.
1625 	**----------------------------------------------------------------
1626 	*/
1627 	u_char	rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3,
1628 		rv_ctest4, rv_ctest5, rv_stest2;
1629 
1630 	/*----------------------------------------------------------------
1631 	**	Targets management.
1632 	**	During reselection the ncr jumps to jump_tcb.
1633 	**	The SFBR register is loaded with the encoded target id.
1634 	**	For i = 0 to 3
1635 	**		SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i)
1636 	**
1637 	**	Recent chips will prefetch the 4 JUMPS using only 1 burst.
1638 	**	It is kind of hashcoding.
1639 	**----------------------------------------------------------------
1640 	*/
1641 	struct link     jump_tcb[4];	/* JUMPs for reselection	*/
1642 	struct tcb  target[MAX_TARGET];	/* Target data			*/
1643 
1644 	/*----------------------------------------------------------------
1645 	**	Virtual and physical bus addresses of the chip.
1646 	**----------------------------------------------------------------
1647 	*/
1648 	void __iomem *vaddr;		/* Virtual and bus address of	*/
1649 	unsigned long	paddr;		/*  chip's IO registers.	*/
1650 	unsigned long	paddr2;		/* On-chip RAM bus address.	*/
1651 	volatile			/* Pointer to volatile for 	*/
1652 	struct ncr_reg	__iomem *reg;	/*  memory mapped IO.		*/
1653 
1654 	/*----------------------------------------------------------------
1655 	**	SCRIPTS virtual and physical bus addresses.
1656 	**	'script'  is loaded in the on-chip RAM if present.
1657 	**	'scripth' stays in main memory.
1658 	**----------------------------------------------------------------
1659 	*/
1660 	struct script	*script0;	/* Copies of script and scripth	*/
1661 	struct scripth	*scripth0;	/*  relocated for this ncb.	*/
1662 	struct scripth	*scripth;	/* Actual scripth virt. address	*/
1663 	u_long		p_script;	/* Actual script and scripth	*/
1664 	u_long		p_scripth;	/*  bus addresses.		*/
1665 
1666 	/*----------------------------------------------------------------
1667 	**	General controller parameters and configuration.
1668 	**----------------------------------------------------------------
1669 	*/
1670 	struct device	*dev;
1671 	u_char		revision_id;	/* PCI device revision id	*/
1672 	u32		irq;		/* IRQ level			*/
1673 	u32		features;	/* Chip features map		*/
1674 	u_char		myaddr;		/* SCSI id of the adapter	*/
1675 	u_char		maxburst;	/* log base 2 of dwords burst	*/
1676 	u_char		maxwide;	/* Maximum transfer width	*/
1677 	u_char		minsync;	/* Minimum sync period factor	*/
1678 	u_char		maxsync;	/* Maximum sync period factor	*/
1679 	u_char		maxoffs;	/* Max scsi offset		*/
1680 	u_char		multiplier;	/* Clock multiplier (1,2,4)	*/
1681 	u_char		clock_divn;	/* Number of clock divisors	*/
1682 	u_long		clock_khz;	/* SCSI clock frequency in KHz	*/
1683 
1684 	/*----------------------------------------------------------------
1685 	**	Start queue management.
1686 	**	It is filled up by the host processor and accessed by the
1687 	**	SCRIPTS processor in order to start SCSI commands.
1688 	**----------------------------------------------------------------
1689 	*/
1690 	u16		squeueput;	/* Next free slot of the queue	*/
1691 	u16		actccbs;	/* Number of allocated CCBs	*/
1692 	u16		queuedccbs;	/* Number of CCBs in start queue*/
1693 	u16		queuedepth;	/* Start queue depth		*/
1694 
1695 	/*----------------------------------------------------------------
1696 	**	Timeout handler.
1697 	**----------------------------------------------------------------
1698 	*/
1699 	struct timer_list timer;	/* Timer handler link header	*/
1700 	u_long		lasttime;
1701 	u_long		settle_time;	/* Resetting the SCSI BUS	*/
1702 
1703 	/*----------------------------------------------------------------
1704 	**	Debugging and profiling.
1705 	**----------------------------------------------------------------
1706 	*/
1707 	struct ncr_reg	regdump;	/* Register dump		*/
1708 	u_long		regtime;	/* Time it has been done	*/
1709 
1710 	/*----------------------------------------------------------------
1711 	**	Miscellaneous buffers accessed by the scripts-processor.
1712 	**	They shall be DWORD aligned, because they may be read or
1713 	**	written with a SCR_COPY script command.
1714 	**----------------------------------------------------------------
1715 	*/
1716 	u_char		msgout[8];	/* Buffer for MESSAGE OUT 	*/
1717 	u_char		msgin [8];	/* Buffer for MESSAGE IN	*/
1718 	u32		lastmsg;	/* Last SCSI message sent	*/
1719 	u_char		scratch;	/* Scratch for SCSI receive	*/
1720 
1721 	/*----------------------------------------------------------------
1722 	**	Miscellaneous configuration and status parameters.
1723 	**----------------------------------------------------------------
1724 	*/
1725 	u_char		disc;		/* Disconnection allowed	*/
1726 	u_char		scsi_mode;	/* Current SCSI BUS mode	*/
1727 	u_char		order;		/* Tag order to use		*/
1728 	u_char		verbose;	/* Verbosity for this controller*/
1729 	int		ncr_cache;	/* Used for cache test at init.	*/
1730 	u_long		p_ncb;		/* BUS address of this NCB	*/
1731 
1732 	/*----------------------------------------------------------------
1733 	**	Command completion handling.
1734 	**----------------------------------------------------------------
1735 	*/
1736 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
1737 	struct ccb	*(ccb_done[MAX_DONE]);
1738 	int		ccb_done_ic;
1739 #endif
1740 	/*----------------------------------------------------------------
1741 	**	Fields that should be removed or changed.
1742 	**----------------------------------------------------------------
1743 	*/
1744 	struct ccb	*ccb;		/* Global CCB			*/
1745 	struct usrcmd	user;		/* Command from user		*/
1746 	volatile u_char	release_stage;	/* Synchronisation stage on release  */
1747 };
1748 
1749 #define NCB_SCRIPT_PHYS(np,lbl)	 (np->p_script  + offsetof (struct script, lbl))
1750 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1751 
1752 /*==========================================================
1753 **
1754 **
1755 **      Script for NCR-Processor.
1756 **
1757 **	Use ncr_script_fill() to create the variable parts.
1758 **	Use ncr_script_copy_and_bind() to make a copy and
1759 **	bind to physical addresses.
1760 **
1761 **
1762 **==========================================================
1763 **
1764 **	We have to know the offsets of all labels before
1765 **	we reach them (for forward jumps).
1766 **	Therefore we declare a struct here.
1767 **	If you make changes inside the script,
1768 **	DONT FORGET TO CHANGE THE LENGTHS HERE!
1769 **
1770 **----------------------------------------------------------
1771 */
1772 
1773 /*
1774 **	For HP Zalon/53c720 systems, the Zalon interface
1775 **	between CPU and 53c720 does prefetches, which causes
1776 **	problems with self modifying scripts.  The problem
1777 **	is overcome by calling a dummy subroutine after each
1778 **	modification, to force a refetch of the script on
1779 **	return from the subroutine.
1780 */
1781 
1782 #ifdef CONFIG_NCR53C8XX_PREFETCH
1783 #define PREFETCH_FLUSH_CNT	2
1784 #define PREFETCH_FLUSH		SCR_CALL, PADDRH (wait_dma),
1785 #else
1786 #define PREFETCH_FLUSH_CNT	0
1787 #define PREFETCH_FLUSH
1788 #endif
1789 
1790 /*
1791 **	Script fragments which are loaded into the on-chip RAM
1792 **	of 825A, 875 and 895 chips.
1793 */
1794 struct script {
1795 	ncrcmd	start		[  5];
1796 	ncrcmd  startpos	[  1];
1797 	ncrcmd	select		[  6];
1798 	ncrcmd	select2		[  9 + PREFETCH_FLUSH_CNT];
1799 	ncrcmd	loadpos		[  4];
1800 	ncrcmd	send_ident	[  9];
1801 	ncrcmd	prepare		[  6];
1802 	ncrcmd	prepare2	[  7];
1803 	ncrcmd  command		[  6];
1804 	ncrcmd  dispatch	[ 32];
1805 	ncrcmd  clrack		[  4];
1806 	ncrcmd	no_data		[ 17];
1807 	ncrcmd  status		[  8];
1808 	ncrcmd  msg_in		[  2];
1809 	ncrcmd  msg_in2		[ 16];
1810 	ncrcmd  msg_bad		[  4];
1811 	ncrcmd	setmsg		[  7];
1812 	ncrcmd	cleanup		[  6];
1813 	ncrcmd  complete	[  9];
1814 	ncrcmd	cleanup_ok	[  8 + PREFETCH_FLUSH_CNT];
1815 	ncrcmd	cleanup0	[  1];
1816 #ifndef SCSI_NCR_CCB_DONE_SUPPORT
1817 	ncrcmd	signal		[ 12];
1818 #else
1819 	ncrcmd	signal		[  9];
1820 	ncrcmd	done_pos	[  1];
1821 	ncrcmd	done_plug	[  2];
1822 	ncrcmd	done_end	[  7];
1823 #endif
1824 	ncrcmd  save_dp		[  7];
1825 	ncrcmd  restore_dp	[  5];
1826 	ncrcmd  disconnect	[ 10];
1827 	ncrcmd	msg_out		[  9];
1828 	ncrcmd	msg_out_done	[  7];
1829 	ncrcmd  idle		[  2];
1830 	ncrcmd	reselect	[  8];
1831 	ncrcmd	reselected	[  8];
1832 	ncrcmd	resel_dsa	[  6 + PREFETCH_FLUSH_CNT];
1833 	ncrcmd	loadpos1	[  4];
1834 	ncrcmd  resel_lun	[  6];
1835 	ncrcmd	resel_tag	[  6];
1836 	ncrcmd	jump_to_nexus	[  4 + PREFETCH_FLUSH_CNT];
1837 	ncrcmd	nexus_indirect	[  4];
1838 	ncrcmd	resel_notag	[  4];
1839 	ncrcmd  data_in		[MAX_SCATTERL * 4];
1840 	ncrcmd  data_in2	[  4];
1841 	ncrcmd  data_out	[MAX_SCATTERL * 4];
1842 	ncrcmd  data_out2	[  4];
1843 };
1844 
1845 /*
1846 **	Script fragments which stay in main memory for all chips.
1847 */
1848 struct scripth {
1849 	ncrcmd  tryloop		[MAX_START*2];
1850 	ncrcmd  tryloop2	[  2];
1851 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
1852 	ncrcmd  done_queue	[MAX_DONE*5];
1853 	ncrcmd  done_queue2	[  2];
1854 #endif
1855 	ncrcmd	select_no_atn	[  8];
1856 	ncrcmd	cancel		[  4];
1857 	ncrcmd	skip		[  9 + PREFETCH_FLUSH_CNT];
1858 	ncrcmd	skip2		[ 19];
1859 	ncrcmd	par_err_data_in	[  6];
1860 	ncrcmd	par_err_other	[  4];
1861 	ncrcmd	msg_reject	[  8];
1862 	ncrcmd	msg_ign_residue	[ 24];
1863 	ncrcmd  msg_extended	[ 10];
1864 	ncrcmd  msg_ext_2	[ 10];
1865 	ncrcmd	msg_wdtr	[ 14];
1866 	ncrcmd	send_wdtr	[  7];
1867 	ncrcmd  msg_ext_3	[ 10];
1868 	ncrcmd	msg_sdtr	[ 14];
1869 	ncrcmd	send_sdtr	[  7];
1870 	ncrcmd	nego_bad_phase	[  4];
1871 	ncrcmd	msg_out_abort	[ 10];
1872 	ncrcmd  hdata_in	[MAX_SCATTERH * 4];
1873 	ncrcmd  hdata_in2	[  2];
1874 	ncrcmd  hdata_out	[MAX_SCATTERH * 4];
1875 	ncrcmd  hdata_out2	[  2];
1876 	ncrcmd	reset		[  4];
1877 	ncrcmd	aborttag	[  4];
1878 	ncrcmd	abort		[  2];
1879 	ncrcmd	abort_resel	[ 20];
1880 	ncrcmd	resend_ident	[  4];
1881 	ncrcmd	clratn_go_on	[  3];
1882 	ncrcmd	nxtdsp_go_on	[  1];
1883 	ncrcmd	sdata_in	[  8];
1884 	ncrcmd  data_io		[ 18];
1885 	ncrcmd	bad_identify	[ 12];
1886 	ncrcmd	bad_i_t_l	[  4];
1887 	ncrcmd	bad_i_t_l_q	[  4];
1888 	ncrcmd	bad_target	[  8];
1889 	ncrcmd	bad_status	[  8];
1890 	ncrcmd	start_ram	[  4 + PREFETCH_FLUSH_CNT];
1891 	ncrcmd	start_ram0	[  4];
1892 	ncrcmd	sto_restart	[  5];
1893 	ncrcmd	wait_dma	[  2];
1894 	ncrcmd	snooptest	[  9];
1895 	ncrcmd	snoopend	[  2];
1896 };
1897 
1898 /*==========================================================
1899 **
1900 **
1901 **      Function headers.
1902 **
1903 **
1904 **==========================================================
1905 */
1906 
1907 static	void	ncr_alloc_ccb	(struct ncb *np, u_char tn, u_char ln);
1908 static	void	ncr_complete	(struct ncb *np, struct ccb *cp);
1909 static	void	ncr_exception	(struct ncb *np);
1910 static	void	ncr_free_ccb	(struct ncb *np, struct ccb *cp);
1911 static	void	ncr_init_ccb	(struct ncb *np, struct ccb *cp);
1912 static	void	ncr_init_tcb	(struct ncb *np, u_char tn);
1913 static	struct lcb *	ncr_alloc_lcb	(struct ncb *np, u_char tn, u_char ln);
1914 static	struct lcb *	ncr_setup_lcb	(struct ncb *np, struct scsi_device *sdev);
1915 static	void	ncr_getclock	(struct ncb *np, int mult);
1916 static	void	ncr_selectclock	(struct ncb *np, u_char scntl3);
1917 static	struct ccb *ncr_get_ccb	(struct ncb *np, struct scsi_cmnd *cmd);
1918 static	void	ncr_chip_reset	(struct ncb *np, int delay);
1919 static	void	ncr_init	(struct ncb *np, int reset, char * msg, u_long code);
1920 static	int	ncr_int_sbmc	(struct ncb *np);
1921 static	int	ncr_int_par	(struct ncb *np);
1922 static	void	ncr_int_ma	(struct ncb *np);
1923 static	void	ncr_int_sir	(struct ncb *np);
1924 static  void    ncr_int_sto     (struct ncb *np);
1925 static	void	ncr_negotiate	(struct ncb* np, struct tcb* tp);
1926 static	int	ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr);
1927 
1928 static	void	ncr_script_copy_and_bind
1929 				(struct ncb *np, ncrcmd *src, ncrcmd *dst, int len);
1930 static  void    ncr_script_fill (struct script * scr, struct scripth * scripth);
1931 static	int	ncr_scatter	(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd);
1932 static	void	ncr_getsync	(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p);
1933 static	void	ncr_setsync	(struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer);
1934 static	void	ncr_setup_tags	(struct ncb *np, struct scsi_device *sdev);
1935 static	void	ncr_setwide	(struct ncb *np, struct ccb *cp, u_char wide, u_char ack);
1936 static	int	ncr_snooptest	(struct ncb *np);
1937 static	void	ncr_timeout	(struct ncb *np);
1938 static  void    ncr_wakeup      (struct ncb *np, u_long code);
1939 static  void    ncr_wakeup_done (struct ncb *np);
1940 static	void	ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn);
1941 static	void	ncr_put_start_queue(struct ncb *np, struct ccb *cp);
1942 
1943 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd);
1944 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd);
1945 static void process_waiting_list(struct ncb *np, int sts);
1946 
1947 #define remove_from_waiting_list(np, cmd) \
1948 		retrieve_from_waiting_list(1, (np), (cmd))
1949 #define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
1950 #define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
1951 
1952 static inline char *ncr_name (struct ncb *np)
1953 {
1954 	return np->inst_name;
1955 }
1956 
1957 
1958 /*==========================================================
1959 **
1960 **
1961 **      Scripts for NCR-Processor.
1962 **
1963 **      Use ncr_script_bind for binding to physical addresses.
1964 **
1965 **
1966 **==========================================================
1967 **
1968 **	NADDR generates a reference to a field of the controller data.
1969 **	PADDR generates a reference to another part of the script.
1970 **	RADDR generates a reference to a script processor register.
1971 **	FADDR generates a reference to a script processor register
1972 **		with offset.
1973 **
1974 **----------------------------------------------------------
1975 */
1976 
1977 #define	RELOC_SOFTC	0x40000000
1978 #define	RELOC_LABEL	0x50000000
1979 #define	RELOC_REGISTER	0x60000000
1980 #if 0
1981 #define	RELOC_KVAR	0x70000000
1982 #endif
1983 #define	RELOC_LABELH	0x80000000
1984 #define	RELOC_MASK	0xf0000000
1985 
1986 #define	NADDR(label)	(RELOC_SOFTC | offsetof(struct ncb, label))
1987 #define PADDR(label)    (RELOC_LABEL | offsetof(struct script, label))
1988 #define PADDRH(label)   (RELOC_LABELH | offsetof(struct scripth, label))
1989 #define	RADDR(label)	(RELOC_REGISTER | REG(label))
1990 #define	FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1991 #if 0
1992 #define	KVAR(which)	(RELOC_KVAR | (which))
1993 #endif
1994 
1995 #if 0
1996 #define	SCRIPT_KVAR_JIFFIES	(0)
1997 #define	SCRIPT_KVAR_FIRST		SCRIPT_KVAR_JIFFIES
1998 #define	SCRIPT_KVAR_LAST		SCRIPT_KVAR_JIFFIES
1999 /*
2000  * Kernel variables referenced in the scripts.
2001  * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2002  */
2003 static void *script_kvars[] __initdata =
2004 	{ (void *)&jiffies };
2005 #endif
2006 
2007 static	struct script script0 __initdata = {
2008 /*--------------------------< START >-----------------------*/ {
2009 	/*
2010 	**	This NOP will be patched with LED ON
2011 	**	SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2012 	*/
2013 	SCR_NO_OP,
2014 		0,
2015 	/*
2016 	**      Clear SIGP.
2017 	*/
2018 	SCR_FROM_REG (ctest2),
2019 		0,
2020 	/*
2021 	**	Then jump to a certain point in tryloop.
2022 	**	Due to the lack of indirect addressing the code
2023 	**	is self modifying here.
2024 	*/
2025 	SCR_JUMP,
2026 }/*-------------------------< STARTPOS >--------------------*/,{
2027 		PADDRH(tryloop),
2028 
2029 }/*-------------------------< SELECT >----------------------*/,{
2030 	/*
2031 	**	DSA	contains the address of a scheduled
2032 	**		data structure.
2033 	**
2034 	**	SCRATCHA contains the address of the script,
2035 	**		which starts the next entry.
2036 	**
2037 	**	Set Initiator mode.
2038 	**
2039 	**	(Target mode is left as an exercise for the reader)
2040 	*/
2041 
2042 	SCR_CLR (SCR_TRG),
2043 		0,
2044 	SCR_LOAD_REG (HS_REG, HS_SELECTING),
2045 		0,
2046 
2047 	/*
2048 	**      And try to select this target.
2049 	*/
2050 	SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2051 		PADDR (reselect),
2052 
2053 }/*-------------------------< SELECT2 >----------------------*/,{
2054 	/*
2055 	**	Now there are 4 possibilities:
2056 	**
2057 	**	(1) The ncr loses arbitration.
2058 	**	This is ok, because it will try again,
2059 	**	when the bus becomes idle.
2060 	**	(But beware of the timeout function!)
2061 	**
2062 	**	(2) The ncr is reselected.
2063 	**	Then the script processor takes the jump
2064 	**	to the RESELECT label.
2065 	**
2066 	**	(3) The ncr wins arbitration.
2067 	**	Then it will execute SCRIPTS instruction until
2068 	**	the next instruction that checks SCSI phase.
2069 	**	Then will stop and wait for selection to be
2070 	**	complete or selection time-out to occur.
2071 	**	As a result the SCRIPTS instructions until
2072 	**	LOADPOS + 2 should be executed in parallel with
2073 	**	the SCSI core performing selection.
2074 	*/
2075 
2076 	/*
2077 	**	The MESSAGE_REJECT problem seems to be due to a selection
2078 	**	timing problem.
2079 	**	Wait immediately for the selection to complete.
2080 	**	(2.5x behaves so)
2081 	*/
2082 	SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2083 		0,
2084 
2085 	/*
2086 	**	Next time use the next slot.
2087 	*/
2088 	SCR_COPY (4),
2089 		RADDR (temp),
2090 		PADDR (startpos),
2091 	/*
2092 	**      The ncr doesn't have an indirect load
2093 	**	or store command. So we have to
2094 	**	copy part of the control block to a
2095 	**	fixed place, where we can access it.
2096 	**
2097 	**	We patch the address part of a
2098 	**	COPY command with the DSA-register.
2099 	*/
2100 	SCR_COPY_F (4),
2101 		RADDR (dsa),
2102 		PADDR (loadpos),
2103 	/*
2104 	**	Flush script prefetch if required
2105 	*/
2106 	PREFETCH_FLUSH
2107 	/*
2108 	**	then we do the actual copy.
2109 	*/
2110 	SCR_COPY (sizeof (struct head)),
2111 	/*
2112 	**	continued after the next label ...
2113 	*/
2114 }/*-------------------------< LOADPOS >---------------------*/,{
2115 		0,
2116 		NADDR (header),
2117 	/*
2118 	**	Wait for the next phase or the selection
2119 	**	to complete or time-out.
2120 	*/
2121 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2122 		PADDR (prepare),
2123 
2124 }/*-------------------------< SEND_IDENT >----------------------*/,{
2125 	/*
2126 	**	Selection complete.
2127 	**	Send the IDENTIFY and SIMPLE_TAG messages
2128 	**	(and the EXTENDED_SDTR message)
2129 	*/
2130 	SCR_MOVE_TBL ^ SCR_MSG_OUT,
2131 		offsetof (struct dsb, smsg),
2132 	SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2133 		PADDRH (resend_ident),
2134 	SCR_LOAD_REG (scratcha, 0x80),
2135 		0,
2136 	SCR_COPY (1),
2137 		RADDR (scratcha),
2138 		NADDR (lastmsg),
2139 }/*-------------------------< PREPARE >----------------------*/,{
2140 	/*
2141 	**      load the savep (saved pointer) into
2142 	**      the TEMP register (actual pointer)
2143 	*/
2144 	SCR_COPY (4),
2145 		NADDR (header.savep),
2146 		RADDR (temp),
2147 	/*
2148 	**      Initialize the status registers
2149 	*/
2150 	SCR_COPY (4),
2151 		NADDR (header.status),
2152 		RADDR (scr0),
2153 }/*-------------------------< PREPARE2 >---------------------*/,{
2154 	/*
2155 	**	Initialize the msgout buffer with a NOOP message.
2156 	*/
2157 	SCR_LOAD_REG (scratcha, NOP),
2158 		0,
2159 	SCR_COPY (1),
2160 		RADDR (scratcha),
2161 		NADDR (msgout),
2162 #if 0
2163 	SCR_COPY (1),
2164 		RADDR (scratcha),
2165 		NADDR (msgin),
2166 #endif
2167 	/*
2168 	**	Anticipate the COMMAND phase.
2169 	**	This is the normal case for initial selection.
2170 	*/
2171 	SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2172 		PADDR (dispatch),
2173 
2174 }/*-------------------------< COMMAND >--------------------*/,{
2175 	/*
2176 	**	... and send the command
2177 	*/
2178 	SCR_MOVE_TBL ^ SCR_COMMAND,
2179 		offsetof (struct dsb, cmd),
2180 	/*
2181 	**	If status is still HS_NEGOTIATE, negotiation failed.
2182 	**	We check this here, since we want to do that
2183 	**	only once.
2184 	*/
2185 	SCR_FROM_REG (HS_REG),
2186 		0,
2187 	SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2188 		SIR_NEGO_FAILED,
2189 
2190 }/*-----------------------< DISPATCH >----------------------*/,{
2191 	/*
2192 	**	MSG_IN is the only phase that shall be
2193 	**	entered at least once for each (re)selection.
2194 	**	So we test it first.
2195 	*/
2196 	SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2197 		PADDR (msg_in),
2198 
2199 	SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)),
2200 		0,
2201 	/*
2202 	**	DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4.
2203 	**	Possible data corruption during Memory Write and Invalidate.
2204 	**	This work-around resets the addressing logic prior to the
2205 	**	start of the first MOVE of a DATA IN phase.
2206 	**	(See Documentation/scsi/ncr53c8xx.rst for more information)
2207 	*/
2208 	SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2209 		20,
2210 	SCR_COPY (4),
2211 		RADDR (scratcha),
2212 		RADDR (scratcha),
2213 	SCR_RETURN,
2214  		0,
2215 	SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2216 		PADDR (status),
2217 	SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2218 		PADDR (command),
2219 	SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2220 		PADDR (msg_out),
2221 	/*
2222 	**      Discard one illegal phase byte, if required.
2223 	*/
2224 	SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
2225 		0,
2226 	SCR_COPY (1),
2227 		RADDR (scratcha),
2228 		NADDR (xerr_st),
2229 	SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
2230 		8,
2231 	SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
2232 		NADDR (scratch),
2233 	SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
2234 		8,
2235 	SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
2236 		NADDR (scratch),
2237 	SCR_JUMP,
2238 		PADDR (dispatch),
2239 
2240 }/*-------------------------< CLRACK >----------------------*/,{
2241 	/*
2242 	**	Terminate possible pending message phase.
2243 	*/
2244 	SCR_CLR (SCR_ACK),
2245 		0,
2246 	SCR_JUMP,
2247 		PADDR (dispatch),
2248 
2249 }/*-------------------------< NO_DATA >--------------------*/,{
2250 	/*
2251 	**	The target wants to tranfer too much data
2252 	**	or in the wrong direction.
2253 	**      Remember that in extended error.
2254 	*/
2255 	SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
2256 		0,
2257 	SCR_COPY (1),
2258 		RADDR (scratcha),
2259 		NADDR (xerr_st),
2260 	/*
2261 	**      Discard one data byte, if required.
2262 	*/
2263 	SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2264 		8,
2265 	SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
2266 		NADDR (scratch),
2267 	SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
2268 		8,
2269 	SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2270 		NADDR (scratch),
2271 	/*
2272 	**      .. and repeat as required.
2273 	*/
2274 	SCR_CALL,
2275 		PADDR (dispatch),
2276 	SCR_JUMP,
2277 		PADDR (no_data),
2278 
2279 }/*-------------------------< STATUS >--------------------*/,{
2280 	/*
2281 	**	get the status
2282 	*/
2283 	SCR_MOVE_ABS (1) ^ SCR_STATUS,
2284 		NADDR (scratch),
2285 	/*
2286 	**	save status to scsi_status.
2287 	**	mark as complete.
2288 	*/
2289 	SCR_TO_REG (SS_REG),
2290 		0,
2291 	SCR_LOAD_REG (HS_REG, HS_COMPLETE),
2292 		0,
2293 	SCR_JUMP,
2294 		PADDR (dispatch),
2295 }/*-------------------------< MSG_IN >--------------------*/,{
2296 	/*
2297 	**	Get the first byte of the message
2298 	**	and save it to SCRATCHA.
2299 	**
2300 	**	The script processor doesn't negate the
2301 	**	ACK signal after this transfer.
2302 	*/
2303 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2304 		NADDR (msgin[0]),
2305 }/*-------------------------< MSG_IN2 >--------------------*/,{
2306 	/*
2307 	**	Handle this message.
2308 	*/
2309 	SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)),
2310 		PADDR (complete),
2311 	SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)),
2312 		PADDR (disconnect),
2313 	SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)),
2314 		PADDR (save_dp),
2315 	SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)),
2316 		PADDR (restore_dp),
2317 	SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)),
2318 		PADDRH (msg_extended),
2319 	SCR_JUMP ^ IFTRUE (DATA (NOP)),
2320 		PADDR (clrack),
2321 	SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)),
2322 		PADDRH (msg_reject),
2323 	SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)),
2324 		PADDRH (msg_ign_residue),
2325 	/*
2326 	**	Rest of the messages left as
2327 	**	an exercise ...
2328 	**
2329 	**	Unimplemented messages:
2330 	**	fall through to MSG_BAD.
2331 	*/
2332 }/*-------------------------< MSG_BAD >------------------*/,{
2333 	/*
2334 	**	unimplemented message - reject it.
2335 	*/
2336 	SCR_INT,
2337 		SIR_REJECT_SENT,
2338 	SCR_LOAD_REG (scratcha, MESSAGE_REJECT),
2339 		0,
2340 }/*-------------------------< SETMSG >----------------------*/,{
2341 	SCR_COPY (1),
2342 		RADDR (scratcha),
2343 		NADDR (msgout),
2344 	SCR_SET (SCR_ATN),
2345 		0,
2346 	SCR_JUMP,
2347 		PADDR (clrack),
2348 }/*-------------------------< CLEANUP >-------------------*/,{
2349 	/*
2350 	**      dsa:    Pointer to ccb
2351 	**	      or xxxxxxFF (no ccb)
2352 	**
2353 	**      HS_REG:   Host-Status (<>0!)
2354 	*/
2355 	SCR_FROM_REG (dsa),
2356 		0,
2357 	SCR_JUMP ^ IFTRUE (DATA (0xff)),
2358 		PADDR (start),
2359 	/*
2360 	**      dsa is valid.
2361 	**	complete the cleanup.
2362 	*/
2363 	SCR_JUMP,
2364 		PADDR (cleanup_ok),
2365 
2366 }/*-------------------------< COMPLETE >-----------------*/,{
2367 	/*
2368 	**	Complete message.
2369 	**
2370 	**	Copy TEMP register to LASTP in header.
2371 	*/
2372 	SCR_COPY (4),
2373 		RADDR (temp),
2374 		NADDR (header.lastp),
2375 	/*
2376 	**	When we terminate the cycle by clearing ACK,
2377 	**	the target may disconnect immediately.
2378 	**
2379 	**	We don't want to be told of an
2380 	**	"unexpected disconnect",
2381 	**	so we disable this feature.
2382 	*/
2383 	SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2384 		0,
2385 	/*
2386 	**	Terminate cycle ...
2387 	*/
2388 	SCR_CLR (SCR_ACK|SCR_ATN),
2389 		0,
2390 	/*
2391 	**	... and wait for the disconnect.
2392 	*/
2393 	SCR_WAIT_DISC,
2394 		0,
2395 }/*-------------------------< CLEANUP_OK >----------------*/,{
2396 	/*
2397 	**	Save host status to header.
2398 	*/
2399 	SCR_COPY (4),
2400 		RADDR (scr0),
2401 		NADDR (header.status),
2402 	/*
2403 	**	and copy back the header to the ccb.
2404 	*/
2405 	SCR_COPY_F (4),
2406 		RADDR (dsa),
2407 		PADDR (cleanup0),
2408 	/*
2409 	**	Flush script prefetch if required
2410 	*/
2411 	PREFETCH_FLUSH
2412 	SCR_COPY (sizeof (struct head)),
2413 		NADDR (header),
2414 }/*-------------------------< CLEANUP0 >--------------------*/,{
2415 		0,
2416 }/*-------------------------< SIGNAL >----------------------*/,{
2417 	/*
2418 	**	if job not completed ...
2419 	*/
2420 	SCR_FROM_REG (HS_REG),
2421 		0,
2422 	/*
2423 	**	... start the next command.
2424 	*/
2425 	SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))),
2426 		PADDR(start),
2427 	/*
2428 	**	If command resulted in not GOOD status,
2429 	**	call the C code if needed.
2430 	*/
2431 	SCR_FROM_REG (SS_REG),
2432 		0,
2433 	SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
2434 		PADDRH (bad_status),
2435 
2436 #ifndef	SCSI_NCR_CCB_DONE_SUPPORT
2437 
2438 	/*
2439 	**	... signal completion to the host
2440 	*/
2441 	SCR_INT,
2442 		SIR_INTFLY,
2443 	/*
2444 	**	Auf zu neuen Schandtaten!
2445 	*/
2446 	SCR_JUMP,
2447 		PADDR(start),
2448 
2449 #else	/* defined SCSI_NCR_CCB_DONE_SUPPORT */
2450 
2451 	/*
2452 	**	... signal completion to the host
2453 	*/
2454 	SCR_JUMP,
2455 }/*------------------------< DONE_POS >---------------------*/,{
2456 		PADDRH (done_queue),
2457 }/*------------------------< DONE_PLUG >--------------------*/,{
2458 	SCR_INT,
2459 		SIR_DONE_OVERFLOW,
2460 }/*------------------------< DONE_END >---------------------*/,{
2461 	SCR_INT,
2462 		SIR_INTFLY,
2463 	SCR_COPY (4),
2464 		RADDR (temp),
2465 		PADDR (done_pos),
2466 	SCR_JUMP,
2467 		PADDR (start),
2468 
2469 #endif	/* SCSI_NCR_CCB_DONE_SUPPORT */
2470 
2471 }/*-------------------------< SAVE_DP >------------------*/,{
2472 	/*
2473 	**	SAVE_DP message:
2474 	**	Copy TEMP register to SAVEP in header.
2475 	*/
2476 	SCR_COPY (4),
2477 		RADDR (temp),
2478 		NADDR (header.savep),
2479 	SCR_CLR (SCR_ACK),
2480 		0,
2481 	SCR_JUMP,
2482 		PADDR (dispatch),
2483 }/*-------------------------< RESTORE_DP >---------------*/,{
2484 	/*
2485 	**	RESTORE_DP message:
2486 	**	Copy SAVEP in header to TEMP register.
2487 	*/
2488 	SCR_COPY (4),
2489 		NADDR (header.savep),
2490 		RADDR (temp),
2491 	SCR_JUMP,
2492 		PADDR (clrack),
2493 
2494 }/*-------------------------< DISCONNECT >---------------*/,{
2495 	/*
2496 	**	DISCONNECTing  ...
2497 	**
2498 	**	disable the "unexpected disconnect" feature,
2499 	**	and remove the ACK signal.
2500 	*/
2501 	SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2502 		0,
2503 	SCR_CLR (SCR_ACK|SCR_ATN),
2504 		0,
2505 	/*
2506 	**	Wait for the disconnect.
2507 	*/
2508 	SCR_WAIT_DISC,
2509 		0,
2510 	/*
2511 	**	Status is: DISCONNECTED.
2512 	*/
2513 	SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2514 		0,
2515 	SCR_JUMP,
2516 		PADDR (cleanup_ok),
2517 
2518 }/*-------------------------< MSG_OUT >-------------------*/,{
2519 	/*
2520 	**	The target requests a message.
2521 	*/
2522 	SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2523 		NADDR (msgout),
2524 	SCR_COPY (1),
2525 		NADDR (msgout),
2526 		NADDR (lastmsg),
2527 	/*
2528 	**	If it was no ABORT message ...
2529 	*/
2530 	SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)),
2531 		PADDRH (msg_out_abort),
2532 	/*
2533 	**	... wait for the next phase
2534 	**	if it's a message out, send it again, ...
2535 	*/
2536 	SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2537 		PADDR (msg_out),
2538 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2539 	/*
2540 	**	... else clear the message ...
2541 	*/
2542 	SCR_LOAD_REG (scratcha, NOP),
2543 		0,
2544 	SCR_COPY (4),
2545 		RADDR (scratcha),
2546 		NADDR (msgout),
2547 	/*
2548 	**	... and process the next phase
2549 	*/
2550 	SCR_JUMP,
2551 		PADDR (dispatch),
2552 }/*-------------------------< IDLE >------------------------*/,{
2553 	/*
2554 	**	Nothing to do?
2555 	**	Wait for reselect.
2556 	**	This NOP will be patched with LED OFF
2557 	**	SCR_REG_REG (gpreg, SCR_OR, 0x01)
2558 	*/
2559 	SCR_NO_OP,
2560 		0,
2561 }/*-------------------------< RESELECT >--------------------*/,{
2562 	/*
2563 	**	make the DSA invalid.
2564 	*/
2565 	SCR_LOAD_REG (dsa, 0xff),
2566 		0,
2567 	SCR_CLR (SCR_TRG),
2568 		0,
2569 	SCR_LOAD_REG (HS_REG, HS_IN_RESELECT),
2570 		0,
2571 	/*
2572 	**	Sleep waiting for a reselection.
2573 	**	If SIGP is set, special treatment.
2574 	**
2575 	**	Zu allem bereit ..
2576 	*/
2577 	SCR_WAIT_RESEL,
2578 		PADDR(start),
2579 }/*-------------------------< RESELECTED >------------------*/,{
2580 	/*
2581 	**	This NOP will be patched with LED ON
2582 	**	SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2583 	*/
2584 	SCR_NO_OP,
2585 		0,
2586 	/*
2587 	**	... zu nichts zu gebrauchen ?
2588 	**
2589 	**      load the target id into the SFBR
2590 	**	and jump to the control block.
2591 	**
2592 	**	Look at the declarations of
2593 	**	- struct ncb
2594 	**	- struct tcb
2595 	**	- struct lcb
2596 	**	- struct ccb
2597 	**	to understand what's going on.
2598 	*/
2599 	SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2600 		0,
2601 	SCR_TO_REG (sdid),
2602 		0,
2603 	SCR_JUMP,
2604 		NADDR (jump_tcb),
2605 
2606 }/*-------------------------< RESEL_DSA >-------------------*/,{
2607 	/*
2608 	**	Ack the IDENTIFY or TAG previously received.
2609 	*/
2610 	SCR_CLR (SCR_ACK),
2611 		0,
2612 	/*
2613 	**      The ncr doesn't have an indirect load
2614 	**	or store command. So we have to
2615 	**	copy part of the control block to a
2616 	**	fixed place, where we can access it.
2617 	**
2618 	**	We patch the address part of a
2619 	**	COPY command with the DSA-register.
2620 	*/
2621 	SCR_COPY_F (4),
2622 		RADDR (dsa),
2623 		PADDR (loadpos1),
2624 	/*
2625 	**	Flush script prefetch if required
2626 	*/
2627 	PREFETCH_FLUSH
2628 	/*
2629 	**	then we do the actual copy.
2630 	*/
2631 	SCR_COPY (sizeof (struct head)),
2632 	/*
2633 	**	continued after the next label ...
2634 	*/
2635 
2636 }/*-------------------------< LOADPOS1 >-------------------*/,{
2637 		0,
2638 		NADDR (header),
2639 	/*
2640 	**	The DSA contains the data structure address.
2641 	*/
2642 	SCR_JUMP,
2643 		PADDR (prepare),
2644 
2645 }/*-------------------------< RESEL_LUN >-------------------*/,{
2646 	/*
2647 	**	come back to this point
2648 	**	to get an IDENTIFY message
2649 	**	Wait for a msg_in phase.
2650 	*/
2651 	SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
2652 		SIR_RESEL_NO_MSG_IN,
2653 	/*
2654 	**	message phase.
2655 	**	Read the data directly from the BUS DATA lines.
2656 	**	This helps to support very old SCSI devices that
2657 	**	may reselect without sending an IDENTIFY.
2658 	*/
2659 	SCR_FROM_REG (sbdl),
2660 		0,
2661 	/*
2662 	**	It should be an Identify message.
2663 	*/
2664 	SCR_RETURN,
2665 		0,
2666 }/*-------------------------< RESEL_TAG >-------------------*/,{
2667 	/*
2668 	**	Read IDENTIFY + SIMPLE + TAG using a single MOVE.
2669 	**	Aggressive optimization, is'nt it?
2670 	**	No need to test the SIMPLE TAG message, since the
2671 	**	driver only supports conformant devices for tags. ;-)
2672 	*/
2673 	SCR_MOVE_ABS (3) ^ SCR_MSG_IN,
2674 		NADDR (msgin),
2675 	/*
2676 	**	Read the TAG from the SIDL.
2677 	**	Still an aggressive optimization. ;-)
2678 	**	Compute the CCB indirect jump address which
2679 	**	is (#TAG*2 & 0xfc) due to tag numbering using
2680 	**	1,3,5..MAXTAGS*2+1 actual values.
2681 	*/
2682 	SCR_REG_SFBR (sidl, SCR_SHL, 0),
2683 		0,
2684 	SCR_SFBR_REG (temp, SCR_AND, 0xfc),
2685 		0,
2686 }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{
2687 	SCR_COPY_F (4),
2688 		RADDR (temp),
2689 		PADDR (nexus_indirect),
2690 	/*
2691 	**	Flush script prefetch if required
2692 	*/
2693 	PREFETCH_FLUSH
2694 	SCR_COPY (4),
2695 }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{
2696 		0,
2697 		RADDR (temp),
2698 	SCR_RETURN,
2699 		0,
2700 }/*-------------------------< RESEL_NOTAG >-------------------*/,{
2701 	/*
2702 	**	No tag expected.
2703 	**	Read an throw away the IDENTIFY.
2704 	*/
2705 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2706 		NADDR (msgin),
2707 	SCR_JUMP,
2708 		PADDR (jump_to_nexus),
2709 }/*-------------------------< DATA_IN >--------------------*/,{
2710 /*
2711 **	Because the size depends on the
2712 **	#define MAX_SCATTERL parameter,
2713 **	it is filled in at runtime.
2714 **
2715 **  ##===========< i=0; i<MAX_SCATTERL >=========
2716 **  ||	SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2717 **  ||		PADDR (dispatch),
2718 **  ||	SCR_MOVE_TBL ^ SCR_DATA_IN,
2719 **  ||		offsetof (struct dsb, data[ i]),
2720 **  ##==========================================
2721 **
2722 **---------------------------------------------------------
2723 */
2724 0
2725 }/*-------------------------< DATA_IN2 >-------------------*/,{
2726 	SCR_CALL,
2727 		PADDR (dispatch),
2728 	SCR_JUMP,
2729 		PADDR (no_data),
2730 }/*-------------------------< DATA_OUT >--------------------*/,{
2731 /*
2732 **	Because the size depends on the
2733 **	#define MAX_SCATTERL parameter,
2734 **	it is filled in at runtime.
2735 **
2736 **  ##===========< i=0; i<MAX_SCATTERL >=========
2737 **  ||	SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2738 **  ||		PADDR (dispatch),
2739 **  ||	SCR_MOVE_TBL ^ SCR_DATA_OUT,
2740 **  ||		offsetof (struct dsb, data[ i]),
2741 **  ##==========================================
2742 **
2743 **---------------------------------------------------------
2744 */
2745 0
2746 }/*-------------------------< DATA_OUT2 >-------------------*/,{
2747 	SCR_CALL,
2748 		PADDR (dispatch),
2749 	SCR_JUMP,
2750 		PADDR (no_data),
2751 }/*--------------------------------------------------------*/
2752 };
2753 
2754 static	struct scripth scripth0 __initdata = {
2755 /*-------------------------< TRYLOOP >---------------------*/{
2756 /*
2757 **	Start the next entry.
2758 **	Called addresses point to the launch script in the CCB.
2759 **	They are patched by the main processor.
2760 **
2761 **	Because the size depends on the
2762 **	#define MAX_START parameter, it is filled
2763 **	in at runtime.
2764 **
2765 **-----------------------------------------------------------
2766 **
2767 **  ##===========< I=0; i<MAX_START >===========
2768 **  ||	SCR_CALL,
2769 **  ||		PADDR (idle),
2770 **  ##==========================================
2771 **
2772 **-----------------------------------------------------------
2773 */
2774 0
2775 }/*------------------------< TRYLOOP2 >---------------------*/,{
2776 	SCR_JUMP,
2777 		PADDRH(tryloop),
2778 
2779 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
2780 
2781 }/*------------------------< DONE_QUEUE >-------------------*/,{
2782 /*
2783 **	Copy the CCB address to the next done entry.
2784 **	Because the size depends on the
2785 **	#define MAX_DONE parameter, it is filled
2786 **	in at runtime.
2787 **
2788 **-----------------------------------------------------------
2789 **
2790 **  ##===========< I=0; i<MAX_DONE >===========
2791 **  ||	SCR_COPY (sizeof(struct ccb *),
2792 **  ||		NADDR (header.cp),
2793 **  ||		NADDR (ccb_done[i]),
2794 **  ||	SCR_CALL,
2795 **  ||		PADDR (done_end),
2796 **  ##==========================================
2797 **
2798 **-----------------------------------------------------------
2799 */
2800 0
2801 }/*------------------------< DONE_QUEUE2 >------------------*/,{
2802 	SCR_JUMP,
2803 		PADDRH (done_queue),
2804 
2805 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2806 }/*------------------------< SELECT_NO_ATN >-----------------*/,{
2807 	/*
2808 	**	Set Initiator mode.
2809 	**      And try to select this target without ATN.
2810 	*/
2811 
2812 	SCR_CLR (SCR_TRG),
2813 		0,
2814 	SCR_LOAD_REG (HS_REG, HS_SELECTING),
2815 		0,
2816 	SCR_SEL_TBL ^ offsetof (struct dsb, select),
2817 		PADDR (reselect),
2818 	SCR_JUMP,
2819 		PADDR (select2),
2820 
2821 }/*-------------------------< CANCEL >------------------------*/,{
2822 
2823 	SCR_LOAD_REG (scratcha, HS_ABORTED),
2824 		0,
2825 	SCR_JUMPR,
2826 		8,
2827 }/*-------------------------< SKIP >------------------------*/,{
2828 	SCR_LOAD_REG (scratcha, 0),
2829 		0,
2830 	/*
2831 	**	This entry has been canceled.
2832 	**	Next time use the next slot.
2833 	*/
2834 	SCR_COPY (4),
2835 		RADDR (temp),
2836 		PADDR (startpos),
2837 	/*
2838 	**      The ncr doesn't have an indirect load
2839 	**	or store command. So we have to
2840 	**	copy part of the control block to a
2841 	**	fixed place, where we can access it.
2842 	**
2843 	**	We patch the address part of a
2844 	**	COPY command with the DSA-register.
2845 	*/
2846 	SCR_COPY_F (4),
2847 		RADDR (dsa),
2848 		PADDRH (skip2),
2849 	/*
2850 	**	Flush script prefetch if required
2851 	*/
2852 	PREFETCH_FLUSH
2853 	/*
2854 	**	then we do the actual copy.
2855 	*/
2856 	SCR_COPY (sizeof (struct head)),
2857 	/*
2858 	**	continued after the next label ...
2859 	*/
2860 }/*-------------------------< SKIP2 >---------------------*/,{
2861 		0,
2862 		NADDR (header),
2863 	/*
2864 	**      Initialize the status registers
2865 	*/
2866 	SCR_COPY (4),
2867 		NADDR (header.status),
2868 		RADDR (scr0),
2869 	/*
2870 	**	Force host status.
2871 	*/
2872 	SCR_FROM_REG (scratcha),
2873 		0,
2874 	SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2875 		16,
2876 	SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK),
2877 		0,
2878 	SCR_JUMPR,
2879 		8,
2880 	SCR_TO_REG (HS_REG),
2881 		0,
2882 	SCR_LOAD_REG (SS_REG, S_GOOD),
2883 		0,
2884 	SCR_JUMP,
2885 		PADDR (cleanup_ok),
2886 
2887 },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{
2888 	/*
2889 	**	Ignore all data in byte, until next phase
2890 	*/
2891 	SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2892 		PADDRH (par_err_other),
2893 	SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2894 		NADDR (scratch),
2895 	SCR_JUMPR,
2896 		-24,
2897 },/*-------------------------< PAR_ERR_OTHER >------------------*/{
2898 	/*
2899 	**	count it.
2900 	*/
2901 	SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2902 		0,
2903 	/*
2904 	**	jump to dispatcher.
2905 	*/
2906 	SCR_JUMP,
2907 		PADDR (dispatch),
2908 }/*-------------------------< MSG_REJECT >---------------*/,{
2909 	/*
2910 	**	If a negotiation was in progress,
2911 	**	negotiation failed.
2912 	**	Otherwise, let the C code print
2913 	**	some message.
2914 	*/
2915 	SCR_FROM_REG (HS_REG),
2916 		0,
2917 	SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2918 		SIR_REJECT_RECEIVED,
2919 	SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2920 		SIR_NEGO_FAILED,
2921 	SCR_JUMP,
2922 		PADDR (clrack),
2923 
2924 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2925 	/*
2926 	**	Terminate cycle
2927 	*/
2928 	SCR_CLR (SCR_ACK),
2929 		0,
2930 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2931 		PADDR (dispatch),
2932 	/*
2933 	**	get residue size.
2934 	*/
2935 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2936 		NADDR (msgin[1]),
2937 	/*
2938 	**	Size is 0 .. ignore message.
2939 	*/
2940 	SCR_JUMP ^ IFTRUE (DATA (0)),
2941 		PADDR (clrack),
2942 	/*
2943 	**	Size is not 1 .. have to interrupt.
2944 	*/
2945 	SCR_JUMPR ^ IFFALSE (DATA (1)),
2946 		40,
2947 	/*
2948 	**	Check for residue byte in swide register
2949 	*/
2950 	SCR_FROM_REG (scntl2),
2951 		0,
2952 	SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2953 		16,
2954 	/*
2955 	**	There IS data in the swide register.
2956 	**	Discard it.
2957 	*/
2958 	SCR_REG_REG (scntl2, SCR_OR, WSR),
2959 		0,
2960 	SCR_JUMP,
2961 		PADDR (clrack),
2962 	/*
2963 	**	Load again the size to the sfbr register.
2964 	*/
2965 	SCR_FROM_REG (scratcha),
2966 		0,
2967 	SCR_INT,
2968 		SIR_IGN_RESIDUE,
2969 	SCR_JUMP,
2970 		PADDR (clrack),
2971 
2972 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2973 	/*
2974 	**	Terminate cycle
2975 	*/
2976 	SCR_CLR (SCR_ACK),
2977 		0,
2978 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2979 		PADDR (dispatch),
2980 	/*
2981 	**	get length.
2982 	*/
2983 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2984 		NADDR (msgin[1]),
2985 	/*
2986 	*/
2987 	SCR_JUMP ^ IFTRUE (DATA (3)),
2988 		PADDRH (msg_ext_3),
2989 	SCR_JUMP ^ IFFALSE (DATA (2)),
2990 		PADDR (msg_bad),
2991 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2992 	SCR_CLR (SCR_ACK),
2993 		0,
2994 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2995 		PADDR (dispatch),
2996 	/*
2997 	**	get extended message code.
2998 	*/
2999 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3000 		NADDR (msgin[2]),
3001 	SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)),
3002 		PADDRH (msg_wdtr),
3003 	/*
3004 	**	unknown extended message
3005 	*/
3006 	SCR_JUMP,
3007 		PADDR (msg_bad)
3008 }/*-------------------------< MSG_WDTR >-----------------*/,{
3009 	SCR_CLR (SCR_ACK),
3010 		0,
3011 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3012 		PADDR (dispatch),
3013 	/*
3014 	**	get data bus width
3015 	*/
3016 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3017 		NADDR (msgin[3]),
3018 	/*
3019 	**	let the host do the real work.
3020 	*/
3021 	SCR_INT,
3022 		SIR_NEGO_WIDE,
3023 	/*
3024 	**	let the target fetch our answer.
3025 	*/
3026 	SCR_SET (SCR_ATN),
3027 		0,
3028 	SCR_CLR (SCR_ACK),
3029 		0,
3030 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3031 		PADDRH (nego_bad_phase),
3032 
3033 }/*-------------------------< SEND_WDTR >----------------*/,{
3034 	/*
3035 	**	Send the EXTENDED_WDTR
3036 	*/
3037 	SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
3038 		NADDR (msgout),
3039 	SCR_COPY (1),
3040 		NADDR (msgout),
3041 		NADDR (lastmsg),
3042 	SCR_JUMP,
3043 		PADDR (msg_out_done),
3044 
3045 }/*-------------------------< MSG_EXT_3 >----------------*/,{
3046 	SCR_CLR (SCR_ACK),
3047 		0,
3048 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3049 		PADDR (dispatch),
3050 	/*
3051 	**	get extended message code.
3052 	*/
3053 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3054 		NADDR (msgin[2]),
3055 	SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)),
3056 		PADDRH (msg_sdtr),
3057 	/*
3058 	**	unknown extended message
3059 	*/
3060 	SCR_JUMP,
3061 		PADDR (msg_bad)
3062 
3063 }/*-------------------------< MSG_SDTR >-----------------*/,{
3064 	SCR_CLR (SCR_ACK),
3065 		0,
3066 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3067 		PADDR (dispatch),
3068 	/*
3069 	**	get period and offset
3070 	*/
3071 	SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3072 		NADDR (msgin[3]),
3073 	/*
3074 	**	let the host do the real work.
3075 	*/
3076 	SCR_INT,
3077 		SIR_NEGO_SYNC,
3078 	/*
3079 	**	let the target fetch our answer.
3080 	*/
3081 	SCR_SET (SCR_ATN),
3082 		0,
3083 	SCR_CLR (SCR_ACK),
3084 		0,
3085 	SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3086 		PADDRH (nego_bad_phase),
3087 
3088 }/*-------------------------< SEND_SDTR >-------------*/,{
3089 	/*
3090 	**	Send the EXTENDED_SDTR
3091 	*/
3092 	SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
3093 		NADDR (msgout),
3094 	SCR_COPY (1),
3095 		NADDR (msgout),
3096 		NADDR (lastmsg),
3097 	SCR_JUMP,
3098 		PADDR (msg_out_done),
3099 
3100 }/*-------------------------< NEGO_BAD_PHASE >------------*/,{
3101 	SCR_INT,
3102 		SIR_NEGO_PROTO,
3103 	SCR_JUMP,
3104 		PADDR (dispatch),
3105 
3106 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
3107 	/*
3108 	**	After ABORT message,
3109 	**
3110 	**	expect an immediate disconnect, ...
3111 	*/
3112 	SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3113 		0,
3114 	SCR_CLR (SCR_ACK|SCR_ATN),
3115 		0,
3116 	SCR_WAIT_DISC,
3117 		0,
3118 	/*
3119 	**	... and set the status to "ABORTED"
3120 	*/
3121 	SCR_LOAD_REG (HS_REG, HS_ABORTED),
3122 		0,
3123 	SCR_JUMP,
3124 		PADDR (cleanup),
3125 
3126 }/*-------------------------< HDATA_IN >-------------------*/,{
3127 /*
3128 **	Because the size depends on the
3129 **	#define MAX_SCATTERH parameter,
3130 **	it is filled in at runtime.
3131 **
3132 **  ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3133 **  ||	SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3134 **  ||		PADDR (dispatch),
3135 **  ||	SCR_MOVE_TBL ^ SCR_DATA_IN,
3136 **  ||		offsetof (struct dsb, data[ i]),
3137 **  ##===================================================
3138 **
3139 **---------------------------------------------------------
3140 */
3141 0
3142 }/*-------------------------< HDATA_IN2 >------------------*/,{
3143 	SCR_JUMP,
3144 		PADDR (data_in),
3145 
3146 }/*-------------------------< HDATA_OUT >-------------------*/,{
3147 /*
3148 **	Because the size depends on the
3149 **	#define MAX_SCATTERH parameter,
3150 **	it is filled in at runtime.
3151 **
3152 **  ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
3153 **  ||	SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
3154 **  ||		PADDR (dispatch),
3155 **  ||	SCR_MOVE_TBL ^ SCR_DATA_OUT,
3156 **  ||		offsetof (struct dsb, data[ i]),
3157 **  ##===================================================
3158 **
3159 **---------------------------------------------------------
3160 */
3161 0
3162 }/*-------------------------< HDATA_OUT2 >------------------*/,{
3163 	SCR_JUMP,
3164 		PADDR (data_out),
3165 
3166 }/*-------------------------< RESET >----------------------*/,{
3167 	/*
3168 	**      Send a TARGET_RESET message if bad IDENTIFY
3169 	**	received on reselection.
3170 	*/
3171 	SCR_LOAD_REG (scratcha, ABORT_TASK),
3172 		0,
3173 	SCR_JUMP,
3174 		PADDRH (abort_resel),
3175 }/*-------------------------< ABORTTAG >-------------------*/,{
3176 	/*
3177 	**      Abort a wrong tag received on reselection.
3178 	*/
3179 	SCR_LOAD_REG (scratcha, ABORT_TASK),
3180 		0,
3181 	SCR_JUMP,
3182 		PADDRH (abort_resel),
3183 }/*-------------------------< ABORT >----------------------*/,{
3184 	/*
3185 	**      Abort a reselection when no active CCB.
3186 	*/
3187 	SCR_LOAD_REG (scratcha, ABORT_TASK_SET),
3188 		0,
3189 }/*-------------------------< ABORT_RESEL >----------------*/,{
3190 	SCR_COPY (1),
3191 		RADDR (scratcha),
3192 		NADDR (msgout),
3193 	SCR_SET (SCR_ATN),
3194 		0,
3195 	SCR_CLR (SCR_ACK),
3196 		0,
3197 	/*
3198 	**	and send it.
3199 	**	we expect an immediate disconnect
3200 	*/
3201 	SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3202 		0,
3203 	SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
3204 		NADDR (msgout),
3205 	SCR_COPY (1),
3206 		NADDR (msgout),
3207 		NADDR (lastmsg),
3208 	SCR_CLR (SCR_ACK|SCR_ATN),
3209 		0,
3210 	SCR_WAIT_DISC,
3211 		0,
3212 	SCR_JUMP,
3213 		PADDR (start),
3214 }/*-------------------------< RESEND_IDENT >-------------------*/,{
3215 	/*
3216 	**	The target stays in MSG OUT phase after having acked
3217 	**	Identify [+ Tag [+ Extended message ]]. Targets shall
3218 	**	behave this way on parity error.
3219 	**	We must send it again all the messages.
3220 	*/
3221 	SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the  */
3222 		0,         /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
3223 	SCR_JUMP,
3224 		PADDR (send_ident),
3225 }/*-------------------------< CLRATN_GO_ON >-------------------*/,{
3226 	SCR_CLR (SCR_ATN),
3227 		0,
3228 	SCR_JUMP,
3229 }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{
3230 		0,
3231 }/*-------------------------< SDATA_IN >-------------------*/,{
3232 	SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
3233 		PADDR (dispatch),
3234 	SCR_MOVE_TBL ^ SCR_DATA_IN,
3235 		offsetof (struct dsb, sense),
3236 	SCR_CALL,
3237 		PADDR (dispatch),
3238 	SCR_JUMP,
3239 		PADDR (no_data),
3240 }/*-------------------------< DATA_IO >--------------------*/,{
3241 	/*
3242 	**	We jump here if the data direction was unknown at the
3243 	**	time we had to queue the command to the scripts processor.
3244 	**	Pointers had been set as follow in this situation:
3245 	**	  savep   -->   DATA_IO
3246 	**	  lastp   -->   start pointer when DATA_IN
3247 	**	  goalp   -->   goal  pointer when DATA_IN
3248 	**	  wlastp  -->   start pointer when DATA_OUT
3249 	**	  wgoalp  -->   goal  pointer when DATA_OUT
3250 	**	This script sets savep/lastp/goalp according to the
3251 	**	direction chosen by the target.
3252 	*/
3253 	SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)),
3254 		32,
3255 	/*
3256 	**	Direction is DATA IN.
3257 	**	Warning: we jump here, even when phase is DATA OUT.
3258 	*/
3259 	SCR_COPY (4),
3260 		NADDR (header.lastp),
3261 		NADDR (header.savep),
3262 
3263 	/*
3264 	**	Jump to the SCRIPTS according to actual direction.
3265 	*/
3266 	SCR_COPY (4),
3267 		NADDR (header.savep),
3268 		RADDR (temp),
3269 	SCR_RETURN,
3270 		0,
3271 	/*
3272 	**	Direction is DATA OUT.
3273 	*/
3274 	SCR_COPY (4),
3275 		NADDR (header.wlastp),
3276 		NADDR (header.lastp),
3277 	SCR_COPY (4),
3278 		NADDR (header.wgoalp),
3279 		NADDR (header.goalp),
3280 	SCR_JUMPR,
3281 		-64,
3282 }/*-------------------------< BAD_IDENTIFY >---------------*/,{
3283 	/*
3284 	**	If message phase but not an IDENTIFY,
3285 	**	get some help from the C code.
3286 	**	Old SCSI device may behave so.
3287 	*/
3288 	SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),
3289 		16,
3290 	SCR_INT,
3291 		SIR_RESEL_NO_IDENTIFY,
3292 	SCR_JUMP,
3293 		PADDRH (reset),
3294 	/*
3295 	**	Message is an IDENTIFY, but lun is unknown.
3296 	**	Read the message, since we got it directly
3297 	**	from the SCSI BUS data lines.
3298 	**	Signal problem to C code for logging the event.
3299 	**	Send an ABORT_TASK_SET to clear all pending tasks.
3300 	*/
3301 	SCR_INT,
3302 		SIR_RESEL_BAD_LUN,
3303 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3304 		NADDR (msgin),
3305 	SCR_JUMP,
3306 		PADDRH (abort),
3307 }/*-------------------------< BAD_I_T_L >------------------*/,{
3308 	/*
3309 	**	We donnot have a task for that I_T_L.
3310 	**	Signal problem to C code for logging the event.
3311 	**	Send an ABORT_TASK_SET message.
3312 	*/
3313 	SCR_INT,
3314 		SIR_RESEL_BAD_I_T_L,
3315 	SCR_JUMP,
3316 		PADDRH (abort),
3317 }/*-------------------------< BAD_I_T_L_Q >----------------*/,{
3318 	/*
3319 	**	We donnot have a task that matches the tag.
3320 	**	Signal problem to C code for logging the event.
3321 	**	Send an ABORT_TASK message.
3322 	*/
3323 	SCR_INT,
3324 		SIR_RESEL_BAD_I_T_L_Q,
3325 	SCR_JUMP,
3326 		PADDRH (aborttag),
3327 }/*-------------------------< BAD_TARGET >-----------------*/,{
3328 	/*
3329 	**	We donnot know the target that reselected us.
3330 	**	Grab the first message if any (IDENTIFY).
3331 	**	Signal problem to C code for logging the event.
3332 	**	TARGET_RESET message.
3333 	*/
3334 	SCR_INT,
3335 		SIR_RESEL_BAD_TARGET,
3336 	SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
3337 		8,
3338 	SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3339 		NADDR (msgin),
3340 	SCR_JUMP,
3341 		PADDRH (reset),
3342 }/*-------------------------< BAD_STATUS >-----------------*/,{
3343 	/*
3344 	**	If command resulted in either QUEUE FULL,
3345 	**	CHECK CONDITION or COMMAND TERMINATED,
3346 	**	call the C code.
3347 	*/
3348 	SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)),
3349 		SIR_BAD_STATUS,
3350 	SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)),
3351 		SIR_BAD_STATUS,
3352 	SCR_INT ^ IFTRUE (DATA (S_TERMINATED)),
3353 		SIR_BAD_STATUS,
3354 	SCR_RETURN,
3355 		0,
3356 }/*-------------------------< START_RAM >-------------------*/,{
3357 	/*
3358 	**	Load the script into on-chip RAM,
3359 	**	and jump to start point.
3360 	*/
3361 	SCR_COPY_F (4),
3362 		RADDR (scratcha),
3363 		PADDRH (start_ram0),
3364 	/*
3365 	**	Flush script prefetch if required
3366 	*/
3367 	PREFETCH_FLUSH
3368 	SCR_COPY (sizeof (struct script)),
3369 }/*-------------------------< START_RAM0 >--------------------*/,{
3370 		0,
3371 		PADDR (start),
3372 	SCR_JUMP,
3373 		PADDR (start),
3374 }/*-------------------------< STO_RESTART >-------------------*/,{
3375 	/*
3376 	**
3377 	**	Repair start queue (e.g. next time use the next slot)
3378 	**	and jump to start point.
3379 	*/
3380 	SCR_COPY (4),
3381 		RADDR (temp),
3382 		PADDR (startpos),
3383 	SCR_JUMP,
3384 		PADDR (start),
3385 }/*-------------------------< WAIT_DMA >-------------------*/,{
3386 	/*
3387 	**	For HP Zalon/53c720 systems, the Zalon interface
3388 	**	between CPU and 53c720 does prefetches, which causes
3389 	**	problems with self modifying scripts.  The problem
3390 	**	is overcome by calling a dummy subroutine after each
3391 	**	modification, to force a refetch of the script on
3392 	**	return from the subroutine.
3393 	*/
3394 	SCR_RETURN,
3395 		0,
3396 }/*-------------------------< SNOOPTEST >-------------------*/,{
3397 	/*
3398 	**	Read the variable.
3399 	*/
3400 	SCR_COPY (4),
3401 		NADDR(ncr_cache),
3402 		RADDR (scratcha),
3403 	/*
3404 	**	Write the variable.
3405 	*/
3406 	SCR_COPY (4),
3407 		RADDR (temp),
3408 		NADDR(ncr_cache),
3409 	/*
3410 	**	Read back the variable.
3411 	*/
3412 	SCR_COPY (4),
3413 		NADDR(ncr_cache),
3414 		RADDR (temp),
3415 }/*-------------------------< SNOOPEND >-------------------*/,{
3416 	/*
3417 	**	And stop.
3418 	*/
3419 	SCR_INT,
3420 		99,
3421 }/*--------------------------------------------------------*/
3422 };
3423 
3424 /*==========================================================
3425 **
3426 **
3427 **	Fill in #define dependent parts of the script
3428 **
3429 **
3430 **==========================================================
3431 */
3432 
3433 void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
3434 {
3435 	int	i;
3436 	ncrcmd	*p;
3437 
3438 	p = scrh->tryloop;
3439 	for (i=0; i<MAX_START; i++) {
3440 		*p++ =SCR_CALL;
3441 		*p++ =PADDR (idle);
3442 	}
3443 
3444 	BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop));
3445 
3446 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
3447 
3448 	p = scrh->done_queue;
3449 	for (i = 0; i<MAX_DONE; i++) {
3450 		*p++ =SCR_COPY (sizeof(struct ccb *));
3451 		*p++ =NADDR (header.cp);
3452 		*p++ =NADDR (ccb_done[i]);
3453 		*p++ =SCR_CALL;
3454 		*p++ =PADDR (done_end);
3455 	}
3456 
3457 	BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue));
3458 
3459 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */
3460 
3461 	p = scrh->hdata_in;
3462 	for (i=0; i<MAX_SCATTERH; i++) {
3463 		*p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3464 		*p++ =PADDR (dispatch);
3465 		*p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3466 		*p++ =offsetof (struct dsb, data[i]);
3467 	}
3468 
3469 	BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in));
3470 
3471 	p = scr->data_in;
3472 	for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3473 		*p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
3474 		*p++ =PADDR (dispatch);
3475 		*p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
3476 		*p++ =offsetof (struct dsb, data[i]);
3477 	}
3478 
3479 	BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in));
3480 
3481 	p = scrh->hdata_out;
3482 	for (i=0; i<MAX_SCATTERH; i++) {
3483 		*p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3484 		*p++ =PADDR (dispatch);
3485 		*p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3486 		*p++ =offsetof (struct dsb, data[i]);
3487 	}
3488 
3489 	BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out));
3490 
3491 	p = scr->data_out;
3492 	for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
3493 		*p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
3494 		*p++ =PADDR (dispatch);
3495 		*p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
3496 		*p++ =offsetof (struct dsb, data[i]);
3497 	}
3498 
3499 	BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out));
3500 }
3501 
3502 /*==========================================================
3503 **
3504 **
3505 **	Copy and rebind a script.
3506 **
3507 **
3508 **==========================================================
3509 */
3510 
3511 static void __init
3512 ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len)
3513 {
3514 	ncrcmd  opcode, new, old, tmp1, tmp2;
3515 	ncrcmd	*start, *end;
3516 	int relocs;
3517 	int opchanged = 0;
3518 
3519 	start = src;
3520 	end = src + len/4;
3521 
3522 	while (src < end) {
3523 
3524 		opcode = *src++;
3525 		*dst++ = cpu_to_scr(opcode);
3526 
3527 		/*
3528 		**	If we forget to change the length
3529 		**	in struct script, a field will be
3530 		**	padded with 0. This is an illegal
3531 		**	command.
3532 		*/
3533 
3534 		if (opcode == 0) {
3535 			printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n",
3536 				ncr_name(np), (int) (src-start-1));
3537 			mdelay(1000);
3538 		}
3539 
3540 		if (DEBUG_FLAGS & DEBUG_SCRIPT)
3541 			printk (KERN_DEBUG "%p:  <%x>\n",
3542 				(src-1), (unsigned)opcode);
3543 
3544 		/*
3545 		**	We don't have to decode ALL commands
3546 		*/
3547 		switch (opcode >> 28) {
3548 
3549 		case 0xc:
3550 			/*
3551 			**	COPY has TWO arguments.
3552 			*/
3553 			relocs = 2;
3554 			tmp1 = src[0];
3555 #ifdef	RELOC_KVAR
3556 			if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3557 				tmp1 = 0;
3558 #endif
3559 			tmp2 = src[1];
3560 #ifdef	RELOC_KVAR
3561 			if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3562 				tmp2 = 0;
3563 #endif
3564 			if ((tmp1 ^ tmp2) & 3) {
3565 				printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
3566 					ncr_name(np), (int) (src-start-1));
3567 				mdelay(1000);
3568 			}
3569 			/*
3570 			**	If PREFETCH feature not enabled, remove
3571 			**	the NO FLUSH bit if present.
3572 			*/
3573 			if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) {
3574 				dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
3575 				++opchanged;
3576 			}
3577 			break;
3578 
3579 		case 0x0:
3580 			/*
3581 			**	MOVE (absolute address)
3582 			*/
3583 			relocs = 1;
3584 			break;
3585 
3586 		case 0x8:
3587 			/*
3588 			**	JUMP / CALL
3589 			**	don't relocate if relative :-)
3590 			*/
3591 			if (opcode & 0x00800000)
3592 				relocs = 0;
3593 			else
3594 				relocs = 1;
3595 			break;
3596 
3597 		case 0x4:
3598 		case 0x5:
3599 		case 0x6:
3600 		case 0x7:
3601 			relocs = 1;
3602 			break;
3603 
3604 		default:
3605 			relocs = 0;
3606 			break;
3607 		}
3608 
3609 		if (relocs) {
3610 			while (relocs--) {
3611 				old = *src++;
3612 
3613 				switch (old & RELOC_MASK) {
3614 				case RELOC_REGISTER:
3615 					new = (old & ~RELOC_MASK) + np->paddr;
3616 					break;
3617 				case RELOC_LABEL:
3618 					new = (old & ~RELOC_MASK) + np->p_script;
3619 					break;
3620 				case RELOC_LABELH:
3621 					new = (old & ~RELOC_MASK) + np->p_scripth;
3622 					break;
3623 				case RELOC_SOFTC:
3624 					new = (old & ~RELOC_MASK) + np->p_ncb;
3625 					break;
3626 #ifdef	RELOC_KVAR
3627 				case RELOC_KVAR:
3628 					if (((old & ~RELOC_MASK) <
3629 					     SCRIPT_KVAR_FIRST) ||
3630 					    ((old & ~RELOC_MASK) >
3631 					     SCRIPT_KVAR_LAST))
3632 						panic("ncr KVAR out of range");
3633 					new = vtophys(script_kvars[old &
3634 					    ~RELOC_MASK]);
3635 					break;
3636 #endif
3637 				case 0:
3638 					/* Don't relocate a 0 address. */
3639 					if (old == 0) {
3640 						new = old;
3641 						break;
3642 					}
3643 					fallthrough;
3644 				default:
3645 					panic("ncr_script_copy_and_bind: weird relocation %x\n", old);
3646 					break;
3647 				}
3648 
3649 				*dst++ = cpu_to_scr(new);
3650 			}
3651 		} else
3652 			*dst++ = cpu_to_scr(*src++);
3653 
3654 	}
3655 }
3656 
3657 /*
3658 **	Linux host data structure
3659 */
3660 
3661 struct host_data {
3662      struct ncb *ncb;
3663 };
3664 
3665 #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
3666 
3667 static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg)
3668 {
3669 	PRINT_ADDR(cp->cmd, "%s: ", label);
3670 
3671 	spi_print_msg(msg);
3672 	printk("\n");
3673 }
3674 
3675 /*==========================================================
3676 **
3677 **	NCR chip clock divisor table.
3678 **	Divisors are multiplied by 10,000,000 in order to make
3679 **	calculations more simple.
3680 **
3681 **==========================================================
3682 */
3683 
3684 #define _5M 5000000
3685 static u_long div_10M[] =
3686 	{2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3687 
3688 
3689 /*===============================================================
3690 **
3691 **	Prepare io register values used by ncr_init() according
3692 **	to selected and supported features.
3693 **
3694 **	NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3695 **	transfers. 32,64,128 are only supported by 875 and 895 chips.
3696 **	We use log base 2 (burst length) as internal code, with
3697 **	value 0 meaning "burst disabled".
3698 **
3699 **===============================================================
3700 */
3701 
3702 /*
3703  *	Burst length from burst code.
3704  */
3705 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3706 
3707 /*
3708  *	Burst code from io register bits.  Burst enable is ctest0 for c720
3709  */
3710 #define burst_code(dmode, ctest0) \
3711 	(ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1
3712 
3713 /*
3714  *	Set initial io register bits from burst code.
3715  */
3716 static inline void ncr_init_burst(struct ncb *np, u_char bc)
3717 {
3718 	u_char *be = &np->rv_ctest0;
3719 	*be		&= ~0x80;
3720 	np->rv_dmode	&= ~(0x3 << 6);
3721 	np->rv_ctest5	&= ~0x4;
3722 
3723 	if (!bc) {
3724 		*be		|= 0x80;
3725 	} else {
3726 		--bc;
3727 		np->rv_dmode	|= ((bc & 0x3) << 6);
3728 		np->rv_ctest5	|= (bc & 0x4);
3729 	}
3730 }
3731 
3732 static void __init ncr_prepare_setting(struct ncb *np)
3733 {
3734 	u_char	burst_max;
3735 	u_long	period;
3736 	int i;
3737 
3738 	/*
3739 	**	Save assumed BIOS setting
3740 	*/
3741 
3742 	np->sv_scntl0	= INB(nc_scntl0) & 0x0a;
3743 	np->sv_scntl3	= INB(nc_scntl3) & 0x07;
3744 	np->sv_dmode	= INB(nc_dmode)  & 0xce;
3745 	np->sv_dcntl	= INB(nc_dcntl)  & 0xa8;
3746 	np->sv_ctest0	= INB(nc_ctest0) & 0x84;
3747 	np->sv_ctest3	= INB(nc_ctest3) & 0x01;
3748 	np->sv_ctest4	= INB(nc_ctest4) & 0x80;
3749 	np->sv_ctest5	= INB(nc_ctest5) & 0x24;
3750 	np->sv_gpcntl	= INB(nc_gpcntl);
3751 	np->sv_stest2	= INB(nc_stest2) & 0x20;
3752 	np->sv_stest4	= INB(nc_stest4);
3753 
3754 	/*
3755 	**	Wide ?
3756 	*/
3757 
3758 	np->maxwide	= (np->features & FE_WIDE)? 1 : 0;
3759 
3760  	/*
3761 	 *  Guess the frequency of the chip's clock.
3762 	 */
3763 	if (np->features & FE_ULTRA)
3764 		np->clock_khz = 80000;
3765 	else
3766 		np->clock_khz = 40000;
3767 
3768 	/*
3769 	 *  Get the clock multiplier factor.
3770  	 */
3771 	if	(np->features & FE_QUAD)
3772 		np->multiplier	= 4;
3773 	else if	(np->features & FE_DBLR)
3774 		np->multiplier	= 2;
3775 	else
3776 		np->multiplier	= 1;
3777 
3778 	/*
3779 	 *  Measure SCSI clock frequency for chips
3780 	 *  it may vary from assumed one.
3781 	 */
3782 	if (np->features & FE_VARCLK)
3783 		ncr_getclock(np, np->multiplier);
3784 
3785 	/*
3786 	 * Divisor to be used for async (timer pre-scaler).
3787 	 */
3788 	i = np->clock_divn - 1;
3789 	while (--i >= 0) {
3790 		if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3791 			++i;
3792 			break;
3793 		}
3794 	}
3795 	np->rv_scntl3 = i+1;
3796 
3797 	/*
3798 	 * Minimum synchronous period factor supported by the chip.
3799 	 * Btw, 'period' is in tenths of nanoseconds.
3800 	 */
3801 
3802 	period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3803 	if	(period <= 250)		np->minsync = 10;
3804 	else if	(period <= 303)		np->minsync = 11;
3805 	else if	(period <= 500)		np->minsync = 12;
3806 	else				np->minsync = (period + 40 - 1) / 40;
3807 
3808 	/*
3809 	 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3810 	 */
3811 
3812 	if	(np->minsync < 25 && !(np->features & FE_ULTRA))
3813 		np->minsync = 25;
3814 
3815 	/*
3816 	 * Maximum synchronous period factor supported by the chip.
3817 	 */
3818 
3819 	period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3820 	np->maxsync = period > 2540 ? 254 : period / 10;
3821 
3822 	/*
3823 	**	Prepare initial value of other IO registers
3824 	*/
3825 #if defined SCSI_NCR_TRUST_BIOS_SETTING
3826 	np->rv_scntl0	= np->sv_scntl0;
3827 	np->rv_dmode	= np->sv_dmode;
3828 	np->rv_dcntl	= np->sv_dcntl;
3829 	np->rv_ctest0	= np->sv_ctest0;
3830 	np->rv_ctest3	= np->sv_ctest3;
3831 	np->rv_ctest4	= np->sv_ctest4;
3832 	np->rv_ctest5	= np->sv_ctest5;
3833 	burst_max	= burst_code(np->sv_dmode, np->sv_ctest0);
3834 #else
3835 
3836 	/*
3837 	**	Select burst length (dwords)
3838 	*/
3839 	burst_max	= driver_setup.burst_max;
3840 	if (burst_max == 255)
3841 		burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3842 	if (burst_max > 7)
3843 		burst_max = 7;
3844 	if (burst_max > np->maxburst)
3845 		burst_max = np->maxburst;
3846 
3847 	/*
3848 	**	Select all supported special features
3849 	*/
3850 	if (np->features & FE_ERL)
3851 		np->rv_dmode	|= ERL;		/* Enable Read Line */
3852 	if (np->features & FE_BOF)
3853 		np->rv_dmode	|= BOF;		/* Burst Opcode Fetch */
3854 	if (np->features & FE_ERMP)
3855 		np->rv_dmode	|= ERMP;	/* Enable Read Multiple */
3856 	if (np->features & FE_PFEN)
3857 		np->rv_dcntl	|= PFEN;	/* Prefetch Enable */
3858 	if (np->features & FE_CLSE)
3859 		np->rv_dcntl	|= CLSE;	/* Cache Line Size Enable */
3860 	if (np->features & FE_WRIE)
3861 		np->rv_ctest3	|= WRIE;	/* Write and Invalidate */
3862 	if (np->features & FE_DFS)
3863 		np->rv_ctest5	|= DFS;		/* Dma Fifo Size */
3864 	if (np->features & FE_MUX)
3865 		np->rv_ctest4	|= MUX;		/* Host bus multiplex mode */
3866 	if (np->features & FE_EA)
3867 		np->rv_dcntl	|= EA;		/* Enable ACK */
3868 	if (np->features & FE_EHP)
3869 		np->rv_ctest0	|= EHP;		/* Even host parity */
3870 
3871 	/*
3872 	**	Select some other
3873 	*/
3874 	if (driver_setup.master_parity)
3875 		np->rv_ctest4	|= MPEE;	/* Master parity checking */
3876 	if (driver_setup.scsi_parity)
3877 		np->rv_scntl0	|= 0x0a;	/*  full arb., ena parity, par->ATN  */
3878 
3879 	/*
3880 	**  Get SCSI addr of host adapter (set by bios?).
3881 	*/
3882 	if (np->myaddr == 255) {
3883 		np->myaddr = INB(nc_scid) & 0x07;
3884 		if (!np->myaddr)
3885 			np->myaddr = SCSI_NCR_MYADDR;
3886 	}
3887 
3888 #endif /* SCSI_NCR_TRUST_BIOS_SETTING */
3889 
3890 	/*
3891 	 *	Prepare initial io register bits for burst length
3892 	 */
3893 	ncr_init_burst(np, burst_max);
3894 
3895 	/*
3896 	**	Set SCSI BUS mode.
3897 	**
3898 	**	- ULTRA2 chips (895/895A/896) report the current
3899 	**	  BUS mode through the STEST4 IO register.
3900 	**	- For previous generation chips (825/825A/875),
3901 	**	  user has to tell us how to check against HVD,
3902 	**	  since a 100% safe algorithm is not possible.
3903 	*/
3904 	np->scsi_mode = SMODE_SE;
3905 	if (np->features & FE_DIFF) {
3906 		switch(driver_setup.diff_support) {
3907 		case 4:	/* Trust previous settings if present, then GPIO3 */
3908 			if (np->sv_scntl3) {
3909 				if (np->sv_stest2 & 0x20)
3910 					np->scsi_mode = SMODE_HVD;
3911 				break;
3912 			}
3913 			fallthrough;
3914 		case 3:	/* SYMBIOS controllers report HVD through GPIO3 */
3915 			if (INB(nc_gpreg) & 0x08)
3916 				break;
3917 			fallthrough;
3918 		case 2:	/* Set HVD unconditionally */
3919 			np->scsi_mode = SMODE_HVD;
3920 			fallthrough;
3921 		case 1:	/* Trust previous settings for HVD */
3922 			if (np->sv_stest2 & 0x20)
3923 				np->scsi_mode = SMODE_HVD;
3924 			break;
3925 		default:/* Don't care about HVD */
3926 			break;
3927 		}
3928 	}
3929 	if (np->scsi_mode == SMODE_HVD)
3930 		np->rv_stest2 |= 0x20;
3931 
3932 	/*
3933 	**	Set LED support from SCRIPTS.
3934 	**	Ignore this feature for boards known to use a
3935 	**	specific GPIO wiring and for the 895A or 896
3936 	**	that drive the LED directly.
3937 	**	Also probe initial setting of GPIO0 as output.
3938 	*/
3939 	if ((driver_setup.led_pin) &&
3940 	    !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
3941 		np->features |= FE_LED0;
3942 
3943 	/*
3944 	**	Set irq mode.
3945 	*/
3946 	switch(driver_setup.irqm & 3) {
3947 	case 2:
3948 		np->rv_dcntl	|= IRQM;
3949 		break;
3950 	case 1:
3951 		np->rv_dcntl	|= (np->sv_dcntl & IRQM);
3952 		break;
3953 	default:
3954 		break;
3955 	}
3956 
3957 	/*
3958 	**	Configure targets according to driver setup.
3959 	**	Allow to override sync, wide and NOSCAN from
3960 	**	boot command line.
3961 	*/
3962 	for (i = 0 ; i < MAX_TARGET ; i++) {
3963 		struct tcb *tp = &np->target[i];
3964 
3965 		tp->usrsync = driver_setup.default_sync;
3966 		tp->usrwide = driver_setup.max_wide;
3967 		tp->usrtags = MAX_TAGS;
3968 		tp->period = 0xffff;
3969 		if (!driver_setup.disconnection)
3970 			np->target[i].usrflag = UF_NODISC;
3971 	}
3972 
3973 	/*
3974 	**	Announce all that stuff to user.
3975 	*/
3976 
3977 	printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np),
3978 		np->myaddr,
3979 		np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
3980 		(np->rv_scntl0 & 0xa)	? ", Parity Checking"	: ", NO Parity",
3981 		(np->rv_stest2 & 0x20)	? ", Differential"	: "");
3982 
3983 	if (bootverbose > 1) {
3984 		printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3985 			"(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3986 			ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3987 			np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3988 
3989 		printk (KERN_INFO "%s: final   SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3990 			"(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3991 			ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3992 			np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3993 	}
3994 
3995 	if (bootverbose && np->paddr2)
3996 		printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
3997 			ncr_name(np), np->paddr2);
3998 }
3999 
4000 /*==========================================================
4001 **
4002 **
4003 **	Done SCSI commands list management.
4004 **
4005 **	We donnot enter the scsi_done() callback immediately
4006 **	after a command has been seen as completed but we
4007 **	insert it into a list which is flushed outside any kind
4008 **	of driver critical section.
4009 **	This allows to do minimal stuff under interrupt and
4010 **	inside critical sections and to also avoid locking up
4011 **	on recursive calls to driver entry points under SMP.
4012 **	In fact, the only kernel point which is entered by the
4013 **	driver with a driver lock set is kmalloc(GFP_ATOMIC)
4014 **	that shall not reenter the driver under any circumstances,
4015 **	AFAIK.
4016 **
4017 **==========================================================
4018 */
4019 static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd)
4020 {
4021 	unmap_scsi_data(np, cmd);
4022 	cmd->host_scribble = (char *) np->done_list;
4023 	np->done_list = cmd;
4024 }
4025 
4026 static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd)
4027 {
4028 	struct scsi_cmnd *cmd;
4029 
4030 	while (lcmd) {
4031 		cmd = lcmd;
4032 		lcmd = (struct scsi_cmnd *) cmd->host_scribble;
4033 		cmd->scsi_done(cmd);
4034 	}
4035 }
4036 
4037 /*==========================================================
4038 **
4039 **
4040 **	Prepare the next negotiation message if needed.
4041 **
4042 **	Fill in the part of message buffer that contains the
4043 **	negotiation and the nego_status field of the CCB.
4044 **	Returns the size of the message in bytes.
4045 **
4046 **
4047 **==========================================================
4048 */
4049 
4050 
4051 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr)
4052 {
4053 	struct tcb *tp = &np->target[cp->target];
4054 	int msglen = 0;
4055 	int nego = 0;
4056 	struct scsi_target *starget = tp->starget;
4057 
4058 	/* negotiate wide transfers ?  */
4059 	if (!tp->widedone) {
4060 		if (spi_support_wide(starget)) {
4061 			nego = NS_WIDE;
4062 		} else
4063 			tp->widedone=1;
4064 	}
4065 
4066 	/* negotiate synchronous transfers?  */
4067 	if (!nego && !tp->period) {
4068 		if (spi_support_sync(starget)) {
4069 			nego = NS_SYNC;
4070 		} else {
4071 			tp->period  =0xffff;
4072 			dev_info(&starget->dev, "target did not report SYNC.\n");
4073 		}
4074 	}
4075 
4076 	switch (nego) {
4077 	case NS_SYNC:
4078 		msglen += spi_populate_sync_msg(msgptr + msglen,
4079 				tp->maxoffs ? tp->minsync : 0, tp->maxoffs);
4080 		break;
4081 	case NS_WIDE:
4082 		msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide);
4083 		break;
4084 	}
4085 
4086 	cp->nego_status = nego;
4087 
4088 	if (nego) {
4089 		tp->nego_cp = cp;
4090 		if (DEBUG_FLAGS & DEBUG_NEGO) {
4091 			ncr_print_msg(cp, nego == NS_WIDE ?
4092 					  "wide msgout":"sync_msgout", msgptr);
4093 		}
4094 	}
4095 
4096 	return msglen;
4097 }
4098 
4099 
4100 
4101 /*==========================================================
4102 **
4103 **
4104 **	Start execution of a SCSI command.
4105 **	This is called from the generic SCSI driver.
4106 **
4107 **
4108 **==========================================================
4109 */
4110 static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd)
4111 {
4112 	struct scsi_device *sdev = cmd->device;
4113 	struct tcb *tp = &np->target[sdev->id];
4114 	struct lcb *lp = tp->lp[sdev->lun];
4115 	struct ccb *cp;
4116 
4117 	int	segments;
4118 	u_char	idmsg, *msgptr;
4119 	u32	msglen;
4120 	int	direction;
4121 	u32	lastp, goalp;
4122 
4123 	/*---------------------------------------------
4124 	**
4125 	**      Some shortcuts ...
4126 	**
4127 	**---------------------------------------------
4128 	*/
4129 	if ((sdev->id == np->myaddr	  ) ||
4130 		(sdev->id >= MAX_TARGET) ||
4131 		(sdev->lun    >= MAX_LUN   )) {
4132 		return(DID_BAD_TARGET);
4133 	}
4134 
4135 	/*---------------------------------------------
4136 	**
4137 	**	Complete the 1st TEST UNIT READY command
4138 	**	with error condition if the device is
4139 	**	flagged NOSCAN, in order to speed up
4140 	**	the boot.
4141 	**
4142 	**---------------------------------------------
4143 	*/
4144 	if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
4145 	    (tp->usrflag & UF_NOSCAN)) {
4146 		tp->usrflag &= ~UF_NOSCAN;
4147 		return DID_BAD_TARGET;
4148 	}
4149 
4150 	if (DEBUG_FLAGS & DEBUG_TINY) {
4151 		PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]);
4152 	}
4153 
4154 	/*---------------------------------------------------
4155 	**
4156 	**	Assign a ccb / bind cmd.
4157 	**	If resetting, shorten settle_time if necessary
4158 	**	in order to avoid spurious timeouts.
4159 	**	If resetting or no free ccb,
4160 	**	insert cmd into the waiting list.
4161 	**
4162 	**----------------------------------------------------
4163 	*/
4164 	if (np->settle_time && cmd->request->timeout >= HZ) {
4165 		u_long tlimit = jiffies + cmd->request->timeout - HZ;
4166 		if (time_after(np->settle_time, tlimit))
4167 			np->settle_time = tlimit;
4168 	}
4169 
4170 	if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) {
4171 		insert_into_waiting_list(np, cmd);
4172 		return(DID_OK);
4173 	}
4174 	cp->cmd = cmd;
4175 
4176 	/*----------------------------------------------------
4177 	**
4178 	**	Build the identify / tag / sdtr message
4179 	**
4180 	**----------------------------------------------------
4181 	*/
4182 
4183 	idmsg = IDENTIFY(0, sdev->lun);
4184 
4185 	if (cp ->tag != NO_TAG ||
4186 		(cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC)))
4187 		idmsg |= 0x40;
4188 
4189 	msgptr = cp->scsi_smsg;
4190 	msglen = 0;
4191 	msgptr[msglen++] = idmsg;
4192 
4193 	if (cp->tag != NO_TAG) {
4194 		char order = np->order;
4195 
4196 		/*
4197 		**	Force ordered tag if necessary to avoid timeouts
4198 		**	and to preserve interactivity.
4199 		*/
4200 		if (lp && time_after(jiffies, lp->tags_stime)) {
4201 			if (lp->tags_smap) {
4202 				order = ORDERED_QUEUE_TAG;
4203 				if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){
4204 					PRINT_ADDR(cmd,
4205 						"ordered tag forced.\n");
4206 				}
4207 			}
4208 			lp->tags_stime = jiffies + 3*HZ;
4209 			lp->tags_smap = lp->tags_umap;
4210 		}
4211 
4212 		if (order == 0) {
4213 			/*
4214 			**	Ordered write ops, unordered read ops.
4215 			*/
4216 			switch (cmd->cmnd[0]) {
4217 			case 0x08:  /* READ_SMALL (6) */
4218 			case 0x28:  /* READ_BIG  (10) */
4219 			case 0xa8:  /* READ_HUGE (12) */
4220 				order = SIMPLE_QUEUE_TAG;
4221 				break;
4222 			default:
4223 				order = ORDERED_QUEUE_TAG;
4224 			}
4225 		}
4226 		msgptr[msglen++] = order;
4227 		/*
4228 		**	Actual tags are numbered 1,3,5,..2*MAXTAGS+1,
4229 		**	since we may have to deal with devices that have
4230 		**	problems with #TAG 0 or too great #TAG numbers.
4231 		*/
4232 		msgptr[msglen++] = (cp->tag << 1) + 1;
4233 	}
4234 
4235 	/*----------------------------------------------------
4236 	**
4237 	**	Build the data descriptors
4238 	**
4239 	**----------------------------------------------------
4240 	*/
4241 
4242 	direction = cmd->sc_data_direction;
4243 	if (direction != DMA_NONE) {
4244 		segments = ncr_scatter(np, cp, cp->cmd);
4245 		if (segments < 0) {
4246 			ncr_free_ccb(np, cp);
4247 			return(DID_ERROR);
4248 		}
4249 	}
4250 	else {
4251 		cp->data_len = 0;
4252 		segments = 0;
4253 	}
4254 
4255 	/*---------------------------------------------------
4256 	**
4257 	**	negotiation required?
4258 	**
4259 	**	(nego_status is filled by ncr_prepare_nego())
4260 	**
4261 	**---------------------------------------------------
4262 	*/
4263 
4264 	cp->nego_status = 0;
4265 
4266 	if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
4267 		msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
4268 	}
4269 
4270 	/*----------------------------------------------------
4271 	**
4272 	**	Determine xfer direction.
4273 	**
4274 	**----------------------------------------------------
4275 	*/
4276 	if (!cp->data_len)
4277 		direction = DMA_NONE;
4278 
4279 	/*
4280 	**	If data direction is BIDIRECTIONAL, speculate FROM_DEVICE
4281 	**	but prepare alternate pointers for TO_DEVICE in case
4282 	**	of our speculation will be just wrong.
4283 	**	SCRIPTS will swap values if needed.
4284 	*/
4285 	switch(direction) {
4286 	case DMA_BIDIRECTIONAL:
4287 	case DMA_TO_DEVICE:
4288 		goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
4289 		if (segments <= MAX_SCATTERL)
4290 			lastp = goalp - 8 - (segments * 16);
4291 		else {
4292 			lastp = NCB_SCRIPTH_PHYS (np, hdata_out2);
4293 			lastp -= (segments - MAX_SCATTERL) * 16;
4294 		}
4295 		if (direction != DMA_BIDIRECTIONAL)
4296 			break;
4297 		cp->phys.header.wgoalp	= cpu_to_scr(goalp);
4298 		cp->phys.header.wlastp	= cpu_to_scr(lastp);
4299 		fallthrough;
4300 	case DMA_FROM_DEVICE:
4301 		goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
4302 		if (segments <= MAX_SCATTERL)
4303 			lastp = goalp - 8 - (segments * 16);
4304 		else {
4305 			lastp = NCB_SCRIPTH_PHYS (np, hdata_in2);
4306 			lastp -= (segments - MAX_SCATTERL) * 16;
4307 		}
4308 		break;
4309 	default:
4310 	case DMA_NONE:
4311 		lastp = goalp = NCB_SCRIPT_PHYS (np, no_data);
4312 		break;
4313 	}
4314 
4315 	/*
4316 	**	Set all pointers values needed by SCRIPTS.
4317 	**	If direction is unknown, start at data_io.
4318 	*/
4319 	cp->phys.header.lastp = cpu_to_scr(lastp);
4320 	cp->phys.header.goalp = cpu_to_scr(goalp);
4321 
4322 	if (direction == DMA_BIDIRECTIONAL)
4323 		cp->phys.header.savep =
4324 			cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
4325 	else
4326 		cp->phys.header.savep= cpu_to_scr(lastp);
4327 
4328 	/*
4329 	**	Save the initial data pointer in order to be able
4330 	**	to redo the command.
4331 	*/
4332 	cp->startp = cp->phys.header.savep;
4333 
4334 	/*----------------------------------------------------
4335 	**
4336 	**	fill in ccb
4337 	**
4338 	**----------------------------------------------------
4339 	**
4340 	**
4341 	**	physical -> virtual backlink
4342 	**	Generic SCSI command
4343 	*/
4344 
4345 	/*
4346 	**	Startqueue
4347 	*/
4348 	cp->start.schedule.l_paddr   = cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
4349 	cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa));
4350 	/*
4351 	**	select
4352 	*/
4353 	cp->phys.select.sel_id		= sdev_id(sdev);
4354 	cp->phys.select.sel_scntl3	= tp->wval;
4355 	cp->phys.select.sel_sxfer	= tp->sval;
4356 	/*
4357 	**	message
4358 	*/
4359 	cp->phys.smsg.addr		= cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
4360 	cp->phys.smsg.size		= cpu_to_scr(msglen);
4361 
4362 	/*
4363 	**	command
4364 	*/
4365 	memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf)));
4366 	cp->phys.cmd.addr		= cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
4367 	cp->phys.cmd.size		= cpu_to_scr(cmd->cmd_len);
4368 
4369 	/*
4370 	**	status
4371 	*/
4372 	cp->actualquirks		= 0;
4373 	cp->host_status			= cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4374 	cp->scsi_status			= S_ILLEGAL;
4375 	cp->parity_status		= 0;
4376 
4377 	cp->xerr_status			= XE_OK;
4378 #if 0
4379 	cp->sync_status			= tp->sval;
4380 	cp->wide_status			= tp->wval;
4381 #endif
4382 
4383 	/*----------------------------------------------------
4384 	**
4385 	**	Critical region: start this job.
4386 	**
4387 	**----------------------------------------------------
4388 	*/
4389 
4390 	/* activate this job.  */
4391 	cp->magic		= CCB_MAGIC;
4392 
4393 	/*
4394 	**	insert next CCBs into start queue.
4395 	**	2 max at a time is enough to flush the CCB wait queue.
4396 	*/
4397 	cp->auto_sense = 0;
4398 	if (lp)
4399 		ncr_start_next_ccb(np, lp, 2);
4400 	else
4401 		ncr_put_start_queue(np, cp);
4402 
4403 	/* Command is successfully queued.  */
4404 
4405 	return DID_OK;
4406 }
4407 
4408 
4409 /*==========================================================
4410 **
4411 **
4412 **	Insert a CCB into the start queue and wake up the
4413 **	SCRIPTS processor.
4414 **
4415 **
4416 **==========================================================
4417 */
4418 
4419 static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn)
4420 {
4421 	struct list_head *qp;
4422 	struct ccb *cp;
4423 
4424 	if (lp->held_ccb)
4425 		return;
4426 
4427 	while (maxn-- && lp->queuedccbs < lp->queuedepth) {
4428 		qp = ncr_list_pop(&lp->wait_ccbq);
4429 		if (!qp)
4430 			break;
4431 		++lp->queuedccbs;
4432 		cp = list_entry(qp, struct ccb, link_ccbq);
4433 		list_add_tail(qp, &lp->busy_ccbq);
4434 		lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] =
4435 			cpu_to_scr(CCB_PHYS (cp, restart));
4436 		ncr_put_start_queue(np, cp);
4437 	}
4438 }
4439 
4440 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp)
4441 {
4442 	u16	qidx;
4443 
4444 	/*
4445 	**	insert into start queue.
4446 	*/
4447 	if (!np->squeueput) np->squeueput = 1;
4448 	qidx = np->squeueput + 2;
4449 	if (qidx >= MAX_START + MAX_START) qidx = 1;
4450 
4451 	np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
4452 	MEMORY_BARRIER();
4453 	np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start));
4454 
4455 	np->squeueput = qidx;
4456 	++np->queuedccbs;
4457 	cp->queued = 1;
4458 
4459 	if (DEBUG_FLAGS & DEBUG_QUEUE)
4460 		printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
4461 
4462 	/*
4463 	**	Script processor may be waiting for reselect.
4464 	**	Wake it up.
4465 	*/
4466 	MEMORY_BARRIER();
4467 	OUTB (nc_istat, SIGP);
4468 }
4469 
4470 
4471 static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay)
4472 {
4473 	u32 term;
4474 	int retv = 0;
4475 
4476 	np->settle_time	= jiffies + settle_delay * HZ;
4477 
4478 	if (bootverbose > 1)
4479 		printk("%s: resetting, "
4480 			"command processing suspended for %d seconds\n",
4481 			ncr_name(np), settle_delay);
4482 
4483 	ncr_chip_reset(np, 100);
4484 	udelay(2000);	/* The 895 needs time for the bus mode to settle */
4485 	if (enab_int)
4486 		OUTW (nc_sien, RST);
4487 	/*
4488 	**	Enable Tolerant, reset IRQD if present and
4489 	**	properly set IRQ mode, prior to resetting the bus.
4490 	*/
4491 	OUTB (nc_stest3, TE);
4492 	OUTB (nc_scntl1, CRST);
4493 	udelay(200);
4494 
4495 	if (!driver_setup.bus_check)
4496 		goto out;
4497 	/*
4498 	**	Check for no terminators or SCSI bus shorts to ground.
4499 	**	Read SCSI data bus, data parity bits and control signals.
4500 	**	We are expecting RESET to be TRUE and other signals to be
4501 	**	FALSE.
4502 	*/
4503 
4504 	term =	INB(nc_sstat0);
4505 	term =	((term & 2) << 7) + ((term & 1) << 17);	/* rst sdp0 */
4506 	term |= ((INB(nc_sstat2) & 0x01) << 26) |	/* sdp1     */
4507 		((INW(nc_sbdl) & 0xff)   << 9)  |	/* d7-0     */
4508 		((INW(nc_sbdl) & 0xff00) << 10) |	/* d15-8    */
4509 		INB(nc_sbcl);	/* req ack bsy sel atn msg cd io    */
4510 
4511 	if (!(np->features & FE_WIDE))
4512 		term &= 0x3ffff;
4513 
4514 	if (term != (2<<7)) {
4515 		printk("%s: suspicious SCSI data while resetting the BUS.\n",
4516 			ncr_name(np));
4517 		printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
4518 			"0x%lx, expecting 0x%lx\n",
4519 			ncr_name(np),
4520 			(np->features & FE_WIDE) ? "dp1,d15-8," : "",
4521 			(u_long)term, (u_long)(2<<7));
4522 		if (driver_setup.bus_check == 1)
4523 			retv = 1;
4524 	}
4525 out:
4526 	OUTB (nc_scntl1, 0);
4527 	return retv;
4528 }
4529 
4530 /*
4531  * Start reset process.
4532  * If reset in progress do nothing.
4533  * The interrupt handler will reinitialize the chip.
4534  * The timeout handler will wait for settle_time before
4535  * clearing it and so resuming command processing.
4536  */
4537 static void ncr_start_reset(struct ncb *np)
4538 {
4539 	if (!np->settle_time) {
4540 		ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
4541  	}
4542 }
4543 
4544 /*==========================================================
4545 **
4546 **
4547 **	Reset the SCSI BUS.
4548 **	This is called from the generic SCSI driver.
4549 **
4550 **
4551 **==========================================================
4552 */
4553 static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset)
4554 {
4555 /*	struct scsi_device        *device    = cmd->device; */
4556 	struct ccb *cp;
4557 	int found;
4558 
4559 /*
4560  * Return immediately if reset is in progress.
4561  */
4562 	if (np->settle_time) {
4563 		return FAILED;
4564 	}
4565 /*
4566  * Start the reset process.
4567  * The script processor is then assumed to be stopped.
4568  * Commands will now be queued in the waiting list until a settle
4569  * delay of 2 seconds will be completed.
4570  */
4571 	ncr_start_reset(np);
4572 /*
4573  * First, look in the wakeup list
4574  */
4575 	for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4576 		/*
4577 		**	look for the ccb of this command.
4578 		*/
4579 		if (cp->host_status == HS_IDLE) continue;
4580 		if (cp->cmd == cmd) {
4581 			found = 1;
4582 			break;
4583 		}
4584 	}
4585 /*
4586  * Then, look in the waiting list
4587  */
4588 	if (!found && retrieve_from_waiting_list(0, np, cmd))
4589 		found = 1;
4590 /*
4591  * Wake-up all awaiting commands with DID_RESET.
4592  */
4593 	reset_waiting_list(np);
4594 /*
4595  * Wake-up all pending commands with HS_RESET -> DID_RESET.
4596  */
4597 	ncr_wakeup(np, HS_RESET);
4598 /*
4599  * If the involved command was not in a driver queue, and the
4600  * scsi driver told us reset is synchronous, and the command is not
4601  * currently in the waiting list, complete it with DID_RESET status,
4602  * in order to keep it alive.
4603  */
4604 	if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
4605 		cmd->result = DID_RESET << 16;
4606 		ncr_queue_done_cmd(np, cmd);
4607 	}
4608 
4609 	return SUCCESS;
4610 }
4611 
4612 #if 0 /* unused and broken.. */
4613 /*==========================================================
4614 **
4615 **
4616 **	Abort an SCSI command.
4617 **	This is called from the generic SCSI driver.
4618 **
4619 **
4620 **==========================================================
4621 */
4622 static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd)
4623 {
4624 /*	struct scsi_device        *device    = cmd->device; */
4625 	struct ccb *cp;
4626 	int found;
4627 	int retv;
4628 
4629 /*
4630  * First, look for the scsi command in the waiting list
4631  */
4632 	if (remove_from_waiting_list(np, cmd)) {
4633 		cmd->result = ScsiResult(DID_ABORT, 0);
4634 		ncr_queue_done_cmd(np, cmd);
4635 		return SCSI_ABORT_SUCCESS;
4636 	}
4637 
4638 /*
4639  * Then, look in the wakeup list
4640  */
4641 	for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
4642 		/*
4643 		**	look for the ccb of this command.
4644 		*/
4645 		if (cp->host_status == HS_IDLE) continue;
4646 		if (cp->cmd == cmd) {
4647 			found = 1;
4648 			break;
4649 		}
4650 	}
4651 
4652 	if (!found) {
4653 		return SCSI_ABORT_NOT_RUNNING;
4654 	}
4655 
4656 	if (np->settle_time) {
4657 		return SCSI_ABORT_SNOOZE;
4658 	}
4659 
4660 	/*
4661 	**	If the CCB is active, patch schedule jumps for the
4662 	**	script to abort the command.
4663 	*/
4664 
4665 	switch(cp->host_status) {
4666 	case HS_BUSY:
4667 	case HS_NEGOTIATE:
4668 		printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp);
4669 			cp->start.schedule.l_paddr =
4670 				cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel));
4671 		retv = SCSI_ABORT_PENDING;
4672 		break;
4673 	case HS_DISCONNECT:
4674 		cp->restart.schedule.l_paddr =
4675 				cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
4676 		retv = SCSI_ABORT_PENDING;
4677 		break;
4678 	default:
4679 		retv = SCSI_ABORT_NOT_RUNNING;
4680 		break;
4681 
4682 	}
4683 
4684 	/*
4685 	**      If there are no requests, the script
4686 	**      processor will sleep on SEL_WAIT_RESEL.
4687 	**      Let's wake it up, since it may have to work.
4688 	*/
4689 	OUTB (nc_istat, SIGP);
4690 
4691 	return retv;
4692 }
4693 #endif
4694 
4695 static void ncr_detach(struct ncb *np)
4696 {
4697 	struct ccb *cp;
4698 	struct tcb *tp;
4699 	struct lcb *lp;
4700 	int target, lun;
4701 	int i;
4702 	char inst_name[16];
4703 
4704 	/* Local copy so we don't access np after freeing it! */
4705 	strlcpy(inst_name, ncr_name(np), sizeof(inst_name));
4706 
4707 	printk("%s: releasing host resources\n", ncr_name(np));
4708 
4709 /*
4710 **	Stop the ncr_timeout process
4711 **	Set release_stage to 1 and wait that ncr_timeout() set it to 2.
4712 */
4713 
4714 #ifdef DEBUG_NCR53C8XX
4715 	printk("%s: stopping the timer\n", ncr_name(np));
4716 #endif
4717 	np->release_stage = 1;
4718 	for (i = 50 ; i && np->release_stage != 2 ; i--)
4719 		mdelay(100);
4720 	if (np->release_stage != 2)
4721 		printk("%s: the timer seems to be already stopped\n", ncr_name(np));
4722 	else np->release_stage = 2;
4723 
4724 /*
4725 **	Disable chip interrupts
4726 */
4727 
4728 #ifdef DEBUG_NCR53C8XX
4729 	printk("%s: disabling chip interrupts\n", ncr_name(np));
4730 #endif
4731 	OUTW (nc_sien , 0);
4732 	OUTB (nc_dien , 0);
4733 
4734 	/*
4735 	**	Reset NCR chip
4736 	**	Restore bios setting for automatic clock detection.
4737 	*/
4738 
4739 	printk("%s: resetting chip\n", ncr_name(np));
4740 	ncr_chip_reset(np, 100);
4741 
4742 	OUTB(nc_dmode,	np->sv_dmode);
4743 	OUTB(nc_dcntl,	np->sv_dcntl);
4744 	OUTB(nc_ctest0,	np->sv_ctest0);
4745 	OUTB(nc_ctest3,	np->sv_ctest3);
4746 	OUTB(nc_ctest4,	np->sv_ctest4);
4747 	OUTB(nc_ctest5,	np->sv_ctest5);
4748 	OUTB(nc_gpcntl,	np->sv_gpcntl);
4749 	OUTB(nc_stest2,	np->sv_stest2);
4750 
4751 	ncr_selectclock(np, np->sv_scntl3);
4752 
4753 	/*
4754 	**	Free allocated ccb(s)
4755 	*/
4756 
4757 	while ((cp=np->ccb->link_ccb) != NULL) {
4758 		np->ccb->link_ccb = cp->link_ccb;
4759 		if (cp->host_status) {
4760 		printk("%s: shall free an active ccb (host_status=%d)\n",
4761 			ncr_name(np), cp->host_status);
4762 		}
4763 #ifdef DEBUG_NCR53C8XX
4764 	printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp);
4765 #endif
4766 		m_free_dma(cp, sizeof(*cp), "CCB");
4767 	}
4768 
4769 	/* Free allocated tp(s) */
4770 
4771 	for (target = 0; target < MAX_TARGET ; target++) {
4772 		tp=&np->target[target];
4773 		for (lun = 0 ; lun < MAX_LUN ; lun++) {
4774 			lp = tp->lp[lun];
4775 			if (lp) {
4776 #ifdef DEBUG_NCR53C8XX
4777 	printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp);
4778 #endif
4779 				if (lp->jump_ccb != &lp->jump_ccb_0)
4780 					m_free_dma(lp->jump_ccb,256,"JUMP_CCB");
4781 				m_free_dma(lp, sizeof(*lp), "LCB");
4782 			}
4783 		}
4784 	}
4785 
4786 	if (np->scripth0)
4787 		m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
4788 	if (np->script0)
4789 		m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
4790 	if (np->ccb)
4791 		m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
4792 	m_free_dma(np, sizeof(struct ncb), "NCB");
4793 
4794 	printk("%s: host resources successfully released\n", inst_name);
4795 }
4796 
4797 /*==========================================================
4798 **
4799 **
4800 **	Complete execution of a SCSI command.
4801 **	Signal completion to the generic SCSI driver.
4802 **
4803 **
4804 **==========================================================
4805 */
4806 
4807 void ncr_complete (struct ncb *np, struct ccb *cp)
4808 {
4809 	struct scsi_cmnd *cmd;
4810 	struct tcb *tp;
4811 	struct lcb *lp;
4812 
4813 	/*
4814 	**	Sanity check
4815 	*/
4816 
4817 	if (!cp || cp->magic != CCB_MAGIC || !cp->cmd)
4818 		return;
4819 
4820 	/*
4821 	**	Print minimal debug information.
4822 	*/
4823 
4824 	if (DEBUG_FLAGS & DEBUG_TINY)
4825 		printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
4826 			cp->host_status,cp->scsi_status);
4827 
4828 	/*
4829 	**	Get command, target and lun pointers.
4830 	*/
4831 
4832 	cmd = cp->cmd;
4833 	cp->cmd = NULL;
4834 	tp = &np->target[cmd->device->id];
4835 	lp = tp->lp[cmd->device->lun];
4836 
4837 	/*
4838 	**	We donnot queue more than 1 ccb per target
4839 	**	with negotiation at any time. If this ccb was
4840 	**	used for negotiation, clear this info in the tcb.
4841 	*/
4842 
4843 	if (cp == tp->nego_cp)
4844 		tp->nego_cp = NULL;
4845 
4846 	/*
4847 	**	If auto-sense performed, change scsi status.
4848 	*/
4849 	if (cp->auto_sense) {
4850 		cp->scsi_status = cp->auto_sense;
4851 	}
4852 
4853 	/*
4854 	**	If we were recovering from queue full or performing
4855 	**	auto-sense, requeue skipped CCBs to the wait queue.
4856 	*/
4857 
4858 	if (lp && lp->held_ccb) {
4859 		if (cp == lp->held_ccb) {
4860 			list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq);
4861 			lp->held_ccb = NULL;
4862 		}
4863 	}
4864 
4865 	/*
4866 	**	Check for parity errors.
4867 	*/
4868 
4869 	if (cp->parity_status > 1) {
4870 		PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status);
4871 	}
4872 
4873 	/*
4874 	**	Check for extended errors.
4875 	*/
4876 
4877 	if (cp->xerr_status != XE_OK) {
4878 		switch (cp->xerr_status) {
4879 		case XE_EXTRA_DATA:
4880 			PRINT_ADDR(cmd, "extraneous data discarded.\n");
4881 			break;
4882 		case XE_BAD_PHASE:
4883 			PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n");
4884 			break;
4885 		default:
4886 			PRINT_ADDR(cmd, "extended error %d.\n",
4887 					cp->xerr_status);
4888 			break;
4889 		}
4890 		if (cp->host_status==HS_COMPLETE)
4891 			cp->host_status = HS_FAIL;
4892 	}
4893 
4894 	/*
4895 	**	Print out any error for debugging purpose.
4896 	*/
4897 	if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4898 		if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) {
4899 			PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x "
4900 					"scsi_status=%x\n", cmd->cmnd[0],
4901 					cp->host_status, cp->scsi_status);
4902 		}
4903 	}
4904 
4905 	/*
4906 	**	Check the status.
4907 	*/
4908 	if (   (cp->host_status == HS_COMPLETE)
4909 		&& (cp->scsi_status == S_GOOD ||
4910 		    cp->scsi_status == S_COND_MET)) {
4911 		/*
4912 		 *	All went well (GOOD status).
4913 		 *	CONDITION MET status is returned on
4914 		 *	`Pre-Fetch' or `Search data' success.
4915 		 */
4916 		cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4917 
4918 		/*
4919 		**	@RESID@
4920 		**	Could dig out the correct value for resid,
4921 		**	but it would be quite complicated.
4922 		*/
4923 		/* if (cp->phys.header.lastp != cp->phys.header.goalp) */
4924 
4925 		/*
4926 		**	Allocate the lcb if not yet.
4927 		*/
4928 		if (!lp)
4929 			ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun);
4930 
4931 		tp->bytes     += cp->data_len;
4932 		tp->transfers ++;
4933 
4934 		/*
4935 		**	If tags was reduced due to queue full,
4936 		**	increase tags if 1000 good status received.
4937 		*/
4938 		if (lp && lp->usetags && lp->numtags < lp->maxtags) {
4939 			++lp->num_good;
4940 			if (lp->num_good >= 1000) {
4941 				lp->num_good = 0;
4942 				++lp->numtags;
4943 				ncr_setup_tags (np, cmd->device);
4944 			}
4945 		}
4946 	} else if ((cp->host_status == HS_COMPLETE)
4947 		&& (cp->scsi_status == S_CHECK_COND)) {
4948 		/*
4949 		**   Check condition code
4950 		*/
4951 		cmd->result = DID_OK << 16 | S_CHECK_COND;
4952 
4953 		/*
4954 		**	Copy back sense data to caller's buffer.
4955 		*/
4956 		memcpy(cmd->sense_buffer, cp->sense_buf,
4957 		       min_t(size_t, SCSI_SENSE_BUFFERSIZE,
4958 			     sizeof(cp->sense_buf)));
4959 
4960 		if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4961 			u_char *p = cmd->sense_buffer;
4962 			int i;
4963 			PRINT_ADDR(cmd, "sense data:");
4964 			for (i=0; i<14; i++) printk (" %x", *p++);
4965 			printk (".\n");
4966 		}
4967 	} else if ((cp->host_status == HS_COMPLETE)
4968 		&& (cp->scsi_status == S_CONFLICT)) {
4969 		/*
4970 		**   Reservation Conflict condition code
4971 		*/
4972 		cmd->result = DID_OK << 16 | S_CONFLICT;
4973 
4974 	} else if ((cp->host_status == HS_COMPLETE)
4975 		&& (cp->scsi_status == S_BUSY ||
4976 		    cp->scsi_status == S_QUEUE_FULL)) {
4977 
4978 		/*
4979 		**   Target is busy.
4980 		*/
4981 		cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4982 
4983 	} else if ((cp->host_status == HS_SEL_TIMEOUT)
4984 		|| (cp->host_status == HS_TIMEOUT)) {
4985 
4986 		/*
4987 		**   No response
4988 		*/
4989 		cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status);
4990 
4991 	} else if (cp->host_status == HS_RESET) {
4992 
4993 		/*
4994 		**   SCSI bus reset
4995 		*/
4996 		cmd->result = ScsiResult(DID_RESET, cp->scsi_status);
4997 
4998 	} else if (cp->host_status == HS_ABORTED) {
4999 
5000 		/*
5001 		**   Transfer aborted
5002 		*/
5003 		cmd->result = ScsiResult(DID_ABORT, cp->scsi_status);
5004 
5005 	} else {
5006 
5007 		/*
5008 		**  Other protocol messes
5009 		*/
5010 		PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n",
5011 			cp->host_status, cp->scsi_status, cp);
5012 
5013 		cmd->result = ScsiResult(DID_ERROR, cp->scsi_status);
5014 	}
5015 
5016 	/*
5017 	**	trace output
5018 	*/
5019 
5020 	if (tp->usrflag & UF_TRACE) {
5021 		u_char * p;
5022 		int i;
5023 		PRINT_ADDR(cmd, " CMD:");
5024 		p = (u_char*) &cmd->cmnd[0];
5025 		for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++);
5026 
5027 		if (cp->host_status==HS_COMPLETE) {
5028 			switch (cp->scsi_status) {
5029 			case S_GOOD:
5030 				printk ("  GOOD");
5031 				break;
5032 			case S_CHECK_COND:
5033 				printk ("  SENSE:");
5034 				p = (u_char*) &cmd->sense_buffer;
5035 				for (i=0; i<14; i++)
5036 					printk (" %x", *p++);
5037 				break;
5038 			default:
5039 				printk ("  STAT: %x\n", cp->scsi_status);
5040 				break;
5041 			}
5042 		} else printk ("  HOSTERROR: %x", cp->host_status);
5043 		printk ("\n");
5044 	}
5045 
5046 	/*
5047 	**	Free this ccb
5048 	*/
5049 	ncr_free_ccb (np, cp);
5050 
5051 	/*
5052 	**	requeue awaiting scsi commands for this lun.
5053 	*/
5054 	if (lp && lp->queuedccbs < lp->queuedepth &&
5055 	    !list_empty(&lp->wait_ccbq))
5056 		ncr_start_next_ccb(np, lp, 2);
5057 
5058 	/*
5059 	**	requeue awaiting scsi commands for this controller.
5060 	*/
5061 	if (np->waiting_list)
5062 		requeue_waiting_list(np);
5063 
5064 	/*
5065 	**	signal completion to generic driver.
5066 	*/
5067 	ncr_queue_done_cmd(np, cmd);
5068 }
5069 
5070 /*==========================================================
5071 **
5072 **
5073 **	Signal all (or one) control block done.
5074 **
5075 **
5076 **==========================================================
5077 */
5078 
5079 /*
5080 **	This CCB has been skipped by the NCR.
5081 **	Queue it in the corresponding unit queue.
5082 */
5083 static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
5084 {
5085 	struct tcb *tp = &np->target[cp->target];
5086 	struct lcb *lp = tp->lp[cp->lun];
5087 
5088 	if (lp && cp != np->ccb) {
5089 		cp->host_status &= ~HS_SKIPMASK;
5090 		cp->start.schedule.l_paddr =
5091 			cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
5092 		list_move_tail(&cp->link_ccbq, &lp->skip_ccbq);
5093 		if (cp->queued) {
5094 			--lp->queuedccbs;
5095 		}
5096 	}
5097 	if (cp->queued) {
5098 		--np->queuedccbs;
5099 		cp->queued = 0;
5100 	}
5101 }
5102 
5103 /*
5104 **	The NCR has completed CCBs.
5105 **	Look at the DONE QUEUE if enabled, otherwise scan all CCBs
5106 */
5107 void ncr_wakeup_done (struct ncb *np)
5108 {
5109 	struct ccb *cp;
5110 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
5111 	int i, j;
5112 
5113 	i = np->ccb_done_ic;
5114 	while (1) {
5115 		j = i+1;
5116 		if (j >= MAX_DONE)
5117 			j = 0;
5118 
5119 		cp = np->ccb_done[j];
5120 		if (!CCB_DONE_VALID(cp))
5121 			break;
5122 
5123 		np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY;
5124 		np->scripth->done_queue[5*j + 4] =
5125 				cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5126 		MEMORY_BARRIER();
5127 		np->scripth->done_queue[5*i + 4] =
5128 				cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5129 
5130 		if (cp->host_status & HS_DONEMASK)
5131 			ncr_complete (np, cp);
5132 		else if (cp->host_status & HS_SKIPMASK)
5133 			ncr_ccb_skipped (np, cp);
5134 
5135 		i = j;
5136 	}
5137 	np->ccb_done_ic = i;
5138 #else
5139 	cp = np->ccb;
5140 	while (cp) {
5141 		if (cp->host_status & HS_DONEMASK)
5142 			ncr_complete (np, cp);
5143 		else if (cp->host_status & HS_SKIPMASK)
5144 			ncr_ccb_skipped (np, cp);
5145 		cp = cp->link_ccb;
5146 	}
5147 #endif
5148 }
5149 
5150 /*
5151 **	Complete all active CCBs.
5152 */
5153 void ncr_wakeup (struct ncb *np, u_long code)
5154 {
5155 	struct ccb *cp = np->ccb;
5156 
5157 	while (cp) {
5158 		if (cp->host_status != HS_IDLE) {
5159 			cp->host_status = code;
5160 			ncr_complete (np, cp);
5161 		}
5162 		cp = cp->link_ccb;
5163 	}
5164 }
5165 
5166 /*
5167 ** Reset ncr chip.
5168 */
5169 
5170 /* Some initialisation must be done immediately following reset, for 53c720,
5171  * at least.  EA (dcntl bit 5) isn't set here as it is set once only in
5172  * the _detect function.
5173  */
5174 static void ncr_chip_reset(struct ncb *np, int delay)
5175 {
5176 	OUTB (nc_istat,  SRST);
5177 	udelay(delay);
5178 	OUTB (nc_istat,  0   );
5179 
5180 	if (np->features & FE_EHP)
5181 		OUTB (nc_ctest0, EHP);
5182 	if (np->features & FE_MUX)
5183 		OUTB (nc_ctest4, MUX);
5184 }
5185 
5186 
5187 /*==========================================================
5188 **
5189 **
5190 **	Start NCR chip.
5191 **
5192 **
5193 **==========================================================
5194 */
5195 
5196 void ncr_init (struct ncb *np, int reset, char * msg, u_long code)
5197 {
5198  	int	i;
5199 
5200  	/*
5201 	**	Reset chip if asked, otherwise just clear fifos.
5202  	*/
5203 
5204 	if (reset) {
5205 		OUTB (nc_istat,  SRST);
5206 		udelay(100);
5207 	}
5208 	else {
5209 		OUTB (nc_stest3, TE|CSF);
5210 		OUTONB (nc_ctest3, CLF);
5211 	}
5212 
5213 	/*
5214 	**	Message.
5215 	*/
5216 
5217 	if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
5218 
5219 	/*
5220 	**	Clear Start Queue
5221 	*/
5222 	np->queuedepth = MAX_START - 1;	/* 1 entry needed as end marker */
5223 	for (i = 1; i < MAX_START + MAX_START; i += 2)
5224 		np->scripth0->tryloop[i] =
5225 				cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5226 
5227 	/*
5228 	**	Start at first entry.
5229 	*/
5230 	np->squeueput = 0;
5231 	np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop));
5232 
5233 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
5234 	/*
5235 	**	Clear Done Queue
5236 	*/
5237 	for (i = 0; i < MAX_DONE; i++) {
5238 		np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY;
5239 		np->scripth0->done_queue[5*i + 4] =
5240 			cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
5241 	}
5242 #endif
5243 
5244 	/*
5245 	**	Start at first entry.
5246 	*/
5247 	np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue));
5248 	np->ccb_done_ic = MAX_DONE-1;
5249 	np->scripth0->done_queue[5*(MAX_DONE-1) + 4] =
5250 			cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
5251 
5252 	/*
5253 	**	Wakeup all pending jobs.
5254 	*/
5255 	ncr_wakeup (np, code);
5256 
5257 	/*
5258 	**	Init chip.
5259 	*/
5260 
5261 	/*
5262 	** Remove reset; big delay because the 895 needs time for the
5263 	** bus mode to settle
5264 	*/
5265 	ncr_chip_reset(np, 2000);
5266 
5267 	OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
5268 					/*  full arb., ena parity, par->ATN  */
5269 	OUTB (nc_scntl1, 0x00);		/*  odd parity, and remove CRST!! */
5270 
5271 	ncr_selectclock(np, np->rv_scntl3);	/* Select SCSI clock */
5272 
5273 	OUTB (nc_scid  , RRE|np->myaddr);	/* Adapter SCSI address */
5274 	OUTW (nc_respid, 1ul<<np->myaddr);	/* Id to respond to */
5275 	OUTB (nc_istat , SIGP	);		/*  Signal Process */
5276 	OUTB (nc_dmode , np->rv_dmode);		/* Burst length, dma mode */
5277 	OUTB (nc_ctest5, np->rv_ctest5);	/* Large fifo + large burst */
5278 
5279 	OUTB (nc_dcntl , NOCOM|np->rv_dcntl);	/* Protect SFBR */
5280 	OUTB (nc_ctest0, np->rv_ctest0);	/* 720: CDIS and EHP */
5281 	OUTB (nc_ctest3, np->rv_ctest3);	/* Write and invalidate */
5282 	OUTB (nc_ctest4, np->rv_ctest4);	/* Master parity checking */
5283 
5284 	OUTB (nc_stest2, EXT|np->rv_stest2);	/* Extended Sreq/Sack filtering */
5285 	OUTB (nc_stest3, TE);			/* TolerANT enable */
5286 	OUTB (nc_stime0, 0x0c	);		/* HTH disabled  STO 0.25 sec */
5287 
5288 	/*
5289 	**	Disable disconnects.
5290 	*/
5291 
5292 	np->disc = 0;
5293 
5294 	/*
5295 	**    Enable GPIO0 pin for writing if LED support.
5296 	*/
5297 
5298 	if (np->features & FE_LED0) {
5299 		OUTOFFB (nc_gpcntl, 0x01);
5300 	}
5301 
5302 	/*
5303 	**      enable ints
5304 	*/
5305 
5306 	OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
5307 	OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
5308 
5309 	/*
5310 	**	Fill in target structure.
5311 	**	Reinitialize usrsync.
5312 	**	Reinitialize usrwide.
5313 	**	Prepare sync negotiation according to actual SCSI bus mode.
5314 	*/
5315 
5316 	for (i=0;i<MAX_TARGET;i++) {
5317 		struct tcb *tp = &np->target[i];
5318 
5319 		tp->sval    = 0;
5320 		tp->wval    = np->rv_scntl3;
5321 
5322 		if (tp->usrsync != 255) {
5323 			if (tp->usrsync <= np->maxsync) {
5324 				if (tp->usrsync < np->minsync) {
5325 					tp->usrsync = np->minsync;
5326 				}
5327 			}
5328 			else
5329 				tp->usrsync = 255;
5330 		}
5331 
5332 		if (tp->usrwide > np->maxwide)
5333 			tp->usrwide = np->maxwide;
5334 
5335 	}
5336 
5337 	/*
5338 	**    Start script processor.
5339 	*/
5340 	if (np->paddr2) {
5341 		if (bootverbose)
5342 			printk ("%s: Downloading SCSI SCRIPTS.\n",
5343 				ncr_name(np));
5344 		OUTL (nc_scratcha, vtobus(np->script0));
5345 		OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram));
5346 	}
5347 	else
5348 		OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
5349 }
5350 
5351 /*==========================================================
5352 **
5353 **	Prepare the negotiation values for wide and
5354 **	synchronous transfers.
5355 **
5356 **==========================================================
5357 */
5358 
5359 static void ncr_negotiate (struct ncb* np, struct tcb* tp)
5360 {
5361 	/*
5362 	**	minsync unit is 4ns !
5363 	*/
5364 
5365 	u_long minsync = tp->usrsync;
5366 
5367 	/*
5368 	**	SCSI bus mode limit
5369 	*/
5370 
5371 	if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
5372 		if (minsync < 12) minsync = 12;
5373 	}
5374 
5375 	/*
5376 	**	our limit ..
5377 	*/
5378 
5379 	if (minsync < np->minsync)
5380 		minsync = np->minsync;
5381 
5382 	/*
5383 	**	divider limit
5384 	*/
5385 
5386 	if (minsync > np->maxsync)
5387 		minsync = 255;
5388 
5389 	if (tp->maxoffs > np->maxoffs)
5390 		tp->maxoffs = np->maxoffs;
5391 
5392 	tp->minsync = minsync;
5393 	tp->maxoffs = (minsync<255 ? tp->maxoffs : 0);
5394 
5395 	/*
5396 	**	period=0: has to negotiate sync transfer
5397 	*/
5398 
5399 	tp->period=0;
5400 
5401 	/*
5402 	**	widedone=0: has to negotiate wide transfer
5403 	*/
5404 	tp->widedone=0;
5405 }
5406 
5407 /*==========================================================
5408 **
5409 **	Get clock factor and sync divisor for a given
5410 **	synchronous factor period.
5411 **	Returns the clock factor (in sxfer) and scntl3
5412 **	synchronous divisor field.
5413 **
5414 **==========================================================
5415 */
5416 
5417 static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p)
5418 {
5419 	u_long	clk = np->clock_khz;	/* SCSI clock frequency in kHz	*/
5420 	int	div = np->clock_divn;	/* Number of divisors supported	*/
5421 	u_long	fak;			/* Sync factor in sxfer		*/
5422 	u_long	per;			/* Period in tenths of ns	*/
5423 	u_long	kpc;			/* (per * clk)			*/
5424 
5425 	/*
5426 	**	Compute the synchronous period in tenths of nano-seconds
5427 	*/
5428 	if	(sfac <= 10)	per = 250;
5429 	else if	(sfac == 11)	per = 303;
5430 	else if	(sfac == 12)	per = 500;
5431 	else			per = 40 * sfac;
5432 
5433 	/*
5434 	**	Look for the greatest clock divisor that allows an
5435 	**	input speed faster than the period.
5436 	*/
5437 	kpc = per * clk;
5438 	while (--div > 0)
5439 		if (kpc >= (div_10M[div] << 2)) break;
5440 
5441 	/*
5442 	**	Calculate the lowest clock factor that allows an output
5443 	**	speed not faster than the period.
5444 	*/
5445 	fak = (kpc - 1) / div_10M[div] + 1;
5446 
5447 #if 0	/* This optimization does not seem very useful */
5448 
5449 	per = (fak * div_10M[div]) / clk;
5450 
5451 	/*
5452 	**	Why not to try the immediate lower divisor and to choose
5453 	**	the one that allows the fastest output speed ?
5454 	**	We don't want input speed too much greater than output speed.
5455 	*/
5456 	if (div >= 1 && fak < 8) {
5457 		u_long fak2, per2;
5458 		fak2 = (kpc - 1) / div_10M[div-1] + 1;
5459 		per2 = (fak2 * div_10M[div-1]) / clk;
5460 		if (per2 < per && fak2 <= 8) {
5461 			fak = fak2;
5462 			per = per2;
5463 			--div;
5464 		}
5465 	}
5466 #endif
5467 
5468 	if (fak < 4) fak = 4;	/* Should never happen, too bad ... */
5469 
5470 	/*
5471 	**	Compute and return sync parameters for the ncr
5472 	*/
5473 	*fakp		= fak - 4;
5474 	*scntl3p	= ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
5475 }
5476 
5477 
5478 /*==========================================================
5479 **
5480 **	Set actual values, sync status and patch all ccbs of
5481 **	a target according to new sync/wide agreement.
5482 **
5483 **==========================================================
5484 */
5485 
5486 static void ncr_set_sync_wide_status (struct ncb *np, u_char target)
5487 {
5488 	struct ccb *cp;
5489 	struct tcb *tp = &np->target[target];
5490 
5491 	/*
5492 	**	set actual value and sync_status
5493 	*/
5494 	OUTB (nc_sxfer, tp->sval);
5495 	np->sync_st = tp->sval;
5496 	OUTB (nc_scntl3, tp->wval);
5497 	np->wide_st = tp->wval;
5498 
5499 	/*
5500 	**	patch ALL ccbs of this target.
5501 	*/
5502 	for (cp = np->ccb; cp; cp = cp->link_ccb) {
5503 		if (!cp->cmd) continue;
5504 		if (scmd_id(cp->cmd) != target) continue;
5505 #if 0
5506 		cp->sync_status = tp->sval;
5507 		cp->wide_status = tp->wval;
5508 #endif
5509 		cp->phys.select.sel_scntl3 = tp->wval;
5510 		cp->phys.select.sel_sxfer  = tp->sval;
5511 	}
5512 }
5513 
5514 /*==========================================================
5515 **
5516 **	Switch sync mode for current job and it's target
5517 **
5518 **==========================================================
5519 */
5520 
5521 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer)
5522 {
5523 	struct scsi_cmnd *cmd = cp->cmd;
5524 	struct tcb *tp;
5525 	u_char target = INB (nc_sdid) & 0x0f;
5526 	u_char idiv;
5527 
5528 	BUG_ON(target != (scmd_id(cmd) & 0xf));
5529 
5530 	tp = &np->target[target];
5531 
5532 	if (!scntl3 || !(sxfer & 0x1f))
5533 		scntl3 = np->rv_scntl3;
5534 	scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07);
5535 
5536 	/*
5537 	**	Deduce the value of controller sync period from scntl3.
5538 	**	period is in tenths of nano-seconds.
5539 	*/
5540 
5541 	idiv = ((scntl3 >> 4) & 0x7);
5542 	if ((sxfer & 0x1f) && idiv)
5543 		tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
5544 	else
5545 		tp->period = 0xffff;
5546 
5547 	/* Stop there if sync parameters are unchanged */
5548 	if (tp->sval == sxfer && tp->wval == scntl3)
5549 		return;
5550 	tp->sval = sxfer;
5551 	tp->wval = scntl3;
5552 
5553 	if (sxfer & 0x01f) {
5554 		/* Disable extended Sreq/Sack filtering */
5555 		if (tp->period <= 2000)
5556 			OUTOFFB(nc_stest2, EXT);
5557 	}
5558 
5559 	spi_display_xfer_agreement(tp->starget);
5560 
5561 	/*
5562 	**	set actual value and sync_status
5563 	**	patch ALL ccbs of this target.
5564 	*/
5565 	ncr_set_sync_wide_status(np, target);
5566 }
5567 
5568 /*==========================================================
5569 **
5570 **	Switch wide mode for current job and it's target
5571 **	SCSI specs say: a SCSI device that accepts a WDTR
5572 **	message shall reset the synchronous agreement to
5573 **	asynchronous mode.
5574 **
5575 **==========================================================
5576 */
5577 
5578 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack)
5579 {
5580 	struct scsi_cmnd *cmd = cp->cmd;
5581 	u16 target = INB (nc_sdid) & 0x0f;
5582 	struct tcb *tp;
5583 	u_char	scntl3;
5584 	u_char	sxfer;
5585 
5586 	BUG_ON(target != (scmd_id(cmd) & 0xf));
5587 
5588 	tp = &np->target[target];
5589 	tp->widedone  =  wide+1;
5590 	scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
5591 
5592 	sxfer = ack ? 0 : tp->sval;
5593 
5594 	/*
5595 	**	 Stop there if sync/wide parameters are unchanged
5596 	*/
5597 	if (tp->sval == sxfer && tp->wval == scntl3) return;
5598 	tp->sval = sxfer;
5599 	tp->wval = scntl3;
5600 
5601 	/*
5602 	**	Bells and whistles   ;-)
5603 	*/
5604 	if (bootverbose >= 2) {
5605 		dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n",
5606 				(scntl3 & EWS) ? "en" : "dis");
5607 	}
5608 
5609 	/*
5610 	**	set actual value and sync_status
5611 	**	patch ALL ccbs of this target.
5612 	*/
5613 	ncr_set_sync_wide_status(np, target);
5614 }
5615 
5616 /*==========================================================
5617 **
5618 **	Switch tagged mode for a target.
5619 **
5620 **==========================================================
5621 */
5622 
5623 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev)
5624 {
5625 	unsigned char tn = sdev->id, ln = sdev->lun;
5626 	struct tcb *tp = &np->target[tn];
5627 	struct lcb *lp = tp->lp[ln];
5628 	u_char   reqtags, maxdepth;
5629 
5630 	/*
5631 	**	Just in case ...
5632 	*/
5633 	if ((!tp) || (!lp) || !sdev)
5634 		return;
5635 
5636 	/*
5637 	**	If SCSI device queue depth is not yet set, leave here.
5638 	*/
5639 	if (!lp->scdev_depth)
5640 		return;
5641 
5642 	/*
5643 	**	Donnot allow more tags than the SCSI driver can queue
5644 	**	for this device.
5645 	**	Donnot allow more tags than we can handle.
5646 	*/
5647 	maxdepth = lp->scdev_depth;
5648 	if (maxdepth > lp->maxnxs)	maxdepth    = lp->maxnxs;
5649 	if (lp->maxtags > maxdepth)	lp->maxtags = maxdepth;
5650 	if (lp->numtags > maxdepth)	lp->numtags = maxdepth;
5651 
5652 	/*
5653 	**	only devices conformant to ANSI Version >= 2
5654 	**	only devices capable of tagged commands
5655 	**	only if enabled by user ..
5656 	*/
5657 	if (sdev->tagged_supported && lp->numtags > 1) {
5658 		reqtags = lp->numtags;
5659 	} else {
5660 		reqtags = 1;
5661 	}
5662 
5663 	/*
5664 	**	Update max number of tags
5665 	*/
5666 	lp->numtags = reqtags;
5667 	if (lp->numtags > lp->maxtags)
5668 		lp->maxtags = lp->numtags;
5669 
5670 	/*
5671 	**	If we want to switch tag mode, we must wait
5672 	**	for no CCB to be active.
5673 	*/
5674 	if	(reqtags > 1 && lp->usetags) {	 /* Stay in tagged mode    */
5675 		if (lp->queuedepth == reqtags)	 /* Already announced	   */
5676 			return;
5677 		lp->queuedepth	= reqtags;
5678 	}
5679 	else if	(reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode  */
5680 		lp->queuedepth	= reqtags;
5681 		return;
5682 	}
5683 	else {					 /* Want to switch tag mode */
5684 		if (lp->busyccbs)		 /* If not yet safe, return */
5685 			return;
5686 		lp->queuedepth	= reqtags;
5687 		lp->usetags	= reqtags > 1 ? 1 : 0;
5688 	}
5689 
5690 	/*
5691 	**	Patch the lun mini-script, according to tag mode.
5692 	*/
5693 	lp->jump_tag.l_paddr = lp->usetags?
5694 			cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
5695 			cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
5696 
5697 	/*
5698 	**	Announce change to user.
5699 	*/
5700 	if (bootverbose) {
5701 		if (lp->usetags) {
5702 			dev_info(&sdev->sdev_gendev,
5703 				"tagged command queue depth set to %d\n",
5704 				reqtags);
5705 		} else {
5706 			dev_info(&sdev->sdev_gendev,
5707 					"tagged command queueing disabled\n");
5708 		}
5709 	}
5710 }
5711 
5712 /*==========================================================
5713 **
5714 **
5715 **	ncr timeout handler.
5716 **
5717 **
5718 **==========================================================
5719 **
5720 **	Misused to keep the driver running when
5721 **	interrupts are not configured correctly.
5722 **
5723 **----------------------------------------------------------
5724 */
5725 
5726 static void ncr_timeout (struct ncb *np)
5727 {
5728 	u_long	thistime = jiffies;
5729 
5730 	/*
5731 	**	If release process in progress, let's go
5732 	**	Set the release stage from 1 to 2 to synchronize
5733 	**	with the release process.
5734 	*/
5735 
5736 	if (np->release_stage) {
5737 		if (np->release_stage == 1) np->release_stage = 2;
5738 		return;
5739 	}
5740 
5741 	np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL;
5742 	add_timer(&np->timer);
5743 
5744 	/*
5745 	**	If we are resetting the ncr, wait for settle_time before
5746 	**	clearing it. Then command processing will be resumed.
5747 	*/
5748 	if (np->settle_time) {
5749 		if (np->settle_time <= thistime) {
5750 			if (bootverbose > 1)
5751 				printk("%s: command processing resumed\n", ncr_name(np));
5752 			np->settle_time	= 0;
5753 			np->disc	= 1;
5754 			requeue_waiting_list(np);
5755 		}
5756 		return;
5757 	}
5758 
5759 	/*
5760 	**	Since the generic scsi driver only allows us 0.5 second
5761 	**	to perform abort of a command, we must look at ccbs about
5762 	**	every 0.25 second.
5763 	*/
5764 	if (np->lasttime + 4*HZ < thistime) {
5765 		/*
5766 		**	block ncr interrupts
5767 		*/
5768 		np->lasttime = thistime;
5769 	}
5770 
5771 #ifdef SCSI_NCR_BROKEN_INTR
5772 	if (INB(nc_istat) & (INTF|SIP|DIP)) {
5773 
5774 		/*
5775 		**	Process pending interrupts.
5776 		*/
5777 		if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
5778 		ncr_exception (np);
5779 		if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
5780 	}
5781 #endif /* SCSI_NCR_BROKEN_INTR */
5782 }
5783 
5784 /*==========================================================
5785 **
5786 **	log message for real hard errors
5787 **
5788 **	"ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5789 **	"	      reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5790 **
5791 **	exception register:
5792 **		ds:	dstat
5793 **		si:	sist
5794 **
5795 **	SCSI bus lines:
5796 **		so:	control lines as driver by NCR.
5797 **		si:	control lines as seen by NCR.
5798 **		sd:	scsi data lines as seen by NCR.
5799 **
5800 **	wide/fastmode:
5801 **		sxfer:	(see the manual)
5802 **		scntl3:	(see the manual)
5803 **
5804 **	current script command:
5805 **		dsp:	script address (relative to start of script).
5806 **		dbc:	first word of script command.
5807 **
5808 **	First 16 register of the chip:
5809 **		r0..rf
5810 **
5811 **==========================================================
5812 */
5813 
5814 static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
5815 {
5816 	u32	dsp;
5817 	int	script_ofs;
5818 	int	script_size;
5819 	char	*script_name;
5820 	u_char	*script_base;
5821 	int	i;
5822 
5823 	dsp	= INL (nc_dsp);
5824 
5825 	if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
5826 		script_ofs	= dsp - np->p_script;
5827 		script_size	= sizeof(struct script);
5828 		script_base	= (u_char *) np->script0;
5829 		script_name	= "script";
5830 	}
5831 	else if (np->p_scripth < dsp &&
5832 		 dsp <= np->p_scripth + sizeof(struct scripth)) {
5833 		script_ofs	= dsp - np->p_scripth;
5834 		script_size	= sizeof(struct scripth);
5835 		script_base	= (u_char *) np->scripth0;
5836 		script_name	= "scripth";
5837 	} else {
5838 		script_ofs	= dsp;
5839 		script_size	= 0;
5840 		script_base	= NULL;
5841 		script_name	= "mem";
5842 	}
5843 
5844 	printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5845 		ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5846 		(unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5847 		(unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5848 		(unsigned)INL (nc_dbc));
5849 
5850 	if (((script_ofs & 3) == 0) &&
5851 	    (unsigned)script_ofs < script_size) {
5852 		printk ("%s: script cmd = %08x\n", ncr_name(np),
5853 			scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
5854 	}
5855 
5856 	printk ("%s: regdump:", ncr_name(np));
5857 	for (i=0; i<16;i++)
5858             printk (" %02x", (unsigned)INB_OFF(i));
5859 	printk (".\n");
5860 }
5861 
5862 /*============================================================
5863 **
5864 **	ncr chip exception handler.
5865 **
5866 **============================================================
5867 **
5868 **	In normal cases, interrupt conditions occur one at a
5869 **	time. The ncr is able to stack in some extra registers
5870 **	other interrupts that will occur after the first one.
5871 **	But, several interrupts may occur at the same time.
5872 **
5873 **	We probably should only try to deal with the normal
5874 **	case, but it seems that multiple interrupts occur in
5875 **	some cases that are not abnormal at all.
5876 **
5877 **	The most frequent interrupt condition is Phase Mismatch.
5878 **	We should want to service this interrupt quickly.
5879 **	A SCSI parity error may be delivered at the same time.
5880 **	The SIR interrupt is not very frequent in this driver,
5881 **	since the INTFLY is likely used for command completion
5882 **	signaling.
5883 **	The Selection Timeout interrupt may be triggered with
5884 **	IID and/or UDC.
5885 **	The SBMC interrupt (SCSI Bus Mode Change) may probably
5886 **	occur at any time.
5887 **
5888 **	This handler try to deal as cleverly as possible with all
5889 **	the above.
5890 **
5891 **============================================================
5892 */
5893 
5894 void ncr_exception (struct ncb *np)
5895 {
5896 	u_char	istat, dstat;
5897 	u16	sist;
5898 	int	i;
5899 
5900 	/*
5901 	**	interrupt on the fly ?
5902 	**	Since the global header may be copied back to a CCB
5903 	**	using a posted PCI memory write, the last operation on
5904 	**	the istat register is a READ in order to flush posted
5905 	**	PCI write commands.
5906 	*/
5907 	istat = INB (nc_istat);
5908 	if (istat & INTF) {
5909 		OUTB (nc_istat, (istat & SIGP) | INTF);
5910 		istat = INB (nc_istat);
5911 		if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
5912 		ncr_wakeup_done (np);
5913 	}
5914 
5915 	if (!(istat & (SIP|DIP)))
5916 		return;
5917 
5918 	if (istat & CABRT)
5919 		OUTB (nc_istat, CABRT);
5920 
5921 	/*
5922 	**	Steinbach's Guideline for Systems Programming:
5923 	**	Never test for an error condition you don't know how to handle.
5924 	*/
5925 
5926 	sist  = (istat & SIP) ? INW (nc_sist)  : 0;
5927 	dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5928 
5929 	if (DEBUG_FLAGS & DEBUG_TINY)
5930 		printk ("<%d|%x:%x|%x:%x>",
5931 			(int)INB(nc_scr0),
5932 			dstat,sist,
5933 			(unsigned)INL(nc_dsp),
5934 			(unsigned)INL(nc_dbc));
5935 
5936 	/*========================================================
5937 	**	First, interrupts we want to service cleanly.
5938 	**
5939 	**	Phase mismatch is the most frequent interrupt, and
5940 	**	so we have to service it as quickly and as cleanly
5941 	**	as possible.
5942 	**	Programmed interrupts are rarely used in this driver,
5943 	**	but we must handle them cleanly anyway.
5944 	**	We try to deal with PAR and SBMC combined with
5945 	**	some other interrupt(s).
5946 	**=========================================================
5947 	*/
5948 
5949 	if (!(sist  & (STO|GEN|HTH|SGE|UDC|RST)) &&
5950 	    !(dstat & (MDPE|BF|ABRT|IID))) {
5951 		if ((sist & SBMC) && ncr_int_sbmc (np))
5952 			return;
5953 		if ((sist & PAR)  && ncr_int_par  (np))
5954 			return;
5955 		if (sist & MA) {
5956 			ncr_int_ma (np);
5957 			return;
5958 		}
5959 		if (dstat & SIR) {
5960 			ncr_int_sir (np);
5961 			return;
5962 		}
5963 		/*
5964 		**  DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2.
5965 		*/
5966 		if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) {
5967 			printk(	"%s: unknown interrupt(s) ignored, "
5968 				"ISTAT=%x DSTAT=%x SIST=%x\n",
5969 				ncr_name(np), istat, dstat, sist);
5970 			return;
5971 		}
5972 		OUTONB_STD ();
5973 		return;
5974 	}
5975 
5976 	/*========================================================
5977 	**	Now, interrupts that need some fixing up.
5978 	**	Order and multiple interrupts is so less important.
5979 	**
5980 	**	If SRST has been asserted, we just reset the chip.
5981 	**
5982 	**	Selection is intirely handled by the chip. If the
5983 	**	chip says STO, we trust it. Seems some other
5984 	**	interrupts may occur at the same time (UDC, IID), so
5985 	**	we ignore them. In any case we do enough fix-up
5986 	**	in the service routine.
5987 	**	We just exclude some fatal dma errors.
5988 	**=========================================================
5989 	*/
5990 
5991 	if (sist & RST) {
5992 		ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
5993 		return;
5994 	}
5995 
5996 	if ((sist & STO) &&
5997 		!(dstat & (MDPE|BF|ABRT))) {
5998 	/*
5999 	**	DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1.
6000 	*/
6001 		OUTONB (nc_ctest3, CLF);
6002 
6003 		ncr_int_sto (np);
6004 		return;
6005 	}
6006 
6007 	/*=========================================================
6008 	**	Now, interrupts we are not able to recover cleanly.
6009 	**	(At least for the moment).
6010 	**
6011 	**	Do the register dump.
6012 	**	Log message for real hard errors.
6013 	**	Clear all fifos.
6014 	**	For MDPE, BF, ABORT, IID, SGE and HTH we reset the
6015 	**	BUS and the chip.
6016 	**	We are more soft for UDC.
6017 	**=========================================================
6018 	*/
6019 
6020 	if (time_after(jiffies, np->regtime)) {
6021 		np->regtime = jiffies + 10*HZ;
6022 		for (i = 0; i<sizeof(np->regdump); i++)
6023 			((char*)&np->regdump)[i] = INB_OFF(i);
6024 		np->regdump.nc_dstat = dstat;
6025 		np->regdump.nc_sist  = sist;
6026 	}
6027 
6028 	ncr_log_hard_error(np, sist, dstat);
6029 
6030 	printk ("%s: have to clear fifos.\n", ncr_name (np));
6031 	OUTB (nc_stest3, TE|CSF);
6032 	OUTONB (nc_ctest3, CLF);
6033 
6034 	if ((sist & (SGE)) ||
6035 		(dstat & (MDPE|BF|ABRT|IID))) {
6036 		ncr_start_reset(np);
6037 		return;
6038 	}
6039 
6040 	if (sist & HTH) {
6041 		printk ("%s: handshake timeout\n", ncr_name(np));
6042 		ncr_start_reset(np);
6043 		return;
6044 	}
6045 
6046 	if (sist & UDC) {
6047 		printk ("%s: unexpected disconnect\n", ncr_name(np));
6048 		OUTB (HS_PRT, HS_UNEXPECTED);
6049 		OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup));
6050 		return;
6051 	}
6052 
6053 	/*=========================================================
6054 	**	We just miss the cause of the interrupt. :(
6055 	**	Print a message. The timeout will do the real work.
6056 	**=========================================================
6057 	*/
6058 	printk ("%s: unknown interrupt\n", ncr_name(np));
6059 }
6060 
6061 /*==========================================================
6062 **
6063 **	ncr chip exception handler for selection timeout
6064 **
6065 **==========================================================
6066 **
6067 **	There seems to be a bug in the 53c810.
6068 **	Although a STO-Interrupt is pending,
6069 **	it continues executing script commands.
6070 **	But it will fail and interrupt (IID) on
6071 **	the next instruction where it's looking
6072 **	for a valid phase.
6073 **
6074 **----------------------------------------------------------
6075 */
6076 
6077 void ncr_int_sto (struct ncb *np)
6078 {
6079 	u_long dsa;
6080 	struct ccb *cp;
6081 	if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
6082 
6083 	/*
6084 	**	look for ccb and set the status.
6085 	*/
6086 
6087 	dsa = INL (nc_dsa);
6088 	cp = np->ccb;
6089 	while (cp && (CCB_PHYS (cp, phys) != dsa))
6090 		cp = cp->link_ccb;
6091 
6092 	if (cp) {
6093 		cp-> host_status = HS_SEL_TIMEOUT;
6094 		ncr_complete (np, cp);
6095 	}
6096 
6097 	/*
6098 	**	repair start queue and jump to start point.
6099 	*/
6100 
6101 	OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart));
6102 	return;
6103 }
6104 
6105 /*==========================================================
6106 **
6107 **	ncr chip exception handler for SCSI bus mode change
6108 **
6109 **==========================================================
6110 **
6111 **	spi2-r12 11.2.3 says a transceiver mode change must
6112 **	generate a reset event and a device that detects a reset
6113 **	event shall initiate a hard reset. It says also that a
6114 **	device that detects a mode change shall set data transfer
6115 **	mode to eight bit asynchronous, etc...
6116 **	So, just resetting should be enough.
6117 **
6118 **
6119 **----------------------------------------------------------
6120 */
6121 
6122 static int ncr_int_sbmc (struct ncb *np)
6123 {
6124 	u_char scsi_mode = INB (nc_stest4) & SMODE;
6125 
6126 	if (scsi_mode != np->scsi_mode) {
6127 		printk("%s: SCSI bus mode change from %x to %x.\n",
6128 			ncr_name(np), np->scsi_mode, scsi_mode);
6129 
6130 		np->scsi_mode = scsi_mode;
6131 
6132 
6133 		/*
6134 		**	Suspend command processing for 1 second and
6135 		**	reinitialize all except the chip.
6136 		*/
6137 		np->settle_time	= jiffies + HZ;
6138 		ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
6139 		return 1;
6140 	}
6141 	return 0;
6142 }
6143 
6144 /*==========================================================
6145 **
6146 **	ncr chip exception handler for SCSI parity error.
6147 **
6148 **==========================================================
6149 **
6150 **
6151 **----------------------------------------------------------
6152 */
6153 
6154 static int ncr_int_par (struct ncb *np)
6155 {
6156 	u_char	hsts	= INB (HS_PRT);
6157 	u32	dbc	= INL (nc_dbc);
6158 	u_char	sstat1	= INB (nc_sstat1);
6159 	int phase	= -1;
6160 	int msg		= -1;
6161 	u32 jmp;
6162 
6163 	printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
6164 		ncr_name(np), hsts, dbc, sstat1);
6165 
6166 	/*
6167 	 *	Ignore the interrupt if the NCR is not connected
6168 	 *	to the SCSI bus, since the right work should have
6169 	 *	been done on unexpected disconnection handling.
6170 	 */
6171 	if (!(INB (nc_scntl1) & ISCON))
6172 		return 0;
6173 
6174 	/*
6175 	 *	If the nexus is not clearly identified, reset the bus.
6176 	 *	We will try to do better later.
6177 	 */
6178 	if (hsts & HS_INVALMASK)
6179 		goto reset_all;
6180 
6181 	/*
6182 	 *	If the SCSI parity error occurs in MSG IN phase, prepare a
6183 	 *	MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED
6184 	 *	ERROR message and let the device decide to retry the command
6185 	 *	or to terminate with check condition. If we were in MSG IN
6186 	 *	phase waiting for the response of a negotiation, we will
6187 	 *	get SIR_NEGO_FAILED at dispatch.
6188 	 */
6189 	if (!(dbc & 0xc0000000))
6190 		phase = (dbc >> 24) & 7;
6191 	if (phase == 7)
6192 		msg = MSG_PARITY_ERROR;
6193 	else
6194 		msg = INITIATOR_ERROR;
6195 
6196 
6197 	/*
6198 	 *	If the NCR stopped on a MOVE ^ DATA_IN, we jump to a
6199 	 *	script that will ignore all data in bytes until phase
6200 	 *	change, since we are not sure the chip will wait the phase
6201 	 *	change prior to delivering the interrupt.
6202 	 */
6203 	if (phase == 1)
6204 		jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in);
6205 	else
6206 		jmp = NCB_SCRIPTH_PHYS (np, par_err_other);
6207 
6208 	OUTONB (nc_ctest3, CLF );	/* clear dma fifo  */
6209 	OUTB (nc_stest3, TE|CSF);	/* clear scsi fifo */
6210 
6211 	np->msgout[0] = msg;
6212 	OUTL_DSP (jmp);
6213 	return 1;
6214 
6215 reset_all:
6216 	ncr_start_reset(np);
6217 	return 1;
6218 }
6219 
6220 /*==========================================================
6221 **
6222 **
6223 **	ncr chip exception handler for phase errors.
6224 **
6225 **
6226 **==========================================================
6227 **
6228 **	We have to construct a new transfer descriptor,
6229 **	to transfer the rest of the current block.
6230 **
6231 **----------------------------------------------------------
6232 */
6233 
6234 static void ncr_int_ma (struct ncb *np)
6235 {
6236 	u32	dbc;
6237 	u32	rest;
6238 	u32	dsp;
6239 	u32	dsa;
6240 	u32	nxtdsp;
6241 	u32	newtmp;
6242 	u32	*vdsp;
6243 	u32	oadr, olen;
6244 	u32	*tblp;
6245 	ncrcmd *newcmd;
6246 	u_char	cmd, sbcl;
6247 	struct ccb *cp;
6248 
6249 	dsp	= INL (nc_dsp);
6250 	dbc	= INL (nc_dbc);
6251 	sbcl	= INB (nc_sbcl);
6252 
6253 	cmd	= dbc >> 24;
6254 	rest	= dbc & 0xffffff;
6255 
6256 	/*
6257 	**	Take into account dma fifo and various buffers and latches,
6258 	**	only if the interrupted phase is an OUTPUT phase.
6259 	*/
6260 
6261 	if ((cmd & 1) == 0) {
6262 		u_char	ctest5, ss0, ss2;
6263 		u16	delta;
6264 
6265 		ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
6266 		if (ctest5 & DFS)
6267 			delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
6268 		else
6269 			delta=(INB (nc_dfifo) - rest) & 0x7f;
6270 
6271 		/*
6272 		**	The data in the dma fifo has not been transferred to
6273 		**	the target -> add the amount to the rest
6274 		**	and clear the data.
6275 		**	Check the sstat2 register in case of wide transfer.
6276 		*/
6277 
6278 		rest += delta;
6279 		ss0  = INB (nc_sstat0);
6280 		if (ss0 & OLF) rest++;
6281 		if (ss0 & ORF) rest++;
6282 		if (INB(nc_scntl3) & EWS) {
6283 			ss2 = INB (nc_sstat2);
6284 			if (ss2 & OLF1) rest++;
6285 			if (ss2 & ORF1) rest++;
6286 		}
6287 
6288 		if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6289 			printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7,
6290 				(unsigned) rest, (unsigned) delta, ss0);
6291 
6292 	} else	{
6293 		if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
6294 			printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest);
6295 	}
6296 
6297 	/*
6298 	**	Clear fifos.
6299 	*/
6300 	OUTONB (nc_ctest3, CLF );	/* clear dma fifo  */
6301 	OUTB (nc_stest3, TE|CSF);	/* clear scsi fifo */
6302 
6303 	/*
6304 	**	locate matching cp.
6305 	**	if the interrupted phase is DATA IN or DATA OUT,
6306 	**	trust the global header.
6307 	*/
6308 	dsa = INL (nc_dsa);
6309 	if (!(cmd & 6)) {
6310 		cp = np->header.cp;
6311 		if (CCB_PHYS(cp, phys) != dsa)
6312 			cp = NULL;
6313 	} else {
6314 		cp  = np->ccb;
6315 		while (cp && (CCB_PHYS (cp, phys) != dsa))
6316 			cp = cp->link_ccb;
6317 	}
6318 
6319 	/*
6320 	**	try to find the interrupted script command,
6321 	**	and the address at which to continue.
6322 	*/
6323 	vdsp	= NULL;
6324 	nxtdsp	= 0;
6325 	if	(dsp >  np->p_script &&
6326 		 dsp <= np->p_script + sizeof(struct script)) {
6327 		vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
6328 		nxtdsp = dsp;
6329 	}
6330 	else if	(dsp >  np->p_scripth &&
6331 		 dsp <= np->p_scripth + sizeof(struct scripth)) {
6332 		vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
6333 		nxtdsp = dsp;
6334 	}
6335 	else if (cp) {
6336 		if	(dsp == CCB_PHYS (cp, patch[2])) {
6337 			vdsp = &cp->patch[0];
6338 			nxtdsp = scr_to_cpu(vdsp[3]);
6339 		}
6340 		else if (dsp == CCB_PHYS (cp, patch[6])) {
6341 			vdsp = &cp->patch[4];
6342 			nxtdsp = scr_to_cpu(vdsp[3]);
6343 		}
6344 	}
6345 
6346 	/*
6347 	**	log the information
6348 	*/
6349 
6350 	if (DEBUG_FLAGS & DEBUG_PHASE) {
6351 		printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
6352 			cp, np->header.cp,
6353 			(unsigned)dsp,
6354 			(unsigned)nxtdsp, vdsp, cmd);
6355 	}
6356 
6357 	/*
6358 	**	cp=0 means that the DSA does not point to a valid control
6359 	**	block. This should not happen since we donnot use multi-byte
6360 	**	move while we are being reselected ot after command complete.
6361 	**	We are not able to recover from such a phase error.
6362 	*/
6363 	if (!cp) {
6364 		printk ("%s: SCSI phase error fixup: "
6365 			"CCB already dequeued (0x%08lx)\n",
6366 			ncr_name (np), (u_long) np->header.cp);
6367 		goto reset_all;
6368 	}
6369 
6370 	/*
6371 	**	get old startaddress and old length.
6372 	*/
6373 
6374 	oadr = scr_to_cpu(vdsp[1]);
6375 
6376 	if (cmd & 0x10) {	/* Table indirect */
6377 		tblp = (u32 *) ((char*) &cp->phys + oadr);
6378 		olen = scr_to_cpu(tblp[0]);
6379 		oadr = scr_to_cpu(tblp[1]);
6380 	} else {
6381 		tblp = (u32 *) 0;
6382 		olen = scr_to_cpu(vdsp[0]) & 0xffffff;
6383 	}
6384 
6385 	if (DEBUG_FLAGS & DEBUG_PHASE) {
6386 		printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
6387 			(unsigned) (scr_to_cpu(vdsp[0]) >> 24),
6388 			tblp,
6389 			(unsigned) olen,
6390 			(unsigned) oadr);
6391 	}
6392 
6393 	/*
6394 	**	check cmd against assumed interrupted script command.
6395 	*/
6396 
6397 	if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) {
6398 		PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] "
6399 				">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24);
6400 
6401 		goto reset_all;
6402 	}
6403 
6404 	/*
6405 	**	cp != np->header.cp means that the header of the CCB
6406 	**	currently being processed has not yet been copied to
6407 	**	the global header area. That may happen if the device did
6408 	**	not accept all our messages after having been selected.
6409 	*/
6410 	if (cp != np->header.cp) {
6411 		printk ("%s: SCSI phase error fixup: "
6412 			"CCB address mismatch (0x%08lx != 0x%08lx)\n",
6413 			ncr_name (np), (u_long) cp, (u_long) np->header.cp);
6414 	}
6415 
6416 	/*
6417 	**	if old phase not dataphase, leave here.
6418 	*/
6419 
6420 	if (cmd & 0x06) {
6421 		PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n",
6422 			cmd&7, sbcl&7, (unsigned)olen,
6423 			(unsigned)oadr, (unsigned)rest);
6424 		goto unexpected_phase;
6425 	}
6426 
6427 	/*
6428 	**	choose the correct patch area.
6429 	**	if savep points to one, choose the other.
6430 	*/
6431 
6432 	newcmd = cp->patch;
6433 	newtmp = CCB_PHYS (cp, patch);
6434 	if (newtmp == scr_to_cpu(cp->phys.header.savep)) {
6435 		newcmd = &cp->patch[4];
6436 		newtmp = CCB_PHYS (cp, patch[4]);
6437 	}
6438 
6439 	/*
6440 	**	fillin the commands
6441 	*/
6442 
6443 	newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest);
6444 	newcmd[1] = cpu_to_scr(oadr + olen - rest);
6445 	newcmd[2] = cpu_to_scr(SCR_JUMP);
6446 	newcmd[3] = cpu_to_scr(nxtdsp);
6447 
6448 	if (DEBUG_FLAGS & DEBUG_PHASE) {
6449 		PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n",
6450 			(int) (newcmd - cp->patch),
6451 			(unsigned)scr_to_cpu(newcmd[0]),
6452 			(unsigned)scr_to_cpu(newcmd[1]),
6453 			(unsigned)scr_to_cpu(newcmd[2]),
6454 			(unsigned)scr_to_cpu(newcmd[3]));
6455 	}
6456 	/*
6457 	**	fake the return address (to the patch).
6458 	**	and restart script processor at dispatcher.
6459 	*/
6460 	OUTL (nc_temp, newtmp);
6461 	OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
6462 	return;
6463 
6464 	/*
6465 	**	Unexpected phase changes that occurs when the current phase
6466 	**	is not a DATA IN or DATA OUT phase are due to error conditions.
6467 	**	Such event may only happen when the SCRIPTS is using a
6468 	**	multibyte SCSI MOVE.
6469 	**
6470 	**	Phase change		Some possible cause
6471 	**
6472 	**	COMMAND  --> MSG IN	SCSI parity error detected by target.
6473 	**	COMMAND  --> STATUS	Bad command or refused by target.
6474 	**	MSG OUT  --> MSG IN     Message rejected by target.
6475 	**	MSG OUT  --> COMMAND    Bogus target that discards extended
6476 	**				negotiation messages.
6477 	**
6478 	**	The code below does not care of the new phase and so
6479 	**	trusts the target. Why to annoy it ?
6480 	**	If the interrupted phase is COMMAND phase, we restart at
6481 	**	dispatcher.
6482 	**	If a target does not get all the messages after selection,
6483 	**	the code assumes blindly that the target discards extended
6484 	**	messages and clears the negotiation status.
6485 	**	If the target does not want all our response to negotiation,
6486 	**	we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
6487 	**	bloat for such a should_not_happen situation).
6488 	**	In all other situation, we reset the BUS.
6489 	**	Are these assumptions reasonable ? (Wait and see ...)
6490 	*/
6491 unexpected_phase:
6492 	dsp -= 8;
6493 	nxtdsp = 0;
6494 
6495 	switch (cmd & 7) {
6496 	case 2:	/* COMMAND phase */
6497 		nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6498 		break;
6499 #if 0
6500 	case 3:	/* STATUS  phase */
6501 		nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
6502 		break;
6503 #endif
6504 	case 6:	/* MSG OUT phase */
6505 		np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8);
6506 		if	(dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
6507 			cp->host_status = HS_BUSY;
6508 			nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on);
6509 		}
6510 		else if	(dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
6511 			 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) {
6512 			nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
6513 		}
6514 		break;
6515 #if 0
6516 	case 7:	/* MSG IN  phase */
6517 		nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
6518 		break;
6519 #endif
6520 	}
6521 
6522 	if (nxtdsp) {
6523 		OUTL_DSP (nxtdsp);
6524 		return;
6525 	}
6526 
6527 reset_all:
6528 	ncr_start_reset(np);
6529 }
6530 
6531 
6532 static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp)
6533 {
6534 	struct scsi_cmnd *cmd	= cp->cmd;
6535 	struct tcb *tp	= &np->target[cmd->device->id];
6536 	struct lcb *lp	= tp->lp[cmd->device->lun];
6537 	struct list_head *qp;
6538 	struct ccb *	cp2;
6539 	int		disc_cnt = 0;
6540 	int		busy_cnt = 0;
6541 	u32		startp;
6542 	u_char		s_status = INB (SS_PRT);
6543 
6544 	/*
6545 	**	Let the SCRIPTS processor skip all not yet started CCBs,
6546 	**	and count disconnected CCBs. Since the busy queue is in
6547 	**	the same order as the chip start queue, disconnected CCBs
6548 	**	are before cp and busy ones after.
6549 	*/
6550 	if (lp) {
6551 		qp = lp->busy_ccbq.prev;
6552 		while (qp != &lp->busy_ccbq) {
6553 			cp2 = list_entry(qp, struct ccb, link_ccbq);
6554 			qp  = qp->prev;
6555 			++busy_cnt;
6556 			if (cp2 == cp)
6557 				break;
6558 			cp2->start.schedule.l_paddr =
6559 			cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip));
6560 		}
6561 		lp->held_ccb = cp;	/* Requeue when this one completes */
6562 		disc_cnt = lp->queuedccbs - busy_cnt;
6563 	}
6564 
6565 	switch(s_status) {
6566 	default:	/* Just for safety, should never happen */
6567 	case S_QUEUE_FULL:
6568 		/*
6569 		**	Decrease number of tags to the number of
6570 		**	disconnected commands.
6571 		*/
6572 		if (!lp)
6573 			goto out;
6574 		if (bootverbose >= 1) {
6575 			PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected "
6576 					"CCBs\n", busy_cnt, disc_cnt);
6577 		}
6578 		if (disc_cnt < lp->numtags) {
6579 			lp->numtags	= disc_cnt > 2 ? disc_cnt : 2;
6580 			lp->num_good	= 0;
6581 			ncr_setup_tags (np, cmd->device);
6582 		}
6583 		/*
6584 		**	Requeue the command to the start queue.
6585 		**	If any disconnected commands,
6586 		**		Clear SIGP.
6587 		**		Jump to reselect.
6588 		*/
6589 		cp->phys.header.savep = cp->startp;
6590 		cp->host_status = HS_BUSY;
6591 		cp->scsi_status = S_ILLEGAL;
6592 
6593 		ncr_put_start_queue(np, cp);
6594 		if (disc_cnt)
6595 			INB (nc_ctest2);		/* Clear SIGP */
6596 		OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect));
6597 		return;
6598 	case S_TERMINATED:
6599 	case S_CHECK_COND:
6600 		/*
6601 		**	If we were requesting sense, give up.
6602 		*/
6603 		if (cp->auto_sense)
6604 			goto out;
6605 
6606 		/*
6607 		**	Device returned CHECK CONDITION status.
6608 		**	Prepare all needed data strutures for getting
6609 		**	sense data.
6610 		**
6611 		**	identify message
6612 		*/
6613 		cp->scsi_smsg2[0]	= IDENTIFY(0, cmd->device->lun);
6614 		cp->phys.smsg.addr	= cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
6615 		cp->phys.smsg.size	= cpu_to_scr(1);
6616 
6617 		/*
6618 		**	sense command
6619 		*/
6620 		cp->phys.cmd.addr	= cpu_to_scr(CCB_PHYS (cp, sensecmd));
6621 		cp->phys.cmd.size	= cpu_to_scr(6);
6622 
6623 		/*
6624 		**	patch requested size into sense command
6625 		*/
6626 		cp->sensecmd[0]		= 0x03;
6627 		cp->sensecmd[1]		= (cmd->device->lun & 0x7) << 5;
6628 		cp->sensecmd[4]		= sizeof(cp->sense_buf);
6629 
6630 		/*
6631 		**	sense data
6632 		*/
6633 		memset(cp->sense_buf, 0, sizeof(cp->sense_buf));
6634 		cp->phys.sense.addr	= cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
6635 		cp->phys.sense.size	= cpu_to_scr(sizeof(cp->sense_buf));
6636 
6637 		/*
6638 		**	requeue the command.
6639 		*/
6640 		startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in));
6641 
6642 		cp->phys.header.savep	= startp;
6643 		cp->phys.header.goalp	= startp + 24;
6644 		cp->phys.header.lastp	= startp;
6645 		cp->phys.header.wgoalp	= startp + 24;
6646 		cp->phys.header.wlastp	= startp;
6647 
6648 		cp->host_status = HS_BUSY;
6649 		cp->scsi_status = S_ILLEGAL;
6650 		cp->auto_sense	= s_status;
6651 
6652 		cp->start.schedule.l_paddr =
6653 			cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
6654 
6655 		/*
6656 		**	Select without ATN for quirky devices.
6657 		*/
6658 		if (cmd->device->select_no_atn)
6659 			cp->start.schedule.l_paddr =
6660 			cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn));
6661 
6662 		ncr_put_start_queue(np, cp);
6663 
6664 		OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
6665 		return;
6666 	}
6667 
6668 out:
6669 	OUTONB_STD ();
6670 	return;
6671 }
6672 
6673 
6674 /*==========================================================
6675 **
6676 **
6677 **      ncr chip exception handler for programmed interrupts.
6678 **
6679 **
6680 **==========================================================
6681 */
6682 
6683 void ncr_int_sir (struct ncb *np)
6684 {
6685 	u_char scntl3;
6686 	u_char chg, ofs, per, fak, wide;
6687 	u_char num = INB (nc_dsps);
6688 	struct ccb *cp=NULL;
6689 	u_long	dsa    = INL (nc_dsa);
6690 	u_char	target = INB (nc_sdid) & 0x0f;
6691 	struct tcb *tp     = &np->target[target];
6692 	struct scsi_target *starget = tp->starget;
6693 
6694 	if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
6695 
6696 	switch (num) {
6697 	case SIR_INTFLY:
6698 		/*
6699 		**	This is used for HP Zalon/53c720 where INTFLY
6700 		**	operation is currently broken.
6701 		*/
6702 		ncr_wakeup_done(np);
6703 #ifdef SCSI_NCR_CCB_DONE_SUPPORT
6704 		OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8);
6705 #else
6706 		OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start));
6707 #endif
6708 		return;
6709 	case SIR_RESEL_NO_MSG_IN:
6710 	case SIR_RESEL_NO_IDENTIFY:
6711 		/*
6712 		**	If devices reselecting without sending an IDENTIFY
6713 		**	message still exist, this should help.
6714 		**	We just assume lun=0, 1 CCB, no tag.
6715 		*/
6716 		if (tp->lp[0]) {
6717 			OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0]));
6718 			return;
6719 		}
6720 		fallthrough;
6721 	case SIR_RESEL_BAD_TARGET:	/* Will send a TARGET RESET message */
6722 	case SIR_RESEL_BAD_LUN:		/* Will send a TARGET RESET message */
6723 	case SIR_RESEL_BAD_I_T_L_Q:	/* Will send an ABORT TAG message   */
6724 	case SIR_RESEL_BAD_I_T_L:	/* Will send an ABORT message	    */
6725 		printk ("%s:%d: SIR %d, "
6726 			"incorrect nexus identification on reselection\n",
6727 			ncr_name (np), target, num);
6728 		goto out;
6729 	case SIR_DONE_OVERFLOW:
6730 		printk ("%s:%d: SIR %d, "
6731 			"CCB done queue overflow\n",
6732 			ncr_name (np), target, num);
6733 		goto out;
6734 	case SIR_BAD_STATUS:
6735 		cp = np->header.cp;
6736 		if (!cp || CCB_PHYS (cp, phys) != dsa)
6737 			goto out;
6738 		ncr_sir_to_redo(np, num, cp);
6739 		return;
6740 	default:
6741 		/*
6742 		**	lookup the ccb
6743 		*/
6744 		cp = np->ccb;
6745 		while (cp && (CCB_PHYS (cp, phys) != dsa))
6746 			cp = cp->link_ccb;
6747 
6748 		BUG_ON(!cp);
6749 		BUG_ON(cp != np->header.cp);
6750 
6751 		if (!cp || cp != np->header.cp)
6752 			goto out;
6753 	}
6754 
6755 	switch (num) {
6756 /*-----------------------------------------------------------------------------
6757 **
6758 **	Was Sie schon immer ueber transfermode negotiation wissen wollten ...
6759 **	("Everything you've always wanted to know about transfer mode
6760 **	  negotiation")
6761 **
6762 **	We try to negotiate sync and wide transfer only after
6763 **	a successful inquire command. We look at byte 7 of the
6764 **	inquire data to determine the capabilities of the target.
6765 **
6766 **	When we try to negotiate, we append the negotiation message
6767 **	to the identify and (maybe) simple tag message.
6768 **	The host status field is set to HS_NEGOTIATE to mark this
6769 **	situation.
6770 **
6771 **	If the target doesn't answer this message immediately
6772 **	(as required by the standard), the SIR_NEGO_FAIL interrupt
6773 **	will be raised eventually.
6774 **	The handler removes the HS_NEGOTIATE status, and sets the
6775 **	negotiated value to the default (async / nowide).
6776 **
6777 **	If we receive a matching answer immediately, we check it
6778 **	for validity, and set the values.
6779 **
6780 **	If we receive a Reject message immediately, we assume the
6781 **	negotiation has failed, and fall back to standard values.
6782 **
6783 **	If we receive a negotiation message while not in HS_NEGOTIATE
6784 **	state, it's a target initiated negotiation. We prepare a
6785 **	(hopefully) valid answer, set our parameters, and send back
6786 **	this answer to the target.
6787 **
6788 **	If the target doesn't fetch the answer (no message out phase),
6789 **	we assume the negotiation has failed, and fall back to default
6790 **	settings.
6791 **
6792 **	When we set the values, we adjust them in all ccbs belonging
6793 **	to this target, in the controller's register, and in the "phys"
6794 **	field of the controller's struct ncb.
6795 **
6796 **	Possible cases:		   hs  sir   msg_in value  send   goto
6797 **	We try to negotiate:
6798 **	-> target doesn't msgin    NEG FAIL  noop   defa.  -      dispatch
6799 **	-> target rejected our msg NEG FAIL  reject defa.  -      dispatch
6800 **	-> target answered  (ok)   NEG SYNC  sdtr   set    -      clrack
6801 **	-> target answered (!ok)   NEG SYNC  sdtr   defa.  REJ--->msg_bad
6802 **	-> target answered  (ok)   NEG WIDE  wdtr   set    -      clrack
6803 **	-> target answered (!ok)   NEG WIDE  wdtr   defa.  REJ--->msg_bad
6804 **	-> any other msgin	   NEG FAIL  noop   defa.  -      dispatch
6805 **
6806 **	Target tries to negotiate:
6807 **	-> incoming message	   --- SYNC  sdtr   set    SDTR   -
6808 **	-> incoming message	   --- WIDE  wdtr   set    WDTR   -
6809 **      We sent our answer:
6810 **	-> target doesn't msgout   --- PROTO ?      defa.  -      dispatch
6811 **
6812 **-----------------------------------------------------------------------------
6813 */
6814 
6815 	case SIR_NEGO_FAILED:
6816 		/*-------------------------------------------------------
6817 		**
6818 		**	Negotiation failed.
6819 		**	Target doesn't send an answer message,
6820 		**	or target rejected our message.
6821 		**
6822 		**      Remove negotiation request.
6823 		**
6824 		**-------------------------------------------------------
6825 		*/
6826 		OUTB (HS_PRT, HS_BUSY);
6827 
6828 		fallthrough;
6829 
6830 	case SIR_NEGO_PROTO:
6831 		/*-------------------------------------------------------
6832 		**
6833 		**	Negotiation failed.
6834 		**	Target doesn't fetch the answer message.
6835 		**
6836 		**-------------------------------------------------------
6837 		*/
6838 
6839 		if (DEBUG_FLAGS & DEBUG_NEGO) {
6840 			PRINT_ADDR(cp->cmd, "negotiation failed sir=%x "
6841 					"status=%x.\n", num, cp->nego_status);
6842 		}
6843 
6844 		/*
6845 		**	any error in negotiation:
6846 		**	fall back to default mode.
6847 		*/
6848 		switch (cp->nego_status) {
6849 
6850 		case NS_SYNC:
6851 			spi_period(starget) = 0;
6852 			spi_offset(starget) = 0;
6853 			ncr_setsync (np, cp, 0, 0xe0);
6854 			break;
6855 
6856 		case NS_WIDE:
6857 			spi_width(starget) = 0;
6858 			ncr_setwide (np, cp, 0, 0);
6859 			break;
6860 
6861 		}
6862 		np->msgin [0] = NOP;
6863 		np->msgout[0] = NOP;
6864 		cp->nego_status = 0;
6865 		break;
6866 
6867 	case SIR_NEGO_SYNC:
6868 		if (DEBUG_FLAGS & DEBUG_NEGO) {
6869 			ncr_print_msg(cp, "sync msgin", np->msgin);
6870 		}
6871 
6872 		chg = 0;
6873 		per = np->msgin[3];
6874 		ofs = np->msgin[4];
6875 		if (ofs==0) per=255;
6876 
6877 		/*
6878 		**      if target sends SDTR message,
6879 		**	      it CAN transfer synch.
6880 		*/
6881 
6882 		if (ofs && starget)
6883 			spi_support_sync(starget) = 1;
6884 
6885 		/*
6886 		**	check values against driver limits.
6887 		*/
6888 
6889 		if (per < np->minsync)
6890 			{chg = 1; per = np->minsync;}
6891 		if (per < tp->minsync)
6892 			{chg = 1; per = tp->minsync;}
6893 		if (ofs > tp->maxoffs)
6894 			{chg = 1; ofs = tp->maxoffs;}
6895 
6896 		/*
6897 		**	Check against controller limits.
6898 		*/
6899 		fak	= 7;
6900 		scntl3	= 0;
6901 		if (ofs != 0) {
6902 			ncr_getsync(np, per, &fak, &scntl3);
6903 			if (fak > 7) {
6904 				chg = 1;
6905 				ofs = 0;
6906 			}
6907 		}
6908 		if (ofs == 0) {
6909 			fak	= 7;
6910 			per	= 0;
6911 			scntl3	= 0;
6912 			tp->minsync = 0;
6913 		}
6914 
6915 		if (DEBUG_FLAGS & DEBUG_NEGO) {
6916 			PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d "
6917 				"fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg);
6918 		}
6919 
6920 		if (INB (HS_PRT) == HS_NEGOTIATE) {
6921 			OUTB (HS_PRT, HS_BUSY);
6922 			switch (cp->nego_status) {
6923 
6924 			case NS_SYNC:
6925 				/* This was an answer message */
6926 				if (chg) {
6927 					/* Answer wasn't acceptable.  */
6928 					spi_period(starget) = 0;
6929 					spi_offset(starget) = 0;
6930 					ncr_setsync(np, cp, 0, 0xe0);
6931 					OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad));
6932 				} else {
6933 					/* Answer is ok.  */
6934 					spi_period(starget) = per;
6935 					spi_offset(starget) = ofs;
6936 					ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6937 					OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack));
6938 				}
6939 				return;
6940 
6941 			case NS_WIDE:
6942 				spi_width(starget) = 0;
6943 				ncr_setwide(np, cp, 0, 0);
6944 				break;
6945 			}
6946 		}
6947 
6948 		/*
6949 		**	It was a request. Set value and
6950 		**      prepare an answer message
6951 		*/
6952 
6953 		spi_period(starget) = per;
6954 		spi_offset(starget) = ofs;
6955 		ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6956 
6957 		spi_populate_sync_msg(np->msgout, per, ofs);
6958 		cp->nego_status = NS_SYNC;
6959 
6960 		if (DEBUG_FLAGS & DEBUG_NEGO) {
6961 			ncr_print_msg(cp, "sync msgout", np->msgout);
6962 		}
6963 
6964 		if (!ofs) {
6965 			OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
6966 			return;
6967 		}
6968 		np->msgin [0] = NOP;
6969 
6970 		break;
6971 
6972 	case SIR_NEGO_WIDE:
6973 		/*
6974 		**	Wide request message received.
6975 		*/
6976 		if (DEBUG_FLAGS & DEBUG_NEGO) {
6977 			ncr_print_msg(cp, "wide msgin", np->msgin);
6978 		}
6979 
6980 		/*
6981 		**	get requested values.
6982 		*/
6983 
6984 		chg  = 0;
6985 		wide = np->msgin[3];
6986 
6987 		/*
6988 		**      if target sends WDTR message,
6989 		**	      it CAN transfer wide.
6990 		*/
6991 
6992 		if (wide && starget)
6993 			spi_support_wide(starget) = 1;
6994 
6995 		/*
6996 		**	check values against driver limits.
6997 		*/
6998 
6999 		if (wide > tp->usrwide)
7000 			{chg = 1; wide = tp->usrwide;}
7001 
7002 		if (DEBUG_FLAGS & DEBUG_NEGO) {
7003 			PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide,
7004 					chg);
7005 		}
7006 
7007 		if (INB (HS_PRT) == HS_NEGOTIATE) {
7008 			OUTB (HS_PRT, HS_BUSY);
7009 			switch (cp->nego_status) {
7010 
7011 			case NS_WIDE:
7012 				/*
7013 				**      This was an answer message
7014 				*/
7015 				if (chg) {
7016 					/* Answer wasn't acceptable.  */
7017 					spi_width(starget) = 0;
7018 					ncr_setwide(np, cp, 0, 1);
7019 					OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
7020 				} else {
7021 					/* Answer is ok.  */
7022 					spi_width(starget) = wide;
7023 					ncr_setwide(np, cp, wide, 1);
7024 					OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
7025 				}
7026 				return;
7027 
7028 			case NS_SYNC:
7029 				spi_period(starget) = 0;
7030 				spi_offset(starget) = 0;
7031 				ncr_setsync(np, cp, 0, 0xe0);
7032 				break;
7033 			}
7034 		}
7035 
7036 		/*
7037 		**	It was a request, set value and
7038 		**      prepare an answer message
7039 		*/
7040 
7041 		spi_width(starget) = wide;
7042 		ncr_setwide(np, cp, wide, 1);
7043 		spi_populate_width_msg(np->msgout, wide);
7044 
7045 		np->msgin [0] = NOP;
7046 
7047 		cp->nego_status = NS_WIDE;
7048 
7049 		if (DEBUG_FLAGS & DEBUG_NEGO) {
7050 			ncr_print_msg(cp, "wide msgout", np->msgin);
7051 		}
7052 		break;
7053 
7054 /*--------------------------------------------------------------------
7055 **
7056 **	Processing of special messages
7057 **
7058 **--------------------------------------------------------------------
7059 */
7060 
7061 	case SIR_REJECT_RECEIVED:
7062 		/*-----------------------------------------------
7063 		**
7064 		**	We received a MESSAGE_REJECT.
7065 		**
7066 		**-----------------------------------------------
7067 		*/
7068 
7069 		PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n",
7070 			(unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]);
7071 		break;
7072 
7073 	case SIR_REJECT_SENT:
7074 		/*-----------------------------------------------
7075 		**
7076 		**	We received an unknown message
7077 		**
7078 		**-----------------------------------------------
7079 		*/
7080 
7081 		ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin);
7082 		break;
7083 
7084 /*--------------------------------------------------------------------
7085 **
7086 **	Processing of special messages
7087 **
7088 **--------------------------------------------------------------------
7089 */
7090 
7091 	case SIR_IGN_RESIDUE:
7092 		/*-----------------------------------------------
7093 		**
7094 		**	We received an IGNORE RESIDUE message,
7095 		**	which couldn't be handled by the script.
7096 		**
7097 		**-----------------------------------------------
7098 		*/
7099 
7100 		PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet "
7101 				"implemented.\n");
7102 		break;
7103 #if 0
7104 	case SIR_MISSING_SAVE:
7105 		/*-----------------------------------------------
7106 		**
7107 		**	We received an DISCONNECT message,
7108 		**	but the datapointer wasn't saved before.
7109 		**
7110 		**-----------------------------------------------
7111 		*/
7112 
7113 		PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer "
7114 				"not saved: data=%x save=%x goal=%x.\n",
7115 			(unsigned) INL (nc_temp),
7116 			(unsigned) scr_to_cpu(np->header.savep),
7117 			(unsigned) scr_to_cpu(np->header.goalp));
7118 		break;
7119 #endif
7120 	}
7121 
7122 out:
7123 	OUTONB_STD ();
7124 }
7125 
7126 /*==========================================================
7127 **
7128 **
7129 **	Acquire a control block
7130 **
7131 **
7132 **==========================================================
7133 */
7134 
7135 static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd)
7136 {
7137 	u_char tn = cmd->device->id;
7138 	u_char ln = cmd->device->lun;
7139 	struct tcb *tp = &np->target[tn];
7140 	struct lcb *lp = tp->lp[ln];
7141 	u_char tag = NO_TAG;
7142 	struct ccb *cp = NULL;
7143 
7144 	/*
7145 	**	Lun structure available ?
7146 	*/
7147 	if (lp) {
7148 		struct list_head *qp;
7149 		/*
7150 		**	Keep from using more tags than we can handle.
7151 		*/
7152 		if (lp->usetags && lp->busyccbs >= lp->maxnxs)
7153 			return NULL;
7154 
7155 		/*
7156 		**	Allocate a new CCB if needed.
7157 		*/
7158 		if (list_empty(&lp->free_ccbq))
7159 			ncr_alloc_ccb(np, tn, ln);
7160 
7161 		/*
7162 		**	Look for free CCB
7163 		*/
7164 		qp = ncr_list_pop(&lp->free_ccbq);
7165 		if (qp) {
7166 			cp = list_entry(qp, struct ccb, link_ccbq);
7167 			if (cp->magic) {
7168 				PRINT_ADDR(cmd, "ccb free list corrupted "
7169 						"(@%p)\n", cp);
7170 				cp = NULL;
7171 			} else {
7172 				list_add_tail(qp, &lp->wait_ccbq);
7173 				++lp->busyccbs;
7174 			}
7175 		}
7176 
7177 		/*
7178 		**	If a CCB is available,
7179 		**	Get a tag for this nexus if required.
7180 		*/
7181 		if (cp) {
7182 			if (lp->usetags)
7183 				tag = lp->cb_tags[lp->ia_tag];
7184 		}
7185 		else if (lp->actccbs > 0)
7186 			return NULL;
7187 	}
7188 
7189 	/*
7190 	**	if nothing available, take the default.
7191 	*/
7192 	if (!cp)
7193 		cp = np->ccb;
7194 
7195 	/*
7196 	**	Wait until available.
7197 	*/
7198 #if 0
7199 	while (cp->magic) {
7200 		if (flags & SCSI_NOSLEEP) break;
7201 		if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0))
7202 			break;
7203 	}
7204 #endif
7205 
7206 	if (cp->magic)
7207 		return NULL;
7208 
7209 	cp->magic = 1;
7210 
7211 	/*
7212 	**	Move to next available tag if tag used.
7213 	*/
7214 	if (lp) {
7215 		if (tag != NO_TAG) {
7216 			++lp->ia_tag;
7217 			if (lp->ia_tag == MAX_TAGS)
7218 				lp->ia_tag = 0;
7219 			lp->tags_umap |= (((tagmap_t) 1) << tag);
7220 		}
7221 	}
7222 
7223 	/*
7224 	**	Remember all informations needed to free this CCB.
7225 	*/
7226 	cp->tag	   = tag;
7227 	cp->target = tn;
7228 	cp->lun    = ln;
7229 
7230 	if (DEBUG_FLAGS & DEBUG_TAGS) {
7231 		PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag);
7232 	}
7233 
7234 	return cp;
7235 }
7236 
7237 /*==========================================================
7238 **
7239 **
7240 **	Release one control block
7241 **
7242 **
7243 **==========================================================
7244 */
7245 
7246 static void ncr_free_ccb (struct ncb *np, struct ccb *cp)
7247 {
7248 	struct tcb *tp = &np->target[cp->target];
7249 	struct lcb *lp = tp->lp[cp->lun];
7250 
7251 	if (DEBUG_FLAGS & DEBUG_TAGS) {
7252 		PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag);
7253 	}
7254 
7255 	/*
7256 	**	If lun control block available,
7257 	**	decrement active commands and increment credit,
7258 	**	free the tag if any and remove the JUMP for reselect.
7259 	*/
7260 	if (lp) {
7261 		if (cp->tag != NO_TAG) {
7262 			lp->cb_tags[lp->if_tag++] = cp->tag;
7263 			if (lp->if_tag == MAX_TAGS)
7264 				lp->if_tag = 0;
7265 			lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag);
7266 			lp->tags_smap &= lp->tags_umap;
7267 			lp->jump_ccb[cp->tag] =
7268 				cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q));
7269 		} else {
7270 			lp->jump_ccb[0] =
7271 				cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l));
7272 		}
7273 	}
7274 
7275 	/*
7276 	**	Make this CCB available.
7277 	*/
7278 
7279 	if (lp) {
7280 		if (cp != np->ccb)
7281 			list_move(&cp->link_ccbq, &lp->free_ccbq);
7282 		--lp->busyccbs;
7283 		if (cp->queued) {
7284 			--lp->queuedccbs;
7285 		}
7286 	}
7287 	cp -> host_status = HS_IDLE;
7288 	cp -> magic = 0;
7289 	if (cp->queued) {
7290 		--np->queuedccbs;
7291 		cp->queued = 0;
7292 	}
7293 
7294 #if 0
7295 	if (cp == np->ccb)
7296 		wakeup ((caddr_t) cp);
7297 #endif
7298 }
7299 
7300 
7301 #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r))
7302 
7303 /*------------------------------------------------------------------------
7304 **	Initialize the fixed part of a CCB structure.
7305 **------------------------------------------------------------------------
7306 **------------------------------------------------------------------------
7307 */
7308 static void ncr_init_ccb(struct ncb *np, struct ccb *cp)
7309 {
7310 	ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7311 
7312 	/*
7313 	**	Remember virtual and bus address of this ccb.
7314 	*/
7315 	cp->p_ccb 	   = vtobus(cp);
7316 	cp->phys.header.cp = cp;
7317 
7318 	/*
7319 	**	This allows list_del to work for the default ccb.
7320 	*/
7321 	INIT_LIST_HEAD(&cp->link_ccbq);
7322 
7323 	/*
7324 	**	Initialyze the start and restart launch script.
7325 	**
7326 	**	COPY(4) @(...p_phys), @(dsa)
7327 	**	JUMP @(sched_point)
7328 	*/
7329 	cp->start.setup_dsa[0]	 = cpu_to_scr(copy_4);
7330 	cp->start.setup_dsa[1]	 = cpu_to_scr(CCB_PHYS(cp, start.p_phys));
7331 	cp->start.setup_dsa[2]	 = cpu_to_scr(ncr_reg_bus_addr(nc_dsa));
7332 	cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP);
7333 	cp->start.p_phys	 = cpu_to_scr(CCB_PHYS(cp, phys));
7334 
7335 	memcpy(&cp->restart, &cp->start, sizeof(cp->restart));
7336 
7337 	cp->start.schedule.l_paddr   = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
7338 	cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
7339 }
7340 
7341 
7342 /*------------------------------------------------------------------------
7343 **	Allocate a CCB and initialize its fixed part.
7344 **------------------------------------------------------------------------
7345 **------------------------------------------------------------------------
7346 */
7347 static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln)
7348 {
7349 	struct tcb *tp = &np->target[tn];
7350 	struct lcb *lp = tp->lp[ln];
7351 	struct ccb *cp = NULL;
7352 
7353 	/*
7354 	**	Allocate memory for this CCB.
7355 	*/
7356 	cp = m_calloc_dma(sizeof(struct ccb), "CCB");
7357 	if (!cp)
7358 		return;
7359 
7360 	/*
7361 	**	Count it and initialyze it.
7362 	*/
7363 	lp->actccbs++;
7364 	np->actccbs++;
7365 	memset(cp, 0, sizeof (*cp));
7366 	ncr_init_ccb(np, cp);
7367 
7368 	/*
7369 	**	Chain into wakeup list and free ccb queue and take it
7370 	**	into account for tagged commands.
7371 	*/
7372 	cp->link_ccb      = np->ccb->link_ccb;
7373 	np->ccb->link_ccb = cp;
7374 
7375 	list_add(&cp->link_ccbq, &lp->free_ccbq);
7376 }
7377 
7378 /*==========================================================
7379 **
7380 **
7381 **      Allocation of resources for Targets/Luns/Tags.
7382 **
7383 **
7384 **==========================================================
7385 */
7386 
7387 
7388 /*------------------------------------------------------------------------
7389 **	Target control block initialisation.
7390 **------------------------------------------------------------------------
7391 **	This data structure is fully initialized after a SCSI command
7392 **	has been successfully completed for this target.
7393 **	It contains a SCRIPT that is called on target reselection.
7394 **------------------------------------------------------------------------
7395 */
7396 static void ncr_init_tcb (struct ncb *np, u_char tn)
7397 {
7398 	struct tcb *tp = &np->target[tn];
7399 	ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1);
7400 	int th = tn & 3;
7401 	int i;
7402 
7403 	/*
7404 	**	Jump to next tcb if SFBR does not match this target.
7405 	**	JUMP  IF (SFBR != #target#), @(next tcb)
7406 	*/
7407 	tp->jump_tcb.l_cmd   =
7408 		cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn))));
7409 	tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr;
7410 
7411 	/*
7412 	**	Load the synchronous transfer register.
7413 	**	COPY @(tp->sval), @(sxfer)
7414 	*/
7415 	tp->getscr[0] =	cpu_to_scr(copy_1);
7416 	tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval));
7417 #ifdef SCSI_NCR_BIG_ENDIAN
7418 	tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3);
7419 #else
7420 	tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer));
7421 #endif
7422 
7423 	/*
7424 	**	Load the timing register.
7425 	**	COPY @(tp->wval), @(scntl3)
7426 	*/
7427 	tp->getscr[3] =	cpu_to_scr(copy_1);
7428 	tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval));
7429 #ifdef SCSI_NCR_BIG_ENDIAN
7430 	tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3);
7431 #else
7432 	tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3));
7433 #endif
7434 
7435 	/*
7436 	**	Get the IDENTIFY message and the lun.
7437 	**	CALL @script(resel_lun)
7438 	*/
7439 	tp->call_lun.l_cmd   = cpu_to_scr(SCR_CALL);
7440 	tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun));
7441 
7442 	/*
7443 	**	Look for the lun control block of this nexus.
7444 	**	For i = 0 to 3
7445 	**		JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
7446 	*/
7447 	for (i = 0 ; i < 4 ; i++) {
7448 		tp->jump_lcb[i].l_cmd   =
7449 				cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
7450 		tp->jump_lcb[i].l_paddr =
7451 				cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify));
7452 	}
7453 
7454 	/*
7455 	**	Link this target control block to the JUMP chain.
7456 	*/
7457 	np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb));
7458 
7459 	/*
7460 	**	These assert's should be moved at driver initialisations.
7461 	*/
7462 #ifdef SCSI_NCR_BIG_ENDIAN
7463 	BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7464 		 offsetof(struct tcb    , sval    )) &3) != 3);
7465 	BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7466 		 offsetof(struct tcb    , wval    )) &3) != 3);
7467 #else
7468 	BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
7469 		 offsetof(struct tcb    , sval    )) &3) != 0);
7470 	BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
7471 		 offsetof(struct tcb    , wval    )) &3) != 0);
7472 #endif
7473 }
7474 
7475 
7476 /*------------------------------------------------------------------------
7477 **	Lun control block allocation and initialization.
7478 **------------------------------------------------------------------------
7479 **	This data structure is allocated and initialized after a SCSI
7480 **	command has been successfully completed for this target/lun.
7481 **------------------------------------------------------------------------
7482 */
7483 static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln)
7484 {
7485 	struct tcb *tp = &np->target[tn];
7486 	struct lcb *lp = tp->lp[ln];
7487 	ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
7488 	int lh = ln & 3;
7489 
7490 	/*
7491 	**	Already done, return.
7492 	*/
7493 	if (lp)
7494 		return lp;
7495 
7496 	/*
7497 	**	Allocate the lcb.
7498 	*/
7499 	lp = m_calloc_dma(sizeof(struct lcb), "LCB");
7500 	if (!lp)
7501 		goto fail;
7502 	memset(lp, 0, sizeof(*lp));
7503 	tp->lp[ln] = lp;
7504 
7505 	/*
7506 	**	Initialize the target control block if not yet.
7507 	*/
7508 	if (!tp->jump_tcb.l_cmd)
7509 		ncr_init_tcb(np, tn);
7510 
7511 	/*
7512 	**	Initialize the CCB queue headers.
7513 	*/
7514 	INIT_LIST_HEAD(&lp->free_ccbq);
7515 	INIT_LIST_HEAD(&lp->busy_ccbq);
7516 	INIT_LIST_HEAD(&lp->wait_ccbq);
7517 	INIT_LIST_HEAD(&lp->skip_ccbq);
7518 
7519 	/*
7520 	**	Set max CCBs to 1 and use the default 1 entry
7521 	**	jump table by default.
7522 	*/
7523 	lp->maxnxs	= 1;
7524 	lp->jump_ccb	= &lp->jump_ccb_0;
7525 	lp->p_jump_ccb	= cpu_to_scr(vtobus(lp->jump_ccb));
7526 
7527 	/*
7528 	**	Initilialyze the reselect script:
7529 	**
7530 	**	Jump to next lcb if SFBR does not match this lun.
7531 	**	Load TEMP with the CCB direct jump table bus address.
7532 	**	Get the SIMPLE TAG message and the tag.
7533 	**
7534 	**	JUMP  IF (SFBR != #lun#), @(next lcb)
7535 	**	COPY @(lp->p_jump_ccb),	  @(temp)
7536 	**	JUMP @script(resel_notag)
7537 	*/
7538 	lp->jump_lcb.l_cmd   =
7539 		cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff))));
7540 	lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr;
7541 
7542 	lp->load_jump_ccb[0] = cpu_to_scr(copy_4);
7543 	lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb));
7544 	lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp));
7545 
7546 	lp->jump_tag.l_cmd   = cpu_to_scr(SCR_JUMP);
7547 	lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag));
7548 
7549 	/*
7550 	**	Link this lun control block to the JUMP chain.
7551 	*/
7552 	tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb));
7553 
7554 	/*
7555 	**	Initialize command queuing control.
7556 	*/
7557 	lp->busyccbs	= 1;
7558 	lp->queuedccbs	= 1;
7559 	lp->queuedepth	= 1;
7560 fail:
7561 	return lp;
7562 }
7563 
7564 
7565 /*------------------------------------------------------------------------
7566 **	Lun control block setup on INQUIRY data received.
7567 **------------------------------------------------------------------------
7568 **	We only support WIDE, SYNC for targets and CMDQ for logical units.
7569 **	This setup is done on each INQUIRY since we are expecting user
7570 **	will play with CHANGE DEFINITION commands. :-)
7571 **------------------------------------------------------------------------
7572 */
7573 static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev)
7574 {
7575 	unsigned char tn = sdev->id, ln = sdev->lun;
7576 	struct tcb *tp = &np->target[tn];
7577 	struct lcb *lp = tp->lp[ln];
7578 
7579 	/* If no lcb, try to allocate it.  */
7580 	if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
7581 		goto fail;
7582 
7583 	/*
7584 	**	If unit supports tagged commands, allocate the
7585 	**	CCB JUMP table if not yet.
7586 	*/
7587 	if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) {
7588 		int i;
7589 		lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB");
7590 		if (!lp->jump_ccb) {
7591 			lp->jump_ccb = &lp->jump_ccb_0;
7592 			goto fail;
7593 		}
7594 		lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
7595 		for (i = 0 ; i < 64 ; i++)
7596 			lp->jump_ccb[i] =
7597 				cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q));
7598 		for (i = 0 ; i < MAX_TAGS ; i++)
7599 			lp->cb_tags[i] = i;
7600 		lp->maxnxs = MAX_TAGS;
7601 		lp->tags_stime = jiffies + 3*HZ;
7602 		ncr_setup_tags (np, sdev);
7603 	}
7604 
7605 
7606 fail:
7607 	return lp;
7608 }
7609 
7610 /*==========================================================
7611 **
7612 **
7613 **	Build Scatter Gather Block
7614 **
7615 **
7616 **==========================================================
7617 **
7618 **	The transfer area may be scattered among
7619 **	several non adjacent physical pages.
7620 **
7621 **	We may use MAX_SCATTER blocks.
7622 **
7623 **----------------------------------------------------------
7624 */
7625 
7626 /*
7627 **	We try to reduce the number of interrupts caused
7628 **	by unexpected phase changes due to disconnects.
7629 **	A typical harddisk may disconnect before ANY block.
7630 **	If we wanted to avoid unexpected phase changes at all
7631 **	we had to use a break point every 512 bytes.
7632 **	Of course the number of scatter/gather blocks is
7633 **	limited.
7634 **	Under Linux, the scatter/gatter blocks are provided by
7635 **	the generic driver. We just have to copy addresses and
7636 **	sizes to the data segment array.
7637 */
7638 
7639 static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
7640 {
7641 	int segment	= 0;
7642 	int use_sg	= scsi_sg_count(cmd);
7643 
7644 	cp->data_len	= 0;
7645 
7646 	use_sg = map_scsi_sg_data(np, cmd);
7647 	if (use_sg > 0) {
7648 		struct scatterlist *sg;
7649 		struct scr_tblmove *data;
7650 
7651 		if (use_sg > MAX_SCATTER) {
7652 			unmap_scsi_data(np, cmd);
7653 			return -1;
7654 		}
7655 
7656 		data = &cp->phys.data[MAX_SCATTER - use_sg];
7657 
7658 		scsi_for_each_sg(cmd, sg, use_sg, segment) {
7659 			dma_addr_t baddr = sg_dma_address(sg);
7660 			unsigned int len = sg_dma_len(sg);
7661 
7662 			ncr_build_sge(np, &data[segment], baddr, len);
7663 			cp->data_len += len;
7664 		}
7665 	} else
7666 		segment = -2;
7667 
7668 	return segment;
7669 }
7670 
7671 /*==========================================================
7672 **
7673 **
7674 **	Test the bus snoop logic :-(
7675 **
7676 **	Has to be called with interrupts disabled.
7677 **
7678 **
7679 **==========================================================
7680 */
7681 
7682 static int __init ncr_regtest (struct ncb* np)
7683 {
7684 	register volatile u32 data;
7685 	/*
7686 	**	ncr registers may NOT be cached.
7687 	**	write 0xffffffff to a read only register area,
7688 	**	and try to read it back.
7689 	*/
7690 	data = 0xffffffff;
7691 	OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
7692 	data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
7693 #if 1
7694 	if (data == 0xffffffff) {
7695 #else
7696 	if ((data & 0xe2f0fffd) != 0x02000080) {
7697 #endif
7698 		printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7699 			(unsigned) data);
7700 		return (0x10);
7701 	}
7702 	return (0);
7703 }
7704 
7705 static int __init ncr_snooptest (struct ncb* np)
7706 {
7707 	u32	ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
7708 	int	i, err=0;
7709 	if (np->reg) {
7710 		err |= ncr_regtest (np);
7711 		if (err)
7712 			return (err);
7713 	}
7714 
7715 	/* init */
7716 	pc  = NCB_SCRIPTH_PHYS (np, snooptest);
7717 	host_wr = 1;
7718 	ncr_wr  = 2;
7719 	/*
7720 	**	Set memory and register.
7721 	*/
7722 	np->ncr_cache = cpu_to_scr(host_wr);
7723 	OUTL (nc_temp, ncr_wr);
7724 	/*
7725 	**	Start script (exchange values)
7726 	*/
7727 	OUTL_DSP (pc);
7728 	/*
7729 	**	Wait 'til done (with timeout)
7730 	*/
7731 	for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
7732 		if (INB(nc_istat) & (INTF|SIP|DIP))
7733 			break;
7734 	/*
7735 	**	Save termination position.
7736 	*/
7737 	pc = INL (nc_dsp);
7738 	/*
7739 	**	Read memory and register.
7740 	*/
7741 	host_rd = scr_to_cpu(np->ncr_cache);
7742 	ncr_rd  = INL (nc_scratcha);
7743 	ncr_bk  = INL (nc_temp);
7744 	/*
7745 	**	Reset ncr chip
7746 	*/
7747 	ncr_chip_reset(np, 100);
7748 	/*
7749 	**	check for timeout
7750 	*/
7751 	if (i>=NCR_SNOOP_TIMEOUT) {
7752 		printk ("CACHE TEST FAILED: timeout.\n");
7753 		return (0x20);
7754 	}
7755 	/*
7756 	**	Check termination position.
7757 	*/
7758 	if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
7759 		printk ("CACHE TEST FAILED: script execution failed.\n");
7760 		printk ("start=%08lx, pc=%08lx, end=%08lx\n",
7761 			(u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
7762 			(u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
7763 		return (0x40);
7764 	}
7765 	/*
7766 	**	Show results.
7767 	*/
7768 	if (host_wr != ncr_rd) {
7769 		printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
7770 			(int) host_wr, (int) ncr_rd);
7771 		err |= 1;
7772 	}
7773 	if (host_rd != ncr_wr) {
7774 		printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
7775 			(int) ncr_wr, (int) host_rd);
7776 		err |= 2;
7777 	}
7778 	if (ncr_bk != ncr_wr) {
7779 		printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
7780 			(int) ncr_wr, (int) ncr_bk);
7781 		err |= 4;
7782 	}
7783 	return (err);
7784 }
7785 
7786 /*==========================================================
7787 **
7788 **	Determine the ncr's clock frequency.
7789 **	This is essential for the negotiation
7790 **	of the synchronous transfer rate.
7791 **
7792 **==========================================================
7793 **
7794 **	Note: we have to return the correct value.
7795 **	THERE IS NO SAFE DEFAULT VALUE.
7796 **
7797 **	Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7798 **	53C860 and 53C875 rev. 1 support fast20 transfers but
7799 **	do not have a clock doubler and so are provided with a
7800 **	80 MHz clock. All other fast20 boards incorporate a doubler
7801 **	and so should be delivered with a 40 MHz clock.
7802 **	The future fast40 chips (895/895) use a 40 Mhz base clock
7803 **	and provide a clock quadrupler (160 Mhz). The code below
7804 **	tries to deal as cleverly as possible with all this stuff.
7805 **
7806 **----------------------------------------------------------
7807 */
7808 
7809 /*
7810  *	Select NCR SCSI clock frequency
7811  */
7812 static void ncr_selectclock(struct ncb *np, u_char scntl3)
7813 {
7814 	if (np->multiplier < 2) {
7815 		OUTB(nc_scntl3,	scntl3);
7816 		return;
7817 	}
7818 
7819 	if (bootverbose >= 2)
7820 		printk ("%s: enabling clock multiplier\n", ncr_name(np));
7821 
7822 	OUTB(nc_stest1, DBLEN);	   /* Enable clock multiplier		  */
7823 	if (np->multiplier > 2) {  /* Poll bit 5 of stest4 for quadrupler */
7824 		int i = 20;
7825 		while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7826 			udelay(20);
7827 		if (!i)
7828 			printk("%s: the chip cannot lock the frequency\n", ncr_name(np));
7829 	} else			/* Wait 20 micro-seconds for doubler	*/
7830 		udelay(20);
7831 	OUTB(nc_stest3, HSC);		/* Halt the scsi clock		*/
7832 	OUTB(nc_scntl3,	scntl3);
7833 	OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier	*/
7834 	OUTB(nc_stest3, 0x00);		/* Restart scsi clock 		*/
7835 }
7836 
7837 
7838 /*
7839  *	calculate NCR SCSI clock frequency (in KHz)
7840  */
7841 static unsigned __init ncrgetfreq (struct ncb *np, int gen)
7842 {
7843 	unsigned ms = 0;
7844 	char count = 0;
7845 
7846 	/*
7847 	 * Measure GEN timer delay in order
7848 	 * to calculate SCSI clock frequency
7849 	 *
7850 	 * This code will never execute too
7851 	 * many loop iterations (if DELAY is
7852 	 * reasonably correct). It could get
7853 	 * too low a delay (too high a freq.)
7854 	 * if the CPU is slow executing the
7855 	 * loop for some reason (an NMI, for
7856 	 * example). For this reason we will
7857 	 * if multiple measurements are to be
7858 	 * performed trust the higher delay
7859 	 * (lower frequency returned).
7860 	 */
7861 	OUTB (nc_stest1, 0);	/* make sure clock doubler is OFF */
7862 	OUTW (nc_sien , 0);	/* mask all scsi interrupts */
7863 	(void) INW (nc_sist);	/* clear pending scsi interrupt */
7864 	OUTB (nc_dien , 0);	/* mask all dma interrupts */
7865 	(void) INW (nc_sist);	/* another one, just to be sure :) */
7866 	OUTB (nc_scntl3, 4);	/* set pre-scaler to divide by 3 */
7867 	OUTB (nc_stime1, 0);	/* disable general purpose timer */
7868 	OUTB (nc_stime1, gen);	/* set to nominal delay of 1<<gen * 125us */
7869 	while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
7870 		for (count = 0; count < 10; count ++)
7871 			udelay(100);	/* count ms */
7872 	}
7873 	OUTB (nc_stime1, 0);	/* disable general purpose timer */
7874  	/*
7875  	 * set prescaler to divide by whatever 0 means
7876  	 * 0 ought to choose divide by 2, but appears
7877  	 * to set divide by 3.5 mode in my 53c810 ...
7878  	 */
7879  	OUTB (nc_scntl3, 0);
7880 
7881 	if (bootverbose >= 2)
7882 		printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms);
7883   	/*
7884  	 * adjust for prescaler, and convert into KHz
7885   	 */
7886 	return ms ? ((1 << gen) * 4340) / ms : 0;
7887 }
7888 
7889 /*
7890  *	Get/probe NCR SCSI clock frequency
7891  */
7892 static void __init ncr_getclock (struct ncb *np, int mult)
7893 {
7894 	unsigned char scntl3 = INB(nc_scntl3);
7895 	unsigned char stest1 = INB(nc_stest1);
7896 	unsigned f1;
7897 
7898 	np->multiplier = 1;
7899 	f1 = 40000;
7900 
7901 	/*
7902 	**	True with 875 or 895 with clock multiplier selected
7903 	*/
7904 	if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7905 		if (bootverbose >= 2)
7906 			printk ("%s: clock multiplier found\n", ncr_name(np));
7907 		np->multiplier = mult;
7908 	}
7909 
7910 	/*
7911 	**	If multiplier not found or scntl3 not 7,5,3,
7912 	**	reset chip and get frequency from general purpose timer.
7913 	**	Otherwise trust scntl3 BIOS setting.
7914 	*/
7915 	if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7916 		unsigned f2;
7917 
7918 		ncr_chip_reset(np, 5);
7919 
7920 		(void) ncrgetfreq (np, 11);	/* throw away first result */
7921 		f1 = ncrgetfreq (np, 11);
7922 		f2 = ncrgetfreq (np, 11);
7923 
7924 		if(bootverbose)
7925 			printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2);
7926 
7927 		if (f1 > f2) f1 = f2;		/* trust lower result	*/
7928 
7929 		if	(f1 <	45000)		f1 =  40000;
7930 		else if (f1 <	55000)		f1 =  50000;
7931 		else				f1 =  80000;
7932 
7933 		if (f1 < 80000 && mult > 1) {
7934 			if (bootverbose >= 2)
7935 				printk ("%s: clock multiplier assumed\n", ncr_name(np));
7936 			np->multiplier	= mult;
7937 		}
7938 	} else {
7939 		if	((scntl3 & 7) == 3)	f1 =  40000;
7940 		else if	((scntl3 & 7) == 5)	f1 =  80000;
7941 		else 				f1 = 160000;
7942 
7943 		f1 /= np->multiplier;
7944 	}
7945 
7946 	/*
7947 	**	Compute controller synchronous parameters.
7948 	*/
7949 	f1		*= np->multiplier;
7950 	np->clock_khz	= f1;
7951 }
7952 
7953 /*===================== LINUX ENTRY POINTS SECTION ==========================*/
7954 
7955 static int ncr53c8xx_slave_alloc(struct scsi_device *device)
7956 {
7957 	struct Scsi_Host *host = device->host;
7958 	struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7959 	struct tcb *tp = &np->target[device->id];
7960 	tp->starget = device->sdev_target;
7961 
7962 	return 0;
7963 }
7964 
7965 static int ncr53c8xx_slave_configure(struct scsi_device *device)
7966 {
7967 	struct Scsi_Host *host = device->host;
7968 	struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7969 	struct tcb *tp = &np->target[device->id];
7970 	struct lcb *lp = tp->lp[device->lun];
7971 	int numtags, depth_to_use;
7972 
7973 	ncr_setup_lcb(np, device);
7974 
7975 	/*
7976 	**	Select queue depth from driver setup.
7977 	**	Donnot use more than configured by user.
7978 	**	Use at least 2.
7979 	**	Donnot use more than our maximum.
7980 	*/
7981 	numtags = device_queue_depth(np->unit, device->id, device->lun);
7982 	if (numtags > tp->usrtags)
7983 		numtags = tp->usrtags;
7984 	if (!device->tagged_supported)
7985 		numtags = 1;
7986 	depth_to_use = numtags;
7987 	if (depth_to_use < 2)
7988 		depth_to_use = 2;
7989 	if (depth_to_use > MAX_TAGS)
7990 		depth_to_use = MAX_TAGS;
7991 
7992 	scsi_change_queue_depth(device, depth_to_use);
7993 
7994 	/*
7995 	**	Since the queue depth is not tunable under Linux,
7996 	**	we need to know this value in order not to
7997 	**	announce stupid things to user.
7998 	**
7999 	**	XXX(hch): As of Linux 2.6 it certainly _is_ tunable..
8000 	**		  In fact we just tuned it, or did I miss
8001 	**		  something important? :)
8002 	*/
8003 	if (lp) {
8004 		lp->numtags = lp->maxtags = numtags;
8005 		lp->scdev_depth = depth_to_use;
8006 	}
8007 	ncr_setup_tags (np, device);
8008 
8009 #ifdef DEBUG_NCR53C8XX
8010 	printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
8011 	       np->unit, device->id, device->lun, depth_to_use);
8012 #endif
8013 
8014 	if (spi_support_sync(device->sdev_target) &&
8015 	    !spi_initial_dv(device->sdev_target))
8016 		spi_dv_device(device);
8017 	return 0;
8018 }
8019 
8020 static int ncr53c8xx_queue_command_lck (struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
8021 {
8022      struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8023      unsigned long flags;
8024      int sts;
8025 
8026 #ifdef DEBUG_NCR53C8XX
8027 printk("ncr53c8xx_queue_command\n");
8028 #endif
8029 
8030      cmd->scsi_done     = done;
8031      cmd->host_scribble = NULL;
8032      cmd->__data_mapped = 0;
8033      cmd->__data_mapping = 0;
8034 
8035      spin_lock_irqsave(&np->smp_lock, flags);
8036 
8037      if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
8038 	  cmd->result = sts << 16;
8039 #ifdef DEBUG_NCR53C8XX
8040 printk("ncr53c8xx : command not queued - result=%d\n", sts);
8041 #endif
8042      }
8043 #ifdef DEBUG_NCR53C8XX
8044      else
8045 printk("ncr53c8xx : command successfully queued\n");
8046 #endif
8047 
8048      spin_unlock_irqrestore(&np->smp_lock, flags);
8049 
8050      if (sts != DID_OK) {
8051           unmap_scsi_data(np, cmd);
8052           done(cmd);
8053 	  sts = 0;
8054      }
8055 
8056      return sts;
8057 }
8058 
8059 static DEF_SCSI_QCMD(ncr53c8xx_queue_command)
8060 
8061 irqreturn_t ncr53c8xx_intr(int irq, void *dev_id)
8062 {
8063      unsigned long flags;
8064      struct Scsi_Host *shost = (struct Scsi_Host *)dev_id;
8065      struct host_data *host_data = (struct host_data *)shost->hostdata;
8066      struct ncb *np = host_data->ncb;
8067      struct scsi_cmnd *done_list;
8068 
8069 #ifdef DEBUG_NCR53C8XX
8070      printk("ncr53c8xx : interrupt received\n");
8071 #endif
8072 
8073      if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
8074 
8075      spin_lock_irqsave(&np->smp_lock, flags);
8076      ncr_exception(np);
8077      done_list     = np->done_list;
8078      np->done_list = NULL;
8079      spin_unlock_irqrestore(&np->smp_lock, flags);
8080 
8081      if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
8082 
8083      if (done_list)
8084 	     ncr_flush_done_cmds(done_list);
8085      return IRQ_HANDLED;
8086 }
8087 
8088 static void ncr53c8xx_timeout(struct timer_list *t)
8089 {
8090 	struct ncb *np = from_timer(np, t, timer);
8091 	unsigned long flags;
8092 	struct scsi_cmnd *done_list;
8093 
8094 	spin_lock_irqsave(&np->smp_lock, flags);
8095 	ncr_timeout(np);
8096 	done_list     = np->done_list;
8097 	np->done_list = NULL;
8098 	spin_unlock_irqrestore(&np->smp_lock, flags);
8099 
8100 	if (done_list)
8101 		ncr_flush_done_cmds(done_list);
8102 }
8103 
8104 static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd)
8105 {
8106 	struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8107 	int sts;
8108 	unsigned long flags;
8109 	struct scsi_cmnd *done_list;
8110 
8111 	/*
8112 	 * If the mid-level driver told us reset is synchronous, it seems
8113 	 * that we must call the done() callback for the involved command,
8114 	 * even if this command was not queued to the low-level driver,
8115 	 * before returning SUCCESS.
8116 	 */
8117 
8118 	spin_lock_irqsave(&np->smp_lock, flags);
8119 	sts = ncr_reset_bus(np, cmd, 1);
8120 
8121 	done_list     = np->done_list;
8122 	np->done_list = NULL;
8123 	spin_unlock_irqrestore(&np->smp_lock, flags);
8124 
8125 	ncr_flush_done_cmds(done_list);
8126 
8127 	return sts;
8128 }
8129 
8130 #if 0 /* unused and broken */
8131 static int ncr53c8xx_abort(struct scsi_cmnd *cmd)
8132 {
8133 	struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
8134 	int sts;
8135 	unsigned long flags;
8136 	struct scsi_cmnd *done_list;
8137 
8138 	printk("ncr53c8xx_abort\n");
8139 
8140 	NCR_LOCK_NCB(np, flags);
8141 
8142 	sts = ncr_abort_command(np, cmd);
8143 out:
8144 	done_list     = np->done_list;
8145 	np->done_list = NULL;
8146 	NCR_UNLOCK_NCB(np, flags);
8147 
8148 	ncr_flush_done_cmds(done_list);
8149 
8150 	return sts;
8151 }
8152 #endif
8153 
8154 
8155 /*
8156 **	Scsi command waiting list management.
8157 **
8158 **	It may happen that we cannot insert a scsi command into the start queue,
8159 **	in the following circumstances.
8160 ** 		Too few preallocated ccb(s),
8161 **		maxtags < cmd_per_lun of the Linux host control block,
8162 **		etc...
8163 **	Such scsi commands are inserted into a waiting list.
8164 **	When a scsi command complete, we try to requeue the commands of the
8165 **	waiting list.
8166 */
8167 
8168 #define next_wcmd host_scribble
8169 
8170 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd)
8171 {
8172 	struct scsi_cmnd *wcmd;
8173 
8174 #ifdef DEBUG_WAITING_LIST
8175 	printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
8176 #endif
8177 	cmd->next_wcmd = NULL;
8178 	if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
8179 	else {
8180 		while (wcmd->next_wcmd)
8181 			wcmd = (struct scsi_cmnd *) wcmd->next_wcmd;
8182 		wcmd->next_wcmd = (char *) cmd;
8183 	}
8184 }
8185 
8186 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd)
8187 {
8188 	struct scsi_cmnd **pcmd = &np->waiting_list;
8189 
8190 	while (*pcmd) {
8191 		if (cmd == *pcmd) {
8192 			if (to_remove) {
8193 				*pcmd = (struct scsi_cmnd *) cmd->next_wcmd;
8194 				cmd->next_wcmd = NULL;
8195 			}
8196 #ifdef DEBUG_WAITING_LIST
8197 	printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
8198 #endif
8199 			return cmd;
8200 		}
8201 		pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd;
8202 	}
8203 	return NULL;
8204 }
8205 
8206 static void process_waiting_list(struct ncb *np, int sts)
8207 {
8208 	struct scsi_cmnd *waiting_list, *wcmd;
8209 
8210 	waiting_list = np->waiting_list;
8211 	np->waiting_list = NULL;
8212 
8213 #ifdef DEBUG_WAITING_LIST
8214 	if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
8215 #endif
8216 	while ((wcmd = waiting_list) != NULL) {
8217 		waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd;
8218 		wcmd->next_wcmd = NULL;
8219 		if (sts == DID_OK) {
8220 #ifdef DEBUG_WAITING_LIST
8221 	printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
8222 #endif
8223 			sts = ncr_queue_command(np, wcmd);
8224 		}
8225 		if (sts != DID_OK) {
8226 #ifdef DEBUG_WAITING_LIST
8227 	printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
8228 #endif
8229 			wcmd->result = sts << 16;
8230 			ncr_queue_done_cmd(np, wcmd);
8231 		}
8232 	}
8233 }
8234 
8235 #undef next_wcmd
8236 
8237 static ssize_t show_ncr53c8xx_revision(struct device *dev,
8238 				       struct device_attribute *attr, char *buf)
8239 {
8240 	struct Scsi_Host *host = class_to_shost(dev);
8241 	struct host_data *host_data = (struct host_data *)host->hostdata;
8242 
8243 	return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id);
8244 }
8245 
8246 static struct device_attribute ncr53c8xx_revision_attr = {
8247 	.attr	= { .name = "revision", .mode = S_IRUGO, },
8248 	.show	= show_ncr53c8xx_revision,
8249 };
8250 
8251 static struct device_attribute *ncr53c8xx_host_attrs[] = {
8252 	&ncr53c8xx_revision_attr,
8253 	NULL
8254 };
8255 
8256 /*==========================================================
8257 **
8258 **	Boot command line.
8259 **
8260 **==========================================================
8261 */
8262 #ifdef	MODULE
8263 char *ncr53c8xx;	/* command line passed by insmod */
8264 module_param(ncr53c8xx, charp, 0);
8265 #endif
8266 
8267 #ifndef MODULE
8268 static int __init ncr53c8xx_setup(char *str)
8269 {
8270 	return sym53c8xx__setup(str);
8271 }
8272 
8273 __setup("ncr53c8xx=", ncr53c8xx_setup);
8274 #endif
8275 
8276 
8277 /*
8278  *	Host attach and initialisations.
8279  *
8280  *	Allocate host data and ncb structure.
8281  *	Request IO region and remap MMIO region.
8282  *	Do chip initialization.
8283  *	If all is OK, install interrupt handling and
8284  *	start the timer daemon.
8285  */
8286 struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt,
8287 					int unit, struct ncr_device *device)
8288 {
8289 	struct host_data *host_data;
8290 	struct ncb *np = NULL;
8291 	struct Scsi_Host *instance = NULL;
8292 	u_long flags = 0;
8293 	int i;
8294 
8295 	if (!tpnt->name)
8296 		tpnt->name	= SCSI_NCR_DRIVER_NAME;
8297 	if (!tpnt->shost_attrs)
8298 		tpnt->shost_attrs = ncr53c8xx_host_attrs;
8299 
8300 	tpnt->queuecommand	= ncr53c8xx_queue_command;
8301 	tpnt->slave_configure	= ncr53c8xx_slave_configure;
8302 	tpnt->slave_alloc	= ncr53c8xx_slave_alloc;
8303 	tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
8304 	tpnt->can_queue		= SCSI_NCR_CAN_QUEUE;
8305 	tpnt->this_id		= 7;
8306 	tpnt->sg_tablesize	= SCSI_NCR_SG_TABLESIZE;
8307 	tpnt->cmd_per_lun	= SCSI_NCR_CMD_PER_LUN;
8308 
8309 	if (device->differential)
8310 		driver_setup.diff_support = device->differential;
8311 
8312 	printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n",
8313 		unit, device->chip.revision_id, device->slot.irq);
8314 
8315 	instance = scsi_host_alloc(tpnt, sizeof(*host_data));
8316 	if (!instance)
8317 	        goto attach_error;
8318 	host_data = (struct host_data *) instance->hostdata;
8319 
8320 	np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
8321 	if (!np)
8322 		goto attach_error;
8323 	spin_lock_init(&np->smp_lock);
8324 	np->dev = device->dev;
8325 	np->p_ncb = vtobus(np);
8326 	host_data->ncb = np;
8327 
8328 	np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB");
8329 	if (!np->ccb)
8330 		goto attach_error;
8331 
8332 	/* Store input information in the host data structure.  */
8333 	np->unit	= unit;
8334 	np->verbose	= driver_setup.verbose;
8335 	sprintf(np->inst_name, "ncr53c720-%d", np->unit);
8336 	np->revision_id	= device->chip.revision_id;
8337 	np->features	= device->chip.features;
8338 	np->clock_divn	= device->chip.nr_divisor;
8339 	np->maxoffs	= device->chip.offset_max;
8340 	np->maxburst	= device->chip.burst_max;
8341 	np->myaddr	= device->host_id;
8342 
8343 	/* Allocate SCRIPTS areas.  */
8344 	np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT");
8345 	if (!np->script0)
8346 		goto attach_error;
8347 	np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
8348 	if (!np->scripth0)
8349 		goto attach_error;
8350 
8351 	timer_setup(&np->timer, ncr53c8xx_timeout, 0);
8352 
8353 	/* Try to map the controller chip to virtual and physical memory. */
8354 
8355 	np->paddr	= device->slot.base;
8356 	np->paddr2	= (np->features & FE_RAM) ? device->slot.base_2 : 0;
8357 
8358 	if (device->slot.base_v)
8359 		np->vaddr = device->slot.base_v;
8360 	else
8361 		np->vaddr = ioremap(device->slot.base_c, 128);
8362 
8363 	if (!np->vaddr) {
8364 		printk(KERN_ERR
8365 			"%s: can't map memory mapped IO region\n",ncr_name(np));
8366 		goto attach_error;
8367 	} else {
8368 		if (bootverbose > 1)
8369 			printk(KERN_INFO
8370 				"%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
8371 	}
8372 
8373 	/* Make the controller's registers available.  Now the INB INW INL
8374 	 * OUTB OUTW OUTL macros can be used safely.
8375 	 */
8376 
8377 	np->reg = (struct ncr_reg __iomem *)np->vaddr;
8378 
8379 	/* Do chip dependent initialization.  */
8380 	ncr_prepare_setting(np);
8381 
8382 	if (np->paddr2 && sizeof(struct script) > 4096) {
8383 		np->paddr2 = 0;
8384 		printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
8385 			ncr_name(np));
8386 	}
8387 
8388 	instance->max_channel	= 0;
8389 	instance->this_id       = np->myaddr;
8390 	instance->max_id	= np->maxwide ? 16 : 8;
8391 	instance->max_lun	= SCSI_NCR_MAX_LUN;
8392 	instance->base		= (unsigned long) np->reg;
8393 	instance->irq		= device->slot.irq;
8394 	instance->unique_id	= device->slot.base;
8395 	instance->dma_channel	= 0;
8396 	instance->cmd_per_lun	= MAX_TAGS;
8397 	instance->can_queue	= (MAX_START-4);
8398 	/* This can happen if you forget to call ncr53c8xx_init from
8399 	 * your module_init */
8400 	BUG_ON(!ncr53c8xx_transport_template);
8401 	instance->transportt	= ncr53c8xx_transport_template;
8402 
8403 	/* Patch script to physical addresses */
8404 	ncr_script_fill(&script0, &scripth0);
8405 
8406 	np->scripth	= np->scripth0;
8407 	np->p_scripth	= vtobus(np->scripth);
8408 	np->p_script	= (np->paddr2) ?  np->paddr2 : vtobus(np->script0);
8409 
8410 	ncr_script_copy_and_bind(np, (ncrcmd *) &script0,
8411 			(ncrcmd *) np->script0, sizeof(struct script));
8412 	ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0,
8413 			(ncrcmd *) np->scripth0, sizeof(struct scripth));
8414 	np->ccb->p_ccb	= vtobus (np->ccb);
8415 
8416 	/* Patch the script for LED support.  */
8417 
8418 	if (np->features & FE_LED0) {
8419 		np->script0->idle[0]  =
8420 				cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR,  0x01));
8421 		np->script0->reselected[0] =
8422 				cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8423 		np->script0->start[0] =
8424 				cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
8425 	}
8426 
8427 	/*
8428 	 * Look for the target control block of this nexus.
8429 	 * For i = 0 to 3
8430 	 *   JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
8431 	 */
8432 	for (i = 0 ; i < 4 ; i++) {
8433 		np->jump_tcb[i].l_cmd   =
8434 				cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
8435 		np->jump_tcb[i].l_paddr =
8436 				cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
8437 	}
8438 
8439 	ncr_chip_reset(np, 100);
8440 
8441 	/* Now check the cache handling of the chipset.  */
8442 
8443 	if (ncr_snooptest(np)) {
8444 		printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
8445 		goto attach_error;
8446 	}
8447 
8448 	/* Install the interrupt handler.  */
8449 	np->irq = device->slot.irq;
8450 
8451 	/* Initialize the fixed part of the default ccb.  */
8452 	ncr_init_ccb(np, np->ccb);
8453 
8454 	/*
8455 	 * After SCSI devices have been opened, we cannot reset the bus
8456 	 * safely, so we do it here.  Interrupt handler does the real work.
8457 	 * Process the reset exception if interrupts are not enabled yet.
8458 	 * Then enable disconnects.
8459 	 */
8460 	spin_lock_irqsave(&np->smp_lock, flags);
8461 	if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
8462 		printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
8463 
8464 		spin_unlock_irqrestore(&np->smp_lock, flags);
8465 		goto attach_error;
8466 	}
8467 	ncr_exception(np);
8468 
8469 	np->disc = 1;
8470 
8471 	/*
8472 	 * The middle-level SCSI driver does not wait for devices to settle.
8473 	 * Wait synchronously if more than 2 seconds.
8474 	 */
8475 	if (driver_setup.settle_delay > 2) {
8476 		printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
8477 			ncr_name(np), driver_setup.settle_delay);
8478 		mdelay(1000 * driver_setup.settle_delay);
8479 	}
8480 
8481 	/* start the timeout daemon */
8482 	np->lasttime=0;
8483 	ncr_timeout (np);
8484 
8485 	/* use SIMPLE TAG messages by default */
8486 #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
8487 	np->order = SIMPLE_QUEUE_TAG;
8488 #endif
8489 
8490 	spin_unlock_irqrestore(&np->smp_lock, flags);
8491 
8492 	return instance;
8493 
8494  attach_error:
8495 	if (!instance)
8496 		return NULL;
8497 	printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
8498 	if (!np)
8499 		goto unregister;
8500 	if (np->scripth0)
8501 		m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
8502 	if (np->script0)
8503 		m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
8504 	if (np->ccb)
8505 		m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
8506 	m_free_dma(np, sizeof(struct ncb), "NCB");
8507 	host_data->ncb = NULL;
8508 
8509  unregister:
8510 	scsi_host_put(instance);
8511 
8512 	return NULL;
8513 }
8514 
8515 
8516 void ncr53c8xx_release(struct Scsi_Host *host)
8517 {
8518 	struct host_data *host_data = shost_priv(host);
8519 #ifdef DEBUG_NCR53C8XX
8520 	printk("ncr53c8xx: release\n");
8521 #endif
8522 	if (host_data->ncb)
8523 		ncr_detach(host_data->ncb);
8524 	scsi_host_put(host);
8525 }
8526 
8527 static void ncr53c8xx_set_period(struct scsi_target *starget, int period)
8528 {
8529 	struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8530 	struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8531 	struct tcb *tp = &np->target[starget->id];
8532 
8533 	if (period > np->maxsync)
8534 		period = np->maxsync;
8535 	else if (period < np->minsync)
8536 		period = np->minsync;
8537 
8538 	tp->usrsync = period;
8539 
8540 	ncr_negotiate(np, tp);
8541 }
8542 
8543 static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset)
8544 {
8545 	struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8546 	struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8547 	struct tcb *tp = &np->target[starget->id];
8548 
8549 	if (offset > np->maxoffs)
8550 		offset = np->maxoffs;
8551 	else if (offset < 0)
8552 		offset = 0;
8553 
8554 	tp->maxoffs = offset;
8555 
8556 	ncr_negotiate(np, tp);
8557 }
8558 
8559 static void ncr53c8xx_set_width(struct scsi_target *starget, int width)
8560 {
8561 	struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
8562 	struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8563 	struct tcb *tp = &np->target[starget->id];
8564 
8565 	if (width > np->maxwide)
8566 		width = np->maxwide;
8567 	else if (width < 0)
8568 		width = 0;
8569 
8570 	tp->usrwide = width;
8571 
8572 	ncr_negotiate(np, tp);
8573 }
8574 
8575 static void ncr53c8xx_get_signalling(struct Scsi_Host *shost)
8576 {
8577 	struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
8578 	enum spi_signal_type type;
8579 
8580 	switch (np->scsi_mode) {
8581 	case SMODE_SE:
8582 		type = SPI_SIGNAL_SE;
8583 		break;
8584 	case SMODE_HVD:
8585 		type = SPI_SIGNAL_HVD;
8586 		break;
8587 	default:
8588 		type = SPI_SIGNAL_UNKNOWN;
8589 		break;
8590 	}
8591 	spi_signalling(shost) = type;
8592 }
8593 
8594 static struct spi_function_template ncr53c8xx_transport_functions =  {
8595 	.set_period	= ncr53c8xx_set_period,
8596 	.show_period	= 1,
8597 	.set_offset	= ncr53c8xx_set_offset,
8598 	.show_offset	= 1,
8599 	.set_width	= ncr53c8xx_set_width,
8600 	.show_width	= 1,
8601 	.get_signalling	= ncr53c8xx_get_signalling,
8602 };
8603 
8604 int __init ncr53c8xx_init(void)
8605 {
8606 	ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions);
8607 	if (!ncr53c8xx_transport_template)
8608 		return -ENODEV;
8609 	return 0;
8610 }
8611 
8612 void ncr53c8xx_exit(void)
8613 {
8614 	spi_release_transport(ncr53c8xx_transport_template);
8615 }
8616