1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Marvell 88SE64xx/88SE94xx main function 4 * 5 * Copyright 2007 Red Hat, Inc. 6 * Copyright 2008 Marvell. <kewei@marvell.com> 7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com> 8 */ 9 10 #include "mv_sas.h" 11 12 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag) 13 { 14 if (task->lldd_task) { 15 struct mvs_slot_info *slot; 16 slot = task->lldd_task; 17 *tag = slot->slot_tag; 18 return 1; 19 } 20 return 0; 21 } 22 23 static void mvs_tag_clear(struct mvs_info *mvi, u32 tag) 24 { 25 void *bitmap = mvi->rsvd_tags; 26 clear_bit(tag, bitmap); 27 } 28 29 static void mvs_tag_free(struct mvs_info *mvi, u32 tag) 30 { 31 if (tag >= MVS_RSVD_SLOTS) 32 return; 33 34 mvs_tag_clear(mvi, tag); 35 } 36 37 static void mvs_tag_set(struct mvs_info *mvi, unsigned int tag) 38 { 39 void *bitmap = mvi->rsvd_tags; 40 set_bit(tag, bitmap); 41 } 42 43 static int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out) 44 { 45 unsigned int index, tag; 46 void *bitmap = mvi->rsvd_tags; 47 48 index = find_first_zero_bit(bitmap, MVS_RSVD_SLOTS); 49 tag = index; 50 if (tag >= MVS_RSVD_SLOTS) 51 return -SAS_QUEUE_FULL; 52 mvs_tag_set(mvi, tag); 53 *tag_out = tag; 54 return 0; 55 } 56 57 static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev) 58 { 59 unsigned long i = 0, j = 0, hi = 0; 60 struct sas_ha_struct *sha = dev->port->ha; 61 struct mvs_info *mvi = NULL; 62 struct asd_sas_phy *phy; 63 64 while (sha->sas_port[i]) { 65 if (sha->sas_port[i] == dev->port) { 66 spin_lock(&sha->sas_port[i]->phy_list_lock); 67 phy = container_of(sha->sas_port[i]->phy_list.next, 68 struct asd_sas_phy, port_phy_el); 69 spin_unlock(&sha->sas_port[i]->phy_list_lock); 70 j = 0; 71 while (sha->sas_phy[j]) { 72 if (sha->sas_phy[j] == phy) 73 break; 74 j++; 75 } 76 break; 77 } 78 i++; 79 } 80 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 81 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 82 83 return mvi; 84 85 } 86 87 static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno) 88 { 89 unsigned long i = 0, j = 0, n = 0, num = 0; 90 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 91 struct mvs_info *mvi = mvi_dev->mvi_info; 92 struct sas_ha_struct *sha = dev->port->ha; 93 94 while (sha->sas_port[i]) { 95 if (sha->sas_port[i] == dev->port) { 96 struct asd_sas_phy *phy; 97 98 spin_lock(&sha->sas_port[i]->phy_list_lock); 99 list_for_each_entry(phy, 100 &sha->sas_port[i]->phy_list, port_phy_el) { 101 j = 0; 102 while (sha->sas_phy[j]) { 103 if (sha->sas_phy[j] == phy) 104 break; 105 j++; 106 } 107 phyno[n] = (j >= mvi->chip->n_phy) ? 108 (j - mvi->chip->n_phy) : j; 109 num++; 110 n++; 111 } 112 spin_unlock(&sha->sas_port[i]->phy_list_lock); 113 break; 114 } 115 i++; 116 } 117 return num; 118 } 119 120 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, 121 u8 reg_set) 122 { 123 u32 dev_no; 124 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) { 125 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED) 126 continue; 127 128 if (mvi->devices[dev_no].taskfileset == reg_set) 129 return &mvi->devices[dev_no]; 130 } 131 return NULL; 132 } 133 134 static inline void mvs_free_reg_set(struct mvs_info *mvi, 135 struct mvs_device *dev) 136 { 137 if (!dev) { 138 mv_printk("device has been free.\n"); 139 return; 140 } 141 if (dev->taskfileset == MVS_ID_NOT_MAPPED) 142 return; 143 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset); 144 } 145 146 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi, 147 struct mvs_device *dev) 148 { 149 if (dev->taskfileset != MVS_ID_NOT_MAPPED) 150 return 0; 151 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset); 152 } 153 154 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard) 155 { 156 u32 no; 157 for_each_phy(phy_mask, phy_mask, no) { 158 if (!(phy_mask & 1)) 159 continue; 160 MVS_CHIP_DISP->phy_reset(mvi, no, hard); 161 } 162 } 163 164 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, 165 void *funcdata) 166 { 167 int rc = 0, phy_id = sas_phy->id; 168 u32 tmp, i = 0, hi; 169 struct sas_ha_struct *sha = sas_phy->ha; 170 struct mvs_info *mvi = NULL; 171 172 while (sha->sas_phy[i]) { 173 if (sha->sas_phy[i] == sas_phy) 174 break; 175 i++; 176 } 177 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 178 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 179 180 switch (func) { 181 case PHY_FUNC_SET_LINK_RATE: 182 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata); 183 break; 184 185 case PHY_FUNC_HARD_RESET: 186 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id); 187 if (tmp & PHY_RST_HARD) 188 break; 189 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET); 190 break; 191 192 case PHY_FUNC_LINK_RESET: 193 MVS_CHIP_DISP->phy_enable(mvi, phy_id); 194 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET); 195 break; 196 197 case PHY_FUNC_DISABLE: 198 MVS_CHIP_DISP->phy_disable(mvi, phy_id); 199 break; 200 case PHY_FUNC_RELEASE_SPINUP_HOLD: 201 default: 202 rc = -ENOSYS; 203 } 204 msleep(200); 205 return rc; 206 } 207 208 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo, 209 u32 off_hi, u64 sas_addr) 210 { 211 u32 lo = (u32)sas_addr; 212 u32 hi = (u32)(sas_addr>>32); 213 214 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo); 215 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo); 216 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi); 217 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); 218 } 219 220 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags) 221 { 222 struct mvs_phy *phy = &mvi->phy[i]; 223 struct asd_sas_phy *sas_phy = &phy->sas_phy; 224 225 if (!phy->phy_attached) 226 return; 227 228 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK) 229 && phy->phy_type & PORT_TYPE_SAS) { 230 return; 231 } 232 233 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags); 234 235 if (sas_phy->phy) { 236 struct sas_phy *sphy = sas_phy->phy; 237 238 sphy->negotiated_linkrate = sas_phy->linkrate; 239 sphy->minimum_linkrate = phy->minimum_linkrate; 240 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; 241 sphy->maximum_linkrate = phy->maximum_linkrate; 242 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate(); 243 } 244 245 if (phy->phy_type & PORT_TYPE_SAS) { 246 struct sas_identify_frame *id; 247 248 id = (struct sas_identify_frame *)phy->frame_rcvd; 249 id->dev_type = phy->identify.device_type; 250 id->initiator_bits = SAS_PROTOCOL_ALL; 251 id->target_bits = phy->identify.target_port_protocols; 252 253 /* direct attached SAS device */ 254 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 255 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 256 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00); 257 } 258 } else if (phy->phy_type & PORT_TYPE_SATA) { 259 /*Nothing*/ 260 } 261 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); 262 263 sas_phy->frame_rcvd_size = phy->frame_rcvd_size; 264 265 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags); 266 } 267 268 void mvs_scan_start(struct Scsi_Host *shost) 269 { 270 int i, j; 271 unsigned short core_nr; 272 struct mvs_info *mvi; 273 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 274 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 275 276 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; 277 278 for (j = 0; j < core_nr; j++) { 279 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; 280 for (i = 0; i < mvi->chip->n_phy; ++i) 281 mvs_bytes_dmaed(mvi, i, GFP_KERNEL); 282 } 283 mvs_prv->scan_finished = 1; 284 } 285 286 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time) 287 { 288 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 289 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 290 291 if (mvs_prv->scan_finished == 0) 292 return 0; 293 294 sas_drain_work(sha); 295 return 1; 296 } 297 298 static int mvs_task_prep_smp(struct mvs_info *mvi, 299 struct mvs_task_exec_info *tei) 300 { 301 int elem, rc, i; 302 struct sas_ha_struct *sha = mvi->sas; 303 struct sas_task *task = tei->task; 304 struct mvs_cmd_hdr *hdr = tei->hdr; 305 struct domain_device *dev = task->dev; 306 struct asd_sas_port *sas_port = dev->port; 307 struct sas_phy *sphy = dev->phy; 308 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number]; 309 struct scatterlist *sg_req, *sg_resp; 310 u32 req_len, resp_len, tag = tei->tag; 311 void *buf_tmp; 312 u8 *buf_oaf; 313 dma_addr_t buf_tmp_dma; 314 void *buf_prd; 315 struct mvs_slot_info *slot = &mvi->slot_info[tag]; 316 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 317 318 /* 319 * DMA-map SMP request, response buffers 320 */ 321 sg_req = &task->smp_task.smp_req; 322 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE); 323 if (!elem) 324 return -ENOMEM; 325 req_len = sg_dma_len(sg_req); 326 327 sg_resp = &task->smp_task.smp_resp; 328 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE); 329 if (!elem) { 330 rc = -ENOMEM; 331 goto err_out; 332 } 333 resp_len = SB_RFB_MAX; 334 335 /* must be in dwords */ 336 if ((req_len & 0x3) || (resp_len & 0x3)) { 337 rc = -EINVAL; 338 goto err_out_2; 339 } 340 341 /* 342 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 343 */ 344 345 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */ 346 buf_tmp = slot->buf; 347 buf_tmp_dma = slot->buf_dma; 348 349 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req)); 350 351 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 352 buf_oaf = buf_tmp; 353 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 354 355 buf_tmp += MVS_OAF_SZ; 356 buf_tmp_dma += MVS_OAF_SZ; 357 358 /* region 3: PRD table *********************************** */ 359 buf_prd = buf_tmp; 360 if (tei->n_elem) 361 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 362 else 363 hdr->prd_tbl = 0; 364 365 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 366 buf_tmp += i; 367 buf_tmp_dma += i; 368 369 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 370 slot->response = buf_tmp; 371 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 372 if (mvi->flags & MVF_FLAG_SOC) 373 hdr->reserved[0] = 0; 374 375 /* 376 * Fill in TX ring and command slot header 377 */ 378 slot->tx = mvi->tx_prod; 379 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) | 380 TXQ_MODE_I | tag | 381 (MVS_PHY_ID << TXQ_PHY_SHIFT)); 382 383 hdr->flags |= flags; 384 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4)); 385 hdr->tags = cpu_to_le32(tag); 386 hdr->data_len = 0; 387 388 /* generate open address frame hdr (first 12 bytes) */ 389 /* initiator, SMP, ftype 1h */ 390 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01; 391 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 392 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */ 393 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 394 395 /* fill in PRD (scatter/gather) table, if any */ 396 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 397 398 return 0; 399 400 err_out_2: 401 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1, 402 DMA_FROM_DEVICE); 403 err_out: 404 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1, 405 DMA_TO_DEVICE); 406 return rc; 407 } 408 409 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag) 410 { 411 struct ata_queued_cmd *qc = task->uldd_task; 412 413 if (qc) { 414 if (qc->tf.command == ATA_CMD_FPDMA_WRITE || 415 qc->tf.command == ATA_CMD_FPDMA_READ || 416 qc->tf.command == ATA_CMD_FPDMA_RECV || 417 qc->tf.command == ATA_CMD_FPDMA_SEND || 418 qc->tf.command == ATA_CMD_NCQ_NON_DATA) { 419 *tag = qc->tag; 420 return 1; 421 } 422 } 423 424 return 0; 425 } 426 427 static int mvs_task_prep_ata(struct mvs_info *mvi, 428 struct mvs_task_exec_info *tei) 429 { 430 struct sas_task *task = tei->task; 431 struct domain_device *dev = task->dev; 432 struct mvs_device *mvi_dev = dev->lldd_dev; 433 struct mvs_cmd_hdr *hdr = tei->hdr; 434 struct asd_sas_port *sas_port = dev->port; 435 struct mvs_slot_info *slot; 436 void *buf_prd; 437 u32 tag = tei->tag, hdr_tag; 438 u32 flags, del_q; 439 void *buf_tmp; 440 u8 *buf_cmd, *buf_oaf; 441 dma_addr_t buf_tmp_dma; 442 u32 i, req_len, resp_len; 443 const u32 max_resp_len = SB_RFB_MAX; 444 445 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) { 446 mv_dprintk("Have not enough regiset for dev %d.\n", 447 mvi_dev->device_id); 448 return -EBUSY; 449 } 450 slot = &mvi->slot_info[tag]; 451 slot->tx = mvi->tx_prod; 452 del_q = TXQ_MODE_I | tag | 453 (TXQ_CMD_STP << TXQ_CMD_SHIFT) | 454 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) | 455 (mvi_dev->taskfileset << TXQ_SRS_SHIFT); 456 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q); 457 458 if (task->data_dir == DMA_FROM_DEVICE) 459 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT); 460 else 461 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 462 463 if (task->ata_task.use_ncq) 464 flags |= MCH_FPDMA; 465 if (dev->sata_dev.class == ATA_DEV_ATAPI) { 466 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI) 467 flags |= MCH_ATAPI; 468 } 469 470 hdr->flags = cpu_to_le32(flags); 471 472 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag)) 473 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 474 else 475 hdr_tag = tag; 476 477 hdr->tags = cpu_to_le32(hdr_tag); 478 479 hdr->data_len = cpu_to_le32(task->total_xfer_len); 480 481 /* 482 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 483 */ 484 485 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */ 486 buf_cmd = buf_tmp = slot->buf; 487 buf_tmp_dma = slot->buf_dma; 488 489 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 490 491 buf_tmp += MVS_ATA_CMD_SZ; 492 buf_tmp_dma += MVS_ATA_CMD_SZ; 493 494 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 495 /* used for STP. unused for SATA? */ 496 buf_oaf = buf_tmp; 497 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 498 499 buf_tmp += MVS_OAF_SZ; 500 buf_tmp_dma += MVS_OAF_SZ; 501 502 /* region 3: PRD table ********************************************* */ 503 buf_prd = buf_tmp; 504 505 if (tei->n_elem) 506 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 507 else 508 hdr->prd_tbl = 0; 509 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count(); 510 511 buf_tmp += i; 512 buf_tmp_dma += i; 513 514 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 515 slot->response = buf_tmp; 516 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 517 if (mvi->flags & MVF_FLAG_SOC) 518 hdr->reserved[0] = 0; 519 520 req_len = sizeof(struct host_to_dev_fis); 521 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ - 522 sizeof(struct mvs_err_info) - i; 523 524 /* request, response lengths */ 525 resp_len = min(resp_len, max_resp_len); 526 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 527 528 if (likely(!task->ata_task.device_control_reg_update)) 529 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */ 530 /* fill in command FIS and ATAPI CDB */ 531 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); 532 if (dev->sata_dev.class == ATA_DEV_ATAPI) 533 memcpy(buf_cmd + STP_ATAPI_CMD, 534 task->ata_task.atapi_packet, 16); 535 536 /* generate open address frame hdr (first 12 bytes) */ 537 /* initiator, STP, ftype 1h */ 538 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1; 539 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 540 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 541 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 542 543 /* fill in PRD (scatter/gather) table, if any */ 544 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 545 546 if (task->data_dir == DMA_FROM_DEVICE) 547 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask, 548 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd); 549 550 return 0; 551 } 552 553 static int mvs_task_prep_ssp(struct mvs_info *mvi, 554 struct mvs_task_exec_info *tei, int is_tmf, 555 struct sas_tmf_task *tmf) 556 { 557 struct sas_task *task = tei->task; 558 struct mvs_cmd_hdr *hdr = tei->hdr; 559 struct mvs_port *port = tei->port; 560 struct domain_device *dev = task->dev; 561 struct mvs_device *mvi_dev = dev->lldd_dev; 562 struct asd_sas_port *sas_port = dev->port; 563 struct mvs_slot_info *slot; 564 void *buf_prd; 565 struct ssp_frame_hdr *ssp_hdr; 566 void *buf_tmp; 567 u8 *buf_cmd, *buf_oaf; 568 dma_addr_t buf_tmp_dma; 569 u32 flags; 570 u32 resp_len, req_len, i, tag = tei->tag; 571 const u32 max_resp_len = SB_RFB_MAX; 572 u32 phy_mask; 573 574 slot = &mvi->slot_info[tag]; 575 576 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap : 577 sas_port->phy_mask) & TXQ_PHY_MASK; 578 579 slot->tx = mvi->tx_prod; 580 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag | 581 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) | 582 (phy_mask << TXQ_PHY_SHIFT)); 583 584 flags = MCH_RETRY; 585 if (is_tmf) 586 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT); 587 else 588 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT); 589 590 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT)); 591 hdr->tags = cpu_to_le32(tag); 592 hdr->data_len = cpu_to_le32(task->total_xfer_len); 593 594 /* 595 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 596 */ 597 598 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */ 599 buf_cmd = buf_tmp = slot->buf; 600 buf_tmp_dma = slot->buf_dma; 601 602 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 603 604 buf_tmp += MVS_SSP_CMD_SZ; 605 buf_tmp_dma += MVS_SSP_CMD_SZ; 606 607 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 608 buf_oaf = buf_tmp; 609 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 610 611 buf_tmp += MVS_OAF_SZ; 612 buf_tmp_dma += MVS_OAF_SZ; 613 614 /* region 3: PRD table ********************************************* */ 615 buf_prd = buf_tmp; 616 if (tei->n_elem) 617 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 618 else 619 hdr->prd_tbl = 0; 620 621 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 622 buf_tmp += i; 623 buf_tmp_dma += i; 624 625 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 626 slot->response = buf_tmp; 627 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 628 if (mvi->flags & MVF_FLAG_SOC) 629 hdr->reserved[0] = 0; 630 631 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ - 632 sizeof(struct mvs_err_info) - i; 633 resp_len = min(resp_len, max_resp_len); 634 635 req_len = sizeof(struct ssp_frame_hdr) + 28; 636 637 /* request, response lengths */ 638 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 639 640 /* generate open address frame hdr (first 12 bytes) */ 641 /* initiator, SSP, ftype 1h */ 642 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1; 643 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 644 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 645 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 646 647 /* fill in SSP frame header (Command Table.SSP frame header) */ 648 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd; 649 650 if (is_tmf) 651 ssp_hdr->frame_type = SSP_TASK; 652 else 653 ssp_hdr->frame_type = SSP_COMMAND; 654 655 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr, 656 HASHED_SAS_ADDR_SIZE); 657 memcpy(ssp_hdr->hashed_src_addr, 658 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); 659 ssp_hdr->tag = cpu_to_be16(tag); 660 661 /* fill in IU for TASK and Command Frame */ 662 buf_cmd += sizeof(*ssp_hdr); 663 memcpy(buf_cmd, &task->ssp_task.LUN, 8); 664 665 if (ssp_hdr->frame_type != SSP_TASK) { 666 buf_cmd[9] = task->ssp_task.task_attr | 667 (task->ssp_task.task_prio << 3); 668 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd, 669 task->ssp_task.cmd->cmd_len); 670 } else{ 671 buf_cmd[10] = tmf->tmf; 672 switch (tmf->tmf) { 673 case TMF_ABORT_TASK: 674 case TMF_QUERY_TASK: 675 buf_cmd[12] = 676 (tmf->tag_of_task_to_be_managed >> 8) & 0xff; 677 buf_cmd[13] = 678 tmf->tag_of_task_to_be_managed & 0xff; 679 break; 680 default: 681 break; 682 } 683 } 684 /* fill in PRD (scatter/gather) table, if any */ 685 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 686 return 0; 687 } 688 689 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED))) 690 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf, 691 struct sas_tmf_task *tmf, int *pass) 692 { 693 struct domain_device *dev = task->dev; 694 struct mvs_device *mvi_dev = dev->lldd_dev; 695 struct mvs_task_exec_info tei; 696 struct mvs_slot_info *slot; 697 u32 tag = 0xdeadbeef, n_elem = 0; 698 struct request *rq; 699 int rc = 0; 700 701 if (!dev->port) { 702 struct task_status_struct *tsm = &task->task_status; 703 704 tsm->resp = SAS_TASK_UNDELIVERED; 705 tsm->stat = SAS_PHY_DOWN; 706 /* 707 * libsas will use dev->port, should 708 * not call task_done for sata 709 */ 710 if (dev->dev_type != SAS_SATA_DEV) 711 task->task_done(task); 712 return rc; 713 } 714 715 if (DEV_IS_GONE(mvi_dev)) { 716 if (mvi_dev) 717 mv_dprintk("device %d not ready.\n", 718 mvi_dev->device_id); 719 else 720 mv_dprintk("device %016llx not ready.\n", 721 SAS_ADDR(dev->sas_addr)); 722 723 rc = SAS_PHY_DOWN; 724 return rc; 725 } 726 tei.port = dev->port->lldd_port; 727 if (tei.port && !tei.port->port_attached && !tmf) { 728 if (sas_protocol_ata(task->task_proto)) { 729 struct task_status_struct *ts = &task->task_status; 730 mv_dprintk("SATA/STP port %d does not attach" 731 "device.\n", dev->port->id); 732 ts->resp = SAS_TASK_COMPLETE; 733 ts->stat = SAS_PHY_DOWN; 734 735 task->task_done(task); 736 737 } else { 738 struct task_status_struct *ts = &task->task_status; 739 mv_dprintk("SAS port %d does not attach" 740 "device.\n", dev->port->id); 741 ts->resp = SAS_TASK_UNDELIVERED; 742 ts->stat = SAS_PHY_DOWN; 743 task->task_done(task); 744 } 745 return rc; 746 } 747 748 if (!sas_protocol_ata(task->task_proto)) { 749 if (task->num_scatter) { 750 n_elem = dma_map_sg(mvi->dev, 751 task->scatter, 752 task->num_scatter, 753 task->data_dir); 754 if (!n_elem) { 755 rc = -ENOMEM; 756 goto prep_out; 757 } 758 } 759 } else { 760 n_elem = task->num_scatter; 761 } 762 763 rq = sas_task_find_rq(task); 764 if (rq) { 765 tag = rq->tag + MVS_RSVD_SLOTS; 766 } else { 767 rc = mvs_tag_alloc(mvi, &tag); 768 if (rc) 769 goto err_out; 770 } 771 772 slot = &mvi->slot_info[tag]; 773 774 task->lldd_task = NULL; 775 slot->n_elem = n_elem; 776 slot->slot_tag = tag; 777 778 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma); 779 if (!slot->buf) { 780 rc = -ENOMEM; 781 goto err_out_tag; 782 } 783 784 tei.task = task; 785 tei.hdr = &mvi->slot[tag]; 786 tei.tag = tag; 787 tei.n_elem = n_elem; 788 switch (task->task_proto) { 789 case SAS_PROTOCOL_SMP: 790 rc = mvs_task_prep_smp(mvi, &tei); 791 break; 792 case SAS_PROTOCOL_SSP: 793 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf); 794 break; 795 case SAS_PROTOCOL_SATA: 796 case SAS_PROTOCOL_STP: 797 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 798 rc = mvs_task_prep_ata(mvi, &tei); 799 break; 800 default: 801 dev_printk(KERN_ERR, mvi->dev, 802 "unknown sas_task proto: 0x%x\n", 803 task->task_proto); 804 rc = -EINVAL; 805 break; 806 } 807 808 if (rc) { 809 mv_dprintk("rc is %x\n", rc); 810 goto err_out_slot_buf; 811 } 812 slot->task = task; 813 slot->port = tei.port; 814 task->lldd_task = slot; 815 list_add_tail(&slot->entry, &tei.port->list); 816 817 mvi_dev->running_req++; 818 ++(*pass); 819 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1); 820 821 return rc; 822 823 err_out_slot_buf: 824 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 825 err_out_tag: 826 mvs_tag_free(mvi, tag); 827 err_out: 828 829 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc); 830 if (!sas_protocol_ata(task->task_proto)) 831 if (n_elem) 832 dma_unmap_sg(mvi->dev, task->scatter, n_elem, 833 task->data_dir); 834 prep_out: 835 return rc; 836 } 837 838 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags) 839 { 840 struct mvs_info *mvi = NULL; 841 u32 rc = 0; 842 u32 pass = 0; 843 unsigned long flags = 0; 844 struct sas_tmf_task *tmf = task->tmf; 845 int is_tmf = !!task->tmf; 846 847 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info; 848 849 spin_lock_irqsave(&mvi->lock, flags); 850 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass); 851 if (rc) 852 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); 853 854 if (likely(pass)) 855 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) & 856 (MVS_CHIP_SLOT_SZ - 1)); 857 spin_unlock_irqrestore(&mvi->lock, flags); 858 859 return rc; 860 } 861 862 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc) 863 { 864 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 865 mvs_tag_free(mvi, slot_idx); 866 } 867 868 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task, 869 struct mvs_slot_info *slot, u32 slot_idx) 870 { 871 if (!slot) 872 return; 873 if (!slot->task) 874 return; 875 if (!sas_protocol_ata(task->task_proto)) 876 if (slot->n_elem) 877 dma_unmap_sg(mvi->dev, task->scatter, 878 slot->n_elem, task->data_dir); 879 880 switch (task->task_proto) { 881 case SAS_PROTOCOL_SMP: 882 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1, 883 DMA_FROM_DEVICE); 884 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1, 885 DMA_TO_DEVICE); 886 break; 887 888 case SAS_PROTOCOL_SATA: 889 case SAS_PROTOCOL_STP: 890 case SAS_PROTOCOL_SSP: 891 default: 892 /* do nothing */ 893 break; 894 } 895 896 if (slot->buf) { 897 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 898 slot->buf = NULL; 899 } 900 list_del_init(&slot->entry); 901 task->lldd_task = NULL; 902 slot->task = NULL; 903 slot->port = NULL; 904 slot->slot_tag = 0xFFFFFFFF; 905 mvs_slot_free(mvi, slot_idx); 906 } 907 908 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no) 909 { 910 struct mvs_phy *phy = &mvi->phy[phy_no]; 911 struct mvs_port *port = phy->port; 912 int j, no; 913 914 for_each_phy(port->wide_port_phymap, j, no) { 915 if (j & 1) { 916 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 917 PHYR_WIDE_PORT); 918 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 919 port->wide_port_phymap); 920 } else { 921 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 922 PHYR_WIDE_PORT); 923 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 924 0); 925 } 926 } 927 } 928 929 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i) 930 { 931 u32 tmp; 932 struct mvs_phy *phy = &mvi->phy[i]; 933 struct mvs_port *port = phy->port; 934 935 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i); 936 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) { 937 if (!port) 938 phy->phy_attached = 1; 939 return tmp; 940 } 941 942 if (port) { 943 if (phy->phy_type & PORT_TYPE_SAS) { 944 port->wide_port_phymap &= ~(1U << i); 945 if (!port->wide_port_phymap) 946 port->port_attached = 0; 947 mvs_update_wideport(mvi, i); 948 } else if (phy->phy_type & PORT_TYPE_SATA) 949 port->port_attached = 0; 950 phy->port = NULL; 951 phy->phy_attached = 0; 952 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); 953 } 954 return 0; 955 } 956 957 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf) 958 { 959 u32 *s = (u32 *) buf; 960 961 if (!s) 962 return NULL; 963 964 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3); 965 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 966 967 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2); 968 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 969 970 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1); 971 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 972 973 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0); 974 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 975 976 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01)) 977 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10); 978 979 return s; 980 } 981 982 static u32 mvs_is_sig_fis_received(u32 irq_status) 983 { 984 return irq_status & PHYEV_SIG_FIS; 985 } 986 987 static void mvs_sig_remove_timer(struct mvs_phy *phy) 988 { 989 if (phy->timer.function) 990 del_timer(&phy->timer); 991 phy->timer.function = NULL; 992 } 993 994 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st) 995 { 996 struct mvs_phy *phy = &mvi->phy[i]; 997 struct sas_identify_frame *id; 998 999 id = (struct sas_identify_frame *)phy->frame_rcvd; 1000 1001 if (get_st) { 1002 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i); 1003 phy->phy_status = mvs_is_phy_ready(mvi, i); 1004 } 1005 1006 if (phy->phy_status) { 1007 int oob_done = 0; 1008 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy; 1009 1010 oob_done = MVS_CHIP_DISP->oob_done(mvi, i); 1011 1012 MVS_CHIP_DISP->fix_phy_info(mvi, i, id); 1013 if (phy->phy_type & PORT_TYPE_SATA) { 1014 phy->identify.target_port_protocols = SAS_PROTOCOL_STP; 1015 if (mvs_is_sig_fis_received(phy->irq_status)) { 1016 mvs_sig_remove_timer(phy); 1017 phy->phy_attached = 1; 1018 phy->att_dev_sas_addr = 1019 i + mvi->id * mvi->chip->n_phy; 1020 if (oob_done) 1021 sas_phy->oob_mode = SATA_OOB_MODE; 1022 phy->frame_rcvd_size = 1023 sizeof(struct dev_to_host_fis); 1024 mvs_get_d2h_reg(mvi, i, id); 1025 } else { 1026 u32 tmp; 1027 dev_printk(KERN_DEBUG, mvi->dev, 1028 "Phy%d : No sig fis\n", i); 1029 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i); 1030 MVS_CHIP_DISP->write_port_irq_mask(mvi, i, 1031 tmp | PHYEV_SIG_FIS); 1032 phy->phy_attached = 0; 1033 phy->phy_type &= ~PORT_TYPE_SATA; 1034 goto out_done; 1035 } 1036 } else if (phy->phy_type & PORT_TYPE_SAS 1037 || phy->att_dev_info & PORT_SSP_INIT_MASK) { 1038 phy->phy_attached = 1; 1039 phy->identify.device_type = 1040 phy->att_dev_info & PORT_DEV_TYPE_MASK; 1041 1042 if (phy->identify.device_type == SAS_END_DEVICE) 1043 phy->identify.target_port_protocols = 1044 SAS_PROTOCOL_SSP; 1045 else if (phy->identify.device_type != SAS_PHY_UNUSED) 1046 phy->identify.target_port_protocols = 1047 SAS_PROTOCOL_SMP; 1048 if (oob_done) 1049 sas_phy->oob_mode = SAS_OOB_MODE; 1050 phy->frame_rcvd_size = 1051 sizeof(struct sas_identify_frame); 1052 } 1053 memcpy(sas_phy->attached_sas_addr, 1054 &phy->att_dev_sas_addr, SAS_ADDR_SIZE); 1055 1056 if (MVS_CHIP_DISP->phy_work_around) 1057 MVS_CHIP_DISP->phy_work_around(mvi, i); 1058 } 1059 mv_dprintk("phy %d attach dev info is %x\n", 1060 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); 1061 mv_dprintk("phy %d attach sas addr is %llx\n", 1062 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); 1063 out_done: 1064 if (get_st) 1065 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status); 1066 } 1067 1068 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock) 1069 { 1070 struct sas_ha_struct *sas_ha = sas_phy->ha; 1071 struct mvs_info *mvi = NULL; int i = 0, hi; 1072 struct mvs_phy *phy = sas_phy->lldd_phy; 1073 struct asd_sas_port *sas_port = sas_phy->port; 1074 struct mvs_port *port; 1075 unsigned long flags = 0; 1076 if (!sas_port) 1077 return; 1078 1079 while (sas_ha->sas_phy[i]) { 1080 if (sas_ha->sas_phy[i] == sas_phy) 1081 break; 1082 i++; 1083 } 1084 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; 1085 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi]; 1086 if (i >= mvi->chip->n_phy) 1087 port = &mvi->port[i - mvi->chip->n_phy]; 1088 else 1089 port = &mvi->port[i]; 1090 if (lock) 1091 spin_lock_irqsave(&mvi->lock, flags); 1092 port->port_attached = 1; 1093 phy->port = port; 1094 sas_port->lldd_port = port; 1095 if (phy->phy_type & PORT_TYPE_SAS) { 1096 port->wide_port_phymap = sas_port->phy_mask; 1097 mv_printk("set wide port phy map %x\n", sas_port->phy_mask); 1098 mvs_update_wideport(mvi, sas_phy->id); 1099 1100 /* direct attached SAS device */ 1101 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 1102 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 1103 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04); 1104 } 1105 } 1106 if (lock) 1107 spin_unlock_irqrestore(&mvi->lock, flags); 1108 } 1109 1110 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock) 1111 { 1112 struct domain_device *dev; 1113 struct mvs_phy *phy = sas_phy->lldd_phy; 1114 struct mvs_info *mvi = phy->mvi; 1115 struct asd_sas_port *port = sas_phy->port; 1116 int phy_no = 0; 1117 1118 while (phy != &mvi->phy[phy_no]) { 1119 phy_no++; 1120 if (phy_no >= MVS_MAX_PHYS) 1121 return; 1122 } 1123 list_for_each_entry(dev, &port->dev_list, dev_list_node) 1124 mvs_do_release_task(phy->mvi, phy_no, dev); 1125 1126 } 1127 1128 1129 void mvs_port_formed(struct asd_sas_phy *sas_phy) 1130 { 1131 mvs_port_notify_formed(sas_phy, 1); 1132 } 1133 1134 void mvs_port_deformed(struct asd_sas_phy *sas_phy) 1135 { 1136 mvs_port_notify_deformed(sas_phy, 1); 1137 } 1138 1139 static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi) 1140 { 1141 u32 dev; 1142 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) { 1143 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) { 1144 mvi->devices[dev].device_id = dev; 1145 return &mvi->devices[dev]; 1146 } 1147 } 1148 1149 if (dev == MVS_MAX_DEVICES) 1150 mv_printk("max support %d devices, ignore ..\n", 1151 MVS_MAX_DEVICES); 1152 1153 return NULL; 1154 } 1155 1156 static void mvs_free_dev(struct mvs_device *mvi_dev) 1157 { 1158 u32 id = mvi_dev->device_id; 1159 memset(mvi_dev, 0, sizeof(*mvi_dev)); 1160 mvi_dev->device_id = id; 1161 mvi_dev->dev_type = SAS_PHY_UNUSED; 1162 mvi_dev->dev_status = MVS_DEV_NORMAL; 1163 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED; 1164 } 1165 1166 static int mvs_dev_found_notify(struct domain_device *dev, int lock) 1167 { 1168 unsigned long flags = 0; 1169 int res = 0; 1170 struct mvs_info *mvi = NULL; 1171 struct domain_device *parent_dev = dev->parent; 1172 struct mvs_device *mvi_device; 1173 1174 mvi = mvs_find_dev_mvi(dev); 1175 1176 if (lock) 1177 spin_lock_irqsave(&mvi->lock, flags); 1178 1179 mvi_device = mvs_alloc_dev(mvi); 1180 if (!mvi_device) { 1181 res = -1; 1182 goto found_out; 1183 } 1184 dev->lldd_dev = mvi_device; 1185 mvi_device->dev_status = MVS_DEV_NORMAL; 1186 mvi_device->dev_type = dev->dev_type; 1187 mvi_device->mvi_info = mvi; 1188 mvi_device->sas_device = dev; 1189 if (parent_dev && dev_is_expander(parent_dev->dev_type)) { 1190 int phy_id; 1191 1192 phy_id = sas_find_attached_phy_id(&parent_dev->ex_dev, dev); 1193 if (phy_id < 0) { 1194 mv_printk("Error: no attached dev:%016llx" 1195 "at ex:%016llx.\n", 1196 SAS_ADDR(dev->sas_addr), 1197 SAS_ADDR(parent_dev->sas_addr)); 1198 res = phy_id; 1199 } else { 1200 mvi_device->attached_phy = phy_id; 1201 } 1202 } 1203 1204 found_out: 1205 if (lock) 1206 spin_unlock_irqrestore(&mvi->lock, flags); 1207 return res; 1208 } 1209 1210 int mvs_dev_found(struct domain_device *dev) 1211 { 1212 return mvs_dev_found_notify(dev, 1); 1213 } 1214 1215 static void mvs_dev_gone_notify(struct domain_device *dev) 1216 { 1217 unsigned long flags = 0; 1218 struct mvs_device *mvi_dev = dev->lldd_dev; 1219 struct mvs_info *mvi; 1220 1221 if (!mvi_dev) { 1222 mv_dprintk("found dev has gone.\n"); 1223 return; 1224 } 1225 1226 mvi = mvi_dev->mvi_info; 1227 1228 spin_lock_irqsave(&mvi->lock, flags); 1229 1230 mv_dprintk("found dev[%d:%x] is gone.\n", 1231 mvi_dev->device_id, mvi_dev->dev_type); 1232 mvs_release_task(mvi, dev); 1233 mvs_free_reg_set(mvi, mvi_dev); 1234 mvs_free_dev(mvi_dev); 1235 1236 dev->lldd_dev = NULL; 1237 mvi_dev->sas_device = NULL; 1238 1239 spin_unlock_irqrestore(&mvi->lock, flags); 1240 } 1241 1242 1243 void mvs_dev_gone(struct domain_device *dev) 1244 { 1245 mvs_dev_gone_notify(dev); 1246 } 1247 1248 /* Standard mandates link reset for ATA (type 0) 1249 and hard reset for SSP (type 1) , only for RECOVERY */ 1250 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev) 1251 { 1252 int rc; 1253 struct sas_phy *phy = sas_get_local_phy(dev); 1254 int reset_type = (dev->dev_type == SAS_SATA_DEV || 1255 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; 1256 rc = sas_phy_reset(phy, reset_type); 1257 sas_put_local_phy(phy); 1258 msleep(2000); 1259 return rc; 1260 } 1261 1262 /* mandatory SAM-3 */ 1263 int mvs_lu_reset(struct domain_device *dev, u8 *lun) 1264 { 1265 unsigned long flags; 1266 int rc = TMF_RESP_FUNC_FAILED; 1267 struct mvs_device * mvi_dev = dev->lldd_dev; 1268 struct mvs_info *mvi = mvi_dev->mvi_info; 1269 1270 mvi_dev->dev_status = MVS_DEV_EH; 1271 rc = sas_lu_reset(dev, lun); 1272 if (rc == TMF_RESP_FUNC_COMPLETE) { 1273 spin_lock_irqsave(&mvi->lock, flags); 1274 mvs_release_task(mvi, dev); 1275 spin_unlock_irqrestore(&mvi->lock, flags); 1276 } 1277 /* If failed, fall-through I_T_Nexus reset */ 1278 mv_printk("%s for device[%x]:rc= %d\n", __func__, 1279 mvi_dev->device_id, rc); 1280 return rc; 1281 } 1282 1283 int mvs_I_T_nexus_reset(struct domain_device *dev) 1284 { 1285 unsigned long flags; 1286 int rc = TMF_RESP_FUNC_FAILED; 1287 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1288 struct mvs_info *mvi = mvi_dev->mvi_info; 1289 1290 if (mvi_dev->dev_status != MVS_DEV_EH) 1291 return TMF_RESP_FUNC_COMPLETE; 1292 else 1293 mvi_dev->dev_status = MVS_DEV_NORMAL; 1294 rc = mvs_debug_I_T_nexus_reset(dev); 1295 mv_printk("%s for device[%x]:rc= %d\n", 1296 __func__, mvi_dev->device_id, rc); 1297 1298 spin_lock_irqsave(&mvi->lock, flags); 1299 mvs_release_task(mvi, dev); 1300 spin_unlock_irqrestore(&mvi->lock, flags); 1301 1302 return rc; 1303 } 1304 /* optional SAM-3 */ 1305 int mvs_query_task(struct sas_task *task) 1306 { 1307 u32 tag; 1308 int rc = TMF_RESP_FUNC_FAILED; 1309 1310 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1311 struct domain_device *dev = task->dev; 1312 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1313 struct mvs_info *mvi = mvi_dev->mvi_info; 1314 1315 rc = mvs_find_tag(mvi, task, &tag); 1316 if (rc == 0) { 1317 rc = TMF_RESP_FUNC_FAILED; 1318 return rc; 1319 } 1320 1321 rc = sas_query_task(task, tag); 1322 switch (rc) { 1323 /* The task is still in Lun, release it then */ 1324 case TMF_RESP_FUNC_SUCC: 1325 /* The task is not in Lun or failed, reset the phy */ 1326 case TMF_RESP_FUNC_FAILED: 1327 case TMF_RESP_FUNC_COMPLETE: 1328 break; 1329 } 1330 } 1331 mv_printk("%s:rc= %d\n", __func__, rc); 1332 return rc; 1333 } 1334 1335 /* mandatory SAM-3, still need free task/slot info */ 1336 int mvs_abort_task(struct sas_task *task) 1337 { 1338 struct domain_device *dev = task->dev; 1339 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1340 struct mvs_info *mvi; 1341 int rc = TMF_RESP_FUNC_FAILED; 1342 unsigned long flags; 1343 u32 tag; 1344 1345 if (!mvi_dev) { 1346 mv_printk("Device has removed\n"); 1347 return TMF_RESP_FUNC_FAILED; 1348 } 1349 1350 mvi = mvi_dev->mvi_info; 1351 1352 spin_lock_irqsave(&task->task_state_lock, flags); 1353 if (task->task_state_flags & SAS_TASK_STATE_DONE) { 1354 spin_unlock_irqrestore(&task->task_state_lock, flags); 1355 rc = TMF_RESP_FUNC_COMPLETE; 1356 goto out; 1357 } 1358 spin_unlock_irqrestore(&task->task_state_lock, flags); 1359 mvi_dev->dev_status = MVS_DEV_EH; 1360 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1361 rc = mvs_find_tag(mvi, task, &tag); 1362 if (rc == 0) { 1363 mv_printk("No such tag in %s\n", __func__); 1364 rc = TMF_RESP_FUNC_FAILED; 1365 return rc; 1366 } 1367 1368 rc = sas_abort_task(task, tag); 1369 1370 /* if successful, clear the task and callback forwards.*/ 1371 if (rc == TMF_RESP_FUNC_COMPLETE) { 1372 u32 slot_no; 1373 struct mvs_slot_info *slot; 1374 1375 if (task->lldd_task) { 1376 slot = task->lldd_task; 1377 slot_no = (u32) (slot - mvi->slot_info); 1378 spin_lock_irqsave(&mvi->lock, flags); 1379 mvs_slot_complete(mvi, slot_no, 1); 1380 spin_unlock_irqrestore(&mvi->lock, flags); 1381 } 1382 } 1383 1384 } else if (task->task_proto & SAS_PROTOCOL_SATA || 1385 task->task_proto & SAS_PROTOCOL_STP) { 1386 if (SAS_SATA_DEV == dev->dev_type) { 1387 struct mvs_slot_info *slot = task->lldd_task; 1388 u32 slot_idx = (u32)(slot - mvi->slot_info); 1389 mv_dprintk("mvs_abort_task() mvi=%p task=%p " 1390 "slot=%p slot_idx=x%x\n", 1391 mvi, task, slot, slot_idx); 1392 task->task_state_flags |= SAS_TASK_STATE_ABORTED; 1393 mvs_slot_task_free(mvi, task, slot, slot_idx); 1394 rc = TMF_RESP_FUNC_COMPLETE; 1395 goto out; 1396 } 1397 1398 } 1399 out: 1400 if (rc != TMF_RESP_FUNC_COMPLETE) 1401 mv_printk("%s:rc= %d\n", __func__, rc); 1402 return rc; 1403 } 1404 1405 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task, 1406 u32 slot_idx, int err) 1407 { 1408 struct mvs_device *mvi_dev = task->dev->lldd_dev; 1409 struct task_status_struct *tstat = &task->task_status; 1410 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf; 1411 int stat = SAM_STAT_GOOD; 1412 1413 1414 resp->frame_len = sizeof(struct dev_to_host_fis); 1415 memcpy(&resp->ending_fis[0], 1416 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset), 1417 sizeof(struct dev_to_host_fis)); 1418 tstat->buf_valid_size = sizeof(*resp); 1419 if (unlikely(err)) { 1420 if (unlikely(err & CMD_ISS_STPD)) 1421 stat = SAS_OPEN_REJECT; 1422 else 1423 stat = SAS_PROTO_RESPONSE; 1424 } 1425 1426 return stat; 1427 } 1428 1429 static void mvs_set_sense(u8 *buffer, int len, int d_sense, 1430 int key, int asc, int ascq) 1431 { 1432 memset(buffer, 0, len); 1433 1434 if (d_sense) { 1435 /* Descriptor format */ 1436 if (len < 4) { 1437 mv_printk("Length %d of sense buffer too small to " 1438 "fit sense %x:%x:%x", len, key, asc, ascq); 1439 } 1440 1441 buffer[0] = 0x72; /* Response Code */ 1442 if (len > 1) 1443 buffer[1] = key; /* Sense Key */ 1444 if (len > 2) 1445 buffer[2] = asc; /* ASC */ 1446 if (len > 3) 1447 buffer[3] = ascq; /* ASCQ */ 1448 } else { 1449 if (len < 14) { 1450 mv_printk("Length %d of sense buffer too small to " 1451 "fit sense %x:%x:%x", len, key, asc, ascq); 1452 } 1453 1454 buffer[0] = 0x70; /* Response Code */ 1455 if (len > 2) 1456 buffer[2] = key; /* Sense Key */ 1457 if (len > 7) 1458 buffer[7] = 0x0a; /* Additional Sense Length */ 1459 if (len > 12) 1460 buffer[12] = asc; /* ASC */ 1461 if (len > 13) 1462 buffer[13] = ascq; /* ASCQ */ 1463 } 1464 1465 return; 1466 } 1467 1468 static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu, 1469 u8 key, u8 asc, u8 asc_q) 1470 { 1471 iu->datapres = SAS_DATAPRES_SENSE_DATA; 1472 iu->response_data_len = 0; 1473 iu->sense_data_len = 17; 1474 iu->status = 02; 1475 mvs_set_sense(iu->sense_data, 17, 0, 1476 key, asc, asc_q); 1477 } 1478 1479 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task, 1480 u32 slot_idx) 1481 { 1482 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1483 int stat; 1484 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response); 1485 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1)); 1486 u32 tfs = 0; 1487 enum mvs_port_type type = PORT_TYPE_SAS; 1488 1489 if (err_dw0 & CMD_ISS_STPD) 1490 MVS_CHIP_DISP->issue_stop(mvi, type, tfs); 1491 1492 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1493 1494 stat = SAM_STAT_CHECK_CONDITION; 1495 switch (task->task_proto) { 1496 case SAS_PROTOCOL_SSP: 1497 { 1498 stat = SAS_ABORTED_TASK; 1499 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) { 1500 struct ssp_response_iu *iu = slot->response + 1501 sizeof(struct mvs_err_info); 1502 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01); 1503 sas_ssp_task_response(mvi->dev, task, iu); 1504 stat = SAM_STAT_CHECK_CONDITION; 1505 } 1506 if (err_dw1 & bit(31)) 1507 mv_printk("reuse same slot, retry command.\n"); 1508 break; 1509 } 1510 case SAS_PROTOCOL_SMP: 1511 stat = SAM_STAT_CHECK_CONDITION; 1512 break; 1513 1514 case SAS_PROTOCOL_SATA: 1515 case SAS_PROTOCOL_STP: 1516 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 1517 { 1518 task->ata_task.use_ncq = 0; 1519 stat = SAS_PROTO_RESPONSE; 1520 mvs_sata_done(mvi, task, slot_idx, err_dw0); 1521 } 1522 break; 1523 default: 1524 break; 1525 } 1526 1527 return stat; 1528 } 1529 1530 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags) 1531 { 1532 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 1533 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1534 struct sas_task *task = slot->task; 1535 struct mvs_device *mvi_dev = NULL; 1536 struct task_status_struct *tstat; 1537 struct domain_device *dev; 1538 u32 aborted; 1539 1540 void *to; 1541 enum exec_status sts; 1542 1543 if (unlikely(!task || !task->lldd_task || !task->dev)) 1544 return -1; 1545 1546 tstat = &task->task_status; 1547 dev = task->dev; 1548 mvi_dev = dev->lldd_dev; 1549 1550 spin_lock(&task->task_state_lock); 1551 task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 1552 task->task_state_flags |= SAS_TASK_STATE_DONE; 1553 /* race condition*/ 1554 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED; 1555 spin_unlock(&task->task_state_lock); 1556 1557 memset(tstat, 0, sizeof(*tstat)); 1558 tstat->resp = SAS_TASK_COMPLETE; 1559 1560 if (unlikely(aborted)) { 1561 tstat->stat = SAS_ABORTED_TASK; 1562 if (mvi_dev && mvi_dev->running_req) 1563 mvi_dev->running_req--; 1564 if (sas_protocol_ata(task->task_proto)) 1565 mvs_free_reg_set(mvi, mvi_dev); 1566 1567 mvs_slot_task_free(mvi, task, slot, slot_idx); 1568 return -1; 1569 } 1570 1571 /* when no device attaching, go ahead and complete by error handling*/ 1572 if (unlikely(!mvi_dev || flags)) { 1573 if (!mvi_dev) 1574 mv_dprintk("port has not device.\n"); 1575 tstat->stat = SAS_PHY_DOWN; 1576 goto out; 1577 } 1578 1579 /* 1580 * error info record present; slot->response is 32 bit aligned but may 1581 * not be 64 bit aligned, so check for zero in two 32 bit reads 1582 */ 1583 if (unlikely((rx_desc & RXQ_ERR) 1584 && (*((u32 *)slot->response) 1585 || *(((u32 *)slot->response) + 1)))) { 1586 mv_dprintk("port %d slot %d rx_desc %X has error info" 1587 "%016llX.\n", slot->port->sas_port.id, slot_idx, 1588 rx_desc, get_unaligned_le64(slot->response)); 1589 tstat->stat = mvs_slot_err(mvi, task, slot_idx); 1590 tstat->resp = SAS_TASK_COMPLETE; 1591 goto out; 1592 } 1593 1594 switch (task->task_proto) { 1595 case SAS_PROTOCOL_SSP: 1596 /* hw says status == 0, datapres == 0 */ 1597 if (rx_desc & RXQ_GOOD) { 1598 tstat->stat = SAS_SAM_STAT_GOOD; 1599 tstat->resp = SAS_TASK_COMPLETE; 1600 } 1601 /* response frame present */ 1602 else if (rx_desc & RXQ_RSP) { 1603 struct ssp_response_iu *iu = slot->response + 1604 sizeof(struct mvs_err_info); 1605 sas_ssp_task_response(mvi->dev, task, iu); 1606 } else 1607 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION; 1608 break; 1609 1610 case SAS_PROTOCOL_SMP: { 1611 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 1612 tstat->stat = SAS_SAM_STAT_GOOD; 1613 to = kmap_atomic(sg_page(sg_resp)); 1614 memcpy(to + sg_resp->offset, 1615 slot->response + sizeof(struct mvs_err_info), 1616 sg_dma_len(sg_resp)); 1617 kunmap_atomic(to); 1618 break; 1619 } 1620 1621 case SAS_PROTOCOL_SATA: 1622 case SAS_PROTOCOL_STP: 1623 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: { 1624 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0); 1625 break; 1626 } 1627 1628 default: 1629 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION; 1630 break; 1631 } 1632 if (!slot->port->port_attached) { 1633 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id); 1634 tstat->stat = SAS_PHY_DOWN; 1635 } 1636 1637 1638 out: 1639 if (mvi_dev && mvi_dev->running_req) { 1640 mvi_dev->running_req--; 1641 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req) 1642 mvs_free_reg_set(mvi, mvi_dev); 1643 } 1644 mvs_slot_task_free(mvi, task, slot, slot_idx); 1645 sts = tstat->stat; 1646 1647 spin_unlock(&mvi->lock); 1648 if (task->task_done) 1649 task->task_done(task); 1650 1651 spin_lock(&mvi->lock); 1652 1653 return sts; 1654 } 1655 1656 void mvs_do_release_task(struct mvs_info *mvi, 1657 int phy_no, struct domain_device *dev) 1658 { 1659 u32 slot_idx; 1660 struct mvs_phy *phy; 1661 struct mvs_port *port; 1662 struct mvs_slot_info *slot, *slot2; 1663 1664 phy = &mvi->phy[phy_no]; 1665 port = phy->port; 1666 if (!port) 1667 return; 1668 /* clean cmpl queue in case request is already finished */ 1669 mvs_int_rx(mvi, false); 1670 1671 1672 1673 list_for_each_entry_safe(slot, slot2, &port->list, entry) { 1674 struct sas_task *task; 1675 slot_idx = (u32) (slot - mvi->slot_info); 1676 task = slot->task; 1677 1678 if (dev && task->dev != dev) 1679 continue; 1680 1681 mv_printk("Release slot [%x] tag[%x], task [%p]:\n", 1682 slot_idx, slot->slot_tag, task); 1683 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1684 1685 mvs_slot_complete(mvi, slot_idx, 1); 1686 } 1687 } 1688 1689 void mvs_release_task(struct mvs_info *mvi, 1690 struct domain_device *dev) 1691 { 1692 int i, phyno[WIDE_PORT_MAX_PHY], num; 1693 num = mvs_find_dev_phyno(dev, phyno); 1694 for (i = 0; i < num; i++) 1695 mvs_do_release_task(mvi, phyno[i], dev); 1696 } 1697 1698 static void mvs_phy_disconnected(struct mvs_phy *phy) 1699 { 1700 phy->phy_attached = 0; 1701 phy->att_dev_info = 0; 1702 phy->att_dev_sas_addr = 0; 1703 } 1704 1705 static void mvs_work_queue(struct work_struct *work) 1706 { 1707 struct delayed_work *dw = container_of(work, struct delayed_work, work); 1708 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); 1709 struct mvs_info *mvi = mwq->mvi; 1710 unsigned long flags; 1711 u32 phy_no = (unsigned long) mwq->data; 1712 struct mvs_phy *phy = &mvi->phy[phy_no]; 1713 struct asd_sas_phy *sas_phy = &phy->sas_phy; 1714 1715 spin_lock_irqsave(&mvi->lock, flags); 1716 if (mwq->handler & PHY_PLUG_EVENT) { 1717 1718 if (phy->phy_event & PHY_PLUG_OUT) { 1719 u32 tmp; 1720 1721 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no); 1722 phy->phy_event &= ~PHY_PLUG_OUT; 1723 if (!(tmp & PHY_READY_MASK)) { 1724 sas_phy_disconnected(sas_phy); 1725 mvs_phy_disconnected(phy); 1726 sas_notify_phy_event(sas_phy, 1727 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); 1728 mv_dprintk("phy%d Removed Device\n", phy_no); 1729 } else { 1730 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 1731 mvs_update_phyinfo(mvi, phy_no, 1); 1732 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC); 1733 mvs_port_notify_formed(sas_phy, 0); 1734 mv_dprintk("phy%d Attached Device\n", phy_no); 1735 } 1736 } 1737 } else if (mwq->handler & EXP_BRCT_CHG) { 1738 phy->phy_event &= ~EXP_BRCT_CHG; 1739 sas_notify_port_event(sas_phy, 1740 PORTE_BROADCAST_RCVD, GFP_ATOMIC); 1741 mv_dprintk("phy%d Got Broadcast Change\n", phy_no); 1742 } 1743 list_del(&mwq->entry); 1744 spin_unlock_irqrestore(&mvi->lock, flags); 1745 kfree(mwq); 1746 } 1747 1748 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler) 1749 { 1750 struct mvs_wq *mwq; 1751 int ret = 0; 1752 1753 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC); 1754 if (mwq) { 1755 mwq->mvi = mvi; 1756 mwq->data = data; 1757 mwq->handler = handler; 1758 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq); 1759 list_add_tail(&mwq->entry, &mvi->wq_list); 1760 schedule_delayed_work(&mwq->work_q, HZ * 2); 1761 } else 1762 ret = -ENOMEM; 1763 1764 return ret; 1765 } 1766 1767 static void mvs_sig_time_out(struct timer_list *t) 1768 { 1769 struct mvs_phy *phy = from_timer(phy, t, timer); 1770 struct mvs_info *mvi = phy->mvi; 1771 u8 phy_no; 1772 1773 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) { 1774 if (&mvi->phy[phy_no] == phy) { 1775 mv_dprintk("Get signature time out, reset phy %d\n", 1776 phy_no+mvi->id*mvi->chip->n_phy); 1777 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET); 1778 } 1779 } 1780 } 1781 1782 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) 1783 { 1784 u32 tmp; 1785 struct mvs_phy *phy = &mvi->phy[phy_no]; 1786 1787 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no); 1788 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status); 1789 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy, 1790 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no)); 1791 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy, 1792 phy->irq_status); 1793 1794 /* 1795 * events is port event now , 1796 * we need check the interrupt status which belongs to per port. 1797 */ 1798 1799 if (phy->irq_status & PHYEV_DCDR_ERR) { 1800 mv_dprintk("phy %d STP decoding error.\n", 1801 phy_no + mvi->id*mvi->chip->n_phy); 1802 } 1803 1804 if (phy->irq_status & PHYEV_POOF) { 1805 mdelay(500); 1806 if (!(phy->phy_event & PHY_PLUG_OUT)) { 1807 int dev_sata = phy->phy_type & PORT_TYPE_SATA; 1808 int ready; 1809 mvs_do_release_task(mvi, phy_no, NULL); 1810 phy->phy_event |= PHY_PLUG_OUT; 1811 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1); 1812 mvs_handle_event(mvi, 1813 (void *)(unsigned long)phy_no, 1814 PHY_PLUG_EVENT); 1815 ready = mvs_is_phy_ready(mvi, phy_no); 1816 if (ready || dev_sata) { 1817 if (MVS_CHIP_DISP->stp_reset) 1818 MVS_CHIP_DISP->stp_reset(mvi, 1819 phy_no); 1820 else 1821 MVS_CHIP_DISP->phy_reset(mvi, 1822 phy_no, MVS_SOFT_RESET); 1823 return; 1824 } 1825 } 1826 } 1827 1828 if (phy->irq_status & PHYEV_COMWAKE) { 1829 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no); 1830 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no, 1831 tmp | PHYEV_SIG_FIS); 1832 if (phy->timer.function == NULL) { 1833 phy->timer.function = mvs_sig_time_out; 1834 phy->timer.expires = jiffies + 5*HZ; 1835 add_timer(&phy->timer); 1836 } 1837 } 1838 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) { 1839 phy->phy_status = mvs_is_phy_ready(mvi, phy_no); 1840 mv_dprintk("notify plug in on phy[%d]\n", phy_no); 1841 if (phy->phy_status) { 1842 mdelay(10); 1843 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 1844 if (phy->phy_type & PORT_TYPE_SATA) { 1845 tmp = MVS_CHIP_DISP->read_port_irq_mask( 1846 mvi, phy_no); 1847 tmp &= ~PHYEV_SIG_FIS; 1848 MVS_CHIP_DISP->write_port_irq_mask(mvi, 1849 phy_no, tmp); 1850 } 1851 mvs_update_phyinfo(mvi, phy_no, 0); 1852 if (phy->phy_type & PORT_TYPE_SAS) { 1853 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE); 1854 mdelay(10); 1855 } 1856 1857 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC); 1858 /* whether driver is going to handle hot plug */ 1859 if (phy->phy_event & PHY_PLUG_OUT) { 1860 mvs_port_notify_formed(&phy->sas_phy, 0); 1861 phy->phy_event &= ~PHY_PLUG_OUT; 1862 } 1863 } else { 1864 mv_dprintk("plugin interrupt but phy%d is gone\n", 1865 phy_no + mvi->id*mvi->chip->n_phy); 1866 } 1867 } else if (phy->irq_status & PHYEV_BROAD_CH) { 1868 mv_dprintk("phy %d broadcast change.\n", 1869 phy_no + mvi->id*mvi->chip->n_phy); 1870 mvs_handle_event(mvi, (void *)(unsigned long)phy_no, 1871 EXP_BRCT_CHG); 1872 } 1873 } 1874 1875 int mvs_int_rx(struct mvs_info *mvi, bool self_clear) 1876 { 1877 u32 rx_prod_idx, rx_desc; 1878 bool attn = false; 1879 1880 /* the first dword in the RX ring is special: it contains 1881 * a mirror of the hardware's RX producer index, so that 1882 * we don't have to stall the CPU reading that register. 1883 * The actual RX ring is offset by one dword, due to this. 1884 */ 1885 rx_prod_idx = mvi->rx_cons; 1886 mvi->rx_cons = le32_to_cpu(mvi->rx[0]); 1887 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */ 1888 return 0; 1889 1890 /* The CMPL_Q may come late, read from register and try again 1891 * note: if coalescing is enabled, 1892 * it will need to read from register every time for sure 1893 */ 1894 if (unlikely(mvi->rx_cons == rx_prod_idx)) 1895 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK; 1896 1897 if (mvi->rx_cons == rx_prod_idx) 1898 return 0; 1899 1900 while (mvi->rx_cons != rx_prod_idx) { 1901 /* increment our internal RX consumer pointer */ 1902 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1); 1903 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]); 1904 1905 if (likely(rx_desc & RXQ_DONE)) 1906 mvs_slot_complete(mvi, rx_desc, 0); 1907 if (rx_desc & RXQ_ATTN) { 1908 attn = true; 1909 } else if (rx_desc & RXQ_ERR) { 1910 if (!(rx_desc & RXQ_DONE)) 1911 mvs_slot_complete(mvi, rx_desc, 0); 1912 } else if (rx_desc & RXQ_SLOT_RESET) { 1913 mvs_slot_free(mvi, rx_desc); 1914 } 1915 } 1916 1917 if (attn && self_clear) 1918 MVS_CHIP_DISP->int_full(mvi); 1919 return 0; 1920 } 1921 1922 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index, 1923 u8 reg_count, u8 *write_data) 1924 { 1925 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 1926 struct mvs_info *mvi = mvs_prv->mvi[0]; 1927 1928 if (MVS_CHIP_DISP->gpio_write) { 1929 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type, 1930 reg_index, reg_count, write_data); 1931 } 1932 1933 return -ENOSYS; 1934 } 1935