1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Marvell 88SE64xx/88SE94xx main function 4 * 5 * Copyright 2007 Red Hat, Inc. 6 * Copyright 2008 Marvell. <kewei@marvell.com> 7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com> 8 */ 9 10 #include "mv_sas.h" 11 12 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag) 13 { 14 if (task->lldd_task) { 15 struct mvs_slot_info *slot; 16 slot = task->lldd_task; 17 *tag = slot->slot_tag; 18 return 1; 19 } 20 return 0; 21 } 22 23 static void mvs_tag_clear(struct mvs_info *mvi, u32 tag) 24 { 25 void *bitmap = mvi->rsvd_tags; 26 clear_bit(tag, bitmap); 27 } 28 29 static void mvs_tag_free(struct mvs_info *mvi, u32 tag) 30 { 31 if (tag >= MVS_RSVD_SLOTS) 32 return; 33 34 mvs_tag_clear(mvi, tag); 35 } 36 37 static void mvs_tag_set(struct mvs_info *mvi, unsigned int tag) 38 { 39 void *bitmap = mvi->rsvd_tags; 40 set_bit(tag, bitmap); 41 } 42 43 static int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out) 44 { 45 unsigned int index, tag; 46 void *bitmap = mvi->rsvd_tags; 47 48 index = find_first_zero_bit(bitmap, MVS_RSVD_SLOTS); 49 tag = index; 50 if (tag >= MVS_RSVD_SLOTS) 51 return -SAS_QUEUE_FULL; 52 mvs_tag_set(mvi, tag); 53 *tag_out = tag; 54 return 0; 55 } 56 57 static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev) 58 { 59 unsigned long i = 0, j = 0, hi = 0; 60 struct sas_ha_struct *sha = dev->port->ha; 61 struct mvs_info *mvi = NULL; 62 struct asd_sas_phy *phy; 63 64 while (sha->sas_port[i]) { 65 if (sha->sas_port[i] == dev->port) { 66 spin_lock(&sha->sas_port[i]->phy_list_lock); 67 phy = container_of(sha->sas_port[i]->phy_list.next, 68 struct asd_sas_phy, port_phy_el); 69 spin_unlock(&sha->sas_port[i]->phy_list_lock); 70 j = 0; 71 while (sha->sas_phy[j]) { 72 if (sha->sas_phy[j] == phy) 73 break; 74 j++; 75 } 76 break; 77 } 78 i++; 79 } 80 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 81 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 82 83 return mvi; 84 85 } 86 87 static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno) 88 { 89 unsigned long i = 0, j = 0, n = 0, num = 0; 90 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 91 struct mvs_info *mvi = mvi_dev->mvi_info; 92 struct sas_ha_struct *sha = dev->port->ha; 93 94 while (sha->sas_port[i]) { 95 if (sha->sas_port[i] == dev->port) { 96 struct asd_sas_phy *phy; 97 98 spin_lock(&sha->sas_port[i]->phy_list_lock); 99 list_for_each_entry(phy, 100 &sha->sas_port[i]->phy_list, port_phy_el) { 101 j = 0; 102 while (sha->sas_phy[j]) { 103 if (sha->sas_phy[j] == phy) 104 break; 105 j++; 106 } 107 phyno[n] = (j >= mvi->chip->n_phy) ? 108 (j - mvi->chip->n_phy) : j; 109 num++; 110 n++; 111 } 112 spin_unlock(&sha->sas_port[i]->phy_list_lock); 113 break; 114 } 115 i++; 116 } 117 return num; 118 } 119 120 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, 121 u8 reg_set) 122 { 123 u32 dev_no; 124 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) { 125 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED) 126 continue; 127 128 if (mvi->devices[dev_no].taskfileset == reg_set) 129 return &mvi->devices[dev_no]; 130 } 131 return NULL; 132 } 133 134 static inline void mvs_free_reg_set(struct mvs_info *mvi, 135 struct mvs_device *dev) 136 { 137 if (!dev) { 138 mv_printk("device has been free.\n"); 139 return; 140 } 141 if (dev->taskfileset == MVS_ID_NOT_MAPPED) 142 return; 143 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset); 144 } 145 146 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi, 147 struct mvs_device *dev) 148 { 149 if (dev->taskfileset != MVS_ID_NOT_MAPPED) 150 return 0; 151 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset); 152 } 153 154 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard) 155 { 156 u32 no; 157 for_each_phy(phy_mask, phy_mask, no) { 158 if (!(phy_mask & 1)) 159 continue; 160 MVS_CHIP_DISP->phy_reset(mvi, no, hard); 161 } 162 } 163 164 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, 165 void *funcdata) 166 { 167 int rc = 0, phy_id = sas_phy->id; 168 u32 tmp, i = 0, hi; 169 struct sas_ha_struct *sha = sas_phy->ha; 170 struct mvs_info *mvi = NULL; 171 172 while (sha->sas_phy[i]) { 173 if (sha->sas_phy[i] == sas_phy) 174 break; 175 i++; 176 } 177 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 178 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 179 180 switch (func) { 181 case PHY_FUNC_SET_LINK_RATE: 182 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata); 183 break; 184 185 case PHY_FUNC_HARD_RESET: 186 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id); 187 if (tmp & PHY_RST_HARD) 188 break; 189 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET); 190 break; 191 192 case PHY_FUNC_LINK_RESET: 193 MVS_CHIP_DISP->phy_enable(mvi, phy_id); 194 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET); 195 break; 196 197 case PHY_FUNC_DISABLE: 198 MVS_CHIP_DISP->phy_disable(mvi, phy_id); 199 break; 200 case PHY_FUNC_RELEASE_SPINUP_HOLD: 201 default: 202 rc = -ENOSYS; 203 } 204 msleep(200); 205 return rc; 206 } 207 208 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo, 209 u32 off_hi, u64 sas_addr) 210 { 211 u32 lo = (u32)sas_addr; 212 u32 hi = (u32)(sas_addr>>32); 213 214 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo); 215 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo); 216 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi); 217 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); 218 } 219 220 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags) 221 { 222 struct mvs_phy *phy = &mvi->phy[i]; 223 struct asd_sas_phy *sas_phy = &phy->sas_phy; 224 225 if (!phy->phy_attached) 226 return; 227 228 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK) 229 && phy->phy_type & PORT_TYPE_SAS) { 230 return; 231 } 232 233 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags); 234 235 if (sas_phy->phy) { 236 struct sas_phy *sphy = sas_phy->phy; 237 238 sphy->negotiated_linkrate = sas_phy->linkrate; 239 sphy->minimum_linkrate = phy->minimum_linkrate; 240 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; 241 sphy->maximum_linkrate = phy->maximum_linkrate; 242 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate(); 243 } 244 245 if (phy->phy_type & PORT_TYPE_SAS) { 246 struct sas_identify_frame *id; 247 248 id = (struct sas_identify_frame *)phy->frame_rcvd; 249 id->dev_type = phy->identify.device_type; 250 id->initiator_bits = SAS_PROTOCOL_ALL; 251 id->target_bits = phy->identify.target_port_protocols; 252 253 /* direct attached SAS device */ 254 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 255 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 256 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00); 257 } 258 } else if (phy->phy_type & PORT_TYPE_SATA) { 259 /*Nothing*/ 260 } 261 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); 262 263 sas_phy->frame_rcvd_size = phy->frame_rcvd_size; 264 265 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags); 266 } 267 268 void mvs_scan_start(struct Scsi_Host *shost) 269 { 270 int i, j; 271 unsigned short core_nr; 272 struct mvs_info *mvi; 273 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 274 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 275 276 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; 277 278 for (j = 0; j < core_nr; j++) { 279 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; 280 for (i = 0; i < mvi->chip->n_phy; ++i) 281 mvs_bytes_dmaed(mvi, i, GFP_KERNEL); 282 } 283 mvs_prv->scan_finished = 1; 284 } 285 286 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time) 287 { 288 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 289 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 290 291 if (mvs_prv->scan_finished == 0) 292 return 0; 293 294 sas_drain_work(sha); 295 return 1; 296 } 297 298 static int mvs_task_prep_smp(struct mvs_info *mvi, 299 struct mvs_task_exec_info *tei) 300 { 301 int elem, rc, i; 302 struct sas_ha_struct *sha = mvi->sas; 303 struct sas_task *task = tei->task; 304 struct mvs_cmd_hdr *hdr = tei->hdr; 305 struct domain_device *dev = task->dev; 306 struct asd_sas_port *sas_port = dev->port; 307 struct sas_phy *sphy = dev->phy; 308 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number]; 309 struct scatterlist *sg_req, *sg_resp; 310 u32 req_len, resp_len, tag = tei->tag; 311 void *buf_tmp; 312 u8 *buf_oaf; 313 dma_addr_t buf_tmp_dma; 314 void *buf_prd; 315 struct mvs_slot_info *slot = &mvi->slot_info[tag]; 316 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 317 318 /* 319 * DMA-map SMP request, response buffers 320 */ 321 sg_req = &task->smp_task.smp_req; 322 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE); 323 if (!elem) 324 return -ENOMEM; 325 req_len = sg_dma_len(sg_req); 326 327 sg_resp = &task->smp_task.smp_resp; 328 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE); 329 if (!elem) { 330 rc = -ENOMEM; 331 goto err_out; 332 } 333 resp_len = SB_RFB_MAX; 334 335 /* must be in dwords */ 336 if ((req_len & 0x3) || (resp_len & 0x3)) { 337 rc = -EINVAL; 338 goto err_out_2; 339 } 340 341 /* 342 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 343 */ 344 345 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */ 346 buf_tmp = slot->buf; 347 buf_tmp_dma = slot->buf_dma; 348 349 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req)); 350 351 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 352 buf_oaf = buf_tmp; 353 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 354 355 buf_tmp += MVS_OAF_SZ; 356 buf_tmp_dma += MVS_OAF_SZ; 357 358 /* region 3: PRD table *********************************** */ 359 buf_prd = buf_tmp; 360 if (tei->n_elem) 361 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 362 else 363 hdr->prd_tbl = 0; 364 365 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 366 buf_tmp += i; 367 buf_tmp_dma += i; 368 369 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 370 slot->response = buf_tmp; 371 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 372 if (mvi->flags & MVF_FLAG_SOC) 373 hdr->reserved[0] = 0; 374 375 /* 376 * Fill in TX ring and command slot header 377 */ 378 slot->tx = mvi->tx_prod; 379 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) | 380 TXQ_MODE_I | tag | 381 (MVS_PHY_ID << TXQ_PHY_SHIFT)); 382 383 hdr->flags |= flags; 384 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4)); 385 hdr->tags = cpu_to_le32(tag); 386 hdr->data_len = 0; 387 388 /* generate open address frame hdr (first 12 bytes) */ 389 /* initiator, SMP, ftype 1h */ 390 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01; 391 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 392 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */ 393 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 394 395 /* fill in PRD (scatter/gather) table, if any */ 396 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 397 398 return 0; 399 400 err_out_2: 401 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1, 402 DMA_FROM_DEVICE); 403 err_out: 404 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1, 405 DMA_TO_DEVICE); 406 return rc; 407 } 408 409 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag) 410 { 411 struct ata_queued_cmd *qc = task->uldd_task; 412 413 if (qc) { 414 if (qc->tf.command == ATA_CMD_FPDMA_WRITE || 415 qc->tf.command == ATA_CMD_FPDMA_READ || 416 qc->tf.command == ATA_CMD_FPDMA_RECV || 417 qc->tf.command == ATA_CMD_FPDMA_SEND || 418 qc->tf.command == ATA_CMD_NCQ_NON_DATA) { 419 *tag = qc->tag; 420 return 1; 421 } 422 } 423 424 return 0; 425 } 426 427 static int mvs_task_prep_ata(struct mvs_info *mvi, 428 struct mvs_task_exec_info *tei) 429 { 430 struct sas_task *task = tei->task; 431 struct domain_device *dev = task->dev; 432 struct mvs_device *mvi_dev = dev->lldd_dev; 433 struct mvs_cmd_hdr *hdr = tei->hdr; 434 struct asd_sas_port *sas_port = dev->port; 435 struct mvs_slot_info *slot; 436 void *buf_prd; 437 u32 tag = tei->tag, hdr_tag; 438 u32 flags, del_q; 439 void *buf_tmp; 440 u8 *buf_cmd, *buf_oaf; 441 dma_addr_t buf_tmp_dma; 442 u32 i, req_len, resp_len; 443 const u32 max_resp_len = SB_RFB_MAX; 444 445 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) { 446 mv_dprintk("Have not enough regiset for dev %d.\n", 447 mvi_dev->device_id); 448 return -EBUSY; 449 } 450 slot = &mvi->slot_info[tag]; 451 slot->tx = mvi->tx_prod; 452 del_q = TXQ_MODE_I | tag | 453 (TXQ_CMD_STP << TXQ_CMD_SHIFT) | 454 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) | 455 (mvi_dev->taskfileset << TXQ_SRS_SHIFT); 456 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q); 457 458 if (task->data_dir == DMA_FROM_DEVICE) 459 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT); 460 else 461 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 462 463 if (task->ata_task.use_ncq) 464 flags |= MCH_FPDMA; 465 if (dev->sata_dev.class == ATA_DEV_ATAPI) { 466 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI) 467 flags |= MCH_ATAPI; 468 } 469 470 hdr->flags = cpu_to_le32(flags); 471 472 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag)) 473 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 474 else 475 hdr_tag = tag; 476 477 hdr->tags = cpu_to_le32(hdr_tag); 478 479 hdr->data_len = cpu_to_le32(task->total_xfer_len); 480 481 /* 482 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 483 */ 484 485 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */ 486 buf_cmd = buf_tmp = slot->buf; 487 buf_tmp_dma = slot->buf_dma; 488 489 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 490 491 buf_tmp += MVS_ATA_CMD_SZ; 492 buf_tmp_dma += MVS_ATA_CMD_SZ; 493 494 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 495 /* used for STP. unused for SATA? */ 496 buf_oaf = buf_tmp; 497 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 498 499 buf_tmp += MVS_OAF_SZ; 500 buf_tmp_dma += MVS_OAF_SZ; 501 502 /* region 3: PRD table ********************************************* */ 503 buf_prd = buf_tmp; 504 505 if (tei->n_elem) 506 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 507 else 508 hdr->prd_tbl = 0; 509 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count(); 510 511 buf_tmp += i; 512 buf_tmp_dma += i; 513 514 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 515 slot->response = buf_tmp; 516 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 517 if (mvi->flags & MVF_FLAG_SOC) 518 hdr->reserved[0] = 0; 519 520 req_len = sizeof(struct host_to_dev_fis); 521 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ - 522 sizeof(struct mvs_err_info) - i; 523 524 /* request, response lengths */ 525 resp_len = min(resp_len, max_resp_len); 526 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 527 528 if (likely(!task->ata_task.device_control_reg_update)) 529 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */ 530 /* fill in command FIS and ATAPI CDB */ 531 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); 532 if (dev->sata_dev.class == ATA_DEV_ATAPI) 533 memcpy(buf_cmd + STP_ATAPI_CMD, 534 task->ata_task.atapi_packet, 16); 535 536 /* generate open address frame hdr (first 12 bytes) */ 537 /* initiator, STP, ftype 1h */ 538 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1; 539 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 540 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 541 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 542 543 /* fill in PRD (scatter/gather) table, if any */ 544 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 545 546 if (task->data_dir == DMA_FROM_DEVICE) 547 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask, 548 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd); 549 550 return 0; 551 } 552 553 static int mvs_task_prep_ssp(struct mvs_info *mvi, 554 struct mvs_task_exec_info *tei, int is_tmf, 555 struct sas_tmf_task *tmf) 556 { 557 struct sas_task *task = tei->task; 558 struct mvs_cmd_hdr *hdr = tei->hdr; 559 struct mvs_port *port = tei->port; 560 struct domain_device *dev = task->dev; 561 struct mvs_device *mvi_dev = dev->lldd_dev; 562 struct asd_sas_port *sas_port = dev->port; 563 struct mvs_slot_info *slot; 564 void *buf_prd; 565 struct ssp_frame_hdr *ssp_hdr; 566 void *buf_tmp; 567 u8 *buf_cmd, *buf_oaf, fburst = 0; 568 dma_addr_t buf_tmp_dma; 569 u32 flags; 570 u32 resp_len, req_len, i, tag = tei->tag; 571 const u32 max_resp_len = SB_RFB_MAX; 572 u32 phy_mask; 573 574 slot = &mvi->slot_info[tag]; 575 576 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap : 577 sas_port->phy_mask) & TXQ_PHY_MASK; 578 579 slot->tx = mvi->tx_prod; 580 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag | 581 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) | 582 (phy_mask << TXQ_PHY_SHIFT)); 583 584 flags = MCH_RETRY; 585 if (task->ssp_task.enable_first_burst) { 586 flags |= MCH_FBURST; 587 fburst = (1 << 7); 588 } 589 if (is_tmf) 590 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT); 591 else 592 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT); 593 594 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT)); 595 hdr->tags = cpu_to_le32(tag); 596 hdr->data_len = cpu_to_le32(task->total_xfer_len); 597 598 /* 599 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 600 */ 601 602 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */ 603 buf_cmd = buf_tmp = slot->buf; 604 buf_tmp_dma = slot->buf_dma; 605 606 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 607 608 buf_tmp += MVS_SSP_CMD_SZ; 609 buf_tmp_dma += MVS_SSP_CMD_SZ; 610 611 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 612 buf_oaf = buf_tmp; 613 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 614 615 buf_tmp += MVS_OAF_SZ; 616 buf_tmp_dma += MVS_OAF_SZ; 617 618 /* region 3: PRD table ********************************************* */ 619 buf_prd = buf_tmp; 620 if (tei->n_elem) 621 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 622 else 623 hdr->prd_tbl = 0; 624 625 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 626 buf_tmp += i; 627 buf_tmp_dma += i; 628 629 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 630 slot->response = buf_tmp; 631 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 632 if (mvi->flags & MVF_FLAG_SOC) 633 hdr->reserved[0] = 0; 634 635 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ - 636 sizeof(struct mvs_err_info) - i; 637 resp_len = min(resp_len, max_resp_len); 638 639 req_len = sizeof(struct ssp_frame_hdr) + 28; 640 641 /* request, response lengths */ 642 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 643 644 /* generate open address frame hdr (first 12 bytes) */ 645 /* initiator, SSP, ftype 1h */ 646 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1; 647 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 648 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 649 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 650 651 /* fill in SSP frame header (Command Table.SSP frame header) */ 652 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd; 653 654 if (is_tmf) 655 ssp_hdr->frame_type = SSP_TASK; 656 else 657 ssp_hdr->frame_type = SSP_COMMAND; 658 659 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr, 660 HASHED_SAS_ADDR_SIZE); 661 memcpy(ssp_hdr->hashed_src_addr, 662 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); 663 ssp_hdr->tag = cpu_to_be16(tag); 664 665 /* fill in IU for TASK and Command Frame */ 666 buf_cmd += sizeof(*ssp_hdr); 667 memcpy(buf_cmd, &task->ssp_task.LUN, 8); 668 669 if (ssp_hdr->frame_type != SSP_TASK) { 670 buf_cmd[9] = fburst | task->ssp_task.task_attr | 671 (task->ssp_task.task_prio << 3); 672 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd, 673 task->ssp_task.cmd->cmd_len); 674 } else{ 675 buf_cmd[10] = tmf->tmf; 676 switch (tmf->tmf) { 677 case TMF_ABORT_TASK: 678 case TMF_QUERY_TASK: 679 buf_cmd[12] = 680 (tmf->tag_of_task_to_be_managed >> 8) & 0xff; 681 buf_cmd[13] = 682 tmf->tag_of_task_to_be_managed & 0xff; 683 break; 684 default: 685 break; 686 } 687 } 688 /* fill in PRD (scatter/gather) table, if any */ 689 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 690 return 0; 691 } 692 693 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED))) 694 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf, 695 struct sas_tmf_task *tmf, int *pass) 696 { 697 struct domain_device *dev = task->dev; 698 struct mvs_device *mvi_dev = dev->lldd_dev; 699 struct mvs_task_exec_info tei; 700 struct mvs_slot_info *slot; 701 u32 tag = 0xdeadbeef, n_elem = 0; 702 struct request *rq; 703 int rc = 0; 704 705 if (!dev->port) { 706 struct task_status_struct *tsm = &task->task_status; 707 708 tsm->resp = SAS_TASK_UNDELIVERED; 709 tsm->stat = SAS_PHY_DOWN; 710 /* 711 * libsas will use dev->port, should 712 * not call task_done for sata 713 */ 714 if (dev->dev_type != SAS_SATA_DEV) 715 task->task_done(task); 716 return rc; 717 } 718 719 if (DEV_IS_GONE(mvi_dev)) { 720 if (mvi_dev) 721 mv_dprintk("device %d not ready.\n", 722 mvi_dev->device_id); 723 else 724 mv_dprintk("device %016llx not ready.\n", 725 SAS_ADDR(dev->sas_addr)); 726 727 rc = SAS_PHY_DOWN; 728 return rc; 729 } 730 tei.port = dev->port->lldd_port; 731 if (tei.port && !tei.port->port_attached && !tmf) { 732 if (sas_protocol_ata(task->task_proto)) { 733 struct task_status_struct *ts = &task->task_status; 734 mv_dprintk("SATA/STP port %d does not attach" 735 "device.\n", dev->port->id); 736 ts->resp = SAS_TASK_COMPLETE; 737 ts->stat = SAS_PHY_DOWN; 738 739 task->task_done(task); 740 741 } else { 742 struct task_status_struct *ts = &task->task_status; 743 mv_dprintk("SAS port %d does not attach" 744 "device.\n", dev->port->id); 745 ts->resp = SAS_TASK_UNDELIVERED; 746 ts->stat = SAS_PHY_DOWN; 747 task->task_done(task); 748 } 749 return rc; 750 } 751 752 if (!sas_protocol_ata(task->task_proto)) { 753 if (task->num_scatter) { 754 n_elem = dma_map_sg(mvi->dev, 755 task->scatter, 756 task->num_scatter, 757 task->data_dir); 758 if (!n_elem) { 759 rc = -ENOMEM; 760 goto prep_out; 761 } 762 } 763 } else { 764 n_elem = task->num_scatter; 765 } 766 767 rq = sas_task_find_rq(task); 768 if (rq) { 769 tag = rq->tag + MVS_RSVD_SLOTS; 770 } else { 771 rc = mvs_tag_alloc(mvi, &tag); 772 if (rc) 773 goto err_out; 774 } 775 776 slot = &mvi->slot_info[tag]; 777 778 task->lldd_task = NULL; 779 slot->n_elem = n_elem; 780 slot->slot_tag = tag; 781 782 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma); 783 if (!slot->buf) { 784 rc = -ENOMEM; 785 goto err_out_tag; 786 } 787 788 tei.task = task; 789 tei.hdr = &mvi->slot[tag]; 790 tei.tag = tag; 791 tei.n_elem = n_elem; 792 switch (task->task_proto) { 793 case SAS_PROTOCOL_SMP: 794 rc = mvs_task_prep_smp(mvi, &tei); 795 break; 796 case SAS_PROTOCOL_SSP: 797 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf); 798 break; 799 case SAS_PROTOCOL_SATA: 800 case SAS_PROTOCOL_STP: 801 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 802 rc = mvs_task_prep_ata(mvi, &tei); 803 break; 804 default: 805 dev_printk(KERN_ERR, mvi->dev, 806 "unknown sas_task proto: 0x%x\n", 807 task->task_proto); 808 rc = -EINVAL; 809 break; 810 } 811 812 if (rc) { 813 mv_dprintk("rc is %x\n", rc); 814 goto err_out_slot_buf; 815 } 816 slot->task = task; 817 slot->port = tei.port; 818 task->lldd_task = slot; 819 list_add_tail(&slot->entry, &tei.port->list); 820 821 mvi_dev->running_req++; 822 ++(*pass); 823 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1); 824 825 return rc; 826 827 err_out_slot_buf: 828 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 829 err_out_tag: 830 mvs_tag_free(mvi, tag); 831 err_out: 832 833 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc); 834 if (!sas_protocol_ata(task->task_proto)) 835 if (n_elem) 836 dma_unmap_sg(mvi->dev, task->scatter, n_elem, 837 task->data_dir); 838 prep_out: 839 return rc; 840 } 841 842 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags) 843 { 844 struct mvs_info *mvi = NULL; 845 u32 rc = 0; 846 u32 pass = 0; 847 unsigned long flags = 0; 848 struct sas_tmf_task *tmf = task->tmf; 849 int is_tmf = !!task->tmf; 850 851 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info; 852 853 spin_lock_irqsave(&mvi->lock, flags); 854 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass); 855 if (rc) 856 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); 857 858 if (likely(pass)) 859 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) & 860 (MVS_CHIP_SLOT_SZ - 1)); 861 spin_unlock_irqrestore(&mvi->lock, flags); 862 863 return rc; 864 } 865 866 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc) 867 { 868 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 869 mvs_tag_free(mvi, slot_idx); 870 } 871 872 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task, 873 struct mvs_slot_info *slot, u32 slot_idx) 874 { 875 if (!slot) 876 return; 877 if (!slot->task) 878 return; 879 if (!sas_protocol_ata(task->task_proto)) 880 if (slot->n_elem) 881 dma_unmap_sg(mvi->dev, task->scatter, 882 slot->n_elem, task->data_dir); 883 884 switch (task->task_proto) { 885 case SAS_PROTOCOL_SMP: 886 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1, 887 DMA_FROM_DEVICE); 888 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1, 889 DMA_TO_DEVICE); 890 break; 891 892 case SAS_PROTOCOL_SATA: 893 case SAS_PROTOCOL_STP: 894 case SAS_PROTOCOL_SSP: 895 default: 896 /* do nothing */ 897 break; 898 } 899 900 if (slot->buf) { 901 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 902 slot->buf = NULL; 903 } 904 list_del_init(&slot->entry); 905 task->lldd_task = NULL; 906 slot->task = NULL; 907 slot->port = NULL; 908 slot->slot_tag = 0xFFFFFFFF; 909 mvs_slot_free(mvi, slot_idx); 910 } 911 912 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no) 913 { 914 struct mvs_phy *phy = &mvi->phy[phy_no]; 915 struct mvs_port *port = phy->port; 916 int j, no; 917 918 for_each_phy(port->wide_port_phymap, j, no) { 919 if (j & 1) { 920 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 921 PHYR_WIDE_PORT); 922 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 923 port->wide_port_phymap); 924 } else { 925 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 926 PHYR_WIDE_PORT); 927 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 928 0); 929 } 930 } 931 } 932 933 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i) 934 { 935 u32 tmp; 936 struct mvs_phy *phy = &mvi->phy[i]; 937 struct mvs_port *port = phy->port; 938 939 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i); 940 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) { 941 if (!port) 942 phy->phy_attached = 1; 943 return tmp; 944 } 945 946 if (port) { 947 if (phy->phy_type & PORT_TYPE_SAS) { 948 port->wide_port_phymap &= ~(1U << i); 949 if (!port->wide_port_phymap) 950 port->port_attached = 0; 951 mvs_update_wideport(mvi, i); 952 } else if (phy->phy_type & PORT_TYPE_SATA) 953 port->port_attached = 0; 954 phy->port = NULL; 955 phy->phy_attached = 0; 956 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); 957 } 958 return 0; 959 } 960 961 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf) 962 { 963 u32 *s = (u32 *) buf; 964 965 if (!s) 966 return NULL; 967 968 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3); 969 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 970 971 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2); 972 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 973 974 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1); 975 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 976 977 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0); 978 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 979 980 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01)) 981 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10); 982 983 return s; 984 } 985 986 static u32 mvs_is_sig_fis_received(u32 irq_status) 987 { 988 return irq_status & PHYEV_SIG_FIS; 989 } 990 991 static void mvs_sig_remove_timer(struct mvs_phy *phy) 992 { 993 if (phy->timer.function) 994 del_timer(&phy->timer); 995 phy->timer.function = NULL; 996 } 997 998 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st) 999 { 1000 struct mvs_phy *phy = &mvi->phy[i]; 1001 struct sas_identify_frame *id; 1002 1003 id = (struct sas_identify_frame *)phy->frame_rcvd; 1004 1005 if (get_st) { 1006 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i); 1007 phy->phy_status = mvs_is_phy_ready(mvi, i); 1008 } 1009 1010 if (phy->phy_status) { 1011 int oob_done = 0; 1012 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy; 1013 1014 oob_done = MVS_CHIP_DISP->oob_done(mvi, i); 1015 1016 MVS_CHIP_DISP->fix_phy_info(mvi, i, id); 1017 if (phy->phy_type & PORT_TYPE_SATA) { 1018 phy->identify.target_port_protocols = SAS_PROTOCOL_STP; 1019 if (mvs_is_sig_fis_received(phy->irq_status)) { 1020 mvs_sig_remove_timer(phy); 1021 phy->phy_attached = 1; 1022 phy->att_dev_sas_addr = 1023 i + mvi->id * mvi->chip->n_phy; 1024 if (oob_done) 1025 sas_phy->oob_mode = SATA_OOB_MODE; 1026 phy->frame_rcvd_size = 1027 sizeof(struct dev_to_host_fis); 1028 mvs_get_d2h_reg(mvi, i, id); 1029 } else { 1030 u32 tmp; 1031 dev_printk(KERN_DEBUG, mvi->dev, 1032 "Phy%d : No sig fis\n", i); 1033 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i); 1034 MVS_CHIP_DISP->write_port_irq_mask(mvi, i, 1035 tmp | PHYEV_SIG_FIS); 1036 phy->phy_attached = 0; 1037 phy->phy_type &= ~PORT_TYPE_SATA; 1038 goto out_done; 1039 } 1040 } else if (phy->phy_type & PORT_TYPE_SAS 1041 || phy->att_dev_info & PORT_SSP_INIT_MASK) { 1042 phy->phy_attached = 1; 1043 phy->identify.device_type = 1044 phy->att_dev_info & PORT_DEV_TYPE_MASK; 1045 1046 if (phy->identify.device_type == SAS_END_DEVICE) 1047 phy->identify.target_port_protocols = 1048 SAS_PROTOCOL_SSP; 1049 else if (phy->identify.device_type != SAS_PHY_UNUSED) 1050 phy->identify.target_port_protocols = 1051 SAS_PROTOCOL_SMP; 1052 if (oob_done) 1053 sas_phy->oob_mode = SAS_OOB_MODE; 1054 phy->frame_rcvd_size = 1055 sizeof(struct sas_identify_frame); 1056 } 1057 memcpy(sas_phy->attached_sas_addr, 1058 &phy->att_dev_sas_addr, SAS_ADDR_SIZE); 1059 1060 if (MVS_CHIP_DISP->phy_work_around) 1061 MVS_CHIP_DISP->phy_work_around(mvi, i); 1062 } 1063 mv_dprintk("phy %d attach dev info is %x\n", 1064 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); 1065 mv_dprintk("phy %d attach sas addr is %llx\n", 1066 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); 1067 out_done: 1068 if (get_st) 1069 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status); 1070 } 1071 1072 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock) 1073 { 1074 struct sas_ha_struct *sas_ha = sas_phy->ha; 1075 struct mvs_info *mvi = NULL; int i = 0, hi; 1076 struct mvs_phy *phy = sas_phy->lldd_phy; 1077 struct asd_sas_port *sas_port = sas_phy->port; 1078 struct mvs_port *port; 1079 unsigned long flags = 0; 1080 if (!sas_port) 1081 return; 1082 1083 while (sas_ha->sas_phy[i]) { 1084 if (sas_ha->sas_phy[i] == sas_phy) 1085 break; 1086 i++; 1087 } 1088 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; 1089 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi]; 1090 if (i >= mvi->chip->n_phy) 1091 port = &mvi->port[i - mvi->chip->n_phy]; 1092 else 1093 port = &mvi->port[i]; 1094 if (lock) 1095 spin_lock_irqsave(&mvi->lock, flags); 1096 port->port_attached = 1; 1097 phy->port = port; 1098 sas_port->lldd_port = port; 1099 if (phy->phy_type & PORT_TYPE_SAS) { 1100 port->wide_port_phymap = sas_port->phy_mask; 1101 mv_printk("set wide port phy map %x\n", sas_port->phy_mask); 1102 mvs_update_wideport(mvi, sas_phy->id); 1103 1104 /* direct attached SAS device */ 1105 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 1106 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 1107 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04); 1108 } 1109 } 1110 if (lock) 1111 spin_unlock_irqrestore(&mvi->lock, flags); 1112 } 1113 1114 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock) 1115 { 1116 struct domain_device *dev; 1117 struct mvs_phy *phy = sas_phy->lldd_phy; 1118 struct mvs_info *mvi = phy->mvi; 1119 struct asd_sas_port *port = sas_phy->port; 1120 int phy_no = 0; 1121 1122 while (phy != &mvi->phy[phy_no]) { 1123 phy_no++; 1124 if (phy_no >= MVS_MAX_PHYS) 1125 return; 1126 } 1127 list_for_each_entry(dev, &port->dev_list, dev_list_node) 1128 mvs_do_release_task(phy->mvi, phy_no, dev); 1129 1130 } 1131 1132 1133 void mvs_port_formed(struct asd_sas_phy *sas_phy) 1134 { 1135 mvs_port_notify_formed(sas_phy, 1); 1136 } 1137 1138 void mvs_port_deformed(struct asd_sas_phy *sas_phy) 1139 { 1140 mvs_port_notify_deformed(sas_phy, 1); 1141 } 1142 1143 static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi) 1144 { 1145 u32 dev; 1146 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) { 1147 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) { 1148 mvi->devices[dev].device_id = dev; 1149 return &mvi->devices[dev]; 1150 } 1151 } 1152 1153 if (dev == MVS_MAX_DEVICES) 1154 mv_printk("max support %d devices, ignore ..\n", 1155 MVS_MAX_DEVICES); 1156 1157 return NULL; 1158 } 1159 1160 static void mvs_free_dev(struct mvs_device *mvi_dev) 1161 { 1162 u32 id = mvi_dev->device_id; 1163 memset(mvi_dev, 0, sizeof(*mvi_dev)); 1164 mvi_dev->device_id = id; 1165 mvi_dev->dev_type = SAS_PHY_UNUSED; 1166 mvi_dev->dev_status = MVS_DEV_NORMAL; 1167 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED; 1168 } 1169 1170 static int mvs_dev_found_notify(struct domain_device *dev, int lock) 1171 { 1172 unsigned long flags = 0; 1173 int res = 0; 1174 struct mvs_info *mvi = NULL; 1175 struct domain_device *parent_dev = dev->parent; 1176 struct mvs_device *mvi_device; 1177 1178 mvi = mvs_find_dev_mvi(dev); 1179 1180 if (lock) 1181 spin_lock_irqsave(&mvi->lock, flags); 1182 1183 mvi_device = mvs_alloc_dev(mvi); 1184 if (!mvi_device) { 1185 res = -1; 1186 goto found_out; 1187 } 1188 dev->lldd_dev = mvi_device; 1189 mvi_device->dev_status = MVS_DEV_NORMAL; 1190 mvi_device->dev_type = dev->dev_type; 1191 mvi_device->mvi_info = mvi; 1192 mvi_device->sas_device = dev; 1193 if (parent_dev && dev_is_expander(parent_dev->dev_type)) { 1194 int phy_id; 1195 1196 phy_id = sas_find_attached_phy_id(&parent_dev->ex_dev, dev); 1197 if (phy_id < 0) { 1198 mv_printk("Error: no attached dev:%016llx" 1199 "at ex:%016llx.\n", 1200 SAS_ADDR(dev->sas_addr), 1201 SAS_ADDR(parent_dev->sas_addr)); 1202 res = phy_id; 1203 } else { 1204 mvi_device->attached_phy = phy_id; 1205 } 1206 } 1207 1208 found_out: 1209 if (lock) 1210 spin_unlock_irqrestore(&mvi->lock, flags); 1211 return res; 1212 } 1213 1214 int mvs_dev_found(struct domain_device *dev) 1215 { 1216 return mvs_dev_found_notify(dev, 1); 1217 } 1218 1219 static void mvs_dev_gone_notify(struct domain_device *dev) 1220 { 1221 unsigned long flags = 0; 1222 struct mvs_device *mvi_dev = dev->lldd_dev; 1223 struct mvs_info *mvi; 1224 1225 if (!mvi_dev) { 1226 mv_dprintk("found dev has gone.\n"); 1227 return; 1228 } 1229 1230 mvi = mvi_dev->mvi_info; 1231 1232 spin_lock_irqsave(&mvi->lock, flags); 1233 1234 mv_dprintk("found dev[%d:%x] is gone.\n", 1235 mvi_dev->device_id, mvi_dev->dev_type); 1236 mvs_release_task(mvi, dev); 1237 mvs_free_reg_set(mvi, mvi_dev); 1238 mvs_free_dev(mvi_dev); 1239 1240 dev->lldd_dev = NULL; 1241 mvi_dev->sas_device = NULL; 1242 1243 spin_unlock_irqrestore(&mvi->lock, flags); 1244 } 1245 1246 1247 void mvs_dev_gone(struct domain_device *dev) 1248 { 1249 mvs_dev_gone_notify(dev); 1250 } 1251 1252 /* Standard mandates link reset for ATA (type 0) 1253 and hard reset for SSP (type 1) , only for RECOVERY */ 1254 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev) 1255 { 1256 int rc; 1257 struct sas_phy *phy = sas_get_local_phy(dev); 1258 int reset_type = (dev->dev_type == SAS_SATA_DEV || 1259 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; 1260 rc = sas_phy_reset(phy, reset_type); 1261 sas_put_local_phy(phy); 1262 msleep(2000); 1263 return rc; 1264 } 1265 1266 /* mandatory SAM-3 */ 1267 int mvs_lu_reset(struct domain_device *dev, u8 *lun) 1268 { 1269 unsigned long flags; 1270 int rc = TMF_RESP_FUNC_FAILED; 1271 struct mvs_device * mvi_dev = dev->lldd_dev; 1272 struct mvs_info *mvi = mvi_dev->mvi_info; 1273 1274 mvi_dev->dev_status = MVS_DEV_EH; 1275 rc = sas_lu_reset(dev, lun); 1276 if (rc == TMF_RESP_FUNC_COMPLETE) { 1277 spin_lock_irqsave(&mvi->lock, flags); 1278 mvs_release_task(mvi, dev); 1279 spin_unlock_irqrestore(&mvi->lock, flags); 1280 } 1281 /* If failed, fall-through I_T_Nexus reset */ 1282 mv_printk("%s for device[%x]:rc= %d\n", __func__, 1283 mvi_dev->device_id, rc); 1284 return rc; 1285 } 1286 1287 int mvs_I_T_nexus_reset(struct domain_device *dev) 1288 { 1289 unsigned long flags; 1290 int rc = TMF_RESP_FUNC_FAILED; 1291 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1292 struct mvs_info *mvi = mvi_dev->mvi_info; 1293 1294 if (mvi_dev->dev_status != MVS_DEV_EH) 1295 return TMF_RESP_FUNC_COMPLETE; 1296 else 1297 mvi_dev->dev_status = MVS_DEV_NORMAL; 1298 rc = mvs_debug_I_T_nexus_reset(dev); 1299 mv_printk("%s for device[%x]:rc= %d\n", 1300 __func__, mvi_dev->device_id, rc); 1301 1302 spin_lock_irqsave(&mvi->lock, flags); 1303 mvs_release_task(mvi, dev); 1304 spin_unlock_irqrestore(&mvi->lock, flags); 1305 1306 return rc; 1307 } 1308 /* optional SAM-3 */ 1309 int mvs_query_task(struct sas_task *task) 1310 { 1311 u32 tag; 1312 int rc = TMF_RESP_FUNC_FAILED; 1313 1314 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1315 struct domain_device *dev = task->dev; 1316 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1317 struct mvs_info *mvi = mvi_dev->mvi_info; 1318 1319 rc = mvs_find_tag(mvi, task, &tag); 1320 if (rc == 0) { 1321 rc = TMF_RESP_FUNC_FAILED; 1322 return rc; 1323 } 1324 1325 rc = sas_query_task(task, tag); 1326 switch (rc) { 1327 /* The task is still in Lun, release it then */ 1328 case TMF_RESP_FUNC_SUCC: 1329 /* The task is not in Lun or failed, reset the phy */ 1330 case TMF_RESP_FUNC_FAILED: 1331 case TMF_RESP_FUNC_COMPLETE: 1332 break; 1333 } 1334 } 1335 mv_printk("%s:rc= %d\n", __func__, rc); 1336 return rc; 1337 } 1338 1339 /* mandatory SAM-3, still need free task/slot info */ 1340 int mvs_abort_task(struct sas_task *task) 1341 { 1342 struct domain_device *dev = task->dev; 1343 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1344 struct mvs_info *mvi; 1345 int rc = TMF_RESP_FUNC_FAILED; 1346 unsigned long flags; 1347 u32 tag; 1348 1349 if (!mvi_dev) { 1350 mv_printk("Device has removed\n"); 1351 return TMF_RESP_FUNC_FAILED; 1352 } 1353 1354 mvi = mvi_dev->mvi_info; 1355 1356 spin_lock_irqsave(&task->task_state_lock, flags); 1357 if (task->task_state_flags & SAS_TASK_STATE_DONE) { 1358 spin_unlock_irqrestore(&task->task_state_lock, flags); 1359 rc = TMF_RESP_FUNC_COMPLETE; 1360 goto out; 1361 } 1362 spin_unlock_irqrestore(&task->task_state_lock, flags); 1363 mvi_dev->dev_status = MVS_DEV_EH; 1364 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1365 rc = mvs_find_tag(mvi, task, &tag); 1366 if (rc == 0) { 1367 mv_printk("No such tag in %s\n", __func__); 1368 rc = TMF_RESP_FUNC_FAILED; 1369 return rc; 1370 } 1371 1372 rc = sas_abort_task(task, tag); 1373 1374 /* if successful, clear the task and callback forwards.*/ 1375 if (rc == TMF_RESP_FUNC_COMPLETE) { 1376 u32 slot_no; 1377 struct mvs_slot_info *slot; 1378 1379 if (task->lldd_task) { 1380 slot = task->lldd_task; 1381 slot_no = (u32) (slot - mvi->slot_info); 1382 spin_lock_irqsave(&mvi->lock, flags); 1383 mvs_slot_complete(mvi, slot_no, 1); 1384 spin_unlock_irqrestore(&mvi->lock, flags); 1385 } 1386 } 1387 1388 } else if (task->task_proto & SAS_PROTOCOL_SATA || 1389 task->task_proto & SAS_PROTOCOL_STP) { 1390 if (SAS_SATA_DEV == dev->dev_type) { 1391 struct mvs_slot_info *slot = task->lldd_task; 1392 u32 slot_idx = (u32)(slot - mvi->slot_info); 1393 mv_dprintk("mvs_abort_task() mvi=%p task=%p " 1394 "slot=%p slot_idx=x%x\n", 1395 mvi, task, slot, slot_idx); 1396 task->task_state_flags |= SAS_TASK_STATE_ABORTED; 1397 mvs_slot_task_free(mvi, task, slot, slot_idx); 1398 rc = TMF_RESP_FUNC_COMPLETE; 1399 goto out; 1400 } 1401 1402 } 1403 out: 1404 if (rc != TMF_RESP_FUNC_COMPLETE) 1405 mv_printk("%s:rc= %d\n", __func__, rc); 1406 return rc; 1407 } 1408 1409 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task, 1410 u32 slot_idx, int err) 1411 { 1412 struct mvs_device *mvi_dev = task->dev->lldd_dev; 1413 struct task_status_struct *tstat = &task->task_status; 1414 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf; 1415 int stat = SAM_STAT_GOOD; 1416 1417 1418 resp->frame_len = sizeof(struct dev_to_host_fis); 1419 memcpy(&resp->ending_fis[0], 1420 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset), 1421 sizeof(struct dev_to_host_fis)); 1422 tstat->buf_valid_size = sizeof(*resp); 1423 if (unlikely(err)) { 1424 if (unlikely(err & CMD_ISS_STPD)) 1425 stat = SAS_OPEN_REJECT; 1426 else 1427 stat = SAS_PROTO_RESPONSE; 1428 } 1429 1430 return stat; 1431 } 1432 1433 static void mvs_set_sense(u8 *buffer, int len, int d_sense, 1434 int key, int asc, int ascq) 1435 { 1436 memset(buffer, 0, len); 1437 1438 if (d_sense) { 1439 /* Descriptor format */ 1440 if (len < 4) { 1441 mv_printk("Length %d of sense buffer too small to " 1442 "fit sense %x:%x:%x", len, key, asc, ascq); 1443 } 1444 1445 buffer[0] = 0x72; /* Response Code */ 1446 if (len > 1) 1447 buffer[1] = key; /* Sense Key */ 1448 if (len > 2) 1449 buffer[2] = asc; /* ASC */ 1450 if (len > 3) 1451 buffer[3] = ascq; /* ASCQ */ 1452 } else { 1453 if (len < 14) { 1454 mv_printk("Length %d of sense buffer too small to " 1455 "fit sense %x:%x:%x", len, key, asc, ascq); 1456 } 1457 1458 buffer[0] = 0x70; /* Response Code */ 1459 if (len > 2) 1460 buffer[2] = key; /* Sense Key */ 1461 if (len > 7) 1462 buffer[7] = 0x0a; /* Additional Sense Length */ 1463 if (len > 12) 1464 buffer[12] = asc; /* ASC */ 1465 if (len > 13) 1466 buffer[13] = ascq; /* ASCQ */ 1467 } 1468 1469 return; 1470 } 1471 1472 static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu, 1473 u8 key, u8 asc, u8 asc_q) 1474 { 1475 iu->datapres = SAS_DATAPRES_SENSE_DATA; 1476 iu->response_data_len = 0; 1477 iu->sense_data_len = 17; 1478 iu->status = 02; 1479 mvs_set_sense(iu->sense_data, 17, 0, 1480 key, asc, asc_q); 1481 } 1482 1483 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task, 1484 u32 slot_idx) 1485 { 1486 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1487 int stat; 1488 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response); 1489 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1)); 1490 u32 tfs = 0; 1491 enum mvs_port_type type = PORT_TYPE_SAS; 1492 1493 if (err_dw0 & CMD_ISS_STPD) 1494 MVS_CHIP_DISP->issue_stop(mvi, type, tfs); 1495 1496 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1497 1498 stat = SAM_STAT_CHECK_CONDITION; 1499 switch (task->task_proto) { 1500 case SAS_PROTOCOL_SSP: 1501 { 1502 stat = SAS_ABORTED_TASK; 1503 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) { 1504 struct ssp_response_iu *iu = slot->response + 1505 sizeof(struct mvs_err_info); 1506 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01); 1507 sas_ssp_task_response(mvi->dev, task, iu); 1508 stat = SAM_STAT_CHECK_CONDITION; 1509 } 1510 if (err_dw1 & bit(31)) 1511 mv_printk("reuse same slot, retry command.\n"); 1512 break; 1513 } 1514 case SAS_PROTOCOL_SMP: 1515 stat = SAM_STAT_CHECK_CONDITION; 1516 break; 1517 1518 case SAS_PROTOCOL_SATA: 1519 case SAS_PROTOCOL_STP: 1520 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 1521 { 1522 task->ata_task.use_ncq = 0; 1523 stat = SAS_PROTO_RESPONSE; 1524 mvs_sata_done(mvi, task, slot_idx, err_dw0); 1525 } 1526 break; 1527 default: 1528 break; 1529 } 1530 1531 return stat; 1532 } 1533 1534 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags) 1535 { 1536 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 1537 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1538 struct sas_task *task = slot->task; 1539 struct mvs_device *mvi_dev = NULL; 1540 struct task_status_struct *tstat; 1541 struct domain_device *dev; 1542 u32 aborted; 1543 1544 void *to; 1545 enum exec_status sts; 1546 1547 if (unlikely(!task || !task->lldd_task || !task->dev)) 1548 return -1; 1549 1550 tstat = &task->task_status; 1551 dev = task->dev; 1552 mvi_dev = dev->lldd_dev; 1553 1554 spin_lock(&task->task_state_lock); 1555 task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 1556 task->task_state_flags |= SAS_TASK_STATE_DONE; 1557 /* race condition*/ 1558 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED; 1559 spin_unlock(&task->task_state_lock); 1560 1561 memset(tstat, 0, sizeof(*tstat)); 1562 tstat->resp = SAS_TASK_COMPLETE; 1563 1564 if (unlikely(aborted)) { 1565 tstat->stat = SAS_ABORTED_TASK; 1566 if (mvi_dev && mvi_dev->running_req) 1567 mvi_dev->running_req--; 1568 if (sas_protocol_ata(task->task_proto)) 1569 mvs_free_reg_set(mvi, mvi_dev); 1570 1571 mvs_slot_task_free(mvi, task, slot, slot_idx); 1572 return -1; 1573 } 1574 1575 /* when no device attaching, go ahead and complete by error handling*/ 1576 if (unlikely(!mvi_dev || flags)) { 1577 if (!mvi_dev) 1578 mv_dprintk("port has not device.\n"); 1579 tstat->stat = SAS_PHY_DOWN; 1580 goto out; 1581 } 1582 1583 /* 1584 * error info record present; slot->response is 32 bit aligned but may 1585 * not be 64 bit aligned, so check for zero in two 32 bit reads 1586 */ 1587 if (unlikely((rx_desc & RXQ_ERR) 1588 && (*((u32 *)slot->response) 1589 || *(((u32 *)slot->response) + 1)))) { 1590 mv_dprintk("port %d slot %d rx_desc %X has error info" 1591 "%016llX.\n", slot->port->sas_port.id, slot_idx, 1592 rx_desc, get_unaligned_le64(slot->response)); 1593 tstat->stat = mvs_slot_err(mvi, task, slot_idx); 1594 tstat->resp = SAS_TASK_COMPLETE; 1595 goto out; 1596 } 1597 1598 switch (task->task_proto) { 1599 case SAS_PROTOCOL_SSP: 1600 /* hw says status == 0, datapres == 0 */ 1601 if (rx_desc & RXQ_GOOD) { 1602 tstat->stat = SAS_SAM_STAT_GOOD; 1603 tstat->resp = SAS_TASK_COMPLETE; 1604 } 1605 /* response frame present */ 1606 else if (rx_desc & RXQ_RSP) { 1607 struct ssp_response_iu *iu = slot->response + 1608 sizeof(struct mvs_err_info); 1609 sas_ssp_task_response(mvi->dev, task, iu); 1610 } else 1611 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION; 1612 break; 1613 1614 case SAS_PROTOCOL_SMP: { 1615 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 1616 tstat->stat = SAS_SAM_STAT_GOOD; 1617 to = kmap_atomic(sg_page(sg_resp)); 1618 memcpy(to + sg_resp->offset, 1619 slot->response + sizeof(struct mvs_err_info), 1620 sg_dma_len(sg_resp)); 1621 kunmap_atomic(to); 1622 break; 1623 } 1624 1625 case SAS_PROTOCOL_SATA: 1626 case SAS_PROTOCOL_STP: 1627 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: { 1628 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0); 1629 break; 1630 } 1631 1632 default: 1633 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION; 1634 break; 1635 } 1636 if (!slot->port->port_attached) { 1637 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id); 1638 tstat->stat = SAS_PHY_DOWN; 1639 } 1640 1641 1642 out: 1643 if (mvi_dev && mvi_dev->running_req) { 1644 mvi_dev->running_req--; 1645 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req) 1646 mvs_free_reg_set(mvi, mvi_dev); 1647 } 1648 mvs_slot_task_free(mvi, task, slot, slot_idx); 1649 sts = tstat->stat; 1650 1651 spin_unlock(&mvi->lock); 1652 if (task->task_done) 1653 task->task_done(task); 1654 1655 spin_lock(&mvi->lock); 1656 1657 return sts; 1658 } 1659 1660 void mvs_do_release_task(struct mvs_info *mvi, 1661 int phy_no, struct domain_device *dev) 1662 { 1663 u32 slot_idx; 1664 struct mvs_phy *phy; 1665 struct mvs_port *port; 1666 struct mvs_slot_info *slot, *slot2; 1667 1668 phy = &mvi->phy[phy_no]; 1669 port = phy->port; 1670 if (!port) 1671 return; 1672 /* clean cmpl queue in case request is already finished */ 1673 mvs_int_rx(mvi, false); 1674 1675 1676 1677 list_for_each_entry_safe(slot, slot2, &port->list, entry) { 1678 struct sas_task *task; 1679 slot_idx = (u32) (slot - mvi->slot_info); 1680 task = slot->task; 1681 1682 if (dev && task->dev != dev) 1683 continue; 1684 1685 mv_printk("Release slot [%x] tag[%x], task [%p]:\n", 1686 slot_idx, slot->slot_tag, task); 1687 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1688 1689 mvs_slot_complete(mvi, slot_idx, 1); 1690 } 1691 } 1692 1693 void mvs_release_task(struct mvs_info *mvi, 1694 struct domain_device *dev) 1695 { 1696 int i, phyno[WIDE_PORT_MAX_PHY], num; 1697 num = mvs_find_dev_phyno(dev, phyno); 1698 for (i = 0; i < num; i++) 1699 mvs_do_release_task(mvi, phyno[i], dev); 1700 } 1701 1702 static void mvs_phy_disconnected(struct mvs_phy *phy) 1703 { 1704 phy->phy_attached = 0; 1705 phy->att_dev_info = 0; 1706 phy->att_dev_sas_addr = 0; 1707 } 1708 1709 static void mvs_work_queue(struct work_struct *work) 1710 { 1711 struct delayed_work *dw = container_of(work, struct delayed_work, work); 1712 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); 1713 struct mvs_info *mvi = mwq->mvi; 1714 unsigned long flags; 1715 u32 phy_no = (unsigned long) mwq->data; 1716 struct mvs_phy *phy = &mvi->phy[phy_no]; 1717 struct asd_sas_phy *sas_phy = &phy->sas_phy; 1718 1719 spin_lock_irqsave(&mvi->lock, flags); 1720 if (mwq->handler & PHY_PLUG_EVENT) { 1721 1722 if (phy->phy_event & PHY_PLUG_OUT) { 1723 u32 tmp; 1724 1725 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no); 1726 phy->phy_event &= ~PHY_PLUG_OUT; 1727 if (!(tmp & PHY_READY_MASK)) { 1728 sas_phy_disconnected(sas_phy); 1729 mvs_phy_disconnected(phy); 1730 sas_notify_phy_event(sas_phy, 1731 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); 1732 mv_dprintk("phy%d Removed Device\n", phy_no); 1733 } else { 1734 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 1735 mvs_update_phyinfo(mvi, phy_no, 1); 1736 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC); 1737 mvs_port_notify_formed(sas_phy, 0); 1738 mv_dprintk("phy%d Attached Device\n", phy_no); 1739 } 1740 } 1741 } else if (mwq->handler & EXP_BRCT_CHG) { 1742 phy->phy_event &= ~EXP_BRCT_CHG; 1743 sas_notify_port_event(sas_phy, 1744 PORTE_BROADCAST_RCVD, GFP_ATOMIC); 1745 mv_dprintk("phy%d Got Broadcast Change\n", phy_no); 1746 } 1747 list_del(&mwq->entry); 1748 spin_unlock_irqrestore(&mvi->lock, flags); 1749 kfree(mwq); 1750 } 1751 1752 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler) 1753 { 1754 struct mvs_wq *mwq; 1755 int ret = 0; 1756 1757 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC); 1758 if (mwq) { 1759 mwq->mvi = mvi; 1760 mwq->data = data; 1761 mwq->handler = handler; 1762 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq); 1763 list_add_tail(&mwq->entry, &mvi->wq_list); 1764 schedule_delayed_work(&mwq->work_q, HZ * 2); 1765 } else 1766 ret = -ENOMEM; 1767 1768 return ret; 1769 } 1770 1771 static void mvs_sig_time_out(struct timer_list *t) 1772 { 1773 struct mvs_phy *phy = from_timer(phy, t, timer); 1774 struct mvs_info *mvi = phy->mvi; 1775 u8 phy_no; 1776 1777 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) { 1778 if (&mvi->phy[phy_no] == phy) { 1779 mv_dprintk("Get signature time out, reset phy %d\n", 1780 phy_no+mvi->id*mvi->chip->n_phy); 1781 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET); 1782 } 1783 } 1784 } 1785 1786 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) 1787 { 1788 u32 tmp; 1789 struct mvs_phy *phy = &mvi->phy[phy_no]; 1790 1791 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no); 1792 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status); 1793 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy, 1794 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no)); 1795 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy, 1796 phy->irq_status); 1797 1798 /* 1799 * events is port event now , 1800 * we need check the interrupt status which belongs to per port. 1801 */ 1802 1803 if (phy->irq_status & PHYEV_DCDR_ERR) { 1804 mv_dprintk("phy %d STP decoding error.\n", 1805 phy_no + mvi->id*mvi->chip->n_phy); 1806 } 1807 1808 if (phy->irq_status & PHYEV_POOF) { 1809 mdelay(500); 1810 if (!(phy->phy_event & PHY_PLUG_OUT)) { 1811 int dev_sata = phy->phy_type & PORT_TYPE_SATA; 1812 int ready; 1813 mvs_do_release_task(mvi, phy_no, NULL); 1814 phy->phy_event |= PHY_PLUG_OUT; 1815 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1); 1816 mvs_handle_event(mvi, 1817 (void *)(unsigned long)phy_no, 1818 PHY_PLUG_EVENT); 1819 ready = mvs_is_phy_ready(mvi, phy_no); 1820 if (ready || dev_sata) { 1821 if (MVS_CHIP_DISP->stp_reset) 1822 MVS_CHIP_DISP->stp_reset(mvi, 1823 phy_no); 1824 else 1825 MVS_CHIP_DISP->phy_reset(mvi, 1826 phy_no, MVS_SOFT_RESET); 1827 return; 1828 } 1829 } 1830 } 1831 1832 if (phy->irq_status & PHYEV_COMWAKE) { 1833 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no); 1834 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no, 1835 tmp | PHYEV_SIG_FIS); 1836 if (phy->timer.function == NULL) { 1837 phy->timer.function = mvs_sig_time_out; 1838 phy->timer.expires = jiffies + 5*HZ; 1839 add_timer(&phy->timer); 1840 } 1841 } 1842 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) { 1843 phy->phy_status = mvs_is_phy_ready(mvi, phy_no); 1844 mv_dprintk("notify plug in on phy[%d]\n", phy_no); 1845 if (phy->phy_status) { 1846 mdelay(10); 1847 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 1848 if (phy->phy_type & PORT_TYPE_SATA) { 1849 tmp = MVS_CHIP_DISP->read_port_irq_mask( 1850 mvi, phy_no); 1851 tmp &= ~PHYEV_SIG_FIS; 1852 MVS_CHIP_DISP->write_port_irq_mask(mvi, 1853 phy_no, tmp); 1854 } 1855 mvs_update_phyinfo(mvi, phy_no, 0); 1856 if (phy->phy_type & PORT_TYPE_SAS) { 1857 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE); 1858 mdelay(10); 1859 } 1860 1861 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC); 1862 /* whether driver is going to handle hot plug */ 1863 if (phy->phy_event & PHY_PLUG_OUT) { 1864 mvs_port_notify_formed(&phy->sas_phy, 0); 1865 phy->phy_event &= ~PHY_PLUG_OUT; 1866 } 1867 } else { 1868 mv_dprintk("plugin interrupt but phy%d is gone\n", 1869 phy_no + mvi->id*mvi->chip->n_phy); 1870 } 1871 } else if (phy->irq_status & PHYEV_BROAD_CH) { 1872 mv_dprintk("phy %d broadcast change.\n", 1873 phy_no + mvi->id*mvi->chip->n_phy); 1874 mvs_handle_event(mvi, (void *)(unsigned long)phy_no, 1875 EXP_BRCT_CHG); 1876 } 1877 } 1878 1879 int mvs_int_rx(struct mvs_info *mvi, bool self_clear) 1880 { 1881 u32 rx_prod_idx, rx_desc; 1882 bool attn = false; 1883 1884 /* the first dword in the RX ring is special: it contains 1885 * a mirror of the hardware's RX producer index, so that 1886 * we don't have to stall the CPU reading that register. 1887 * The actual RX ring is offset by one dword, due to this. 1888 */ 1889 rx_prod_idx = mvi->rx_cons; 1890 mvi->rx_cons = le32_to_cpu(mvi->rx[0]); 1891 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */ 1892 return 0; 1893 1894 /* The CMPL_Q may come late, read from register and try again 1895 * note: if coalescing is enabled, 1896 * it will need to read from register every time for sure 1897 */ 1898 if (unlikely(mvi->rx_cons == rx_prod_idx)) 1899 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK; 1900 1901 if (mvi->rx_cons == rx_prod_idx) 1902 return 0; 1903 1904 while (mvi->rx_cons != rx_prod_idx) { 1905 /* increment our internal RX consumer pointer */ 1906 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1); 1907 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]); 1908 1909 if (likely(rx_desc & RXQ_DONE)) 1910 mvs_slot_complete(mvi, rx_desc, 0); 1911 if (rx_desc & RXQ_ATTN) { 1912 attn = true; 1913 } else if (rx_desc & RXQ_ERR) { 1914 if (!(rx_desc & RXQ_DONE)) 1915 mvs_slot_complete(mvi, rx_desc, 0); 1916 } else if (rx_desc & RXQ_SLOT_RESET) { 1917 mvs_slot_free(mvi, rx_desc); 1918 } 1919 } 1920 1921 if (attn && self_clear) 1922 MVS_CHIP_DISP->int_full(mvi); 1923 return 0; 1924 } 1925 1926 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index, 1927 u8 reg_count, u8 *write_data) 1928 { 1929 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 1930 struct mvs_info *mvi = mvs_prv->mvi[0]; 1931 1932 if (MVS_CHIP_DISP->gpio_write) { 1933 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type, 1934 reg_index, reg_count, write_data); 1935 } 1936 1937 return -ENOSYS; 1938 } 1939