1 /* 2 * Marvell 88SE64xx/88SE94xx main function 3 * 4 * Copyright 2007 Red Hat, Inc. 5 * Copyright 2008 Marvell. <kewei@marvell.com> 6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com> 7 * 8 * This file is licensed under GPLv2. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; version 2 of the 13 * License. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 23 * USA 24 */ 25 26 #include "mv_sas.h" 27 28 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag) 29 { 30 if (task->lldd_task) { 31 struct mvs_slot_info *slot; 32 slot = task->lldd_task; 33 *tag = slot->slot_tag; 34 return 1; 35 } 36 return 0; 37 } 38 39 void mvs_tag_clear(struct mvs_info *mvi, u32 tag) 40 { 41 void *bitmap = mvi->tags; 42 clear_bit(tag, bitmap); 43 } 44 45 void mvs_tag_free(struct mvs_info *mvi, u32 tag) 46 { 47 mvs_tag_clear(mvi, tag); 48 } 49 50 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag) 51 { 52 void *bitmap = mvi->tags; 53 set_bit(tag, bitmap); 54 } 55 56 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out) 57 { 58 unsigned int index, tag; 59 void *bitmap = mvi->tags; 60 61 index = find_first_zero_bit(bitmap, mvi->tags_num); 62 tag = index; 63 if (tag >= mvi->tags_num) 64 return -SAS_QUEUE_FULL; 65 mvs_tag_set(mvi, tag); 66 *tag_out = tag; 67 return 0; 68 } 69 70 void mvs_tag_init(struct mvs_info *mvi) 71 { 72 int i; 73 for (i = 0; i < mvi->tags_num; ++i) 74 mvs_tag_clear(mvi, i); 75 } 76 77 struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev) 78 { 79 unsigned long i = 0, j = 0, hi = 0; 80 struct sas_ha_struct *sha = dev->port->ha; 81 struct mvs_info *mvi = NULL; 82 struct asd_sas_phy *phy; 83 84 while (sha->sas_port[i]) { 85 if (sha->sas_port[i] == dev->port) { 86 phy = container_of(sha->sas_port[i]->phy_list.next, 87 struct asd_sas_phy, port_phy_el); 88 j = 0; 89 while (sha->sas_phy[j]) { 90 if (sha->sas_phy[j] == phy) 91 break; 92 j++; 93 } 94 break; 95 } 96 i++; 97 } 98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 99 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 100 101 return mvi; 102 103 } 104 105 int mvs_find_dev_phyno(struct domain_device *dev, int *phyno) 106 { 107 unsigned long i = 0, j = 0, n = 0, num = 0; 108 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 109 struct mvs_info *mvi = mvi_dev->mvi_info; 110 struct sas_ha_struct *sha = dev->port->ha; 111 112 while (sha->sas_port[i]) { 113 if (sha->sas_port[i] == dev->port) { 114 struct asd_sas_phy *phy; 115 list_for_each_entry(phy, 116 &sha->sas_port[i]->phy_list, port_phy_el) { 117 j = 0; 118 while (sha->sas_phy[j]) { 119 if (sha->sas_phy[j] == phy) 120 break; 121 j++; 122 } 123 phyno[n] = (j >= mvi->chip->n_phy) ? 124 (j - mvi->chip->n_phy) : j; 125 num++; 126 n++; 127 } 128 break; 129 } 130 i++; 131 } 132 return num; 133 } 134 135 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, 136 u8 reg_set) 137 { 138 u32 dev_no; 139 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) { 140 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED) 141 continue; 142 143 if (mvi->devices[dev_no].taskfileset == reg_set) 144 return &mvi->devices[dev_no]; 145 } 146 return NULL; 147 } 148 149 static inline void mvs_free_reg_set(struct mvs_info *mvi, 150 struct mvs_device *dev) 151 { 152 if (!dev) { 153 mv_printk("device has been free.\n"); 154 return; 155 } 156 if (dev->taskfileset == MVS_ID_NOT_MAPPED) 157 return; 158 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset); 159 } 160 161 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi, 162 struct mvs_device *dev) 163 { 164 if (dev->taskfileset != MVS_ID_NOT_MAPPED) 165 return 0; 166 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset); 167 } 168 169 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard) 170 { 171 u32 no; 172 for_each_phy(phy_mask, phy_mask, no) { 173 if (!(phy_mask & 1)) 174 continue; 175 MVS_CHIP_DISP->phy_reset(mvi, no, hard); 176 } 177 } 178 179 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, 180 void *funcdata) 181 { 182 int rc = 0, phy_id = sas_phy->id; 183 u32 tmp, i = 0, hi; 184 struct sas_ha_struct *sha = sas_phy->ha; 185 struct mvs_info *mvi = NULL; 186 187 while (sha->sas_phy[i]) { 188 if (sha->sas_phy[i] == sas_phy) 189 break; 190 i++; 191 } 192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 193 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 194 195 switch (func) { 196 case PHY_FUNC_SET_LINK_RATE: 197 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata); 198 break; 199 200 case PHY_FUNC_HARD_RESET: 201 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id); 202 if (tmp & PHY_RST_HARD) 203 break; 204 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET); 205 break; 206 207 case PHY_FUNC_LINK_RESET: 208 MVS_CHIP_DISP->phy_enable(mvi, phy_id); 209 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET); 210 break; 211 212 case PHY_FUNC_DISABLE: 213 MVS_CHIP_DISP->phy_disable(mvi, phy_id); 214 break; 215 case PHY_FUNC_RELEASE_SPINUP_HOLD: 216 default: 217 rc = -ENOSYS; 218 } 219 msleep(200); 220 return rc; 221 } 222 223 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo, 224 u32 off_hi, u64 sas_addr) 225 { 226 u32 lo = (u32)sas_addr; 227 u32 hi = (u32)(sas_addr>>32); 228 229 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo); 230 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo); 231 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi); 232 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); 233 } 234 235 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) 236 { 237 struct mvs_phy *phy = &mvi->phy[i]; 238 struct asd_sas_phy *sas_phy = &phy->sas_phy; 239 struct sas_ha_struct *sas_ha; 240 if (!phy->phy_attached) 241 return; 242 243 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK) 244 && phy->phy_type & PORT_TYPE_SAS) { 245 return; 246 } 247 248 sas_ha = mvi->sas; 249 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); 250 251 if (sas_phy->phy) { 252 struct sas_phy *sphy = sas_phy->phy; 253 254 sphy->negotiated_linkrate = sas_phy->linkrate; 255 sphy->minimum_linkrate = phy->minimum_linkrate; 256 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; 257 sphy->maximum_linkrate = phy->maximum_linkrate; 258 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate(); 259 } 260 261 if (phy->phy_type & PORT_TYPE_SAS) { 262 struct sas_identify_frame *id; 263 264 id = (struct sas_identify_frame *)phy->frame_rcvd; 265 id->dev_type = phy->identify.device_type; 266 id->initiator_bits = SAS_PROTOCOL_ALL; 267 id->target_bits = phy->identify.target_port_protocols; 268 269 /* direct attached SAS device */ 270 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 271 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 272 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00); 273 } 274 } else if (phy->phy_type & PORT_TYPE_SATA) { 275 /*Nothing*/ 276 } 277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); 278 279 sas_phy->frame_rcvd_size = phy->frame_rcvd_size; 280 281 mvi->sas->notify_port_event(sas_phy, 282 PORTE_BYTES_DMAED); 283 } 284 285 void mvs_scan_start(struct Scsi_Host *shost) 286 { 287 int i, j; 288 unsigned short core_nr; 289 struct mvs_info *mvi; 290 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 291 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 292 293 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; 294 295 for (j = 0; j < core_nr; j++) { 296 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; 297 for (i = 0; i < mvi->chip->n_phy; ++i) 298 mvs_bytes_dmaed(mvi, i); 299 } 300 mvs_prv->scan_finished = 1; 301 } 302 303 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time) 304 { 305 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 306 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 307 308 if (mvs_prv->scan_finished == 0) 309 return 0; 310 311 sas_drain_work(sha); 312 return 1; 313 } 314 315 static int mvs_task_prep_smp(struct mvs_info *mvi, 316 struct mvs_task_exec_info *tei) 317 { 318 int elem, rc, i; 319 struct sas_ha_struct *sha = mvi->sas; 320 struct sas_task *task = tei->task; 321 struct mvs_cmd_hdr *hdr = tei->hdr; 322 struct domain_device *dev = task->dev; 323 struct asd_sas_port *sas_port = dev->port; 324 struct sas_phy *sphy = dev->phy; 325 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number]; 326 struct scatterlist *sg_req, *sg_resp; 327 u32 req_len, resp_len, tag = tei->tag; 328 void *buf_tmp; 329 u8 *buf_oaf; 330 dma_addr_t buf_tmp_dma; 331 void *buf_prd; 332 struct mvs_slot_info *slot = &mvi->slot_info[tag]; 333 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 334 335 /* 336 * DMA-map SMP request, response buffers 337 */ 338 sg_req = &task->smp_task.smp_req; 339 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE); 340 if (!elem) 341 return -ENOMEM; 342 req_len = sg_dma_len(sg_req); 343 344 sg_resp = &task->smp_task.smp_resp; 345 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE); 346 if (!elem) { 347 rc = -ENOMEM; 348 goto err_out; 349 } 350 resp_len = SB_RFB_MAX; 351 352 /* must be in dwords */ 353 if ((req_len & 0x3) || (resp_len & 0x3)) { 354 rc = -EINVAL; 355 goto err_out_2; 356 } 357 358 /* 359 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 360 */ 361 362 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */ 363 buf_tmp = slot->buf; 364 buf_tmp_dma = slot->buf_dma; 365 366 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req)); 367 368 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 369 buf_oaf = buf_tmp; 370 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 371 372 buf_tmp += MVS_OAF_SZ; 373 buf_tmp_dma += MVS_OAF_SZ; 374 375 /* region 3: PRD table *********************************** */ 376 buf_prd = buf_tmp; 377 if (tei->n_elem) 378 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 379 else 380 hdr->prd_tbl = 0; 381 382 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 383 buf_tmp += i; 384 buf_tmp_dma += i; 385 386 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 387 slot->response = buf_tmp; 388 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 389 if (mvi->flags & MVF_FLAG_SOC) 390 hdr->reserved[0] = 0; 391 392 /* 393 * Fill in TX ring and command slot header 394 */ 395 slot->tx = mvi->tx_prod; 396 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) | 397 TXQ_MODE_I | tag | 398 (MVS_PHY_ID << TXQ_PHY_SHIFT)); 399 400 hdr->flags |= flags; 401 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4)); 402 hdr->tags = cpu_to_le32(tag); 403 hdr->data_len = 0; 404 405 /* generate open address frame hdr (first 12 bytes) */ 406 /* initiator, SMP, ftype 1h */ 407 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01; 408 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 409 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */ 410 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 411 412 /* fill in PRD (scatter/gather) table, if any */ 413 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 414 415 return 0; 416 417 err_out_2: 418 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1, 419 PCI_DMA_FROMDEVICE); 420 err_out: 421 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1, 422 PCI_DMA_TODEVICE); 423 return rc; 424 } 425 426 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag) 427 { 428 struct ata_queued_cmd *qc = task->uldd_task; 429 430 if (qc) { 431 if (qc->tf.command == ATA_CMD_FPDMA_WRITE || 432 qc->tf.command == ATA_CMD_FPDMA_READ || 433 qc->tf.command == ATA_CMD_FPDMA_RECV || 434 qc->tf.command == ATA_CMD_FPDMA_SEND || 435 qc->tf.command == ATA_CMD_NCQ_NON_DATA) { 436 *tag = qc->tag; 437 return 1; 438 } 439 } 440 441 return 0; 442 } 443 444 static int mvs_task_prep_ata(struct mvs_info *mvi, 445 struct mvs_task_exec_info *tei) 446 { 447 struct sas_task *task = tei->task; 448 struct domain_device *dev = task->dev; 449 struct mvs_device *mvi_dev = dev->lldd_dev; 450 struct mvs_cmd_hdr *hdr = tei->hdr; 451 struct asd_sas_port *sas_port = dev->port; 452 struct mvs_slot_info *slot; 453 void *buf_prd; 454 u32 tag = tei->tag, hdr_tag; 455 u32 flags, del_q; 456 void *buf_tmp; 457 u8 *buf_cmd, *buf_oaf; 458 dma_addr_t buf_tmp_dma; 459 u32 i, req_len, resp_len; 460 const u32 max_resp_len = SB_RFB_MAX; 461 462 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) { 463 mv_dprintk("Have not enough regiset for dev %d.\n", 464 mvi_dev->device_id); 465 return -EBUSY; 466 } 467 slot = &mvi->slot_info[tag]; 468 slot->tx = mvi->tx_prod; 469 del_q = TXQ_MODE_I | tag | 470 (TXQ_CMD_STP << TXQ_CMD_SHIFT) | 471 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) | 472 (mvi_dev->taskfileset << TXQ_SRS_SHIFT); 473 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q); 474 475 if (task->data_dir == DMA_FROM_DEVICE) 476 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT); 477 else 478 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 479 480 if (task->ata_task.use_ncq) 481 flags |= MCH_FPDMA; 482 if (dev->sata_dev.class == ATA_DEV_ATAPI) { 483 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI) 484 flags |= MCH_ATAPI; 485 } 486 487 hdr->flags = cpu_to_le32(flags); 488 489 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag)) 490 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 491 else 492 hdr_tag = tag; 493 494 hdr->tags = cpu_to_le32(hdr_tag); 495 496 hdr->data_len = cpu_to_le32(task->total_xfer_len); 497 498 /* 499 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 500 */ 501 502 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */ 503 buf_cmd = buf_tmp = slot->buf; 504 buf_tmp_dma = slot->buf_dma; 505 506 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 507 508 buf_tmp += MVS_ATA_CMD_SZ; 509 buf_tmp_dma += MVS_ATA_CMD_SZ; 510 511 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 512 /* used for STP. unused for SATA? */ 513 buf_oaf = buf_tmp; 514 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 515 516 buf_tmp += MVS_OAF_SZ; 517 buf_tmp_dma += MVS_OAF_SZ; 518 519 /* region 3: PRD table ********************************************* */ 520 buf_prd = buf_tmp; 521 522 if (tei->n_elem) 523 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 524 else 525 hdr->prd_tbl = 0; 526 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count(); 527 528 buf_tmp += i; 529 buf_tmp_dma += i; 530 531 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 532 slot->response = buf_tmp; 533 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 534 if (mvi->flags & MVF_FLAG_SOC) 535 hdr->reserved[0] = 0; 536 537 req_len = sizeof(struct host_to_dev_fis); 538 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ - 539 sizeof(struct mvs_err_info) - i; 540 541 /* request, response lengths */ 542 resp_len = min(resp_len, max_resp_len); 543 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 544 545 if (likely(!task->ata_task.device_control_reg_update)) 546 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */ 547 /* fill in command FIS and ATAPI CDB */ 548 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); 549 if (dev->sata_dev.class == ATA_DEV_ATAPI) 550 memcpy(buf_cmd + STP_ATAPI_CMD, 551 task->ata_task.atapi_packet, 16); 552 553 /* generate open address frame hdr (first 12 bytes) */ 554 /* initiator, STP, ftype 1h */ 555 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1; 556 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 557 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 558 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 559 560 /* fill in PRD (scatter/gather) table, if any */ 561 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 562 563 if (task->data_dir == DMA_FROM_DEVICE) 564 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask, 565 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd); 566 567 return 0; 568 } 569 570 static int mvs_task_prep_ssp(struct mvs_info *mvi, 571 struct mvs_task_exec_info *tei, int is_tmf, 572 struct mvs_tmf_task *tmf) 573 { 574 struct sas_task *task = tei->task; 575 struct mvs_cmd_hdr *hdr = tei->hdr; 576 struct mvs_port *port = tei->port; 577 struct domain_device *dev = task->dev; 578 struct mvs_device *mvi_dev = dev->lldd_dev; 579 struct asd_sas_port *sas_port = dev->port; 580 struct mvs_slot_info *slot; 581 void *buf_prd; 582 struct ssp_frame_hdr *ssp_hdr; 583 void *buf_tmp; 584 u8 *buf_cmd, *buf_oaf, fburst = 0; 585 dma_addr_t buf_tmp_dma; 586 u32 flags; 587 u32 resp_len, req_len, i, tag = tei->tag; 588 const u32 max_resp_len = SB_RFB_MAX; 589 u32 phy_mask; 590 591 slot = &mvi->slot_info[tag]; 592 593 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap : 594 sas_port->phy_mask) & TXQ_PHY_MASK; 595 596 slot->tx = mvi->tx_prod; 597 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag | 598 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) | 599 (phy_mask << TXQ_PHY_SHIFT)); 600 601 flags = MCH_RETRY; 602 if (task->ssp_task.enable_first_burst) { 603 flags |= MCH_FBURST; 604 fburst = (1 << 7); 605 } 606 if (is_tmf) 607 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT); 608 else 609 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT); 610 611 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT)); 612 hdr->tags = cpu_to_le32(tag); 613 hdr->data_len = cpu_to_le32(task->total_xfer_len); 614 615 /* 616 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 617 */ 618 619 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */ 620 buf_cmd = buf_tmp = slot->buf; 621 buf_tmp_dma = slot->buf_dma; 622 623 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 624 625 buf_tmp += MVS_SSP_CMD_SZ; 626 buf_tmp_dma += MVS_SSP_CMD_SZ; 627 628 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 629 buf_oaf = buf_tmp; 630 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 631 632 buf_tmp += MVS_OAF_SZ; 633 buf_tmp_dma += MVS_OAF_SZ; 634 635 /* region 3: PRD table ********************************************* */ 636 buf_prd = buf_tmp; 637 if (tei->n_elem) 638 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 639 else 640 hdr->prd_tbl = 0; 641 642 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 643 buf_tmp += i; 644 buf_tmp_dma += i; 645 646 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 647 slot->response = buf_tmp; 648 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 649 if (mvi->flags & MVF_FLAG_SOC) 650 hdr->reserved[0] = 0; 651 652 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ - 653 sizeof(struct mvs_err_info) - i; 654 resp_len = min(resp_len, max_resp_len); 655 656 req_len = sizeof(struct ssp_frame_hdr) + 28; 657 658 /* request, response lengths */ 659 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 660 661 /* generate open address frame hdr (first 12 bytes) */ 662 /* initiator, SSP, ftype 1h */ 663 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1; 664 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 665 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 666 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 667 668 /* fill in SSP frame header (Command Table.SSP frame header) */ 669 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd; 670 671 if (is_tmf) 672 ssp_hdr->frame_type = SSP_TASK; 673 else 674 ssp_hdr->frame_type = SSP_COMMAND; 675 676 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr, 677 HASHED_SAS_ADDR_SIZE); 678 memcpy(ssp_hdr->hashed_src_addr, 679 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); 680 ssp_hdr->tag = cpu_to_be16(tag); 681 682 /* fill in IU for TASK and Command Frame */ 683 buf_cmd += sizeof(*ssp_hdr); 684 memcpy(buf_cmd, &task->ssp_task.LUN, 8); 685 686 if (ssp_hdr->frame_type != SSP_TASK) { 687 buf_cmd[9] = fburst | task->ssp_task.task_attr | 688 (task->ssp_task.task_prio << 3); 689 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd, 690 task->ssp_task.cmd->cmd_len); 691 } else{ 692 buf_cmd[10] = tmf->tmf; 693 switch (tmf->tmf) { 694 case TMF_ABORT_TASK: 695 case TMF_QUERY_TASK: 696 buf_cmd[12] = 697 (tmf->tag_of_task_to_be_managed >> 8) & 0xff; 698 buf_cmd[13] = 699 tmf->tag_of_task_to_be_managed & 0xff; 700 break; 701 default: 702 break; 703 } 704 } 705 /* fill in PRD (scatter/gather) table, if any */ 706 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 707 return 0; 708 } 709 710 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED))) 711 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf, 712 struct mvs_tmf_task *tmf, int *pass) 713 { 714 struct domain_device *dev = task->dev; 715 struct mvs_device *mvi_dev = dev->lldd_dev; 716 struct mvs_task_exec_info tei; 717 struct mvs_slot_info *slot; 718 u32 tag = 0xdeadbeef, n_elem = 0; 719 int rc = 0; 720 721 if (!dev->port) { 722 struct task_status_struct *tsm = &task->task_status; 723 724 tsm->resp = SAS_TASK_UNDELIVERED; 725 tsm->stat = SAS_PHY_DOWN; 726 /* 727 * libsas will use dev->port, should 728 * not call task_done for sata 729 */ 730 if (dev->dev_type != SAS_SATA_DEV) 731 task->task_done(task); 732 return rc; 733 } 734 735 if (DEV_IS_GONE(mvi_dev)) { 736 if (mvi_dev) 737 mv_dprintk("device %d not ready.\n", 738 mvi_dev->device_id); 739 else 740 mv_dprintk("device %016llx not ready.\n", 741 SAS_ADDR(dev->sas_addr)); 742 743 rc = SAS_PHY_DOWN; 744 return rc; 745 } 746 tei.port = dev->port->lldd_port; 747 if (tei.port && !tei.port->port_attached && !tmf) { 748 if (sas_protocol_ata(task->task_proto)) { 749 struct task_status_struct *ts = &task->task_status; 750 mv_dprintk("SATA/STP port %d does not attach" 751 "device.\n", dev->port->id); 752 ts->resp = SAS_TASK_COMPLETE; 753 ts->stat = SAS_PHY_DOWN; 754 755 task->task_done(task); 756 757 } else { 758 struct task_status_struct *ts = &task->task_status; 759 mv_dprintk("SAS port %d does not attach" 760 "device.\n", dev->port->id); 761 ts->resp = SAS_TASK_UNDELIVERED; 762 ts->stat = SAS_PHY_DOWN; 763 task->task_done(task); 764 } 765 return rc; 766 } 767 768 if (!sas_protocol_ata(task->task_proto)) { 769 if (task->num_scatter) { 770 n_elem = dma_map_sg(mvi->dev, 771 task->scatter, 772 task->num_scatter, 773 task->data_dir); 774 if (!n_elem) { 775 rc = -ENOMEM; 776 goto prep_out; 777 } 778 } 779 } else { 780 n_elem = task->num_scatter; 781 } 782 783 rc = mvs_tag_alloc(mvi, &tag); 784 if (rc) 785 goto err_out; 786 787 slot = &mvi->slot_info[tag]; 788 789 task->lldd_task = NULL; 790 slot->n_elem = n_elem; 791 slot->slot_tag = tag; 792 793 slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma); 794 if (!slot->buf) 795 goto err_out_tag; 796 memset(slot->buf, 0, MVS_SLOT_BUF_SZ); 797 798 tei.task = task; 799 tei.hdr = &mvi->slot[tag]; 800 tei.tag = tag; 801 tei.n_elem = n_elem; 802 switch (task->task_proto) { 803 case SAS_PROTOCOL_SMP: 804 rc = mvs_task_prep_smp(mvi, &tei); 805 break; 806 case SAS_PROTOCOL_SSP: 807 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf); 808 break; 809 case SAS_PROTOCOL_SATA: 810 case SAS_PROTOCOL_STP: 811 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 812 rc = mvs_task_prep_ata(mvi, &tei); 813 break; 814 default: 815 dev_printk(KERN_ERR, mvi->dev, 816 "unknown sas_task proto: 0x%x\n", 817 task->task_proto); 818 rc = -EINVAL; 819 break; 820 } 821 822 if (rc) { 823 mv_dprintk("rc is %x\n", rc); 824 goto err_out_slot_buf; 825 } 826 slot->task = task; 827 slot->port = tei.port; 828 task->lldd_task = slot; 829 list_add_tail(&slot->entry, &tei.port->list); 830 spin_lock(&task->task_state_lock); 831 task->task_state_flags |= SAS_TASK_AT_INITIATOR; 832 spin_unlock(&task->task_state_lock); 833 834 mvi_dev->running_req++; 835 ++(*pass); 836 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1); 837 838 return rc; 839 840 err_out_slot_buf: 841 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 842 err_out_tag: 843 mvs_tag_free(mvi, tag); 844 err_out: 845 846 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc); 847 if (!sas_protocol_ata(task->task_proto)) 848 if (n_elem) 849 dma_unmap_sg(mvi->dev, task->scatter, n_elem, 850 task->data_dir); 851 prep_out: 852 return rc; 853 } 854 855 static int mvs_task_exec(struct sas_task *task, gfp_t gfp_flags, 856 struct completion *completion, int is_tmf, 857 struct mvs_tmf_task *tmf) 858 { 859 struct mvs_info *mvi = NULL; 860 u32 rc = 0; 861 u32 pass = 0; 862 unsigned long flags = 0; 863 864 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info; 865 866 spin_lock_irqsave(&mvi->lock, flags); 867 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass); 868 if (rc) 869 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); 870 871 if (likely(pass)) 872 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) & 873 (MVS_CHIP_SLOT_SZ - 1)); 874 spin_unlock_irqrestore(&mvi->lock, flags); 875 876 return rc; 877 } 878 879 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags) 880 { 881 return mvs_task_exec(task, gfp_flags, NULL, 0, NULL); 882 } 883 884 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc) 885 { 886 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 887 mvs_tag_clear(mvi, slot_idx); 888 } 889 890 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task, 891 struct mvs_slot_info *slot, u32 slot_idx) 892 { 893 if (!slot) 894 return; 895 if (!slot->task) 896 return; 897 if (!sas_protocol_ata(task->task_proto)) 898 if (slot->n_elem) 899 dma_unmap_sg(mvi->dev, task->scatter, 900 slot->n_elem, task->data_dir); 901 902 switch (task->task_proto) { 903 case SAS_PROTOCOL_SMP: 904 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1, 905 PCI_DMA_FROMDEVICE); 906 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1, 907 PCI_DMA_TODEVICE); 908 break; 909 910 case SAS_PROTOCOL_SATA: 911 case SAS_PROTOCOL_STP: 912 case SAS_PROTOCOL_SSP: 913 default: 914 /* do nothing */ 915 break; 916 } 917 918 if (slot->buf) { 919 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 920 slot->buf = NULL; 921 } 922 list_del_init(&slot->entry); 923 task->lldd_task = NULL; 924 slot->task = NULL; 925 slot->port = NULL; 926 slot->slot_tag = 0xFFFFFFFF; 927 mvs_slot_free(mvi, slot_idx); 928 } 929 930 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no) 931 { 932 struct mvs_phy *phy = &mvi->phy[phy_no]; 933 struct mvs_port *port = phy->port; 934 int j, no; 935 936 for_each_phy(port->wide_port_phymap, j, no) { 937 if (j & 1) { 938 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 939 PHYR_WIDE_PORT); 940 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 941 port->wide_port_phymap); 942 } else { 943 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 944 PHYR_WIDE_PORT); 945 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 946 0); 947 } 948 } 949 } 950 951 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i) 952 { 953 u32 tmp; 954 struct mvs_phy *phy = &mvi->phy[i]; 955 struct mvs_port *port = phy->port; 956 957 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i); 958 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) { 959 if (!port) 960 phy->phy_attached = 1; 961 return tmp; 962 } 963 964 if (port) { 965 if (phy->phy_type & PORT_TYPE_SAS) { 966 port->wide_port_phymap &= ~(1U << i); 967 if (!port->wide_port_phymap) 968 port->port_attached = 0; 969 mvs_update_wideport(mvi, i); 970 } else if (phy->phy_type & PORT_TYPE_SATA) 971 port->port_attached = 0; 972 phy->port = NULL; 973 phy->phy_attached = 0; 974 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); 975 } 976 return 0; 977 } 978 979 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf) 980 { 981 u32 *s = (u32 *) buf; 982 983 if (!s) 984 return NULL; 985 986 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3); 987 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 988 989 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2); 990 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 991 992 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1); 993 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 994 995 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0); 996 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 997 998 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01)) 999 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10); 1000 1001 return s; 1002 } 1003 1004 static u32 mvs_is_sig_fis_received(u32 irq_status) 1005 { 1006 return irq_status & PHYEV_SIG_FIS; 1007 } 1008 1009 static void mvs_sig_remove_timer(struct mvs_phy *phy) 1010 { 1011 if (phy->timer.function) 1012 del_timer(&phy->timer); 1013 phy->timer.function = NULL; 1014 } 1015 1016 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st) 1017 { 1018 struct mvs_phy *phy = &mvi->phy[i]; 1019 struct sas_identify_frame *id; 1020 1021 id = (struct sas_identify_frame *)phy->frame_rcvd; 1022 1023 if (get_st) { 1024 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i); 1025 phy->phy_status = mvs_is_phy_ready(mvi, i); 1026 } 1027 1028 if (phy->phy_status) { 1029 int oob_done = 0; 1030 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy; 1031 1032 oob_done = MVS_CHIP_DISP->oob_done(mvi, i); 1033 1034 MVS_CHIP_DISP->fix_phy_info(mvi, i, id); 1035 if (phy->phy_type & PORT_TYPE_SATA) { 1036 phy->identify.target_port_protocols = SAS_PROTOCOL_STP; 1037 if (mvs_is_sig_fis_received(phy->irq_status)) { 1038 mvs_sig_remove_timer(phy); 1039 phy->phy_attached = 1; 1040 phy->att_dev_sas_addr = 1041 i + mvi->id * mvi->chip->n_phy; 1042 if (oob_done) 1043 sas_phy->oob_mode = SATA_OOB_MODE; 1044 phy->frame_rcvd_size = 1045 sizeof(struct dev_to_host_fis); 1046 mvs_get_d2h_reg(mvi, i, id); 1047 } else { 1048 u32 tmp; 1049 dev_printk(KERN_DEBUG, mvi->dev, 1050 "Phy%d : No sig fis\n", i); 1051 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i); 1052 MVS_CHIP_DISP->write_port_irq_mask(mvi, i, 1053 tmp | PHYEV_SIG_FIS); 1054 phy->phy_attached = 0; 1055 phy->phy_type &= ~PORT_TYPE_SATA; 1056 goto out_done; 1057 } 1058 } else if (phy->phy_type & PORT_TYPE_SAS 1059 || phy->att_dev_info & PORT_SSP_INIT_MASK) { 1060 phy->phy_attached = 1; 1061 phy->identify.device_type = 1062 phy->att_dev_info & PORT_DEV_TYPE_MASK; 1063 1064 if (phy->identify.device_type == SAS_END_DEVICE) 1065 phy->identify.target_port_protocols = 1066 SAS_PROTOCOL_SSP; 1067 else if (phy->identify.device_type != SAS_PHY_UNUSED) 1068 phy->identify.target_port_protocols = 1069 SAS_PROTOCOL_SMP; 1070 if (oob_done) 1071 sas_phy->oob_mode = SAS_OOB_MODE; 1072 phy->frame_rcvd_size = 1073 sizeof(struct sas_identify_frame); 1074 } 1075 memcpy(sas_phy->attached_sas_addr, 1076 &phy->att_dev_sas_addr, SAS_ADDR_SIZE); 1077 1078 if (MVS_CHIP_DISP->phy_work_around) 1079 MVS_CHIP_DISP->phy_work_around(mvi, i); 1080 } 1081 mv_dprintk("phy %d attach dev info is %x\n", 1082 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); 1083 mv_dprintk("phy %d attach sas addr is %llx\n", 1084 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); 1085 out_done: 1086 if (get_st) 1087 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status); 1088 } 1089 1090 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock) 1091 { 1092 struct sas_ha_struct *sas_ha = sas_phy->ha; 1093 struct mvs_info *mvi = NULL; int i = 0, hi; 1094 struct mvs_phy *phy = sas_phy->lldd_phy; 1095 struct asd_sas_port *sas_port = sas_phy->port; 1096 struct mvs_port *port; 1097 unsigned long flags = 0; 1098 if (!sas_port) 1099 return; 1100 1101 while (sas_ha->sas_phy[i]) { 1102 if (sas_ha->sas_phy[i] == sas_phy) 1103 break; 1104 i++; 1105 } 1106 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; 1107 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi]; 1108 if (i >= mvi->chip->n_phy) 1109 port = &mvi->port[i - mvi->chip->n_phy]; 1110 else 1111 port = &mvi->port[i]; 1112 if (lock) 1113 spin_lock_irqsave(&mvi->lock, flags); 1114 port->port_attached = 1; 1115 phy->port = port; 1116 sas_port->lldd_port = port; 1117 if (phy->phy_type & PORT_TYPE_SAS) { 1118 port->wide_port_phymap = sas_port->phy_mask; 1119 mv_printk("set wide port phy map %x\n", sas_port->phy_mask); 1120 mvs_update_wideport(mvi, sas_phy->id); 1121 1122 /* direct attached SAS device */ 1123 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 1124 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 1125 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04); 1126 } 1127 } 1128 if (lock) 1129 spin_unlock_irqrestore(&mvi->lock, flags); 1130 } 1131 1132 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock) 1133 { 1134 struct domain_device *dev; 1135 struct mvs_phy *phy = sas_phy->lldd_phy; 1136 struct mvs_info *mvi = phy->mvi; 1137 struct asd_sas_port *port = sas_phy->port; 1138 int phy_no = 0; 1139 1140 while (phy != &mvi->phy[phy_no]) { 1141 phy_no++; 1142 if (phy_no >= MVS_MAX_PHYS) 1143 return; 1144 } 1145 list_for_each_entry(dev, &port->dev_list, dev_list_node) 1146 mvs_do_release_task(phy->mvi, phy_no, dev); 1147 1148 } 1149 1150 1151 void mvs_port_formed(struct asd_sas_phy *sas_phy) 1152 { 1153 mvs_port_notify_formed(sas_phy, 1); 1154 } 1155 1156 void mvs_port_deformed(struct asd_sas_phy *sas_phy) 1157 { 1158 mvs_port_notify_deformed(sas_phy, 1); 1159 } 1160 1161 struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi) 1162 { 1163 u32 dev; 1164 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) { 1165 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) { 1166 mvi->devices[dev].device_id = dev; 1167 return &mvi->devices[dev]; 1168 } 1169 } 1170 1171 if (dev == MVS_MAX_DEVICES) 1172 mv_printk("max support %d devices, ignore ..\n", 1173 MVS_MAX_DEVICES); 1174 1175 return NULL; 1176 } 1177 1178 void mvs_free_dev(struct mvs_device *mvi_dev) 1179 { 1180 u32 id = mvi_dev->device_id; 1181 memset(mvi_dev, 0, sizeof(*mvi_dev)); 1182 mvi_dev->device_id = id; 1183 mvi_dev->dev_type = SAS_PHY_UNUSED; 1184 mvi_dev->dev_status = MVS_DEV_NORMAL; 1185 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED; 1186 } 1187 1188 int mvs_dev_found_notify(struct domain_device *dev, int lock) 1189 { 1190 unsigned long flags = 0; 1191 int res = 0; 1192 struct mvs_info *mvi = NULL; 1193 struct domain_device *parent_dev = dev->parent; 1194 struct mvs_device *mvi_device; 1195 1196 mvi = mvs_find_dev_mvi(dev); 1197 1198 if (lock) 1199 spin_lock_irqsave(&mvi->lock, flags); 1200 1201 mvi_device = mvs_alloc_dev(mvi); 1202 if (!mvi_device) { 1203 res = -1; 1204 goto found_out; 1205 } 1206 dev->lldd_dev = mvi_device; 1207 mvi_device->dev_status = MVS_DEV_NORMAL; 1208 mvi_device->dev_type = dev->dev_type; 1209 mvi_device->mvi_info = mvi; 1210 mvi_device->sas_device = dev; 1211 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) { 1212 int phy_id; 1213 u8 phy_num = parent_dev->ex_dev.num_phys; 1214 struct ex_phy *phy; 1215 for (phy_id = 0; phy_id < phy_num; phy_id++) { 1216 phy = &parent_dev->ex_dev.ex_phy[phy_id]; 1217 if (SAS_ADDR(phy->attached_sas_addr) == 1218 SAS_ADDR(dev->sas_addr)) { 1219 mvi_device->attached_phy = phy_id; 1220 break; 1221 } 1222 } 1223 1224 if (phy_id == phy_num) { 1225 mv_printk("Error: no attached dev:%016llx" 1226 "at ex:%016llx.\n", 1227 SAS_ADDR(dev->sas_addr), 1228 SAS_ADDR(parent_dev->sas_addr)); 1229 res = -1; 1230 } 1231 } 1232 1233 found_out: 1234 if (lock) 1235 spin_unlock_irqrestore(&mvi->lock, flags); 1236 return res; 1237 } 1238 1239 int mvs_dev_found(struct domain_device *dev) 1240 { 1241 return mvs_dev_found_notify(dev, 1); 1242 } 1243 1244 void mvs_dev_gone_notify(struct domain_device *dev) 1245 { 1246 unsigned long flags = 0; 1247 struct mvs_device *mvi_dev = dev->lldd_dev; 1248 struct mvs_info *mvi; 1249 1250 if (!mvi_dev) { 1251 mv_dprintk("found dev has gone.\n"); 1252 return; 1253 } 1254 1255 mvi = mvi_dev->mvi_info; 1256 1257 spin_lock_irqsave(&mvi->lock, flags); 1258 1259 mv_dprintk("found dev[%d:%x] is gone.\n", 1260 mvi_dev->device_id, mvi_dev->dev_type); 1261 mvs_release_task(mvi, dev); 1262 mvs_free_reg_set(mvi, mvi_dev); 1263 mvs_free_dev(mvi_dev); 1264 1265 dev->lldd_dev = NULL; 1266 mvi_dev->sas_device = NULL; 1267 1268 spin_unlock_irqrestore(&mvi->lock, flags); 1269 } 1270 1271 1272 void mvs_dev_gone(struct domain_device *dev) 1273 { 1274 mvs_dev_gone_notify(dev); 1275 } 1276 1277 static void mvs_task_done(struct sas_task *task) 1278 { 1279 if (!del_timer(&task->slow_task->timer)) 1280 return; 1281 complete(&task->slow_task->completion); 1282 } 1283 1284 static void mvs_tmf_timedout(unsigned long data) 1285 { 1286 struct sas_task *task = (struct sas_task *)data; 1287 1288 task->task_state_flags |= SAS_TASK_STATE_ABORTED; 1289 complete(&task->slow_task->completion); 1290 } 1291 1292 #define MVS_TASK_TIMEOUT 20 1293 static int mvs_exec_internal_tmf_task(struct domain_device *dev, 1294 void *parameter, u32 para_len, struct mvs_tmf_task *tmf) 1295 { 1296 int res, retry; 1297 struct sas_task *task = NULL; 1298 1299 for (retry = 0; retry < 3; retry++) { 1300 task = sas_alloc_slow_task(GFP_KERNEL); 1301 if (!task) 1302 return -ENOMEM; 1303 1304 task->dev = dev; 1305 task->task_proto = dev->tproto; 1306 1307 memcpy(&task->ssp_task, parameter, para_len); 1308 task->task_done = mvs_task_done; 1309 1310 task->slow_task->timer.data = (unsigned long) task; 1311 task->slow_task->timer.function = mvs_tmf_timedout; 1312 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ; 1313 add_timer(&task->slow_task->timer); 1314 1315 res = mvs_task_exec(task, GFP_KERNEL, NULL, 1, tmf); 1316 1317 if (res) { 1318 del_timer(&task->slow_task->timer); 1319 mv_printk("executing internal task failed:%d\n", res); 1320 goto ex_err; 1321 } 1322 1323 wait_for_completion(&task->slow_task->completion); 1324 res = TMF_RESP_FUNC_FAILED; 1325 /* Even TMF timed out, return direct. */ 1326 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { 1327 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { 1328 mv_printk("TMF task[%x] timeout.\n", tmf->tmf); 1329 goto ex_err; 1330 } 1331 } 1332 1333 if (task->task_status.resp == SAS_TASK_COMPLETE && 1334 task->task_status.stat == SAM_STAT_GOOD) { 1335 res = TMF_RESP_FUNC_COMPLETE; 1336 break; 1337 } 1338 1339 if (task->task_status.resp == SAS_TASK_COMPLETE && 1340 task->task_status.stat == SAS_DATA_UNDERRUN) { 1341 /* no error, but return the number of bytes of 1342 * underrun */ 1343 res = task->task_status.residual; 1344 break; 1345 } 1346 1347 if (task->task_status.resp == SAS_TASK_COMPLETE && 1348 task->task_status.stat == SAS_DATA_OVERRUN) { 1349 mv_dprintk("blocked task error.\n"); 1350 res = -EMSGSIZE; 1351 break; 1352 } else { 1353 mv_dprintk(" task to dev %016llx response: 0x%x " 1354 "status 0x%x\n", 1355 SAS_ADDR(dev->sas_addr), 1356 task->task_status.resp, 1357 task->task_status.stat); 1358 sas_free_task(task); 1359 task = NULL; 1360 1361 } 1362 } 1363 ex_err: 1364 BUG_ON(retry == 3 && task != NULL); 1365 sas_free_task(task); 1366 return res; 1367 } 1368 1369 static int mvs_debug_issue_ssp_tmf(struct domain_device *dev, 1370 u8 *lun, struct mvs_tmf_task *tmf) 1371 { 1372 struct sas_ssp_task ssp_task; 1373 if (!(dev->tproto & SAS_PROTOCOL_SSP)) 1374 return TMF_RESP_FUNC_ESUPP; 1375 1376 memcpy(ssp_task.LUN, lun, 8); 1377 1378 return mvs_exec_internal_tmf_task(dev, &ssp_task, 1379 sizeof(ssp_task), tmf); 1380 } 1381 1382 1383 /* Standard mandates link reset for ATA (type 0) 1384 and hard reset for SSP (type 1) , only for RECOVERY */ 1385 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev) 1386 { 1387 int rc; 1388 struct sas_phy *phy = sas_get_local_phy(dev); 1389 int reset_type = (dev->dev_type == SAS_SATA_DEV || 1390 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; 1391 rc = sas_phy_reset(phy, reset_type); 1392 sas_put_local_phy(phy); 1393 msleep(2000); 1394 return rc; 1395 } 1396 1397 /* mandatory SAM-3 */ 1398 int mvs_lu_reset(struct domain_device *dev, u8 *lun) 1399 { 1400 unsigned long flags; 1401 int rc = TMF_RESP_FUNC_FAILED; 1402 struct mvs_tmf_task tmf_task; 1403 struct mvs_device * mvi_dev = dev->lldd_dev; 1404 struct mvs_info *mvi = mvi_dev->mvi_info; 1405 1406 tmf_task.tmf = TMF_LU_RESET; 1407 mvi_dev->dev_status = MVS_DEV_EH; 1408 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1409 if (rc == TMF_RESP_FUNC_COMPLETE) { 1410 spin_lock_irqsave(&mvi->lock, flags); 1411 mvs_release_task(mvi, dev); 1412 spin_unlock_irqrestore(&mvi->lock, flags); 1413 } 1414 /* If failed, fall-through I_T_Nexus reset */ 1415 mv_printk("%s for device[%x]:rc= %d\n", __func__, 1416 mvi_dev->device_id, rc); 1417 return rc; 1418 } 1419 1420 int mvs_I_T_nexus_reset(struct domain_device *dev) 1421 { 1422 unsigned long flags; 1423 int rc = TMF_RESP_FUNC_FAILED; 1424 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev; 1425 struct mvs_info *mvi = mvi_dev->mvi_info; 1426 1427 if (mvi_dev->dev_status != MVS_DEV_EH) 1428 return TMF_RESP_FUNC_COMPLETE; 1429 else 1430 mvi_dev->dev_status = MVS_DEV_NORMAL; 1431 rc = mvs_debug_I_T_nexus_reset(dev); 1432 mv_printk("%s for device[%x]:rc= %d\n", 1433 __func__, mvi_dev->device_id, rc); 1434 1435 spin_lock_irqsave(&mvi->lock, flags); 1436 mvs_release_task(mvi, dev); 1437 spin_unlock_irqrestore(&mvi->lock, flags); 1438 1439 return rc; 1440 } 1441 /* optional SAM-3 */ 1442 int mvs_query_task(struct sas_task *task) 1443 { 1444 u32 tag; 1445 struct scsi_lun lun; 1446 struct mvs_tmf_task tmf_task; 1447 int rc = TMF_RESP_FUNC_FAILED; 1448 1449 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1450 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; 1451 struct domain_device *dev = task->dev; 1452 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1453 struct mvs_info *mvi = mvi_dev->mvi_info; 1454 1455 int_to_scsilun(cmnd->device->lun, &lun); 1456 rc = mvs_find_tag(mvi, task, &tag); 1457 if (rc == 0) { 1458 rc = TMF_RESP_FUNC_FAILED; 1459 return rc; 1460 } 1461 1462 tmf_task.tmf = TMF_QUERY_TASK; 1463 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); 1464 1465 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); 1466 switch (rc) { 1467 /* The task is still in Lun, release it then */ 1468 case TMF_RESP_FUNC_SUCC: 1469 /* The task is not in Lun or failed, reset the phy */ 1470 case TMF_RESP_FUNC_FAILED: 1471 case TMF_RESP_FUNC_COMPLETE: 1472 break; 1473 } 1474 } 1475 mv_printk("%s:rc= %d\n", __func__, rc); 1476 return rc; 1477 } 1478 1479 /* mandatory SAM-3, still need free task/slot info */ 1480 int mvs_abort_task(struct sas_task *task) 1481 { 1482 struct scsi_lun lun; 1483 struct mvs_tmf_task tmf_task; 1484 struct domain_device *dev = task->dev; 1485 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1486 struct mvs_info *mvi; 1487 int rc = TMF_RESP_FUNC_FAILED; 1488 unsigned long flags; 1489 u32 tag; 1490 1491 if (!mvi_dev) { 1492 mv_printk("Device has removed\n"); 1493 return TMF_RESP_FUNC_FAILED; 1494 } 1495 1496 mvi = mvi_dev->mvi_info; 1497 1498 spin_lock_irqsave(&task->task_state_lock, flags); 1499 if (task->task_state_flags & SAS_TASK_STATE_DONE) { 1500 spin_unlock_irqrestore(&task->task_state_lock, flags); 1501 rc = TMF_RESP_FUNC_COMPLETE; 1502 goto out; 1503 } 1504 spin_unlock_irqrestore(&task->task_state_lock, flags); 1505 mvi_dev->dev_status = MVS_DEV_EH; 1506 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1507 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; 1508 1509 int_to_scsilun(cmnd->device->lun, &lun); 1510 rc = mvs_find_tag(mvi, task, &tag); 1511 if (rc == 0) { 1512 mv_printk("No such tag in %s\n", __func__); 1513 rc = TMF_RESP_FUNC_FAILED; 1514 return rc; 1515 } 1516 1517 tmf_task.tmf = TMF_ABORT_TASK; 1518 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); 1519 1520 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); 1521 1522 /* if successful, clear the task and callback forwards.*/ 1523 if (rc == TMF_RESP_FUNC_COMPLETE) { 1524 u32 slot_no; 1525 struct mvs_slot_info *slot; 1526 1527 if (task->lldd_task) { 1528 slot = task->lldd_task; 1529 slot_no = (u32) (slot - mvi->slot_info); 1530 spin_lock_irqsave(&mvi->lock, flags); 1531 mvs_slot_complete(mvi, slot_no, 1); 1532 spin_unlock_irqrestore(&mvi->lock, flags); 1533 } 1534 } 1535 1536 } else if (task->task_proto & SAS_PROTOCOL_SATA || 1537 task->task_proto & SAS_PROTOCOL_STP) { 1538 if (SAS_SATA_DEV == dev->dev_type) { 1539 struct mvs_slot_info *slot = task->lldd_task; 1540 u32 slot_idx = (u32)(slot - mvi->slot_info); 1541 mv_dprintk("mvs_abort_task() mvi=%p task=%p " 1542 "slot=%p slot_idx=x%x\n", 1543 mvi, task, slot, slot_idx); 1544 task->task_state_flags |= SAS_TASK_STATE_ABORTED; 1545 mvs_slot_task_free(mvi, task, slot, slot_idx); 1546 rc = TMF_RESP_FUNC_COMPLETE; 1547 goto out; 1548 } 1549 1550 } 1551 out: 1552 if (rc != TMF_RESP_FUNC_COMPLETE) 1553 mv_printk("%s:rc= %d\n", __func__, rc); 1554 return rc; 1555 } 1556 1557 int mvs_abort_task_set(struct domain_device *dev, u8 *lun) 1558 { 1559 int rc = TMF_RESP_FUNC_FAILED; 1560 struct mvs_tmf_task tmf_task; 1561 1562 tmf_task.tmf = TMF_ABORT_TASK_SET; 1563 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1564 1565 return rc; 1566 } 1567 1568 int mvs_clear_aca(struct domain_device *dev, u8 *lun) 1569 { 1570 int rc = TMF_RESP_FUNC_FAILED; 1571 struct mvs_tmf_task tmf_task; 1572 1573 tmf_task.tmf = TMF_CLEAR_ACA; 1574 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1575 1576 return rc; 1577 } 1578 1579 int mvs_clear_task_set(struct domain_device *dev, u8 *lun) 1580 { 1581 int rc = TMF_RESP_FUNC_FAILED; 1582 struct mvs_tmf_task tmf_task; 1583 1584 tmf_task.tmf = TMF_CLEAR_TASK_SET; 1585 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1586 1587 return rc; 1588 } 1589 1590 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task, 1591 u32 slot_idx, int err) 1592 { 1593 struct mvs_device *mvi_dev = task->dev->lldd_dev; 1594 struct task_status_struct *tstat = &task->task_status; 1595 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf; 1596 int stat = SAM_STAT_GOOD; 1597 1598 1599 resp->frame_len = sizeof(struct dev_to_host_fis); 1600 memcpy(&resp->ending_fis[0], 1601 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset), 1602 sizeof(struct dev_to_host_fis)); 1603 tstat->buf_valid_size = sizeof(*resp); 1604 if (unlikely(err)) { 1605 if (unlikely(err & CMD_ISS_STPD)) 1606 stat = SAS_OPEN_REJECT; 1607 else 1608 stat = SAS_PROTO_RESPONSE; 1609 } 1610 1611 return stat; 1612 } 1613 1614 void mvs_set_sense(u8 *buffer, int len, int d_sense, 1615 int key, int asc, int ascq) 1616 { 1617 memset(buffer, 0, len); 1618 1619 if (d_sense) { 1620 /* Descriptor format */ 1621 if (len < 4) { 1622 mv_printk("Length %d of sense buffer too small to " 1623 "fit sense %x:%x:%x", len, key, asc, ascq); 1624 } 1625 1626 buffer[0] = 0x72; /* Response Code */ 1627 if (len > 1) 1628 buffer[1] = key; /* Sense Key */ 1629 if (len > 2) 1630 buffer[2] = asc; /* ASC */ 1631 if (len > 3) 1632 buffer[3] = ascq; /* ASCQ */ 1633 } else { 1634 if (len < 14) { 1635 mv_printk("Length %d of sense buffer too small to " 1636 "fit sense %x:%x:%x", len, key, asc, ascq); 1637 } 1638 1639 buffer[0] = 0x70; /* Response Code */ 1640 if (len > 2) 1641 buffer[2] = key; /* Sense Key */ 1642 if (len > 7) 1643 buffer[7] = 0x0a; /* Additional Sense Length */ 1644 if (len > 12) 1645 buffer[12] = asc; /* ASC */ 1646 if (len > 13) 1647 buffer[13] = ascq; /* ASCQ */ 1648 } 1649 1650 return; 1651 } 1652 1653 void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu, 1654 u8 key, u8 asc, u8 asc_q) 1655 { 1656 iu->datapres = 2; 1657 iu->response_data_len = 0; 1658 iu->sense_data_len = 17; 1659 iu->status = 02; 1660 mvs_set_sense(iu->sense_data, 17, 0, 1661 key, asc, asc_q); 1662 } 1663 1664 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task, 1665 u32 slot_idx) 1666 { 1667 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1668 int stat; 1669 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response); 1670 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1)); 1671 u32 tfs = 0; 1672 enum mvs_port_type type = PORT_TYPE_SAS; 1673 1674 if (err_dw0 & CMD_ISS_STPD) 1675 MVS_CHIP_DISP->issue_stop(mvi, type, tfs); 1676 1677 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1678 1679 stat = SAM_STAT_CHECK_CONDITION; 1680 switch (task->task_proto) { 1681 case SAS_PROTOCOL_SSP: 1682 { 1683 stat = SAS_ABORTED_TASK; 1684 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) { 1685 struct ssp_response_iu *iu = slot->response + 1686 sizeof(struct mvs_err_info); 1687 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01); 1688 sas_ssp_task_response(mvi->dev, task, iu); 1689 stat = SAM_STAT_CHECK_CONDITION; 1690 } 1691 if (err_dw1 & bit(31)) 1692 mv_printk("reuse same slot, retry command.\n"); 1693 break; 1694 } 1695 case SAS_PROTOCOL_SMP: 1696 stat = SAM_STAT_CHECK_CONDITION; 1697 break; 1698 1699 case SAS_PROTOCOL_SATA: 1700 case SAS_PROTOCOL_STP: 1701 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 1702 { 1703 task->ata_task.use_ncq = 0; 1704 stat = SAS_PROTO_RESPONSE; 1705 mvs_sata_done(mvi, task, slot_idx, err_dw0); 1706 } 1707 break; 1708 default: 1709 break; 1710 } 1711 1712 return stat; 1713 } 1714 1715 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags) 1716 { 1717 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 1718 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1719 struct sas_task *task = slot->task; 1720 struct mvs_device *mvi_dev = NULL; 1721 struct task_status_struct *tstat; 1722 struct domain_device *dev; 1723 u32 aborted; 1724 1725 void *to; 1726 enum exec_status sts; 1727 1728 if (unlikely(!task || !task->lldd_task || !task->dev)) 1729 return -1; 1730 1731 tstat = &task->task_status; 1732 dev = task->dev; 1733 mvi_dev = dev->lldd_dev; 1734 1735 spin_lock(&task->task_state_lock); 1736 task->task_state_flags &= 1737 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR); 1738 task->task_state_flags |= SAS_TASK_STATE_DONE; 1739 /* race condition*/ 1740 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED; 1741 spin_unlock(&task->task_state_lock); 1742 1743 memset(tstat, 0, sizeof(*tstat)); 1744 tstat->resp = SAS_TASK_COMPLETE; 1745 1746 if (unlikely(aborted)) { 1747 tstat->stat = SAS_ABORTED_TASK; 1748 if (mvi_dev && mvi_dev->running_req) 1749 mvi_dev->running_req--; 1750 if (sas_protocol_ata(task->task_proto)) 1751 mvs_free_reg_set(mvi, mvi_dev); 1752 1753 mvs_slot_task_free(mvi, task, slot, slot_idx); 1754 return -1; 1755 } 1756 1757 /* when no device attaching, go ahead and complete by error handling*/ 1758 if (unlikely(!mvi_dev || flags)) { 1759 if (!mvi_dev) 1760 mv_dprintk("port has not device.\n"); 1761 tstat->stat = SAS_PHY_DOWN; 1762 goto out; 1763 } 1764 1765 /* 1766 * error info record present; slot->response is 32 bit aligned but may 1767 * not be 64 bit aligned, so check for zero in two 32 bit reads 1768 */ 1769 if (unlikely((rx_desc & RXQ_ERR) 1770 && (*((u32 *)slot->response) 1771 || *(((u32 *)slot->response) + 1)))) { 1772 mv_dprintk("port %d slot %d rx_desc %X has error info" 1773 "%016llX.\n", slot->port->sas_port.id, slot_idx, 1774 rx_desc, get_unaligned_le64(slot->response)); 1775 tstat->stat = mvs_slot_err(mvi, task, slot_idx); 1776 tstat->resp = SAS_TASK_COMPLETE; 1777 goto out; 1778 } 1779 1780 switch (task->task_proto) { 1781 case SAS_PROTOCOL_SSP: 1782 /* hw says status == 0, datapres == 0 */ 1783 if (rx_desc & RXQ_GOOD) { 1784 tstat->stat = SAM_STAT_GOOD; 1785 tstat->resp = SAS_TASK_COMPLETE; 1786 } 1787 /* response frame present */ 1788 else if (rx_desc & RXQ_RSP) { 1789 struct ssp_response_iu *iu = slot->response + 1790 sizeof(struct mvs_err_info); 1791 sas_ssp_task_response(mvi->dev, task, iu); 1792 } else 1793 tstat->stat = SAM_STAT_CHECK_CONDITION; 1794 break; 1795 1796 case SAS_PROTOCOL_SMP: { 1797 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 1798 tstat->stat = SAM_STAT_GOOD; 1799 to = kmap_atomic(sg_page(sg_resp)); 1800 memcpy(to + sg_resp->offset, 1801 slot->response + sizeof(struct mvs_err_info), 1802 sg_dma_len(sg_resp)); 1803 kunmap_atomic(to); 1804 break; 1805 } 1806 1807 case SAS_PROTOCOL_SATA: 1808 case SAS_PROTOCOL_STP: 1809 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: { 1810 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0); 1811 break; 1812 } 1813 1814 default: 1815 tstat->stat = SAM_STAT_CHECK_CONDITION; 1816 break; 1817 } 1818 if (!slot->port->port_attached) { 1819 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id); 1820 tstat->stat = SAS_PHY_DOWN; 1821 } 1822 1823 1824 out: 1825 if (mvi_dev && mvi_dev->running_req) { 1826 mvi_dev->running_req--; 1827 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req) 1828 mvs_free_reg_set(mvi, mvi_dev); 1829 } 1830 mvs_slot_task_free(mvi, task, slot, slot_idx); 1831 sts = tstat->stat; 1832 1833 spin_unlock(&mvi->lock); 1834 if (task->task_done) 1835 task->task_done(task); 1836 1837 spin_lock(&mvi->lock); 1838 1839 return sts; 1840 } 1841 1842 void mvs_do_release_task(struct mvs_info *mvi, 1843 int phy_no, struct domain_device *dev) 1844 { 1845 u32 slot_idx; 1846 struct mvs_phy *phy; 1847 struct mvs_port *port; 1848 struct mvs_slot_info *slot, *slot2; 1849 1850 phy = &mvi->phy[phy_no]; 1851 port = phy->port; 1852 if (!port) 1853 return; 1854 /* clean cmpl queue in case request is already finished */ 1855 mvs_int_rx(mvi, false); 1856 1857 1858 1859 list_for_each_entry_safe(slot, slot2, &port->list, entry) { 1860 struct sas_task *task; 1861 slot_idx = (u32) (slot - mvi->slot_info); 1862 task = slot->task; 1863 1864 if (dev && task->dev != dev) 1865 continue; 1866 1867 mv_printk("Release slot [%x] tag[%x], task [%p]:\n", 1868 slot_idx, slot->slot_tag, task); 1869 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1870 1871 mvs_slot_complete(mvi, slot_idx, 1); 1872 } 1873 } 1874 1875 void mvs_release_task(struct mvs_info *mvi, 1876 struct domain_device *dev) 1877 { 1878 int i, phyno[WIDE_PORT_MAX_PHY], num; 1879 num = mvs_find_dev_phyno(dev, phyno); 1880 for (i = 0; i < num; i++) 1881 mvs_do_release_task(mvi, phyno[i], dev); 1882 } 1883 1884 static void mvs_phy_disconnected(struct mvs_phy *phy) 1885 { 1886 phy->phy_attached = 0; 1887 phy->att_dev_info = 0; 1888 phy->att_dev_sas_addr = 0; 1889 } 1890 1891 static void mvs_work_queue(struct work_struct *work) 1892 { 1893 struct delayed_work *dw = container_of(work, struct delayed_work, work); 1894 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); 1895 struct mvs_info *mvi = mwq->mvi; 1896 unsigned long flags; 1897 u32 phy_no = (unsigned long) mwq->data; 1898 struct sas_ha_struct *sas_ha = mvi->sas; 1899 struct mvs_phy *phy = &mvi->phy[phy_no]; 1900 struct asd_sas_phy *sas_phy = &phy->sas_phy; 1901 1902 spin_lock_irqsave(&mvi->lock, flags); 1903 if (mwq->handler & PHY_PLUG_EVENT) { 1904 1905 if (phy->phy_event & PHY_PLUG_OUT) { 1906 u32 tmp; 1907 struct sas_identify_frame *id; 1908 id = (struct sas_identify_frame *)phy->frame_rcvd; 1909 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no); 1910 phy->phy_event &= ~PHY_PLUG_OUT; 1911 if (!(tmp & PHY_READY_MASK)) { 1912 sas_phy_disconnected(sas_phy); 1913 mvs_phy_disconnected(phy); 1914 sas_ha->notify_phy_event(sas_phy, 1915 PHYE_LOSS_OF_SIGNAL); 1916 mv_dprintk("phy%d Removed Device\n", phy_no); 1917 } else { 1918 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 1919 mvs_update_phyinfo(mvi, phy_no, 1); 1920 mvs_bytes_dmaed(mvi, phy_no); 1921 mvs_port_notify_formed(sas_phy, 0); 1922 mv_dprintk("phy%d Attached Device\n", phy_no); 1923 } 1924 } 1925 } else if (mwq->handler & EXP_BRCT_CHG) { 1926 phy->phy_event &= ~EXP_BRCT_CHG; 1927 sas_ha->notify_port_event(sas_phy, 1928 PORTE_BROADCAST_RCVD); 1929 mv_dprintk("phy%d Got Broadcast Change\n", phy_no); 1930 } 1931 list_del(&mwq->entry); 1932 spin_unlock_irqrestore(&mvi->lock, flags); 1933 kfree(mwq); 1934 } 1935 1936 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler) 1937 { 1938 struct mvs_wq *mwq; 1939 int ret = 0; 1940 1941 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC); 1942 if (mwq) { 1943 mwq->mvi = mvi; 1944 mwq->data = data; 1945 mwq->handler = handler; 1946 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq); 1947 list_add_tail(&mwq->entry, &mvi->wq_list); 1948 schedule_delayed_work(&mwq->work_q, HZ * 2); 1949 } else 1950 ret = -ENOMEM; 1951 1952 return ret; 1953 } 1954 1955 static void mvs_sig_time_out(unsigned long tphy) 1956 { 1957 struct mvs_phy *phy = (struct mvs_phy *)tphy; 1958 struct mvs_info *mvi = phy->mvi; 1959 u8 phy_no; 1960 1961 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) { 1962 if (&mvi->phy[phy_no] == phy) { 1963 mv_dprintk("Get signature time out, reset phy %d\n", 1964 phy_no+mvi->id*mvi->chip->n_phy); 1965 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET); 1966 } 1967 } 1968 } 1969 1970 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) 1971 { 1972 u32 tmp; 1973 struct mvs_phy *phy = &mvi->phy[phy_no]; 1974 1975 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no); 1976 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status); 1977 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy, 1978 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no)); 1979 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy, 1980 phy->irq_status); 1981 1982 /* 1983 * events is port event now , 1984 * we need check the interrupt status which belongs to per port. 1985 */ 1986 1987 if (phy->irq_status & PHYEV_DCDR_ERR) { 1988 mv_dprintk("phy %d STP decoding error.\n", 1989 phy_no + mvi->id*mvi->chip->n_phy); 1990 } 1991 1992 if (phy->irq_status & PHYEV_POOF) { 1993 mdelay(500); 1994 if (!(phy->phy_event & PHY_PLUG_OUT)) { 1995 int dev_sata = phy->phy_type & PORT_TYPE_SATA; 1996 int ready; 1997 mvs_do_release_task(mvi, phy_no, NULL); 1998 phy->phy_event |= PHY_PLUG_OUT; 1999 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1); 2000 mvs_handle_event(mvi, 2001 (void *)(unsigned long)phy_no, 2002 PHY_PLUG_EVENT); 2003 ready = mvs_is_phy_ready(mvi, phy_no); 2004 if (ready || dev_sata) { 2005 if (MVS_CHIP_DISP->stp_reset) 2006 MVS_CHIP_DISP->stp_reset(mvi, 2007 phy_no); 2008 else 2009 MVS_CHIP_DISP->phy_reset(mvi, 2010 phy_no, MVS_SOFT_RESET); 2011 return; 2012 } 2013 } 2014 } 2015 2016 if (phy->irq_status & PHYEV_COMWAKE) { 2017 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no); 2018 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no, 2019 tmp | PHYEV_SIG_FIS); 2020 if (phy->timer.function == NULL) { 2021 phy->timer.data = (unsigned long)phy; 2022 phy->timer.function = mvs_sig_time_out; 2023 phy->timer.expires = jiffies + 5*HZ; 2024 add_timer(&phy->timer); 2025 } 2026 } 2027 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) { 2028 phy->phy_status = mvs_is_phy_ready(mvi, phy_no); 2029 mv_dprintk("notify plug in on phy[%d]\n", phy_no); 2030 if (phy->phy_status) { 2031 mdelay(10); 2032 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 2033 if (phy->phy_type & PORT_TYPE_SATA) { 2034 tmp = MVS_CHIP_DISP->read_port_irq_mask( 2035 mvi, phy_no); 2036 tmp &= ~PHYEV_SIG_FIS; 2037 MVS_CHIP_DISP->write_port_irq_mask(mvi, 2038 phy_no, tmp); 2039 } 2040 mvs_update_phyinfo(mvi, phy_no, 0); 2041 if (phy->phy_type & PORT_TYPE_SAS) { 2042 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE); 2043 mdelay(10); 2044 } 2045 2046 mvs_bytes_dmaed(mvi, phy_no); 2047 /* whether driver is going to handle hot plug */ 2048 if (phy->phy_event & PHY_PLUG_OUT) { 2049 mvs_port_notify_formed(&phy->sas_phy, 0); 2050 phy->phy_event &= ~PHY_PLUG_OUT; 2051 } 2052 } else { 2053 mv_dprintk("plugin interrupt but phy%d is gone\n", 2054 phy_no + mvi->id*mvi->chip->n_phy); 2055 } 2056 } else if (phy->irq_status & PHYEV_BROAD_CH) { 2057 mv_dprintk("phy %d broadcast change.\n", 2058 phy_no + mvi->id*mvi->chip->n_phy); 2059 mvs_handle_event(mvi, (void *)(unsigned long)phy_no, 2060 EXP_BRCT_CHG); 2061 } 2062 } 2063 2064 int mvs_int_rx(struct mvs_info *mvi, bool self_clear) 2065 { 2066 u32 rx_prod_idx, rx_desc; 2067 bool attn = false; 2068 2069 /* the first dword in the RX ring is special: it contains 2070 * a mirror of the hardware's RX producer index, so that 2071 * we don't have to stall the CPU reading that register. 2072 * The actual RX ring is offset by one dword, due to this. 2073 */ 2074 rx_prod_idx = mvi->rx_cons; 2075 mvi->rx_cons = le32_to_cpu(mvi->rx[0]); 2076 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */ 2077 return 0; 2078 2079 /* The CMPL_Q may come late, read from register and try again 2080 * note: if coalescing is enabled, 2081 * it will need to read from register every time for sure 2082 */ 2083 if (unlikely(mvi->rx_cons == rx_prod_idx)) 2084 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK; 2085 2086 if (mvi->rx_cons == rx_prod_idx) 2087 return 0; 2088 2089 while (mvi->rx_cons != rx_prod_idx) { 2090 /* increment our internal RX consumer pointer */ 2091 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1); 2092 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]); 2093 2094 if (likely(rx_desc & RXQ_DONE)) 2095 mvs_slot_complete(mvi, rx_desc, 0); 2096 if (rx_desc & RXQ_ATTN) { 2097 attn = true; 2098 } else if (rx_desc & RXQ_ERR) { 2099 if (!(rx_desc & RXQ_DONE)) 2100 mvs_slot_complete(mvi, rx_desc, 0); 2101 } else if (rx_desc & RXQ_SLOT_RESET) { 2102 mvs_slot_free(mvi, rx_desc); 2103 } 2104 } 2105 2106 if (attn && self_clear) 2107 MVS_CHIP_DISP->int_full(mvi); 2108 return 0; 2109 } 2110 2111 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index, 2112 u8 reg_count, u8 *write_data) 2113 { 2114 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 2115 struct mvs_info *mvi = mvs_prv->mvi[0]; 2116 2117 if (MVS_CHIP_DISP->gpio_write) { 2118 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type, 2119 reg_index, reg_count, write_data); 2120 } 2121 2122 return -ENOSYS; 2123 } 2124