1 /* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h 6 * Copyright (C) 2012-2014 LSI Corporation 7 * Copyright (C) 2013-2014 Avago Technologies 8 * (mailto: MPT-FusionLinux.pdl@avagotech.com) 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 2 13 * of the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * NO WARRANTY 21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 * solely responsible for determining the appropriateness of using and 26 * distributing the Program and assumes all risks associated with its 27 * exercise of rights under this Agreement, including but not limited to 28 * the risks and costs of program errors, damage to or loss of data, 29 * programs or equipment, and unavailability or interruption of operations. 30 31 * DISCLAIMER OF LIABILITY 32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 40 * You should have received a copy of the GNU General Public License 41 * along with this program; if not, write to the Free Software 42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 43 * USA. 44 */ 45 46 #ifndef MPT3SAS_BASE_H_INCLUDED 47 #define MPT3SAS_BASE_H_INCLUDED 48 49 #include "mpi/mpi2_type.h" 50 #include "mpi/mpi2.h" 51 #include "mpi/mpi2_ioc.h" 52 #include "mpi/mpi2_cnfg.h" 53 #include "mpi/mpi2_init.h" 54 #include "mpi/mpi2_raid.h" 55 #include "mpi/mpi2_tool.h" 56 #include "mpi/mpi2_sas.h" 57 #include "mpi/mpi2_pci.h" 58 59 #include <scsi/scsi.h> 60 #include <scsi/scsi_cmnd.h> 61 #include <scsi/scsi_device.h> 62 #include <scsi/scsi_host.h> 63 #include <scsi/scsi_tcq.h> 64 #include <scsi/scsi_transport_sas.h> 65 #include <scsi/scsi_dbg.h> 66 #include <scsi/scsi_eh.h> 67 #include <linux/pci.h> 68 #include <linux/poll.h> 69 70 #include "mpt3sas_debug.h" 71 #include "mpt3sas_trigger_diag.h" 72 73 /* driver versioning info */ 74 #define MPT3SAS_DRIVER_NAME "mpt3sas" 75 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" 76 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" 77 #define MPT3SAS_DRIVER_VERSION "17.100.00.00" 78 #define MPT3SAS_MAJOR_VERSION 17 79 #define MPT3SAS_MINOR_VERSION 100 80 #define MPT3SAS_BUILD_VERSION 0 81 #define MPT3SAS_RELEASE_VERSION 00 82 83 #define MPT2SAS_DRIVER_NAME "mpt2sas" 84 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" 85 #define MPT2SAS_DRIVER_VERSION "20.102.00.00" 86 #define MPT2SAS_MAJOR_VERSION 20 87 #define MPT2SAS_MINOR_VERSION 102 88 #define MPT2SAS_BUILD_VERSION 0 89 #define MPT2SAS_RELEASE_VERSION 00 90 91 /* 92 * Set MPT3SAS_SG_DEPTH value based on user input. 93 */ 94 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE 95 #define MPT_MIN_PHYS_SEGMENTS 16 96 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32 97 98 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE 99 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE 100 #else 101 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 102 #endif 103 104 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE 105 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE 106 #else 107 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 108 #endif 109 110 /* 111 * Generic Defines 112 */ 113 #define MPT3SAS_SATA_QUEUE_DEPTH 32 114 #define MPT3SAS_SAS_QUEUE_DEPTH 254 115 #define MPT3SAS_RAID_QUEUE_DEPTH 128 116 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200 117 118 #define MPT3SAS_RAID_MAX_SECTORS 8192 119 #define MPT3SAS_HOST_PAGE_SIZE_4K 12 120 #define MPT3SAS_NVME_QUEUE_DEPTH 128 121 #define MPT_NAME_LENGTH 32 /* generic length of strings */ 122 #define MPT_STRING_LENGTH 64 123 124 #define MPT_MAX_CALLBACKS 32 125 126 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */ 127 /* reserved for issuing internally framed scsi io cmds */ 128 #define INTERNAL_SCSIIO_CMDS_COUNT 3 129 130 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/ 131 132 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF 133 134 #define MAX_CHAIN_ELEMT_SZ 16 135 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8 136 137 /* 138 * NVMe defines 139 */ 140 #define NVME_PRP_SIZE 8 /* PRP size */ 141 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ 142 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ 143 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 144 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ 145 146 /* 147 * reset phases 148 */ 149 #define MPT3_IOC_PRE_RESET 1 /* prior to host reset */ 150 #define MPT3_IOC_AFTER_RESET 2 /* just after host reset */ 151 #define MPT3_IOC_DONE_RESET 3 /* links re-initialized */ 152 153 /* 154 * logging format 155 */ 156 #define MPT3SAS_FMT "%s: " 157 158 /* 159 * WarpDrive Specific Log codes 160 */ 161 162 #define MPT2_WARPDRIVE_LOGENTRY (0x8002) 163 #define MPT2_WARPDRIVE_LC_SSDT (0x41) 164 #define MPT2_WARPDRIVE_LC_SSDLW (0x43) 165 #define MPT2_WARPDRIVE_LC_SSDLF (0x44) 166 #define MPT2_WARPDRIVE_LC_BRMF (0x4D) 167 168 /* 169 * per target private data 170 */ 171 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01 172 #define MPT_TARGET_FLAGS_VOLUME 0x02 173 #define MPT_TARGET_FLAGS_DELETED 0x04 174 #define MPT_TARGET_FASTPATH_IO 0x08 175 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10 176 177 #define SAS2_PCI_DEVICE_B0_REVISION (0x01) 178 #define SAS3_PCI_DEVICE_C0_REVISION (0x02) 179 180 /* 181 * Intel HBA branding 182 */ 183 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \ 184 "Intel(R) Integrated RAID Module RMS25JB080" 185 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \ 186 "Intel(R) Integrated RAID Module RMS25JB040" 187 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \ 188 "Intel(R) Integrated RAID Module RMS25KB080" 189 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \ 190 "Intel(R) Integrated RAID Module RMS25KB040" 191 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \ 192 "Intel(R) Integrated RAID Module RMS25LB040" 193 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \ 194 "Intel(R) Integrated RAID Module RMS25LB080" 195 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \ 196 "Intel Integrated RAID Module RMS2LL080" 197 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \ 198 "Intel Integrated RAID Module RMS2LL040" 199 #define MPT2SAS_INTEL_RS25GB008_BRANDING \ 200 "Intel(R) RAID Controller RS25GB008" 201 #define MPT2SAS_INTEL_SSD910_BRANDING \ 202 "Intel(R) SSD 910 Series" 203 204 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \ 205 "Intel(R) Integrated RAID Module RMS3JC080" 206 #define MPT3SAS_INTEL_RS3GC008_BRANDING \ 207 "Intel(R) RAID Controller RS3GC008" 208 #define MPT3SAS_INTEL_RS3FC044_BRANDING \ 209 "Intel(R) RAID Controller RS3FC044" 210 #define MPT3SAS_INTEL_RS3UC080_BRANDING \ 211 "Intel(R) RAID Controller RS3UC080" 212 213 /* 214 * Intel HBA SSDIDs 215 */ 216 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516 217 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517 218 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518 219 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519 220 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A 221 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B 222 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E 223 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F 224 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000 225 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700 226 227 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521 228 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522 229 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523 230 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524 231 232 /* 233 * Dell HBA branding 234 */ 235 #define MPT2SAS_DELL_BRANDING_SIZE 32 236 237 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA" 238 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter" 239 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated" 240 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular" 241 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded" 242 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200" 243 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS" 244 245 #define MPT3SAS_DELL_12G_HBA_BRANDING \ 246 "Dell 12Gbps HBA" 247 248 /* 249 * Dell HBA SSDIDs 250 */ 251 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C 252 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D 253 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E 254 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F 255 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20 256 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21 257 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22 258 259 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46 260 261 /* 262 * Cisco HBA branding 263 */ 264 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \ 265 "Cisco 9300-8E 12G SAS HBA" 266 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \ 267 "Cisco 9300-8i 12G SAS HBA" 268 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \ 269 "Cisco 12G Modular SAS Pass through Controller" 270 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \ 271 "UCS C3X60 12G SAS Pass through Controller" 272 /* 273 * Cisco HBA SSSDIDs 274 */ 275 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C 276 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154 277 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155 278 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156 279 280 /* 281 * status bits for ioc->diag_buffer_status 282 */ 283 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01) 284 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02) 285 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04) 286 287 /* 288 * HP HBA branding 289 */ 290 #define MPT2SAS_HP_3PAR_SSVID 0x1590 291 292 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \ 293 "HP H220 Host Bus Adapter" 294 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \ 295 "HP H221 Host Bus Adapter" 296 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \ 297 "HP H222 Host Bus Adapter" 298 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \ 299 "HP H220i Host Bus Adapter" 300 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \ 301 "HP H210i Host Bus Adapter" 302 303 /* 304 * HO HBA SSDIDs 305 */ 306 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041 307 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042 308 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043 309 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044 310 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046 311 312 /* 313 * Combined Reply Queue constants, 314 * There are twelve Supplemental Reply Post Host Index Registers 315 * and each register is at offset 0x10 bytes from the previous one. 316 */ 317 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12 318 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16 319 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10) 320 321 /* OEM Identifiers */ 322 #define MFG10_OEM_ID_INVALID (0x00000000) 323 #define MFG10_OEM_ID_DELL (0x00000001) 324 #define MFG10_OEM_ID_FSC (0x00000002) 325 #define MFG10_OEM_ID_SUN (0x00000003) 326 #define MFG10_OEM_ID_IBM (0x00000004) 327 328 /* GENERIC Flags 0*/ 329 #define MFG10_GF0_OCE_DISABLED (0x00000001) 330 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) 331 #define MFG10_GF0_R10_DISPLAY (0x00000004) 332 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) 333 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) 334 335 #define VIRTUAL_IO_FAILED_RETRY (0x32010081) 336 337 /* OEM Specific Flags will come from OEM specific header files */ 338 struct Mpi2ManufacturingPage10_t { 339 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 340 U8 OEMIdentifier; /* 04h */ 341 U8 Reserved1; /* 05h */ 342 U16 Reserved2; /* 08h */ 343 U32 Reserved3; /* 0Ch */ 344 U32 GenericFlags0; /* 10h */ 345 U32 GenericFlags1; /* 14h */ 346 U32 Reserved4; /* 18h */ 347 U32 OEMSpecificFlags0; /* 1Ch */ 348 U32 OEMSpecificFlags1; /* 20h */ 349 U32 Reserved5[18]; /* 24h - 60h*/ 350 }; 351 352 353 /* Miscellaneous options */ 354 struct Mpi2ManufacturingPage11_t { 355 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 356 __le32 Reserved1; /* 04h */ 357 u8 Reserved2; /* 08h */ 358 u8 EEDPTagMode; /* 09h */ 359 u8 Reserved3; /* 0Ah */ 360 u8 Reserved4; /* 0Bh */ 361 __le32 Reserved5[23]; /* 0Ch-60h*/ 362 }; 363 364 /** 365 * struct MPT3SAS_TARGET - starget private hostdata 366 * @starget: starget object 367 * @sas_address: target sas address 368 * @raid_device: raid_device pointer to access volume data 369 * @handle: device handle 370 * @num_luns: number luns 371 * @flags: MPT_TARGET_FLAGS_XXX flags 372 * @deleted: target flaged for deletion 373 * @tm_busy: target is busy with TM request. 374 * @sas_dev: The sas_device associated with this target 375 * @pcie_dev: The pcie device associated with this target 376 */ 377 struct MPT3SAS_TARGET { 378 struct scsi_target *starget; 379 u64 sas_address; 380 struct _raid_device *raid_device; 381 u16 handle; 382 int num_luns; 383 u32 flags; 384 u8 deleted; 385 u8 tm_busy; 386 struct _sas_device *sas_dev; 387 struct _pcie_device *pcie_dev; 388 }; 389 390 391 /* 392 * per device private data 393 */ 394 #define MPT_DEVICE_FLAGS_INIT 0x01 395 396 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003) 397 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00) 398 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01) 399 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02) 400 401 /** 402 * struct MPT3SAS_DEVICE - sdev private hostdata 403 * @sas_target: starget private hostdata 404 * @lun: lun number 405 * @flags: MPT_DEVICE_XXX flags 406 * @configured_lun: lun is configured 407 * @block: device is in SDEV_BLOCK state 408 * @tlr_snoop_check: flag used in determining whether to disable TLR 409 * @eedp_enable: eedp support enable bit 410 * @eedp_type: 0(type_1), 1(type_2), 2(type_3) 411 * @eedp_block_length: block size 412 * @ata_command_pending: SATL passthrough outstanding for device 413 */ 414 struct MPT3SAS_DEVICE { 415 struct MPT3SAS_TARGET *sas_target; 416 unsigned int lun; 417 u32 flags; 418 u8 configured_lun; 419 u8 block; 420 u8 tlr_snoop_check; 421 u8 ignore_delay_remove; 422 /* Iopriority Command Handling */ 423 u8 ncq_prio_enable; 424 /* 425 * Bug workaround for SATL handling: the mpt2/3sas firmware 426 * doesn't return BUSY or TASK_SET_FULL for subsequent 427 * commands while a SATL pass through is in operation as the 428 * spec requires, it simply does nothing with them until the 429 * pass through completes, causing them possibly to timeout if 430 * the passthrough is a long executing command (like format or 431 * secure erase). This variable allows us to do the right 432 * thing while a SATL command is pending. 433 */ 434 unsigned long ata_command_pending; 435 436 }; 437 438 #define MPT3_CMD_NOT_USED 0x8000 /* free */ 439 #define MPT3_CMD_COMPLETE 0x0001 /* completed */ 440 #define MPT3_CMD_PENDING 0x0002 /* pending */ 441 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */ 442 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */ 443 444 /** 445 * struct _internal_cmd - internal commands struct 446 * @mutex: mutex 447 * @done: completion 448 * @reply: reply message pointer 449 * @sense: sense data 450 * @status: MPT3_CMD_XXX status 451 * @smid: system message id 452 */ 453 struct _internal_cmd { 454 struct mutex mutex; 455 struct completion done; 456 void *reply; 457 void *sense; 458 u16 status; 459 u16 smid; 460 }; 461 462 463 464 /** 465 * struct _sas_device - attached device information 466 * @list: sas device list 467 * @starget: starget object 468 * @sas_address: device sas address 469 * @device_name: retrieved from the SAS IDENTIFY frame. 470 * @handle: device handle 471 * @sas_address_parent: sas address of parent expander or sas host 472 * @enclosure_handle: enclosure handle 473 * @enclosure_logical_id: enclosure logical identifier 474 * @volume_handle: volume handle (valid when hidden raid member) 475 * @volume_wwid: volume unique identifier 476 * @device_info: bitfield provides detailed info about the device 477 * @id: target id 478 * @channel: target channel 479 * @slot: number number 480 * @phy: phy identifier provided in sas device page 0 481 * @responding: used in _scsih_sas_device_mark_responding 482 * @fast_path: fast path feature enable bit 483 * @pfa_led_on: flag for PFA LED status 484 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() 485 * addition routine. 486 * @chassis_slot: chassis slot 487 * @is_chassis_slot_valid: chassis slot valid or not 488 */ 489 struct _sas_device { 490 struct list_head list; 491 struct scsi_target *starget; 492 u64 sas_address; 493 u64 device_name; 494 u16 handle; 495 u64 sas_address_parent; 496 u16 enclosure_handle; 497 u64 enclosure_logical_id; 498 u16 volume_handle; 499 u64 volume_wwid; 500 u32 device_info; 501 int id; 502 int channel; 503 u16 slot; 504 u8 phy; 505 u8 responding; 506 u8 fast_path; 507 u8 pfa_led_on; 508 u8 pend_sas_rphy_add; 509 u8 enclosure_level; 510 u8 chassis_slot; 511 u8 is_chassis_slot_valid; 512 u8 connector_name[5]; 513 struct kref refcount; 514 }; 515 516 static inline void sas_device_get(struct _sas_device *s) 517 { 518 kref_get(&s->refcount); 519 } 520 521 static inline void sas_device_free(struct kref *r) 522 { 523 kfree(container_of(r, struct _sas_device, refcount)); 524 } 525 526 static inline void sas_device_put(struct _sas_device *s) 527 { 528 kref_put(&s->refcount, sas_device_free); 529 } 530 531 /* 532 * struct _pcie_device - attached PCIe device information 533 * @list: pcie device list 534 * @starget: starget object 535 * @wwid: device WWID 536 * @handle: device handle 537 * @device_info: bitfield provides detailed info about the device 538 * @id: target id 539 * @channel: target channel 540 * @slot: slot number 541 * @port_num: port number 542 * @responding: used in _scsih_pcie_device_mark_responding 543 * @fast_path: fast path feature enable bit 544 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for 545 * NVMe device only 546 * @enclosure_handle: enclosure handle 547 * @enclosure_logical_id: enclosure logical identifier 548 * @enclosure_level: The level of device's enclosure from the controller 549 * @connector_name: ASCII value of the Connector's name 550 * @serial_number: pointer of serial number string allocated runtime 551 * @refcount: reference count for deletion 552 */ 553 struct _pcie_device { 554 struct list_head list; 555 struct scsi_target *starget; 556 u64 wwid; 557 u16 handle; 558 u32 device_info; 559 int id; 560 int channel; 561 u16 slot; 562 u8 port_num; 563 u8 responding; 564 u8 fast_path; 565 u32 nvme_mdts; 566 u16 enclosure_handle; 567 u64 enclosure_logical_id; 568 u8 enclosure_level; 569 u8 connector_name[4]; 570 u8 *serial_number; 571 struct kref refcount; 572 }; 573 /** 574 * pcie_device_get - Increment the pcie device reference count 575 * 576 * @p: pcie_device object 577 * 578 * When ever this function called it will increment the 579 * reference count of the pcie device for which this function called. 580 * 581 */ 582 static inline void pcie_device_get(struct _pcie_device *p) 583 { 584 kref_get(&p->refcount); 585 } 586 587 /** 588 * pcie_device_free - Release the pcie device object 589 * @r - kref object 590 * 591 * Free's the pcie device object. It will be called when reference count 592 * reaches to zero. 593 */ 594 static inline void pcie_device_free(struct kref *r) 595 { 596 kfree(container_of(r, struct _pcie_device, refcount)); 597 } 598 599 /** 600 * pcie_device_put - Decrement the pcie device reference count 601 * 602 * @p: pcie_device object 603 * 604 * When ever this function called it will decrement the 605 * reference count of the pcie device for which this function called. 606 * 607 * When refernce count reaches to Zero, this will call pcie_device_free to the 608 * pcie_device object. 609 */ 610 static inline void pcie_device_put(struct _pcie_device *p) 611 { 612 kref_put(&p->refcount, pcie_device_free); 613 } 614 /** 615 * struct _raid_device - raid volume link list 616 * @list: sas device list 617 * @starget: starget object 618 * @sdev: scsi device struct (volumes are single lun) 619 * @wwid: unique identifier for the volume 620 * @handle: device handle 621 * @block_size: Block size of the volume 622 * @id: target id 623 * @channel: target channel 624 * @volume_type: the raid level 625 * @device_info: bitfield provides detailed info about the hidden components 626 * @num_pds: number of hidden raid components 627 * @responding: used in _scsih_raid_device_mark_responding 628 * @percent_complete: resync percent complete 629 * @direct_io_enabled: Whether direct io to PDs are allowed or not 630 * @stripe_exponent: X where 2powX is the stripe sz in blocks 631 * @block_exponent: X where 2powX is the block sz in bytes 632 * @max_lba: Maximum number of LBA in the volume 633 * @stripe_sz: Stripe Size of the volume 634 * @device_info: Device info of the volume member disk 635 * @pd_handle: Array of handles of the physical drives for direct I/O in le16 636 */ 637 #define MPT_MAX_WARPDRIVE_PDS 8 638 struct _raid_device { 639 struct list_head list; 640 struct scsi_target *starget; 641 struct scsi_device *sdev; 642 u64 wwid; 643 u16 handle; 644 u16 block_sz; 645 int id; 646 int channel; 647 u8 volume_type; 648 u8 num_pds; 649 u8 responding; 650 u8 percent_complete; 651 u8 direct_io_enabled; 652 u8 stripe_exponent; 653 u8 block_exponent; 654 u64 max_lba; 655 u32 stripe_sz; 656 u32 device_info; 657 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS]; 658 }; 659 660 /** 661 * struct _boot_device - boot device info 662 * 663 * @channel: sas, raid, or pcie channel 664 * @device: holds pointer for struct _sas_device, struct _raid_device or 665 * struct _pcie_device 666 */ 667 struct _boot_device { 668 int channel; 669 void *device; 670 }; 671 672 /** 673 * struct _sas_port - wide/narrow sas port information 674 * @port_list: list of ports belonging to expander 675 * @num_phys: number of phys belonging to this port 676 * @remote_identify: attached device identification 677 * @rphy: sas transport rphy object 678 * @port: sas transport wide/narrow port object 679 * @phy_list: _sas_phy list objects belonging to this port 680 */ 681 struct _sas_port { 682 struct list_head port_list; 683 u8 num_phys; 684 struct sas_identify remote_identify; 685 struct sas_rphy *rphy; 686 struct sas_port *port; 687 struct list_head phy_list; 688 }; 689 690 /** 691 * struct _sas_phy - phy information 692 * @port_siblings: list of phys belonging to a port 693 * @identify: phy identification 694 * @remote_identify: attached device identification 695 * @phy: sas transport phy object 696 * @phy_id: unique phy id 697 * @handle: device handle for this phy 698 * @attached_handle: device handle for attached device 699 * @phy_belongs_to_port: port has been created for this phy 700 */ 701 struct _sas_phy { 702 struct list_head port_siblings; 703 struct sas_identify identify; 704 struct sas_identify remote_identify; 705 struct sas_phy *phy; 706 u8 phy_id; 707 u16 handle; 708 u16 attached_handle; 709 u8 phy_belongs_to_port; 710 }; 711 712 /** 713 * struct _sas_node - sas_host/expander information 714 * @list: list of expanders 715 * @parent_dev: parent device class 716 * @num_phys: number phys belonging to this sas_host/expander 717 * @sas_address: sas address of this sas_host/expander 718 * @handle: handle for this sas_host/expander 719 * @sas_address_parent: sas address of parent expander or sas host 720 * @enclosure_handle: handle for this a member of an enclosure 721 * @device_info: bitwise defining capabilities of this sas_host/expander 722 * @responding: used in _scsih_expander_device_mark_responding 723 * @phy: a list of phys that make up this sas_host/expander 724 * @sas_port_list: list of ports attached to this sas_host/expander 725 */ 726 struct _sas_node { 727 struct list_head list; 728 struct device *parent_dev; 729 u8 num_phys; 730 u64 sas_address; 731 u16 handle; 732 u64 sas_address_parent; 733 u16 enclosure_handle; 734 u64 enclosure_logical_id; 735 u8 responding; 736 struct _sas_phy *phy; 737 struct list_head sas_port_list; 738 }; 739 740 /** 741 * enum reset_type - reset state 742 * @FORCE_BIG_HAMMER: issue diagnostic reset 743 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer 744 */ 745 enum reset_type { 746 FORCE_BIG_HAMMER, 747 SOFT_RESET, 748 }; 749 750 /** 751 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) 752 * @pcie_sgl: PCIe native SGL for NVMe devices 753 * @pcie_sgl_dma: physical address 754 */ 755 struct pcie_sg_list { 756 void *pcie_sgl; 757 dma_addr_t pcie_sgl_dma; 758 }; 759 760 /** 761 * struct chain_tracker - firmware chain tracker 762 * @chain_buffer: chain buffer 763 * @chain_buffer_dma: physical address 764 * @tracker_list: list of free request (ioc->free_chain_list) 765 */ 766 struct chain_tracker { 767 void *chain_buffer; 768 dma_addr_t chain_buffer_dma; 769 struct list_head tracker_list; 770 }; 771 772 /** 773 * struct scsiio_tracker - scsi mf request tracker 774 * @smid: system message id 775 * @cb_idx: callback index 776 * @direct_io: To indicate whether I/O is direct (WARPDRIVE) 777 * @chain_list: list of associated firmware chain tracker 778 * @msix_io: IO's msix 779 */ 780 struct scsiio_tracker { 781 u16 smid; 782 u8 cb_idx; 783 u8 direct_io; 784 struct pcie_sg_list pcie_sg_list; 785 struct list_head chain_list; 786 u16 msix_io; 787 }; 788 789 /** 790 * struct request_tracker - firmware request tracker 791 * @smid: system message id 792 * @cb_idx: callback index 793 * @tracker_list: list of free request (ioc->free_list) 794 */ 795 struct request_tracker { 796 u16 smid; 797 u8 cb_idx; 798 struct list_head tracker_list; 799 }; 800 801 /** 802 * struct _tr_list - target reset list 803 * @handle: device handle 804 * @state: state machine 805 */ 806 struct _tr_list { 807 struct list_head list; 808 u16 handle; 809 u16 state; 810 }; 811 812 /** 813 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list 814 * @handle: device handle 815 */ 816 struct _sc_list { 817 struct list_head list; 818 u16 handle; 819 }; 820 821 /** 822 * struct _event_ack_list - delayed event acknowledgment list 823 * @Event: Event ID 824 * @EventContext: used to track the event uniquely 825 */ 826 struct _event_ack_list { 827 struct list_head list; 828 u16 Event; 829 u32 EventContext; 830 }; 831 832 /** 833 * struct adapter_reply_queue - the reply queue struct 834 * @ioc: per adapter object 835 * @msix_index: msix index into vector table 836 * @vector: irq vector 837 * @reply_post_host_index: head index in the pool where FW completes IO 838 * @reply_post_free: reply post base virt address 839 * @name: the name registered to request_irq() 840 * @busy: isr is actively processing replies on another cpu 841 * @list: this list 842 */ 843 struct adapter_reply_queue { 844 struct MPT3SAS_ADAPTER *ioc; 845 u8 msix_index; 846 u32 reply_post_host_index; 847 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 848 char name[MPT_NAME_LENGTH]; 849 atomic_t busy; 850 struct list_head list; 851 }; 852 853 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr); 854 855 /* SAS3.0 support */ 856 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc, 857 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device); 858 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge, 859 dma_addr_t data_out_dma, size_t data_out_sz, 860 dma_addr_t data_in_dma, size_t data_in_sz); 861 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc, 862 void *paddr); 863 864 /* SAS3.5 support */ 865 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid, 866 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, 867 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma, 868 size_t data_in_sz); 869 870 /* To support atomic and non atomic descriptors*/ 871 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid, 872 u16 funcdep); 873 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid); 874 875 /* IOC Facts and Port Facts converted from little endian to cpu */ 876 union mpi3_version_union { 877 MPI2_VERSION_STRUCT Struct; 878 u32 Word; 879 }; 880 881 struct mpt3sas_facts { 882 u16 MsgVersion; 883 u16 HeaderVersion; 884 u8 IOCNumber; 885 u8 VP_ID; 886 u8 VF_ID; 887 u16 IOCExceptions; 888 u16 IOCStatus; 889 u32 IOCLogInfo; 890 u8 MaxChainDepth; 891 u8 WhoInit; 892 u8 NumberOfPorts; 893 u8 MaxMSIxVectors; 894 u16 RequestCredit; 895 u16 ProductID; 896 u32 IOCCapabilities; 897 union mpi3_version_union FWVersion; 898 u16 IOCRequestFrameSize; 899 u16 IOCMaxChainSegmentSize; 900 u16 MaxInitiators; 901 u16 MaxTargets; 902 u16 MaxSasExpanders; 903 u16 MaxEnclosures; 904 u16 ProtocolFlags; 905 u16 HighPriorityCredit; 906 u16 MaxReplyDescriptorPostQueueDepth; 907 u8 ReplyFrameSize; 908 u8 MaxVolumes; 909 u16 MaxDevHandle; 910 u16 MaxPersistentEntries; 911 u16 MinDevHandle; 912 u8 CurrentHostPageSize; 913 }; 914 915 struct mpt3sas_port_facts { 916 u8 PortNumber; 917 u8 VP_ID; 918 u8 VF_ID; 919 u8 PortType; 920 u16 MaxPostedCmdBuffers; 921 }; 922 923 struct reply_post_struct { 924 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 925 dma_addr_t reply_post_free_dma; 926 }; 927 928 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); 929 /** 930 * struct MPT3SAS_ADAPTER - per adapter struct 931 * @list: ioc_list 932 * @shost: shost object 933 * @id: unique adapter id 934 * @cpu_count: number online cpus 935 * @name: generic ioc string 936 * @tmp_string: tmp string used for logging 937 * @pdev: pci pdev object 938 * @pio_chip: physical io register space 939 * @chip: memory mapped register space 940 * @chip_phys: physical addrss prior to mapping 941 * @logging_level: see mpt3sas_debug.h 942 * @fwfault_debug: debuging FW timeouts 943 * @ir_firmware: IR firmware present 944 * @bars: bitmask of BAR's that must be configured 945 * @mask_interrupts: ignore interrupt 946 * @dma_mask: used to set the consistent dma mask 947 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and 948 * pci resource handling 949 * @fault_reset_work_q_name: fw fault work queue 950 * @fault_reset_work_q: "" 951 * @fault_reset_work: "" 952 * @firmware_event_name: fw event work queue 953 * @firmware_event_thread: "" 954 * @fw_event_lock: 955 * @fw_event_list: list of fw events 956 * @aen_event_read_flag: event log was read 957 * @broadcast_aen_busy: broadcast aen waiting to be serviced 958 * @shost_recovery: host reset in progress 959 * @ioc_reset_in_progress_lock: 960 * @ioc_link_reset_in_progress: phy/hard reset in progress 961 * @ignore_loginfos: ignore loginfos during task management 962 * @remove_host: flag for when driver unloads, to avoid sending dev resets 963 * @pci_error_recovery: flag to prevent ioc access until slot reset completes 964 * @wait_for_discovery_to_complete: flag set at driver load time when 965 * waiting on reporting devices 966 * @is_driver_loading: flag set at driver load time 967 * @port_enable_failed: flag set when port enable has failed 968 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work 969 * @start_scan_failed: means port enable failed, return's the ioc_status 970 * @msix_enable: flag indicating msix is enabled 971 * @msix_vector_count: number msix vectors 972 * @cpu_msix_table: table for mapping cpus to msix index 973 * @cpu_msix_table_sz: table size 974 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands 975 * @scsi_io_cb_idx: shost generated commands 976 * @tm_cb_idx: task management commands 977 * @scsih_cb_idx: scsih internal commands 978 * @transport_cb_idx: transport internal commands 979 * @ctl_cb_idx: clt internal commands 980 * @base_cb_idx: base internal commands 981 * @config_cb_idx: base internal commands 982 * @tm_tr_cb_idx : device removal target reset handshake 983 * @tm_tr_volume_cb_idx : volume removal target reset 984 * @base_cmds: 985 * @transport_cmds: 986 * @scsih_cmds: 987 * @tm_cmds: 988 * @ctl_cmds: 989 * @config_cmds: 990 * @base_add_sg_single: handler for either 32/64 bit sgl's 991 * @event_type: bits indicating which events to log 992 * @event_context: unique id for each logged event 993 * @event_log: event log pointer 994 * @event_masks: events that are masked 995 * @facts: static facts data 996 * @pfacts: static port facts data 997 * @manu_pg0: static manufacturing page 0 998 * @manu_pg10: static manufacturing page 10 999 * @manu_pg11: static manufacturing page 11 1000 * @bios_pg2: static bios page 2 1001 * @bios_pg3: static bios page 3 1002 * @ioc_pg8: static ioc page 8 1003 * @iounit_pg0: static iounit page 0 1004 * @iounit_pg1: static iounit page 1 1005 * @iounit_pg8: static iounit page 8 1006 * @sas_hba: sas host object 1007 * @sas_expander_list: expander object list 1008 * @sas_node_lock: 1009 * @sas_device_list: sas device object list 1010 * @sas_device_init_list: sas device object list (used only at init time) 1011 * @sas_device_lock: 1012 * @pcie_device_list: pcie device object list 1013 * @pcie_device_init_list: pcie device object list (used only at init time) 1014 * @pcie_device_lock: 1015 * @io_missing_delay: time for IO completed by fw when PDR enabled 1016 * @device_missing_delay: time for device missing by fw when PDR enabled 1017 * @sas_id : used for setting volume target IDs 1018 * @pcie_target_id: used for setting pcie target IDs 1019 * @blocking_handles: bitmask used to identify which devices need blocking 1020 * @pd_handles : bitmask for PD handles 1021 * @pd_handles_sz : size of pd_handle bitmask 1022 * @config_page_sz: config page size 1023 * @config_page: reserve memory for config page payload 1024 * @config_page_dma: 1025 * @hba_queue_depth: hba request queue depth 1026 * @sge_size: sg element size for either 32/64 bit 1027 * @scsiio_depth: SCSI_IO queue depth 1028 * @request_sz: per request frame size 1029 * @request: pool of request frames 1030 * @request_dma: 1031 * @request_dma_sz: 1032 * @scsi_lookup: firmware request tracker list 1033 * @scsi_lookup_lock: 1034 * @free_list: free list of request 1035 * @pending_io_count: 1036 * @reset_wq: 1037 * @chain: pool of chains 1038 * @chain_dma: 1039 * @max_sges_in_main_message: number sg elements in main message 1040 * @max_sges_in_chain_message: number sg elements per chain 1041 * @chains_needed_per_io: max chains per io 1042 * @chain_depth: total chains allocated 1043 * @chain_segment_sz: gives the max number of 1044 * SGEs accommodate on single chain buffer 1045 * @hi_priority_smid: 1046 * @hi_priority: 1047 * @hi_priority_dma: 1048 * @hi_priority_depth: 1049 * @hpr_lookup: 1050 * @hpr_free_list: 1051 * @internal_smid: 1052 * @internal: 1053 * @internal_dma: 1054 * @internal_depth: 1055 * @internal_lookup: 1056 * @internal_free_list: 1057 * @sense: pool of sense 1058 * @sense_dma: 1059 * @sense_dma_pool: 1060 * @reply_depth: hba reply queue depth: 1061 * @reply_sz: per reply frame size: 1062 * @reply: pool of replys: 1063 * @reply_dma: 1064 * @reply_dma_pool: 1065 * @reply_free_queue_depth: reply free depth 1066 * @reply_free: pool for reply free queue (32 bit addr) 1067 * @reply_free_dma: 1068 * @reply_free_dma_pool: 1069 * @reply_free_host_index: tail index in pool to insert free replys 1070 * @reply_post_queue_depth: reply post queue depth 1071 * @reply_post_struct: struct for reply_post_free physical & virt address 1072 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init 1073 * @rdpq_array_enable: rdpq_array support is enabled in the driver 1074 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag 1075 * is assigned only ones 1076 * @reply_queue_count: number of reply queue's 1077 * @reply_queue_list: link list contaning the reply queue info 1078 * @msix96_vector: 96 MSI-X vector support 1079 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue 1080 * @delayed_tr_list: target reset link list 1081 * @delayed_tr_volume_list: volume target reset link list 1082 * @delayed_sc_list: 1083 * @delayed_event_ack_list: 1084 * @temp_sensors_count: flag to carry the number of temperature sensors 1085 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and 1086 * pci resource handling. PCI resource freeing will lead to free 1087 * vital hardware/memory resource, which might be in use by cli/sysfs 1088 * path functions resulting in Null pointer reference followed by kernel 1089 * crash. To avoid the above race condition we use mutex syncrhonization 1090 * which ensures the syncrhonization between cli/sysfs_show path. 1091 */ 1092 struct MPT3SAS_ADAPTER { 1093 struct list_head list; 1094 struct Scsi_Host *shost; 1095 u8 id; 1096 int cpu_count; 1097 char name[MPT_NAME_LENGTH]; 1098 char driver_name[MPT_NAME_LENGTH - 8]; 1099 char tmp_string[MPT_STRING_LENGTH]; 1100 struct pci_dev *pdev; 1101 Mpi2SystemInterfaceRegs_t __iomem *chip; 1102 resource_size_t chip_phys; 1103 int logging_level; 1104 int fwfault_debug; 1105 u8 ir_firmware; 1106 int bars; 1107 u8 mask_interrupts; 1108 int dma_mask; 1109 1110 /* fw fault handler */ 1111 char fault_reset_work_q_name[20]; 1112 struct workqueue_struct *fault_reset_work_q; 1113 struct delayed_work fault_reset_work; 1114 1115 /* fw event handler */ 1116 char firmware_event_name[20]; 1117 struct workqueue_struct *firmware_event_thread; 1118 spinlock_t fw_event_lock; 1119 struct list_head fw_event_list; 1120 1121 /* misc flags */ 1122 int aen_event_read_flag; 1123 u8 broadcast_aen_busy; 1124 u16 broadcast_aen_pending; 1125 u8 shost_recovery; 1126 u8 got_task_abort_from_ioctl; 1127 1128 struct mutex reset_in_progress_mutex; 1129 spinlock_t ioc_reset_in_progress_lock; 1130 u8 ioc_link_reset_in_progress; 1131 u8 ioc_reset_in_progress_status; 1132 1133 u8 ignore_loginfos; 1134 u8 remove_host; 1135 u8 pci_error_recovery; 1136 u8 wait_for_discovery_to_complete; 1137 u8 is_driver_loading; 1138 u8 port_enable_failed; 1139 u8 start_scan; 1140 u16 start_scan_failed; 1141 1142 u8 msix_enable; 1143 u16 msix_vector_count; 1144 u8 *cpu_msix_table; 1145 u16 cpu_msix_table_sz; 1146 resource_size_t __iomem **reply_post_host_index; 1147 u32 ioc_reset_count; 1148 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; 1149 u32 non_operational_loop; 1150 1151 /* internal commands, callback index */ 1152 u8 scsi_io_cb_idx; 1153 u8 tm_cb_idx; 1154 u8 transport_cb_idx; 1155 u8 scsih_cb_idx; 1156 u8 ctl_cb_idx; 1157 u8 base_cb_idx; 1158 u8 port_enable_cb_idx; 1159 u8 config_cb_idx; 1160 u8 tm_tr_cb_idx; 1161 u8 tm_tr_volume_cb_idx; 1162 u8 tm_sas_control_cb_idx; 1163 struct _internal_cmd base_cmds; 1164 struct _internal_cmd port_enable_cmds; 1165 struct _internal_cmd transport_cmds; 1166 struct _internal_cmd scsih_cmds; 1167 struct _internal_cmd tm_cmds; 1168 struct _internal_cmd ctl_cmds; 1169 struct _internal_cmd config_cmds; 1170 1171 MPT_ADD_SGE base_add_sg_single; 1172 1173 /* function ptr for either IEEE or MPI sg elements */ 1174 MPT_BUILD_SG_SCMD build_sg_scmd; 1175 MPT_BUILD_SG build_sg; 1176 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge; 1177 u16 sge_size_ieee; 1178 u16 hba_mpi_version_belonged; 1179 1180 /* function ptr for MPI sg elements only */ 1181 MPT_BUILD_SG build_sg_mpi; 1182 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi; 1183 1184 /* function ptr for NVMe PRP elements only */ 1185 NVME_BUILD_PRP build_nvme_prp; 1186 1187 /* event log */ 1188 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1189 u32 event_context; 1190 void *event_log; 1191 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1192 1193 /* static config pages */ 1194 struct mpt3sas_facts facts; 1195 struct mpt3sas_port_facts *pfacts; 1196 Mpi2ManufacturingPage0_t manu_pg0; 1197 struct Mpi2ManufacturingPage10_t manu_pg10; 1198 struct Mpi2ManufacturingPage11_t manu_pg11; 1199 Mpi2BiosPage2_t bios_pg2; 1200 Mpi2BiosPage3_t bios_pg3; 1201 Mpi2IOCPage8_t ioc_pg8; 1202 Mpi2IOUnitPage0_t iounit_pg0; 1203 Mpi2IOUnitPage1_t iounit_pg1; 1204 Mpi2IOUnitPage8_t iounit_pg8; 1205 1206 struct _boot_device req_boot_device; 1207 struct _boot_device req_alt_boot_device; 1208 struct _boot_device current_boot_device; 1209 1210 /* sas hba, expander, and device list */ 1211 struct _sas_node sas_hba; 1212 struct list_head sas_expander_list; 1213 spinlock_t sas_node_lock; 1214 struct list_head sas_device_list; 1215 struct list_head sas_device_init_list; 1216 spinlock_t sas_device_lock; 1217 struct list_head pcie_device_list; 1218 struct list_head pcie_device_init_list; 1219 spinlock_t pcie_device_lock; 1220 1221 struct list_head raid_device_list; 1222 spinlock_t raid_device_lock; 1223 u8 io_missing_delay; 1224 u16 device_missing_delay; 1225 int sas_id; 1226 int pcie_target_id; 1227 1228 void *blocking_handles; 1229 void *pd_handles; 1230 u16 pd_handles_sz; 1231 1232 void *pend_os_device_add; 1233 u16 pend_os_device_add_sz; 1234 1235 /* config page */ 1236 u16 config_page_sz; 1237 void *config_page; 1238 dma_addr_t config_page_dma; 1239 1240 /* scsiio request */ 1241 u16 hba_queue_depth; 1242 u16 sge_size; 1243 u16 scsiio_depth; 1244 u16 request_sz; 1245 u8 *request; 1246 dma_addr_t request_dma; 1247 u32 request_dma_sz; 1248 struct pcie_sg_list *pcie_sg_lookup; 1249 spinlock_t scsi_lookup_lock; 1250 int pending_io_count; 1251 wait_queue_head_t reset_wq; 1252 1253 /* PCIe SGL */ 1254 struct dma_pool *pcie_sgl_dma_pool; 1255 /* Host Page Size */ 1256 u32 page_size; 1257 1258 /* chain */ 1259 struct chain_tracker *chain_lookup; 1260 struct list_head free_chain_list; 1261 struct dma_pool *chain_dma_pool; 1262 ulong chain_pages; 1263 u16 max_sges_in_main_message; 1264 u16 max_sges_in_chain_message; 1265 u16 chains_needed_per_io; 1266 u32 chain_depth; 1267 u16 chain_segment_sz; 1268 u16 chains_per_prp_buffer; 1269 1270 /* hi-priority queue */ 1271 u16 hi_priority_smid; 1272 u8 *hi_priority; 1273 dma_addr_t hi_priority_dma; 1274 u16 hi_priority_depth; 1275 struct request_tracker *hpr_lookup; 1276 struct list_head hpr_free_list; 1277 1278 /* internal queue */ 1279 u16 internal_smid; 1280 u8 *internal; 1281 dma_addr_t internal_dma; 1282 u16 internal_depth; 1283 struct request_tracker *internal_lookup; 1284 struct list_head internal_free_list; 1285 1286 /* sense */ 1287 u8 *sense; 1288 dma_addr_t sense_dma; 1289 struct dma_pool *sense_dma_pool; 1290 1291 /* reply */ 1292 u16 reply_sz; 1293 u8 *reply; 1294 dma_addr_t reply_dma; 1295 u32 reply_dma_max_address; 1296 u32 reply_dma_min_address; 1297 struct dma_pool *reply_dma_pool; 1298 1299 /* reply free queue */ 1300 u16 reply_free_queue_depth; 1301 __le32 *reply_free; 1302 dma_addr_t reply_free_dma; 1303 struct dma_pool *reply_free_dma_pool; 1304 u32 reply_free_host_index; 1305 1306 /* reply post queue */ 1307 u16 reply_post_queue_depth; 1308 struct reply_post_struct *reply_post; 1309 u8 rdpq_array_capable; 1310 u8 rdpq_array_enable; 1311 u8 rdpq_array_enable_assigned; 1312 struct dma_pool *reply_post_free_dma_pool; 1313 u8 reply_queue_count; 1314 struct list_head reply_queue_list; 1315 1316 u8 combined_reply_queue; 1317 u8 combined_reply_index_count; 1318 /* reply post register index */ 1319 resource_size_t **replyPostRegisterIndex; 1320 1321 struct list_head delayed_tr_list; 1322 struct list_head delayed_tr_volume_list; 1323 struct list_head delayed_sc_list; 1324 struct list_head delayed_event_ack_list; 1325 u8 temp_sensors_count; 1326 struct mutex pci_access_mutex; 1327 1328 /* diag buffer support */ 1329 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT]; 1330 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT]; 1331 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; 1332 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; 1333 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; 1334 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; 1335 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; 1336 u32 ring_buffer_offset; 1337 u32 ring_buffer_sz; 1338 u8 is_warpdrive; 1339 u8 hide_ir_msg; 1340 u8 mfg_pg10_hide_flag; 1341 u8 hide_drives; 1342 spinlock_t diag_trigger_lock; 1343 u8 diag_trigger_active; 1344 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master; 1345 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event; 1346 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi; 1347 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi; 1348 void *device_remove_in_progress; 1349 u16 device_remove_in_progress_sz; 1350 u8 is_gen35_ioc; 1351 u8 atomic_desc_capable; 1352 PUT_SMID_IO_FP_HIP put_smid_scsi_io; 1353 PUT_SMID_IO_FP_HIP put_smid_fast_path; 1354 PUT_SMID_IO_FP_HIP put_smid_hi_priority; 1355 PUT_SMID_DEFAULT put_smid_default; 1356 PUT_SMID_DEFAULT put_smid_nvme_encap; 1357 1358 }; 1359 1360 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1361 u32 reply); 1362 1363 1364 /* base shared API */ 1365 extern struct list_head mpt3sas_ioc_list; 1366 extern char driver_name[MPT_NAME_LENGTH]; 1367 /* spinlock on list operations over IOCs 1368 * Case: when multiple warpdrive cards(IOCs) are in use 1369 * Each IOC will added to the ioc list structure on initialization. 1370 * Watchdog threads run at regular intervals to check IOC for any 1371 * fault conditions which will trigger the dead_ioc thread to 1372 * deallocate pci resource, resulting deleting the IOC netry from list, 1373 * this deletion need to protected by spinlock to enusre that 1374 * ioc removal is syncrhonized, if not synchronized it might lead to 1375 * list_del corruption as the ioc list is traversed in cli path. 1376 */ 1377 extern spinlock_t gioc_lock; 1378 1379 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); 1380 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); 1381 1382 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); 1383 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); 1384 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); 1385 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); 1386 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, 1387 enum reset_type type); 1388 1389 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1390 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1391 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, 1392 u16 smid); 1393 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1394 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1395 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc); 1396 1397 /* hi-priority queue */ 1398 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1399 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, 1400 struct scsi_cmnd *scmd); 1401 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, 1402 struct scsiio_tracker *st); 1403 1404 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1405 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1406 void mpt3sas_base_initialize_callback_handler(void); 1407 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); 1408 void mpt3sas_base_release_callback_handler(u8 cb_idx); 1409 1410 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1411 u32 reply); 1412 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1413 u8 msix_index, u32 reply); 1414 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, 1415 u32 phys_addr); 1416 1417 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); 1418 1419 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); 1420 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, 1421 Mpi2SasIoUnitControlReply_t *mpi_reply, 1422 Mpi2SasIoUnitControlRequest_t *mpi_request); 1423 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, 1424 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); 1425 1426 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, 1427 u32 *event_type); 1428 1429 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); 1430 1431 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, 1432 u16 device_missing_delay, u8 io_missing_delay); 1433 1434 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); 1435 1436 1437 /* scsih shared API */ 1438 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, 1439 u16 smid); 1440 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, 1441 u32 reply); 1442 void mpt3sas_scsih_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); 1443 1444 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1445 u64 lun, u8 type, u16 smid_task, u16 msix_task, ulong timeout); 1446 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1447 u64 lun, u8 type, u16 smid_task, u16 msix_task, ulong timeout); 1448 1449 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1450 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1451 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1452 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, 1453 u64 sas_address); 1454 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, 1455 u16 smid); 1456 1457 struct _sas_node *mpt3sas_scsih_expander_find_by_handle( 1458 struct MPT3SAS_ADAPTER *ioc, u16 handle); 1459 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( 1460 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1461 struct _sas_device *mpt3sas_get_sdev_by_addr( 1462 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1463 struct _sas_device *__mpt3sas_get_sdev_by_addr( 1464 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1465 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1466 u16 handle); 1467 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1468 u16 handle); 1469 1470 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); 1471 struct _raid_device * 1472 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1473 1474 /* config shared API */ 1475 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1476 u32 reply); 1477 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, 1478 u8 *num_phys); 1479 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, 1480 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); 1481 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, 1482 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, 1483 u16 sz); 1484 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, 1485 Mpi2ConfigReply_t *mpi_reply, 1486 struct Mpi2ManufacturingPage10_t *config_page); 1487 1488 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1489 Mpi2ConfigReply_t *mpi_reply, 1490 struct Mpi2ManufacturingPage11_t *config_page); 1491 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1492 Mpi2ConfigReply_t *mpi_reply, 1493 struct Mpi2ManufacturingPage11_t *config_page); 1494 1495 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1496 *mpi_reply, Mpi2BiosPage2_t *config_page); 1497 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1498 *mpi_reply, Mpi2BiosPage3_t *config_page); 1499 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1500 *mpi_reply, Mpi2IOUnitPage0_t *config_page); 1501 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1502 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, 1503 u32 form, u32 handle); 1504 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, 1505 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, 1506 u32 form, u32 handle); 1507 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1508 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, 1509 u32 form, u32 handle); 1510 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, 1511 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, 1512 u32 form, u32 handle); 1513 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, 1514 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, 1515 u16 sz); 1516 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1517 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1518 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, 1519 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); 1520 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1521 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1522 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1523 *mpi_reply, Mpi2IOUnitPage8_t *config_page); 1524 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1525 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1526 u16 sz); 1527 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1528 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1529 u16 sz); 1530 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1531 *mpi_reply, Mpi2IOCPage8_t *config_page); 1532 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, 1533 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, 1534 u32 form, u32 handle); 1535 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, 1536 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, 1537 u32 phy_number, u16 handle); 1538 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, 1539 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, 1540 u32 form, u32 handle); 1541 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1542 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); 1543 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1544 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); 1545 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, 1546 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 1547 u32 handle); 1548 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1549 u8 *num_pds); 1550 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, 1551 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, 1552 u32 handle, u16 sz); 1553 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, 1554 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 1555 u32 form, u32 form_specific); 1556 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, 1557 u16 *volume_handle); 1558 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, 1559 u16 volume_handle, u64 *wwid); 1560 1561 /* ctl shared API */ 1562 extern struct device_attribute *mpt3sas_host_attrs[]; 1563 extern struct device_attribute *mpt3sas_dev_attrs[]; 1564 void mpt3sas_ctl_init(ushort hbas_to_enumerate); 1565 void mpt3sas_ctl_exit(ushort hbas_to_enumerate); 1566 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1567 u32 reply); 1568 void mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); 1569 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, 1570 u8 msix_index, u32 reply); 1571 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, 1572 Mpi2EventNotificationReply_t *mpi_reply); 1573 1574 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, 1575 u8 bits_to_register); 1576 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, 1577 u8 *issue_reset); 1578 1579 /* transport shared API */ 1580 extern struct scsi_transport_template *mpt3sas_transport_template; 1581 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1582 u32 reply); 1583 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, 1584 u16 handle, u64 sas_address); 1585 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1586 u64 sas_address_parent); 1587 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy 1588 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); 1589 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, 1590 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, 1591 struct device *parent_dev); 1592 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, 1593 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate); 1594 extern struct sas_function_template mpt3sas_transport_functions; 1595 extern struct scsi_transport_template *mpt3sas_transport_template; 1596 /* trigger data externs */ 1597 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, 1598 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1599 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, 1600 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1601 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, 1602 u32 tigger_bitmask); 1603 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, 1604 u16 log_entry_qualifier); 1605 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, 1606 u8 asc, u8 ascq); 1607 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, 1608 u32 loginfo); 1609 1610 /* warpdrive APIs */ 1611 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); 1612 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, 1613 struct _raid_device *raid_device); 1614 void 1615 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, 1616 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request); 1617 1618 /* NCQ Prio Handling Check */ 1619 bool scsih_ncq_prio_supp(struct scsi_device *sdev); 1620 1621 #endif /* MPT3SAS_BASE_H_INCLUDED */ 1622