1 /*
2  * This is the Fusion MPT base driver providing common API layer interface
3  * for access to MPT (Message Passing Technology) firmware.
4  *
5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6  * Copyright (C) 2012-2014  LSI Corporation
7  * Copyright (C) 2013-2014 Avago Technologies
8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * as published by the Free Software Foundation; either version 2
13  * of the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * NO WARRANTY
21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25  * solely responsible for determining the appropriateness of using and
26  * distributing the Program and assumes all risks associated with its
27  * exercise of rights under this Agreement, including but not limited to
28  * the risks and costs of program errors, damage to or loss of data,
29  * programs or equipment, and unavailability or interruption of operations.
30 
31  * DISCLAIMER OF LIABILITY
32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39 
40  * You should have received a copy of the GNU General Public License
41  * along with this program; if not, write to the Free Software
42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
43  * USA.
44  */
45 
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48 
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 
59 #include <scsi/scsi.h>
60 #include <scsi/scsi_cmnd.h>
61 #include <scsi/scsi_device.h>
62 #include <scsi/scsi_host.h>
63 #include <scsi/scsi_tcq.h>
64 #include <scsi/scsi_transport_sas.h>
65 #include <scsi/scsi_dbg.h>
66 #include <scsi/scsi_eh.h>
67 #include <linux/pci.h>
68 #include <linux/poll.h>
69 
70 #include "mpt3sas_debug.h"
71 #include "mpt3sas_trigger_diag.h"
72 
73 /* driver versioning info */
74 #define MPT3SAS_DRIVER_NAME		"mpt3sas"
75 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
76 #define MPT3SAS_DESCRIPTION	"LSI MPT Fusion SAS 3.0 Device Driver"
77 #define MPT3SAS_DRIVER_VERSION		"26.100.00.00"
78 #define MPT3SAS_MAJOR_VERSION		26
79 #define MPT3SAS_MINOR_VERSION		100
80 #define MPT3SAS_BUILD_VERSION		0
81 #define MPT3SAS_RELEASE_VERSION	00
82 
83 #define MPT2SAS_DRIVER_NAME		"mpt2sas"
84 #define MPT2SAS_DESCRIPTION	"LSI MPT Fusion SAS 2.0 Device Driver"
85 #define MPT2SAS_DRIVER_VERSION		"20.102.00.00"
86 #define MPT2SAS_MAJOR_VERSION		20
87 #define MPT2SAS_MINOR_VERSION		102
88 #define MPT2SAS_BUILD_VERSION		0
89 #define MPT2SAS_RELEASE_VERSION	00
90 
91 /*
92  * Set MPT3SAS_SG_DEPTH value based on user input.
93  */
94 #define MPT_MAX_PHYS_SEGMENTS	SG_CHUNK_SIZE
95 #define MPT_MIN_PHYS_SEGMENTS	16
96 #define MPT_KDUMP_MIN_PHYS_SEGMENTS	32
97 
98 #define MCPU_MAX_CHAINS_PER_IO	3
99 
100 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
101 #define MPT3SAS_SG_DEPTH		CONFIG_SCSI_MPT3SAS_MAX_SGE
102 #else
103 #define MPT3SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
104 #endif
105 
106 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
107 #define MPT2SAS_SG_DEPTH		CONFIG_SCSI_MPT2SAS_MAX_SGE
108 #else
109 #define MPT2SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
110 #endif
111 
112 /*
113  * Generic Defines
114  */
115 #define MPT3SAS_SATA_QUEUE_DEPTH	32
116 #define MPT3SAS_SAS_QUEUE_DEPTH		254
117 #define MPT3SAS_RAID_QUEUE_DEPTH	128
118 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH	200
119 
120 #define MPT3SAS_RAID_MAX_SECTORS	8192
121 #define MPT3SAS_HOST_PAGE_SIZE_4K	12
122 #define MPT3SAS_NVME_QUEUE_DEPTH	128
123 #define MPT_NAME_LENGTH			32	/* generic length of strings */
124 #define MPT_STRING_LENGTH		64
125 #define MPI_FRAME_START_OFFSET		256
126 #define REPLY_FREE_POOL_SIZE		512 /*(32 maxcredix *4)*(4 times)*/
127 
128 #define MPT_MAX_CALLBACKS		32
129 
130 #define INTERNAL_CMDS_COUNT		10	/* reserved cmds */
131 /* reserved for issuing internally framed scsi io cmds */
132 #define INTERNAL_SCSIIO_CMDS_COUNT	3
133 
134 #define MPI3_HIM_MASK			0xFFFFFFFF /* mask every bit*/
135 
136 #define MPT3SAS_INVALID_DEVICE_HANDLE	0xFFFF
137 
138 #define MAX_CHAIN_ELEMT_SZ		16
139 #define DEFAULT_NUM_FWCHAIN_ELEMTS	8
140 
141 #define FW_IMG_HDR_READ_TIMEOUT	15
142 /*
143  * NVMe defines
144  */
145 #define	NVME_PRP_SIZE			8	/* PRP size */
146 #define	NVME_ERROR_RESPONSE_SIZE	16	/* Max NVME Error Response */
147 #define NVME_TASK_ABORT_MIN_TIMEOUT	6
148 #define NVME_TASK_ABORT_MAX_TIMEOUT	60
149 #define NVME_TASK_MNGT_CUSTOM_MASK	(0x0010)
150 #define	NVME_PRP_PAGE_SIZE		4096	/* Page size */
151 
152 struct mpt3sas_nvme_cmd {
153 	u8	rsvd[24];
154 	__le64	prp1;
155 	__le64	prp2;
156 };
157 
158 /*
159  * logging format
160  */
161 #define MPT3SAS_FMT			"%s: "
162 
163 /*
164  *  WarpDrive Specific Log codes
165  */
166 
167 #define MPT2_WARPDRIVE_LOGENTRY		(0x8002)
168 #define MPT2_WARPDRIVE_LC_SSDT			(0x41)
169 #define MPT2_WARPDRIVE_LC_SSDLW		(0x43)
170 #define MPT2_WARPDRIVE_LC_SSDLF		(0x44)
171 #define MPT2_WARPDRIVE_LC_BRMF			(0x4D)
172 
173 /*
174  * per target private data
175  */
176 #define MPT_TARGET_FLAGS_RAID_COMPONENT	0x01
177 #define MPT_TARGET_FLAGS_VOLUME		0x02
178 #define MPT_TARGET_FLAGS_DELETED	0x04
179 #define MPT_TARGET_FASTPATH_IO		0x08
180 #define MPT_TARGET_FLAGS_PCIE_DEVICE	0x10
181 
182 #define SAS2_PCI_DEVICE_B0_REVISION	(0x01)
183 #define SAS3_PCI_DEVICE_C0_REVISION	(0x02)
184 
185 /*
186  * Intel HBA branding
187  */
188 #define MPT2SAS_INTEL_RMS25JB080_BRANDING    \
189 	"Intel(R) Integrated RAID Module RMS25JB080"
190 #define MPT2SAS_INTEL_RMS25JB040_BRANDING    \
191 	"Intel(R) Integrated RAID Module RMS25JB040"
192 #define MPT2SAS_INTEL_RMS25KB080_BRANDING    \
193 	"Intel(R) Integrated RAID Module RMS25KB080"
194 #define MPT2SAS_INTEL_RMS25KB040_BRANDING    \
195 	"Intel(R) Integrated RAID Module RMS25KB040"
196 #define MPT2SAS_INTEL_RMS25LB040_BRANDING	\
197 	"Intel(R) Integrated RAID Module RMS25LB040"
198 #define MPT2SAS_INTEL_RMS25LB080_BRANDING	\
199 	"Intel(R) Integrated RAID Module RMS25LB080"
200 #define MPT2SAS_INTEL_RMS2LL080_BRANDING	\
201 	"Intel Integrated RAID Module RMS2LL080"
202 #define MPT2SAS_INTEL_RMS2LL040_BRANDING	\
203 	"Intel Integrated RAID Module RMS2LL040"
204 #define MPT2SAS_INTEL_RS25GB008_BRANDING       \
205 	"Intel(R) RAID Controller RS25GB008"
206 #define MPT2SAS_INTEL_SSD910_BRANDING          \
207 	"Intel(R) SSD 910 Series"
208 
209 #define MPT3SAS_INTEL_RMS3JC080_BRANDING       \
210 	"Intel(R) Integrated RAID Module RMS3JC080"
211 #define MPT3SAS_INTEL_RS3GC008_BRANDING       \
212 	"Intel(R) RAID Controller RS3GC008"
213 #define MPT3SAS_INTEL_RS3FC044_BRANDING       \
214 	"Intel(R) RAID Controller RS3FC044"
215 #define MPT3SAS_INTEL_RS3UC080_BRANDING       \
216 	"Intel(R) RAID Controller RS3UC080"
217 
218 /*
219  * Intel HBA SSDIDs
220  */
221 #define MPT2SAS_INTEL_RMS25JB080_SSDID		0x3516
222 #define MPT2SAS_INTEL_RMS25JB040_SSDID		0x3517
223 #define MPT2SAS_INTEL_RMS25KB080_SSDID		0x3518
224 #define MPT2SAS_INTEL_RMS25KB040_SSDID		0x3519
225 #define MPT2SAS_INTEL_RMS25LB040_SSDID		0x351A
226 #define MPT2SAS_INTEL_RMS25LB080_SSDID		0x351B
227 #define MPT2SAS_INTEL_RMS2LL080_SSDID		0x350E
228 #define MPT2SAS_INTEL_RMS2LL040_SSDID		0x350F
229 #define MPT2SAS_INTEL_RS25GB008_SSDID		0x3000
230 #define MPT2SAS_INTEL_SSD910_SSDID		0x3700
231 
232 #define MPT3SAS_INTEL_RMS3JC080_SSDID		0x3521
233 #define MPT3SAS_INTEL_RS3GC008_SSDID		0x3522
234 #define MPT3SAS_INTEL_RS3FC044_SSDID		0x3523
235 #define MPT3SAS_INTEL_RS3UC080_SSDID		0x3524
236 
237 /*
238  * Dell HBA branding
239  */
240 #define MPT2SAS_DELL_BRANDING_SIZE                 32
241 
242 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING        "Dell 6Gbps SAS HBA"
243 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING    "Dell PERC H200 Adapter"
244 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
245 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING    "Dell PERC H200 Modular"
246 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING   "Dell PERC H200 Embedded"
247 #define MPT2SAS_DELL_PERC_H200_BRANDING            "Dell PERC H200"
248 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING            "Dell 6Gbps SAS"
249 
250 #define MPT3SAS_DELL_12G_HBA_BRANDING       \
251 	"Dell 12Gbps HBA"
252 
253 /*
254  * Dell HBA SSDIDs
255  */
256 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID	0x1F1C
257 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID	0x1F1D
258 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID	0x1F1E
259 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID	0x1F1F
260 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID	0x1F20
261 #define MPT2SAS_DELL_PERC_H200_SSDID		0x1F21
262 #define MPT2SAS_DELL_6GBPS_SAS_SSDID		0x1F22
263 
264 #define MPT3SAS_DELL_12G_HBA_SSDID		0x1F46
265 
266 /*
267  * Cisco HBA branding
268  */
269 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING		\
270 	"Cisco 9300-8E 12G SAS HBA"
271 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING		\
272 	"Cisco 9300-8i 12G SAS HBA"
273 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING	\
274 	"Cisco 12G Modular SAS Pass through Controller"
275 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING		\
276 	"UCS C3X60 12G SAS Pass through Controller"
277 /*
278  * Cisco HBA SSSDIDs
279  */
280 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID  0x14C
281 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID  0x154
282 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID  0x155
283 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID  0x156
284 
285 /*
286  * status bits for ioc->diag_buffer_status
287  */
288 #define MPT3_DIAG_BUFFER_IS_REGISTERED	(0x01)
289 #define MPT3_DIAG_BUFFER_IS_RELEASED	(0x02)
290 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET	(0x04)
291 
292 /*
293  * HP HBA branding
294  */
295 #define MPT2SAS_HP_3PAR_SSVID                0x1590
296 
297 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING	\
298 	"HP H220 Host Bus Adapter"
299 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING	\
300 	"HP H221 Host Bus Adapter"
301 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING	\
302 	"HP H222 Host Bus Adapter"
303 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING	\
304 	"HP H220i Host Bus Adapter"
305 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING	\
306 	"HP H210i Host Bus Adapter"
307 
308 /*
309  * HO HBA SSDIDs
310  */
311 #define MPT2SAS_HP_2_4_INTERNAL_SSDID			0x0041
312 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID			0x0042
313 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID	0x0043
314 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID		0x0044
315 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID		0x0046
316 
317 /*
318  * Combined Reply Queue constants,
319  * There are twelve Supplemental Reply Post Host Index Registers
320  * and each register is at offset 0x10 bytes from the previous one.
321  */
322 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
323 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3	12
324 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35	16
325 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET	(0x10)
326 
327 /* OEM Identifiers */
328 #define MFG10_OEM_ID_INVALID                   (0x00000000)
329 #define MFG10_OEM_ID_DELL                      (0x00000001)
330 #define MFG10_OEM_ID_FSC                       (0x00000002)
331 #define MFG10_OEM_ID_SUN                       (0x00000003)
332 #define MFG10_OEM_ID_IBM                       (0x00000004)
333 
334 /* GENERIC Flags 0*/
335 #define MFG10_GF0_OCE_DISABLED                 (0x00000001)
336 #define MFG10_GF0_R1E_DRIVE_COUNT              (0x00000002)
337 #define MFG10_GF0_R10_DISPLAY                  (0x00000004)
338 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE       (0x00000008)
339 #define MFG10_GF0_SINGLE_DRIVE_R0              (0x00000010)
340 
341 #define VIRTUAL_IO_FAILED_RETRY			(0x32010081)
342 
343 /* OEM Specific Flags will come from OEM specific header files */
344 struct Mpi2ManufacturingPage10_t {
345 	MPI2_CONFIG_PAGE_HEADER	Header;		/* 00h */
346 	U8	OEMIdentifier;			/* 04h */
347 	U8	Reserved1;			/* 05h */
348 	U16	Reserved2;			/* 08h */
349 	U32	Reserved3;			/* 0Ch */
350 	U32	GenericFlags0;			/* 10h */
351 	U32	GenericFlags1;			/* 14h */
352 	U32	Reserved4;			/* 18h */
353 	U32	OEMSpecificFlags0;		/* 1Ch */
354 	U32	OEMSpecificFlags1;		/* 20h */
355 	U32	Reserved5[18];			/* 24h - 60h*/
356 };
357 
358 
359 /* Miscellaneous options */
360 struct Mpi2ManufacturingPage11_t {
361 	MPI2_CONFIG_PAGE_HEADER Header;		/* 00h */
362 	__le32	Reserved1;			/* 04h */
363 	u8	Reserved2;			/* 08h */
364 	u8	EEDPTagMode;			/* 09h */
365 	u8	Reserved3;			/* 0Ah */
366 	u8	Reserved4;			/* 0Bh */
367 	__le32	Reserved5[8];			/* 0Ch-2Ch */
368 	u16	AddlFlags2;			/* 2Ch */
369 	u8	AddlFlags3;			/* 2Eh */
370 	u8	Reserved6;			/* 2Fh */
371 	__le32	Reserved7[7];			/* 30h - 4Bh */
372 	u8	NVMeAbortTO;			/* 4Ch */
373 	u8	Reserved8;			/* 4Dh */
374 	u16	Reserved9;			/* 4Eh */
375 	__le32	Reserved10[4];			/* 50h - 60h */
376 };
377 
378 /**
379  * struct MPT3SAS_TARGET - starget private hostdata
380  * @starget: starget object
381  * @sas_address: target sas address
382  * @raid_device: raid_device pointer to access volume data
383  * @handle: device handle
384  * @num_luns: number luns
385  * @flags: MPT_TARGET_FLAGS_XXX flags
386  * @deleted: target flaged for deletion
387  * @tm_busy: target is busy with TM request.
388  * @sas_dev: The sas_device associated with this target
389  * @pcie_dev: The pcie device associated with this target
390  */
391 struct MPT3SAS_TARGET {
392 	struct scsi_target *starget;
393 	u64	sas_address;
394 	struct _raid_device *raid_device;
395 	u16	handle;
396 	int	num_luns;
397 	u32	flags;
398 	u8	deleted;
399 	u8	tm_busy;
400 	struct _sas_device *sas_dev;
401 	struct _pcie_device *pcie_dev;
402 };
403 
404 
405 /*
406  * per device private data
407  */
408 #define MPT_DEVICE_FLAGS_INIT		0x01
409 
410 #define MFG_PAGE10_HIDE_SSDS_MASK	(0x00000003)
411 #define MFG_PAGE10_HIDE_ALL_DISKS	(0x00)
412 #define MFG_PAGE10_EXPOSE_ALL_DISKS	(0x01)
413 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT	(0x02)
414 
415 /**
416  * struct MPT3SAS_DEVICE - sdev private hostdata
417  * @sas_target: starget private hostdata
418  * @lun: lun number
419  * @flags: MPT_DEVICE_XXX flags
420  * @configured_lun: lun is configured
421  * @block: device is in SDEV_BLOCK state
422  * @tlr_snoop_check: flag used in determining whether to disable TLR
423  * @eedp_enable: eedp support enable bit
424  * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
425  * @eedp_block_length: block size
426  * @ata_command_pending: SATL passthrough outstanding for device
427  */
428 struct MPT3SAS_DEVICE {
429 	struct MPT3SAS_TARGET *sas_target;
430 	unsigned int	lun;
431 	u32	flags;
432 	u8	configured_lun;
433 	u8	block;
434 	u8	tlr_snoop_check;
435 	u8	ignore_delay_remove;
436 	/* Iopriority Command Handling */
437 	u8	ncq_prio_enable;
438 	/*
439 	 * Bug workaround for SATL handling: the mpt2/3sas firmware
440 	 * doesn't return BUSY or TASK_SET_FULL for subsequent
441 	 * commands while a SATL pass through is in operation as the
442 	 * spec requires, it simply does nothing with them until the
443 	 * pass through completes, causing them possibly to timeout if
444 	 * the passthrough is a long executing command (like format or
445 	 * secure erase).  This variable allows us to do the right
446 	 * thing while a SATL command is pending.
447 	 */
448 	unsigned long ata_command_pending;
449 
450 };
451 
452 #define MPT3_CMD_NOT_USED	0x8000	/* free */
453 #define MPT3_CMD_COMPLETE	0x0001	/* completed */
454 #define MPT3_CMD_PENDING	0x0002	/* pending */
455 #define MPT3_CMD_REPLY_VALID	0x0004	/* reply is valid */
456 #define MPT3_CMD_RESET		0x0008	/* host reset dropped the command */
457 
458 /**
459  * struct _internal_cmd - internal commands struct
460  * @mutex: mutex
461  * @done: completion
462  * @reply: reply message pointer
463  * @sense: sense data
464  * @status: MPT3_CMD_XXX status
465  * @smid: system message id
466  */
467 struct _internal_cmd {
468 	struct mutex mutex;
469 	struct completion done;
470 	void	*reply;
471 	void	*sense;
472 	u16	status;
473 	u16	smid;
474 };
475 
476 
477 
478 /**
479  * struct _sas_device - attached device information
480  * @list: sas device list
481  * @starget: starget object
482  * @sas_address: device sas address
483  * @device_name: retrieved from the SAS IDENTIFY frame.
484  * @handle: device handle
485  * @sas_address_parent: sas address of parent expander or sas host
486  * @enclosure_handle: enclosure handle
487  * @enclosure_logical_id: enclosure logical identifier
488  * @volume_handle: volume handle (valid when hidden raid member)
489  * @volume_wwid: volume unique identifier
490  * @device_info: bitfield provides detailed info about the device
491  * @id: target id
492  * @channel: target channel
493  * @slot: number number
494  * @phy: phy identifier provided in sas device page 0
495  * @responding: used in _scsih_sas_device_mark_responding
496  * @fast_path: fast path feature enable bit
497  * @pfa_led_on: flag for PFA LED status
498  * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
499  *	addition routine.
500  * @chassis_slot: chassis slot
501  * @is_chassis_slot_valid: chassis slot valid or not
502  */
503 struct _sas_device {
504 	struct list_head list;
505 	struct scsi_target *starget;
506 	u64	sas_address;
507 	u64	device_name;
508 	u16	handle;
509 	u64	sas_address_parent;
510 	u16	enclosure_handle;
511 	u64	enclosure_logical_id;
512 	u16	volume_handle;
513 	u64	volume_wwid;
514 	u32	device_info;
515 	int	id;
516 	int	channel;
517 	u16	slot;
518 	u8	phy;
519 	u8	responding;
520 	u8	fast_path;
521 	u8	pfa_led_on;
522 	u8	pend_sas_rphy_add;
523 	u8	enclosure_level;
524 	u8	chassis_slot;
525 	u8	is_chassis_slot_valid;
526 	u8	connector_name[5];
527 	struct kref refcount;
528 };
529 
530 static inline void sas_device_get(struct _sas_device *s)
531 {
532 	kref_get(&s->refcount);
533 }
534 
535 static inline void sas_device_free(struct kref *r)
536 {
537 	kfree(container_of(r, struct _sas_device, refcount));
538 }
539 
540 static inline void sas_device_put(struct _sas_device *s)
541 {
542 	kref_put(&s->refcount, sas_device_free);
543 }
544 
545 /*
546  * struct _pcie_device - attached PCIe device information
547  * @list: pcie device list
548  * @starget: starget object
549  * @wwid: device WWID
550  * @handle: device handle
551  * @device_info: bitfield provides detailed info about the device
552  * @id: target id
553  * @channel: target channel
554  * @slot: slot number
555  * @port_num: port number
556  * @responding: used in _scsih_pcie_device_mark_responding
557  * @fast_path: fast path feature enable bit
558  * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
559  *		NVMe device only
560  * @enclosure_handle: enclosure handle
561  * @enclosure_logical_id: enclosure logical identifier
562  * @enclosure_level: The level of device's enclosure from the controller
563  * @connector_name: ASCII value of the Connector's name
564  * @serial_number: pointer of serial number string allocated runtime
565  * @refcount: reference count for deletion
566  */
567 struct _pcie_device {
568 	struct list_head list;
569 	struct scsi_target *starget;
570 	u64	wwid;
571 	u16	handle;
572 	u32	device_info;
573 	int	id;
574 	int	channel;
575 	u16	slot;
576 	u8	port_num;
577 	u8	responding;
578 	u8	fast_path;
579 	u32	nvme_mdts;
580 	u16	enclosure_handle;
581 	u64	enclosure_logical_id;
582 	u8	enclosure_level;
583 	u8	connector_name[4];
584 	u8	*serial_number;
585 	u8	reset_timeout;
586 	struct kref refcount;
587 };
588 /**
589  * pcie_device_get - Increment the pcie device reference count
590  *
591  * @p: pcie_device object
592  *
593  * When ever this function called it will increment the
594  * reference count of the pcie device for which this function called.
595  *
596  */
597 static inline void pcie_device_get(struct _pcie_device *p)
598 {
599 	kref_get(&p->refcount);
600 }
601 
602 /**
603  * pcie_device_free - Release the pcie device object
604  * @r - kref object
605  *
606  * Free's the pcie device object. It will be called when reference count
607  * reaches to zero.
608  */
609 static inline void pcie_device_free(struct kref *r)
610 {
611 	kfree(container_of(r, struct _pcie_device, refcount));
612 }
613 
614 /**
615  * pcie_device_put - Decrement the pcie device reference count
616  *
617  * @p: pcie_device object
618  *
619  * When ever this function called it will decrement the
620  * reference count of the pcie device for which this function called.
621  *
622  * When refernce count reaches to Zero, this will call pcie_device_free to the
623  * pcie_device object.
624  */
625 static inline void pcie_device_put(struct _pcie_device *p)
626 {
627 	kref_put(&p->refcount, pcie_device_free);
628 }
629 /**
630  * struct _raid_device - raid volume link list
631  * @list: sas device list
632  * @starget: starget object
633  * @sdev: scsi device struct (volumes are single lun)
634  * @wwid: unique identifier for the volume
635  * @handle: device handle
636  * @block_size: Block size of the volume
637  * @id: target id
638  * @channel: target channel
639  * @volume_type: the raid level
640  * @device_info: bitfield provides detailed info about the hidden components
641  * @num_pds: number of hidden raid components
642  * @responding: used in _scsih_raid_device_mark_responding
643  * @percent_complete: resync percent complete
644  * @direct_io_enabled: Whether direct io to PDs are allowed or not
645  * @stripe_exponent: X where 2powX is the stripe sz in blocks
646  * @block_exponent: X where 2powX is the block sz in bytes
647  * @max_lba: Maximum number of LBA in the volume
648  * @stripe_sz: Stripe Size of the volume
649  * @device_info: Device info of the volume member disk
650  * @pd_handle: Array of handles of the physical drives for direct I/O in le16
651  */
652 #define MPT_MAX_WARPDRIVE_PDS		8
653 struct _raid_device {
654 	struct list_head list;
655 	struct scsi_target *starget;
656 	struct scsi_device *sdev;
657 	u64	wwid;
658 	u16	handle;
659 	u16	block_sz;
660 	int	id;
661 	int	channel;
662 	u8	volume_type;
663 	u8	num_pds;
664 	u8	responding;
665 	u8	percent_complete;
666 	u8	direct_io_enabled;
667 	u8	stripe_exponent;
668 	u8	block_exponent;
669 	u64	max_lba;
670 	u32	stripe_sz;
671 	u32	device_info;
672 	u16	pd_handle[MPT_MAX_WARPDRIVE_PDS];
673 };
674 
675 /**
676  * struct _boot_device - boot device info
677  *
678  * @channel: sas, raid, or pcie channel
679  * @device: holds pointer for struct _sas_device, struct _raid_device or
680  *     struct _pcie_device
681  */
682 struct _boot_device {
683 	int channel;
684 	void *device;
685 };
686 
687 /**
688  * struct _sas_port - wide/narrow sas port information
689  * @port_list: list of ports belonging to expander
690  * @num_phys: number of phys belonging to this port
691  * @remote_identify: attached device identification
692  * @rphy: sas transport rphy object
693  * @port: sas transport wide/narrow port object
694  * @phy_list: _sas_phy list objects belonging to this port
695  */
696 struct _sas_port {
697 	struct list_head port_list;
698 	u8	num_phys;
699 	struct sas_identify remote_identify;
700 	struct sas_rphy *rphy;
701 	struct sas_port *port;
702 	struct list_head phy_list;
703 };
704 
705 /**
706  * struct _sas_phy - phy information
707  * @port_siblings: list of phys belonging to a port
708  * @identify: phy identification
709  * @remote_identify: attached device identification
710  * @phy: sas transport phy object
711  * @phy_id: unique phy id
712  * @handle: device handle for this phy
713  * @attached_handle: device handle for attached device
714  * @phy_belongs_to_port: port has been created for this phy
715  */
716 struct _sas_phy {
717 	struct list_head port_siblings;
718 	struct sas_identify identify;
719 	struct sas_identify remote_identify;
720 	struct sas_phy *phy;
721 	u8	phy_id;
722 	u16	handle;
723 	u16	attached_handle;
724 	u8	phy_belongs_to_port;
725 };
726 
727 /**
728  * struct _sas_node - sas_host/expander information
729  * @list: list of expanders
730  * @parent_dev: parent device class
731  * @num_phys: number phys belonging to this sas_host/expander
732  * @sas_address: sas address of this sas_host/expander
733  * @handle: handle for this sas_host/expander
734  * @sas_address_parent: sas address of parent expander or sas host
735  * @enclosure_handle: handle for this a member of an enclosure
736  * @device_info: bitwise defining capabilities of this sas_host/expander
737  * @responding: used in _scsih_expander_device_mark_responding
738  * @phy: a list of phys that make up this sas_host/expander
739  * @sas_port_list: list of ports attached to this sas_host/expander
740  */
741 struct _sas_node {
742 	struct list_head list;
743 	struct device *parent_dev;
744 	u8	num_phys;
745 	u64	sas_address;
746 	u16	handle;
747 	u64	sas_address_parent;
748 	u16	enclosure_handle;
749 	u64	enclosure_logical_id;
750 	u8	responding;
751 	struct	_sas_phy *phy;
752 	struct list_head sas_port_list;
753 };
754 
755 
756 /**
757  * struct _enclosure_node - enclosure information
758  * @list: list of enclosures
759  * @pg0: enclosure pg0;
760  */
761 struct _enclosure_node {
762 	struct list_head list;
763 	Mpi2SasEnclosurePage0_t pg0;
764 };
765 
766 /**
767  * enum reset_type - reset state
768  * @FORCE_BIG_HAMMER: issue diagnostic reset
769  * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
770  */
771 enum reset_type {
772 	FORCE_BIG_HAMMER,
773 	SOFT_RESET,
774 };
775 
776 /**
777  * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
778  * @pcie_sgl: PCIe native SGL for NVMe devices
779  * @pcie_sgl_dma: physical address
780  */
781 struct pcie_sg_list {
782 	void            *pcie_sgl;
783 	dma_addr_t      pcie_sgl_dma;
784 };
785 
786 /**
787  * struct chain_tracker - firmware chain tracker
788  * @chain_buffer: chain buffer
789  * @chain_buffer_dma: physical address
790  * @tracker_list: list of free request (ioc->free_chain_list)
791  */
792 struct chain_tracker {
793 	void *chain_buffer;
794 	dma_addr_t chain_buffer_dma;
795 };
796 
797 struct chain_lookup {
798 	struct chain_tracker *chains_per_smid;
799 	atomic_t	chain_offset;
800 };
801 
802 /**
803  * struct scsiio_tracker - scsi mf request tracker
804  * @smid: system message id
805  * @cb_idx: callback index
806  * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
807  * @chain_list: list of associated firmware chain tracker
808  * @msix_io: IO's msix
809  */
810 struct scsiio_tracker {
811 	u16	smid;
812 	u8	cb_idx;
813 	u8	direct_io;
814 	struct pcie_sg_list pcie_sg_list;
815 	struct list_head chain_list;
816 	u16     msix_io;
817 };
818 
819 /**
820  * struct request_tracker - firmware request tracker
821  * @smid: system message id
822  * @cb_idx: callback index
823  * @tracker_list: list of free request (ioc->free_list)
824  */
825 struct request_tracker {
826 	u16	smid;
827 	u8	cb_idx;
828 	struct list_head tracker_list;
829 };
830 
831 /**
832  * struct _tr_list - target reset list
833  * @handle: device handle
834  * @state: state machine
835  */
836 struct _tr_list {
837 	struct list_head list;
838 	u16	handle;
839 	u16	state;
840 };
841 
842 /**
843  * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
844  * @handle: device handle
845  */
846 struct _sc_list {
847 	struct list_head list;
848 	u16     handle;
849 };
850 
851 /**
852  * struct _event_ack_list - delayed event acknowledgment list
853  * @Event: Event ID
854  * @EventContext: used to track the event uniquely
855  */
856 struct _event_ack_list {
857 	struct list_head list;
858 	U16     Event;
859 	U32     EventContext;
860 };
861 
862 /**
863  * struct adapter_reply_queue - the reply queue struct
864  * @ioc: per adapter object
865  * @msix_index: msix index into vector table
866  * @vector: irq vector
867  * @reply_post_host_index: head index in the pool where FW completes IO
868  * @reply_post_free: reply post base virt address
869  * @name: the name registered to request_irq()
870  * @busy: isr is actively processing replies on another cpu
871  * @list: this list
872 */
873 struct adapter_reply_queue {
874 	struct MPT3SAS_ADAPTER	*ioc;
875 	u8			msix_index;
876 	u32			reply_post_host_index;
877 	Mpi2ReplyDescriptorsUnion_t *reply_post_free;
878 	char			name[MPT_NAME_LENGTH];
879 	atomic_t		busy;
880 	struct list_head	list;
881 };
882 
883 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
884 
885 /* SAS3.0 support */
886 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
887 	struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
888 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
889 		dma_addr_t data_out_dma, size_t data_out_sz,
890 		dma_addr_t data_in_dma, size_t data_in_sz);
891 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
892 		void *paddr);
893 
894 /* SAS3.5 support */
895 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
896 	Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
897 	dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
898 	size_t data_in_sz);
899 
900 /* To support atomic and non atomic descriptors*/
901 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
902 	u16 funcdep);
903 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
904 
905 /* IOC Facts and Port Facts converted from little endian to cpu */
906 union mpi3_version_union {
907 	MPI2_VERSION_STRUCT		Struct;
908 	u32				Word;
909 };
910 
911 struct mpt3sas_facts {
912 	u16			MsgVersion;
913 	u16			HeaderVersion;
914 	u8			IOCNumber;
915 	u8			VP_ID;
916 	u8			VF_ID;
917 	u16			IOCExceptions;
918 	u16			IOCStatus;
919 	u32			IOCLogInfo;
920 	u8			MaxChainDepth;
921 	u8			WhoInit;
922 	u8			NumberOfPorts;
923 	u8			MaxMSIxVectors;
924 	u16			RequestCredit;
925 	u16			ProductID;
926 	u32			IOCCapabilities;
927 	union mpi3_version_union	FWVersion;
928 	u16			IOCRequestFrameSize;
929 	u16			IOCMaxChainSegmentSize;
930 	u16			MaxInitiators;
931 	u16			MaxTargets;
932 	u16			MaxSasExpanders;
933 	u16			MaxEnclosures;
934 	u16			ProtocolFlags;
935 	u16			HighPriorityCredit;
936 	u16			MaxReplyDescriptorPostQueueDepth;
937 	u8			ReplyFrameSize;
938 	u8			MaxVolumes;
939 	u16			MaxDevHandle;
940 	u16			MaxPersistentEntries;
941 	u16			MinDevHandle;
942 	u8			CurrentHostPageSize;
943 };
944 
945 struct mpt3sas_port_facts {
946 	u8			PortNumber;
947 	u8			VP_ID;
948 	u8			VF_ID;
949 	u8			PortType;
950 	u16			MaxPostedCmdBuffers;
951 };
952 
953 struct reply_post_struct {
954 	Mpi2ReplyDescriptorsUnion_t	*reply_post_free;
955 	dma_addr_t			reply_post_free_dma;
956 };
957 
958 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
959 /**
960  * struct MPT3SAS_ADAPTER - per adapter struct
961  * @list: ioc_list
962  * @shost: shost object
963  * @id: unique adapter id
964  * @cpu_count: number online cpus
965  * @name: generic ioc string
966  * @tmp_string: tmp string used for logging
967  * @pdev: pci pdev object
968  * @pio_chip: physical io register space
969  * @chip: memory mapped register space
970  * @chip_phys: physical addrss prior to mapping
971  * @logging_level: see mpt3sas_debug.h
972  * @fwfault_debug: debuging FW timeouts
973  * @ir_firmware: IR firmware present
974  * @bars: bitmask of BAR's that must be configured
975  * @mask_interrupts: ignore interrupt
976  * @dma_mask: used to set the consistent dma mask
977  * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
978  *			pci resource handling
979  * @fault_reset_work_q_name: fw fault work queue
980  * @fault_reset_work_q: ""
981  * @fault_reset_work: ""
982  * @firmware_event_name: fw event work queue
983  * @firmware_event_thread: ""
984  * @fw_event_lock:
985  * @fw_event_list: list of fw events
986  * @aen_event_read_flag: event log was read
987  * @broadcast_aen_busy: broadcast aen waiting to be serviced
988  * @shost_recovery: host reset in progress
989  * @ioc_reset_in_progress_lock:
990  * @ioc_link_reset_in_progress: phy/hard reset in progress
991  * @ignore_loginfos: ignore loginfos during task management
992  * @remove_host: flag for when driver unloads, to avoid sending dev resets
993  * @pci_error_recovery: flag to prevent ioc access until slot reset completes
994  * @wait_for_discovery_to_complete: flag set at driver load time when
995  *                                               waiting on reporting devices
996  * @is_driver_loading: flag set at driver load time
997  * @port_enable_failed: flag set when port enable has failed
998  * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
999  * @start_scan_failed: means port enable failed, return's the ioc_status
1000  * @msix_enable: flag indicating msix is enabled
1001  * @msix_vector_count: number msix vectors
1002  * @cpu_msix_table: table for mapping cpus to msix index
1003  * @cpu_msix_table_sz: table size
1004  * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1005  * @scsi_io_cb_idx: shost generated commands
1006  * @tm_cb_idx: task management commands
1007  * @scsih_cb_idx: scsih internal commands
1008  * @transport_cb_idx: transport internal commands
1009  * @ctl_cb_idx: clt internal commands
1010  * @base_cb_idx: base internal commands
1011  * @config_cb_idx: base internal commands
1012  * @tm_tr_cb_idx : device removal target reset handshake
1013  * @tm_tr_volume_cb_idx : volume removal target reset
1014  * @base_cmds:
1015  * @transport_cmds:
1016  * @scsih_cmds:
1017  * @tm_cmds:
1018  * @ctl_cmds:
1019  * @config_cmds:
1020  * @base_add_sg_single: handler for either 32/64 bit sgl's
1021  * @event_type: bits indicating which events to log
1022  * @event_context: unique id for each logged event
1023  * @event_log: event log pointer
1024  * @event_masks: events that are masked
1025  * @facts: static facts data
1026  * @pfacts: static port facts data
1027  * @manu_pg0: static manufacturing page 0
1028  * @manu_pg10: static manufacturing page 10
1029  * @manu_pg11: static manufacturing page 11
1030  * @bios_pg2: static bios page 2
1031  * @bios_pg3: static bios page 3
1032  * @ioc_pg8: static ioc page 8
1033  * @iounit_pg0: static iounit page 0
1034  * @iounit_pg1: static iounit page 1
1035  * @iounit_pg8: static iounit page 8
1036  * @sas_hba: sas host object
1037  * @sas_expander_list: expander object list
1038  * @enclosure_list: enclosure object list
1039  * @sas_node_lock:
1040  * @sas_device_list: sas device object list
1041  * @sas_device_init_list: sas device object list (used only at init time)
1042  * @sas_device_lock:
1043  * @pcie_device_list: pcie device object list
1044  * @pcie_device_init_list: pcie device object list (used only at init time)
1045  * @pcie_device_lock:
1046  * @io_missing_delay: time for IO completed by fw when PDR enabled
1047  * @device_missing_delay: time for device missing by fw when PDR enabled
1048  * @sas_id : used for setting volume target IDs
1049  * @pcie_target_id: used for setting pcie target IDs
1050  * @blocking_handles: bitmask used to identify which devices need blocking
1051  * @pd_handles : bitmask for PD handles
1052  * @pd_handles_sz : size of pd_handle bitmask
1053  * @config_page_sz: config page size
1054  * @config_page: reserve memory for config page payload
1055  * @config_page_dma:
1056  * @hba_queue_depth: hba request queue depth
1057  * @sge_size: sg element size for either 32/64 bit
1058  * @scsiio_depth: SCSI_IO queue depth
1059  * @request_sz: per request frame size
1060  * @request: pool of request frames
1061  * @request_dma:
1062  * @request_dma_sz:
1063  * @scsi_lookup: firmware request tracker list
1064  * @scsi_lookup_lock:
1065  * @free_list: free list of request
1066  * @pending_io_count:
1067  * @reset_wq:
1068  * @chain: pool of chains
1069  * @chain_dma:
1070  * @max_sges_in_main_message: number sg elements in main message
1071  * @max_sges_in_chain_message: number sg elements per chain
1072  * @chains_needed_per_io: max chains per io
1073  * @chain_depth: total chains allocated
1074  * @chain_segment_sz: gives the max number of
1075  *			SGEs accommodate on single chain buffer
1076  * @hi_priority_smid:
1077  * @hi_priority:
1078  * @hi_priority_dma:
1079  * @hi_priority_depth:
1080  * @hpr_lookup:
1081  * @hpr_free_list:
1082  * @internal_smid:
1083  * @internal:
1084  * @internal_dma:
1085  * @internal_depth:
1086  * @internal_lookup:
1087  * @internal_free_list:
1088  * @sense: pool of sense
1089  * @sense_dma:
1090  * @sense_dma_pool:
1091  * @reply_depth: hba reply queue depth:
1092  * @reply_sz: per reply frame size:
1093  * @reply: pool of replys:
1094  * @reply_dma:
1095  * @reply_dma_pool:
1096  * @reply_free_queue_depth: reply free depth
1097  * @reply_free: pool for reply free queue (32 bit addr)
1098  * @reply_free_dma:
1099  * @reply_free_dma_pool:
1100  * @reply_free_host_index: tail index in pool to insert free replys
1101  * @reply_post_queue_depth: reply post queue depth
1102  * @reply_post_struct: struct for reply_post_free physical & virt address
1103  * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1104  * @rdpq_array_enable: rdpq_array support is enabled in the driver
1105  * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1106  *				is assigned only ones
1107  * @reply_queue_count: number of reply queue's
1108  * @reply_queue_list: link list contaning the reply queue info
1109  * @msix96_vector: 96 MSI-X vector support
1110  * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1111  * @delayed_tr_list: target reset link list
1112  * @delayed_tr_volume_list: volume target reset link list
1113  * @delayed_sc_list:
1114  * @delayed_event_ack_list:
1115  * @temp_sensors_count: flag to carry the number of temperature sensors
1116  * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1117  *	pci resource handling. PCI resource freeing will lead to free
1118  *	vital hardware/memory resource, which might be in use by cli/sysfs
1119  *	path functions resulting in Null pointer reference followed by kernel
1120  *	crash. To avoid the above race condition we use mutex syncrhonization
1121  *	which ensures the syncrhonization between cli/sysfs_show path.
1122  */
1123 struct MPT3SAS_ADAPTER {
1124 	struct list_head list;
1125 	struct Scsi_Host *shost;
1126 	u8		id;
1127 	int		cpu_count;
1128 	char		name[MPT_NAME_LENGTH];
1129 	char		driver_name[MPT_NAME_LENGTH - 8];
1130 	char		tmp_string[MPT_STRING_LENGTH];
1131 	struct pci_dev	*pdev;
1132 	Mpi2SystemInterfaceRegs_t __iomem *chip;
1133 	phys_addr_t	chip_phys;
1134 	int		logging_level;
1135 	int		fwfault_debug;
1136 	u8		ir_firmware;
1137 	int		bars;
1138 	u8		mask_interrupts;
1139 	int		dma_mask;
1140 
1141 	/* fw fault handler */
1142 	char		fault_reset_work_q_name[20];
1143 	struct workqueue_struct *fault_reset_work_q;
1144 	struct delayed_work fault_reset_work;
1145 
1146 	/* fw event handler */
1147 	char		firmware_event_name[20];
1148 	struct workqueue_struct	*firmware_event_thread;
1149 	spinlock_t	fw_event_lock;
1150 	struct list_head fw_event_list;
1151 
1152 	 /* misc flags */
1153 	int		aen_event_read_flag;
1154 	u8		broadcast_aen_busy;
1155 	u16		broadcast_aen_pending;
1156 	u8		shost_recovery;
1157 	u8		got_task_abort_from_ioctl;
1158 
1159 	struct mutex	reset_in_progress_mutex;
1160 	spinlock_t	ioc_reset_in_progress_lock;
1161 	u8		ioc_link_reset_in_progress;
1162 
1163 	u8		ignore_loginfos;
1164 	u8		remove_host;
1165 	u8		pci_error_recovery;
1166 	u8		wait_for_discovery_to_complete;
1167 	u8		is_driver_loading;
1168 	u8		port_enable_failed;
1169 	u8		start_scan;
1170 	u16		start_scan_failed;
1171 
1172 	u8		msix_enable;
1173 	u16		msix_vector_count;
1174 	u8		*cpu_msix_table;
1175 	u16		cpu_msix_table_sz;
1176 	resource_size_t __iomem **reply_post_host_index;
1177 	u32		ioc_reset_count;
1178 	MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1179 	u32             non_operational_loop;
1180 
1181 	/* internal commands, callback index */
1182 	u8		scsi_io_cb_idx;
1183 	u8		tm_cb_idx;
1184 	u8		transport_cb_idx;
1185 	u8		scsih_cb_idx;
1186 	u8		ctl_cb_idx;
1187 	u8		base_cb_idx;
1188 	u8		port_enable_cb_idx;
1189 	u8		config_cb_idx;
1190 	u8		tm_tr_cb_idx;
1191 	u8		tm_tr_volume_cb_idx;
1192 	u8		tm_sas_control_cb_idx;
1193 	struct _internal_cmd base_cmds;
1194 	struct _internal_cmd port_enable_cmds;
1195 	struct _internal_cmd transport_cmds;
1196 	struct _internal_cmd scsih_cmds;
1197 	struct _internal_cmd tm_cmds;
1198 	struct _internal_cmd ctl_cmds;
1199 	struct _internal_cmd config_cmds;
1200 
1201 	MPT_ADD_SGE	base_add_sg_single;
1202 
1203 	/* function ptr for either IEEE or MPI sg elements */
1204 	MPT_BUILD_SG_SCMD build_sg_scmd;
1205 	MPT_BUILD_SG    build_sg;
1206 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1207 	u16             sge_size_ieee;
1208 	u16		hba_mpi_version_belonged;
1209 
1210 	/* function ptr for MPI sg elements only */
1211 	MPT_BUILD_SG    build_sg_mpi;
1212 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1213 
1214 	/* function ptr for NVMe PRP elements only */
1215 	NVME_BUILD_PRP  build_nvme_prp;
1216 
1217 	/* event log */
1218 	u32		event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1219 	u32		event_context;
1220 	void		*event_log;
1221 	u32		event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1222 
1223 	u8		tm_custom_handling;
1224 	u8		nvme_abort_timeout;
1225 
1226 
1227 	/* static config pages */
1228 	struct mpt3sas_facts facts;
1229 	struct mpt3sas_port_facts *pfacts;
1230 	Mpi2ManufacturingPage0_t manu_pg0;
1231 	struct Mpi2ManufacturingPage10_t manu_pg10;
1232 	struct Mpi2ManufacturingPage11_t manu_pg11;
1233 	Mpi2BiosPage2_t	bios_pg2;
1234 	Mpi2BiosPage3_t	bios_pg3;
1235 	Mpi2IOCPage8_t ioc_pg8;
1236 	Mpi2IOUnitPage0_t iounit_pg0;
1237 	Mpi2IOUnitPage1_t iounit_pg1;
1238 	Mpi2IOUnitPage8_t iounit_pg8;
1239 
1240 	struct _boot_device req_boot_device;
1241 	struct _boot_device req_alt_boot_device;
1242 	struct _boot_device current_boot_device;
1243 
1244 	/* sas hba, expander, and device list */
1245 	struct _sas_node sas_hba;
1246 	struct list_head sas_expander_list;
1247 	struct list_head enclosure_list;
1248 	spinlock_t	sas_node_lock;
1249 	struct list_head sas_device_list;
1250 	struct list_head sas_device_init_list;
1251 	spinlock_t	sas_device_lock;
1252 	struct list_head pcie_device_list;
1253 	struct list_head pcie_device_init_list;
1254 	spinlock_t      pcie_device_lock;
1255 
1256 	struct list_head raid_device_list;
1257 	spinlock_t	raid_device_lock;
1258 	u8		io_missing_delay;
1259 	u16		device_missing_delay;
1260 	int		sas_id;
1261 	int		pcie_target_id;
1262 
1263 	void		*blocking_handles;
1264 	void		*pd_handles;
1265 	u16		pd_handles_sz;
1266 
1267 	void		*pend_os_device_add;
1268 	u16		pend_os_device_add_sz;
1269 
1270 	/* config page */
1271 	u16		config_page_sz;
1272 	void		*config_page;
1273 	dma_addr_t	config_page_dma;
1274 	void		*config_vaddr;
1275 
1276 	/* scsiio request */
1277 	u16		hba_queue_depth;
1278 	u16		sge_size;
1279 	u16		scsiio_depth;
1280 	u16		request_sz;
1281 	u8		*request;
1282 	dma_addr_t	request_dma;
1283 	u32		request_dma_sz;
1284 	struct pcie_sg_list *pcie_sg_lookup;
1285 	spinlock_t	scsi_lookup_lock;
1286 	int		pending_io_count;
1287 	wait_queue_head_t reset_wq;
1288 
1289 	/* PCIe SGL */
1290 	struct dma_pool *pcie_sgl_dma_pool;
1291 	/* Host Page Size */
1292 	u32		page_size;
1293 
1294 	/* chain */
1295 	struct chain_lookup *chain_lookup;
1296 	struct list_head free_chain_list;
1297 	struct dma_pool *chain_dma_pool;
1298 	ulong		chain_pages;
1299 	u16		max_sges_in_main_message;
1300 	u16		max_sges_in_chain_message;
1301 	u16		chains_needed_per_io;
1302 	u32		chain_depth;
1303 	u16		chain_segment_sz;
1304 	u16		chains_per_prp_buffer;
1305 
1306 	/* hi-priority queue */
1307 	u16		hi_priority_smid;
1308 	u8		*hi_priority;
1309 	dma_addr_t	hi_priority_dma;
1310 	u16		hi_priority_depth;
1311 	struct request_tracker *hpr_lookup;
1312 	struct list_head hpr_free_list;
1313 
1314 	/* internal queue */
1315 	u16		internal_smid;
1316 	u8		*internal;
1317 	dma_addr_t	internal_dma;
1318 	u16		internal_depth;
1319 	struct request_tracker *internal_lookup;
1320 	struct list_head internal_free_list;
1321 
1322 	/* sense */
1323 	u8		*sense;
1324 	dma_addr_t	sense_dma;
1325 	struct dma_pool *sense_dma_pool;
1326 
1327 	/* reply */
1328 	u16		reply_sz;
1329 	u8		*reply;
1330 	dma_addr_t	reply_dma;
1331 	u32		reply_dma_max_address;
1332 	u32		reply_dma_min_address;
1333 	struct dma_pool *reply_dma_pool;
1334 
1335 	/* reply free queue */
1336 	u16		reply_free_queue_depth;
1337 	__le32		*reply_free;
1338 	dma_addr_t	reply_free_dma;
1339 	struct dma_pool *reply_free_dma_pool;
1340 	u32		reply_free_host_index;
1341 
1342 	/* reply post queue */
1343 	u16		reply_post_queue_depth;
1344 	struct reply_post_struct *reply_post;
1345 	u8		rdpq_array_capable;
1346 	u8		rdpq_array_enable;
1347 	u8		rdpq_array_enable_assigned;
1348 	struct dma_pool *reply_post_free_dma_pool;
1349 	struct dma_pool *reply_post_free_array_dma_pool;
1350 	Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1351 	dma_addr_t reply_post_free_array_dma;
1352 	u8		reply_queue_count;
1353 	struct list_head reply_queue_list;
1354 
1355 	u8		combined_reply_queue;
1356 	u8		combined_reply_index_count;
1357 	/* reply post register index */
1358 	resource_size_t	**replyPostRegisterIndex;
1359 
1360 	struct list_head delayed_tr_list;
1361 	struct list_head delayed_tr_volume_list;
1362 	struct list_head delayed_sc_list;
1363 	struct list_head delayed_event_ack_list;
1364 	u8		temp_sensors_count;
1365 	struct mutex pci_access_mutex;
1366 
1367 	/* diag buffer support */
1368 	u8		*diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1369 	u32		diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1370 	dma_addr_t	diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1371 	u8		diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1372 	u32		unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1373 	u32		product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1374 	u32		diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1375 	u32		ring_buffer_offset;
1376 	u32		ring_buffer_sz;
1377 	u8		is_warpdrive;
1378 	u8		is_mcpu_endpoint;
1379 	u8		hide_ir_msg;
1380 	u8		mfg_pg10_hide_flag;
1381 	u8		hide_drives;
1382 	spinlock_t	diag_trigger_lock;
1383 	u8		diag_trigger_active;
1384 	struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1385 	struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1386 	struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1387 	struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1388 	void		*device_remove_in_progress;
1389 	u16		device_remove_in_progress_sz;
1390 	u8		is_gen35_ioc;
1391 	PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1392 
1393 };
1394 
1395 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1396 	u32 reply);
1397 
1398 
1399 /* base shared API */
1400 extern struct list_head mpt3sas_ioc_list;
1401 extern char    driver_name[MPT_NAME_LENGTH];
1402 /* spinlock on list operations over IOCs
1403  * Case: when multiple warpdrive cards(IOCs) are in use
1404  * Each IOC will added to the ioc list structure on initialization.
1405  * Watchdog threads run at regular intervals to check IOC for any
1406  * fault conditions which will trigger the dead_ioc thread to
1407  * deallocate pci resource, resulting deleting the IOC netry from list,
1408  * this deletion need to protected by spinlock to enusre that
1409  * ioc removal is syncrhonized, if not synchronized it might lead to
1410  * list_del corruption as the ioc list is traversed in cli path.
1411  */
1412 extern spinlock_t gioc_lock;
1413 
1414 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1415 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1416 
1417 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1418 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1419 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1420 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1421 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1422 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1423 	enum reset_type type);
1424 
1425 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1426 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1427 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1428 	u16 smid);
1429 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1430 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1431 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1432 
1433 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1434 	u16 handle);
1435 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1436 	u16 msix_task);
1437 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1438 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1439 /* hi-priority queue */
1440 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1441 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1442 		struct scsi_cmnd *scmd);
1443 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1444 		struct scsiio_tracker *st);
1445 
1446 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1447 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1448 void mpt3sas_base_initialize_callback_handler(void);
1449 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1450 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1451 
1452 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1453 	u32 reply);
1454 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1455 	u8 msix_index, u32 reply);
1456 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1457 	u32 phys_addr);
1458 
1459 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1460 
1461 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1462 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1463 	Mpi2SasIoUnitControlReply_t *mpi_reply,
1464 	Mpi2SasIoUnitControlRequest_t *mpi_request);
1465 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1466 	Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1467 
1468 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1469 	u32 *event_type);
1470 
1471 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1472 
1473 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1474 	u16 device_missing_delay, u8 io_missing_delay);
1475 
1476 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1477 
1478 void
1479 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1480 
1481 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1482 	u8 status, void *mpi_request, int sz);
1483 
1484 /* scsih shared API */
1485 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1486 	u16 smid);
1487 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1488 	u32 reply);
1489 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1490 void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1491 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1492 
1493 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1494 	u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1495 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1496 	u64 lun, u8 type, u16 smid_task, u16 msix_task,
1497 	u8 timeout, u8 tr_method);
1498 
1499 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1500 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1501 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1502 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1503 	u64 sas_address);
1504 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1505 	u16 smid);
1506 
1507 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1508 	struct MPT3SAS_ADAPTER *ioc, u16 handle);
1509 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1510 	struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1511 struct _sas_device *mpt3sas_get_sdev_by_addr(
1512 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1513 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1514 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1515 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1516 	u16 handle);
1517 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1518 	u16 handle);
1519 
1520 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1521 struct _raid_device *
1522 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1523 
1524 /* config shared API */
1525 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1526 	u32 reply);
1527 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1528 	u8 *num_phys);
1529 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1530 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1531 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1532 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1533 	u16 sz);
1534 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1535 	Mpi2ConfigReply_t *mpi_reply,
1536 	struct Mpi2ManufacturingPage10_t *config_page);
1537 
1538 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1539 	Mpi2ConfigReply_t *mpi_reply,
1540 	struct Mpi2ManufacturingPage11_t  *config_page);
1541 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1542 	Mpi2ConfigReply_t *mpi_reply,
1543 	struct Mpi2ManufacturingPage11_t *config_page);
1544 
1545 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1546 	*mpi_reply, Mpi2BiosPage2_t *config_page);
1547 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1548 	*mpi_reply, Mpi2BiosPage3_t *config_page);
1549 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1550 	*mpi_reply, Mpi2IOUnitPage0_t *config_page);
1551 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1552 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1553 	u32 form, u32 handle);
1554 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1555 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1556 	u32 form, u32 handle);
1557 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1558 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1559 	u32 form, u32 handle);
1560 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1561 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1562 	u32 form, u32 handle);
1563 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1564 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1565 	u16 sz);
1566 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1567 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1568 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1569 	Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1570 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1571 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1572 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1573 	*mpi_reply, Mpi2IOUnitPage8_t *config_page);
1574 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1575 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1576 	u16 sz);
1577 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1578 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1579 	u16 sz);
1580 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1581 	*mpi_reply, Mpi2IOCPage8_t *config_page);
1582 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1583 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1584 	u32 form, u32 handle);
1585 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1586 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1587 	u32 phy_number, u16 handle);
1588 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1589 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1590 	u32 form, u32 handle);
1591 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1592 	*mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1593 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1594 	*mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1595 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1596 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1597 	u32 handle);
1598 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1599 	u8 *num_pds);
1600 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1601 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1602 	u32 handle, u16 sz);
1603 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1604 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1605 	u32 form, u32 form_specific);
1606 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1607 	u16 *volume_handle);
1608 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1609 	u16 volume_handle, u64 *wwid);
1610 
1611 /* ctl shared API */
1612 extern struct device_attribute *mpt3sas_host_attrs[];
1613 extern struct device_attribute *mpt3sas_dev_attrs[];
1614 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1615 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1616 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1617 	u32 reply);
1618 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1619 void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1620 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1621 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1622 	u8 msix_index, u32 reply);
1623 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1624 	Mpi2EventNotificationReply_t *mpi_reply);
1625 
1626 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1627 	u8 bits_to_register);
1628 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1629 	u8 *issue_reset);
1630 
1631 /* transport shared API */
1632 extern struct scsi_transport_template *mpt3sas_transport_template;
1633 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1634 	u32 reply);
1635 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1636 	u16 handle, u64 sas_address);
1637 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1638 	u64 sas_address_parent);
1639 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1640 	*mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1641 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1642 	struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1643 	struct device *parent_dev);
1644 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1645 	u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1646 extern struct sas_function_template mpt3sas_transport_functions;
1647 extern struct scsi_transport_template *mpt3sas_transport_template;
1648 /* trigger data externs */
1649 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1650 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1651 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1652 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1653 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1654 	u32 tigger_bitmask);
1655 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1656 	u16 log_entry_qualifier);
1657 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1658 	u8 asc, u8 ascq);
1659 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1660 	u32 loginfo);
1661 
1662 /* warpdrive APIs */
1663 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1664 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1665 	struct _raid_device *raid_device);
1666 void
1667 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1668 	struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1669 
1670 /* NCQ Prio Handling Check */
1671 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1672 
1673 #endif /* MPT3SAS_BASE_H_INCLUDED */
1674