1 /* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h 6 * Copyright (C) 2012-2014 LSI Corporation 7 * Copyright (C) 2013-2014 Avago Technologies 8 * (mailto: MPT-FusionLinux.pdl@avagotech.com) 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 2 13 * of the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * NO WARRANTY 21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 * solely responsible for determining the appropriateness of using and 26 * distributing the Program and assumes all risks associated with its 27 * exercise of rights under this Agreement, including but not limited to 28 * the risks and costs of program errors, damage to or loss of data, 29 * programs or equipment, and unavailability or interruption of operations. 30 31 * DISCLAIMER OF LIABILITY 32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 40 * You should have received a copy of the GNU General Public License 41 * along with this program; if not, write to the Free Software 42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 43 * USA. 44 */ 45 46 #ifndef MPT3SAS_BASE_H_INCLUDED 47 #define MPT3SAS_BASE_H_INCLUDED 48 49 #include "mpi/mpi2_type.h" 50 #include "mpi/mpi2.h" 51 #include "mpi/mpi2_ioc.h" 52 #include "mpi/mpi2_cnfg.h" 53 #include "mpi/mpi2_init.h" 54 #include "mpi/mpi2_raid.h" 55 #include "mpi/mpi2_tool.h" 56 #include "mpi/mpi2_sas.h" 57 #include "mpi/mpi2_pci.h" 58 #include "mpi/mpi2_image.h" 59 60 #include <scsi/scsi.h> 61 #include <scsi/scsi_cmnd.h> 62 #include <scsi/scsi_device.h> 63 #include <scsi/scsi_host.h> 64 #include <scsi/scsi_tcq.h> 65 #include <scsi/scsi_transport_sas.h> 66 #include <scsi/scsi_dbg.h> 67 #include <scsi/scsi_eh.h> 68 #include <linux/pci.h> 69 #include <linux/poll.h> 70 #include <linux/irq_poll.h> 71 72 #include "mpt3sas_debug.h" 73 #include "mpt3sas_trigger_diag.h" 74 75 /* driver versioning info */ 76 #define MPT3SAS_DRIVER_NAME "mpt3sas" 77 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" 78 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" 79 #define MPT3SAS_DRIVER_VERSION "33.100.00.00" 80 #define MPT3SAS_MAJOR_VERSION 33 81 #define MPT3SAS_MINOR_VERSION 100 82 #define MPT3SAS_BUILD_VERSION 0 83 #define MPT3SAS_RELEASE_VERSION 00 84 85 #define MPT2SAS_DRIVER_NAME "mpt2sas" 86 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" 87 #define MPT2SAS_DRIVER_VERSION "20.102.00.00" 88 #define MPT2SAS_MAJOR_VERSION 20 89 #define MPT2SAS_MINOR_VERSION 102 90 #define MPT2SAS_BUILD_VERSION 0 91 #define MPT2SAS_RELEASE_VERSION 00 92 93 /* CoreDump: Default timeout */ 94 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/ 95 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF) 96 97 /* 98 * Set MPT3SAS_SG_DEPTH value based on user input. 99 */ 100 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE 101 #define MPT_MIN_PHYS_SEGMENTS 16 102 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32 103 104 #define MCPU_MAX_CHAINS_PER_IO 3 105 106 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE 107 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE 108 #else 109 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 110 #endif 111 112 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE 113 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE 114 #else 115 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 116 #endif 117 118 /* 119 * Generic Defines 120 */ 121 #define MPT3SAS_SATA_QUEUE_DEPTH 32 122 #define MPT3SAS_SAS_QUEUE_DEPTH 254 123 #define MPT3SAS_RAID_QUEUE_DEPTH 128 124 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200 125 126 #define MPT3SAS_RAID_MAX_SECTORS 8192 127 #define MPT3SAS_HOST_PAGE_SIZE_4K 12 128 #define MPT3SAS_NVME_QUEUE_DEPTH 128 129 #define MPT_NAME_LENGTH 32 /* generic length of strings */ 130 #define MPT_STRING_LENGTH 64 131 #define MPI_FRAME_START_OFFSET 256 132 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/ 133 134 #define MPT_MAX_CALLBACKS 32 135 136 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */ 137 /* reserved for issuing internally framed scsi io cmds */ 138 #define INTERNAL_SCSIIO_CMDS_COUNT 3 139 140 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/ 141 142 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF 143 144 #define MAX_CHAIN_ELEMT_SZ 16 145 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8 146 147 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6 148 #define FW_IMG_HDR_READ_TIMEOUT 15 149 150 #define IOC_OPERATIONAL_WAIT_COUNT 10 151 152 /* 153 * NVMe defines 154 */ 155 #define NVME_PRP_SIZE 8 /* PRP size */ 156 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 157 #define NVME_TASK_ABORT_MIN_TIMEOUT 6 158 #define NVME_TASK_ABORT_MAX_TIMEOUT 60 159 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010) 160 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ 161 162 struct mpt3sas_nvme_cmd { 163 u8 rsvd[24]; 164 __le64 prp1; 165 __le64 prp2; 166 }; 167 168 /* 169 * logging format 170 */ 171 #define ioc_err(ioc, fmt, ...) \ 172 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 173 #define ioc_notice(ioc, fmt, ...) \ 174 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 175 #define ioc_warn(ioc, fmt, ...) \ 176 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 177 #define ioc_info(ioc, fmt, ...) \ 178 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 179 180 /* 181 * WarpDrive Specific Log codes 182 */ 183 184 #define MPT2_WARPDRIVE_LOGENTRY (0x8002) 185 #define MPT2_WARPDRIVE_LC_SSDT (0x41) 186 #define MPT2_WARPDRIVE_LC_SSDLW (0x43) 187 #define MPT2_WARPDRIVE_LC_SSDLF (0x44) 188 #define MPT2_WARPDRIVE_LC_BRMF (0x4D) 189 190 /* 191 * per target private data 192 */ 193 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01 194 #define MPT_TARGET_FLAGS_VOLUME 0x02 195 #define MPT_TARGET_FLAGS_DELETED 0x04 196 #define MPT_TARGET_FASTPATH_IO 0x08 197 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10 198 199 #define SAS2_PCI_DEVICE_B0_REVISION (0x01) 200 #define SAS3_PCI_DEVICE_C0_REVISION (0x02) 201 202 /* Atlas PCIe Switch Management Port */ 203 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2) 204 205 /* 206 * Intel HBA branding 207 */ 208 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \ 209 "Intel(R) Integrated RAID Module RMS25JB080" 210 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \ 211 "Intel(R) Integrated RAID Module RMS25JB040" 212 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \ 213 "Intel(R) Integrated RAID Module RMS25KB080" 214 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \ 215 "Intel(R) Integrated RAID Module RMS25KB040" 216 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \ 217 "Intel(R) Integrated RAID Module RMS25LB040" 218 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \ 219 "Intel(R) Integrated RAID Module RMS25LB080" 220 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \ 221 "Intel Integrated RAID Module RMS2LL080" 222 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \ 223 "Intel Integrated RAID Module RMS2LL040" 224 #define MPT2SAS_INTEL_RS25GB008_BRANDING \ 225 "Intel(R) RAID Controller RS25GB008" 226 #define MPT2SAS_INTEL_SSD910_BRANDING \ 227 "Intel(R) SSD 910 Series" 228 229 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \ 230 "Intel(R) Integrated RAID Module RMS3JC080" 231 #define MPT3SAS_INTEL_RS3GC008_BRANDING \ 232 "Intel(R) RAID Controller RS3GC008" 233 #define MPT3SAS_INTEL_RS3FC044_BRANDING \ 234 "Intel(R) RAID Controller RS3FC044" 235 #define MPT3SAS_INTEL_RS3UC080_BRANDING \ 236 "Intel(R) RAID Controller RS3UC080" 237 238 /* 239 * Intel HBA SSDIDs 240 */ 241 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516 242 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517 243 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518 244 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519 245 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A 246 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B 247 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E 248 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F 249 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000 250 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700 251 252 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521 253 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522 254 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523 255 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524 256 257 /* 258 * Dell HBA branding 259 */ 260 #define MPT2SAS_DELL_BRANDING_SIZE 32 261 262 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA" 263 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter" 264 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated" 265 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular" 266 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded" 267 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200" 268 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS" 269 270 #define MPT3SAS_DELL_12G_HBA_BRANDING \ 271 "Dell 12Gbps HBA" 272 273 /* 274 * Dell HBA SSDIDs 275 */ 276 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C 277 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D 278 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E 279 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F 280 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20 281 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21 282 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22 283 284 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46 285 286 /* 287 * Cisco HBA branding 288 */ 289 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \ 290 "Cisco 9300-8E 12G SAS HBA" 291 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \ 292 "Cisco 9300-8i 12G SAS HBA" 293 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \ 294 "Cisco 12G Modular SAS Pass through Controller" 295 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \ 296 "UCS C3X60 12G SAS Pass through Controller" 297 /* 298 * Cisco HBA SSSDIDs 299 */ 300 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C 301 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154 302 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155 303 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156 304 305 /* 306 * status bits for ioc->diag_buffer_status 307 */ 308 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01) 309 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02) 310 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04) 311 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08) 312 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10) 313 314 /* 315 * HP HBA branding 316 */ 317 #define MPT2SAS_HP_3PAR_SSVID 0x1590 318 319 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \ 320 "HP H220 Host Bus Adapter" 321 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \ 322 "HP H221 Host Bus Adapter" 323 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \ 324 "HP H222 Host Bus Adapter" 325 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \ 326 "HP H220i Host Bus Adapter" 327 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \ 328 "HP H210i Host Bus Adapter" 329 330 /* 331 * HO HBA SSDIDs 332 */ 333 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041 334 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042 335 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043 336 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044 337 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046 338 339 /* 340 * Combined Reply Queue constants, 341 * There are twelve Supplemental Reply Post Host Index Registers 342 * and each register is at offset 0x10 bytes from the previous one. 343 */ 344 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8) 345 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12 346 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16 347 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10) 348 349 /* OEM Identifiers */ 350 #define MFG10_OEM_ID_INVALID (0x00000000) 351 #define MFG10_OEM_ID_DELL (0x00000001) 352 #define MFG10_OEM_ID_FSC (0x00000002) 353 #define MFG10_OEM_ID_SUN (0x00000003) 354 #define MFG10_OEM_ID_IBM (0x00000004) 355 356 /* GENERIC Flags 0*/ 357 #define MFG10_GF0_OCE_DISABLED (0x00000001) 358 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) 359 #define MFG10_GF0_R10_DISPLAY (0x00000004) 360 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) 361 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) 362 363 #define VIRTUAL_IO_FAILED_RETRY (0x32010081) 364 365 /* High IOPs definitions */ 366 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8 367 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8 368 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16 369 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128 370 371 /* OEM Specific Flags will come from OEM specific header files */ 372 struct Mpi2ManufacturingPage10_t { 373 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 374 U8 OEMIdentifier; /* 04h */ 375 U8 Reserved1; /* 05h */ 376 U16 Reserved2; /* 08h */ 377 U32 Reserved3; /* 0Ch */ 378 U32 GenericFlags0; /* 10h */ 379 U32 GenericFlags1; /* 14h */ 380 U32 Reserved4; /* 18h */ 381 U32 OEMSpecificFlags0; /* 1Ch */ 382 U32 OEMSpecificFlags1; /* 20h */ 383 U32 Reserved5[18]; /* 24h - 60h*/ 384 }; 385 386 387 /* Miscellaneous options */ 388 struct Mpi2ManufacturingPage11_t { 389 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 390 __le32 Reserved1; /* 04h */ 391 u8 Reserved2; /* 08h */ 392 u8 EEDPTagMode; /* 09h */ 393 u8 Reserved3; /* 0Ah */ 394 u8 Reserved4; /* 0Bh */ 395 __le32 Reserved5[8]; /* 0Ch-2Ch */ 396 u16 AddlFlags2; /* 2Ch */ 397 u8 AddlFlags3; /* 2Eh */ 398 u8 Reserved6; /* 2Fh */ 399 __le32 Reserved7[7]; /* 30h - 4Bh */ 400 u8 NVMeAbortTO; /* 4Ch */ 401 u8 NumPerDevEvents; /* 4Dh */ 402 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */ 403 u8 HostTraceBufferFlags; /* 4Fh */ 404 u16 HostTraceBufferMaxSizeKB; /* 50h */ 405 u16 HostTraceBufferMinSizeKB; /* 52h */ 406 u8 CoreDumpTOSec; /* 54h */ 407 u8 Reserved8; /* 55h */ 408 u16 Reserved9; /* 56h */ 409 __le32 Reserved10; /* 58h */ 410 }; 411 412 /** 413 * struct MPT3SAS_TARGET - starget private hostdata 414 * @starget: starget object 415 * @sas_address: target sas address 416 * @raid_device: raid_device pointer to access volume data 417 * @handle: device handle 418 * @num_luns: number luns 419 * @flags: MPT_TARGET_FLAGS_XXX flags 420 * @deleted: target flaged for deletion 421 * @tm_busy: target is busy with TM request. 422 * @sas_dev: The sas_device associated with this target 423 * @pcie_dev: The pcie device associated with this target 424 */ 425 struct MPT3SAS_TARGET { 426 struct scsi_target *starget; 427 u64 sas_address; 428 struct _raid_device *raid_device; 429 u16 handle; 430 int num_luns; 431 u32 flags; 432 u8 deleted; 433 u8 tm_busy; 434 struct _sas_device *sas_dev; 435 struct _pcie_device *pcie_dev; 436 }; 437 438 439 /* 440 * per device private data 441 */ 442 #define MPT_DEVICE_FLAGS_INIT 0x01 443 444 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003) 445 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00) 446 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01) 447 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02) 448 449 /** 450 * struct MPT3SAS_DEVICE - sdev private hostdata 451 * @sas_target: starget private hostdata 452 * @lun: lun number 453 * @flags: MPT_DEVICE_XXX flags 454 * @configured_lun: lun is configured 455 * @block: device is in SDEV_BLOCK state 456 * @tlr_snoop_check: flag used in determining whether to disable TLR 457 * @eedp_enable: eedp support enable bit 458 * @eedp_type: 0(type_1), 1(type_2), 2(type_3) 459 * @eedp_block_length: block size 460 * @ata_command_pending: SATL passthrough outstanding for device 461 */ 462 struct MPT3SAS_DEVICE { 463 struct MPT3SAS_TARGET *sas_target; 464 unsigned int lun; 465 u32 flags; 466 u8 configured_lun; 467 u8 block; 468 u8 tlr_snoop_check; 469 u8 ignore_delay_remove; 470 /* Iopriority Command Handling */ 471 u8 ncq_prio_enable; 472 /* 473 * Bug workaround for SATL handling: the mpt2/3sas firmware 474 * doesn't return BUSY or TASK_SET_FULL for subsequent 475 * commands while a SATL pass through is in operation as the 476 * spec requires, it simply does nothing with them until the 477 * pass through completes, causing them possibly to timeout if 478 * the passthrough is a long executing command (like format or 479 * secure erase). This variable allows us to do the right 480 * thing while a SATL command is pending. 481 */ 482 unsigned long ata_command_pending; 483 484 }; 485 486 #define MPT3_CMD_NOT_USED 0x8000 /* free */ 487 #define MPT3_CMD_COMPLETE 0x0001 /* completed */ 488 #define MPT3_CMD_PENDING 0x0002 /* pending */ 489 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */ 490 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */ 491 492 /** 493 * struct _internal_cmd - internal commands struct 494 * @mutex: mutex 495 * @done: completion 496 * @reply: reply message pointer 497 * @sense: sense data 498 * @status: MPT3_CMD_XXX status 499 * @smid: system message id 500 */ 501 struct _internal_cmd { 502 struct mutex mutex; 503 struct completion done; 504 void *reply; 505 void *sense; 506 u16 status; 507 u16 smid; 508 }; 509 510 511 512 /** 513 * struct _sas_device - attached device information 514 * @list: sas device list 515 * @starget: starget object 516 * @sas_address: device sas address 517 * @device_name: retrieved from the SAS IDENTIFY frame. 518 * @handle: device handle 519 * @sas_address_parent: sas address of parent expander or sas host 520 * @enclosure_handle: enclosure handle 521 * @enclosure_logical_id: enclosure logical identifier 522 * @volume_handle: volume handle (valid when hidden raid member) 523 * @volume_wwid: volume unique identifier 524 * @device_info: bitfield provides detailed info about the device 525 * @id: target id 526 * @channel: target channel 527 * @slot: number number 528 * @phy: phy identifier provided in sas device page 0 529 * @responding: used in _scsih_sas_device_mark_responding 530 * @fast_path: fast path feature enable bit 531 * @pfa_led_on: flag for PFA LED status 532 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() 533 * addition routine. 534 * @chassis_slot: chassis slot 535 * @is_chassis_slot_valid: chassis slot valid or not 536 */ 537 struct _sas_device { 538 struct list_head list; 539 struct scsi_target *starget; 540 u64 sas_address; 541 u64 device_name; 542 u16 handle; 543 u64 sas_address_parent; 544 u16 enclosure_handle; 545 u64 enclosure_logical_id; 546 u16 volume_handle; 547 u64 volume_wwid; 548 u32 device_info; 549 int id; 550 int channel; 551 u16 slot; 552 u8 phy; 553 u8 responding; 554 u8 fast_path; 555 u8 pfa_led_on; 556 u8 pend_sas_rphy_add; 557 u8 enclosure_level; 558 u8 chassis_slot; 559 u8 is_chassis_slot_valid; 560 u8 connector_name[5]; 561 struct kref refcount; 562 }; 563 564 static inline void sas_device_get(struct _sas_device *s) 565 { 566 kref_get(&s->refcount); 567 } 568 569 static inline void sas_device_free(struct kref *r) 570 { 571 kfree(container_of(r, struct _sas_device, refcount)); 572 } 573 574 static inline void sas_device_put(struct _sas_device *s) 575 { 576 kref_put(&s->refcount, sas_device_free); 577 } 578 579 /* 580 * struct _pcie_device - attached PCIe device information 581 * @list: pcie device list 582 * @starget: starget object 583 * @wwid: device WWID 584 * @handle: device handle 585 * @device_info: bitfield provides detailed info about the device 586 * @id: target id 587 * @channel: target channel 588 * @slot: slot number 589 * @port_num: port number 590 * @responding: used in _scsih_pcie_device_mark_responding 591 * @fast_path: fast path feature enable bit 592 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for 593 * NVMe device only 594 * @enclosure_handle: enclosure handle 595 * @enclosure_logical_id: enclosure logical identifier 596 * @enclosure_level: The level of device's enclosure from the controller 597 * @connector_name: ASCII value of the Connector's name 598 * @serial_number: pointer of serial number string allocated runtime 599 * @access_status: Device's Access Status 600 * @shutdown_latency: NVMe device's RTD3 Entry Latency 601 * @refcount: reference count for deletion 602 */ 603 struct _pcie_device { 604 struct list_head list; 605 struct scsi_target *starget; 606 u64 wwid; 607 u16 handle; 608 u32 device_info; 609 int id; 610 int channel; 611 u16 slot; 612 u8 port_num; 613 u8 responding; 614 u8 fast_path; 615 u32 nvme_mdts; 616 u16 enclosure_handle; 617 u64 enclosure_logical_id; 618 u8 enclosure_level; 619 u8 connector_name[4]; 620 u8 *serial_number; 621 u8 reset_timeout; 622 u8 access_status; 623 u16 shutdown_latency; 624 struct kref refcount; 625 }; 626 /** 627 * pcie_device_get - Increment the pcie device reference count 628 * 629 * @p: pcie_device object 630 * 631 * When ever this function called it will increment the 632 * reference count of the pcie device for which this function called. 633 * 634 */ 635 static inline void pcie_device_get(struct _pcie_device *p) 636 { 637 kref_get(&p->refcount); 638 } 639 640 /** 641 * pcie_device_free - Release the pcie device object 642 * @r - kref object 643 * 644 * Free's the pcie device object. It will be called when reference count 645 * reaches to zero. 646 */ 647 static inline void pcie_device_free(struct kref *r) 648 { 649 kfree(container_of(r, struct _pcie_device, refcount)); 650 } 651 652 /** 653 * pcie_device_put - Decrement the pcie device reference count 654 * 655 * @p: pcie_device object 656 * 657 * When ever this function called it will decrement the 658 * reference count of the pcie device for which this function called. 659 * 660 * When refernce count reaches to Zero, this will call pcie_device_free to the 661 * pcie_device object. 662 */ 663 static inline void pcie_device_put(struct _pcie_device *p) 664 { 665 kref_put(&p->refcount, pcie_device_free); 666 } 667 /** 668 * struct _raid_device - raid volume link list 669 * @list: sas device list 670 * @starget: starget object 671 * @sdev: scsi device struct (volumes are single lun) 672 * @wwid: unique identifier for the volume 673 * @handle: device handle 674 * @block_size: Block size of the volume 675 * @id: target id 676 * @channel: target channel 677 * @volume_type: the raid level 678 * @device_info: bitfield provides detailed info about the hidden components 679 * @num_pds: number of hidden raid components 680 * @responding: used in _scsih_raid_device_mark_responding 681 * @percent_complete: resync percent complete 682 * @direct_io_enabled: Whether direct io to PDs are allowed or not 683 * @stripe_exponent: X where 2powX is the stripe sz in blocks 684 * @block_exponent: X where 2powX is the block sz in bytes 685 * @max_lba: Maximum number of LBA in the volume 686 * @stripe_sz: Stripe Size of the volume 687 * @device_info: Device info of the volume member disk 688 * @pd_handle: Array of handles of the physical drives for direct I/O in le16 689 */ 690 #define MPT_MAX_WARPDRIVE_PDS 8 691 struct _raid_device { 692 struct list_head list; 693 struct scsi_target *starget; 694 struct scsi_device *sdev; 695 u64 wwid; 696 u16 handle; 697 u16 block_sz; 698 int id; 699 int channel; 700 u8 volume_type; 701 u8 num_pds; 702 u8 responding; 703 u8 percent_complete; 704 u8 direct_io_enabled; 705 u8 stripe_exponent; 706 u8 block_exponent; 707 u64 max_lba; 708 u32 stripe_sz; 709 u32 device_info; 710 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS]; 711 }; 712 713 /** 714 * struct _boot_device - boot device info 715 * 716 * @channel: sas, raid, or pcie channel 717 * @device: holds pointer for struct _sas_device, struct _raid_device or 718 * struct _pcie_device 719 */ 720 struct _boot_device { 721 int channel; 722 void *device; 723 }; 724 725 /** 726 * struct _sas_port - wide/narrow sas port information 727 * @port_list: list of ports belonging to expander 728 * @num_phys: number of phys belonging to this port 729 * @remote_identify: attached device identification 730 * @rphy: sas transport rphy object 731 * @port: sas transport wide/narrow port object 732 * @phy_list: _sas_phy list objects belonging to this port 733 */ 734 struct _sas_port { 735 struct list_head port_list; 736 u8 num_phys; 737 struct sas_identify remote_identify; 738 struct sas_rphy *rphy; 739 struct sas_port *port; 740 struct list_head phy_list; 741 }; 742 743 /** 744 * struct _sas_phy - phy information 745 * @port_siblings: list of phys belonging to a port 746 * @identify: phy identification 747 * @remote_identify: attached device identification 748 * @phy: sas transport phy object 749 * @phy_id: unique phy id 750 * @handle: device handle for this phy 751 * @attached_handle: device handle for attached device 752 * @phy_belongs_to_port: port has been created for this phy 753 */ 754 struct _sas_phy { 755 struct list_head port_siblings; 756 struct sas_identify identify; 757 struct sas_identify remote_identify; 758 struct sas_phy *phy; 759 u8 phy_id; 760 u16 handle; 761 u16 attached_handle; 762 u8 phy_belongs_to_port; 763 }; 764 765 /** 766 * struct _sas_node - sas_host/expander information 767 * @list: list of expanders 768 * @parent_dev: parent device class 769 * @num_phys: number phys belonging to this sas_host/expander 770 * @sas_address: sas address of this sas_host/expander 771 * @handle: handle for this sas_host/expander 772 * @sas_address_parent: sas address of parent expander or sas host 773 * @enclosure_handle: handle for this a member of an enclosure 774 * @device_info: bitwise defining capabilities of this sas_host/expander 775 * @responding: used in _scsih_expander_device_mark_responding 776 * @phy: a list of phys that make up this sas_host/expander 777 * @sas_port_list: list of ports attached to this sas_host/expander 778 */ 779 struct _sas_node { 780 struct list_head list; 781 struct device *parent_dev; 782 u8 num_phys; 783 u64 sas_address; 784 u16 handle; 785 u64 sas_address_parent; 786 u16 enclosure_handle; 787 u64 enclosure_logical_id; 788 u8 responding; 789 struct _sas_phy *phy; 790 struct list_head sas_port_list; 791 }; 792 793 794 /** 795 * struct _enclosure_node - enclosure information 796 * @list: list of enclosures 797 * @pg0: enclosure pg0; 798 */ 799 struct _enclosure_node { 800 struct list_head list; 801 Mpi2SasEnclosurePage0_t pg0; 802 }; 803 804 /** 805 * enum reset_type - reset state 806 * @FORCE_BIG_HAMMER: issue diagnostic reset 807 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer 808 */ 809 enum reset_type { 810 FORCE_BIG_HAMMER, 811 SOFT_RESET, 812 }; 813 814 /** 815 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) 816 * @pcie_sgl: PCIe native SGL for NVMe devices 817 * @pcie_sgl_dma: physical address 818 */ 819 struct pcie_sg_list { 820 void *pcie_sgl; 821 dma_addr_t pcie_sgl_dma; 822 }; 823 824 /** 825 * struct chain_tracker - firmware chain tracker 826 * @chain_buffer: chain buffer 827 * @chain_buffer_dma: physical address 828 * @tracker_list: list of free request (ioc->free_chain_list) 829 */ 830 struct chain_tracker { 831 void *chain_buffer; 832 dma_addr_t chain_buffer_dma; 833 }; 834 835 struct chain_lookup { 836 struct chain_tracker *chains_per_smid; 837 atomic_t chain_offset; 838 }; 839 840 /** 841 * struct scsiio_tracker - scsi mf request tracker 842 * @smid: system message id 843 * @cb_idx: callback index 844 * @direct_io: To indicate whether I/O is direct (WARPDRIVE) 845 * @chain_list: list of associated firmware chain tracker 846 * @msix_io: IO's msix 847 */ 848 struct scsiio_tracker { 849 u16 smid; 850 struct scsi_cmnd *scmd; 851 u8 cb_idx; 852 u8 direct_io; 853 struct pcie_sg_list pcie_sg_list; 854 struct list_head chain_list; 855 u16 msix_io; 856 }; 857 858 /** 859 * struct request_tracker - firmware request tracker 860 * @smid: system message id 861 * @cb_idx: callback index 862 * @tracker_list: list of free request (ioc->free_list) 863 */ 864 struct request_tracker { 865 u16 smid; 866 u8 cb_idx; 867 struct list_head tracker_list; 868 }; 869 870 /** 871 * struct _tr_list - target reset list 872 * @handle: device handle 873 * @state: state machine 874 */ 875 struct _tr_list { 876 struct list_head list; 877 u16 handle; 878 u16 state; 879 }; 880 881 /** 882 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list 883 * @handle: device handle 884 */ 885 struct _sc_list { 886 struct list_head list; 887 u16 handle; 888 }; 889 890 /** 891 * struct _event_ack_list - delayed event acknowledgment list 892 * @Event: Event ID 893 * @EventContext: used to track the event uniquely 894 */ 895 struct _event_ack_list { 896 struct list_head list; 897 U16 Event; 898 U32 EventContext; 899 }; 900 901 /** 902 * struct adapter_reply_queue - the reply queue struct 903 * @ioc: per adapter object 904 * @msix_index: msix index into vector table 905 * @vector: irq vector 906 * @reply_post_host_index: head index in the pool where FW completes IO 907 * @reply_post_free: reply post base virt address 908 * @name: the name registered to request_irq() 909 * @busy: isr is actively processing replies on another cpu 910 * @os_irq: irq number 911 * @irqpoll: irq_poll object 912 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not 913 * @list: this list 914 */ 915 struct adapter_reply_queue { 916 struct MPT3SAS_ADAPTER *ioc; 917 u8 msix_index; 918 u32 reply_post_host_index; 919 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 920 char name[MPT_NAME_LENGTH]; 921 atomic_t busy; 922 u32 os_irq; 923 struct irq_poll irqpoll; 924 bool irq_poll_scheduled; 925 bool irq_line_enable; 926 struct list_head list; 927 }; 928 929 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr); 930 931 /* SAS3.0 support */ 932 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc, 933 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device); 934 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge, 935 dma_addr_t data_out_dma, size_t data_out_sz, 936 dma_addr_t data_in_dma, size_t data_in_sz); 937 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc, 938 void *paddr); 939 940 /* SAS3.5 support */ 941 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid, 942 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, 943 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma, 944 size_t data_in_sz); 945 946 /* To support atomic and non atomic descriptors*/ 947 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid, 948 u16 funcdep); 949 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid); 950 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr); 951 /* 952 * To get high iops reply queue's msix index when high iops mode is enabled 953 * else get the msix index of general reply queues. 954 */ 955 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc, 956 struct scsi_cmnd *scmd); 957 958 /* IOC Facts and Port Facts converted from little endian to cpu */ 959 union mpi3_version_union { 960 MPI2_VERSION_STRUCT Struct; 961 u32 Word; 962 }; 963 964 struct mpt3sas_facts { 965 u16 MsgVersion; 966 u16 HeaderVersion; 967 u8 IOCNumber; 968 u8 VP_ID; 969 u8 VF_ID; 970 u16 IOCExceptions; 971 u16 IOCStatus; 972 u32 IOCLogInfo; 973 u8 MaxChainDepth; 974 u8 WhoInit; 975 u8 NumberOfPorts; 976 u8 MaxMSIxVectors; 977 u16 RequestCredit; 978 u16 ProductID; 979 u32 IOCCapabilities; 980 union mpi3_version_union FWVersion; 981 u16 IOCRequestFrameSize; 982 u16 IOCMaxChainSegmentSize; 983 u16 MaxInitiators; 984 u16 MaxTargets; 985 u16 MaxSasExpanders; 986 u16 MaxEnclosures; 987 u16 ProtocolFlags; 988 u16 HighPriorityCredit; 989 u16 MaxReplyDescriptorPostQueueDepth; 990 u8 ReplyFrameSize; 991 u8 MaxVolumes; 992 u16 MaxDevHandle; 993 u16 MaxPersistentEntries; 994 u16 MinDevHandle; 995 u8 CurrentHostPageSize; 996 }; 997 998 struct mpt3sas_port_facts { 999 u8 PortNumber; 1000 u8 VP_ID; 1001 u8 VF_ID; 1002 u8 PortType; 1003 u16 MaxPostedCmdBuffers; 1004 }; 1005 1006 struct reply_post_struct { 1007 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 1008 dma_addr_t reply_post_free_dma; 1009 }; 1010 1011 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); 1012 /** 1013 * struct MPT3SAS_ADAPTER - per adapter struct 1014 * @list: ioc_list 1015 * @shost: shost object 1016 * @id: unique adapter id 1017 * @cpu_count: number online cpus 1018 * @name: generic ioc string 1019 * @tmp_string: tmp string used for logging 1020 * @pdev: pci pdev object 1021 * @pio_chip: physical io register space 1022 * @chip: memory mapped register space 1023 * @chip_phys: physical addrss prior to mapping 1024 * @logging_level: see mpt3sas_debug.h 1025 * @fwfault_debug: debuging FW timeouts 1026 * @ir_firmware: IR firmware present 1027 * @bars: bitmask of BAR's that must be configured 1028 * @mask_interrupts: ignore interrupt 1029 * @dma_mask: used to set the consistent dma mask 1030 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and 1031 * pci resource handling 1032 * @fault_reset_work_q_name: fw fault work queue 1033 * @fault_reset_work_q: "" 1034 * @fault_reset_work: "" 1035 * @firmware_event_name: fw event work queue 1036 * @firmware_event_thread: "" 1037 * @fw_event_lock: 1038 * @fw_event_list: list of fw events 1039 * @aen_event_read_flag: event log was read 1040 * @broadcast_aen_busy: broadcast aen waiting to be serviced 1041 * @shost_recovery: host reset in progress 1042 * @ioc_reset_in_progress_lock: 1043 * @ioc_link_reset_in_progress: phy/hard reset in progress 1044 * @ignore_loginfos: ignore loginfos during task management 1045 * @remove_host: flag for when driver unloads, to avoid sending dev resets 1046 * @pci_error_recovery: flag to prevent ioc access until slot reset completes 1047 * @wait_for_discovery_to_complete: flag set at driver load time when 1048 * waiting on reporting devices 1049 * @is_driver_loading: flag set at driver load time 1050 * @port_enable_failed: flag set when port enable has failed 1051 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work 1052 * @start_scan_failed: means port enable failed, return's the ioc_status 1053 * @msix_enable: flag indicating msix is enabled 1054 * @msix_vector_count: number msix vectors 1055 * @cpu_msix_table: table for mapping cpus to msix index 1056 * @cpu_msix_table_sz: table size 1057 * @total_io_cnt: Gives total IO count, used to load balance the interrupts 1058 * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state 1059 * @high_iops_outstanding: used to load balance the interrupts 1060 * within high iops reply queues 1061 * @msix_load_balance: Enables load balancing of interrupts across 1062 * the multiple MSIXs 1063 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands 1064 * @thresh_hold: Max number of reply descriptors processed 1065 * before updating Host Index 1066 * @drv_support_bitmap: driver's supported feature bit map 1067 * @scsi_io_cb_idx: shost generated commands 1068 * @tm_cb_idx: task management commands 1069 * @scsih_cb_idx: scsih internal commands 1070 * @transport_cb_idx: transport internal commands 1071 * @ctl_cb_idx: clt internal commands 1072 * @base_cb_idx: base internal commands 1073 * @config_cb_idx: base internal commands 1074 * @tm_tr_cb_idx : device removal target reset handshake 1075 * @tm_tr_volume_cb_idx : volume removal target reset 1076 * @base_cmds: 1077 * @transport_cmds: 1078 * @scsih_cmds: 1079 * @tm_cmds: 1080 * @ctl_cmds: 1081 * @config_cmds: 1082 * @base_add_sg_single: handler for either 32/64 bit sgl's 1083 * @event_type: bits indicating which events to log 1084 * @event_context: unique id for each logged event 1085 * @event_log: event log pointer 1086 * @event_masks: events that are masked 1087 * @max_shutdown_latency: timeout value for NVMe shutdown operation, 1088 * which is equal that NVMe drive's RTD3 Entry Latency 1089 * which has reported maximum RTD3 Entry Latency value 1090 * among attached NVMe drives. 1091 * @facts: static facts data 1092 * @prev_fw_facts: previous fw facts data 1093 * @pfacts: static port facts data 1094 * @manu_pg0: static manufacturing page 0 1095 * @manu_pg10: static manufacturing page 10 1096 * @manu_pg11: static manufacturing page 11 1097 * @bios_pg2: static bios page 2 1098 * @bios_pg3: static bios page 3 1099 * @ioc_pg8: static ioc page 8 1100 * @iounit_pg0: static iounit page 0 1101 * @iounit_pg1: static iounit page 1 1102 * @iounit_pg8: static iounit page 8 1103 * @sas_hba: sas host object 1104 * @sas_expander_list: expander object list 1105 * @enclosure_list: enclosure object list 1106 * @sas_node_lock: 1107 * @sas_device_list: sas device object list 1108 * @sas_device_init_list: sas device object list (used only at init time) 1109 * @sas_device_lock: 1110 * @pcie_device_list: pcie device object list 1111 * @pcie_device_init_list: pcie device object list (used only at init time) 1112 * @pcie_device_lock: 1113 * @io_missing_delay: time for IO completed by fw when PDR enabled 1114 * @device_missing_delay: time for device missing by fw when PDR enabled 1115 * @sas_id : used for setting volume target IDs 1116 * @pcie_target_id: used for setting pcie target IDs 1117 * @blocking_handles: bitmask used to identify which devices need blocking 1118 * @pd_handles : bitmask for PD handles 1119 * @pd_handles_sz : size of pd_handle bitmask 1120 * @config_page_sz: config page size 1121 * @config_page: reserve memory for config page payload 1122 * @config_page_dma: 1123 * @hba_queue_depth: hba request queue depth 1124 * @sge_size: sg element size for either 32/64 bit 1125 * @scsiio_depth: SCSI_IO queue depth 1126 * @request_sz: per request frame size 1127 * @request: pool of request frames 1128 * @request_dma: 1129 * @request_dma_sz: 1130 * @scsi_lookup: firmware request tracker list 1131 * @scsi_lookup_lock: 1132 * @free_list: free list of request 1133 * @pending_io_count: 1134 * @reset_wq: 1135 * @chain: pool of chains 1136 * @chain_dma: 1137 * @max_sges_in_main_message: number sg elements in main message 1138 * @max_sges_in_chain_message: number sg elements per chain 1139 * @chains_needed_per_io: max chains per io 1140 * @chain_depth: total chains allocated 1141 * @chain_segment_sz: gives the max number of 1142 * SGEs accommodate on single chain buffer 1143 * @hi_priority_smid: 1144 * @hi_priority: 1145 * @hi_priority_dma: 1146 * @hi_priority_depth: 1147 * @hpr_lookup: 1148 * @hpr_free_list: 1149 * @internal_smid: 1150 * @internal: 1151 * @internal_dma: 1152 * @internal_depth: 1153 * @internal_lookup: 1154 * @internal_free_list: 1155 * @sense: pool of sense 1156 * @sense_dma: 1157 * @sense_dma_pool: 1158 * @reply_depth: hba reply queue depth: 1159 * @reply_sz: per reply frame size: 1160 * @reply: pool of replys: 1161 * @reply_dma: 1162 * @reply_dma_pool: 1163 * @reply_free_queue_depth: reply free depth 1164 * @reply_free: pool for reply free queue (32 bit addr) 1165 * @reply_free_dma: 1166 * @reply_free_dma_pool: 1167 * @reply_free_host_index: tail index in pool to insert free replys 1168 * @reply_post_queue_depth: reply post queue depth 1169 * @reply_post_struct: struct for reply_post_free physical & virt address 1170 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init 1171 * @rdpq_array_enable: rdpq_array support is enabled in the driver 1172 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag 1173 * is assigned only ones 1174 * @reply_queue_count: number of reply queue's 1175 * @reply_queue_list: link list contaning the reply queue info 1176 * @msix96_vector: 96 MSI-X vector support 1177 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue 1178 * @delayed_tr_list: target reset link list 1179 * @delayed_tr_volume_list: volume target reset link list 1180 * @delayed_sc_list: 1181 * @delayed_event_ack_list: 1182 * @temp_sensors_count: flag to carry the number of temperature sensors 1183 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and 1184 * pci resource handling. PCI resource freeing will lead to free 1185 * vital hardware/memory resource, which might be in use by cli/sysfs 1186 * path functions resulting in Null pointer reference followed by kernel 1187 * crash. To avoid the above race condition we use mutex syncrhonization 1188 * which ensures the syncrhonization between cli/sysfs_show path. 1189 * @atomic_desc_capable: Atomic Request Descriptor support. 1190 * @GET_MSIX_INDEX: Get the msix index of high iops queues. 1191 */ 1192 struct MPT3SAS_ADAPTER { 1193 struct list_head list; 1194 struct Scsi_Host *shost; 1195 u8 id; 1196 int cpu_count; 1197 char name[MPT_NAME_LENGTH]; 1198 char driver_name[MPT_NAME_LENGTH - 8]; 1199 char tmp_string[MPT_STRING_LENGTH]; 1200 struct pci_dev *pdev; 1201 Mpi2SystemInterfaceRegs_t __iomem *chip; 1202 phys_addr_t chip_phys; 1203 int logging_level; 1204 int fwfault_debug; 1205 u8 ir_firmware; 1206 int bars; 1207 u8 mask_interrupts; 1208 int dma_mask; 1209 1210 /* fw fault handler */ 1211 char fault_reset_work_q_name[20]; 1212 struct workqueue_struct *fault_reset_work_q; 1213 struct delayed_work fault_reset_work; 1214 1215 /* fw event handler */ 1216 char firmware_event_name[20]; 1217 struct workqueue_struct *firmware_event_thread; 1218 spinlock_t fw_event_lock; 1219 struct list_head fw_event_list; 1220 1221 /* misc flags */ 1222 int aen_event_read_flag; 1223 u8 broadcast_aen_busy; 1224 u16 broadcast_aen_pending; 1225 u8 shost_recovery; 1226 u8 got_task_abort_from_ioctl; 1227 1228 struct mutex reset_in_progress_mutex; 1229 spinlock_t ioc_reset_in_progress_lock; 1230 u8 ioc_link_reset_in_progress; 1231 1232 u8 ignore_loginfos; 1233 u8 remove_host; 1234 u8 pci_error_recovery; 1235 u8 wait_for_discovery_to_complete; 1236 u8 is_driver_loading; 1237 u8 port_enable_failed; 1238 u8 start_scan; 1239 u16 start_scan_failed; 1240 1241 u8 msix_enable; 1242 u16 msix_vector_count; 1243 u8 *cpu_msix_table; 1244 u16 cpu_msix_table_sz; 1245 resource_size_t __iomem **reply_post_host_index; 1246 u32 ioc_reset_count; 1247 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; 1248 u32 non_operational_loop; 1249 u8 ioc_coredump_loop; 1250 atomic64_t total_io_cnt; 1251 atomic64_t high_iops_outstanding; 1252 bool msix_load_balance; 1253 u16 thresh_hold; 1254 u8 high_iops_queues; 1255 u32 drv_support_bitmap; 1256 bool enable_sdev_max_qd; 1257 1258 /* internal commands, callback index */ 1259 u8 scsi_io_cb_idx; 1260 u8 tm_cb_idx; 1261 u8 transport_cb_idx; 1262 u8 scsih_cb_idx; 1263 u8 ctl_cb_idx; 1264 u8 base_cb_idx; 1265 u8 port_enable_cb_idx; 1266 u8 config_cb_idx; 1267 u8 tm_tr_cb_idx; 1268 u8 tm_tr_volume_cb_idx; 1269 u8 tm_sas_control_cb_idx; 1270 struct _internal_cmd base_cmds; 1271 struct _internal_cmd port_enable_cmds; 1272 struct _internal_cmd transport_cmds; 1273 struct _internal_cmd scsih_cmds; 1274 struct _internal_cmd tm_cmds; 1275 struct _internal_cmd ctl_cmds; 1276 struct _internal_cmd config_cmds; 1277 1278 MPT_ADD_SGE base_add_sg_single; 1279 1280 /* function ptr for either IEEE or MPI sg elements */ 1281 MPT_BUILD_SG_SCMD build_sg_scmd; 1282 MPT_BUILD_SG build_sg; 1283 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge; 1284 u16 sge_size_ieee; 1285 u16 hba_mpi_version_belonged; 1286 1287 /* function ptr for MPI sg elements only */ 1288 MPT_BUILD_SG build_sg_mpi; 1289 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi; 1290 1291 /* function ptr for NVMe PRP elements only */ 1292 NVME_BUILD_PRP build_nvme_prp; 1293 1294 /* event log */ 1295 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1296 u32 event_context; 1297 void *event_log; 1298 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1299 1300 u8 tm_custom_handling; 1301 u8 nvme_abort_timeout; 1302 u16 max_shutdown_latency; 1303 1304 /* static config pages */ 1305 struct mpt3sas_facts facts; 1306 struct mpt3sas_facts prev_fw_facts; 1307 struct mpt3sas_port_facts *pfacts; 1308 Mpi2ManufacturingPage0_t manu_pg0; 1309 struct Mpi2ManufacturingPage10_t manu_pg10; 1310 struct Mpi2ManufacturingPage11_t manu_pg11; 1311 Mpi2BiosPage2_t bios_pg2; 1312 Mpi2BiosPage3_t bios_pg3; 1313 Mpi2IOCPage8_t ioc_pg8; 1314 Mpi2IOUnitPage0_t iounit_pg0; 1315 Mpi2IOUnitPage1_t iounit_pg1; 1316 Mpi2IOUnitPage8_t iounit_pg8; 1317 Mpi2IOCPage1_t ioc_pg1_copy; 1318 1319 struct _boot_device req_boot_device; 1320 struct _boot_device req_alt_boot_device; 1321 struct _boot_device current_boot_device; 1322 1323 /* sas hba, expander, and device list */ 1324 struct _sas_node sas_hba; 1325 struct list_head sas_expander_list; 1326 struct list_head enclosure_list; 1327 spinlock_t sas_node_lock; 1328 struct list_head sas_device_list; 1329 struct list_head sas_device_init_list; 1330 spinlock_t sas_device_lock; 1331 struct list_head pcie_device_list; 1332 struct list_head pcie_device_init_list; 1333 spinlock_t pcie_device_lock; 1334 1335 struct list_head raid_device_list; 1336 spinlock_t raid_device_lock; 1337 u8 io_missing_delay; 1338 u16 device_missing_delay; 1339 int sas_id; 1340 int pcie_target_id; 1341 1342 void *blocking_handles; 1343 void *pd_handles; 1344 u16 pd_handles_sz; 1345 1346 void *pend_os_device_add; 1347 u16 pend_os_device_add_sz; 1348 1349 /* config page */ 1350 u16 config_page_sz; 1351 void *config_page; 1352 dma_addr_t config_page_dma; 1353 void *config_vaddr; 1354 1355 /* scsiio request */ 1356 u16 hba_queue_depth; 1357 u16 sge_size; 1358 u16 scsiio_depth; 1359 u16 request_sz; 1360 u8 *request; 1361 dma_addr_t request_dma; 1362 u32 request_dma_sz; 1363 struct pcie_sg_list *pcie_sg_lookup; 1364 spinlock_t scsi_lookup_lock; 1365 int pending_io_count; 1366 wait_queue_head_t reset_wq; 1367 1368 /* PCIe SGL */ 1369 struct dma_pool *pcie_sgl_dma_pool; 1370 /* Host Page Size */ 1371 u32 page_size; 1372 1373 /* chain */ 1374 struct chain_lookup *chain_lookup; 1375 struct list_head free_chain_list; 1376 struct dma_pool *chain_dma_pool; 1377 ulong chain_pages; 1378 u16 max_sges_in_main_message; 1379 u16 max_sges_in_chain_message; 1380 u16 chains_needed_per_io; 1381 u32 chain_depth; 1382 u16 chain_segment_sz; 1383 u16 chains_per_prp_buffer; 1384 1385 /* hi-priority queue */ 1386 u16 hi_priority_smid; 1387 u8 *hi_priority; 1388 dma_addr_t hi_priority_dma; 1389 u16 hi_priority_depth; 1390 struct request_tracker *hpr_lookup; 1391 struct list_head hpr_free_list; 1392 1393 /* internal queue */ 1394 u16 internal_smid; 1395 u8 *internal; 1396 dma_addr_t internal_dma; 1397 u16 internal_depth; 1398 struct request_tracker *internal_lookup; 1399 struct list_head internal_free_list; 1400 1401 /* sense */ 1402 u8 *sense; 1403 dma_addr_t sense_dma; 1404 struct dma_pool *sense_dma_pool; 1405 1406 /* reply */ 1407 u16 reply_sz; 1408 u8 *reply; 1409 dma_addr_t reply_dma; 1410 u32 reply_dma_max_address; 1411 u32 reply_dma_min_address; 1412 struct dma_pool *reply_dma_pool; 1413 1414 /* reply free queue */ 1415 u16 reply_free_queue_depth; 1416 __le32 *reply_free; 1417 dma_addr_t reply_free_dma; 1418 struct dma_pool *reply_free_dma_pool; 1419 u32 reply_free_host_index; 1420 1421 /* reply post queue */ 1422 u16 reply_post_queue_depth; 1423 struct reply_post_struct *reply_post; 1424 u8 rdpq_array_capable; 1425 u8 rdpq_array_enable; 1426 u8 rdpq_array_enable_assigned; 1427 struct dma_pool *reply_post_free_dma_pool; 1428 struct dma_pool *reply_post_free_array_dma_pool; 1429 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array; 1430 dma_addr_t reply_post_free_array_dma; 1431 u8 reply_queue_count; 1432 struct list_head reply_queue_list; 1433 1434 u8 combined_reply_queue; 1435 u8 combined_reply_index_count; 1436 u8 smp_affinity_enable; 1437 /* reply post register index */ 1438 resource_size_t **replyPostRegisterIndex; 1439 1440 struct list_head delayed_tr_list; 1441 struct list_head delayed_tr_volume_list; 1442 struct list_head delayed_sc_list; 1443 struct list_head delayed_event_ack_list; 1444 u8 temp_sensors_count; 1445 struct mutex pci_access_mutex; 1446 1447 /* diag buffer support */ 1448 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT]; 1449 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT]; 1450 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; 1451 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; 1452 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; 1453 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; 1454 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; 1455 u32 ring_buffer_offset; 1456 u32 ring_buffer_sz; 1457 u8 is_warpdrive; 1458 u8 is_mcpu_endpoint; 1459 u8 hide_ir_msg; 1460 u8 mfg_pg10_hide_flag; 1461 u8 hide_drives; 1462 spinlock_t diag_trigger_lock; 1463 u8 diag_trigger_active; 1464 u8 atomic_desc_capable; 1465 BASE_READ_REG base_readl; 1466 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master; 1467 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event; 1468 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi; 1469 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi; 1470 void *device_remove_in_progress; 1471 u16 device_remove_in_progress_sz; 1472 u8 is_gen35_ioc; 1473 u8 is_aero_ioc; 1474 PUT_SMID_IO_FP_HIP put_smid_scsi_io; 1475 PUT_SMID_IO_FP_HIP put_smid_fast_path; 1476 PUT_SMID_IO_FP_HIP put_smid_hi_priority; 1477 PUT_SMID_DEFAULT put_smid_default; 1478 GET_MSIX_INDEX get_msix_index_for_smlio; 1479 }; 1480 1481 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001 1482 1483 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1484 u32 reply); 1485 1486 1487 /* base shared API */ 1488 extern struct list_head mpt3sas_ioc_list; 1489 extern char driver_name[MPT_NAME_LENGTH]; 1490 /* spinlock on list operations over IOCs 1491 * Case: when multiple warpdrive cards(IOCs) are in use 1492 * Each IOC will added to the ioc list structure on initialization. 1493 * Watchdog threads run at regular intervals to check IOC for any 1494 * fault conditions which will trigger the dead_ioc thread to 1495 * deallocate pci resource, resulting deleting the IOC netry from list, 1496 * this deletion need to protected by spinlock to enusre that 1497 * ioc removal is syncrhonized, if not synchronized it might lead to 1498 * list_del corruption as the ioc list is traversed in cli path. 1499 */ 1500 extern spinlock_t gioc_lock; 1501 1502 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); 1503 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); 1504 1505 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); 1506 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); 1507 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); 1508 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); 1509 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc); 1510 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, 1511 enum reset_type type); 1512 1513 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1514 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1515 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, 1516 u16 smid); 1517 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1518 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1519 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc); 1520 1521 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1522 u16 handle); 1523 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1524 u16 msix_task); 1525 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1526 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1527 /* hi-priority queue */ 1528 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1529 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, 1530 struct scsi_cmnd *scmd); 1531 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, 1532 struct scsiio_tracker *st); 1533 1534 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1535 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1536 void mpt3sas_base_initialize_callback_handler(void); 1537 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); 1538 void mpt3sas_base_release_callback_handler(u8 cb_idx); 1539 1540 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1541 u32 reply); 1542 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1543 u8 msix_index, u32 reply); 1544 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, 1545 u32 phys_addr); 1546 1547 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); 1548 1549 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); 1550 #define mpt3sas_print_fault_code(ioc, fault_code) \ 1551 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \ 1552 mpt3sas_base_fault_info(ioc, fault_code); } while (0) 1553 1554 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code); 1555 #define mpt3sas_print_coredump_info(ioc, fault_code) \ 1556 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \ 1557 mpt3sas_base_coredump_info(ioc, fault_code); } while (0) 1558 1559 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc, 1560 const char *caller); 1561 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, 1562 Mpi2SasIoUnitControlReply_t *mpi_reply, 1563 Mpi2SasIoUnitControlRequest_t *mpi_request); 1564 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, 1565 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); 1566 1567 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, 1568 u32 *event_type); 1569 1570 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); 1571 1572 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, 1573 u16 device_missing_delay, u8 io_missing_delay); 1574 1575 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); 1576 1577 void 1578 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc); 1579 1580 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc, 1581 u8 status, void *mpi_request, int sz); 1582 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \ 1583 do { ioc_err(ioc, "In func: %s\n", __func__); \ 1584 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \ 1585 status, mpi_request, sz); } while (0) 1586 1587 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count); 1588 1589 /* scsih shared API */ 1590 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, 1591 u16 smid); 1592 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, 1593 u32 reply); 1594 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc); 1595 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands( 1596 struct MPT3SAS_ADAPTER *ioc); 1597 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc); 1598 1599 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun, 1600 u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method); 1601 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1602 u64 lun, u8 type, u16 smid_task, u16 msix_task, 1603 u8 timeout, u8 tr_method); 1604 1605 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1606 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1607 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1608 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, 1609 u64 sas_address); 1610 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, 1611 u16 smid); 1612 1613 struct _sas_node *mpt3sas_scsih_expander_find_by_handle( 1614 struct MPT3SAS_ADAPTER *ioc, u16 handle); 1615 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( 1616 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1617 struct _sas_device *mpt3sas_get_sdev_by_addr( 1618 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1619 struct _sas_device *__mpt3sas_get_sdev_by_addr( 1620 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1621 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1622 u16 handle); 1623 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1624 u16 handle); 1625 1626 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); 1627 struct _raid_device * 1628 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1629 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth); 1630 1631 /* config shared API */ 1632 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1633 u32 reply); 1634 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, 1635 u8 *num_phys); 1636 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, 1637 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); 1638 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, 1639 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, 1640 u16 sz); 1641 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, 1642 Mpi2ConfigReply_t *mpi_reply, 1643 struct Mpi2ManufacturingPage10_t *config_page); 1644 1645 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1646 Mpi2ConfigReply_t *mpi_reply, 1647 struct Mpi2ManufacturingPage11_t *config_page); 1648 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1649 Mpi2ConfigReply_t *mpi_reply, 1650 struct Mpi2ManufacturingPage11_t *config_page); 1651 1652 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1653 *mpi_reply, Mpi2BiosPage2_t *config_page); 1654 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1655 *mpi_reply, Mpi2BiosPage3_t *config_page); 1656 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1657 *mpi_reply, Mpi2IOUnitPage0_t *config_page); 1658 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1659 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, 1660 u32 form, u32 handle); 1661 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, 1662 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, 1663 u32 form, u32 handle); 1664 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1665 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, 1666 u32 form, u32 handle); 1667 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, 1668 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, 1669 u32 form, u32 handle); 1670 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, 1671 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, 1672 u16 sz); 1673 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1674 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1675 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, 1676 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); 1677 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1678 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1679 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1680 *mpi_reply, Mpi2IOUnitPage8_t *config_page); 1681 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1682 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1683 u16 sz); 1684 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1685 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1686 u16 sz); 1687 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1688 *mpi_reply, Mpi2IOCPage1_t *config_page); 1689 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1690 *mpi_reply, Mpi2IOCPage1_t *config_page); 1691 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1692 *mpi_reply, Mpi2IOCPage8_t *config_page); 1693 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, 1694 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, 1695 u32 form, u32 handle); 1696 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, 1697 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, 1698 u32 phy_number, u16 handle); 1699 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, 1700 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, 1701 u32 form, u32 handle); 1702 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1703 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); 1704 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1705 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); 1706 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, 1707 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 1708 u32 handle); 1709 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1710 u8 *num_pds); 1711 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, 1712 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, 1713 u32 handle, u16 sz); 1714 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, 1715 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 1716 u32 form, u32 form_specific); 1717 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, 1718 u16 *volume_handle); 1719 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, 1720 u16 volume_handle, u64 *wwid); 1721 1722 /* ctl shared API */ 1723 extern struct device_attribute *mpt3sas_host_attrs[]; 1724 extern struct device_attribute *mpt3sas_dev_attrs[]; 1725 void mpt3sas_ctl_init(ushort hbas_to_enumerate); 1726 void mpt3sas_ctl_exit(ushort hbas_to_enumerate); 1727 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1728 u32 reply); 1729 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc); 1730 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc); 1731 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc); 1732 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, 1733 u8 msix_index, u32 reply); 1734 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, 1735 Mpi2EventNotificationReply_t *mpi_reply); 1736 1737 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, 1738 u8 bits_to_register); 1739 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, 1740 u8 *issue_reset); 1741 1742 /* transport shared API */ 1743 extern struct scsi_transport_template *mpt3sas_transport_template; 1744 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1745 u32 reply); 1746 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, 1747 u16 handle, u64 sas_address); 1748 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1749 u64 sas_address_parent); 1750 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy 1751 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); 1752 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, 1753 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, 1754 struct device *parent_dev); 1755 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, 1756 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate); 1757 extern struct sas_function_template mpt3sas_transport_functions; 1758 extern struct scsi_transport_template *mpt3sas_transport_template; 1759 /* trigger data externs */ 1760 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, 1761 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1762 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, 1763 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1764 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, 1765 u32 tigger_bitmask); 1766 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, 1767 u16 log_entry_qualifier); 1768 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, 1769 u8 asc, u8 ascq); 1770 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, 1771 u32 loginfo); 1772 1773 /* warpdrive APIs */ 1774 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); 1775 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, 1776 struct _raid_device *raid_device); 1777 void 1778 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, 1779 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request); 1780 1781 /* NCQ Prio Handling Check */ 1782 bool scsih_ncq_prio_supp(struct scsi_device *sdev); 1783 1784 /** 1785 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device 1786 * @device_info: bitfield providing information about the device. 1787 * Context: none 1788 * 1789 * Returns 1 if scsi device. 1790 */ 1791 static inline int 1792 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info) 1793 { 1794 if ((device_info & 1795 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI) 1796 return 1; 1797 else 1798 return 0; 1799 } 1800 #endif /* MPT3SAS_BASE_H_INCLUDED */ 1801