1 /*
2  * This is the Fusion MPT base driver providing common API layer interface
3  * for access to MPT (Message Passing Technology) firmware.
4  *
5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6  * Copyright (C) 2012-2014  LSI Corporation
7  * Copyright (C) 2013-2014 Avago Technologies
8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * as published by the Free Software Foundation; either version 2
13  * of the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * NO WARRANTY
21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25  * solely responsible for determining the appropriateness of using and
26  * distributing the Program and assumes all risks associated with its
27  * exercise of rights under this Agreement, including but not limited to
28  * the risks and costs of program errors, damage to or loss of data,
29  * programs or equipment, and unavailability or interruption of operations.
30 
31  * DISCLAIMER OF LIABILITY
32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39 
40  * You should have received a copy of the GNU General Public License
41  * along with this program; if not, write to the Free Software
42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
43  * USA.
44  */
45 
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48 
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59 
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 
71 #include "mpt3sas_debug.h"
72 #include "mpt3sas_trigger_diag.h"
73 
74 /* driver versioning info */
75 #define MPT3SAS_DRIVER_NAME		"mpt3sas"
76 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
77 #define MPT3SAS_DESCRIPTION	"LSI MPT Fusion SAS 3.0 Device Driver"
78 #define MPT3SAS_DRIVER_VERSION		"27.101.00.00"
79 #define MPT3SAS_MAJOR_VERSION		27
80 #define MPT3SAS_MINOR_VERSION		101
81 #define MPT3SAS_BUILD_VERSION		0
82 #define MPT3SAS_RELEASE_VERSION	00
83 
84 #define MPT2SAS_DRIVER_NAME		"mpt2sas"
85 #define MPT2SAS_DESCRIPTION	"LSI MPT Fusion SAS 2.0 Device Driver"
86 #define MPT2SAS_DRIVER_VERSION		"20.102.00.00"
87 #define MPT2SAS_MAJOR_VERSION		20
88 #define MPT2SAS_MINOR_VERSION		102
89 #define MPT2SAS_BUILD_VERSION		0
90 #define MPT2SAS_RELEASE_VERSION	00
91 
92 /*
93  * Set MPT3SAS_SG_DEPTH value based on user input.
94  */
95 #define MPT_MAX_PHYS_SEGMENTS	SG_CHUNK_SIZE
96 #define MPT_MIN_PHYS_SEGMENTS	16
97 #define MPT_KDUMP_MIN_PHYS_SEGMENTS	32
98 
99 #define MCPU_MAX_CHAINS_PER_IO	3
100 
101 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
102 #define MPT3SAS_SG_DEPTH		CONFIG_SCSI_MPT3SAS_MAX_SGE
103 #else
104 #define MPT3SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
105 #endif
106 
107 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
108 #define MPT2SAS_SG_DEPTH		CONFIG_SCSI_MPT2SAS_MAX_SGE
109 #else
110 #define MPT2SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
111 #endif
112 
113 /*
114  * Generic Defines
115  */
116 #define MPT3SAS_SATA_QUEUE_DEPTH	32
117 #define MPT3SAS_SAS_QUEUE_DEPTH		254
118 #define MPT3SAS_RAID_QUEUE_DEPTH	128
119 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH	200
120 
121 #define MPT3SAS_RAID_MAX_SECTORS	8192
122 #define MPT3SAS_HOST_PAGE_SIZE_4K	12
123 #define MPT3SAS_NVME_QUEUE_DEPTH	128
124 #define MPT_NAME_LENGTH			32	/* generic length of strings */
125 #define MPT_STRING_LENGTH		64
126 #define MPI_FRAME_START_OFFSET		256
127 #define REPLY_FREE_POOL_SIZE		512 /*(32 maxcredix *4)*(4 times)*/
128 
129 #define MPT_MAX_CALLBACKS		32
130 
131 #define INTERNAL_CMDS_COUNT		10	/* reserved cmds */
132 /* reserved for issuing internally framed scsi io cmds */
133 #define INTERNAL_SCSIIO_CMDS_COUNT	3
134 
135 #define MPI3_HIM_MASK			0xFFFFFFFF /* mask every bit*/
136 
137 #define MPT3SAS_INVALID_DEVICE_HANDLE	0xFFFF
138 
139 #define MAX_CHAIN_ELEMT_SZ		16
140 #define DEFAULT_NUM_FWCHAIN_ELEMTS	8
141 
142 #define FW_IMG_HDR_READ_TIMEOUT	15
143 
144 #define IOC_OPERATIONAL_WAIT_COUNT	10
145 
146 /*
147  * NVMe defines
148  */
149 #define	NVME_PRP_SIZE			8	/* PRP size */
150 #define	NVME_ERROR_RESPONSE_SIZE	16	/* Max NVME Error Response */
151 #define NVME_TASK_ABORT_MIN_TIMEOUT	6
152 #define NVME_TASK_ABORT_MAX_TIMEOUT	60
153 #define NVME_TASK_MNGT_CUSTOM_MASK	(0x0010)
154 #define	NVME_PRP_PAGE_SIZE		4096	/* Page size */
155 
156 struct mpt3sas_nvme_cmd {
157 	u8	rsvd[24];
158 	__le64	prp1;
159 	__le64	prp2;
160 };
161 
162 /*
163  * logging format
164  */
165 #define ioc_err(ioc, fmt, ...)						\
166 	pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
167 #define ioc_notice(ioc, fmt, ...)					\
168 	pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
169 #define ioc_warn(ioc, fmt, ...)						\
170 	pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
171 #define ioc_info(ioc, fmt, ...)						\
172 	pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
173 
174 /*
175  *  WarpDrive Specific Log codes
176  */
177 
178 #define MPT2_WARPDRIVE_LOGENTRY		(0x8002)
179 #define MPT2_WARPDRIVE_LC_SSDT			(0x41)
180 #define MPT2_WARPDRIVE_LC_SSDLW		(0x43)
181 #define MPT2_WARPDRIVE_LC_SSDLF		(0x44)
182 #define MPT2_WARPDRIVE_LC_BRMF			(0x4D)
183 
184 /*
185  * per target private data
186  */
187 #define MPT_TARGET_FLAGS_RAID_COMPONENT	0x01
188 #define MPT_TARGET_FLAGS_VOLUME		0x02
189 #define MPT_TARGET_FLAGS_DELETED	0x04
190 #define MPT_TARGET_FASTPATH_IO		0x08
191 #define MPT_TARGET_FLAGS_PCIE_DEVICE	0x10
192 
193 #define SAS2_PCI_DEVICE_B0_REVISION	(0x01)
194 #define SAS3_PCI_DEVICE_C0_REVISION	(0x02)
195 
196 /*
197  * Intel HBA branding
198  */
199 #define MPT2SAS_INTEL_RMS25JB080_BRANDING    \
200 	"Intel(R) Integrated RAID Module RMS25JB080"
201 #define MPT2SAS_INTEL_RMS25JB040_BRANDING    \
202 	"Intel(R) Integrated RAID Module RMS25JB040"
203 #define MPT2SAS_INTEL_RMS25KB080_BRANDING    \
204 	"Intel(R) Integrated RAID Module RMS25KB080"
205 #define MPT2SAS_INTEL_RMS25KB040_BRANDING    \
206 	"Intel(R) Integrated RAID Module RMS25KB040"
207 #define MPT2SAS_INTEL_RMS25LB040_BRANDING	\
208 	"Intel(R) Integrated RAID Module RMS25LB040"
209 #define MPT2SAS_INTEL_RMS25LB080_BRANDING	\
210 	"Intel(R) Integrated RAID Module RMS25LB080"
211 #define MPT2SAS_INTEL_RMS2LL080_BRANDING	\
212 	"Intel Integrated RAID Module RMS2LL080"
213 #define MPT2SAS_INTEL_RMS2LL040_BRANDING	\
214 	"Intel Integrated RAID Module RMS2LL040"
215 #define MPT2SAS_INTEL_RS25GB008_BRANDING       \
216 	"Intel(R) RAID Controller RS25GB008"
217 #define MPT2SAS_INTEL_SSD910_BRANDING          \
218 	"Intel(R) SSD 910 Series"
219 
220 #define MPT3SAS_INTEL_RMS3JC080_BRANDING       \
221 	"Intel(R) Integrated RAID Module RMS3JC080"
222 #define MPT3SAS_INTEL_RS3GC008_BRANDING       \
223 	"Intel(R) RAID Controller RS3GC008"
224 #define MPT3SAS_INTEL_RS3FC044_BRANDING       \
225 	"Intel(R) RAID Controller RS3FC044"
226 #define MPT3SAS_INTEL_RS3UC080_BRANDING       \
227 	"Intel(R) RAID Controller RS3UC080"
228 
229 /*
230  * Intel HBA SSDIDs
231  */
232 #define MPT2SAS_INTEL_RMS25JB080_SSDID		0x3516
233 #define MPT2SAS_INTEL_RMS25JB040_SSDID		0x3517
234 #define MPT2SAS_INTEL_RMS25KB080_SSDID		0x3518
235 #define MPT2SAS_INTEL_RMS25KB040_SSDID		0x3519
236 #define MPT2SAS_INTEL_RMS25LB040_SSDID		0x351A
237 #define MPT2SAS_INTEL_RMS25LB080_SSDID		0x351B
238 #define MPT2SAS_INTEL_RMS2LL080_SSDID		0x350E
239 #define MPT2SAS_INTEL_RMS2LL040_SSDID		0x350F
240 #define MPT2SAS_INTEL_RS25GB008_SSDID		0x3000
241 #define MPT2SAS_INTEL_SSD910_SSDID		0x3700
242 
243 #define MPT3SAS_INTEL_RMS3JC080_SSDID		0x3521
244 #define MPT3SAS_INTEL_RS3GC008_SSDID		0x3522
245 #define MPT3SAS_INTEL_RS3FC044_SSDID		0x3523
246 #define MPT3SAS_INTEL_RS3UC080_SSDID		0x3524
247 
248 /*
249  * Dell HBA branding
250  */
251 #define MPT2SAS_DELL_BRANDING_SIZE                 32
252 
253 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING        "Dell 6Gbps SAS HBA"
254 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING    "Dell PERC H200 Adapter"
255 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
256 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING    "Dell PERC H200 Modular"
257 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING   "Dell PERC H200 Embedded"
258 #define MPT2SAS_DELL_PERC_H200_BRANDING            "Dell PERC H200"
259 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING            "Dell 6Gbps SAS"
260 
261 #define MPT3SAS_DELL_12G_HBA_BRANDING       \
262 	"Dell 12Gbps HBA"
263 
264 /*
265  * Dell HBA SSDIDs
266  */
267 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID	0x1F1C
268 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID	0x1F1D
269 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID	0x1F1E
270 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID	0x1F1F
271 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID	0x1F20
272 #define MPT2SAS_DELL_PERC_H200_SSDID		0x1F21
273 #define MPT2SAS_DELL_6GBPS_SAS_SSDID		0x1F22
274 
275 #define MPT3SAS_DELL_12G_HBA_SSDID		0x1F46
276 
277 /*
278  * Cisco HBA branding
279  */
280 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING		\
281 	"Cisco 9300-8E 12G SAS HBA"
282 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING		\
283 	"Cisco 9300-8i 12G SAS HBA"
284 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING	\
285 	"Cisco 12G Modular SAS Pass through Controller"
286 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING		\
287 	"UCS C3X60 12G SAS Pass through Controller"
288 /*
289  * Cisco HBA SSSDIDs
290  */
291 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID  0x14C
292 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID  0x154
293 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID  0x155
294 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID  0x156
295 
296 /*
297  * status bits for ioc->diag_buffer_status
298  */
299 #define MPT3_DIAG_BUFFER_IS_REGISTERED	(0x01)
300 #define MPT3_DIAG_BUFFER_IS_RELEASED	(0x02)
301 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET	(0x04)
302 
303 /*
304  * HP HBA branding
305  */
306 #define MPT2SAS_HP_3PAR_SSVID                0x1590
307 
308 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING	\
309 	"HP H220 Host Bus Adapter"
310 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING	\
311 	"HP H221 Host Bus Adapter"
312 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING	\
313 	"HP H222 Host Bus Adapter"
314 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING	\
315 	"HP H220i Host Bus Adapter"
316 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING	\
317 	"HP H210i Host Bus Adapter"
318 
319 /*
320  * HO HBA SSDIDs
321  */
322 #define MPT2SAS_HP_2_4_INTERNAL_SSDID			0x0041
323 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID			0x0042
324 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID	0x0043
325 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID		0x0044
326 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID		0x0046
327 
328 /*
329  * Combined Reply Queue constants,
330  * There are twelve Supplemental Reply Post Host Index Registers
331  * and each register is at offset 0x10 bytes from the previous one.
332  */
333 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
334 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3	12
335 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35	16
336 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET	(0x10)
337 
338 /* OEM Identifiers */
339 #define MFG10_OEM_ID_INVALID                   (0x00000000)
340 #define MFG10_OEM_ID_DELL                      (0x00000001)
341 #define MFG10_OEM_ID_FSC                       (0x00000002)
342 #define MFG10_OEM_ID_SUN                       (0x00000003)
343 #define MFG10_OEM_ID_IBM                       (0x00000004)
344 
345 /* GENERIC Flags 0*/
346 #define MFG10_GF0_OCE_DISABLED                 (0x00000001)
347 #define MFG10_GF0_R1E_DRIVE_COUNT              (0x00000002)
348 #define MFG10_GF0_R10_DISPLAY                  (0x00000004)
349 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE       (0x00000008)
350 #define MFG10_GF0_SINGLE_DRIVE_R0              (0x00000010)
351 
352 #define VIRTUAL_IO_FAILED_RETRY			(0x32010081)
353 
354 /* OEM Specific Flags will come from OEM specific header files */
355 struct Mpi2ManufacturingPage10_t {
356 	MPI2_CONFIG_PAGE_HEADER	Header;		/* 00h */
357 	U8	OEMIdentifier;			/* 04h */
358 	U8	Reserved1;			/* 05h */
359 	U16	Reserved2;			/* 08h */
360 	U32	Reserved3;			/* 0Ch */
361 	U32	GenericFlags0;			/* 10h */
362 	U32	GenericFlags1;			/* 14h */
363 	U32	Reserved4;			/* 18h */
364 	U32	OEMSpecificFlags0;		/* 1Ch */
365 	U32	OEMSpecificFlags1;		/* 20h */
366 	U32	Reserved5[18];			/* 24h - 60h*/
367 };
368 
369 
370 /* Miscellaneous options */
371 struct Mpi2ManufacturingPage11_t {
372 	MPI2_CONFIG_PAGE_HEADER Header;		/* 00h */
373 	__le32	Reserved1;			/* 04h */
374 	u8	Reserved2;			/* 08h */
375 	u8	EEDPTagMode;			/* 09h */
376 	u8	Reserved3;			/* 0Ah */
377 	u8	Reserved4;			/* 0Bh */
378 	__le32	Reserved5[8];			/* 0Ch-2Ch */
379 	u16	AddlFlags2;			/* 2Ch */
380 	u8	AddlFlags3;			/* 2Eh */
381 	u8	Reserved6;			/* 2Fh */
382 	__le32	Reserved7[7];			/* 30h - 4Bh */
383 	u8	NVMeAbortTO;			/* 4Ch */
384 	u8	Reserved8;			/* 4Dh */
385 	u16	Reserved9;			/* 4Eh */
386 	__le32	Reserved10[4];			/* 50h - 60h */
387 };
388 
389 /**
390  * struct MPT3SAS_TARGET - starget private hostdata
391  * @starget: starget object
392  * @sas_address: target sas address
393  * @raid_device: raid_device pointer to access volume data
394  * @handle: device handle
395  * @num_luns: number luns
396  * @flags: MPT_TARGET_FLAGS_XXX flags
397  * @deleted: target flaged for deletion
398  * @tm_busy: target is busy with TM request.
399  * @sas_dev: The sas_device associated with this target
400  * @pcie_dev: The pcie device associated with this target
401  */
402 struct MPT3SAS_TARGET {
403 	struct scsi_target *starget;
404 	u64	sas_address;
405 	struct _raid_device *raid_device;
406 	u16	handle;
407 	int	num_luns;
408 	u32	flags;
409 	u8	deleted;
410 	u8	tm_busy;
411 	struct _sas_device *sas_dev;
412 	struct _pcie_device *pcie_dev;
413 };
414 
415 
416 /*
417  * per device private data
418  */
419 #define MPT_DEVICE_FLAGS_INIT		0x01
420 
421 #define MFG_PAGE10_HIDE_SSDS_MASK	(0x00000003)
422 #define MFG_PAGE10_HIDE_ALL_DISKS	(0x00)
423 #define MFG_PAGE10_EXPOSE_ALL_DISKS	(0x01)
424 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT	(0x02)
425 
426 /**
427  * struct MPT3SAS_DEVICE - sdev private hostdata
428  * @sas_target: starget private hostdata
429  * @lun: lun number
430  * @flags: MPT_DEVICE_XXX flags
431  * @configured_lun: lun is configured
432  * @block: device is in SDEV_BLOCK state
433  * @tlr_snoop_check: flag used in determining whether to disable TLR
434  * @eedp_enable: eedp support enable bit
435  * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
436  * @eedp_block_length: block size
437  * @ata_command_pending: SATL passthrough outstanding for device
438  */
439 struct MPT3SAS_DEVICE {
440 	struct MPT3SAS_TARGET *sas_target;
441 	unsigned int	lun;
442 	u32	flags;
443 	u8	configured_lun;
444 	u8	block;
445 	u8	tlr_snoop_check;
446 	u8	ignore_delay_remove;
447 	/* Iopriority Command Handling */
448 	u8	ncq_prio_enable;
449 	/*
450 	 * Bug workaround for SATL handling: the mpt2/3sas firmware
451 	 * doesn't return BUSY or TASK_SET_FULL for subsequent
452 	 * commands while a SATL pass through is in operation as the
453 	 * spec requires, it simply does nothing with them until the
454 	 * pass through completes, causing them possibly to timeout if
455 	 * the passthrough is a long executing command (like format or
456 	 * secure erase).  This variable allows us to do the right
457 	 * thing while a SATL command is pending.
458 	 */
459 	unsigned long ata_command_pending;
460 
461 };
462 
463 #define MPT3_CMD_NOT_USED	0x8000	/* free */
464 #define MPT3_CMD_COMPLETE	0x0001	/* completed */
465 #define MPT3_CMD_PENDING	0x0002	/* pending */
466 #define MPT3_CMD_REPLY_VALID	0x0004	/* reply is valid */
467 #define MPT3_CMD_RESET		0x0008	/* host reset dropped the command */
468 
469 /**
470  * struct _internal_cmd - internal commands struct
471  * @mutex: mutex
472  * @done: completion
473  * @reply: reply message pointer
474  * @sense: sense data
475  * @status: MPT3_CMD_XXX status
476  * @smid: system message id
477  */
478 struct _internal_cmd {
479 	struct mutex mutex;
480 	struct completion done;
481 	void	*reply;
482 	void	*sense;
483 	u16	status;
484 	u16	smid;
485 };
486 
487 
488 
489 /**
490  * struct _sas_device - attached device information
491  * @list: sas device list
492  * @starget: starget object
493  * @sas_address: device sas address
494  * @device_name: retrieved from the SAS IDENTIFY frame.
495  * @handle: device handle
496  * @sas_address_parent: sas address of parent expander or sas host
497  * @enclosure_handle: enclosure handle
498  * @enclosure_logical_id: enclosure logical identifier
499  * @volume_handle: volume handle (valid when hidden raid member)
500  * @volume_wwid: volume unique identifier
501  * @device_info: bitfield provides detailed info about the device
502  * @id: target id
503  * @channel: target channel
504  * @slot: number number
505  * @phy: phy identifier provided in sas device page 0
506  * @responding: used in _scsih_sas_device_mark_responding
507  * @fast_path: fast path feature enable bit
508  * @pfa_led_on: flag for PFA LED status
509  * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
510  *	addition routine.
511  * @chassis_slot: chassis slot
512  * @is_chassis_slot_valid: chassis slot valid or not
513  */
514 struct _sas_device {
515 	struct list_head list;
516 	struct scsi_target *starget;
517 	u64	sas_address;
518 	u64	device_name;
519 	u16	handle;
520 	u64	sas_address_parent;
521 	u16	enclosure_handle;
522 	u64	enclosure_logical_id;
523 	u16	volume_handle;
524 	u64	volume_wwid;
525 	u32	device_info;
526 	int	id;
527 	int	channel;
528 	u16	slot;
529 	u8	phy;
530 	u8	responding;
531 	u8	fast_path;
532 	u8	pfa_led_on;
533 	u8	pend_sas_rphy_add;
534 	u8	enclosure_level;
535 	u8	chassis_slot;
536 	u8	is_chassis_slot_valid;
537 	u8	connector_name[5];
538 	struct kref refcount;
539 };
540 
541 static inline void sas_device_get(struct _sas_device *s)
542 {
543 	kref_get(&s->refcount);
544 }
545 
546 static inline void sas_device_free(struct kref *r)
547 {
548 	kfree(container_of(r, struct _sas_device, refcount));
549 }
550 
551 static inline void sas_device_put(struct _sas_device *s)
552 {
553 	kref_put(&s->refcount, sas_device_free);
554 }
555 
556 /*
557  * struct _pcie_device - attached PCIe device information
558  * @list: pcie device list
559  * @starget: starget object
560  * @wwid: device WWID
561  * @handle: device handle
562  * @device_info: bitfield provides detailed info about the device
563  * @id: target id
564  * @channel: target channel
565  * @slot: slot number
566  * @port_num: port number
567  * @responding: used in _scsih_pcie_device_mark_responding
568  * @fast_path: fast path feature enable bit
569  * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
570  *		NVMe device only
571  * @enclosure_handle: enclosure handle
572  * @enclosure_logical_id: enclosure logical identifier
573  * @enclosure_level: The level of device's enclosure from the controller
574  * @connector_name: ASCII value of the Connector's name
575  * @serial_number: pointer of serial number string allocated runtime
576  * @refcount: reference count for deletion
577  */
578 struct _pcie_device {
579 	struct list_head list;
580 	struct scsi_target *starget;
581 	u64	wwid;
582 	u16	handle;
583 	u32	device_info;
584 	int	id;
585 	int	channel;
586 	u16	slot;
587 	u8	port_num;
588 	u8	responding;
589 	u8	fast_path;
590 	u32	nvme_mdts;
591 	u16	enclosure_handle;
592 	u64	enclosure_logical_id;
593 	u8	enclosure_level;
594 	u8	connector_name[4];
595 	u8	*serial_number;
596 	u8	reset_timeout;
597 	struct kref refcount;
598 };
599 /**
600  * pcie_device_get - Increment the pcie device reference count
601  *
602  * @p: pcie_device object
603  *
604  * When ever this function called it will increment the
605  * reference count of the pcie device for which this function called.
606  *
607  */
608 static inline void pcie_device_get(struct _pcie_device *p)
609 {
610 	kref_get(&p->refcount);
611 }
612 
613 /**
614  * pcie_device_free - Release the pcie device object
615  * @r - kref object
616  *
617  * Free's the pcie device object. It will be called when reference count
618  * reaches to zero.
619  */
620 static inline void pcie_device_free(struct kref *r)
621 {
622 	kfree(container_of(r, struct _pcie_device, refcount));
623 }
624 
625 /**
626  * pcie_device_put - Decrement the pcie device reference count
627  *
628  * @p: pcie_device object
629  *
630  * When ever this function called it will decrement the
631  * reference count of the pcie device for which this function called.
632  *
633  * When refernce count reaches to Zero, this will call pcie_device_free to the
634  * pcie_device object.
635  */
636 static inline void pcie_device_put(struct _pcie_device *p)
637 {
638 	kref_put(&p->refcount, pcie_device_free);
639 }
640 /**
641  * struct _raid_device - raid volume link list
642  * @list: sas device list
643  * @starget: starget object
644  * @sdev: scsi device struct (volumes are single lun)
645  * @wwid: unique identifier for the volume
646  * @handle: device handle
647  * @block_size: Block size of the volume
648  * @id: target id
649  * @channel: target channel
650  * @volume_type: the raid level
651  * @device_info: bitfield provides detailed info about the hidden components
652  * @num_pds: number of hidden raid components
653  * @responding: used in _scsih_raid_device_mark_responding
654  * @percent_complete: resync percent complete
655  * @direct_io_enabled: Whether direct io to PDs are allowed or not
656  * @stripe_exponent: X where 2powX is the stripe sz in blocks
657  * @block_exponent: X where 2powX is the block sz in bytes
658  * @max_lba: Maximum number of LBA in the volume
659  * @stripe_sz: Stripe Size of the volume
660  * @device_info: Device info of the volume member disk
661  * @pd_handle: Array of handles of the physical drives for direct I/O in le16
662  */
663 #define MPT_MAX_WARPDRIVE_PDS		8
664 struct _raid_device {
665 	struct list_head list;
666 	struct scsi_target *starget;
667 	struct scsi_device *sdev;
668 	u64	wwid;
669 	u16	handle;
670 	u16	block_sz;
671 	int	id;
672 	int	channel;
673 	u8	volume_type;
674 	u8	num_pds;
675 	u8	responding;
676 	u8	percent_complete;
677 	u8	direct_io_enabled;
678 	u8	stripe_exponent;
679 	u8	block_exponent;
680 	u64	max_lba;
681 	u32	stripe_sz;
682 	u32	device_info;
683 	u16	pd_handle[MPT_MAX_WARPDRIVE_PDS];
684 };
685 
686 /**
687  * struct _boot_device - boot device info
688  *
689  * @channel: sas, raid, or pcie channel
690  * @device: holds pointer for struct _sas_device, struct _raid_device or
691  *     struct _pcie_device
692  */
693 struct _boot_device {
694 	int channel;
695 	void *device;
696 };
697 
698 /**
699  * struct _sas_port - wide/narrow sas port information
700  * @port_list: list of ports belonging to expander
701  * @num_phys: number of phys belonging to this port
702  * @remote_identify: attached device identification
703  * @rphy: sas transport rphy object
704  * @port: sas transport wide/narrow port object
705  * @phy_list: _sas_phy list objects belonging to this port
706  */
707 struct _sas_port {
708 	struct list_head port_list;
709 	u8	num_phys;
710 	struct sas_identify remote_identify;
711 	struct sas_rphy *rphy;
712 	struct sas_port *port;
713 	struct list_head phy_list;
714 };
715 
716 /**
717  * struct _sas_phy - phy information
718  * @port_siblings: list of phys belonging to a port
719  * @identify: phy identification
720  * @remote_identify: attached device identification
721  * @phy: sas transport phy object
722  * @phy_id: unique phy id
723  * @handle: device handle for this phy
724  * @attached_handle: device handle for attached device
725  * @phy_belongs_to_port: port has been created for this phy
726  */
727 struct _sas_phy {
728 	struct list_head port_siblings;
729 	struct sas_identify identify;
730 	struct sas_identify remote_identify;
731 	struct sas_phy *phy;
732 	u8	phy_id;
733 	u16	handle;
734 	u16	attached_handle;
735 	u8	phy_belongs_to_port;
736 };
737 
738 /**
739  * struct _sas_node - sas_host/expander information
740  * @list: list of expanders
741  * @parent_dev: parent device class
742  * @num_phys: number phys belonging to this sas_host/expander
743  * @sas_address: sas address of this sas_host/expander
744  * @handle: handle for this sas_host/expander
745  * @sas_address_parent: sas address of parent expander or sas host
746  * @enclosure_handle: handle for this a member of an enclosure
747  * @device_info: bitwise defining capabilities of this sas_host/expander
748  * @responding: used in _scsih_expander_device_mark_responding
749  * @phy: a list of phys that make up this sas_host/expander
750  * @sas_port_list: list of ports attached to this sas_host/expander
751  */
752 struct _sas_node {
753 	struct list_head list;
754 	struct device *parent_dev;
755 	u8	num_phys;
756 	u64	sas_address;
757 	u16	handle;
758 	u64	sas_address_parent;
759 	u16	enclosure_handle;
760 	u64	enclosure_logical_id;
761 	u8	responding;
762 	struct	_sas_phy *phy;
763 	struct list_head sas_port_list;
764 };
765 
766 
767 /**
768  * struct _enclosure_node - enclosure information
769  * @list: list of enclosures
770  * @pg0: enclosure pg0;
771  */
772 struct _enclosure_node {
773 	struct list_head list;
774 	Mpi2SasEnclosurePage0_t pg0;
775 };
776 
777 /**
778  * enum reset_type - reset state
779  * @FORCE_BIG_HAMMER: issue diagnostic reset
780  * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
781  */
782 enum reset_type {
783 	FORCE_BIG_HAMMER,
784 	SOFT_RESET,
785 };
786 
787 /**
788  * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
789  * @pcie_sgl: PCIe native SGL for NVMe devices
790  * @pcie_sgl_dma: physical address
791  */
792 struct pcie_sg_list {
793 	void            *pcie_sgl;
794 	dma_addr_t      pcie_sgl_dma;
795 };
796 
797 /**
798  * struct chain_tracker - firmware chain tracker
799  * @chain_buffer: chain buffer
800  * @chain_buffer_dma: physical address
801  * @tracker_list: list of free request (ioc->free_chain_list)
802  */
803 struct chain_tracker {
804 	void *chain_buffer;
805 	dma_addr_t chain_buffer_dma;
806 };
807 
808 struct chain_lookup {
809 	struct chain_tracker *chains_per_smid;
810 	atomic_t	chain_offset;
811 };
812 
813 /**
814  * struct scsiio_tracker - scsi mf request tracker
815  * @smid: system message id
816  * @cb_idx: callback index
817  * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
818  * @chain_list: list of associated firmware chain tracker
819  * @msix_io: IO's msix
820  */
821 struct scsiio_tracker {
822 	u16	smid;
823 	u8	cb_idx;
824 	u8	direct_io;
825 	struct pcie_sg_list pcie_sg_list;
826 	struct list_head chain_list;
827 	u16     msix_io;
828 };
829 
830 /**
831  * struct request_tracker - firmware request tracker
832  * @smid: system message id
833  * @cb_idx: callback index
834  * @tracker_list: list of free request (ioc->free_list)
835  */
836 struct request_tracker {
837 	u16	smid;
838 	u8	cb_idx;
839 	struct list_head tracker_list;
840 };
841 
842 /**
843  * struct _tr_list - target reset list
844  * @handle: device handle
845  * @state: state machine
846  */
847 struct _tr_list {
848 	struct list_head list;
849 	u16	handle;
850 	u16	state;
851 };
852 
853 /**
854  * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
855  * @handle: device handle
856  */
857 struct _sc_list {
858 	struct list_head list;
859 	u16     handle;
860 };
861 
862 /**
863  * struct _event_ack_list - delayed event acknowledgment list
864  * @Event: Event ID
865  * @EventContext: used to track the event uniquely
866  */
867 struct _event_ack_list {
868 	struct list_head list;
869 	U16     Event;
870 	U32     EventContext;
871 };
872 
873 /**
874  * struct adapter_reply_queue - the reply queue struct
875  * @ioc: per adapter object
876  * @msix_index: msix index into vector table
877  * @vector: irq vector
878  * @reply_post_host_index: head index in the pool where FW completes IO
879  * @reply_post_free: reply post base virt address
880  * @name: the name registered to request_irq()
881  * @busy: isr is actively processing replies on another cpu
882  * @list: this list
883 */
884 struct adapter_reply_queue {
885 	struct MPT3SAS_ADAPTER	*ioc;
886 	u8			msix_index;
887 	u32			reply_post_host_index;
888 	Mpi2ReplyDescriptorsUnion_t *reply_post_free;
889 	char			name[MPT_NAME_LENGTH];
890 	atomic_t		busy;
891 	struct list_head	list;
892 };
893 
894 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
895 
896 /* SAS3.0 support */
897 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
898 	struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
899 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
900 		dma_addr_t data_out_dma, size_t data_out_sz,
901 		dma_addr_t data_in_dma, size_t data_in_sz);
902 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
903 		void *paddr);
904 
905 /* SAS3.5 support */
906 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
907 	Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
908 	dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
909 	size_t data_in_sz);
910 
911 /* To support atomic and non atomic descriptors*/
912 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
913 	u16 funcdep);
914 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
915 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
916 
917 /* IOC Facts and Port Facts converted from little endian to cpu */
918 union mpi3_version_union {
919 	MPI2_VERSION_STRUCT		Struct;
920 	u32				Word;
921 };
922 
923 struct mpt3sas_facts {
924 	u16			MsgVersion;
925 	u16			HeaderVersion;
926 	u8			IOCNumber;
927 	u8			VP_ID;
928 	u8			VF_ID;
929 	u16			IOCExceptions;
930 	u16			IOCStatus;
931 	u32			IOCLogInfo;
932 	u8			MaxChainDepth;
933 	u8			WhoInit;
934 	u8			NumberOfPorts;
935 	u8			MaxMSIxVectors;
936 	u16			RequestCredit;
937 	u16			ProductID;
938 	u32			IOCCapabilities;
939 	union mpi3_version_union	FWVersion;
940 	u16			IOCRequestFrameSize;
941 	u16			IOCMaxChainSegmentSize;
942 	u16			MaxInitiators;
943 	u16			MaxTargets;
944 	u16			MaxSasExpanders;
945 	u16			MaxEnclosures;
946 	u16			ProtocolFlags;
947 	u16			HighPriorityCredit;
948 	u16			MaxReplyDescriptorPostQueueDepth;
949 	u8			ReplyFrameSize;
950 	u8			MaxVolumes;
951 	u16			MaxDevHandle;
952 	u16			MaxPersistentEntries;
953 	u16			MinDevHandle;
954 	u8			CurrentHostPageSize;
955 };
956 
957 struct mpt3sas_port_facts {
958 	u8			PortNumber;
959 	u8			VP_ID;
960 	u8			VF_ID;
961 	u8			PortType;
962 	u16			MaxPostedCmdBuffers;
963 };
964 
965 struct reply_post_struct {
966 	Mpi2ReplyDescriptorsUnion_t	*reply_post_free;
967 	dma_addr_t			reply_post_free_dma;
968 };
969 
970 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
971 /**
972  * struct MPT3SAS_ADAPTER - per adapter struct
973  * @list: ioc_list
974  * @shost: shost object
975  * @id: unique adapter id
976  * @cpu_count: number online cpus
977  * @name: generic ioc string
978  * @tmp_string: tmp string used for logging
979  * @pdev: pci pdev object
980  * @pio_chip: physical io register space
981  * @chip: memory mapped register space
982  * @chip_phys: physical addrss prior to mapping
983  * @logging_level: see mpt3sas_debug.h
984  * @fwfault_debug: debuging FW timeouts
985  * @ir_firmware: IR firmware present
986  * @bars: bitmask of BAR's that must be configured
987  * @mask_interrupts: ignore interrupt
988  * @dma_mask: used to set the consistent dma mask
989  * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
990  *			pci resource handling
991  * @fault_reset_work_q_name: fw fault work queue
992  * @fault_reset_work_q: ""
993  * @fault_reset_work: ""
994  * @firmware_event_name: fw event work queue
995  * @firmware_event_thread: ""
996  * @fw_event_lock:
997  * @fw_event_list: list of fw events
998  * @aen_event_read_flag: event log was read
999  * @broadcast_aen_busy: broadcast aen waiting to be serviced
1000  * @shost_recovery: host reset in progress
1001  * @ioc_reset_in_progress_lock:
1002  * @ioc_link_reset_in_progress: phy/hard reset in progress
1003  * @ignore_loginfos: ignore loginfos during task management
1004  * @remove_host: flag for when driver unloads, to avoid sending dev resets
1005  * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1006  * @wait_for_discovery_to_complete: flag set at driver load time when
1007  *                                               waiting on reporting devices
1008  * @is_driver_loading: flag set at driver load time
1009  * @port_enable_failed: flag set when port enable has failed
1010  * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1011  * @start_scan_failed: means port enable failed, return's the ioc_status
1012  * @msix_enable: flag indicating msix is enabled
1013  * @msix_vector_count: number msix vectors
1014  * @cpu_msix_table: table for mapping cpus to msix index
1015  * @cpu_msix_table_sz: table size
1016  * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1017  * @scsi_io_cb_idx: shost generated commands
1018  * @tm_cb_idx: task management commands
1019  * @scsih_cb_idx: scsih internal commands
1020  * @transport_cb_idx: transport internal commands
1021  * @ctl_cb_idx: clt internal commands
1022  * @base_cb_idx: base internal commands
1023  * @config_cb_idx: base internal commands
1024  * @tm_tr_cb_idx : device removal target reset handshake
1025  * @tm_tr_volume_cb_idx : volume removal target reset
1026  * @base_cmds:
1027  * @transport_cmds:
1028  * @scsih_cmds:
1029  * @tm_cmds:
1030  * @ctl_cmds:
1031  * @config_cmds:
1032  * @base_add_sg_single: handler for either 32/64 bit sgl's
1033  * @event_type: bits indicating which events to log
1034  * @event_context: unique id for each logged event
1035  * @event_log: event log pointer
1036  * @event_masks: events that are masked
1037  * @facts: static facts data
1038  * @pfacts: static port facts data
1039  * @manu_pg0: static manufacturing page 0
1040  * @manu_pg10: static manufacturing page 10
1041  * @manu_pg11: static manufacturing page 11
1042  * @bios_pg2: static bios page 2
1043  * @bios_pg3: static bios page 3
1044  * @ioc_pg8: static ioc page 8
1045  * @iounit_pg0: static iounit page 0
1046  * @iounit_pg1: static iounit page 1
1047  * @iounit_pg8: static iounit page 8
1048  * @sas_hba: sas host object
1049  * @sas_expander_list: expander object list
1050  * @enclosure_list: enclosure object list
1051  * @sas_node_lock:
1052  * @sas_device_list: sas device object list
1053  * @sas_device_init_list: sas device object list (used only at init time)
1054  * @sas_device_lock:
1055  * @pcie_device_list: pcie device object list
1056  * @pcie_device_init_list: pcie device object list (used only at init time)
1057  * @pcie_device_lock:
1058  * @io_missing_delay: time for IO completed by fw when PDR enabled
1059  * @device_missing_delay: time for device missing by fw when PDR enabled
1060  * @sas_id : used for setting volume target IDs
1061  * @pcie_target_id: used for setting pcie target IDs
1062  * @blocking_handles: bitmask used to identify which devices need blocking
1063  * @pd_handles : bitmask for PD handles
1064  * @pd_handles_sz : size of pd_handle bitmask
1065  * @config_page_sz: config page size
1066  * @config_page: reserve memory for config page payload
1067  * @config_page_dma:
1068  * @hba_queue_depth: hba request queue depth
1069  * @sge_size: sg element size for either 32/64 bit
1070  * @scsiio_depth: SCSI_IO queue depth
1071  * @request_sz: per request frame size
1072  * @request: pool of request frames
1073  * @request_dma:
1074  * @request_dma_sz:
1075  * @scsi_lookup: firmware request tracker list
1076  * @scsi_lookup_lock:
1077  * @free_list: free list of request
1078  * @pending_io_count:
1079  * @reset_wq:
1080  * @chain: pool of chains
1081  * @chain_dma:
1082  * @max_sges_in_main_message: number sg elements in main message
1083  * @max_sges_in_chain_message: number sg elements per chain
1084  * @chains_needed_per_io: max chains per io
1085  * @chain_depth: total chains allocated
1086  * @chain_segment_sz: gives the max number of
1087  *			SGEs accommodate on single chain buffer
1088  * @hi_priority_smid:
1089  * @hi_priority:
1090  * @hi_priority_dma:
1091  * @hi_priority_depth:
1092  * @hpr_lookup:
1093  * @hpr_free_list:
1094  * @internal_smid:
1095  * @internal:
1096  * @internal_dma:
1097  * @internal_depth:
1098  * @internal_lookup:
1099  * @internal_free_list:
1100  * @sense: pool of sense
1101  * @sense_dma:
1102  * @sense_dma_pool:
1103  * @reply_depth: hba reply queue depth:
1104  * @reply_sz: per reply frame size:
1105  * @reply: pool of replys:
1106  * @reply_dma:
1107  * @reply_dma_pool:
1108  * @reply_free_queue_depth: reply free depth
1109  * @reply_free: pool for reply free queue (32 bit addr)
1110  * @reply_free_dma:
1111  * @reply_free_dma_pool:
1112  * @reply_free_host_index: tail index in pool to insert free replys
1113  * @reply_post_queue_depth: reply post queue depth
1114  * @reply_post_struct: struct for reply_post_free physical & virt address
1115  * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1116  * @rdpq_array_enable: rdpq_array support is enabled in the driver
1117  * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1118  *				is assigned only ones
1119  * @reply_queue_count: number of reply queue's
1120  * @reply_queue_list: link list contaning the reply queue info
1121  * @msix96_vector: 96 MSI-X vector support
1122  * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1123  * @delayed_tr_list: target reset link list
1124  * @delayed_tr_volume_list: volume target reset link list
1125  * @delayed_sc_list:
1126  * @delayed_event_ack_list:
1127  * @temp_sensors_count: flag to carry the number of temperature sensors
1128  * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1129  *	pci resource handling. PCI resource freeing will lead to free
1130  *	vital hardware/memory resource, which might be in use by cli/sysfs
1131  *	path functions resulting in Null pointer reference followed by kernel
1132  *	crash. To avoid the above race condition we use mutex syncrhonization
1133  *	which ensures the syncrhonization between cli/sysfs_show path.
1134  */
1135 struct MPT3SAS_ADAPTER {
1136 	struct list_head list;
1137 	struct Scsi_Host *shost;
1138 	u8		id;
1139 	int		cpu_count;
1140 	char		name[MPT_NAME_LENGTH];
1141 	char		driver_name[MPT_NAME_LENGTH - 8];
1142 	char		tmp_string[MPT_STRING_LENGTH];
1143 	struct pci_dev	*pdev;
1144 	Mpi2SystemInterfaceRegs_t __iomem *chip;
1145 	phys_addr_t	chip_phys;
1146 	int		logging_level;
1147 	int		fwfault_debug;
1148 	u8		ir_firmware;
1149 	int		bars;
1150 	u8		mask_interrupts;
1151 	int		dma_mask;
1152 
1153 	/* fw fault handler */
1154 	char		fault_reset_work_q_name[20];
1155 	struct workqueue_struct *fault_reset_work_q;
1156 	struct delayed_work fault_reset_work;
1157 
1158 	/* fw event handler */
1159 	char		firmware_event_name[20];
1160 	struct workqueue_struct	*firmware_event_thread;
1161 	spinlock_t	fw_event_lock;
1162 	struct list_head fw_event_list;
1163 
1164 	 /* misc flags */
1165 	int		aen_event_read_flag;
1166 	u8		broadcast_aen_busy;
1167 	u16		broadcast_aen_pending;
1168 	u8		shost_recovery;
1169 	u8		got_task_abort_from_ioctl;
1170 
1171 	struct mutex	reset_in_progress_mutex;
1172 	spinlock_t	ioc_reset_in_progress_lock;
1173 	u8		ioc_link_reset_in_progress;
1174 
1175 	u8		ignore_loginfos;
1176 	u8		remove_host;
1177 	u8		pci_error_recovery;
1178 	u8		wait_for_discovery_to_complete;
1179 	u8		is_driver_loading;
1180 	u8		port_enable_failed;
1181 	u8		start_scan;
1182 	u16		start_scan_failed;
1183 
1184 	u8		msix_enable;
1185 	u16		msix_vector_count;
1186 	u8		*cpu_msix_table;
1187 	u16		cpu_msix_table_sz;
1188 	resource_size_t __iomem **reply_post_host_index;
1189 	u32		ioc_reset_count;
1190 	MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1191 	u32             non_operational_loop;
1192 
1193 	/* internal commands, callback index */
1194 	u8		scsi_io_cb_idx;
1195 	u8		tm_cb_idx;
1196 	u8		transport_cb_idx;
1197 	u8		scsih_cb_idx;
1198 	u8		ctl_cb_idx;
1199 	u8		base_cb_idx;
1200 	u8		port_enable_cb_idx;
1201 	u8		config_cb_idx;
1202 	u8		tm_tr_cb_idx;
1203 	u8		tm_tr_volume_cb_idx;
1204 	u8		tm_sas_control_cb_idx;
1205 	struct _internal_cmd base_cmds;
1206 	struct _internal_cmd port_enable_cmds;
1207 	struct _internal_cmd transport_cmds;
1208 	struct _internal_cmd scsih_cmds;
1209 	struct _internal_cmd tm_cmds;
1210 	struct _internal_cmd ctl_cmds;
1211 	struct _internal_cmd config_cmds;
1212 
1213 	MPT_ADD_SGE	base_add_sg_single;
1214 
1215 	/* function ptr for either IEEE or MPI sg elements */
1216 	MPT_BUILD_SG_SCMD build_sg_scmd;
1217 	MPT_BUILD_SG    build_sg;
1218 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1219 	u16             sge_size_ieee;
1220 	u16		hba_mpi_version_belonged;
1221 
1222 	/* function ptr for MPI sg elements only */
1223 	MPT_BUILD_SG    build_sg_mpi;
1224 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1225 
1226 	/* function ptr for NVMe PRP elements only */
1227 	NVME_BUILD_PRP  build_nvme_prp;
1228 
1229 	/* event log */
1230 	u32		event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1231 	u32		event_context;
1232 	void		*event_log;
1233 	u32		event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1234 
1235 	u8		tm_custom_handling;
1236 	u8		nvme_abort_timeout;
1237 
1238 
1239 	/* static config pages */
1240 	struct mpt3sas_facts facts;
1241 	struct mpt3sas_port_facts *pfacts;
1242 	Mpi2ManufacturingPage0_t manu_pg0;
1243 	struct Mpi2ManufacturingPage10_t manu_pg10;
1244 	struct Mpi2ManufacturingPage11_t manu_pg11;
1245 	Mpi2BiosPage2_t	bios_pg2;
1246 	Mpi2BiosPage3_t	bios_pg3;
1247 	Mpi2IOCPage8_t ioc_pg8;
1248 	Mpi2IOUnitPage0_t iounit_pg0;
1249 	Mpi2IOUnitPage1_t iounit_pg1;
1250 	Mpi2IOUnitPage8_t iounit_pg8;
1251 
1252 	struct _boot_device req_boot_device;
1253 	struct _boot_device req_alt_boot_device;
1254 	struct _boot_device current_boot_device;
1255 
1256 	/* sas hba, expander, and device list */
1257 	struct _sas_node sas_hba;
1258 	struct list_head sas_expander_list;
1259 	struct list_head enclosure_list;
1260 	spinlock_t	sas_node_lock;
1261 	struct list_head sas_device_list;
1262 	struct list_head sas_device_init_list;
1263 	spinlock_t	sas_device_lock;
1264 	struct list_head pcie_device_list;
1265 	struct list_head pcie_device_init_list;
1266 	spinlock_t      pcie_device_lock;
1267 
1268 	struct list_head raid_device_list;
1269 	spinlock_t	raid_device_lock;
1270 	u8		io_missing_delay;
1271 	u16		device_missing_delay;
1272 	int		sas_id;
1273 	int		pcie_target_id;
1274 
1275 	void		*blocking_handles;
1276 	void		*pd_handles;
1277 	u16		pd_handles_sz;
1278 
1279 	void		*pend_os_device_add;
1280 	u16		pend_os_device_add_sz;
1281 
1282 	/* config page */
1283 	u16		config_page_sz;
1284 	void		*config_page;
1285 	dma_addr_t	config_page_dma;
1286 	void		*config_vaddr;
1287 
1288 	/* scsiio request */
1289 	u16		hba_queue_depth;
1290 	u16		sge_size;
1291 	u16		scsiio_depth;
1292 	u16		request_sz;
1293 	u8		*request;
1294 	dma_addr_t	request_dma;
1295 	u32		request_dma_sz;
1296 	struct pcie_sg_list *pcie_sg_lookup;
1297 	spinlock_t	scsi_lookup_lock;
1298 	int		pending_io_count;
1299 	wait_queue_head_t reset_wq;
1300 
1301 	/* PCIe SGL */
1302 	struct dma_pool *pcie_sgl_dma_pool;
1303 	/* Host Page Size */
1304 	u32		page_size;
1305 
1306 	/* chain */
1307 	struct chain_lookup *chain_lookup;
1308 	struct list_head free_chain_list;
1309 	struct dma_pool *chain_dma_pool;
1310 	ulong		chain_pages;
1311 	u16		max_sges_in_main_message;
1312 	u16		max_sges_in_chain_message;
1313 	u16		chains_needed_per_io;
1314 	u32		chain_depth;
1315 	u16		chain_segment_sz;
1316 	u16		chains_per_prp_buffer;
1317 
1318 	/* hi-priority queue */
1319 	u16		hi_priority_smid;
1320 	u8		*hi_priority;
1321 	dma_addr_t	hi_priority_dma;
1322 	u16		hi_priority_depth;
1323 	struct request_tracker *hpr_lookup;
1324 	struct list_head hpr_free_list;
1325 
1326 	/* internal queue */
1327 	u16		internal_smid;
1328 	u8		*internal;
1329 	dma_addr_t	internal_dma;
1330 	u16		internal_depth;
1331 	struct request_tracker *internal_lookup;
1332 	struct list_head internal_free_list;
1333 
1334 	/* sense */
1335 	u8		*sense;
1336 	dma_addr_t	sense_dma;
1337 	struct dma_pool *sense_dma_pool;
1338 
1339 	/* reply */
1340 	u16		reply_sz;
1341 	u8		*reply;
1342 	dma_addr_t	reply_dma;
1343 	u32		reply_dma_max_address;
1344 	u32		reply_dma_min_address;
1345 	struct dma_pool *reply_dma_pool;
1346 
1347 	/* reply free queue */
1348 	u16		reply_free_queue_depth;
1349 	__le32		*reply_free;
1350 	dma_addr_t	reply_free_dma;
1351 	struct dma_pool *reply_free_dma_pool;
1352 	u32		reply_free_host_index;
1353 
1354 	/* reply post queue */
1355 	u16		reply_post_queue_depth;
1356 	struct reply_post_struct *reply_post;
1357 	u8		rdpq_array_capable;
1358 	u8		rdpq_array_enable;
1359 	u8		rdpq_array_enable_assigned;
1360 	struct dma_pool *reply_post_free_dma_pool;
1361 	struct dma_pool *reply_post_free_array_dma_pool;
1362 	Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1363 	dma_addr_t reply_post_free_array_dma;
1364 	u8		reply_queue_count;
1365 	struct list_head reply_queue_list;
1366 
1367 	u8		combined_reply_queue;
1368 	u8		combined_reply_index_count;
1369 	/* reply post register index */
1370 	resource_size_t	**replyPostRegisterIndex;
1371 
1372 	struct list_head delayed_tr_list;
1373 	struct list_head delayed_tr_volume_list;
1374 	struct list_head delayed_sc_list;
1375 	struct list_head delayed_event_ack_list;
1376 	u8		temp_sensors_count;
1377 	struct mutex pci_access_mutex;
1378 
1379 	/* diag buffer support */
1380 	u8		*diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1381 	u32		diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1382 	dma_addr_t	diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1383 	u8		diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1384 	u32		unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1385 	u32		product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1386 	u32		diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1387 	u32		ring_buffer_offset;
1388 	u32		ring_buffer_sz;
1389 	u8		is_warpdrive;
1390 	u8		is_mcpu_endpoint;
1391 	u8		hide_ir_msg;
1392 	u8		mfg_pg10_hide_flag;
1393 	u8		hide_drives;
1394 	spinlock_t	diag_trigger_lock;
1395 	u8		diag_trigger_active;
1396 	BASE_READ_REG	base_readl;
1397 	struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1398 	struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1399 	struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1400 	struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1401 	void		*device_remove_in_progress;
1402 	u16		device_remove_in_progress_sz;
1403 	u8		is_gen35_ioc;
1404 	u8		is_aero_ioc;
1405 	PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1406 
1407 };
1408 
1409 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1410 	u32 reply);
1411 
1412 
1413 /* base shared API */
1414 extern struct list_head mpt3sas_ioc_list;
1415 extern char    driver_name[MPT_NAME_LENGTH];
1416 /* spinlock on list operations over IOCs
1417  * Case: when multiple warpdrive cards(IOCs) are in use
1418  * Each IOC will added to the ioc list structure on initialization.
1419  * Watchdog threads run at regular intervals to check IOC for any
1420  * fault conditions which will trigger the dead_ioc thread to
1421  * deallocate pci resource, resulting deleting the IOC netry from list,
1422  * this deletion need to protected by spinlock to enusre that
1423  * ioc removal is syncrhonized, if not synchronized it might lead to
1424  * list_del corruption as the ioc list is traversed in cli path.
1425  */
1426 extern spinlock_t gioc_lock;
1427 
1428 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1429 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1430 
1431 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1432 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1433 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1434 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1435 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1436 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1437 	enum reset_type type);
1438 
1439 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1440 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1441 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1442 	u16 smid);
1443 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1444 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1445 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1446 
1447 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1448 	u16 handle);
1449 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1450 	u16 msix_task);
1451 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1452 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1453 /* hi-priority queue */
1454 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1455 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1456 		struct scsi_cmnd *scmd);
1457 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1458 		struct scsiio_tracker *st);
1459 
1460 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1461 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1462 void mpt3sas_base_initialize_callback_handler(void);
1463 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1464 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1465 
1466 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1467 	u32 reply);
1468 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1469 	u8 msix_index, u32 reply);
1470 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1471 	u32 phys_addr);
1472 
1473 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1474 
1475 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1476 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1477 	Mpi2SasIoUnitControlReply_t *mpi_reply,
1478 	Mpi2SasIoUnitControlRequest_t *mpi_request);
1479 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1480 	Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1481 
1482 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1483 	u32 *event_type);
1484 
1485 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1486 
1487 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1488 	u16 device_missing_delay, u8 io_missing_delay);
1489 
1490 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1491 
1492 void
1493 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1494 
1495 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1496 	u8 status, void *mpi_request, int sz);
1497 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1498 
1499 /* scsih shared API */
1500 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1501 	u16 smid);
1502 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1503 	u32 reply);
1504 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1505 void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1506 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1507 
1508 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1509 	u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1510 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1511 	u64 lun, u8 type, u16 smid_task, u16 msix_task,
1512 	u8 timeout, u8 tr_method);
1513 
1514 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1515 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1516 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1517 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1518 	u64 sas_address);
1519 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1520 	u16 smid);
1521 
1522 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1523 	struct MPT3SAS_ADAPTER *ioc, u16 handle);
1524 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1525 	struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1526 struct _sas_device *mpt3sas_get_sdev_by_addr(
1527 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1528 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1529 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1530 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1531 	u16 handle);
1532 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1533 	u16 handle);
1534 
1535 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1536 struct _raid_device *
1537 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1538 
1539 /* config shared API */
1540 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1541 	u32 reply);
1542 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1543 	u8 *num_phys);
1544 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1545 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1546 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1547 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1548 	u16 sz);
1549 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1550 	Mpi2ConfigReply_t *mpi_reply,
1551 	struct Mpi2ManufacturingPage10_t *config_page);
1552 
1553 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1554 	Mpi2ConfigReply_t *mpi_reply,
1555 	struct Mpi2ManufacturingPage11_t  *config_page);
1556 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1557 	Mpi2ConfigReply_t *mpi_reply,
1558 	struct Mpi2ManufacturingPage11_t *config_page);
1559 
1560 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1561 	*mpi_reply, Mpi2BiosPage2_t *config_page);
1562 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1563 	*mpi_reply, Mpi2BiosPage3_t *config_page);
1564 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1565 	*mpi_reply, Mpi2IOUnitPage0_t *config_page);
1566 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1567 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1568 	u32 form, u32 handle);
1569 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1570 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1571 	u32 form, u32 handle);
1572 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1573 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1574 	u32 form, u32 handle);
1575 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1576 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1577 	u32 form, u32 handle);
1578 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1579 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1580 	u16 sz);
1581 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1582 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1583 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1584 	Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1585 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1586 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1587 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1588 	*mpi_reply, Mpi2IOUnitPage8_t *config_page);
1589 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1590 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1591 	u16 sz);
1592 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1593 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1594 	u16 sz);
1595 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1596 	*mpi_reply, Mpi2IOCPage8_t *config_page);
1597 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1598 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1599 	u32 form, u32 handle);
1600 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1601 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1602 	u32 phy_number, u16 handle);
1603 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1604 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1605 	u32 form, u32 handle);
1606 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1607 	*mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1608 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1609 	*mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1610 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1611 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1612 	u32 handle);
1613 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1614 	u8 *num_pds);
1615 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1616 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1617 	u32 handle, u16 sz);
1618 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1619 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1620 	u32 form, u32 form_specific);
1621 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1622 	u16 *volume_handle);
1623 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1624 	u16 volume_handle, u64 *wwid);
1625 
1626 /* ctl shared API */
1627 extern struct device_attribute *mpt3sas_host_attrs[];
1628 extern struct device_attribute *mpt3sas_dev_attrs[];
1629 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1630 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1631 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1632 	u32 reply);
1633 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1634 void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1635 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1636 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1637 	u8 msix_index, u32 reply);
1638 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1639 	Mpi2EventNotificationReply_t *mpi_reply);
1640 
1641 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1642 	u8 bits_to_register);
1643 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1644 	u8 *issue_reset);
1645 
1646 /* transport shared API */
1647 extern struct scsi_transport_template *mpt3sas_transport_template;
1648 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1649 	u32 reply);
1650 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1651 	u16 handle, u64 sas_address);
1652 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1653 	u64 sas_address_parent);
1654 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1655 	*mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1656 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1657 	struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1658 	struct device *parent_dev);
1659 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1660 	u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1661 extern struct sas_function_template mpt3sas_transport_functions;
1662 extern struct scsi_transport_template *mpt3sas_transport_template;
1663 /* trigger data externs */
1664 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1665 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1666 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1667 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1668 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1669 	u32 tigger_bitmask);
1670 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1671 	u16 log_entry_qualifier);
1672 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1673 	u8 asc, u8 ascq);
1674 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1675 	u32 loginfo);
1676 
1677 /* warpdrive APIs */
1678 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1679 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1680 	struct _raid_device *raid_device);
1681 void
1682 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1683 	struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1684 
1685 /* NCQ Prio Handling Check */
1686 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1687 
1688 #endif /* MPT3SAS_BASE_H_INCLUDED */
1689