1 /*
2  * This is the Fusion MPT base driver providing common API layer interface
3  * for access to MPT (Message Passing Technology) firmware.
4  *
5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6  * Copyright (C) 2012-2014  LSI Corporation
7  * Copyright (C) 2013-2014 Avago Technologies
8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * as published by the Free Software Foundation; either version 2
13  * of the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * NO WARRANTY
21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25  * solely responsible for determining the appropriateness of using and
26  * distributing the Program and assumes all risks associated with its
27  * exercise of rights under this Agreement, including but not limited to
28  * the risks and costs of program errors, damage to or loss of data,
29  * programs or equipment, and unavailability or interruption of operations.
30 
31  * DISCLAIMER OF LIABILITY
32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39 
40  * You should have received a copy of the GNU General Public License
41  * along with this program; if not, write to the Free Software
42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
43  * USA.
44  */
45 
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48 
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59 
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 
71 #include "mpt3sas_debug.h"
72 #include "mpt3sas_trigger_diag.h"
73 
74 /* driver versioning info */
75 #define MPT3SAS_DRIVER_NAME		"mpt3sas"
76 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
77 #define MPT3SAS_DESCRIPTION	"LSI MPT Fusion SAS 3.0 Device Driver"
78 #define MPT3SAS_DRIVER_VERSION		"27.102.00.00"
79 #define MPT3SAS_MAJOR_VERSION		27
80 #define MPT3SAS_MINOR_VERSION		102
81 #define MPT3SAS_BUILD_VERSION		0
82 #define MPT3SAS_RELEASE_VERSION	00
83 
84 #define MPT2SAS_DRIVER_NAME		"mpt2sas"
85 #define MPT2SAS_DESCRIPTION	"LSI MPT Fusion SAS 2.0 Device Driver"
86 #define MPT2SAS_DRIVER_VERSION		"20.102.00.00"
87 #define MPT2SAS_MAJOR_VERSION		20
88 #define MPT2SAS_MINOR_VERSION		102
89 #define MPT2SAS_BUILD_VERSION		0
90 #define MPT2SAS_RELEASE_VERSION	00
91 
92 /*
93  * Set MPT3SAS_SG_DEPTH value based on user input.
94  */
95 #define MPT_MAX_PHYS_SEGMENTS	SG_CHUNK_SIZE
96 #define MPT_MIN_PHYS_SEGMENTS	16
97 #define MPT_KDUMP_MIN_PHYS_SEGMENTS	32
98 
99 #define MCPU_MAX_CHAINS_PER_IO	3
100 
101 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
102 #define MPT3SAS_SG_DEPTH		CONFIG_SCSI_MPT3SAS_MAX_SGE
103 #else
104 #define MPT3SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
105 #endif
106 
107 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
108 #define MPT2SAS_SG_DEPTH		CONFIG_SCSI_MPT2SAS_MAX_SGE
109 #else
110 #define MPT2SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
111 #endif
112 
113 /*
114  * Generic Defines
115  */
116 #define MPT3SAS_SATA_QUEUE_DEPTH	32
117 #define MPT3SAS_SAS_QUEUE_DEPTH		254
118 #define MPT3SAS_RAID_QUEUE_DEPTH	128
119 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH	200
120 
121 #define MPT3SAS_RAID_MAX_SECTORS	8192
122 #define MPT3SAS_HOST_PAGE_SIZE_4K	12
123 #define MPT3SAS_NVME_QUEUE_DEPTH	128
124 #define MPT_NAME_LENGTH			32	/* generic length of strings */
125 #define MPT_STRING_LENGTH		64
126 #define MPI_FRAME_START_OFFSET		256
127 #define REPLY_FREE_POOL_SIZE		512 /*(32 maxcredix *4)*(4 times)*/
128 
129 #define MPT_MAX_CALLBACKS		32
130 
131 #define INTERNAL_CMDS_COUNT		10	/* reserved cmds */
132 /* reserved for issuing internally framed scsi io cmds */
133 #define INTERNAL_SCSIIO_CMDS_COUNT	3
134 
135 #define MPI3_HIM_MASK			0xFFFFFFFF /* mask every bit*/
136 
137 #define MPT3SAS_INVALID_DEVICE_HANDLE	0xFFFF
138 
139 #define MAX_CHAIN_ELEMT_SZ		16
140 #define DEFAULT_NUM_FWCHAIN_ELEMTS	8
141 
142 #define FW_IMG_HDR_READ_TIMEOUT	15
143 
144 #define IOC_OPERATIONAL_WAIT_COUNT	10
145 
146 /*
147  * NVMe defines
148  */
149 #define	NVME_PRP_SIZE			8	/* PRP size */
150 #define	NVME_ERROR_RESPONSE_SIZE	16	/* Max NVME Error Response */
151 #define NVME_TASK_ABORT_MIN_TIMEOUT	6
152 #define NVME_TASK_ABORT_MAX_TIMEOUT	60
153 #define NVME_TASK_MNGT_CUSTOM_MASK	(0x0010)
154 #define	NVME_PRP_PAGE_SIZE		4096	/* Page size */
155 
156 struct mpt3sas_nvme_cmd {
157 	u8	rsvd[24];
158 	__le64	prp1;
159 	__le64	prp2;
160 };
161 
162 /*
163  * logging format
164  */
165 #define ioc_err(ioc, fmt, ...)						\
166 	pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
167 #define ioc_notice(ioc, fmt, ...)					\
168 	pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
169 #define ioc_warn(ioc, fmt, ...)						\
170 	pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
171 #define ioc_info(ioc, fmt, ...)						\
172 	pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
173 
174 /*
175  *  WarpDrive Specific Log codes
176  */
177 
178 #define MPT2_WARPDRIVE_LOGENTRY		(0x8002)
179 #define MPT2_WARPDRIVE_LC_SSDT			(0x41)
180 #define MPT2_WARPDRIVE_LC_SSDLW		(0x43)
181 #define MPT2_WARPDRIVE_LC_SSDLF		(0x44)
182 #define MPT2_WARPDRIVE_LC_BRMF			(0x4D)
183 
184 /*
185  * per target private data
186  */
187 #define MPT_TARGET_FLAGS_RAID_COMPONENT	0x01
188 #define MPT_TARGET_FLAGS_VOLUME		0x02
189 #define MPT_TARGET_FLAGS_DELETED	0x04
190 #define MPT_TARGET_FASTPATH_IO		0x08
191 #define MPT_TARGET_FLAGS_PCIE_DEVICE	0x10
192 
193 #define SAS2_PCI_DEVICE_B0_REVISION	(0x01)
194 #define SAS3_PCI_DEVICE_C0_REVISION	(0x02)
195 
196 /* Atlas PCIe Switch Management Port */
197 #define MPI26_ATLAS_PCIe_SWITCH_DEVID	(0x00B2)
198 
199 /*
200  * Intel HBA branding
201  */
202 #define MPT2SAS_INTEL_RMS25JB080_BRANDING    \
203 	"Intel(R) Integrated RAID Module RMS25JB080"
204 #define MPT2SAS_INTEL_RMS25JB040_BRANDING    \
205 	"Intel(R) Integrated RAID Module RMS25JB040"
206 #define MPT2SAS_INTEL_RMS25KB080_BRANDING    \
207 	"Intel(R) Integrated RAID Module RMS25KB080"
208 #define MPT2SAS_INTEL_RMS25KB040_BRANDING    \
209 	"Intel(R) Integrated RAID Module RMS25KB040"
210 #define MPT2SAS_INTEL_RMS25LB040_BRANDING	\
211 	"Intel(R) Integrated RAID Module RMS25LB040"
212 #define MPT2SAS_INTEL_RMS25LB080_BRANDING	\
213 	"Intel(R) Integrated RAID Module RMS25LB080"
214 #define MPT2SAS_INTEL_RMS2LL080_BRANDING	\
215 	"Intel Integrated RAID Module RMS2LL080"
216 #define MPT2SAS_INTEL_RMS2LL040_BRANDING	\
217 	"Intel Integrated RAID Module RMS2LL040"
218 #define MPT2SAS_INTEL_RS25GB008_BRANDING       \
219 	"Intel(R) RAID Controller RS25GB008"
220 #define MPT2SAS_INTEL_SSD910_BRANDING          \
221 	"Intel(R) SSD 910 Series"
222 
223 #define MPT3SAS_INTEL_RMS3JC080_BRANDING       \
224 	"Intel(R) Integrated RAID Module RMS3JC080"
225 #define MPT3SAS_INTEL_RS3GC008_BRANDING       \
226 	"Intel(R) RAID Controller RS3GC008"
227 #define MPT3SAS_INTEL_RS3FC044_BRANDING       \
228 	"Intel(R) RAID Controller RS3FC044"
229 #define MPT3SAS_INTEL_RS3UC080_BRANDING       \
230 	"Intel(R) RAID Controller RS3UC080"
231 
232 /*
233  * Intel HBA SSDIDs
234  */
235 #define MPT2SAS_INTEL_RMS25JB080_SSDID		0x3516
236 #define MPT2SAS_INTEL_RMS25JB040_SSDID		0x3517
237 #define MPT2SAS_INTEL_RMS25KB080_SSDID		0x3518
238 #define MPT2SAS_INTEL_RMS25KB040_SSDID		0x3519
239 #define MPT2SAS_INTEL_RMS25LB040_SSDID		0x351A
240 #define MPT2SAS_INTEL_RMS25LB080_SSDID		0x351B
241 #define MPT2SAS_INTEL_RMS2LL080_SSDID		0x350E
242 #define MPT2SAS_INTEL_RMS2LL040_SSDID		0x350F
243 #define MPT2SAS_INTEL_RS25GB008_SSDID		0x3000
244 #define MPT2SAS_INTEL_SSD910_SSDID		0x3700
245 
246 #define MPT3SAS_INTEL_RMS3JC080_SSDID		0x3521
247 #define MPT3SAS_INTEL_RS3GC008_SSDID		0x3522
248 #define MPT3SAS_INTEL_RS3FC044_SSDID		0x3523
249 #define MPT3SAS_INTEL_RS3UC080_SSDID		0x3524
250 
251 /*
252  * Dell HBA branding
253  */
254 #define MPT2SAS_DELL_BRANDING_SIZE                 32
255 
256 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING        "Dell 6Gbps SAS HBA"
257 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING    "Dell PERC H200 Adapter"
258 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
259 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING    "Dell PERC H200 Modular"
260 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING   "Dell PERC H200 Embedded"
261 #define MPT2SAS_DELL_PERC_H200_BRANDING            "Dell PERC H200"
262 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING            "Dell 6Gbps SAS"
263 
264 #define MPT3SAS_DELL_12G_HBA_BRANDING       \
265 	"Dell 12Gbps HBA"
266 
267 /*
268  * Dell HBA SSDIDs
269  */
270 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID	0x1F1C
271 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID	0x1F1D
272 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID	0x1F1E
273 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID	0x1F1F
274 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID	0x1F20
275 #define MPT2SAS_DELL_PERC_H200_SSDID		0x1F21
276 #define MPT2SAS_DELL_6GBPS_SAS_SSDID		0x1F22
277 
278 #define MPT3SAS_DELL_12G_HBA_SSDID		0x1F46
279 
280 /*
281  * Cisco HBA branding
282  */
283 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING		\
284 	"Cisco 9300-8E 12G SAS HBA"
285 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING		\
286 	"Cisco 9300-8i 12G SAS HBA"
287 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING	\
288 	"Cisco 12G Modular SAS Pass through Controller"
289 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING		\
290 	"UCS C3X60 12G SAS Pass through Controller"
291 /*
292  * Cisco HBA SSSDIDs
293  */
294 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID  0x14C
295 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID  0x154
296 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID  0x155
297 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID  0x156
298 
299 /*
300  * status bits for ioc->diag_buffer_status
301  */
302 #define MPT3_DIAG_BUFFER_IS_REGISTERED	(0x01)
303 #define MPT3_DIAG_BUFFER_IS_RELEASED	(0x02)
304 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET	(0x04)
305 
306 /*
307  * HP HBA branding
308  */
309 #define MPT2SAS_HP_3PAR_SSVID                0x1590
310 
311 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING	\
312 	"HP H220 Host Bus Adapter"
313 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING	\
314 	"HP H221 Host Bus Adapter"
315 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING	\
316 	"HP H222 Host Bus Adapter"
317 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING	\
318 	"HP H220i Host Bus Adapter"
319 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING	\
320 	"HP H210i Host Bus Adapter"
321 
322 /*
323  * HO HBA SSDIDs
324  */
325 #define MPT2SAS_HP_2_4_INTERNAL_SSDID			0x0041
326 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID			0x0042
327 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID	0x0043
328 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID		0x0044
329 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID		0x0046
330 
331 /*
332  * Combined Reply Queue constants,
333  * There are twelve Supplemental Reply Post Host Index Registers
334  * and each register is at offset 0x10 bytes from the previous one.
335  */
336 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
337 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3	12
338 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35	16
339 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET	(0x10)
340 
341 /* OEM Identifiers */
342 #define MFG10_OEM_ID_INVALID                   (0x00000000)
343 #define MFG10_OEM_ID_DELL                      (0x00000001)
344 #define MFG10_OEM_ID_FSC                       (0x00000002)
345 #define MFG10_OEM_ID_SUN                       (0x00000003)
346 #define MFG10_OEM_ID_IBM                       (0x00000004)
347 
348 /* GENERIC Flags 0*/
349 #define MFG10_GF0_OCE_DISABLED                 (0x00000001)
350 #define MFG10_GF0_R1E_DRIVE_COUNT              (0x00000002)
351 #define MFG10_GF0_R10_DISPLAY                  (0x00000004)
352 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE       (0x00000008)
353 #define MFG10_GF0_SINGLE_DRIVE_R0              (0x00000010)
354 
355 #define VIRTUAL_IO_FAILED_RETRY			(0x32010081)
356 
357 /* OEM Specific Flags will come from OEM specific header files */
358 struct Mpi2ManufacturingPage10_t {
359 	MPI2_CONFIG_PAGE_HEADER	Header;		/* 00h */
360 	U8	OEMIdentifier;			/* 04h */
361 	U8	Reserved1;			/* 05h */
362 	U16	Reserved2;			/* 08h */
363 	U32	Reserved3;			/* 0Ch */
364 	U32	GenericFlags0;			/* 10h */
365 	U32	GenericFlags1;			/* 14h */
366 	U32	Reserved4;			/* 18h */
367 	U32	OEMSpecificFlags0;		/* 1Ch */
368 	U32	OEMSpecificFlags1;		/* 20h */
369 	U32	Reserved5[18];			/* 24h - 60h*/
370 };
371 
372 
373 /* Miscellaneous options */
374 struct Mpi2ManufacturingPage11_t {
375 	MPI2_CONFIG_PAGE_HEADER Header;		/* 00h */
376 	__le32	Reserved1;			/* 04h */
377 	u8	Reserved2;			/* 08h */
378 	u8	EEDPTagMode;			/* 09h */
379 	u8	Reserved3;			/* 0Ah */
380 	u8	Reserved4;			/* 0Bh */
381 	__le32	Reserved5[8];			/* 0Ch-2Ch */
382 	u16	AddlFlags2;			/* 2Ch */
383 	u8	AddlFlags3;			/* 2Eh */
384 	u8	Reserved6;			/* 2Fh */
385 	__le32	Reserved7[7];			/* 30h - 4Bh */
386 	u8	NVMeAbortTO;			/* 4Ch */
387 	u8	Reserved8;			/* 4Dh */
388 	u16	Reserved9;			/* 4Eh */
389 	__le32	Reserved10[4];			/* 50h - 60h */
390 };
391 
392 /**
393  * struct MPT3SAS_TARGET - starget private hostdata
394  * @starget: starget object
395  * @sas_address: target sas address
396  * @raid_device: raid_device pointer to access volume data
397  * @handle: device handle
398  * @num_luns: number luns
399  * @flags: MPT_TARGET_FLAGS_XXX flags
400  * @deleted: target flaged for deletion
401  * @tm_busy: target is busy with TM request.
402  * @sas_dev: The sas_device associated with this target
403  * @pcie_dev: The pcie device associated with this target
404  */
405 struct MPT3SAS_TARGET {
406 	struct scsi_target *starget;
407 	u64	sas_address;
408 	struct _raid_device *raid_device;
409 	u16	handle;
410 	int	num_luns;
411 	u32	flags;
412 	u8	deleted;
413 	u8	tm_busy;
414 	struct _sas_device *sas_dev;
415 	struct _pcie_device *pcie_dev;
416 };
417 
418 
419 /*
420  * per device private data
421  */
422 #define MPT_DEVICE_FLAGS_INIT		0x01
423 
424 #define MFG_PAGE10_HIDE_SSDS_MASK	(0x00000003)
425 #define MFG_PAGE10_HIDE_ALL_DISKS	(0x00)
426 #define MFG_PAGE10_EXPOSE_ALL_DISKS	(0x01)
427 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT	(0x02)
428 
429 /**
430  * struct MPT3SAS_DEVICE - sdev private hostdata
431  * @sas_target: starget private hostdata
432  * @lun: lun number
433  * @flags: MPT_DEVICE_XXX flags
434  * @configured_lun: lun is configured
435  * @block: device is in SDEV_BLOCK state
436  * @tlr_snoop_check: flag used in determining whether to disable TLR
437  * @eedp_enable: eedp support enable bit
438  * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
439  * @eedp_block_length: block size
440  * @ata_command_pending: SATL passthrough outstanding for device
441  */
442 struct MPT3SAS_DEVICE {
443 	struct MPT3SAS_TARGET *sas_target;
444 	unsigned int	lun;
445 	u32	flags;
446 	u8	configured_lun;
447 	u8	block;
448 	u8	tlr_snoop_check;
449 	u8	ignore_delay_remove;
450 	/* Iopriority Command Handling */
451 	u8	ncq_prio_enable;
452 	/*
453 	 * Bug workaround for SATL handling: the mpt2/3sas firmware
454 	 * doesn't return BUSY or TASK_SET_FULL for subsequent
455 	 * commands while a SATL pass through is in operation as the
456 	 * spec requires, it simply does nothing with them until the
457 	 * pass through completes, causing them possibly to timeout if
458 	 * the passthrough is a long executing command (like format or
459 	 * secure erase).  This variable allows us to do the right
460 	 * thing while a SATL command is pending.
461 	 */
462 	unsigned long ata_command_pending;
463 
464 };
465 
466 #define MPT3_CMD_NOT_USED	0x8000	/* free */
467 #define MPT3_CMD_COMPLETE	0x0001	/* completed */
468 #define MPT3_CMD_PENDING	0x0002	/* pending */
469 #define MPT3_CMD_REPLY_VALID	0x0004	/* reply is valid */
470 #define MPT3_CMD_RESET		0x0008	/* host reset dropped the command */
471 
472 /**
473  * struct _internal_cmd - internal commands struct
474  * @mutex: mutex
475  * @done: completion
476  * @reply: reply message pointer
477  * @sense: sense data
478  * @status: MPT3_CMD_XXX status
479  * @smid: system message id
480  */
481 struct _internal_cmd {
482 	struct mutex mutex;
483 	struct completion done;
484 	void	*reply;
485 	void	*sense;
486 	u16	status;
487 	u16	smid;
488 };
489 
490 
491 
492 /**
493  * struct _sas_device - attached device information
494  * @list: sas device list
495  * @starget: starget object
496  * @sas_address: device sas address
497  * @device_name: retrieved from the SAS IDENTIFY frame.
498  * @handle: device handle
499  * @sas_address_parent: sas address of parent expander or sas host
500  * @enclosure_handle: enclosure handle
501  * @enclosure_logical_id: enclosure logical identifier
502  * @volume_handle: volume handle (valid when hidden raid member)
503  * @volume_wwid: volume unique identifier
504  * @device_info: bitfield provides detailed info about the device
505  * @id: target id
506  * @channel: target channel
507  * @slot: number number
508  * @phy: phy identifier provided in sas device page 0
509  * @responding: used in _scsih_sas_device_mark_responding
510  * @fast_path: fast path feature enable bit
511  * @pfa_led_on: flag for PFA LED status
512  * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
513  *	addition routine.
514  * @chassis_slot: chassis slot
515  * @is_chassis_slot_valid: chassis slot valid or not
516  */
517 struct _sas_device {
518 	struct list_head list;
519 	struct scsi_target *starget;
520 	u64	sas_address;
521 	u64	device_name;
522 	u16	handle;
523 	u64	sas_address_parent;
524 	u16	enclosure_handle;
525 	u64	enclosure_logical_id;
526 	u16	volume_handle;
527 	u64	volume_wwid;
528 	u32	device_info;
529 	int	id;
530 	int	channel;
531 	u16	slot;
532 	u8	phy;
533 	u8	responding;
534 	u8	fast_path;
535 	u8	pfa_led_on;
536 	u8	pend_sas_rphy_add;
537 	u8	enclosure_level;
538 	u8	chassis_slot;
539 	u8	is_chassis_slot_valid;
540 	u8	connector_name[5];
541 	struct kref refcount;
542 };
543 
544 static inline void sas_device_get(struct _sas_device *s)
545 {
546 	kref_get(&s->refcount);
547 }
548 
549 static inline void sas_device_free(struct kref *r)
550 {
551 	kfree(container_of(r, struct _sas_device, refcount));
552 }
553 
554 static inline void sas_device_put(struct _sas_device *s)
555 {
556 	kref_put(&s->refcount, sas_device_free);
557 }
558 
559 /*
560  * struct _pcie_device - attached PCIe device information
561  * @list: pcie device list
562  * @starget: starget object
563  * @wwid: device WWID
564  * @handle: device handle
565  * @device_info: bitfield provides detailed info about the device
566  * @id: target id
567  * @channel: target channel
568  * @slot: slot number
569  * @port_num: port number
570  * @responding: used in _scsih_pcie_device_mark_responding
571  * @fast_path: fast path feature enable bit
572  * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
573  *		NVMe device only
574  * @enclosure_handle: enclosure handle
575  * @enclosure_logical_id: enclosure logical identifier
576  * @enclosure_level: The level of device's enclosure from the controller
577  * @connector_name: ASCII value of the Connector's name
578  * @serial_number: pointer of serial number string allocated runtime
579  * @refcount: reference count for deletion
580  */
581 struct _pcie_device {
582 	struct list_head list;
583 	struct scsi_target *starget;
584 	u64	wwid;
585 	u16	handle;
586 	u32	device_info;
587 	int	id;
588 	int	channel;
589 	u16	slot;
590 	u8	port_num;
591 	u8	responding;
592 	u8	fast_path;
593 	u32	nvme_mdts;
594 	u16	enclosure_handle;
595 	u64	enclosure_logical_id;
596 	u8	enclosure_level;
597 	u8	connector_name[4];
598 	u8	*serial_number;
599 	u8	reset_timeout;
600 	struct kref refcount;
601 };
602 /**
603  * pcie_device_get - Increment the pcie device reference count
604  *
605  * @p: pcie_device object
606  *
607  * When ever this function called it will increment the
608  * reference count of the pcie device for which this function called.
609  *
610  */
611 static inline void pcie_device_get(struct _pcie_device *p)
612 {
613 	kref_get(&p->refcount);
614 }
615 
616 /**
617  * pcie_device_free - Release the pcie device object
618  * @r - kref object
619  *
620  * Free's the pcie device object. It will be called when reference count
621  * reaches to zero.
622  */
623 static inline void pcie_device_free(struct kref *r)
624 {
625 	kfree(container_of(r, struct _pcie_device, refcount));
626 }
627 
628 /**
629  * pcie_device_put - Decrement the pcie device reference count
630  *
631  * @p: pcie_device object
632  *
633  * When ever this function called it will decrement the
634  * reference count of the pcie device for which this function called.
635  *
636  * When refernce count reaches to Zero, this will call pcie_device_free to the
637  * pcie_device object.
638  */
639 static inline void pcie_device_put(struct _pcie_device *p)
640 {
641 	kref_put(&p->refcount, pcie_device_free);
642 }
643 /**
644  * struct _raid_device - raid volume link list
645  * @list: sas device list
646  * @starget: starget object
647  * @sdev: scsi device struct (volumes are single lun)
648  * @wwid: unique identifier for the volume
649  * @handle: device handle
650  * @block_size: Block size of the volume
651  * @id: target id
652  * @channel: target channel
653  * @volume_type: the raid level
654  * @device_info: bitfield provides detailed info about the hidden components
655  * @num_pds: number of hidden raid components
656  * @responding: used in _scsih_raid_device_mark_responding
657  * @percent_complete: resync percent complete
658  * @direct_io_enabled: Whether direct io to PDs are allowed or not
659  * @stripe_exponent: X where 2powX is the stripe sz in blocks
660  * @block_exponent: X where 2powX is the block sz in bytes
661  * @max_lba: Maximum number of LBA in the volume
662  * @stripe_sz: Stripe Size of the volume
663  * @device_info: Device info of the volume member disk
664  * @pd_handle: Array of handles of the physical drives for direct I/O in le16
665  */
666 #define MPT_MAX_WARPDRIVE_PDS		8
667 struct _raid_device {
668 	struct list_head list;
669 	struct scsi_target *starget;
670 	struct scsi_device *sdev;
671 	u64	wwid;
672 	u16	handle;
673 	u16	block_sz;
674 	int	id;
675 	int	channel;
676 	u8	volume_type;
677 	u8	num_pds;
678 	u8	responding;
679 	u8	percent_complete;
680 	u8	direct_io_enabled;
681 	u8	stripe_exponent;
682 	u8	block_exponent;
683 	u64	max_lba;
684 	u32	stripe_sz;
685 	u32	device_info;
686 	u16	pd_handle[MPT_MAX_WARPDRIVE_PDS];
687 };
688 
689 /**
690  * struct _boot_device - boot device info
691  *
692  * @channel: sas, raid, or pcie channel
693  * @device: holds pointer for struct _sas_device, struct _raid_device or
694  *     struct _pcie_device
695  */
696 struct _boot_device {
697 	int channel;
698 	void *device;
699 };
700 
701 /**
702  * struct _sas_port - wide/narrow sas port information
703  * @port_list: list of ports belonging to expander
704  * @num_phys: number of phys belonging to this port
705  * @remote_identify: attached device identification
706  * @rphy: sas transport rphy object
707  * @port: sas transport wide/narrow port object
708  * @phy_list: _sas_phy list objects belonging to this port
709  */
710 struct _sas_port {
711 	struct list_head port_list;
712 	u8	num_phys;
713 	struct sas_identify remote_identify;
714 	struct sas_rphy *rphy;
715 	struct sas_port *port;
716 	struct list_head phy_list;
717 };
718 
719 /**
720  * struct _sas_phy - phy information
721  * @port_siblings: list of phys belonging to a port
722  * @identify: phy identification
723  * @remote_identify: attached device identification
724  * @phy: sas transport phy object
725  * @phy_id: unique phy id
726  * @handle: device handle for this phy
727  * @attached_handle: device handle for attached device
728  * @phy_belongs_to_port: port has been created for this phy
729  */
730 struct _sas_phy {
731 	struct list_head port_siblings;
732 	struct sas_identify identify;
733 	struct sas_identify remote_identify;
734 	struct sas_phy *phy;
735 	u8	phy_id;
736 	u16	handle;
737 	u16	attached_handle;
738 	u8	phy_belongs_to_port;
739 };
740 
741 /**
742  * struct _sas_node - sas_host/expander information
743  * @list: list of expanders
744  * @parent_dev: parent device class
745  * @num_phys: number phys belonging to this sas_host/expander
746  * @sas_address: sas address of this sas_host/expander
747  * @handle: handle for this sas_host/expander
748  * @sas_address_parent: sas address of parent expander or sas host
749  * @enclosure_handle: handle for this a member of an enclosure
750  * @device_info: bitwise defining capabilities of this sas_host/expander
751  * @responding: used in _scsih_expander_device_mark_responding
752  * @phy: a list of phys that make up this sas_host/expander
753  * @sas_port_list: list of ports attached to this sas_host/expander
754  */
755 struct _sas_node {
756 	struct list_head list;
757 	struct device *parent_dev;
758 	u8	num_phys;
759 	u64	sas_address;
760 	u16	handle;
761 	u64	sas_address_parent;
762 	u16	enclosure_handle;
763 	u64	enclosure_logical_id;
764 	u8	responding;
765 	struct	_sas_phy *phy;
766 	struct list_head sas_port_list;
767 };
768 
769 
770 /**
771  * struct _enclosure_node - enclosure information
772  * @list: list of enclosures
773  * @pg0: enclosure pg0;
774  */
775 struct _enclosure_node {
776 	struct list_head list;
777 	Mpi2SasEnclosurePage0_t pg0;
778 };
779 
780 /**
781  * enum reset_type - reset state
782  * @FORCE_BIG_HAMMER: issue diagnostic reset
783  * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
784  */
785 enum reset_type {
786 	FORCE_BIG_HAMMER,
787 	SOFT_RESET,
788 };
789 
790 /**
791  * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
792  * @pcie_sgl: PCIe native SGL for NVMe devices
793  * @pcie_sgl_dma: physical address
794  */
795 struct pcie_sg_list {
796 	void            *pcie_sgl;
797 	dma_addr_t      pcie_sgl_dma;
798 };
799 
800 /**
801  * struct chain_tracker - firmware chain tracker
802  * @chain_buffer: chain buffer
803  * @chain_buffer_dma: physical address
804  * @tracker_list: list of free request (ioc->free_chain_list)
805  */
806 struct chain_tracker {
807 	void *chain_buffer;
808 	dma_addr_t chain_buffer_dma;
809 };
810 
811 struct chain_lookup {
812 	struct chain_tracker *chains_per_smid;
813 	atomic_t	chain_offset;
814 };
815 
816 /**
817  * struct scsiio_tracker - scsi mf request tracker
818  * @smid: system message id
819  * @cb_idx: callback index
820  * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
821  * @chain_list: list of associated firmware chain tracker
822  * @msix_io: IO's msix
823  */
824 struct scsiio_tracker {
825 	u16	smid;
826 	u8	cb_idx;
827 	u8	direct_io;
828 	struct pcie_sg_list pcie_sg_list;
829 	struct list_head chain_list;
830 	u16     msix_io;
831 };
832 
833 /**
834  * struct request_tracker - firmware request tracker
835  * @smid: system message id
836  * @cb_idx: callback index
837  * @tracker_list: list of free request (ioc->free_list)
838  */
839 struct request_tracker {
840 	u16	smid;
841 	u8	cb_idx;
842 	struct list_head tracker_list;
843 };
844 
845 /**
846  * struct _tr_list - target reset list
847  * @handle: device handle
848  * @state: state machine
849  */
850 struct _tr_list {
851 	struct list_head list;
852 	u16	handle;
853 	u16	state;
854 };
855 
856 /**
857  * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
858  * @handle: device handle
859  */
860 struct _sc_list {
861 	struct list_head list;
862 	u16     handle;
863 };
864 
865 /**
866  * struct _event_ack_list - delayed event acknowledgment list
867  * @Event: Event ID
868  * @EventContext: used to track the event uniquely
869  */
870 struct _event_ack_list {
871 	struct list_head list;
872 	U16     Event;
873 	U32     EventContext;
874 };
875 
876 /**
877  * struct adapter_reply_queue - the reply queue struct
878  * @ioc: per adapter object
879  * @msix_index: msix index into vector table
880  * @vector: irq vector
881  * @reply_post_host_index: head index in the pool where FW completes IO
882  * @reply_post_free: reply post base virt address
883  * @name: the name registered to request_irq()
884  * @busy: isr is actively processing replies on another cpu
885  * @list: this list
886 */
887 struct adapter_reply_queue {
888 	struct MPT3SAS_ADAPTER	*ioc;
889 	u8			msix_index;
890 	u32			reply_post_host_index;
891 	Mpi2ReplyDescriptorsUnion_t *reply_post_free;
892 	char			name[MPT_NAME_LENGTH];
893 	atomic_t		busy;
894 	struct list_head	list;
895 };
896 
897 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
898 
899 /* SAS3.0 support */
900 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
901 	struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
902 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
903 		dma_addr_t data_out_dma, size_t data_out_sz,
904 		dma_addr_t data_in_dma, size_t data_in_sz);
905 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
906 		void *paddr);
907 
908 /* SAS3.5 support */
909 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
910 	Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
911 	dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
912 	size_t data_in_sz);
913 
914 /* To support atomic and non atomic descriptors*/
915 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
916 	u16 funcdep);
917 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
918 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
919 
920 /* IOC Facts and Port Facts converted from little endian to cpu */
921 union mpi3_version_union {
922 	MPI2_VERSION_STRUCT		Struct;
923 	u32				Word;
924 };
925 
926 struct mpt3sas_facts {
927 	u16			MsgVersion;
928 	u16			HeaderVersion;
929 	u8			IOCNumber;
930 	u8			VP_ID;
931 	u8			VF_ID;
932 	u16			IOCExceptions;
933 	u16			IOCStatus;
934 	u32			IOCLogInfo;
935 	u8			MaxChainDepth;
936 	u8			WhoInit;
937 	u8			NumberOfPorts;
938 	u8			MaxMSIxVectors;
939 	u16			RequestCredit;
940 	u16			ProductID;
941 	u32			IOCCapabilities;
942 	union mpi3_version_union	FWVersion;
943 	u16			IOCRequestFrameSize;
944 	u16			IOCMaxChainSegmentSize;
945 	u16			MaxInitiators;
946 	u16			MaxTargets;
947 	u16			MaxSasExpanders;
948 	u16			MaxEnclosures;
949 	u16			ProtocolFlags;
950 	u16			HighPriorityCredit;
951 	u16			MaxReplyDescriptorPostQueueDepth;
952 	u8			ReplyFrameSize;
953 	u8			MaxVolumes;
954 	u16			MaxDevHandle;
955 	u16			MaxPersistentEntries;
956 	u16			MinDevHandle;
957 	u8			CurrentHostPageSize;
958 };
959 
960 struct mpt3sas_port_facts {
961 	u8			PortNumber;
962 	u8			VP_ID;
963 	u8			VF_ID;
964 	u8			PortType;
965 	u16			MaxPostedCmdBuffers;
966 };
967 
968 struct reply_post_struct {
969 	Mpi2ReplyDescriptorsUnion_t	*reply_post_free;
970 	dma_addr_t			reply_post_free_dma;
971 };
972 
973 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
974 /**
975  * struct MPT3SAS_ADAPTER - per adapter struct
976  * @list: ioc_list
977  * @shost: shost object
978  * @id: unique adapter id
979  * @cpu_count: number online cpus
980  * @name: generic ioc string
981  * @tmp_string: tmp string used for logging
982  * @pdev: pci pdev object
983  * @pio_chip: physical io register space
984  * @chip: memory mapped register space
985  * @chip_phys: physical addrss prior to mapping
986  * @logging_level: see mpt3sas_debug.h
987  * @fwfault_debug: debuging FW timeouts
988  * @ir_firmware: IR firmware present
989  * @bars: bitmask of BAR's that must be configured
990  * @mask_interrupts: ignore interrupt
991  * @dma_mask: used to set the consistent dma mask
992  * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
993  *			pci resource handling
994  * @fault_reset_work_q_name: fw fault work queue
995  * @fault_reset_work_q: ""
996  * @fault_reset_work: ""
997  * @firmware_event_name: fw event work queue
998  * @firmware_event_thread: ""
999  * @fw_event_lock:
1000  * @fw_event_list: list of fw events
1001  * @aen_event_read_flag: event log was read
1002  * @broadcast_aen_busy: broadcast aen waiting to be serviced
1003  * @shost_recovery: host reset in progress
1004  * @ioc_reset_in_progress_lock:
1005  * @ioc_link_reset_in_progress: phy/hard reset in progress
1006  * @ignore_loginfos: ignore loginfos during task management
1007  * @remove_host: flag for when driver unloads, to avoid sending dev resets
1008  * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1009  * @wait_for_discovery_to_complete: flag set at driver load time when
1010  *                                               waiting on reporting devices
1011  * @is_driver_loading: flag set at driver load time
1012  * @port_enable_failed: flag set when port enable has failed
1013  * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1014  * @start_scan_failed: means port enable failed, return's the ioc_status
1015  * @msix_enable: flag indicating msix is enabled
1016  * @msix_vector_count: number msix vectors
1017  * @cpu_msix_table: table for mapping cpus to msix index
1018  * @cpu_msix_table_sz: table size
1019  * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1020  * @scsi_io_cb_idx: shost generated commands
1021  * @tm_cb_idx: task management commands
1022  * @scsih_cb_idx: scsih internal commands
1023  * @transport_cb_idx: transport internal commands
1024  * @ctl_cb_idx: clt internal commands
1025  * @base_cb_idx: base internal commands
1026  * @config_cb_idx: base internal commands
1027  * @tm_tr_cb_idx : device removal target reset handshake
1028  * @tm_tr_volume_cb_idx : volume removal target reset
1029  * @base_cmds:
1030  * @transport_cmds:
1031  * @scsih_cmds:
1032  * @tm_cmds:
1033  * @ctl_cmds:
1034  * @config_cmds:
1035  * @base_add_sg_single: handler for either 32/64 bit sgl's
1036  * @event_type: bits indicating which events to log
1037  * @event_context: unique id for each logged event
1038  * @event_log: event log pointer
1039  * @event_masks: events that are masked
1040  * @facts: static facts data
1041  * @pfacts: static port facts data
1042  * @manu_pg0: static manufacturing page 0
1043  * @manu_pg10: static manufacturing page 10
1044  * @manu_pg11: static manufacturing page 11
1045  * @bios_pg2: static bios page 2
1046  * @bios_pg3: static bios page 3
1047  * @ioc_pg8: static ioc page 8
1048  * @iounit_pg0: static iounit page 0
1049  * @iounit_pg1: static iounit page 1
1050  * @iounit_pg8: static iounit page 8
1051  * @sas_hba: sas host object
1052  * @sas_expander_list: expander object list
1053  * @enclosure_list: enclosure object list
1054  * @sas_node_lock:
1055  * @sas_device_list: sas device object list
1056  * @sas_device_init_list: sas device object list (used only at init time)
1057  * @sas_device_lock:
1058  * @pcie_device_list: pcie device object list
1059  * @pcie_device_init_list: pcie device object list (used only at init time)
1060  * @pcie_device_lock:
1061  * @io_missing_delay: time for IO completed by fw when PDR enabled
1062  * @device_missing_delay: time for device missing by fw when PDR enabled
1063  * @sas_id : used for setting volume target IDs
1064  * @pcie_target_id: used for setting pcie target IDs
1065  * @blocking_handles: bitmask used to identify which devices need blocking
1066  * @pd_handles : bitmask for PD handles
1067  * @pd_handles_sz : size of pd_handle bitmask
1068  * @config_page_sz: config page size
1069  * @config_page: reserve memory for config page payload
1070  * @config_page_dma:
1071  * @hba_queue_depth: hba request queue depth
1072  * @sge_size: sg element size for either 32/64 bit
1073  * @scsiio_depth: SCSI_IO queue depth
1074  * @request_sz: per request frame size
1075  * @request: pool of request frames
1076  * @request_dma:
1077  * @request_dma_sz:
1078  * @scsi_lookup: firmware request tracker list
1079  * @scsi_lookup_lock:
1080  * @free_list: free list of request
1081  * @pending_io_count:
1082  * @reset_wq:
1083  * @chain: pool of chains
1084  * @chain_dma:
1085  * @max_sges_in_main_message: number sg elements in main message
1086  * @max_sges_in_chain_message: number sg elements per chain
1087  * @chains_needed_per_io: max chains per io
1088  * @chain_depth: total chains allocated
1089  * @chain_segment_sz: gives the max number of
1090  *			SGEs accommodate on single chain buffer
1091  * @hi_priority_smid:
1092  * @hi_priority:
1093  * @hi_priority_dma:
1094  * @hi_priority_depth:
1095  * @hpr_lookup:
1096  * @hpr_free_list:
1097  * @internal_smid:
1098  * @internal:
1099  * @internal_dma:
1100  * @internal_depth:
1101  * @internal_lookup:
1102  * @internal_free_list:
1103  * @sense: pool of sense
1104  * @sense_dma:
1105  * @sense_dma_pool:
1106  * @reply_depth: hba reply queue depth:
1107  * @reply_sz: per reply frame size:
1108  * @reply: pool of replys:
1109  * @reply_dma:
1110  * @reply_dma_pool:
1111  * @reply_free_queue_depth: reply free depth
1112  * @reply_free: pool for reply free queue (32 bit addr)
1113  * @reply_free_dma:
1114  * @reply_free_dma_pool:
1115  * @reply_free_host_index: tail index in pool to insert free replys
1116  * @reply_post_queue_depth: reply post queue depth
1117  * @reply_post_struct: struct for reply_post_free physical & virt address
1118  * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1119  * @rdpq_array_enable: rdpq_array support is enabled in the driver
1120  * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1121  *				is assigned only ones
1122  * @reply_queue_count: number of reply queue's
1123  * @reply_queue_list: link list contaning the reply queue info
1124  * @msix96_vector: 96 MSI-X vector support
1125  * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1126  * @delayed_tr_list: target reset link list
1127  * @delayed_tr_volume_list: volume target reset link list
1128  * @delayed_sc_list:
1129  * @delayed_event_ack_list:
1130  * @temp_sensors_count: flag to carry the number of temperature sensors
1131  * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1132  *	pci resource handling. PCI resource freeing will lead to free
1133  *	vital hardware/memory resource, which might be in use by cli/sysfs
1134  *	path functions resulting in Null pointer reference followed by kernel
1135  *	crash. To avoid the above race condition we use mutex syncrhonization
1136  *	which ensures the syncrhonization between cli/sysfs_show path.
1137  */
1138 struct MPT3SAS_ADAPTER {
1139 	struct list_head list;
1140 	struct Scsi_Host *shost;
1141 	u8		id;
1142 	int		cpu_count;
1143 	char		name[MPT_NAME_LENGTH];
1144 	char		driver_name[MPT_NAME_LENGTH - 8];
1145 	char		tmp_string[MPT_STRING_LENGTH];
1146 	struct pci_dev	*pdev;
1147 	Mpi2SystemInterfaceRegs_t __iomem *chip;
1148 	phys_addr_t	chip_phys;
1149 	int		logging_level;
1150 	int		fwfault_debug;
1151 	u8		ir_firmware;
1152 	int		bars;
1153 	u8		mask_interrupts;
1154 	int		dma_mask;
1155 
1156 	/* fw fault handler */
1157 	char		fault_reset_work_q_name[20];
1158 	struct workqueue_struct *fault_reset_work_q;
1159 	struct delayed_work fault_reset_work;
1160 
1161 	/* fw event handler */
1162 	char		firmware_event_name[20];
1163 	struct workqueue_struct	*firmware_event_thread;
1164 	spinlock_t	fw_event_lock;
1165 	struct list_head fw_event_list;
1166 
1167 	 /* misc flags */
1168 	int		aen_event_read_flag;
1169 	u8		broadcast_aen_busy;
1170 	u16		broadcast_aen_pending;
1171 	u8		shost_recovery;
1172 	u8		got_task_abort_from_ioctl;
1173 
1174 	struct mutex	reset_in_progress_mutex;
1175 	spinlock_t	ioc_reset_in_progress_lock;
1176 	u8		ioc_link_reset_in_progress;
1177 
1178 	u8		ignore_loginfos;
1179 	u8		remove_host;
1180 	u8		pci_error_recovery;
1181 	u8		wait_for_discovery_to_complete;
1182 	u8		is_driver_loading;
1183 	u8		port_enable_failed;
1184 	u8		start_scan;
1185 	u16		start_scan_failed;
1186 
1187 	u8		msix_enable;
1188 	u16		msix_vector_count;
1189 	u8		*cpu_msix_table;
1190 	u16		cpu_msix_table_sz;
1191 	resource_size_t __iomem **reply_post_host_index;
1192 	u32		ioc_reset_count;
1193 	MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1194 	u32             non_operational_loop;
1195 
1196 	/* internal commands, callback index */
1197 	u8		scsi_io_cb_idx;
1198 	u8		tm_cb_idx;
1199 	u8		transport_cb_idx;
1200 	u8		scsih_cb_idx;
1201 	u8		ctl_cb_idx;
1202 	u8		base_cb_idx;
1203 	u8		port_enable_cb_idx;
1204 	u8		config_cb_idx;
1205 	u8		tm_tr_cb_idx;
1206 	u8		tm_tr_volume_cb_idx;
1207 	u8		tm_sas_control_cb_idx;
1208 	struct _internal_cmd base_cmds;
1209 	struct _internal_cmd port_enable_cmds;
1210 	struct _internal_cmd transport_cmds;
1211 	struct _internal_cmd scsih_cmds;
1212 	struct _internal_cmd tm_cmds;
1213 	struct _internal_cmd ctl_cmds;
1214 	struct _internal_cmd config_cmds;
1215 
1216 	MPT_ADD_SGE	base_add_sg_single;
1217 
1218 	/* function ptr for either IEEE or MPI sg elements */
1219 	MPT_BUILD_SG_SCMD build_sg_scmd;
1220 	MPT_BUILD_SG    build_sg;
1221 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1222 	u16             sge_size_ieee;
1223 	u16		hba_mpi_version_belonged;
1224 
1225 	/* function ptr for MPI sg elements only */
1226 	MPT_BUILD_SG    build_sg_mpi;
1227 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1228 
1229 	/* function ptr for NVMe PRP elements only */
1230 	NVME_BUILD_PRP  build_nvme_prp;
1231 
1232 	/* event log */
1233 	u32		event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1234 	u32		event_context;
1235 	void		*event_log;
1236 	u32		event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1237 
1238 	u8		tm_custom_handling;
1239 	u8		nvme_abort_timeout;
1240 
1241 
1242 	/* static config pages */
1243 	struct mpt3sas_facts facts;
1244 	struct mpt3sas_port_facts *pfacts;
1245 	Mpi2ManufacturingPage0_t manu_pg0;
1246 	struct Mpi2ManufacturingPage10_t manu_pg10;
1247 	struct Mpi2ManufacturingPage11_t manu_pg11;
1248 	Mpi2BiosPage2_t	bios_pg2;
1249 	Mpi2BiosPage3_t	bios_pg3;
1250 	Mpi2IOCPage8_t ioc_pg8;
1251 	Mpi2IOUnitPage0_t iounit_pg0;
1252 	Mpi2IOUnitPage1_t iounit_pg1;
1253 	Mpi2IOUnitPage8_t iounit_pg8;
1254 
1255 	struct _boot_device req_boot_device;
1256 	struct _boot_device req_alt_boot_device;
1257 	struct _boot_device current_boot_device;
1258 
1259 	/* sas hba, expander, and device list */
1260 	struct _sas_node sas_hba;
1261 	struct list_head sas_expander_list;
1262 	struct list_head enclosure_list;
1263 	spinlock_t	sas_node_lock;
1264 	struct list_head sas_device_list;
1265 	struct list_head sas_device_init_list;
1266 	spinlock_t	sas_device_lock;
1267 	struct list_head pcie_device_list;
1268 	struct list_head pcie_device_init_list;
1269 	spinlock_t      pcie_device_lock;
1270 
1271 	struct list_head raid_device_list;
1272 	spinlock_t	raid_device_lock;
1273 	u8		io_missing_delay;
1274 	u16		device_missing_delay;
1275 	int		sas_id;
1276 	int		pcie_target_id;
1277 
1278 	void		*blocking_handles;
1279 	void		*pd_handles;
1280 	u16		pd_handles_sz;
1281 
1282 	void		*pend_os_device_add;
1283 	u16		pend_os_device_add_sz;
1284 
1285 	/* config page */
1286 	u16		config_page_sz;
1287 	void		*config_page;
1288 	dma_addr_t	config_page_dma;
1289 	void		*config_vaddr;
1290 
1291 	/* scsiio request */
1292 	u16		hba_queue_depth;
1293 	u16		sge_size;
1294 	u16		scsiio_depth;
1295 	u16		request_sz;
1296 	u8		*request;
1297 	dma_addr_t	request_dma;
1298 	u32		request_dma_sz;
1299 	struct pcie_sg_list *pcie_sg_lookup;
1300 	spinlock_t	scsi_lookup_lock;
1301 	int		pending_io_count;
1302 	wait_queue_head_t reset_wq;
1303 
1304 	/* PCIe SGL */
1305 	struct dma_pool *pcie_sgl_dma_pool;
1306 	/* Host Page Size */
1307 	u32		page_size;
1308 
1309 	/* chain */
1310 	struct chain_lookup *chain_lookup;
1311 	struct list_head free_chain_list;
1312 	struct dma_pool *chain_dma_pool;
1313 	ulong		chain_pages;
1314 	u16		max_sges_in_main_message;
1315 	u16		max_sges_in_chain_message;
1316 	u16		chains_needed_per_io;
1317 	u32		chain_depth;
1318 	u16		chain_segment_sz;
1319 	u16		chains_per_prp_buffer;
1320 
1321 	/* hi-priority queue */
1322 	u16		hi_priority_smid;
1323 	u8		*hi_priority;
1324 	dma_addr_t	hi_priority_dma;
1325 	u16		hi_priority_depth;
1326 	struct request_tracker *hpr_lookup;
1327 	struct list_head hpr_free_list;
1328 
1329 	/* internal queue */
1330 	u16		internal_smid;
1331 	u8		*internal;
1332 	dma_addr_t	internal_dma;
1333 	u16		internal_depth;
1334 	struct request_tracker *internal_lookup;
1335 	struct list_head internal_free_list;
1336 
1337 	/* sense */
1338 	u8		*sense;
1339 	dma_addr_t	sense_dma;
1340 	struct dma_pool *sense_dma_pool;
1341 
1342 	/* reply */
1343 	u16		reply_sz;
1344 	u8		*reply;
1345 	dma_addr_t	reply_dma;
1346 	u32		reply_dma_max_address;
1347 	u32		reply_dma_min_address;
1348 	struct dma_pool *reply_dma_pool;
1349 
1350 	/* reply free queue */
1351 	u16		reply_free_queue_depth;
1352 	__le32		*reply_free;
1353 	dma_addr_t	reply_free_dma;
1354 	struct dma_pool *reply_free_dma_pool;
1355 	u32		reply_free_host_index;
1356 
1357 	/* reply post queue */
1358 	u16		reply_post_queue_depth;
1359 	struct reply_post_struct *reply_post;
1360 	u8		rdpq_array_capable;
1361 	u8		rdpq_array_enable;
1362 	u8		rdpq_array_enable_assigned;
1363 	struct dma_pool *reply_post_free_dma_pool;
1364 	struct dma_pool *reply_post_free_array_dma_pool;
1365 	Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1366 	dma_addr_t reply_post_free_array_dma;
1367 	u8		reply_queue_count;
1368 	struct list_head reply_queue_list;
1369 
1370 	u8		combined_reply_queue;
1371 	u8		combined_reply_index_count;
1372 	/* reply post register index */
1373 	resource_size_t	**replyPostRegisterIndex;
1374 
1375 	struct list_head delayed_tr_list;
1376 	struct list_head delayed_tr_volume_list;
1377 	struct list_head delayed_sc_list;
1378 	struct list_head delayed_event_ack_list;
1379 	u8		temp_sensors_count;
1380 	struct mutex pci_access_mutex;
1381 
1382 	/* diag buffer support */
1383 	u8		*diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1384 	u32		diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1385 	dma_addr_t	diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1386 	u8		diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1387 	u32		unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1388 	u32		product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1389 	u32		diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1390 	u32		ring_buffer_offset;
1391 	u32		ring_buffer_sz;
1392 	u8		is_warpdrive;
1393 	u8		is_mcpu_endpoint;
1394 	u8		hide_ir_msg;
1395 	u8		mfg_pg10_hide_flag;
1396 	u8		hide_drives;
1397 	spinlock_t	diag_trigger_lock;
1398 	u8		diag_trigger_active;
1399 	BASE_READ_REG	base_readl;
1400 	struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1401 	struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1402 	struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1403 	struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1404 	void		*device_remove_in_progress;
1405 	u16		device_remove_in_progress_sz;
1406 	u8		is_gen35_ioc;
1407 	u8		is_aero_ioc;
1408 	PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1409 
1410 };
1411 
1412 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1413 	u32 reply);
1414 
1415 
1416 /* base shared API */
1417 extern struct list_head mpt3sas_ioc_list;
1418 extern char    driver_name[MPT_NAME_LENGTH];
1419 /* spinlock on list operations over IOCs
1420  * Case: when multiple warpdrive cards(IOCs) are in use
1421  * Each IOC will added to the ioc list structure on initialization.
1422  * Watchdog threads run at regular intervals to check IOC for any
1423  * fault conditions which will trigger the dead_ioc thread to
1424  * deallocate pci resource, resulting deleting the IOC netry from list,
1425  * this deletion need to protected by spinlock to enusre that
1426  * ioc removal is syncrhonized, if not synchronized it might lead to
1427  * list_del corruption as the ioc list is traversed in cli path.
1428  */
1429 extern spinlock_t gioc_lock;
1430 
1431 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1432 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1433 
1434 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1435 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1436 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1437 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1438 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1439 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1440 	enum reset_type type);
1441 
1442 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1443 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1444 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1445 	u16 smid);
1446 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1447 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1448 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1449 
1450 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1451 	u16 handle);
1452 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1453 	u16 msix_task);
1454 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1455 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1456 /* hi-priority queue */
1457 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1458 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1459 		struct scsi_cmnd *scmd);
1460 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1461 		struct scsiio_tracker *st);
1462 
1463 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1464 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1465 void mpt3sas_base_initialize_callback_handler(void);
1466 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1467 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1468 
1469 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1470 	u32 reply);
1471 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1472 	u8 msix_index, u32 reply);
1473 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1474 	u32 phys_addr);
1475 
1476 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1477 
1478 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1479 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1480 	Mpi2SasIoUnitControlReply_t *mpi_reply,
1481 	Mpi2SasIoUnitControlRequest_t *mpi_request);
1482 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1483 	Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1484 
1485 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1486 	u32 *event_type);
1487 
1488 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1489 
1490 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1491 	u16 device_missing_delay, u8 io_missing_delay);
1492 
1493 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1494 
1495 void
1496 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1497 
1498 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1499 	u8 status, void *mpi_request, int sz);
1500 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1501 
1502 /* scsih shared API */
1503 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1504 	u16 smid);
1505 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1506 	u32 reply);
1507 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1508 void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1509 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1510 
1511 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1512 	u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1513 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1514 	u64 lun, u8 type, u16 smid_task, u16 msix_task,
1515 	u8 timeout, u8 tr_method);
1516 
1517 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1518 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1519 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1520 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1521 	u64 sas_address);
1522 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1523 	u16 smid);
1524 
1525 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1526 	struct MPT3SAS_ADAPTER *ioc, u16 handle);
1527 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1528 	struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1529 struct _sas_device *mpt3sas_get_sdev_by_addr(
1530 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1531 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1532 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1533 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1534 	u16 handle);
1535 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1536 	u16 handle);
1537 
1538 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1539 struct _raid_device *
1540 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1541 
1542 /* config shared API */
1543 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1544 	u32 reply);
1545 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1546 	u8 *num_phys);
1547 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1548 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1549 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1550 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1551 	u16 sz);
1552 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1553 	Mpi2ConfigReply_t *mpi_reply,
1554 	struct Mpi2ManufacturingPage10_t *config_page);
1555 
1556 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1557 	Mpi2ConfigReply_t *mpi_reply,
1558 	struct Mpi2ManufacturingPage11_t  *config_page);
1559 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1560 	Mpi2ConfigReply_t *mpi_reply,
1561 	struct Mpi2ManufacturingPage11_t *config_page);
1562 
1563 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1564 	*mpi_reply, Mpi2BiosPage2_t *config_page);
1565 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1566 	*mpi_reply, Mpi2BiosPage3_t *config_page);
1567 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1568 	*mpi_reply, Mpi2IOUnitPage0_t *config_page);
1569 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1570 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1571 	u32 form, u32 handle);
1572 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1573 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1574 	u32 form, u32 handle);
1575 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1576 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1577 	u32 form, u32 handle);
1578 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1579 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1580 	u32 form, u32 handle);
1581 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1582 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1583 	u16 sz);
1584 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1585 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1586 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1587 	Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1588 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1589 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1590 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1591 	*mpi_reply, Mpi2IOUnitPage8_t *config_page);
1592 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1593 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1594 	u16 sz);
1595 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1596 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1597 	u16 sz);
1598 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1599 	*mpi_reply, Mpi2IOCPage8_t *config_page);
1600 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1601 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1602 	u32 form, u32 handle);
1603 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1604 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1605 	u32 phy_number, u16 handle);
1606 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1607 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1608 	u32 form, u32 handle);
1609 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1610 	*mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1611 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1612 	*mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1613 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1614 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1615 	u32 handle);
1616 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1617 	u8 *num_pds);
1618 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1619 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1620 	u32 handle, u16 sz);
1621 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1622 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1623 	u32 form, u32 form_specific);
1624 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1625 	u16 *volume_handle);
1626 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1627 	u16 volume_handle, u64 *wwid);
1628 
1629 /* ctl shared API */
1630 extern struct device_attribute *mpt3sas_host_attrs[];
1631 extern struct device_attribute *mpt3sas_dev_attrs[];
1632 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1633 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1634 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1635 	u32 reply);
1636 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1637 void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1638 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1639 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1640 	u8 msix_index, u32 reply);
1641 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1642 	Mpi2EventNotificationReply_t *mpi_reply);
1643 
1644 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1645 	u8 bits_to_register);
1646 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1647 	u8 *issue_reset);
1648 
1649 /* transport shared API */
1650 extern struct scsi_transport_template *mpt3sas_transport_template;
1651 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1652 	u32 reply);
1653 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1654 	u16 handle, u64 sas_address);
1655 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1656 	u64 sas_address_parent);
1657 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1658 	*mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1659 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1660 	struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1661 	struct device *parent_dev);
1662 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1663 	u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1664 extern struct sas_function_template mpt3sas_transport_functions;
1665 extern struct scsi_transport_template *mpt3sas_transport_template;
1666 /* trigger data externs */
1667 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1668 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1669 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1670 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1671 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1672 	u32 tigger_bitmask);
1673 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1674 	u16 log_entry_qualifier);
1675 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1676 	u8 asc, u8 ascq);
1677 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1678 	u32 loginfo);
1679 
1680 /* warpdrive APIs */
1681 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1682 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1683 	struct _raid_device *raid_device);
1684 void
1685 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1686 	struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1687 
1688 /* NCQ Prio Handling Check */
1689 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1690 
1691 #endif /* MPT3SAS_BASE_H_INCLUDED */
1692