1 /*
2  * This is the Fusion MPT base driver providing common API layer interface
3  * for access to MPT (Message Passing Technology) firmware.
4  *
5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6  * Copyright (C) 2012-2014  LSI Corporation
7  * Copyright (C) 2013-2014 Avago Technologies
8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * as published by the Free Software Foundation; either version 2
13  * of the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * NO WARRANTY
21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25  * solely responsible for determining the appropriateness of using and
26  * distributing the Program and assumes all risks associated with its
27  * exercise of rights under this Agreement, including but not limited to
28  * the risks and costs of program errors, damage to or loss of data,
29  * programs or equipment, and unavailability or interruption of operations.
30 
31  * DISCLAIMER OF LIABILITY
32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39 
40  * You should have received a copy of the GNU General Public License
41  * along with this program; if not, write to the Free Software
42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
43  * USA.
44  */
45 
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48 
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59 
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
71 
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
74 
75 /* driver versioning info */
76 #define MPT3SAS_DRIVER_NAME		"mpt3sas"
77 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
78 #define MPT3SAS_DESCRIPTION	"LSI MPT Fusion SAS 3.0 Device Driver"
79 #define MPT3SAS_DRIVER_VERSION		"32.100.00.00"
80 #define MPT3SAS_MAJOR_VERSION		32
81 #define MPT3SAS_MINOR_VERSION		100
82 #define MPT3SAS_BUILD_VERSION		0
83 #define MPT3SAS_RELEASE_VERSION	00
84 
85 #define MPT2SAS_DRIVER_NAME		"mpt2sas"
86 #define MPT2SAS_DESCRIPTION	"LSI MPT Fusion SAS 2.0 Device Driver"
87 #define MPT2SAS_DRIVER_VERSION		"20.102.00.00"
88 #define MPT2SAS_MAJOR_VERSION		20
89 #define MPT2SAS_MINOR_VERSION		102
90 #define MPT2SAS_BUILD_VERSION		0
91 #define MPT2SAS_RELEASE_VERSION	00
92 
93 /*
94  * Set MPT3SAS_SG_DEPTH value based on user input.
95  */
96 #define MPT_MAX_PHYS_SEGMENTS	SG_CHUNK_SIZE
97 #define MPT_MIN_PHYS_SEGMENTS	16
98 #define MPT_KDUMP_MIN_PHYS_SEGMENTS	32
99 
100 #define MCPU_MAX_CHAINS_PER_IO	3
101 
102 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
103 #define MPT3SAS_SG_DEPTH		CONFIG_SCSI_MPT3SAS_MAX_SGE
104 #else
105 #define MPT3SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
106 #endif
107 
108 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
109 #define MPT2SAS_SG_DEPTH		CONFIG_SCSI_MPT2SAS_MAX_SGE
110 #else
111 #define MPT2SAS_SG_DEPTH		MPT_MAX_PHYS_SEGMENTS
112 #endif
113 
114 /*
115  * Generic Defines
116  */
117 #define MPT3SAS_SATA_QUEUE_DEPTH	32
118 #define MPT3SAS_SAS_QUEUE_DEPTH		254
119 #define MPT3SAS_RAID_QUEUE_DEPTH	128
120 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH	200
121 
122 #define MPT3SAS_RAID_MAX_SECTORS	8192
123 #define MPT3SAS_HOST_PAGE_SIZE_4K	12
124 #define MPT3SAS_NVME_QUEUE_DEPTH	128
125 #define MPT_NAME_LENGTH			32	/* generic length of strings */
126 #define MPT_STRING_LENGTH		64
127 #define MPI_FRAME_START_OFFSET		256
128 #define REPLY_FREE_POOL_SIZE		512 /*(32 maxcredix *4)*(4 times)*/
129 
130 #define MPT_MAX_CALLBACKS		32
131 
132 #define INTERNAL_CMDS_COUNT		10	/* reserved cmds */
133 /* reserved for issuing internally framed scsi io cmds */
134 #define INTERNAL_SCSIIO_CMDS_COUNT	3
135 
136 #define MPI3_HIM_MASK			0xFFFFFFFF /* mask every bit*/
137 
138 #define MPT3SAS_INVALID_DEVICE_HANDLE	0xFFFF
139 
140 #define MAX_CHAIN_ELEMT_SZ		16
141 #define DEFAULT_NUM_FWCHAIN_ELEMTS	8
142 
143 #define FW_IMG_HDR_READ_TIMEOUT	15
144 
145 #define IOC_OPERATIONAL_WAIT_COUNT	10
146 
147 /*
148  * NVMe defines
149  */
150 #define	NVME_PRP_SIZE			8	/* PRP size */
151 #define	NVME_ERROR_RESPONSE_SIZE	16	/* Max NVME Error Response */
152 #define NVME_TASK_ABORT_MIN_TIMEOUT	6
153 #define NVME_TASK_ABORT_MAX_TIMEOUT	60
154 #define NVME_TASK_MNGT_CUSTOM_MASK	(0x0010)
155 #define	NVME_PRP_PAGE_SIZE		4096	/* Page size */
156 
157 struct mpt3sas_nvme_cmd {
158 	u8	rsvd[24];
159 	__le64	prp1;
160 	__le64	prp2;
161 };
162 
163 /*
164  * logging format
165  */
166 #define ioc_err(ioc, fmt, ...)						\
167 	pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
168 #define ioc_notice(ioc, fmt, ...)					\
169 	pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
170 #define ioc_warn(ioc, fmt, ...)						\
171 	pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
172 #define ioc_info(ioc, fmt, ...)						\
173 	pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
174 
175 /*
176  *  WarpDrive Specific Log codes
177  */
178 
179 #define MPT2_WARPDRIVE_LOGENTRY		(0x8002)
180 #define MPT2_WARPDRIVE_LC_SSDT			(0x41)
181 #define MPT2_WARPDRIVE_LC_SSDLW		(0x43)
182 #define MPT2_WARPDRIVE_LC_SSDLF		(0x44)
183 #define MPT2_WARPDRIVE_LC_BRMF			(0x4D)
184 
185 /*
186  * per target private data
187  */
188 #define MPT_TARGET_FLAGS_RAID_COMPONENT	0x01
189 #define MPT_TARGET_FLAGS_VOLUME		0x02
190 #define MPT_TARGET_FLAGS_DELETED	0x04
191 #define MPT_TARGET_FASTPATH_IO		0x08
192 #define MPT_TARGET_FLAGS_PCIE_DEVICE	0x10
193 
194 #define SAS2_PCI_DEVICE_B0_REVISION	(0x01)
195 #define SAS3_PCI_DEVICE_C0_REVISION	(0x02)
196 
197 /* Atlas PCIe Switch Management Port */
198 #define MPI26_ATLAS_PCIe_SWITCH_DEVID	(0x00B2)
199 
200 /*
201  * Intel HBA branding
202  */
203 #define MPT2SAS_INTEL_RMS25JB080_BRANDING    \
204 	"Intel(R) Integrated RAID Module RMS25JB080"
205 #define MPT2SAS_INTEL_RMS25JB040_BRANDING    \
206 	"Intel(R) Integrated RAID Module RMS25JB040"
207 #define MPT2SAS_INTEL_RMS25KB080_BRANDING    \
208 	"Intel(R) Integrated RAID Module RMS25KB080"
209 #define MPT2SAS_INTEL_RMS25KB040_BRANDING    \
210 	"Intel(R) Integrated RAID Module RMS25KB040"
211 #define MPT2SAS_INTEL_RMS25LB040_BRANDING	\
212 	"Intel(R) Integrated RAID Module RMS25LB040"
213 #define MPT2SAS_INTEL_RMS25LB080_BRANDING	\
214 	"Intel(R) Integrated RAID Module RMS25LB080"
215 #define MPT2SAS_INTEL_RMS2LL080_BRANDING	\
216 	"Intel Integrated RAID Module RMS2LL080"
217 #define MPT2SAS_INTEL_RMS2LL040_BRANDING	\
218 	"Intel Integrated RAID Module RMS2LL040"
219 #define MPT2SAS_INTEL_RS25GB008_BRANDING       \
220 	"Intel(R) RAID Controller RS25GB008"
221 #define MPT2SAS_INTEL_SSD910_BRANDING          \
222 	"Intel(R) SSD 910 Series"
223 
224 #define MPT3SAS_INTEL_RMS3JC080_BRANDING       \
225 	"Intel(R) Integrated RAID Module RMS3JC080"
226 #define MPT3SAS_INTEL_RS3GC008_BRANDING       \
227 	"Intel(R) RAID Controller RS3GC008"
228 #define MPT3SAS_INTEL_RS3FC044_BRANDING       \
229 	"Intel(R) RAID Controller RS3FC044"
230 #define MPT3SAS_INTEL_RS3UC080_BRANDING       \
231 	"Intel(R) RAID Controller RS3UC080"
232 
233 /*
234  * Intel HBA SSDIDs
235  */
236 #define MPT2SAS_INTEL_RMS25JB080_SSDID		0x3516
237 #define MPT2SAS_INTEL_RMS25JB040_SSDID		0x3517
238 #define MPT2SAS_INTEL_RMS25KB080_SSDID		0x3518
239 #define MPT2SAS_INTEL_RMS25KB040_SSDID		0x3519
240 #define MPT2SAS_INTEL_RMS25LB040_SSDID		0x351A
241 #define MPT2SAS_INTEL_RMS25LB080_SSDID		0x351B
242 #define MPT2SAS_INTEL_RMS2LL080_SSDID		0x350E
243 #define MPT2SAS_INTEL_RMS2LL040_SSDID		0x350F
244 #define MPT2SAS_INTEL_RS25GB008_SSDID		0x3000
245 #define MPT2SAS_INTEL_SSD910_SSDID		0x3700
246 
247 #define MPT3SAS_INTEL_RMS3JC080_SSDID		0x3521
248 #define MPT3SAS_INTEL_RS3GC008_SSDID		0x3522
249 #define MPT3SAS_INTEL_RS3FC044_SSDID		0x3523
250 #define MPT3SAS_INTEL_RS3UC080_SSDID		0x3524
251 
252 /*
253  * Dell HBA branding
254  */
255 #define MPT2SAS_DELL_BRANDING_SIZE                 32
256 
257 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING        "Dell 6Gbps SAS HBA"
258 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING    "Dell PERC H200 Adapter"
259 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
260 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING    "Dell PERC H200 Modular"
261 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING   "Dell PERC H200 Embedded"
262 #define MPT2SAS_DELL_PERC_H200_BRANDING            "Dell PERC H200"
263 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING            "Dell 6Gbps SAS"
264 
265 #define MPT3SAS_DELL_12G_HBA_BRANDING       \
266 	"Dell 12Gbps HBA"
267 
268 /*
269  * Dell HBA SSDIDs
270  */
271 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID	0x1F1C
272 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID	0x1F1D
273 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID	0x1F1E
274 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID	0x1F1F
275 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID	0x1F20
276 #define MPT2SAS_DELL_PERC_H200_SSDID		0x1F21
277 #define MPT2SAS_DELL_6GBPS_SAS_SSDID		0x1F22
278 
279 #define MPT3SAS_DELL_12G_HBA_SSDID		0x1F46
280 
281 /*
282  * Cisco HBA branding
283  */
284 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING		\
285 	"Cisco 9300-8E 12G SAS HBA"
286 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING		\
287 	"Cisco 9300-8i 12G SAS HBA"
288 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING	\
289 	"Cisco 12G Modular SAS Pass through Controller"
290 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING		\
291 	"UCS C3X60 12G SAS Pass through Controller"
292 /*
293  * Cisco HBA SSSDIDs
294  */
295 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID  0x14C
296 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID  0x154
297 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID  0x155
298 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID  0x156
299 
300 /*
301  * status bits for ioc->diag_buffer_status
302  */
303 #define MPT3_DIAG_BUFFER_IS_REGISTERED	(0x01)
304 #define MPT3_DIAG_BUFFER_IS_RELEASED	(0x02)
305 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET	(0x04)
306 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
307 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
308 
309 /*
310  * HP HBA branding
311  */
312 #define MPT2SAS_HP_3PAR_SSVID                0x1590
313 
314 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING	\
315 	"HP H220 Host Bus Adapter"
316 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING	\
317 	"HP H221 Host Bus Adapter"
318 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING	\
319 	"HP H222 Host Bus Adapter"
320 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING	\
321 	"HP H220i Host Bus Adapter"
322 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING	\
323 	"HP H210i Host Bus Adapter"
324 
325 /*
326  * HO HBA SSDIDs
327  */
328 #define MPT2SAS_HP_2_4_INTERNAL_SSDID			0x0041
329 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID			0x0042
330 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID	0x0043
331 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID		0x0044
332 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID		0x0046
333 
334 /*
335  * Combined Reply Queue constants,
336  * There are twelve Supplemental Reply Post Host Index Registers
337  * and each register is at offset 0x10 bytes from the previous one.
338  */
339 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
340 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3	12
341 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35	16
342 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET	(0x10)
343 
344 /* OEM Identifiers */
345 #define MFG10_OEM_ID_INVALID                   (0x00000000)
346 #define MFG10_OEM_ID_DELL                      (0x00000001)
347 #define MFG10_OEM_ID_FSC                       (0x00000002)
348 #define MFG10_OEM_ID_SUN                       (0x00000003)
349 #define MFG10_OEM_ID_IBM                       (0x00000004)
350 
351 /* GENERIC Flags 0*/
352 #define MFG10_GF0_OCE_DISABLED                 (0x00000001)
353 #define MFG10_GF0_R1E_DRIVE_COUNT              (0x00000002)
354 #define MFG10_GF0_R10_DISPLAY                  (0x00000004)
355 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE       (0x00000008)
356 #define MFG10_GF0_SINGLE_DRIVE_R0              (0x00000010)
357 
358 #define VIRTUAL_IO_FAILED_RETRY			(0x32010081)
359 
360 /* High IOPs definitions */
361 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH		8
362 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES		8
363 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT		16
364 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES		128
365 
366 /* OEM Specific Flags will come from OEM specific header files */
367 struct Mpi2ManufacturingPage10_t {
368 	MPI2_CONFIG_PAGE_HEADER	Header;		/* 00h */
369 	U8	OEMIdentifier;			/* 04h */
370 	U8	Reserved1;			/* 05h */
371 	U16	Reserved2;			/* 08h */
372 	U32	Reserved3;			/* 0Ch */
373 	U32	GenericFlags0;			/* 10h */
374 	U32	GenericFlags1;			/* 14h */
375 	U32	Reserved4;			/* 18h */
376 	U32	OEMSpecificFlags0;		/* 1Ch */
377 	U32	OEMSpecificFlags1;		/* 20h */
378 	U32	Reserved5[18];			/* 24h - 60h*/
379 };
380 
381 
382 /* Miscellaneous options */
383 struct Mpi2ManufacturingPage11_t {
384 	MPI2_CONFIG_PAGE_HEADER Header;		/* 00h */
385 	__le32	Reserved1;			/* 04h */
386 	u8	Reserved2;			/* 08h */
387 	u8	EEDPTagMode;			/* 09h */
388 	u8	Reserved3;			/* 0Ah */
389 	u8	Reserved4;			/* 0Bh */
390 	__le32	Reserved5[8];			/* 0Ch-2Ch */
391 	u16	AddlFlags2;			/* 2Ch */
392 	u8	AddlFlags3;			/* 2Eh */
393 	u8	Reserved6;			/* 2Fh */
394 	__le32	Reserved7[7];			/* 30h - 4Bh */
395 	u8	NVMeAbortTO;			/* 4Ch */
396 	u8	NumPerDevEvents;		/* 4Dh */
397 	u8	HostTraceBufferDecrementSizeKB;	/* 4Eh */
398 	u8	HostTraceBufferFlags;		/* 4Fh */
399 	u16	HostTraceBufferMaxSizeKB;	/* 50h */
400 	u16	HostTraceBufferMinSizeKB;	/* 52h */
401 	__le32	Reserved10[2];			/* 54h - 5Bh */
402 };
403 
404 /**
405  * struct MPT3SAS_TARGET - starget private hostdata
406  * @starget: starget object
407  * @sas_address: target sas address
408  * @raid_device: raid_device pointer to access volume data
409  * @handle: device handle
410  * @num_luns: number luns
411  * @flags: MPT_TARGET_FLAGS_XXX flags
412  * @deleted: target flaged for deletion
413  * @tm_busy: target is busy with TM request.
414  * @sas_dev: The sas_device associated with this target
415  * @pcie_dev: The pcie device associated with this target
416  */
417 struct MPT3SAS_TARGET {
418 	struct scsi_target *starget;
419 	u64	sas_address;
420 	struct _raid_device *raid_device;
421 	u16	handle;
422 	int	num_luns;
423 	u32	flags;
424 	u8	deleted;
425 	u8	tm_busy;
426 	struct _sas_device *sas_dev;
427 	struct _pcie_device *pcie_dev;
428 };
429 
430 
431 /*
432  * per device private data
433  */
434 #define MPT_DEVICE_FLAGS_INIT		0x01
435 
436 #define MFG_PAGE10_HIDE_SSDS_MASK	(0x00000003)
437 #define MFG_PAGE10_HIDE_ALL_DISKS	(0x00)
438 #define MFG_PAGE10_EXPOSE_ALL_DISKS	(0x01)
439 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT	(0x02)
440 
441 /**
442  * struct MPT3SAS_DEVICE - sdev private hostdata
443  * @sas_target: starget private hostdata
444  * @lun: lun number
445  * @flags: MPT_DEVICE_XXX flags
446  * @configured_lun: lun is configured
447  * @block: device is in SDEV_BLOCK state
448  * @tlr_snoop_check: flag used in determining whether to disable TLR
449  * @eedp_enable: eedp support enable bit
450  * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
451  * @eedp_block_length: block size
452  * @ata_command_pending: SATL passthrough outstanding for device
453  */
454 struct MPT3SAS_DEVICE {
455 	struct MPT3SAS_TARGET *sas_target;
456 	unsigned int	lun;
457 	u32	flags;
458 	u8	configured_lun;
459 	u8	block;
460 	u8	tlr_snoop_check;
461 	u8	ignore_delay_remove;
462 	/* Iopriority Command Handling */
463 	u8	ncq_prio_enable;
464 	/*
465 	 * Bug workaround for SATL handling: the mpt2/3sas firmware
466 	 * doesn't return BUSY or TASK_SET_FULL for subsequent
467 	 * commands while a SATL pass through is in operation as the
468 	 * spec requires, it simply does nothing with them until the
469 	 * pass through completes, causing them possibly to timeout if
470 	 * the passthrough is a long executing command (like format or
471 	 * secure erase).  This variable allows us to do the right
472 	 * thing while a SATL command is pending.
473 	 */
474 	unsigned long ata_command_pending;
475 
476 };
477 
478 #define MPT3_CMD_NOT_USED	0x8000	/* free */
479 #define MPT3_CMD_COMPLETE	0x0001	/* completed */
480 #define MPT3_CMD_PENDING	0x0002	/* pending */
481 #define MPT3_CMD_REPLY_VALID	0x0004	/* reply is valid */
482 #define MPT3_CMD_RESET		0x0008	/* host reset dropped the command */
483 
484 /**
485  * struct _internal_cmd - internal commands struct
486  * @mutex: mutex
487  * @done: completion
488  * @reply: reply message pointer
489  * @sense: sense data
490  * @status: MPT3_CMD_XXX status
491  * @smid: system message id
492  */
493 struct _internal_cmd {
494 	struct mutex mutex;
495 	struct completion done;
496 	void	*reply;
497 	void	*sense;
498 	u16	status;
499 	u16	smid;
500 };
501 
502 
503 
504 /**
505  * struct _sas_device - attached device information
506  * @list: sas device list
507  * @starget: starget object
508  * @sas_address: device sas address
509  * @device_name: retrieved from the SAS IDENTIFY frame.
510  * @handle: device handle
511  * @sas_address_parent: sas address of parent expander or sas host
512  * @enclosure_handle: enclosure handle
513  * @enclosure_logical_id: enclosure logical identifier
514  * @volume_handle: volume handle (valid when hidden raid member)
515  * @volume_wwid: volume unique identifier
516  * @device_info: bitfield provides detailed info about the device
517  * @id: target id
518  * @channel: target channel
519  * @slot: number number
520  * @phy: phy identifier provided in sas device page 0
521  * @responding: used in _scsih_sas_device_mark_responding
522  * @fast_path: fast path feature enable bit
523  * @pfa_led_on: flag for PFA LED status
524  * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
525  *	addition routine.
526  * @chassis_slot: chassis slot
527  * @is_chassis_slot_valid: chassis slot valid or not
528  */
529 struct _sas_device {
530 	struct list_head list;
531 	struct scsi_target *starget;
532 	u64	sas_address;
533 	u64	device_name;
534 	u16	handle;
535 	u64	sas_address_parent;
536 	u16	enclosure_handle;
537 	u64	enclosure_logical_id;
538 	u16	volume_handle;
539 	u64	volume_wwid;
540 	u32	device_info;
541 	int	id;
542 	int	channel;
543 	u16	slot;
544 	u8	phy;
545 	u8	responding;
546 	u8	fast_path;
547 	u8	pfa_led_on;
548 	u8	pend_sas_rphy_add;
549 	u8	enclosure_level;
550 	u8	chassis_slot;
551 	u8	is_chassis_slot_valid;
552 	u8	connector_name[5];
553 	struct kref refcount;
554 };
555 
556 static inline void sas_device_get(struct _sas_device *s)
557 {
558 	kref_get(&s->refcount);
559 }
560 
561 static inline void sas_device_free(struct kref *r)
562 {
563 	kfree(container_of(r, struct _sas_device, refcount));
564 }
565 
566 static inline void sas_device_put(struct _sas_device *s)
567 {
568 	kref_put(&s->refcount, sas_device_free);
569 }
570 
571 /*
572  * struct _pcie_device - attached PCIe device information
573  * @list: pcie device list
574  * @starget: starget object
575  * @wwid: device WWID
576  * @handle: device handle
577  * @device_info: bitfield provides detailed info about the device
578  * @id: target id
579  * @channel: target channel
580  * @slot: slot number
581  * @port_num: port number
582  * @responding: used in _scsih_pcie_device_mark_responding
583  * @fast_path: fast path feature enable bit
584  * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
585  *		NVMe device only
586  * @enclosure_handle: enclosure handle
587  * @enclosure_logical_id: enclosure logical identifier
588  * @enclosure_level: The level of device's enclosure from the controller
589  * @connector_name: ASCII value of the Connector's name
590  * @serial_number: pointer of serial number string allocated runtime
591  * @access_status: Device's Access Status
592  * @refcount: reference count for deletion
593  */
594 struct _pcie_device {
595 	struct list_head list;
596 	struct scsi_target *starget;
597 	u64	wwid;
598 	u16	handle;
599 	u32	device_info;
600 	int	id;
601 	int	channel;
602 	u16	slot;
603 	u8	port_num;
604 	u8	responding;
605 	u8	fast_path;
606 	u32	nvme_mdts;
607 	u16	enclosure_handle;
608 	u64	enclosure_logical_id;
609 	u8	enclosure_level;
610 	u8	connector_name[4];
611 	u8	*serial_number;
612 	u8	reset_timeout;
613 	u8	access_status;
614 	struct kref refcount;
615 };
616 /**
617  * pcie_device_get - Increment the pcie device reference count
618  *
619  * @p: pcie_device object
620  *
621  * When ever this function called it will increment the
622  * reference count of the pcie device for which this function called.
623  *
624  */
625 static inline void pcie_device_get(struct _pcie_device *p)
626 {
627 	kref_get(&p->refcount);
628 }
629 
630 /**
631  * pcie_device_free - Release the pcie device object
632  * @r - kref object
633  *
634  * Free's the pcie device object. It will be called when reference count
635  * reaches to zero.
636  */
637 static inline void pcie_device_free(struct kref *r)
638 {
639 	kfree(container_of(r, struct _pcie_device, refcount));
640 }
641 
642 /**
643  * pcie_device_put - Decrement the pcie device reference count
644  *
645  * @p: pcie_device object
646  *
647  * When ever this function called it will decrement the
648  * reference count of the pcie device for which this function called.
649  *
650  * When refernce count reaches to Zero, this will call pcie_device_free to the
651  * pcie_device object.
652  */
653 static inline void pcie_device_put(struct _pcie_device *p)
654 {
655 	kref_put(&p->refcount, pcie_device_free);
656 }
657 /**
658  * struct _raid_device - raid volume link list
659  * @list: sas device list
660  * @starget: starget object
661  * @sdev: scsi device struct (volumes are single lun)
662  * @wwid: unique identifier for the volume
663  * @handle: device handle
664  * @block_size: Block size of the volume
665  * @id: target id
666  * @channel: target channel
667  * @volume_type: the raid level
668  * @device_info: bitfield provides detailed info about the hidden components
669  * @num_pds: number of hidden raid components
670  * @responding: used in _scsih_raid_device_mark_responding
671  * @percent_complete: resync percent complete
672  * @direct_io_enabled: Whether direct io to PDs are allowed or not
673  * @stripe_exponent: X where 2powX is the stripe sz in blocks
674  * @block_exponent: X where 2powX is the block sz in bytes
675  * @max_lba: Maximum number of LBA in the volume
676  * @stripe_sz: Stripe Size of the volume
677  * @device_info: Device info of the volume member disk
678  * @pd_handle: Array of handles of the physical drives for direct I/O in le16
679  */
680 #define MPT_MAX_WARPDRIVE_PDS		8
681 struct _raid_device {
682 	struct list_head list;
683 	struct scsi_target *starget;
684 	struct scsi_device *sdev;
685 	u64	wwid;
686 	u16	handle;
687 	u16	block_sz;
688 	int	id;
689 	int	channel;
690 	u8	volume_type;
691 	u8	num_pds;
692 	u8	responding;
693 	u8	percent_complete;
694 	u8	direct_io_enabled;
695 	u8	stripe_exponent;
696 	u8	block_exponent;
697 	u64	max_lba;
698 	u32	stripe_sz;
699 	u32	device_info;
700 	u16	pd_handle[MPT_MAX_WARPDRIVE_PDS];
701 };
702 
703 /**
704  * struct _boot_device - boot device info
705  *
706  * @channel: sas, raid, or pcie channel
707  * @device: holds pointer for struct _sas_device, struct _raid_device or
708  *     struct _pcie_device
709  */
710 struct _boot_device {
711 	int channel;
712 	void *device;
713 };
714 
715 /**
716  * struct _sas_port - wide/narrow sas port information
717  * @port_list: list of ports belonging to expander
718  * @num_phys: number of phys belonging to this port
719  * @remote_identify: attached device identification
720  * @rphy: sas transport rphy object
721  * @port: sas transport wide/narrow port object
722  * @phy_list: _sas_phy list objects belonging to this port
723  */
724 struct _sas_port {
725 	struct list_head port_list;
726 	u8	num_phys;
727 	struct sas_identify remote_identify;
728 	struct sas_rphy *rphy;
729 	struct sas_port *port;
730 	struct list_head phy_list;
731 };
732 
733 /**
734  * struct _sas_phy - phy information
735  * @port_siblings: list of phys belonging to a port
736  * @identify: phy identification
737  * @remote_identify: attached device identification
738  * @phy: sas transport phy object
739  * @phy_id: unique phy id
740  * @handle: device handle for this phy
741  * @attached_handle: device handle for attached device
742  * @phy_belongs_to_port: port has been created for this phy
743  */
744 struct _sas_phy {
745 	struct list_head port_siblings;
746 	struct sas_identify identify;
747 	struct sas_identify remote_identify;
748 	struct sas_phy *phy;
749 	u8	phy_id;
750 	u16	handle;
751 	u16	attached_handle;
752 	u8	phy_belongs_to_port;
753 };
754 
755 /**
756  * struct _sas_node - sas_host/expander information
757  * @list: list of expanders
758  * @parent_dev: parent device class
759  * @num_phys: number phys belonging to this sas_host/expander
760  * @sas_address: sas address of this sas_host/expander
761  * @handle: handle for this sas_host/expander
762  * @sas_address_parent: sas address of parent expander or sas host
763  * @enclosure_handle: handle for this a member of an enclosure
764  * @device_info: bitwise defining capabilities of this sas_host/expander
765  * @responding: used in _scsih_expander_device_mark_responding
766  * @phy: a list of phys that make up this sas_host/expander
767  * @sas_port_list: list of ports attached to this sas_host/expander
768  */
769 struct _sas_node {
770 	struct list_head list;
771 	struct device *parent_dev;
772 	u8	num_phys;
773 	u64	sas_address;
774 	u16	handle;
775 	u64	sas_address_parent;
776 	u16	enclosure_handle;
777 	u64	enclosure_logical_id;
778 	u8	responding;
779 	struct	_sas_phy *phy;
780 	struct list_head sas_port_list;
781 };
782 
783 
784 /**
785  * struct _enclosure_node - enclosure information
786  * @list: list of enclosures
787  * @pg0: enclosure pg0;
788  */
789 struct _enclosure_node {
790 	struct list_head list;
791 	Mpi2SasEnclosurePage0_t pg0;
792 };
793 
794 /**
795  * enum reset_type - reset state
796  * @FORCE_BIG_HAMMER: issue diagnostic reset
797  * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
798  */
799 enum reset_type {
800 	FORCE_BIG_HAMMER,
801 	SOFT_RESET,
802 };
803 
804 /**
805  * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
806  * @pcie_sgl: PCIe native SGL for NVMe devices
807  * @pcie_sgl_dma: physical address
808  */
809 struct pcie_sg_list {
810 	void            *pcie_sgl;
811 	dma_addr_t      pcie_sgl_dma;
812 };
813 
814 /**
815  * struct chain_tracker - firmware chain tracker
816  * @chain_buffer: chain buffer
817  * @chain_buffer_dma: physical address
818  * @tracker_list: list of free request (ioc->free_chain_list)
819  */
820 struct chain_tracker {
821 	void *chain_buffer;
822 	dma_addr_t chain_buffer_dma;
823 };
824 
825 struct chain_lookup {
826 	struct chain_tracker *chains_per_smid;
827 	atomic_t	chain_offset;
828 };
829 
830 /**
831  * struct scsiio_tracker - scsi mf request tracker
832  * @smid: system message id
833  * @cb_idx: callback index
834  * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
835  * @chain_list: list of associated firmware chain tracker
836  * @msix_io: IO's msix
837  */
838 struct scsiio_tracker {
839 	u16	smid;
840 	struct scsi_cmnd *scmd;
841 	u8	cb_idx;
842 	u8	direct_io;
843 	struct pcie_sg_list pcie_sg_list;
844 	struct list_head chain_list;
845 	u16     msix_io;
846 };
847 
848 /**
849  * struct request_tracker - firmware request tracker
850  * @smid: system message id
851  * @cb_idx: callback index
852  * @tracker_list: list of free request (ioc->free_list)
853  */
854 struct request_tracker {
855 	u16	smid;
856 	u8	cb_idx;
857 	struct list_head tracker_list;
858 };
859 
860 /**
861  * struct _tr_list - target reset list
862  * @handle: device handle
863  * @state: state machine
864  */
865 struct _tr_list {
866 	struct list_head list;
867 	u16	handle;
868 	u16	state;
869 };
870 
871 /**
872  * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
873  * @handle: device handle
874  */
875 struct _sc_list {
876 	struct list_head list;
877 	u16     handle;
878 };
879 
880 /**
881  * struct _event_ack_list - delayed event acknowledgment list
882  * @Event: Event ID
883  * @EventContext: used to track the event uniquely
884  */
885 struct _event_ack_list {
886 	struct list_head list;
887 	U16     Event;
888 	U32     EventContext;
889 };
890 
891 /**
892  * struct adapter_reply_queue - the reply queue struct
893  * @ioc: per adapter object
894  * @msix_index: msix index into vector table
895  * @vector: irq vector
896  * @reply_post_host_index: head index in the pool where FW completes IO
897  * @reply_post_free: reply post base virt address
898  * @name: the name registered to request_irq()
899  * @busy: isr is actively processing replies on another cpu
900  * @os_irq: irq number
901  * @irqpoll: irq_poll object
902  * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
903  * @list: this list
904 */
905 struct adapter_reply_queue {
906 	struct MPT3SAS_ADAPTER	*ioc;
907 	u8			msix_index;
908 	u32			reply_post_host_index;
909 	Mpi2ReplyDescriptorsUnion_t *reply_post_free;
910 	char			name[MPT_NAME_LENGTH];
911 	atomic_t		busy;
912 	u32			os_irq;
913 	struct irq_poll         irqpoll;
914 	bool			irq_poll_scheduled;
915 	bool			irq_line_enable;
916 	struct list_head	list;
917 };
918 
919 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
920 
921 /* SAS3.0 support */
922 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
923 	struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
924 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
925 		dma_addr_t data_out_dma, size_t data_out_sz,
926 		dma_addr_t data_in_dma, size_t data_in_sz);
927 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
928 		void *paddr);
929 
930 /* SAS3.5 support */
931 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
932 	Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
933 	dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
934 	size_t data_in_sz);
935 
936 /* To support atomic and non atomic descriptors*/
937 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
938 	u16 funcdep);
939 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
940 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
941 /*
942  * To get high iops reply queue's msix index when high iops mode is enabled
943  * else get the msix index of general reply queues.
944  */
945 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
946 	struct scsi_cmnd *scmd);
947 
948 /* IOC Facts and Port Facts converted from little endian to cpu */
949 union mpi3_version_union {
950 	MPI2_VERSION_STRUCT		Struct;
951 	u32				Word;
952 };
953 
954 struct mpt3sas_facts {
955 	u16			MsgVersion;
956 	u16			HeaderVersion;
957 	u8			IOCNumber;
958 	u8			VP_ID;
959 	u8			VF_ID;
960 	u16			IOCExceptions;
961 	u16			IOCStatus;
962 	u32			IOCLogInfo;
963 	u8			MaxChainDepth;
964 	u8			WhoInit;
965 	u8			NumberOfPorts;
966 	u8			MaxMSIxVectors;
967 	u16			RequestCredit;
968 	u16			ProductID;
969 	u32			IOCCapabilities;
970 	union mpi3_version_union	FWVersion;
971 	u16			IOCRequestFrameSize;
972 	u16			IOCMaxChainSegmentSize;
973 	u16			MaxInitiators;
974 	u16			MaxTargets;
975 	u16			MaxSasExpanders;
976 	u16			MaxEnclosures;
977 	u16			ProtocolFlags;
978 	u16			HighPriorityCredit;
979 	u16			MaxReplyDescriptorPostQueueDepth;
980 	u8			ReplyFrameSize;
981 	u8			MaxVolumes;
982 	u16			MaxDevHandle;
983 	u16			MaxPersistentEntries;
984 	u16			MinDevHandle;
985 	u8			CurrentHostPageSize;
986 };
987 
988 struct mpt3sas_port_facts {
989 	u8			PortNumber;
990 	u8			VP_ID;
991 	u8			VF_ID;
992 	u8			PortType;
993 	u16			MaxPostedCmdBuffers;
994 };
995 
996 struct reply_post_struct {
997 	Mpi2ReplyDescriptorsUnion_t	*reply_post_free;
998 	dma_addr_t			reply_post_free_dma;
999 };
1000 
1001 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1002 /**
1003  * struct MPT3SAS_ADAPTER - per adapter struct
1004  * @list: ioc_list
1005  * @shost: shost object
1006  * @id: unique adapter id
1007  * @cpu_count: number online cpus
1008  * @name: generic ioc string
1009  * @tmp_string: tmp string used for logging
1010  * @pdev: pci pdev object
1011  * @pio_chip: physical io register space
1012  * @chip: memory mapped register space
1013  * @chip_phys: physical addrss prior to mapping
1014  * @logging_level: see mpt3sas_debug.h
1015  * @fwfault_debug: debuging FW timeouts
1016  * @ir_firmware: IR firmware present
1017  * @bars: bitmask of BAR's that must be configured
1018  * @mask_interrupts: ignore interrupt
1019  * @dma_mask: used to set the consistent dma mask
1020  * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1021  *			pci resource handling
1022  * @fault_reset_work_q_name: fw fault work queue
1023  * @fault_reset_work_q: ""
1024  * @fault_reset_work: ""
1025  * @firmware_event_name: fw event work queue
1026  * @firmware_event_thread: ""
1027  * @fw_event_lock:
1028  * @fw_event_list: list of fw events
1029  * @aen_event_read_flag: event log was read
1030  * @broadcast_aen_busy: broadcast aen waiting to be serviced
1031  * @shost_recovery: host reset in progress
1032  * @ioc_reset_in_progress_lock:
1033  * @ioc_link_reset_in_progress: phy/hard reset in progress
1034  * @ignore_loginfos: ignore loginfos during task management
1035  * @remove_host: flag for when driver unloads, to avoid sending dev resets
1036  * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1037  * @wait_for_discovery_to_complete: flag set at driver load time when
1038  *                                               waiting on reporting devices
1039  * @is_driver_loading: flag set at driver load time
1040  * @port_enable_failed: flag set when port enable has failed
1041  * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1042  * @start_scan_failed: means port enable failed, return's the ioc_status
1043  * @msix_enable: flag indicating msix is enabled
1044  * @msix_vector_count: number msix vectors
1045  * @cpu_msix_table: table for mapping cpus to msix index
1046  * @cpu_msix_table_sz: table size
1047  * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1048  * @high_iops_outstanding: used to load balance the interrupts
1049  *				within high iops reply queues
1050  * @msix_load_balance: Enables load balancing of interrupts across
1051  * the multiple MSIXs
1052  * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1053  * @thresh_hold: Max number of reply descriptors processed
1054  *				before updating Host Index
1055  * @drv_support_bitmap: driver's supported feature bit map
1056  * @scsi_io_cb_idx: shost generated commands
1057  * @tm_cb_idx: task management commands
1058  * @scsih_cb_idx: scsih internal commands
1059  * @transport_cb_idx: transport internal commands
1060  * @ctl_cb_idx: clt internal commands
1061  * @base_cb_idx: base internal commands
1062  * @config_cb_idx: base internal commands
1063  * @tm_tr_cb_idx : device removal target reset handshake
1064  * @tm_tr_volume_cb_idx : volume removal target reset
1065  * @base_cmds:
1066  * @transport_cmds:
1067  * @scsih_cmds:
1068  * @tm_cmds:
1069  * @ctl_cmds:
1070  * @config_cmds:
1071  * @base_add_sg_single: handler for either 32/64 bit sgl's
1072  * @event_type: bits indicating which events to log
1073  * @event_context: unique id for each logged event
1074  * @event_log: event log pointer
1075  * @event_masks: events that are masked
1076  * @facts: static facts data
1077  * @prev_fw_facts: previous fw facts data
1078  * @pfacts: static port facts data
1079  * @manu_pg0: static manufacturing page 0
1080  * @manu_pg10: static manufacturing page 10
1081  * @manu_pg11: static manufacturing page 11
1082  * @bios_pg2: static bios page 2
1083  * @bios_pg3: static bios page 3
1084  * @ioc_pg8: static ioc page 8
1085  * @iounit_pg0: static iounit page 0
1086  * @iounit_pg1: static iounit page 1
1087  * @iounit_pg8: static iounit page 8
1088  * @sas_hba: sas host object
1089  * @sas_expander_list: expander object list
1090  * @enclosure_list: enclosure object list
1091  * @sas_node_lock:
1092  * @sas_device_list: sas device object list
1093  * @sas_device_init_list: sas device object list (used only at init time)
1094  * @sas_device_lock:
1095  * @pcie_device_list: pcie device object list
1096  * @pcie_device_init_list: pcie device object list (used only at init time)
1097  * @pcie_device_lock:
1098  * @io_missing_delay: time for IO completed by fw when PDR enabled
1099  * @device_missing_delay: time for device missing by fw when PDR enabled
1100  * @sas_id : used for setting volume target IDs
1101  * @pcie_target_id: used for setting pcie target IDs
1102  * @blocking_handles: bitmask used to identify which devices need blocking
1103  * @pd_handles : bitmask for PD handles
1104  * @pd_handles_sz : size of pd_handle bitmask
1105  * @config_page_sz: config page size
1106  * @config_page: reserve memory for config page payload
1107  * @config_page_dma:
1108  * @hba_queue_depth: hba request queue depth
1109  * @sge_size: sg element size for either 32/64 bit
1110  * @scsiio_depth: SCSI_IO queue depth
1111  * @request_sz: per request frame size
1112  * @request: pool of request frames
1113  * @request_dma:
1114  * @request_dma_sz:
1115  * @scsi_lookup: firmware request tracker list
1116  * @scsi_lookup_lock:
1117  * @free_list: free list of request
1118  * @pending_io_count:
1119  * @reset_wq:
1120  * @chain: pool of chains
1121  * @chain_dma:
1122  * @max_sges_in_main_message: number sg elements in main message
1123  * @max_sges_in_chain_message: number sg elements per chain
1124  * @chains_needed_per_io: max chains per io
1125  * @chain_depth: total chains allocated
1126  * @chain_segment_sz: gives the max number of
1127  *			SGEs accommodate on single chain buffer
1128  * @hi_priority_smid:
1129  * @hi_priority:
1130  * @hi_priority_dma:
1131  * @hi_priority_depth:
1132  * @hpr_lookup:
1133  * @hpr_free_list:
1134  * @internal_smid:
1135  * @internal:
1136  * @internal_dma:
1137  * @internal_depth:
1138  * @internal_lookup:
1139  * @internal_free_list:
1140  * @sense: pool of sense
1141  * @sense_dma:
1142  * @sense_dma_pool:
1143  * @reply_depth: hba reply queue depth:
1144  * @reply_sz: per reply frame size:
1145  * @reply: pool of replys:
1146  * @reply_dma:
1147  * @reply_dma_pool:
1148  * @reply_free_queue_depth: reply free depth
1149  * @reply_free: pool for reply free queue (32 bit addr)
1150  * @reply_free_dma:
1151  * @reply_free_dma_pool:
1152  * @reply_free_host_index: tail index in pool to insert free replys
1153  * @reply_post_queue_depth: reply post queue depth
1154  * @reply_post_struct: struct for reply_post_free physical & virt address
1155  * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1156  * @rdpq_array_enable: rdpq_array support is enabled in the driver
1157  * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1158  *				is assigned only ones
1159  * @reply_queue_count: number of reply queue's
1160  * @reply_queue_list: link list contaning the reply queue info
1161  * @msix96_vector: 96 MSI-X vector support
1162  * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1163  * @delayed_tr_list: target reset link list
1164  * @delayed_tr_volume_list: volume target reset link list
1165  * @delayed_sc_list:
1166  * @delayed_event_ack_list:
1167  * @temp_sensors_count: flag to carry the number of temperature sensors
1168  * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1169  *	pci resource handling. PCI resource freeing will lead to free
1170  *	vital hardware/memory resource, which might be in use by cli/sysfs
1171  *	path functions resulting in Null pointer reference followed by kernel
1172  *	crash. To avoid the above race condition we use mutex syncrhonization
1173  *	which ensures the syncrhonization between cli/sysfs_show path.
1174  * @atomic_desc_capable: Atomic Request Descriptor support.
1175  * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1176  */
1177 struct MPT3SAS_ADAPTER {
1178 	struct list_head list;
1179 	struct Scsi_Host *shost;
1180 	u8		id;
1181 	int		cpu_count;
1182 	char		name[MPT_NAME_LENGTH];
1183 	char		driver_name[MPT_NAME_LENGTH - 8];
1184 	char		tmp_string[MPT_STRING_LENGTH];
1185 	struct pci_dev	*pdev;
1186 	Mpi2SystemInterfaceRegs_t __iomem *chip;
1187 	phys_addr_t	chip_phys;
1188 	int		logging_level;
1189 	int		fwfault_debug;
1190 	u8		ir_firmware;
1191 	int		bars;
1192 	u8		mask_interrupts;
1193 	int		dma_mask;
1194 
1195 	/* fw fault handler */
1196 	char		fault_reset_work_q_name[20];
1197 	struct workqueue_struct *fault_reset_work_q;
1198 	struct delayed_work fault_reset_work;
1199 
1200 	/* fw event handler */
1201 	char		firmware_event_name[20];
1202 	struct workqueue_struct	*firmware_event_thread;
1203 	spinlock_t	fw_event_lock;
1204 	struct list_head fw_event_list;
1205 
1206 	 /* misc flags */
1207 	int		aen_event_read_flag;
1208 	u8		broadcast_aen_busy;
1209 	u16		broadcast_aen_pending;
1210 	u8		shost_recovery;
1211 	u8		got_task_abort_from_ioctl;
1212 
1213 	struct mutex	reset_in_progress_mutex;
1214 	spinlock_t	ioc_reset_in_progress_lock;
1215 	u8		ioc_link_reset_in_progress;
1216 
1217 	u8		ignore_loginfos;
1218 	u8		remove_host;
1219 	u8		pci_error_recovery;
1220 	u8		wait_for_discovery_to_complete;
1221 	u8		is_driver_loading;
1222 	u8		port_enable_failed;
1223 	u8		start_scan;
1224 	u16		start_scan_failed;
1225 
1226 	u8		msix_enable;
1227 	u16		msix_vector_count;
1228 	u8		*cpu_msix_table;
1229 	u16		cpu_msix_table_sz;
1230 	resource_size_t __iomem **reply_post_host_index;
1231 	u32		ioc_reset_count;
1232 	MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1233 	u32             non_operational_loop;
1234 	atomic64_t      total_io_cnt;
1235 	atomic64_t	high_iops_outstanding;
1236 	bool            msix_load_balance;
1237 	u16		thresh_hold;
1238 	u8		high_iops_queues;
1239 	u32		drv_support_bitmap;
1240 	bool		enable_sdev_max_qd;
1241 
1242 	/* internal commands, callback index */
1243 	u8		scsi_io_cb_idx;
1244 	u8		tm_cb_idx;
1245 	u8		transport_cb_idx;
1246 	u8		scsih_cb_idx;
1247 	u8		ctl_cb_idx;
1248 	u8		base_cb_idx;
1249 	u8		port_enable_cb_idx;
1250 	u8		config_cb_idx;
1251 	u8		tm_tr_cb_idx;
1252 	u8		tm_tr_volume_cb_idx;
1253 	u8		tm_sas_control_cb_idx;
1254 	struct _internal_cmd base_cmds;
1255 	struct _internal_cmd port_enable_cmds;
1256 	struct _internal_cmd transport_cmds;
1257 	struct _internal_cmd scsih_cmds;
1258 	struct _internal_cmd tm_cmds;
1259 	struct _internal_cmd ctl_cmds;
1260 	struct _internal_cmd config_cmds;
1261 
1262 	MPT_ADD_SGE	base_add_sg_single;
1263 
1264 	/* function ptr for either IEEE or MPI sg elements */
1265 	MPT_BUILD_SG_SCMD build_sg_scmd;
1266 	MPT_BUILD_SG    build_sg;
1267 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1268 	u16             sge_size_ieee;
1269 	u16		hba_mpi_version_belonged;
1270 
1271 	/* function ptr for MPI sg elements only */
1272 	MPT_BUILD_SG    build_sg_mpi;
1273 	MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1274 
1275 	/* function ptr for NVMe PRP elements only */
1276 	NVME_BUILD_PRP  build_nvme_prp;
1277 
1278 	/* event log */
1279 	u32		event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1280 	u32		event_context;
1281 	void		*event_log;
1282 	u32		event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1283 
1284 	u8		tm_custom_handling;
1285 	u8		nvme_abort_timeout;
1286 
1287 
1288 	/* static config pages */
1289 	struct mpt3sas_facts facts;
1290 	struct mpt3sas_facts prev_fw_facts;
1291 	struct mpt3sas_port_facts *pfacts;
1292 	Mpi2ManufacturingPage0_t manu_pg0;
1293 	struct Mpi2ManufacturingPage10_t manu_pg10;
1294 	struct Mpi2ManufacturingPage11_t manu_pg11;
1295 	Mpi2BiosPage2_t	bios_pg2;
1296 	Mpi2BiosPage3_t	bios_pg3;
1297 	Mpi2IOCPage8_t ioc_pg8;
1298 	Mpi2IOUnitPage0_t iounit_pg0;
1299 	Mpi2IOUnitPage1_t iounit_pg1;
1300 	Mpi2IOUnitPage8_t iounit_pg8;
1301 	Mpi2IOCPage1_t	ioc_pg1_copy;
1302 
1303 	struct _boot_device req_boot_device;
1304 	struct _boot_device req_alt_boot_device;
1305 	struct _boot_device current_boot_device;
1306 
1307 	/* sas hba, expander, and device list */
1308 	struct _sas_node sas_hba;
1309 	struct list_head sas_expander_list;
1310 	struct list_head enclosure_list;
1311 	spinlock_t	sas_node_lock;
1312 	struct list_head sas_device_list;
1313 	struct list_head sas_device_init_list;
1314 	spinlock_t	sas_device_lock;
1315 	struct list_head pcie_device_list;
1316 	struct list_head pcie_device_init_list;
1317 	spinlock_t      pcie_device_lock;
1318 
1319 	struct list_head raid_device_list;
1320 	spinlock_t	raid_device_lock;
1321 	u8		io_missing_delay;
1322 	u16		device_missing_delay;
1323 	int		sas_id;
1324 	int		pcie_target_id;
1325 
1326 	void		*blocking_handles;
1327 	void		*pd_handles;
1328 	u16		pd_handles_sz;
1329 
1330 	void		*pend_os_device_add;
1331 	u16		pend_os_device_add_sz;
1332 
1333 	/* config page */
1334 	u16		config_page_sz;
1335 	void		*config_page;
1336 	dma_addr_t	config_page_dma;
1337 	void		*config_vaddr;
1338 
1339 	/* scsiio request */
1340 	u16		hba_queue_depth;
1341 	u16		sge_size;
1342 	u16		scsiio_depth;
1343 	u16		request_sz;
1344 	u8		*request;
1345 	dma_addr_t	request_dma;
1346 	u32		request_dma_sz;
1347 	struct pcie_sg_list *pcie_sg_lookup;
1348 	spinlock_t	scsi_lookup_lock;
1349 	int		pending_io_count;
1350 	wait_queue_head_t reset_wq;
1351 
1352 	/* PCIe SGL */
1353 	struct dma_pool *pcie_sgl_dma_pool;
1354 	/* Host Page Size */
1355 	u32		page_size;
1356 
1357 	/* chain */
1358 	struct chain_lookup *chain_lookup;
1359 	struct list_head free_chain_list;
1360 	struct dma_pool *chain_dma_pool;
1361 	ulong		chain_pages;
1362 	u16		max_sges_in_main_message;
1363 	u16		max_sges_in_chain_message;
1364 	u16		chains_needed_per_io;
1365 	u32		chain_depth;
1366 	u16		chain_segment_sz;
1367 	u16		chains_per_prp_buffer;
1368 
1369 	/* hi-priority queue */
1370 	u16		hi_priority_smid;
1371 	u8		*hi_priority;
1372 	dma_addr_t	hi_priority_dma;
1373 	u16		hi_priority_depth;
1374 	struct request_tracker *hpr_lookup;
1375 	struct list_head hpr_free_list;
1376 
1377 	/* internal queue */
1378 	u16		internal_smid;
1379 	u8		*internal;
1380 	dma_addr_t	internal_dma;
1381 	u16		internal_depth;
1382 	struct request_tracker *internal_lookup;
1383 	struct list_head internal_free_list;
1384 
1385 	/* sense */
1386 	u8		*sense;
1387 	dma_addr_t	sense_dma;
1388 	struct dma_pool *sense_dma_pool;
1389 
1390 	/* reply */
1391 	u16		reply_sz;
1392 	u8		*reply;
1393 	dma_addr_t	reply_dma;
1394 	u32		reply_dma_max_address;
1395 	u32		reply_dma_min_address;
1396 	struct dma_pool *reply_dma_pool;
1397 
1398 	/* reply free queue */
1399 	u16		reply_free_queue_depth;
1400 	__le32		*reply_free;
1401 	dma_addr_t	reply_free_dma;
1402 	struct dma_pool *reply_free_dma_pool;
1403 	u32		reply_free_host_index;
1404 
1405 	/* reply post queue */
1406 	u16		reply_post_queue_depth;
1407 	struct reply_post_struct *reply_post;
1408 	u8		rdpq_array_capable;
1409 	u8		rdpq_array_enable;
1410 	u8		rdpq_array_enable_assigned;
1411 	struct dma_pool *reply_post_free_dma_pool;
1412 	struct dma_pool *reply_post_free_array_dma_pool;
1413 	Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1414 	dma_addr_t reply_post_free_array_dma;
1415 	u8		reply_queue_count;
1416 	struct list_head reply_queue_list;
1417 
1418 	u8		combined_reply_queue;
1419 	u8		combined_reply_index_count;
1420 	u8		smp_affinity_enable;
1421 	/* reply post register index */
1422 	resource_size_t	**replyPostRegisterIndex;
1423 
1424 	struct list_head delayed_tr_list;
1425 	struct list_head delayed_tr_volume_list;
1426 	struct list_head delayed_sc_list;
1427 	struct list_head delayed_event_ack_list;
1428 	u8		temp_sensors_count;
1429 	struct mutex pci_access_mutex;
1430 
1431 	/* diag buffer support */
1432 	u8		*diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1433 	u32		diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1434 	dma_addr_t	diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1435 	u8		diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1436 	u32		unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1437 	u32		product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1438 	u32		diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1439 	u32		ring_buffer_offset;
1440 	u32		ring_buffer_sz;
1441 	u8		is_warpdrive;
1442 	u8		is_mcpu_endpoint;
1443 	u8		hide_ir_msg;
1444 	u8		mfg_pg10_hide_flag;
1445 	u8		hide_drives;
1446 	spinlock_t	diag_trigger_lock;
1447 	u8		diag_trigger_active;
1448 	u8		atomic_desc_capable;
1449 	BASE_READ_REG	base_readl;
1450 	struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1451 	struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1452 	struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1453 	struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1454 	void		*device_remove_in_progress;
1455 	u16		device_remove_in_progress_sz;
1456 	u8		is_gen35_ioc;
1457 	u8		is_aero_ioc;
1458 	PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1459 	PUT_SMID_IO_FP_HIP put_smid_fast_path;
1460 	PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1461 	PUT_SMID_DEFAULT put_smid_default;
1462 	GET_MSIX_INDEX get_msix_index_for_smlio;
1463 };
1464 
1465 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1466 
1467 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1468 	u32 reply);
1469 
1470 
1471 /* base shared API */
1472 extern struct list_head mpt3sas_ioc_list;
1473 extern char    driver_name[MPT_NAME_LENGTH];
1474 /* spinlock on list operations over IOCs
1475  * Case: when multiple warpdrive cards(IOCs) are in use
1476  * Each IOC will added to the ioc list structure on initialization.
1477  * Watchdog threads run at regular intervals to check IOC for any
1478  * fault conditions which will trigger the dead_ioc thread to
1479  * deallocate pci resource, resulting deleting the IOC netry from list,
1480  * this deletion need to protected by spinlock to enusre that
1481  * ioc removal is syncrhonized, if not synchronized it might lead to
1482  * list_del corruption as the ioc list is traversed in cli path.
1483  */
1484 extern spinlock_t gioc_lock;
1485 
1486 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1487 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1488 
1489 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1490 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1491 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1492 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1493 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1494 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1495 	enum reset_type type);
1496 
1497 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1498 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1499 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1500 	u16 smid);
1501 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1502 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1503 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1504 
1505 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1506 	u16 handle);
1507 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1508 	u16 msix_task);
1509 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1510 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1511 /* hi-priority queue */
1512 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1513 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1514 		struct scsi_cmnd *scmd);
1515 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1516 		struct scsiio_tracker *st);
1517 
1518 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1519 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1520 void mpt3sas_base_initialize_callback_handler(void);
1521 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1522 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1523 
1524 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1525 	u32 reply);
1526 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1527 	u8 msix_index, u32 reply);
1528 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1529 	u32 phys_addr);
1530 
1531 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1532 
1533 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1534 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1535 	Mpi2SasIoUnitControlReply_t *mpi_reply,
1536 	Mpi2SasIoUnitControlRequest_t *mpi_request);
1537 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1538 	Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1539 
1540 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1541 	u32 *event_type);
1542 
1543 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1544 
1545 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1546 	u16 device_missing_delay, u8 io_missing_delay);
1547 
1548 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1549 
1550 void
1551 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1552 
1553 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1554 	u8 status, void *mpi_request, int sz);
1555 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1556 
1557 /* scsih shared API */
1558 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1559 	u16 smid);
1560 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1561 	u32 reply);
1562 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1563 void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1564 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1565 
1566 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1567 	u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1568 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1569 	u64 lun, u8 type, u16 smid_task, u16 msix_task,
1570 	u8 timeout, u8 tr_method);
1571 
1572 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1573 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1574 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1575 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1576 	u64 sas_address);
1577 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1578 	u16 smid);
1579 
1580 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1581 	struct MPT3SAS_ADAPTER *ioc, u16 handle);
1582 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1583 	struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1584 struct _sas_device *mpt3sas_get_sdev_by_addr(
1585 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1586 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1587 	 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1588 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1589 	u16 handle);
1590 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1591 	u16 handle);
1592 
1593 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1594 struct _raid_device *
1595 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1596 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1597 
1598 /* config shared API */
1599 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1600 	u32 reply);
1601 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1602 	u8 *num_phys);
1603 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1604 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1605 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1606 	Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1607 	u16 sz);
1608 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1609 	Mpi2ConfigReply_t *mpi_reply,
1610 	struct Mpi2ManufacturingPage10_t *config_page);
1611 
1612 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1613 	Mpi2ConfigReply_t *mpi_reply,
1614 	struct Mpi2ManufacturingPage11_t  *config_page);
1615 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1616 	Mpi2ConfigReply_t *mpi_reply,
1617 	struct Mpi2ManufacturingPage11_t *config_page);
1618 
1619 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1620 	*mpi_reply, Mpi2BiosPage2_t *config_page);
1621 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1622 	*mpi_reply, Mpi2BiosPage3_t *config_page);
1623 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1624 	*mpi_reply, Mpi2IOUnitPage0_t *config_page);
1625 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1626 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1627 	u32 form, u32 handle);
1628 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1629 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1630 	u32 form, u32 handle);
1631 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1632 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1633 	u32 form, u32 handle);
1634 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1635 	Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1636 	u32 form, u32 handle);
1637 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1638 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1639 	u16 sz);
1640 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1641 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1642 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1643 	Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1644 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1645 	*mpi_reply, Mpi2IOUnitPage1_t *config_page);
1646 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1647 	*mpi_reply, Mpi2IOUnitPage8_t *config_page);
1648 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1649 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1650 	u16 sz);
1651 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1652 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1653 	u16 sz);
1654 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1655 	*mpi_reply, Mpi2IOCPage1_t *config_page);
1656 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1657 	*mpi_reply, Mpi2IOCPage1_t *config_page);
1658 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1659 	*mpi_reply, Mpi2IOCPage8_t *config_page);
1660 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1661 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1662 	u32 form, u32 handle);
1663 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1664 	Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1665 	u32 phy_number, u16 handle);
1666 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1667 	Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1668 	u32 form, u32 handle);
1669 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1670 	*mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1671 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1672 	*mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1673 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1674 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1675 	u32 handle);
1676 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1677 	u8 *num_pds);
1678 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1679 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1680 	u32 handle, u16 sz);
1681 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1682 	Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1683 	u32 form, u32 form_specific);
1684 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1685 	u16 *volume_handle);
1686 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1687 	u16 volume_handle, u64 *wwid);
1688 
1689 /* ctl shared API */
1690 extern struct device_attribute *mpt3sas_host_attrs[];
1691 extern struct device_attribute *mpt3sas_dev_attrs[];
1692 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1693 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1694 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1695 	u32 reply);
1696 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1697 void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1698 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1699 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1700 	u8 msix_index, u32 reply);
1701 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1702 	Mpi2EventNotificationReply_t *mpi_reply);
1703 
1704 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1705 	u8 bits_to_register);
1706 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1707 	u8 *issue_reset);
1708 
1709 /* transport shared API */
1710 extern struct scsi_transport_template *mpt3sas_transport_template;
1711 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1712 	u32 reply);
1713 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1714 	u16 handle, u64 sas_address);
1715 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1716 	u64 sas_address_parent);
1717 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1718 	*mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1719 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1720 	struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1721 	struct device *parent_dev);
1722 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1723 	u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1724 extern struct sas_function_template mpt3sas_transport_functions;
1725 extern struct scsi_transport_template *mpt3sas_transport_template;
1726 /* trigger data externs */
1727 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1728 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1729 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1730 	struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1731 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1732 	u32 tigger_bitmask);
1733 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1734 	u16 log_entry_qualifier);
1735 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1736 	u8 asc, u8 ascq);
1737 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1738 	u32 loginfo);
1739 
1740 /* warpdrive APIs */
1741 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1742 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1743 	struct _raid_device *raid_device);
1744 void
1745 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1746 	struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1747 
1748 /* NCQ Prio Handling Check */
1749 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1750 
1751 /**
1752  * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
1753  * @device_info: bitfield providing information about the device.
1754  * Context: none
1755  *
1756  * Returns 1 if scsi device.
1757  */
1758 static inline int
1759 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
1760 {
1761 	if ((device_info &
1762 	    MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
1763 		return 1;
1764 	else
1765 		return 0;
1766 }
1767 #endif /* MPT3SAS_BASE_H_INCLUDED */
1768