1 /* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h 6 * Copyright (C) 2012-2014 LSI Corporation 7 * Copyright (C) 2013-2014 Avago Technologies 8 * (mailto: MPT-FusionLinux.pdl@avagotech.com) 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 2 13 * of the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * NO WARRANTY 21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 * solely responsible for determining the appropriateness of using and 26 * distributing the Program and assumes all risks associated with its 27 * exercise of rights under this Agreement, including but not limited to 28 * the risks and costs of program errors, damage to or loss of data, 29 * programs or equipment, and unavailability or interruption of operations. 30 31 * DISCLAIMER OF LIABILITY 32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 40 * You should have received a copy of the GNU General Public License 41 * along with this program; if not, write to the Free Software 42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 43 * USA. 44 */ 45 46 #ifndef MPT3SAS_BASE_H_INCLUDED 47 #define MPT3SAS_BASE_H_INCLUDED 48 49 #include "mpi/mpi2_type.h" 50 #include "mpi/mpi2.h" 51 #include "mpi/mpi2_ioc.h" 52 #include "mpi/mpi2_cnfg.h" 53 #include "mpi/mpi2_init.h" 54 #include "mpi/mpi2_raid.h" 55 #include "mpi/mpi2_tool.h" 56 #include "mpi/mpi2_sas.h" 57 #include "mpi/mpi2_pci.h" 58 #include "mpi/mpi2_image.h" 59 60 #include <scsi/scsi.h> 61 #include <scsi/scsi_cmnd.h> 62 #include <scsi/scsi_device.h> 63 #include <scsi/scsi_host.h> 64 #include <scsi/scsi_tcq.h> 65 #include <scsi/scsi_transport_sas.h> 66 #include <scsi/scsi_dbg.h> 67 #include <scsi/scsi_eh.h> 68 #include <linux/pci.h> 69 #include <linux/poll.h> 70 #include <linux/irq_poll.h> 71 72 #include "mpt3sas_debug.h" 73 #include "mpt3sas_trigger_diag.h" 74 #include "mpt3sas_trigger_pages.h" 75 76 /* driver versioning info */ 77 #define MPT3SAS_DRIVER_NAME "mpt3sas" 78 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" 79 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" 80 #define MPT3SAS_DRIVER_VERSION "37.101.00.00" 81 #define MPT3SAS_MAJOR_VERSION 37 82 #define MPT3SAS_MINOR_VERSION 101 83 #define MPT3SAS_BUILD_VERSION 0 84 #define MPT3SAS_RELEASE_VERSION 00 85 86 #define MPT2SAS_DRIVER_NAME "mpt2sas" 87 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" 88 #define MPT2SAS_DRIVER_VERSION "20.102.00.00" 89 #define MPT2SAS_MAJOR_VERSION 20 90 #define MPT2SAS_MINOR_VERSION 102 91 #define MPT2SAS_BUILD_VERSION 0 92 #define MPT2SAS_RELEASE_VERSION 00 93 94 /* CoreDump: Default timeout */ 95 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/ 96 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF) 97 #define MPT3SAS_TIMESYNC_TIMEOUT_SECONDS (10) /* 10 seconds */ 98 #define MPT3SAS_TIMESYNC_UPDATE_INTERVAL (900) /* 15 minutes */ 99 #define MPT3SAS_TIMESYNC_UNIT_MASK (0x80) /* bit 7 */ 100 #define MPT3SAS_TIMESYNC_MASK (0x7F) /* 0 - 6 bits */ 101 #define SECONDS_PER_MIN (60) 102 #define SECONDS_PER_HOUR (3600) 103 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF) 104 #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP (0x81) 105 106 /* 107 * Set MPT3SAS_SG_DEPTH value based on user input. 108 */ 109 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE 110 #define MPT_MIN_PHYS_SEGMENTS 16 111 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32 112 113 #define MCPU_MAX_CHAINS_PER_IO 3 114 115 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE 116 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE 117 #else 118 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 119 #endif 120 121 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE 122 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE 123 #else 124 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 125 #endif 126 127 /* 128 * Generic Defines 129 */ 130 #define MPT3SAS_SATA_QUEUE_DEPTH 32 131 #define MPT3SAS_SAS_QUEUE_DEPTH 254 132 #define MPT3SAS_RAID_QUEUE_DEPTH 128 133 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200 134 135 #define MPT3SAS_RAID_MAX_SECTORS 8192 136 #define MPT3SAS_HOST_PAGE_SIZE_4K 12 137 #define MPT3SAS_NVME_QUEUE_DEPTH 128 138 #define MPT_NAME_LENGTH 32 /* generic length of strings */ 139 #define MPT_STRING_LENGTH 64 140 #define MPI_FRAME_START_OFFSET 256 141 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/ 142 143 #define MPT_MAX_CALLBACKS 32 144 145 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */ 146 /* reserved for issuing internally framed scsi io cmds */ 147 #define INTERNAL_SCSIIO_CMDS_COUNT 3 148 149 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/ 150 151 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF 152 153 #define MAX_CHAIN_ELEMT_SZ 16 154 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8 155 156 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6 157 #define FW_IMG_HDR_READ_TIMEOUT 15 158 159 #define IOC_OPERATIONAL_WAIT_COUNT 10 160 161 /* 162 * NVMe defines 163 */ 164 #define NVME_PRP_SIZE 8 /* PRP size */ 165 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 166 #define NVME_TASK_ABORT_MIN_TIMEOUT 6 167 #define NVME_TASK_ABORT_MAX_TIMEOUT 60 168 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010) 169 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ 170 171 struct mpt3sas_nvme_cmd { 172 u8 rsvd[24]; 173 __le64 prp1; 174 __le64 prp2; 175 }; 176 177 /* 178 * logging format 179 */ 180 #define ioc_err(ioc, fmt, ...) \ 181 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 182 #define ioc_notice(ioc, fmt, ...) \ 183 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 184 #define ioc_warn(ioc, fmt, ...) \ 185 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 186 #define ioc_info(ioc, fmt, ...) \ 187 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__) 188 189 /* 190 * WarpDrive Specific Log codes 191 */ 192 193 #define MPT2_WARPDRIVE_LOGENTRY (0x8002) 194 #define MPT2_WARPDRIVE_LC_SSDT (0x41) 195 #define MPT2_WARPDRIVE_LC_SSDLW (0x43) 196 #define MPT2_WARPDRIVE_LC_SSDLF (0x44) 197 #define MPT2_WARPDRIVE_LC_BRMF (0x4D) 198 199 /* 200 * per target private data 201 */ 202 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01 203 #define MPT_TARGET_FLAGS_VOLUME 0x02 204 #define MPT_TARGET_FLAGS_DELETED 0x04 205 #define MPT_TARGET_FASTPATH_IO 0x08 206 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10 207 208 #define SAS2_PCI_DEVICE_B0_REVISION (0x01) 209 #define SAS3_PCI_DEVICE_C0_REVISION (0x02) 210 211 /* Atlas PCIe Switch Management Port */ 212 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2) 213 214 /* 215 * Intel HBA branding 216 */ 217 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \ 218 "Intel(R) Integrated RAID Module RMS25JB080" 219 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \ 220 "Intel(R) Integrated RAID Module RMS25JB040" 221 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \ 222 "Intel(R) Integrated RAID Module RMS25KB080" 223 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \ 224 "Intel(R) Integrated RAID Module RMS25KB040" 225 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \ 226 "Intel(R) Integrated RAID Module RMS25LB040" 227 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \ 228 "Intel(R) Integrated RAID Module RMS25LB080" 229 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \ 230 "Intel Integrated RAID Module RMS2LL080" 231 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \ 232 "Intel Integrated RAID Module RMS2LL040" 233 #define MPT2SAS_INTEL_RS25GB008_BRANDING \ 234 "Intel(R) RAID Controller RS25GB008" 235 #define MPT2SAS_INTEL_SSD910_BRANDING \ 236 "Intel(R) SSD 910 Series" 237 238 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \ 239 "Intel(R) Integrated RAID Module RMS3JC080" 240 #define MPT3SAS_INTEL_RS3GC008_BRANDING \ 241 "Intel(R) RAID Controller RS3GC008" 242 #define MPT3SAS_INTEL_RS3FC044_BRANDING \ 243 "Intel(R) RAID Controller RS3FC044" 244 #define MPT3SAS_INTEL_RS3UC080_BRANDING \ 245 "Intel(R) RAID Controller RS3UC080" 246 247 /* 248 * Intel HBA SSDIDs 249 */ 250 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516 251 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517 252 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518 253 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519 254 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A 255 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B 256 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E 257 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F 258 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000 259 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700 260 261 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521 262 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522 263 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523 264 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524 265 266 /* 267 * Dell HBA branding 268 */ 269 #define MPT2SAS_DELL_BRANDING_SIZE 32 270 271 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA" 272 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter" 273 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated" 274 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular" 275 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded" 276 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200" 277 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS" 278 279 #define MPT3SAS_DELL_12G_HBA_BRANDING \ 280 "Dell 12Gbps HBA" 281 282 /* 283 * Dell HBA SSDIDs 284 */ 285 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C 286 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D 287 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E 288 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F 289 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20 290 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21 291 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22 292 293 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46 294 295 /* 296 * Cisco HBA branding 297 */ 298 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \ 299 "Cisco 9300-8E 12G SAS HBA" 300 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \ 301 "Cisco 9300-8i 12G SAS HBA" 302 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \ 303 "Cisco 12G Modular SAS Pass through Controller" 304 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \ 305 "UCS C3X60 12G SAS Pass through Controller" 306 /* 307 * Cisco HBA SSSDIDs 308 */ 309 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C 310 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154 311 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155 312 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156 313 314 /* 315 * status bits for ioc->diag_buffer_status 316 */ 317 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01) 318 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02) 319 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04) 320 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08) 321 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10) 322 323 /* 324 * HP HBA branding 325 */ 326 #define MPT2SAS_HP_3PAR_SSVID 0x1590 327 328 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \ 329 "HP H220 Host Bus Adapter" 330 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \ 331 "HP H221 Host Bus Adapter" 332 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \ 333 "HP H222 Host Bus Adapter" 334 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \ 335 "HP H220i Host Bus Adapter" 336 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \ 337 "HP H210i Host Bus Adapter" 338 339 /* 340 * HO HBA SSDIDs 341 */ 342 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041 343 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042 344 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043 345 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044 346 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046 347 348 /* 349 * Combined Reply Queue constants, 350 * There are twelve Supplemental Reply Post Host Index Registers 351 * and each register is at offset 0x10 bytes from the previous one. 352 */ 353 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8) 354 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12 355 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16 356 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10) 357 358 /* OEM Identifiers */ 359 #define MFG10_OEM_ID_INVALID (0x00000000) 360 #define MFG10_OEM_ID_DELL (0x00000001) 361 #define MFG10_OEM_ID_FSC (0x00000002) 362 #define MFG10_OEM_ID_SUN (0x00000003) 363 #define MFG10_OEM_ID_IBM (0x00000004) 364 365 /* GENERIC Flags 0*/ 366 #define MFG10_GF0_OCE_DISABLED (0x00000001) 367 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) 368 #define MFG10_GF0_R10_DISPLAY (0x00000004) 369 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) 370 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) 371 372 #define VIRTUAL_IO_FAILED_RETRY (0x32010081) 373 374 /* High IOPs definitions */ 375 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8 376 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8 377 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16 378 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128 379 #define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16 380 381 /* OEM Specific Flags will come from OEM specific header files */ 382 struct Mpi2ManufacturingPage10_t { 383 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 384 U8 OEMIdentifier; /* 04h */ 385 U8 Reserved1; /* 05h */ 386 U16 Reserved2; /* 08h */ 387 U32 Reserved3; /* 0Ch */ 388 U32 GenericFlags0; /* 10h */ 389 U32 GenericFlags1; /* 14h */ 390 U32 Reserved4; /* 18h */ 391 U32 OEMSpecificFlags0; /* 1Ch */ 392 U32 OEMSpecificFlags1; /* 20h */ 393 U32 Reserved5[18]; /* 24h - 60h*/ 394 }; 395 396 397 /* Miscellaneous options */ 398 struct Mpi2ManufacturingPage11_t { 399 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 400 __le32 Reserved1; /* 04h */ 401 u8 Reserved2; /* 08h */ 402 u8 EEDPTagMode; /* 09h */ 403 u8 Reserved3; /* 0Ah */ 404 u8 Reserved4; /* 0Bh */ 405 __le32 Reserved5[8]; /* 0Ch-2Ch */ 406 u16 AddlFlags2; /* 2Ch */ 407 u8 AddlFlags3; /* 2Eh */ 408 u8 Reserved6; /* 2Fh */ 409 __le32 Reserved7[7]; /* 30h - 4Bh */ 410 u8 NVMeAbortTO; /* 4Ch */ 411 u8 NumPerDevEvents; /* 4Dh */ 412 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */ 413 u8 HostTraceBufferFlags; /* 4Fh */ 414 u16 HostTraceBufferMaxSizeKB; /* 50h */ 415 u16 HostTraceBufferMinSizeKB; /* 52h */ 416 u8 CoreDumpTOSec; /* 54h */ 417 u8 TimeSyncInterval; /* 55h */ 418 u16 Reserved9; /* 56h */ 419 __le32 Reserved10; /* 58h */ 420 }; 421 422 /** 423 * struct MPT3SAS_TARGET - starget private hostdata 424 * @starget: starget object 425 * @sas_address: target sas address 426 * @raid_device: raid_device pointer to access volume data 427 * @handle: device handle 428 * @num_luns: number luns 429 * @flags: MPT_TARGET_FLAGS_XXX flags 430 * @deleted: target flaged for deletion 431 * @tm_busy: target is busy with TM request. 432 * @port: hba port entry containing target's port number info 433 * @sas_dev: The sas_device associated with this target 434 * @pcie_dev: The pcie device associated with this target 435 */ 436 struct MPT3SAS_TARGET { 437 struct scsi_target *starget; 438 u64 sas_address; 439 struct _raid_device *raid_device; 440 u16 handle; 441 int num_luns; 442 u32 flags; 443 u8 deleted; 444 u8 tm_busy; 445 struct hba_port *port; 446 struct _sas_device *sas_dev; 447 struct _pcie_device *pcie_dev; 448 }; 449 450 451 /* 452 * per device private data 453 */ 454 #define MPT_DEVICE_FLAGS_INIT 0x01 455 456 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003) 457 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00) 458 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01) 459 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02) 460 461 /** 462 * struct MPT3SAS_DEVICE - sdev private hostdata 463 * @sas_target: starget private hostdata 464 * @lun: lun number 465 * @flags: MPT_DEVICE_XXX flags 466 * @configured_lun: lun is configured 467 * @block: device is in SDEV_BLOCK state 468 * @tlr_snoop_check: flag used in determining whether to disable TLR 469 * @eedp_enable: eedp support enable bit 470 * @eedp_type: 0(type_1), 1(type_2), 2(type_3) 471 * @eedp_block_length: block size 472 * @ata_command_pending: SATL passthrough outstanding for device 473 */ 474 struct MPT3SAS_DEVICE { 475 struct MPT3SAS_TARGET *sas_target; 476 unsigned int lun; 477 u32 flags; 478 u8 configured_lun; 479 u8 block; 480 u8 tlr_snoop_check; 481 u8 ignore_delay_remove; 482 /* Iopriority Command Handling */ 483 u8 ncq_prio_enable; 484 /* 485 * Bug workaround for SATL handling: the mpt2/3sas firmware 486 * doesn't return BUSY or TASK_SET_FULL for subsequent 487 * commands while a SATL pass through is in operation as the 488 * spec requires, it simply does nothing with them until the 489 * pass through completes, causing them possibly to timeout if 490 * the passthrough is a long executing command (like format or 491 * secure erase). This variable allows us to do the right 492 * thing while a SATL command is pending. 493 */ 494 unsigned long ata_command_pending; 495 496 }; 497 498 #define MPT3_CMD_NOT_USED 0x8000 /* free */ 499 #define MPT3_CMD_COMPLETE 0x0001 /* completed */ 500 #define MPT3_CMD_PENDING 0x0002 /* pending */ 501 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */ 502 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */ 503 #define MPT3_CMD_COMPLETE_ASYNC 0x0010 /* tells whether cmd completes in same thread or not */ 504 505 /** 506 * struct _internal_cmd - internal commands struct 507 * @mutex: mutex 508 * @done: completion 509 * @reply: reply message pointer 510 * @sense: sense data 511 * @status: MPT3_CMD_XXX status 512 * @smid: system message id 513 */ 514 struct _internal_cmd { 515 struct mutex mutex; 516 struct completion done; 517 void *reply; 518 void *sense; 519 u16 status; 520 u16 smid; 521 }; 522 523 524 525 /** 526 * struct _sas_device - attached device information 527 * @list: sas device list 528 * @starget: starget object 529 * @sas_address: device sas address 530 * @device_name: retrieved from the SAS IDENTIFY frame. 531 * @handle: device handle 532 * @sas_address_parent: sas address of parent expander or sas host 533 * @enclosure_handle: enclosure handle 534 * @enclosure_logical_id: enclosure logical identifier 535 * @volume_handle: volume handle (valid when hidden raid member) 536 * @volume_wwid: volume unique identifier 537 * @device_info: bitfield provides detailed info about the device 538 * @id: target id 539 * @channel: target channel 540 * @slot: number number 541 * @phy: phy identifier provided in sas device page 0 542 * @responding: used in _scsih_sas_device_mark_responding 543 * @fast_path: fast path feature enable bit 544 * @pfa_led_on: flag for PFA LED status 545 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() 546 * addition routine. 547 * @chassis_slot: chassis slot 548 * @is_chassis_slot_valid: chassis slot valid or not 549 * @port: hba port entry containing device's port number info 550 * @rphy: device's sas_rphy address used to identify this device structure in 551 * target_alloc callback function 552 */ 553 struct _sas_device { 554 struct list_head list; 555 struct scsi_target *starget; 556 u64 sas_address; 557 u64 device_name; 558 u16 handle; 559 u64 sas_address_parent; 560 u16 enclosure_handle; 561 u64 enclosure_logical_id; 562 u16 volume_handle; 563 u64 volume_wwid; 564 u32 device_info; 565 int id; 566 int channel; 567 u16 slot; 568 u8 phy; 569 u8 responding; 570 u8 fast_path; 571 u8 pfa_led_on; 572 u8 pend_sas_rphy_add; 573 u8 enclosure_level; 574 u8 chassis_slot; 575 u8 is_chassis_slot_valid; 576 u8 connector_name[5]; 577 struct kref refcount; 578 struct hba_port *port; 579 struct sas_rphy *rphy; 580 }; 581 582 static inline void sas_device_get(struct _sas_device *s) 583 { 584 kref_get(&s->refcount); 585 } 586 587 static inline void sas_device_free(struct kref *r) 588 { 589 kfree(container_of(r, struct _sas_device, refcount)); 590 } 591 592 static inline void sas_device_put(struct _sas_device *s) 593 { 594 kref_put(&s->refcount, sas_device_free); 595 } 596 597 /* 598 * struct _pcie_device - attached PCIe device information 599 * @list: pcie device list 600 * @starget: starget object 601 * @wwid: device WWID 602 * @handle: device handle 603 * @device_info: bitfield provides detailed info about the device 604 * @id: target id 605 * @channel: target channel 606 * @slot: slot number 607 * @port_num: port number 608 * @responding: used in _scsih_pcie_device_mark_responding 609 * @fast_path: fast path feature enable bit 610 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for 611 * NVMe device only 612 * @enclosure_handle: enclosure handle 613 * @enclosure_logical_id: enclosure logical identifier 614 * @enclosure_level: The level of device's enclosure from the controller 615 * @connector_name: ASCII value of the Connector's name 616 * @serial_number: pointer of serial number string allocated runtime 617 * @access_status: Device's Access Status 618 * @shutdown_latency: NVMe device's RTD3 Entry Latency 619 * @refcount: reference count for deletion 620 */ 621 struct _pcie_device { 622 struct list_head list; 623 struct scsi_target *starget; 624 u64 wwid; 625 u16 handle; 626 u32 device_info; 627 int id; 628 int channel; 629 u16 slot; 630 u8 port_num; 631 u8 responding; 632 u8 fast_path; 633 u32 nvme_mdts; 634 u16 enclosure_handle; 635 u64 enclosure_logical_id; 636 u8 enclosure_level; 637 u8 connector_name[4]; 638 u8 *serial_number; 639 u8 reset_timeout; 640 u8 access_status; 641 u16 shutdown_latency; 642 struct kref refcount; 643 }; 644 /** 645 * pcie_device_get - Increment the pcie device reference count 646 * 647 * @p: pcie_device object 648 * 649 * When ever this function called it will increment the 650 * reference count of the pcie device for which this function called. 651 * 652 */ 653 static inline void pcie_device_get(struct _pcie_device *p) 654 { 655 kref_get(&p->refcount); 656 } 657 658 /** 659 * pcie_device_free - Release the pcie device object 660 * @r - kref object 661 * 662 * Free's the pcie device object. It will be called when reference count 663 * reaches to zero. 664 */ 665 static inline void pcie_device_free(struct kref *r) 666 { 667 kfree(container_of(r, struct _pcie_device, refcount)); 668 } 669 670 /** 671 * pcie_device_put - Decrement the pcie device reference count 672 * 673 * @p: pcie_device object 674 * 675 * When ever this function called it will decrement the 676 * reference count of the pcie device for which this function called. 677 * 678 * When refernce count reaches to Zero, this will call pcie_device_free to the 679 * pcie_device object. 680 */ 681 static inline void pcie_device_put(struct _pcie_device *p) 682 { 683 kref_put(&p->refcount, pcie_device_free); 684 } 685 /** 686 * struct _raid_device - raid volume link list 687 * @list: sas device list 688 * @starget: starget object 689 * @sdev: scsi device struct (volumes are single lun) 690 * @wwid: unique identifier for the volume 691 * @handle: device handle 692 * @block_size: Block size of the volume 693 * @id: target id 694 * @channel: target channel 695 * @volume_type: the raid level 696 * @device_info: bitfield provides detailed info about the hidden components 697 * @num_pds: number of hidden raid components 698 * @responding: used in _scsih_raid_device_mark_responding 699 * @percent_complete: resync percent complete 700 * @direct_io_enabled: Whether direct io to PDs are allowed or not 701 * @stripe_exponent: X where 2powX is the stripe sz in blocks 702 * @block_exponent: X where 2powX is the block sz in bytes 703 * @max_lba: Maximum number of LBA in the volume 704 * @stripe_sz: Stripe Size of the volume 705 * @device_info: Device info of the volume member disk 706 * @pd_handle: Array of handles of the physical drives for direct I/O in le16 707 */ 708 #define MPT_MAX_WARPDRIVE_PDS 8 709 struct _raid_device { 710 struct list_head list; 711 struct scsi_target *starget; 712 struct scsi_device *sdev; 713 u64 wwid; 714 u16 handle; 715 u16 block_sz; 716 int id; 717 int channel; 718 u8 volume_type; 719 u8 num_pds; 720 u8 responding; 721 u8 percent_complete; 722 u8 direct_io_enabled; 723 u8 stripe_exponent; 724 u8 block_exponent; 725 u64 max_lba; 726 u32 stripe_sz; 727 u32 device_info; 728 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS]; 729 }; 730 731 /** 732 * struct _boot_device - boot device info 733 * 734 * @channel: sas, raid, or pcie channel 735 * @device: holds pointer for struct _sas_device, struct _raid_device or 736 * struct _pcie_device 737 */ 738 struct _boot_device { 739 int channel; 740 void *device; 741 }; 742 743 /** 744 * struct _sas_port - wide/narrow sas port information 745 * @port_list: list of ports belonging to expander 746 * @num_phys: number of phys belonging to this port 747 * @remote_identify: attached device identification 748 * @rphy: sas transport rphy object 749 * @port: sas transport wide/narrow port object 750 * @hba_port: hba port entry containing port's port number info 751 * @phy_list: _sas_phy list objects belonging to this port 752 */ 753 struct _sas_port { 754 struct list_head port_list; 755 u8 num_phys; 756 struct sas_identify remote_identify; 757 struct sas_rphy *rphy; 758 struct sas_port *port; 759 struct hba_port *hba_port; 760 struct list_head phy_list; 761 }; 762 763 /** 764 * struct _sas_phy - phy information 765 * @port_siblings: list of phys belonging to a port 766 * @identify: phy identification 767 * @remote_identify: attached device identification 768 * @phy: sas transport phy object 769 * @phy_id: unique phy id 770 * @handle: device handle for this phy 771 * @attached_handle: device handle for attached device 772 * @phy_belongs_to_port: port has been created for this phy 773 * @port: hba port entry containing port number info 774 */ 775 struct _sas_phy { 776 struct list_head port_siblings; 777 struct sas_identify identify; 778 struct sas_identify remote_identify; 779 struct sas_phy *phy; 780 u8 phy_id; 781 u16 handle; 782 u16 attached_handle; 783 u8 phy_belongs_to_port; 784 u8 hba_vphy; 785 struct hba_port *port; 786 }; 787 788 /** 789 * struct _sas_node - sas_host/expander information 790 * @list: list of expanders 791 * @parent_dev: parent device class 792 * @num_phys: number phys belonging to this sas_host/expander 793 * @sas_address: sas address of this sas_host/expander 794 * @handle: handle for this sas_host/expander 795 * @sas_address_parent: sas address of parent expander or sas host 796 * @enclosure_handle: handle for this a member of an enclosure 797 * @device_info: bitwise defining capabilities of this sas_host/expander 798 * @responding: used in _scsih_expander_device_mark_responding 799 * @phy: a list of phys that make up this sas_host/expander 800 * @sas_port_list: list of ports attached to this sas_host/expander 801 * @port: hba port entry containing node's port number info 802 * @rphy: sas_rphy object of this expander 803 */ 804 struct _sas_node { 805 struct list_head list; 806 struct device *parent_dev; 807 u8 num_phys; 808 u64 sas_address; 809 u16 handle; 810 u64 sas_address_parent; 811 u16 enclosure_handle; 812 u64 enclosure_logical_id; 813 u8 responding; 814 struct hba_port *port; 815 struct _sas_phy *phy; 816 struct list_head sas_port_list; 817 struct sas_rphy *rphy; 818 }; 819 820 /** 821 * struct _enclosure_node - enclosure information 822 * @list: list of enclosures 823 * @pg0: enclosure pg0; 824 */ 825 struct _enclosure_node { 826 struct list_head list; 827 Mpi2SasEnclosurePage0_t pg0; 828 }; 829 830 /** 831 * enum reset_type - reset state 832 * @FORCE_BIG_HAMMER: issue diagnostic reset 833 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer 834 */ 835 enum reset_type { 836 FORCE_BIG_HAMMER, 837 SOFT_RESET, 838 }; 839 840 /** 841 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) 842 * @pcie_sgl: PCIe native SGL for NVMe devices 843 * @pcie_sgl_dma: physical address 844 */ 845 struct pcie_sg_list { 846 void *pcie_sgl; 847 dma_addr_t pcie_sgl_dma; 848 }; 849 850 /** 851 * struct chain_tracker - firmware chain tracker 852 * @chain_buffer: chain buffer 853 * @chain_buffer_dma: physical address 854 * @tracker_list: list of free request (ioc->free_chain_list) 855 */ 856 struct chain_tracker { 857 void *chain_buffer; 858 dma_addr_t chain_buffer_dma; 859 }; 860 861 struct chain_lookup { 862 struct chain_tracker *chains_per_smid; 863 atomic_t chain_offset; 864 }; 865 866 /** 867 * struct scsiio_tracker - scsi mf request tracker 868 * @smid: system message id 869 * @cb_idx: callback index 870 * @direct_io: To indicate whether I/O is direct (WARPDRIVE) 871 * @chain_list: list of associated firmware chain tracker 872 * @msix_io: IO's msix 873 */ 874 struct scsiio_tracker { 875 u16 smid; 876 struct scsi_cmnd *scmd; 877 u8 cb_idx; 878 u8 direct_io; 879 struct pcie_sg_list pcie_sg_list; 880 struct list_head chain_list; 881 u16 msix_io; 882 }; 883 884 /** 885 * struct request_tracker - firmware request tracker 886 * @smid: system message id 887 * @cb_idx: callback index 888 * @tracker_list: list of free request (ioc->free_list) 889 */ 890 struct request_tracker { 891 u16 smid; 892 u8 cb_idx; 893 struct list_head tracker_list; 894 }; 895 896 /** 897 * struct _tr_list - target reset list 898 * @handle: device handle 899 * @state: state machine 900 */ 901 struct _tr_list { 902 struct list_head list; 903 u16 handle; 904 u16 state; 905 }; 906 907 /** 908 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list 909 * @handle: device handle 910 */ 911 struct _sc_list { 912 struct list_head list; 913 u16 handle; 914 }; 915 916 /** 917 * struct _event_ack_list - delayed event acknowledgment list 918 * @Event: Event ID 919 * @EventContext: used to track the event uniquely 920 */ 921 struct _event_ack_list { 922 struct list_head list; 923 U16 Event; 924 U32 EventContext; 925 }; 926 927 /** 928 * struct adapter_reply_queue - the reply queue struct 929 * @ioc: per adapter object 930 * @msix_index: msix index into vector table 931 * @vector: irq vector 932 * @reply_post_host_index: head index in the pool where FW completes IO 933 * @reply_post_free: reply post base virt address 934 * @name: the name registered to request_irq() 935 * @busy: isr is actively processing replies on another cpu 936 * @os_irq: irq number 937 * @irqpoll: irq_poll object 938 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not 939 * @list: this list 940 */ 941 struct adapter_reply_queue { 942 struct MPT3SAS_ADAPTER *ioc; 943 u8 msix_index; 944 u32 reply_post_host_index; 945 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 946 char name[MPT_NAME_LENGTH]; 947 atomic_t busy; 948 u32 os_irq; 949 struct irq_poll irqpoll; 950 bool irq_poll_scheduled; 951 bool irq_line_enable; 952 struct list_head list; 953 }; 954 955 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr); 956 957 /* SAS3.0 support */ 958 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc, 959 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device); 960 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge, 961 dma_addr_t data_out_dma, size_t data_out_sz, 962 dma_addr_t data_in_dma, size_t data_in_sz); 963 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc, 964 void *paddr); 965 966 /* SAS3.5 support */ 967 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid, 968 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, 969 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma, 970 size_t data_in_sz); 971 972 /* To support atomic and non atomic descriptors*/ 973 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid, 974 u16 funcdep); 975 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid); 976 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr); 977 /* 978 * To get high iops reply queue's msix index when high iops mode is enabled 979 * else get the msix index of general reply queues. 980 */ 981 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc, 982 struct scsi_cmnd *scmd); 983 984 /* IOC Facts and Port Facts converted from little endian to cpu */ 985 union mpi3_version_union { 986 MPI2_VERSION_STRUCT Struct; 987 u32 Word; 988 }; 989 990 struct mpt3sas_facts { 991 u16 MsgVersion; 992 u16 HeaderVersion; 993 u8 IOCNumber; 994 u8 VP_ID; 995 u8 VF_ID; 996 u16 IOCExceptions; 997 u16 IOCStatus; 998 u32 IOCLogInfo; 999 u8 MaxChainDepth; 1000 u8 WhoInit; 1001 u8 NumberOfPorts; 1002 u8 MaxMSIxVectors; 1003 u16 RequestCredit; 1004 u16 ProductID; 1005 u32 IOCCapabilities; 1006 union mpi3_version_union FWVersion; 1007 u16 IOCRequestFrameSize; 1008 u16 IOCMaxChainSegmentSize; 1009 u16 MaxInitiators; 1010 u16 MaxTargets; 1011 u16 MaxSasExpanders; 1012 u16 MaxEnclosures; 1013 u16 ProtocolFlags; 1014 u16 HighPriorityCredit; 1015 u16 MaxReplyDescriptorPostQueueDepth; 1016 u8 ReplyFrameSize; 1017 u8 MaxVolumes; 1018 u16 MaxDevHandle; 1019 u16 MaxPersistentEntries; 1020 u16 MinDevHandle; 1021 u8 CurrentHostPageSize; 1022 }; 1023 1024 struct mpt3sas_port_facts { 1025 u8 PortNumber; 1026 u8 VP_ID; 1027 u8 VF_ID; 1028 u8 PortType; 1029 u16 MaxPostedCmdBuffers; 1030 }; 1031 1032 struct reply_post_struct { 1033 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 1034 dma_addr_t reply_post_free_dma; 1035 }; 1036 1037 /** 1038 * struct virtual_phy - vSES phy structure 1039 * sas_address: SAS Address of vSES device 1040 * phy_mask: vSES device's phy number 1041 * flags: flags used to manage this structure 1042 */ 1043 struct virtual_phy { 1044 struct list_head list; 1045 u64 sas_address; 1046 u32 phy_mask; 1047 u8 flags; 1048 }; 1049 1050 #define MPT_VPHY_FLAG_DIRTY_PHY 0x01 1051 1052 /** 1053 * struct hba_port - Saves each HBA's Wide/Narrow port info 1054 * @sas_address: sas address of this wide/narrow port's attached device 1055 * @phy_mask: HBA PHY's belonging to this port 1056 * @port_id: port number 1057 * @flags: hba port flags 1058 * @vphys_mask : mask of vSES devices Phy number 1059 * @vphys_list : list containing vSES device structures 1060 */ 1061 struct hba_port { 1062 struct list_head list; 1063 u64 sas_address; 1064 u32 phy_mask; 1065 u8 port_id; 1066 u8 flags; 1067 u32 vphys_mask; 1068 struct list_head vphys_list; 1069 }; 1070 1071 /* hba port flags */ 1072 #define HBA_PORT_FLAG_DIRTY_PORT 0x01 1073 #define HBA_PORT_FLAG_NEW_PORT 0x02 1074 1075 #define MULTIPATH_DISABLED_PORT_ID 0xFF 1076 1077 /** 1078 * struct htb_rel_query - diagnostic buffer release reason 1079 * @unique_id - unique id associated with this buffer. 1080 * @buffer_rel_condition - Release condition ioctl/sysfs/reset 1081 * @reserved 1082 * @trigger_type - Master/Event/scsi/MPI 1083 * @trigger_info_dwords - Data Correspondig to trigger type 1084 */ 1085 struct htb_rel_query { 1086 u16 buffer_rel_condition; 1087 u16 reserved; 1088 u32 trigger_type; 1089 u32 trigger_info_dwords[2]; 1090 }; 1091 1092 /* Buffer_rel_condition bit fields */ 1093 1094 /* Bit 0 - Diag Buffer not Released */ 1095 #define MPT3_DIAG_BUFFER_NOT_RELEASED (0x00) 1096 /* Bit 0 - Diag Buffer Released */ 1097 #define MPT3_DIAG_BUFFER_RELEASED (0x01) 1098 1099 /* 1100 * Bit 1 - Diag Buffer Released by IOCTL, 1101 * This bit is valid only if Bit 0 is one 1102 */ 1103 #define MPT3_DIAG_BUFFER_REL_IOCTL (0x02 | MPT3_DIAG_BUFFER_RELEASED) 1104 1105 /* 1106 * Bit 2 - Diag Buffer Released by Trigger, 1107 * This bit is valid only if Bit 0 is one 1108 */ 1109 #define MPT3_DIAG_BUFFER_REL_TRIGGER (0x04 | MPT3_DIAG_BUFFER_RELEASED) 1110 1111 /* 1112 * Bit 3 - Diag Buffer Released by SysFs, 1113 * This bit is valid only if Bit 0 is one 1114 */ 1115 #define MPT3_DIAG_BUFFER_REL_SYSFS (0x08 | MPT3_DIAG_BUFFER_RELEASED) 1116 1117 /* DIAG RESET Master trigger flags */ 1118 #define MPT_DIAG_RESET_ISSUED_BY_DRIVER 0x00000000 1119 #define MPT_DIAG_RESET_ISSUED_BY_USER 0x00000001 1120 1121 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); 1122 /** 1123 * struct MPT3SAS_ADAPTER - per adapter struct 1124 * @list: ioc_list 1125 * @shost: shost object 1126 * @id: unique adapter id 1127 * @cpu_count: number online cpus 1128 * @name: generic ioc string 1129 * @tmp_string: tmp string used for logging 1130 * @pdev: pci pdev object 1131 * @pio_chip: physical io register space 1132 * @chip: memory mapped register space 1133 * @chip_phys: physical addrss prior to mapping 1134 * @logging_level: see mpt3sas_debug.h 1135 * @fwfault_debug: debuging FW timeouts 1136 * @ir_firmware: IR firmware present 1137 * @bars: bitmask of BAR's that must be configured 1138 * @mask_interrupts: ignore interrupt 1139 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and 1140 * pci resource handling 1141 * @fault_reset_work_q_name: fw fault work queue 1142 * @fault_reset_work_q: "" 1143 * @fault_reset_work: "" 1144 * @firmware_event_name: fw event work queue 1145 * @firmware_event_thread: "" 1146 * @fw_event_lock: 1147 * @fw_event_list: list of fw events 1148 * @current_evet: current processing firmware event 1149 * @fw_event_cleanup: set to one while cleaning up the fw events 1150 * @aen_event_read_flag: event log was read 1151 * @broadcast_aen_busy: broadcast aen waiting to be serviced 1152 * @shost_recovery: host reset in progress 1153 * @ioc_reset_in_progress_lock: 1154 * @ioc_link_reset_in_progress: phy/hard reset in progress 1155 * @ignore_loginfos: ignore loginfos during task management 1156 * @remove_host: flag for when driver unloads, to avoid sending dev resets 1157 * @pci_error_recovery: flag to prevent ioc access until slot reset completes 1158 * @wait_for_discovery_to_complete: flag set at driver load time when 1159 * waiting on reporting devices 1160 * @is_driver_loading: flag set at driver load time 1161 * @port_enable_failed: flag set when port enable has failed 1162 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work 1163 * @start_scan_failed: means port enable failed, return's the ioc_status 1164 * @msix_enable: flag indicating msix is enabled 1165 * @msix_vector_count: number msix vectors 1166 * @cpu_msix_table: table for mapping cpus to msix index 1167 * @cpu_msix_table_sz: table size 1168 * @total_io_cnt: Gives total IO count, used to load balance the interrupts 1169 * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state 1170 * @timestamp_update_count: Counter to fire timeSync command 1171 * time_sync_interval: Time sync interval read from man page 11 1172 * @high_iops_outstanding: used to load balance the interrupts 1173 * within high iops reply queues 1174 * @msix_load_balance: Enables load balancing of interrupts across 1175 * the multiple MSIXs 1176 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands 1177 * @thresh_hold: Max number of reply descriptors processed 1178 * before updating Host Index 1179 * @drv_internal_flags: Bit map internal to driver 1180 * @drv_support_bitmap: driver's supported feature bit map 1181 * @use_32bit_dma: Flag to use 32 bit consistent dma mask 1182 * @scsi_io_cb_idx: shost generated commands 1183 * @tm_cb_idx: task management commands 1184 * @scsih_cb_idx: scsih internal commands 1185 * @transport_cb_idx: transport internal commands 1186 * @ctl_cb_idx: clt internal commands 1187 * @base_cb_idx: base internal commands 1188 * @config_cb_idx: base internal commands 1189 * @tm_tr_cb_idx : device removal target reset handshake 1190 * @tm_tr_volume_cb_idx : volume removal target reset 1191 * @base_cmds: 1192 * @transport_cmds: 1193 * @scsih_cmds: 1194 * @tm_cmds: 1195 * @ctl_cmds: 1196 * @config_cmds: 1197 * @base_add_sg_single: handler for either 32/64 bit sgl's 1198 * @event_type: bits indicating which events to log 1199 * @event_context: unique id for each logged event 1200 * @event_log: event log pointer 1201 * @event_masks: events that are masked 1202 * @max_shutdown_latency: timeout value for NVMe shutdown operation, 1203 * which is equal that NVMe drive's RTD3 Entry Latency 1204 * which has reported maximum RTD3 Entry Latency value 1205 * among attached NVMe drives. 1206 * @facts: static facts data 1207 * @prev_fw_facts: previous fw facts data 1208 * @pfacts: static port facts data 1209 * @manu_pg0: static manufacturing page 0 1210 * @manu_pg10: static manufacturing page 10 1211 * @manu_pg11: static manufacturing page 11 1212 * @bios_pg2: static bios page 2 1213 * @bios_pg3: static bios page 3 1214 * @ioc_pg8: static ioc page 8 1215 * @iounit_pg0: static iounit page 0 1216 * @iounit_pg1: static iounit page 1 1217 * @iounit_pg8: static iounit page 8 1218 * @sas_hba: sas host object 1219 * @sas_expander_list: expander object list 1220 * @enclosure_list: enclosure object list 1221 * @sas_node_lock: 1222 * @sas_device_list: sas device object list 1223 * @sas_device_init_list: sas device object list (used only at init time) 1224 * @sas_device_lock: 1225 * @pcie_device_list: pcie device object list 1226 * @pcie_device_init_list: pcie device object list (used only at init time) 1227 * @pcie_device_lock: 1228 * @io_missing_delay: time for IO completed by fw when PDR enabled 1229 * @device_missing_delay: time for device missing by fw when PDR enabled 1230 * @sas_id : used for setting volume target IDs 1231 * @pcie_target_id: used for setting pcie target IDs 1232 * @blocking_handles: bitmask used to identify which devices need blocking 1233 * @pd_handles : bitmask for PD handles 1234 * @pd_handles_sz : size of pd_handle bitmask 1235 * @config_page_sz: config page size 1236 * @config_page: reserve memory for config page payload 1237 * @config_page_dma: 1238 * @hba_queue_depth: hba request queue depth 1239 * @sge_size: sg element size for either 32/64 bit 1240 * @scsiio_depth: SCSI_IO queue depth 1241 * @request_sz: per request frame size 1242 * @request: pool of request frames 1243 * @request_dma: 1244 * @request_dma_sz: 1245 * @scsi_lookup: firmware request tracker list 1246 * @scsi_lookup_lock: 1247 * @free_list: free list of request 1248 * @pending_io_count: 1249 * @reset_wq: 1250 * @chain: pool of chains 1251 * @chain_dma: 1252 * @max_sges_in_main_message: number sg elements in main message 1253 * @max_sges_in_chain_message: number sg elements per chain 1254 * @chains_needed_per_io: max chains per io 1255 * @chain_depth: total chains allocated 1256 * @chain_segment_sz: gives the max number of 1257 * SGEs accommodate on single chain buffer 1258 * @hi_priority_smid: 1259 * @hi_priority: 1260 * @hi_priority_dma: 1261 * @hi_priority_depth: 1262 * @hpr_lookup: 1263 * @hpr_free_list: 1264 * @internal_smid: 1265 * @internal: 1266 * @internal_dma: 1267 * @internal_depth: 1268 * @internal_lookup: 1269 * @internal_free_list: 1270 * @sense: pool of sense 1271 * @sense_dma: 1272 * @sense_dma_pool: 1273 * @reply_depth: hba reply queue depth: 1274 * @reply_sz: per reply frame size: 1275 * @reply: pool of replys: 1276 * @reply_dma: 1277 * @reply_dma_pool: 1278 * @reply_free_queue_depth: reply free depth 1279 * @reply_free: pool for reply free queue (32 bit addr) 1280 * @reply_free_dma: 1281 * @reply_free_dma_pool: 1282 * @reply_free_host_index: tail index in pool to insert free replys 1283 * @reply_post_queue_depth: reply post queue depth 1284 * @reply_post_struct: struct for reply_post_free physical & virt address 1285 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init 1286 * @rdpq_array_enable: rdpq_array support is enabled in the driver 1287 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag 1288 * is assigned only ones 1289 * @reply_queue_count: number of reply queue's 1290 * @reply_queue_list: link list contaning the reply queue info 1291 * @msix96_vector: 96 MSI-X vector support 1292 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue 1293 * @delayed_tr_list: target reset link list 1294 * @delayed_tr_volume_list: volume target reset link list 1295 * @delayed_sc_list: 1296 * @delayed_event_ack_list: 1297 * @temp_sensors_count: flag to carry the number of temperature sensors 1298 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and 1299 * pci resource handling. PCI resource freeing will lead to free 1300 * vital hardware/memory resource, which might be in use by cli/sysfs 1301 * path functions resulting in Null pointer reference followed by kernel 1302 * crash. To avoid the above race condition we use mutex syncrhonization 1303 * which ensures the syncrhonization between cli/sysfs_show path. 1304 * @atomic_desc_capable: Atomic Request Descriptor support. 1305 * @GET_MSIX_INDEX: Get the msix index of high iops queues. 1306 * @multipath_on_hba: flag to determine multipath on hba is enabled or not 1307 * @port_table_list: list containing HBA's wide/narrow port's info 1308 */ 1309 struct MPT3SAS_ADAPTER { 1310 struct list_head list; 1311 struct Scsi_Host *shost; 1312 u8 id; 1313 int cpu_count; 1314 char name[MPT_NAME_LENGTH]; 1315 char driver_name[MPT_NAME_LENGTH - 8]; 1316 char tmp_string[MPT_STRING_LENGTH]; 1317 struct pci_dev *pdev; 1318 Mpi2SystemInterfaceRegs_t __iomem *chip; 1319 phys_addr_t chip_phys; 1320 int logging_level; 1321 int fwfault_debug; 1322 u8 ir_firmware; 1323 int bars; 1324 u8 mask_interrupts; 1325 1326 /* fw fault handler */ 1327 char fault_reset_work_q_name[20]; 1328 struct workqueue_struct *fault_reset_work_q; 1329 struct delayed_work fault_reset_work; 1330 1331 /* fw event handler */ 1332 char firmware_event_name[20]; 1333 struct workqueue_struct *firmware_event_thread; 1334 spinlock_t fw_event_lock; 1335 struct list_head fw_event_list; 1336 struct fw_event_work *current_event; 1337 u8 fw_events_cleanup; 1338 1339 /* misc flags */ 1340 int aen_event_read_flag; 1341 u8 broadcast_aen_busy; 1342 u16 broadcast_aen_pending; 1343 u8 shost_recovery; 1344 u8 got_task_abort_from_ioctl; 1345 1346 struct mutex reset_in_progress_mutex; 1347 spinlock_t ioc_reset_in_progress_lock; 1348 u8 ioc_link_reset_in_progress; 1349 1350 u8 ignore_loginfos; 1351 u8 remove_host; 1352 u8 pci_error_recovery; 1353 u8 wait_for_discovery_to_complete; 1354 u8 is_driver_loading; 1355 u8 port_enable_failed; 1356 u8 start_scan; 1357 u16 start_scan_failed; 1358 1359 u8 msix_enable; 1360 u16 msix_vector_count; 1361 u8 *cpu_msix_table; 1362 u16 cpu_msix_table_sz; 1363 resource_size_t __iomem **reply_post_host_index; 1364 u32 ioc_reset_count; 1365 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; 1366 u32 non_operational_loop; 1367 u8 ioc_coredump_loop; 1368 u32 timestamp_update_count; 1369 u32 time_sync_interval; 1370 atomic64_t total_io_cnt; 1371 atomic64_t high_iops_outstanding; 1372 bool msix_load_balance; 1373 u16 thresh_hold; 1374 u8 high_iops_queues; 1375 u32 drv_internal_flags; 1376 u32 drv_support_bitmap; 1377 u32 dma_mask; 1378 bool enable_sdev_max_qd; 1379 bool use_32bit_dma; 1380 1381 /* internal commands, callback index */ 1382 u8 scsi_io_cb_idx; 1383 u8 tm_cb_idx; 1384 u8 transport_cb_idx; 1385 u8 scsih_cb_idx; 1386 u8 ctl_cb_idx; 1387 u8 base_cb_idx; 1388 u8 port_enable_cb_idx; 1389 u8 config_cb_idx; 1390 u8 tm_tr_cb_idx; 1391 u8 tm_tr_volume_cb_idx; 1392 u8 tm_sas_control_cb_idx; 1393 struct _internal_cmd base_cmds; 1394 struct _internal_cmd port_enable_cmds; 1395 struct _internal_cmd transport_cmds; 1396 struct _internal_cmd scsih_cmds; 1397 struct _internal_cmd tm_cmds; 1398 struct _internal_cmd ctl_cmds; 1399 struct _internal_cmd config_cmds; 1400 1401 MPT_ADD_SGE base_add_sg_single; 1402 1403 /* function ptr for either IEEE or MPI sg elements */ 1404 MPT_BUILD_SG_SCMD build_sg_scmd; 1405 MPT_BUILD_SG build_sg; 1406 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge; 1407 u16 sge_size_ieee; 1408 u16 hba_mpi_version_belonged; 1409 1410 /* function ptr for MPI sg elements only */ 1411 MPT_BUILD_SG build_sg_mpi; 1412 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi; 1413 1414 /* function ptr for NVMe PRP elements only */ 1415 NVME_BUILD_PRP build_nvme_prp; 1416 1417 /* event log */ 1418 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1419 u32 event_context; 1420 void *event_log; 1421 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1422 1423 u8 tm_custom_handling; 1424 u8 nvme_abort_timeout; 1425 u16 max_shutdown_latency; 1426 1427 /* static config pages */ 1428 struct mpt3sas_facts facts; 1429 struct mpt3sas_facts prev_fw_facts; 1430 struct mpt3sas_port_facts *pfacts; 1431 Mpi2ManufacturingPage0_t manu_pg0; 1432 struct Mpi2ManufacturingPage10_t manu_pg10; 1433 struct Mpi2ManufacturingPage11_t manu_pg11; 1434 Mpi2BiosPage2_t bios_pg2; 1435 Mpi2BiosPage3_t bios_pg3; 1436 Mpi2IOCPage8_t ioc_pg8; 1437 Mpi2IOUnitPage0_t iounit_pg0; 1438 Mpi2IOUnitPage1_t iounit_pg1; 1439 Mpi2IOUnitPage8_t iounit_pg8; 1440 Mpi2IOCPage1_t ioc_pg1_copy; 1441 1442 struct _boot_device req_boot_device; 1443 struct _boot_device req_alt_boot_device; 1444 struct _boot_device current_boot_device; 1445 1446 /* sas hba, expander, and device list */ 1447 struct _sas_node sas_hba; 1448 struct list_head sas_expander_list; 1449 struct list_head enclosure_list; 1450 spinlock_t sas_node_lock; 1451 struct list_head sas_device_list; 1452 struct list_head sas_device_init_list; 1453 spinlock_t sas_device_lock; 1454 struct list_head pcie_device_list; 1455 struct list_head pcie_device_init_list; 1456 spinlock_t pcie_device_lock; 1457 1458 struct list_head raid_device_list; 1459 spinlock_t raid_device_lock; 1460 u8 io_missing_delay; 1461 u16 device_missing_delay; 1462 int sas_id; 1463 int pcie_target_id; 1464 1465 void *blocking_handles; 1466 void *pd_handles; 1467 u16 pd_handles_sz; 1468 1469 void *pend_os_device_add; 1470 u16 pend_os_device_add_sz; 1471 1472 /* config page */ 1473 u16 config_page_sz; 1474 void *config_page; 1475 dma_addr_t config_page_dma; 1476 void *config_vaddr; 1477 1478 /* scsiio request */ 1479 u16 hba_queue_depth; 1480 u16 sge_size; 1481 u16 scsiio_depth; 1482 u16 request_sz; 1483 u8 *request; 1484 dma_addr_t request_dma; 1485 u32 request_dma_sz; 1486 struct pcie_sg_list *pcie_sg_lookup; 1487 spinlock_t scsi_lookup_lock; 1488 int pending_io_count; 1489 wait_queue_head_t reset_wq; 1490 u16 *io_queue_num; 1491 1492 /* PCIe SGL */ 1493 struct dma_pool *pcie_sgl_dma_pool; 1494 /* Host Page Size */ 1495 u32 page_size; 1496 1497 /* chain */ 1498 struct chain_lookup *chain_lookup; 1499 struct list_head free_chain_list; 1500 struct dma_pool *chain_dma_pool; 1501 ulong chain_pages; 1502 u16 max_sges_in_main_message; 1503 u16 max_sges_in_chain_message; 1504 u16 chains_needed_per_io; 1505 u32 chain_depth; 1506 u16 chain_segment_sz; 1507 u16 chains_per_prp_buffer; 1508 1509 /* hi-priority queue */ 1510 u16 hi_priority_smid; 1511 u8 *hi_priority; 1512 dma_addr_t hi_priority_dma; 1513 u16 hi_priority_depth; 1514 struct request_tracker *hpr_lookup; 1515 struct list_head hpr_free_list; 1516 1517 /* internal queue */ 1518 u16 internal_smid; 1519 u8 *internal; 1520 dma_addr_t internal_dma; 1521 u16 internal_depth; 1522 struct request_tracker *internal_lookup; 1523 struct list_head internal_free_list; 1524 1525 /* sense */ 1526 u8 *sense; 1527 dma_addr_t sense_dma; 1528 struct dma_pool *sense_dma_pool; 1529 1530 /* reply */ 1531 u16 reply_sz; 1532 u8 *reply; 1533 dma_addr_t reply_dma; 1534 u32 reply_dma_max_address; 1535 u32 reply_dma_min_address; 1536 struct dma_pool *reply_dma_pool; 1537 1538 /* reply free queue */ 1539 u16 reply_free_queue_depth; 1540 __le32 *reply_free; 1541 dma_addr_t reply_free_dma; 1542 struct dma_pool *reply_free_dma_pool; 1543 u32 reply_free_host_index; 1544 1545 /* reply post queue */ 1546 u16 reply_post_queue_depth; 1547 struct reply_post_struct *reply_post; 1548 u8 rdpq_array_capable; 1549 u8 rdpq_array_enable; 1550 u8 rdpq_array_enable_assigned; 1551 struct dma_pool *reply_post_free_dma_pool; 1552 struct dma_pool *reply_post_free_array_dma_pool; 1553 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array; 1554 dma_addr_t reply_post_free_array_dma; 1555 u8 reply_queue_count; 1556 struct list_head reply_queue_list; 1557 1558 u8 combined_reply_queue; 1559 u8 combined_reply_index_count; 1560 u8 smp_affinity_enable; 1561 /* reply post register index */ 1562 resource_size_t **replyPostRegisterIndex; 1563 1564 struct list_head delayed_tr_list; 1565 struct list_head delayed_tr_volume_list; 1566 struct list_head delayed_sc_list; 1567 struct list_head delayed_event_ack_list; 1568 u8 temp_sensors_count; 1569 struct mutex pci_access_mutex; 1570 1571 /* diag buffer support */ 1572 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT]; 1573 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT]; 1574 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; 1575 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; 1576 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; 1577 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; 1578 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; 1579 u32 ring_buffer_offset; 1580 u32 ring_buffer_sz; 1581 struct htb_rel_query htb_rel; 1582 u8 reset_from_user; 1583 u8 is_warpdrive; 1584 u8 is_mcpu_endpoint; 1585 u8 hide_ir_msg; 1586 u8 mfg_pg10_hide_flag; 1587 u8 hide_drives; 1588 spinlock_t diag_trigger_lock; 1589 u8 diag_trigger_active; 1590 u8 atomic_desc_capable; 1591 BASE_READ_REG base_readl; 1592 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master; 1593 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event; 1594 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi; 1595 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi; 1596 u8 supports_trigger_pages; 1597 void *device_remove_in_progress; 1598 u16 device_remove_in_progress_sz; 1599 u8 is_gen35_ioc; 1600 u8 is_aero_ioc; 1601 struct dentry *debugfs_root; 1602 struct dentry *ioc_dump; 1603 PUT_SMID_IO_FP_HIP put_smid_scsi_io; 1604 PUT_SMID_IO_FP_HIP put_smid_fast_path; 1605 PUT_SMID_IO_FP_HIP put_smid_hi_priority; 1606 PUT_SMID_DEFAULT put_smid_default; 1607 GET_MSIX_INDEX get_msix_index_for_smlio; 1608 1609 u8 multipath_on_hba; 1610 struct list_head port_table_list; 1611 }; 1612 1613 struct mpt3sas_debugfs_buffer { 1614 void *buf; 1615 u32 len; 1616 }; 1617 1618 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001 1619 #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY 0x00000002 1620 1621 #define MPT_DRV_INTERNAL_FIRST_PE_ISSUED 0x00000001 1622 1623 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1624 u32 reply); 1625 1626 1627 /* base shared API */ 1628 extern struct list_head mpt3sas_ioc_list; 1629 extern char driver_name[MPT_NAME_LENGTH]; 1630 /* spinlock on list operations over IOCs 1631 * Case: when multiple warpdrive cards(IOCs) are in use 1632 * Each IOC will added to the ioc list structure on initialization. 1633 * Watchdog threads run at regular intervals to check IOC for any 1634 * fault conditions which will trigger the dead_ioc thread to 1635 * deallocate pci resource, resulting deleting the IOC netry from list, 1636 * this deletion need to protected by spinlock to enusre that 1637 * ioc removal is syncrhonized, if not synchronized it might lead to 1638 * list_del corruption as the ioc list is traversed in cli path. 1639 */ 1640 extern spinlock_t gioc_lock; 1641 1642 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); 1643 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); 1644 1645 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); 1646 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); 1647 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); 1648 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); 1649 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc); 1650 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, 1651 enum reset_type type); 1652 1653 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1654 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1655 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, 1656 u16 smid); 1657 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1658 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1659 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll); 1660 void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc); 1661 void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc); 1662 1663 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1664 u16 handle); 1665 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1666 u16 msix_task); 1667 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1668 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1669 /* hi-priority queue */ 1670 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1671 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, 1672 struct scsi_cmnd *scmd); 1673 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, 1674 struct scsiio_tracker *st); 1675 1676 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1677 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1678 void mpt3sas_base_initialize_callback_handler(void); 1679 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); 1680 void mpt3sas_base_release_callback_handler(u8 cb_idx); 1681 1682 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1683 u32 reply); 1684 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1685 u8 msix_index, u32 reply); 1686 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, 1687 u32 phys_addr); 1688 1689 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); 1690 1691 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); 1692 #define mpt3sas_print_fault_code(ioc, fault_code) \ 1693 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \ 1694 mpt3sas_base_fault_info(ioc, fault_code); } while (0) 1695 1696 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code); 1697 #define mpt3sas_print_coredump_info(ioc, fault_code) \ 1698 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \ 1699 mpt3sas_base_coredump_info(ioc, fault_code); } while (0) 1700 1701 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc, 1702 const char *caller); 1703 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, 1704 Mpi2SasIoUnitControlReply_t *mpi_reply, 1705 Mpi2SasIoUnitControlRequest_t *mpi_request); 1706 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, 1707 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); 1708 1709 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, 1710 u32 *event_type); 1711 1712 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); 1713 1714 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, 1715 u16 device_missing_delay, u8 io_missing_delay); 1716 1717 int mpt3sas_base_check_for_fault_and_issue_reset( 1718 struct MPT3SAS_ADAPTER *ioc); 1719 1720 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); 1721 1722 void 1723 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc); 1724 1725 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc, 1726 u8 status, void *mpi_request, int sz); 1727 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \ 1728 do { ioc_err(ioc, "In func: %s\n", __func__); \ 1729 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \ 1730 status, mpi_request, sz); } while (0) 1731 1732 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count); 1733 1734 /* scsih shared API */ 1735 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, 1736 u16 smid); 1737 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, 1738 u32 reply); 1739 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc); 1740 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands( 1741 struct MPT3SAS_ADAPTER *ioc); 1742 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc); 1743 1744 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1745 uint channel, uint id, u64 lun, u8 type, u16 smid_task, 1746 u16 msix_task, u8 timeout, u8 tr_method); 1747 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1748 uint channel, uint id, u64 lun, u8 type, u16 smid_task, 1749 u16 msix_task, u8 timeout, u8 tr_method); 1750 1751 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1752 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1753 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1754 struct hba_port *port); 1755 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, 1756 u64 sas_address, struct hba_port *port); 1757 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, 1758 u16 smid); 1759 struct hba_port * 1760 mpt3sas_get_port_by_id(struct MPT3SAS_ADAPTER *ioc, u8 port, 1761 u8 bypass_dirty_port_flag); 1762 1763 struct _sas_node *mpt3sas_scsih_expander_find_by_handle( 1764 struct MPT3SAS_ADAPTER *ioc, u16 handle); 1765 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( 1766 struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1767 struct hba_port *port); 1768 struct _sas_device *mpt3sas_get_sdev_by_addr( 1769 struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1770 struct hba_port *port); 1771 struct _sas_device *__mpt3sas_get_sdev_by_addr( 1772 struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1773 struct hba_port *port); 1774 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1775 u16 handle); 1776 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1777 u16 handle); 1778 1779 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); 1780 struct _raid_device * 1781 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1782 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth); 1783 struct _sas_device * 1784 __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy); 1785 struct virtual_phy * 1786 mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc, 1787 struct hba_port *port, u32 phy); 1788 1789 /* config shared API */ 1790 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1791 u32 reply); 1792 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, 1793 u8 *num_phys); 1794 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, 1795 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); 1796 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, 1797 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, 1798 u16 sz); 1799 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, 1800 Mpi2ConfigReply_t *mpi_reply, 1801 struct Mpi2ManufacturingPage10_t *config_page); 1802 1803 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1804 Mpi2ConfigReply_t *mpi_reply, 1805 struct Mpi2ManufacturingPage11_t *config_page); 1806 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1807 Mpi2ConfigReply_t *mpi_reply, 1808 struct Mpi2ManufacturingPage11_t *config_page); 1809 1810 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1811 *mpi_reply, Mpi2BiosPage2_t *config_page); 1812 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1813 *mpi_reply, Mpi2BiosPage3_t *config_page); 1814 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1815 *mpi_reply, Mpi2IOUnitPage0_t *config_page); 1816 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1817 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, 1818 u32 form, u32 handle); 1819 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, 1820 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, 1821 u32 form, u32 handle); 1822 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1823 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, 1824 u32 form, u32 handle); 1825 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, 1826 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, 1827 u32 form, u32 handle); 1828 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, 1829 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, 1830 u16 sz); 1831 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1832 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1833 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, 1834 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); 1835 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1836 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1837 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1838 *mpi_reply, Mpi2IOUnitPage8_t *config_page); 1839 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1840 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1841 u16 sz); 1842 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1843 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1844 u16 sz); 1845 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1846 *mpi_reply, Mpi2IOCPage1_t *config_page); 1847 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1848 *mpi_reply, Mpi2IOCPage1_t *config_page); 1849 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1850 *mpi_reply, Mpi2IOCPage8_t *config_page); 1851 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, 1852 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, 1853 u32 form, u32 handle); 1854 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, 1855 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, 1856 u32 phy_number, u16 handle); 1857 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, 1858 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, 1859 u32 form, u32 handle); 1860 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1861 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); 1862 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1863 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); 1864 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, 1865 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 1866 u32 handle); 1867 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1868 u8 *num_pds); 1869 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, 1870 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, 1871 u32 handle, u16 sz); 1872 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, 1873 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 1874 u32 form, u32 form_specific); 1875 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, 1876 u16 *volume_handle); 1877 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, 1878 u16 volume_handle, u64 *wwid); 1879 int 1880 mpt3sas_config_get_driver_trigger_pg0(struct MPT3SAS_ADAPTER *ioc, 1881 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage0_t *config_page); 1882 int 1883 mpt3sas_config_get_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc, 1884 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage1_t *config_page); 1885 int 1886 mpt3sas_config_get_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc, 1887 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage2_t *config_page); 1888 int 1889 mpt3sas_config_get_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc, 1890 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage3_t *config_page); 1891 int 1892 mpt3sas_config_get_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc, 1893 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage4_t *config_page); 1894 int 1895 mpt3sas_config_update_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc, 1896 struct SL_WH_MASTER_TRIGGER_T *master_tg, bool set); 1897 int 1898 mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc, 1899 struct SL_WH_EVENT_TRIGGERS_T *event_tg, bool set); 1900 int 1901 mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc, 1902 struct SL_WH_SCSI_TRIGGERS_T *scsi_tg, bool set); 1903 int 1904 mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc, 1905 struct SL_WH_MPI_TRIGGERS_T *mpi_tg, bool set); 1906 1907 /* ctl shared API */ 1908 extern struct device_attribute *mpt3sas_host_attrs[]; 1909 extern struct device_attribute *mpt3sas_dev_attrs[]; 1910 void mpt3sas_ctl_init(ushort hbas_to_enumerate); 1911 void mpt3sas_ctl_exit(ushort hbas_to_enumerate); 1912 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1913 u32 reply); 1914 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc); 1915 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc); 1916 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc); 1917 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, 1918 u8 msix_index, u32 reply); 1919 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, 1920 Mpi2EventNotificationReply_t *mpi_reply); 1921 1922 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, 1923 u8 bits_to_register); 1924 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, 1925 u8 *issue_reset); 1926 1927 /* transport shared API */ 1928 extern struct scsi_transport_template *mpt3sas_transport_template; 1929 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1930 u32 reply); 1931 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, 1932 u16 handle, u64 sas_address, struct hba_port *port); 1933 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1934 u64 sas_address_parent, struct hba_port *port); 1935 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy 1936 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); 1937 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, 1938 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, 1939 struct device *parent_dev); 1940 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, 1941 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate, 1942 struct hba_port *port); 1943 extern struct sas_function_template mpt3sas_transport_functions; 1944 extern struct scsi_transport_template *mpt3sas_transport_template; 1945 void 1946 mpt3sas_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc, 1947 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy); 1948 void 1949 mpt3sas_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc, 1950 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy, 1951 u64 sas_address, struct hba_port *port); 1952 /* trigger data externs */ 1953 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, 1954 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1955 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, 1956 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1957 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, 1958 u32 trigger_bitmask); 1959 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, 1960 u16 log_entry_qualifier); 1961 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, 1962 u8 asc, u8 ascq); 1963 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, 1964 u32 loginfo); 1965 1966 /* warpdrive APIs */ 1967 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); 1968 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, 1969 struct _raid_device *raid_device); 1970 void 1971 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, 1972 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request); 1973 1974 /* NCQ Prio Handling Check */ 1975 bool scsih_ncq_prio_supp(struct scsi_device *sdev); 1976 1977 void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc); 1978 void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc); 1979 void mpt3sas_init_debugfs(void); 1980 void mpt3sas_exit_debugfs(void); 1981 1982 /** 1983 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device 1984 * @device_info: bitfield providing information about the device. 1985 * Context: none 1986 * 1987 * Returns 1 if scsi device. 1988 */ 1989 static inline int 1990 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info) 1991 { 1992 if ((device_info & 1993 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI) 1994 return 1; 1995 else 1996 return 0; 1997 } 1998 #endif /* MPT3SAS_BASE_H_INCLUDED */ 1999