190e7a701SSreekanth Reddy /*
2ff92b9ddSSuganath Prabu  * Copyright 2000-2020 Broadcom Inc. All rights reserved.
390e7a701SSreekanth Reddy  *
490e7a701SSreekanth Reddy  *
590e7a701SSreekanth Reddy  *          Name:  mpi2_pci.h
690e7a701SSreekanth Reddy  *         Title:  MPI PCIe Attached Devices structures and definitions.
790e7a701SSreekanth Reddy  * Creation Date:  October 9, 2012
890e7a701SSreekanth Reddy  *
9ff92b9ddSSuganath Prabu  * mpi2_pci.h Version:  02.00.03
1090e7a701SSreekanth Reddy  *
1190e7a701SSreekanth Reddy  * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
1290e7a701SSreekanth Reddy  *       prefix are for use only on MPI v2.5 products, and must not be used
1390e7a701SSreekanth Reddy  *       with MPI v2.0 products. Unless otherwise noted, names beginning with
1490e7a701SSreekanth Reddy  *       MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
1590e7a701SSreekanth Reddy  *
1690e7a701SSreekanth Reddy  * Version History
1790e7a701SSreekanth Reddy  * ---------------
1890e7a701SSreekanth Reddy  *
1990e7a701SSreekanth Reddy  * Date      Version   Description
2090e7a701SSreekanth Reddy  * --------  --------  ------------------------------------------------------
2190e7a701SSreekanth Reddy  * 03-16-15  02.00.00  Initial version.
2290e7a701SSreekanth Reddy  * 02-17-16  02.00.01  Removed AHCI support.
2390e7a701SSreekanth Reddy  *                     Removed SOP support.
2490e7a701SSreekanth Reddy  * 07-01-16  02.00.02  Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to
2590e7a701SSreekanth Reddy  *                     NVME Encapsulated Request.
26ff92b9ddSSuganath Prabu  * 07-22-18  02.00.03  Updted flags field for NVME Encapsulated req
2790e7a701SSreekanth Reddy  * --------------------------------------------------------------------------
2890e7a701SSreekanth Reddy  */
2990e7a701SSreekanth Reddy 
3090e7a701SSreekanth Reddy #ifndef MPI2_PCI_H
3190e7a701SSreekanth Reddy #define MPI2_PCI_H
3290e7a701SSreekanth Reddy 
3390e7a701SSreekanth Reddy 
3490e7a701SSreekanth Reddy /*
3590e7a701SSreekanth Reddy  *Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event
3690e7a701SSreekanth Reddy  *data and PCIe Configuration pages.
3790e7a701SSreekanth Reddy  */
3890e7a701SSreekanth Reddy #define MPI26_PCIE_DEVINFO_DIRECT_ATTACH        (0x00000010)
3990e7a701SSreekanth Reddy 
4090e7a701SSreekanth Reddy #define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE     (0x0000000F)
4190e7a701SSreekanth Reddy #define MPI26_PCIE_DEVINFO_NO_DEVICE            (0x00000000)
4290e7a701SSreekanth Reddy #define MPI26_PCIE_DEVINFO_PCI_SWITCH           (0x00000001)
4390e7a701SSreekanth Reddy #define MPI26_PCIE_DEVINFO_NVME                 (0x00000003)
4490e7a701SSreekanth Reddy 
4590e7a701SSreekanth Reddy 
4690e7a701SSreekanth Reddy /****************************************************************************
4790e7a701SSreekanth Reddy *  NVMe Encapsulated message
4890e7a701SSreekanth Reddy ****************************************************************************/
4990e7a701SSreekanth Reddy 
5090e7a701SSreekanth Reddy /*NVME Encapsulated Request Message */
5190e7a701SSreekanth Reddy typedef struct _MPI26_NVME_ENCAPSULATED_REQUEST {
5290e7a701SSreekanth Reddy 	U16	DevHandle;                      /*0x00 */
5390e7a701SSreekanth Reddy 	U8	ChainOffset;                    /*0x02 */
5490e7a701SSreekanth Reddy 	U8	Function;                       /*0x03 */
5590e7a701SSreekanth Reddy 	U16	EncapsulatedCommandLength;      /*0x04 */
5690e7a701SSreekanth Reddy 	U8	Reserved1;                      /*0x06 */
5790e7a701SSreekanth Reddy 	U8	MsgFlags;                       /*0x07 */
5890e7a701SSreekanth Reddy 	U8	VP_ID;                          /*0x08 */
5990e7a701SSreekanth Reddy 	U8	VF_ID;                          /*0x09 */
6090e7a701SSreekanth Reddy 	U16	Reserved2;                      /*0x0A */
6190e7a701SSreekanth Reddy 	U32	Reserved3;                      /*0x0C */
6290e7a701SSreekanth Reddy 	U64	ErrorResponseBaseAddress;       /*0x10 */
6390e7a701SSreekanth Reddy 	U16	ErrorResponseAllocationLength;  /*0x18 */
6490e7a701SSreekanth Reddy 	U16	Flags;                          /*0x1A */
6590e7a701SSreekanth Reddy 	U32	DataLength;                     /*0x1C */
6690e7a701SSreekanth Reddy 	U8	NVMe_Command[4];                /*0x20 */
6790e7a701SSreekanth Reddy 
6890e7a701SSreekanth Reddy } MPI26_NVME_ENCAPSULATED_REQUEST, *PTR_MPI26_NVME_ENCAPSULATED_REQUEST,
6990e7a701SSreekanth Reddy 	Mpi26NVMeEncapsulatedRequest_t, *pMpi26NVMeEncapsulatedRequest_t;
7090e7a701SSreekanth Reddy 
7190e7a701SSreekanth Reddy /*defines for the Flags field */
7290e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP       (0x0020)
7390e7a701SSreekanth Reddy /*Submission Queue Type*/
7490e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK           (0x0010)
7590e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO             (0x0000)
7690e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN          (0x0010)
7790e7a701SSreekanth Reddy /*Error Response Address Space */
7890e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR        (0x000C)
79ff92b9ddSSuganath Prabu #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR_MASK   (0x000C)
8090e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR            (0x0000)
81ff92b9ddSSuganath Prabu #define MPI26_NVME_FLAGS_IOCCTL_RSP_ADDR            (0x0008)
8290e7a701SSreekanth Reddy /* Data Direction*/
8390e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_DATADIRECTION_MASK         (0x0003)
8490e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_NODATATRANSFER             (0x0000)
8590e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_WRITE                      (0x0001)
8690e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_READ                       (0x0002)
8790e7a701SSreekanth Reddy #define MPI26_NVME_FLAGS_BIDIRECTIONAL              (0x0003)
8890e7a701SSreekanth Reddy 
8990e7a701SSreekanth Reddy 
9090e7a701SSreekanth Reddy /*NVMe Encapuslated Reply Message */
9190e7a701SSreekanth Reddy typedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY {
9290e7a701SSreekanth Reddy 	U16	DevHandle;                      /*0x00 */
9390e7a701SSreekanth Reddy 	U8	MsgLength;                      /*0x02 */
9490e7a701SSreekanth Reddy 	U8	Function;                       /*0x03 */
9590e7a701SSreekanth Reddy 	U16	EncapsulatedCommandLength;      /*0x04 */
9690e7a701SSreekanth Reddy 	U8	Reserved1;                      /*0x06 */
9790e7a701SSreekanth Reddy 	U8	MsgFlags;                       /*0x07 */
9890e7a701SSreekanth Reddy 	U8	VP_ID;                          /*0x08 */
9990e7a701SSreekanth Reddy 	U8	VF_ID;                          /*0x09 */
10090e7a701SSreekanth Reddy 	U16	Reserved2;                      /*0x0A */
10190e7a701SSreekanth Reddy 	U16	Reserved3;                      /*0x0C */
10290e7a701SSreekanth Reddy 	U16	IOCStatus;                      /*0x0E */
10390e7a701SSreekanth Reddy 	U32	IOCLogInfo;                     /*0x10 */
10490e7a701SSreekanth Reddy 	U16	ErrorResponseCount;             /*0x14 */
10590e7a701SSreekanth Reddy 	U16	Reserved4;                      /*0x16 */
10690e7a701SSreekanth Reddy } MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
10790e7a701SSreekanth Reddy 	*PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
10890e7a701SSreekanth Reddy 	Mpi26NVMeEncapsulatedErrorReply_t,
10990e7a701SSreekanth Reddy 	*pMpi26NVMeEncapsulatedErrorReply_t;
11090e7a701SSreekanth Reddy 
11190e7a701SSreekanth Reddy 
11290e7a701SSreekanth Reddy #endif
113