xref: /openbmc/linux/drivers/scsi/mpt3sas/mpi/mpi2_init.h (revision b24413180f5600bcb3bb70fbed5cf186b60864bd)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright 2000-2015 Avago Technologies.  All rights reserved.
4  *
5  *
6  *          Name:  mpi2_init.h
7  *         Title:  MPI SCSI initiator mode messages and structures
8  * Creation Date:  June 23, 2006
9  *
10  * mpi2_init.h Version:  02.00.20
11  *
12  * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
13  *       prefix are for use only on MPI v2.5 products, and must not be used
14  *       with MPI v2.0 products. Unless otherwise noted, names beginning with
15  *       MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
16  *
17  * Version History
18  * ---------------
19  *
20  * Date      Version   Description
21  * --------  --------  ------------------------------------------------------
22  * 04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
23  * 10-31-07  02.00.01  Fixed name for pMpi2SCSITaskManagementRequest_t.
24  * 12-18-07  02.00.02  Modified Task Management Target Reset Method defines.
25  * 02-29-08  02.00.03  Added Query Task Set and Query Unit Attention.
26  * 03-03-08  02.00.04  Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
27  * 05-21-08  02.00.05  Fixed typo in name of Mpi2SepRequest_t.
28  * 10-02-08  02.00.06  Removed Untagged and No Disconnect values from SCSI IO
29  *                     Control field Task Attribute flags.
30  *                     Moved LUN field defines to mpi2.h becasue they are
31  *                     common to many structures.
32  * 05-06-09  02.00.07  Changed task management type of Query Unit Attention to
33  *                     Query Asynchronous Event.
34  *                     Defined two new bits in the SlotStatus field of the SCSI
35  *                     Enclosure Processor Request and Reply.
36  * 10-28-09  02.00.08  Added defines for decoding the ResponseInfo bytes for
37  *                     both SCSI IO Error Reply and SCSI Task Management Reply.
38  *                     Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
39  *                     Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
40  * 02-10-10  02.00.09  Removed unused structure that had "#if 0" around it.
41  * 05-12-10  02.00.10  Added optional vendor-unique region to SCSI IO Request.
42  * 11-10-10  02.00.11  Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
43  * 11-18-11  02.00.12  Incorporating additions for MPI v2.5.
44  * 02-06-12  02.00.13  Added alternate defines for Task Priority / Command
45  *                     Priority to match SAM-4.
46  *                     Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY.
47  * 07-10-12  02.00.14  Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
48  * 04-09-13  02.00.15  Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
49  *                     replacing the Reserved4 field.
50  * 11-18-14  02.00.16  Updated copyright information.
51  * 03-16-15  02.00.17  Updated for MPI v2.6.
52  *                     Added MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH.
53  *                     Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and
54  *                     MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF.
55  * 08-26-15  02.00.18  Added SCSITASKMGMT_MSGFLAGS for Target Reset.
56  * 12-18-15  02.00.19  Added EEDPObservedValue added to SCSI IO Reply message.
57  * 01-04-16  02.00.20  Modified EEDP reported values in SCSI IO Reply message.
58  * --------------------------------------------------------------------------
59  */
60 
61 #ifndef MPI2_INIT_H
62 #define MPI2_INIT_H
63 
64 /*****************************************************************************
65 *
66 *              SCSI Initiator Messages
67 *
68 *****************************************************************************/
69 
70 /****************************************************************************
71 * SCSI IO messages and associated structures
72 ****************************************************************************/
73 
74 typedef struct _MPI2_SCSI_IO_CDB_EEDP32 {
75 	U8 CDB[20];		/*0x00 */
76 	U32 PrimaryReferenceTag;	/*0x14 */
77 	U16 PrimaryApplicationTag;	/*0x18 */
78 	U16 PrimaryApplicationTagMask;	/*0x1A */
79 	U32 TransferLength;	/*0x1C */
80 } MPI2_SCSI_IO_CDB_EEDP32, *PTR_MPI2_SCSI_IO_CDB_EEDP32,
81 	Mpi2ScsiIoCdbEedp32_t, *pMpi2ScsiIoCdbEedp32_t;
82 
83 /*MPI v2.0 CDB field */
84 typedef union _MPI2_SCSI_IO_CDB_UNION {
85 	U8 CDB32[32];
86 	MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
87 	MPI2_SGE_SIMPLE_UNION SGE;
88 } MPI2_SCSI_IO_CDB_UNION, *PTR_MPI2_SCSI_IO_CDB_UNION,
89 	Mpi2ScsiIoCdb_t, *pMpi2ScsiIoCdb_t;
90 
91 /*MPI v2.0 SCSI IO Request Message */
92 typedef struct _MPI2_SCSI_IO_REQUEST {
93 	U16 DevHandle;		/*0x00 */
94 	U8 ChainOffset;		/*0x02 */
95 	U8 Function;		/*0x03 */
96 	U16 Reserved1;		/*0x04 */
97 	U8 Reserved2;		/*0x06 */
98 	U8 MsgFlags;		/*0x07 */
99 	U8 VP_ID;		/*0x08 */
100 	U8 VF_ID;		/*0x09 */
101 	U16 Reserved3;		/*0x0A */
102 	U32 SenseBufferLowAddress;	/*0x0C */
103 	U16 SGLFlags;		/*0x10 */
104 	U8 SenseBufferLength;	/*0x12 */
105 	U8 Reserved4;		/*0x13 */
106 	U8 SGLOffset0;		/*0x14 */
107 	U8 SGLOffset1;		/*0x15 */
108 	U8 SGLOffset2;		/*0x16 */
109 	U8 SGLOffset3;		/*0x17 */
110 	U32 SkipCount;		/*0x18 */
111 	U32 DataLength;		/*0x1C */
112 	U32 BidirectionalDataLength;	/*0x20 */
113 	U16 IoFlags;		/*0x24 */
114 	U16 EEDPFlags;		/*0x26 */
115 	U32 EEDPBlockSize;	/*0x28 */
116 	U32 SecondaryReferenceTag;	/*0x2C */
117 	U16 SecondaryApplicationTag;	/*0x30 */
118 	U16 ApplicationTagTranslationMask;	/*0x32 */
119 	U8 LUN[8];		/*0x34 */
120 	U32 Control;		/*0x3C */
121 	MPI2_SCSI_IO_CDB_UNION CDB;	/*0x40 */
122 
123 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */
124 	MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
125 #endif
126 
127 	MPI2_SGE_IO_UNION SGL;	/*0x60 */
128 
129 } MPI2_SCSI_IO_REQUEST, *PTR_MPI2_SCSI_IO_REQUEST,
130 	Mpi2SCSIIORequest_t, *pMpi2SCSIIORequest_t;
131 
132 /*SCSI IO MsgFlags bits */
133 
134 /*MsgFlags for SenseBufferAddressSpace */
135 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR        (0x0C)
136 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR      (0x00)
137 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR      (0x04)
138 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR      (0x08)
139 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR   (0x0C)
140 #define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR     (0x08)
141 
142 /*SCSI IO SGLFlags bits */
143 
144 /*base values for Data Location Address Space */
145 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK              (0x0C)
146 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR            (0x00)
147 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR            (0x04)
148 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR            (0x08)
149 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR         (0x0C)
150 
151 /*base values for Type */
152 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK              (0x03)
153 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI               (0x00)
154 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32            (0x01)
155 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64            (0x02)
156 
157 /*shift values for each sub-field */
158 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT             (12)
159 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT             (8)
160 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT             (4)
161 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT             (0)
162 
163 /*number of SGLOffset fields */
164 #define MPI2_SCSIIO_NUM_SGLOFFSETS                  (4)
165 
166 /*SCSI IO IoFlags bits */
167 
168 /*Large CDB Address Space */
169 #define MPI2_SCSIIO_CDB_ADDR_MASK                   (0x6000)
170 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM                 (0x0000)
171 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR                 (0x2000)
172 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB                 (0x4000)
173 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA              (0x6000)
174 
175 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB               (0x1000)
176 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL           (0x0800)
177 #define MPI2_SCSIIO_IOFLAGS_MULTICAST               (0x0400)
178 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
179 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK          (0x01FF)
180 
181 /*SCSI IO EEDPFlags bits */
182 
183 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG        (0x8000)
184 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG        (0x4000)
185 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG        (0x2000)
186 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG        (0x1000)
187 
188 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG          (0x0400)
189 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG          (0x0200)
190 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD           (0x0100)
191 
192 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG       (0x0008)
193 
194 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP               (0x0007)
195 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP               (0x0000)
196 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP              (0x0001)
197 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP              (0x0002)
198 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP       (0x0003)
199 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP             (0x0004)
200 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP            (0x0006)
201 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP        (0x0007)
202 
203 /*SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
204 
205 /*SCSI IO Control bits */
206 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK      (0xFC000000)
207 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT     (26)
208 
209 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK  (0x03000000)
210 #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
211 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER      (0x00000000)
212 #define MPI2_SCSIIO_CONTROL_WRITE               (0x01000000)
213 #define MPI2_SCSIIO_CONTROL_READ                (0x02000000)
214 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL       (0x03000000)
215 
216 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK        (0x00007800)
217 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT       (11)
218 /*alternate name for the previous field; called Command Priority in SAM-4 */
219 #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK         (0x00007800)
220 #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT        (11)
221 
222 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK  (0x00000700)
223 #define MPI2_SCSIIO_CONTROL_SIMPLEQ             (0x00000000)
224 #define MPI2_SCSIIO_CONTROL_HEADOFQ             (0x00000100)
225 #define MPI2_SCSIIO_CONTROL_ORDEREDQ            (0x00000200)
226 #define MPI2_SCSIIO_CONTROL_ACAQ                (0x00000400)
227 
228 #define MPI2_SCSIIO_CONTROL_TLR_MASK            (0x000000C0)
229 #define MPI2_SCSIIO_CONTROL_NO_TLR              (0x00000000)
230 #define MPI2_SCSIIO_CONTROL_TLR_ON              (0x00000040)
231 #define MPI2_SCSIIO_CONTROL_TLR_OFF             (0x00000080)
232 
233 /*MPI v2.5 CDB field */
234 typedef union _MPI25_SCSI_IO_CDB_UNION {
235 	U8 CDB32[32];
236 	MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
237 	MPI2_IEEE_SGE_SIMPLE64 SGE;
238 } MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION,
239 	Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t;
240 
241 /*MPI v2.5/2.6 SCSI IO Request Message */
242 typedef struct _MPI25_SCSI_IO_REQUEST {
243 	U16 DevHandle;		/*0x00 */
244 	U8 ChainOffset;		/*0x02 */
245 	U8 Function;		/*0x03 */
246 	U16 Reserved1;		/*0x04 */
247 	U8 Reserved2;		/*0x06 */
248 	U8 MsgFlags;		/*0x07 */
249 	U8 VP_ID;		/*0x08 */
250 	U8 VF_ID;		/*0x09 */
251 	U16 Reserved3;		/*0x0A */
252 	U32 SenseBufferLowAddress;	/*0x0C */
253 	U8 DMAFlags;		/*0x10 */
254 	U8 Reserved5;		/*0x11 */
255 	U8 SenseBufferLength;	/*0x12 */
256 	U8 Reserved4;		/*0x13 */
257 	U8 SGLOffset0;		/*0x14 */
258 	U8 SGLOffset1;		/*0x15 */
259 	U8 SGLOffset2;		/*0x16 */
260 	U8 SGLOffset3;		/*0x17 */
261 	U32 SkipCount;		/*0x18 */
262 	U32 DataLength;		/*0x1C */
263 	U32 BidirectionalDataLength;	/*0x20 */
264 	U16 IoFlags;		/*0x24 */
265 	U16 EEDPFlags;		/*0x26 */
266 	U16 EEDPBlockSize;	/*0x28 */
267 	U16 Reserved6;		/*0x2A */
268 	U32 SecondaryReferenceTag;	/*0x2C */
269 	U16 SecondaryApplicationTag;	/*0x30 */
270 	U16 ApplicationTagTranslationMask;	/*0x32 */
271 	U8 LUN[8];		/*0x34 */
272 	U32 Control;		/*0x3C */
273 	MPI25_SCSI_IO_CDB_UNION CDB;	/*0x40 */
274 
275 #ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */
276 	MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
277 #endif
278 
279 	MPI25_SGE_IO_UNION SGL;	/*0x60 */
280 
281 } MPI25_SCSI_IO_REQUEST, *PTR_MPI25_SCSI_IO_REQUEST,
282 	Mpi25SCSIIORequest_t, *pMpi25SCSIIORequest_t;
283 
284 /*use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */
285 
286 /*Defines for the DMAFlags field
287  * Each setting affects 4 SGLS, from SGL0 to SGL3.
288  *     D = Data
289  *     C = Cache DIF
290  *     I = Interleaved
291  *     H = Host DIF
292  */
293 #define MPI25_SCSIIO_DMAFLAGS_OP_MASK               (0x0F)
294 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D            (0x00)
295 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C            (0x01)
296 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I            (0x02)
297 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C            (0x03)
298 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I            (0x04)
299 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I            (0x05)
300 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C            (0x06)
301 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I            (0x07)
302 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I            (0x08)
303 #define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I            (0x09)
304 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D            (0x0A)
305 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C            (0x0B)
306 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I            (0x0C)
307 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C            (0x0D)
308 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I            (0x0E)
309 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I            (0x0F)
310 
311 /*number of SGLOffset fields */
312 #define MPI25_SCSIIO_NUM_SGLOFFSETS                 (4)
313 
314 /*defines for the IoFlags field */
315 #define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK               (0xC000)
316 #define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH                (0x0000)
317 #define MPI25_SCSIIO_IOFLAGS_FAST_PATH                  (0x4000)
318 
319 #define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH         (0x2000)
320 #define MPI25_SCSIIO_IOFLAGS_LARGE_CDB                  (0x1000)
321 #define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL              (0x0800)
322 #define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST               (0x0400)
323 #define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK             (0x01FF)
324 
325 /*MPI v2.5 defines for the EEDPFlags bits */
326 /*use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */
327 #define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK             (0x00C0)
328 #define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE              (0x0000)
329 #define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE          (0x0040)
330 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE          (0x0080)
331 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE   (0x00C0)
332 
333 #define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK       (0x0030)
334 #define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD           (0x0000)
335 #define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD         (0x0010)
336 
337 /*use MPI2_LUN_ defines from mpi2.h for the LUN field */
338 
339 /*use MPI2_SCSIIO_CONTROL_ defines for the Control field */
340 
341 /*NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so
342  *      MPI2_SCSI_IO_REPLY is used for both.
343  */
344 
345 /*SCSI IO Error Reply Message */
346 typedef struct _MPI2_SCSI_IO_REPLY {
347 	U16 DevHandle;		/*0x00 */
348 	U8 MsgLength;		/*0x02 */
349 	U8 Function;		/*0x03 */
350 	U16 Reserved1;		/*0x04 */
351 	U8 Reserved2;		/*0x06 */
352 	U8 MsgFlags;		/*0x07 */
353 	U8 VP_ID;		/*0x08 */
354 	U8 VF_ID;		/*0x09 */
355 	U16 Reserved3;		/*0x0A */
356 	U8 SCSIStatus;		/*0x0C */
357 	U8 SCSIState;		/*0x0D */
358 	U16 IOCStatus;		/*0x0E */
359 	U32 IOCLogInfo;		/*0x10 */
360 	U32 TransferCount;	/*0x14 */
361 	U32 SenseCount;		/*0x18 */
362 	U32 ResponseInfo;	/*0x1C */
363 	U16 TaskTag;		/*0x20 */
364 	U16 SCSIStatusQualifier; /* 0x22 */
365 	U32 BidirectionalTransferCount;	/*0x24 */
366  /* MPI 2.5+ only; Reserved in MPI 2.0 */
367 	U32 EEDPErrorOffset;	/* 0x28 */
368  /* MPI 2.5+ only; Reserved in MPI 2.0 */
369 	U16 EEDPObservedAppTag;	/* 0x2C */
370  /* MPI 2.5+ only; Reserved in MPI 2.0 */
371 	U16 EEDPObservedGuard;	/* 0x2E */
372  /* MPI 2.5+ only; Reserved in MPI 2.0 */
373 	U32 EEDPObservedRefTag;	/* 0x30 */
374 } MPI2_SCSI_IO_REPLY, *PTR_MPI2_SCSI_IO_REPLY,
375 	Mpi2SCSIIOReply_t, *pMpi2SCSIIOReply_t;
376 
377 /*SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
378 
379 #define MPI2_SCSI_STATUS_GOOD                   (0x00)
380 #define MPI2_SCSI_STATUS_CHECK_CONDITION        (0x02)
381 #define MPI2_SCSI_STATUS_CONDITION_MET          (0x04)
382 #define MPI2_SCSI_STATUS_BUSY                   (0x08)
383 #define MPI2_SCSI_STATUS_INTERMEDIATE           (0x10)
384 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET   (0x14)
385 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT   (0x18)
386 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED     (0x22)	/*obsolete */
387 #define MPI2_SCSI_STATUS_TASK_SET_FULL          (0x28)
388 #define MPI2_SCSI_STATUS_ACA_ACTIVE             (0x30)
389 #define MPI2_SCSI_STATUS_TASK_ABORTED           (0x40)
390 
391 /*SCSI IO Reply SCSIState flags */
392 
393 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID     (0x10)
394 #define MPI2_SCSI_STATE_TERMINATED              (0x08)
395 #define MPI2_SCSI_STATE_NO_SCSI_STATUS          (0x04)
396 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED        (0x02)
397 #define MPI2_SCSI_STATE_AUTOSENSE_VALID         (0x01)
398 
399 /*masks and shifts for the ResponseInfo field */
400 
401 #define MPI2_SCSI_RI_MASK_REASONCODE            (0x000000FF)
402 #define MPI2_SCSI_RI_SHIFT_REASONCODE           (0)
403 
404 #define MPI2_SCSI_TASKTAG_UNKNOWN               (0xFFFF)
405 
406 /****************************************************************************
407 * SCSI Task Management messages
408 ****************************************************************************/
409 
410 /*SCSI Task Management Request Message */
411 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST {
412 	U16 DevHandle;		/*0x00 */
413 	U8 ChainOffset;		/*0x02 */
414 	U8 Function;		/*0x03 */
415 	U8 Reserved1;		/*0x04 */
416 	U8 TaskType;		/*0x05 */
417 	U8 Reserved2;		/*0x06 */
418 	U8 MsgFlags;		/*0x07 */
419 	U8 VP_ID;		/*0x08 */
420 	U8 VF_ID;		/*0x09 */
421 	U16 Reserved3;		/*0x0A */
422 	U8 LUN[8];		/*0x0C */
423 	U32 Reserved4[7];	/*0x14 */
424 	U16 TaskMID;		/*0x30 */
425 	U16 Reserved5;		/*0x32 */
426 } MPI2_SCSI_TASK_MANAGE_REQUEST,
427 	*PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
428 	Mpi2SCSITaskManagementRequest_t,
429 	*pMpi2SCSITaskManagementRequest_t;
430 
431 /*TaskType values */
432 
433 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK           (0x01)
434 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET        (0x02)
435 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET         (0x03)
436 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET   (0x05)
437 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET       (0x06)
438 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK           (0x07)
439 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA              (0x08)
440 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET         (0x09)
441 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT      (0x0A)
442 
443 /*obsolete TaskType name */
444 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \
445 		(MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
446 
447 /*MsgFlags bits */
448 
449 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET    (0x18)
450 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET           (0x00)
451 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST     (0x08)
452 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET  (0x10)
453 
454 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU  (0x01)
455 
456 /*SCSI Task Management Reply Message */
457 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY {
458 	U16 DevHandle;		/*0x00 */
459 	U8 MsgLength;		/*0x02 */
460 	U8 Function;		/*0x03 */
461 	U8 ResponseCode;	/*0x04 */
462 	U8 TaskType;		/*0x05 */
463 	U8 Reserved1;		/*0x06 */
464 	U8 MsgFlags;		/*0x07 */
465 	U8 VP_ID;		/*0x08 */
466 	U8 VF_ID;		/*0x09 */
467 	U16 Reserved2;		/*0x0A */
468 	U16 Reserved3;		/*0x0C */
469 	U16 IOCStatus;		/*0x0E */
470 	U32 IOCLogInfo;		/*0x10 */
471 	U32 TerminationCount;	/*0x14 */
472 	U32 ResponseInfo;	/*0x18 */
473 } MPI2_SCSI_TASK_MANAGE_REPLY,
474 	*PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
475 	Mpi2SCSITaskManagementReply_t, *pMpi2SCSIManagementReply_t;
476 
477 /*ResponseCode values */
478 
479 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE               (0x00)
480 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME             (0x02)
481 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED          (0x04)
482 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED                 (0x05)
483 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED              (0x08)
484 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN            (0x09)
485 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG         (0x0A)
486 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC          (0x80)
487 
488 /*masks and shifts for the ResponseInfo field */
489 
490 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE            (0x000000FF)
491 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE           (0)
492 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2                  (0x0000FF00)
493 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2                 (8)
494 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1                  (0x00FF0000)
495 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1                 (16)
496 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0                  (0xFF000000)
497 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0                 (24)
498 
499 /****************************************************************************
500 * SCSI Enclosure Processor messages
501 ****************************************************************************/
502 
503 /*SCSI Enclosure Processor Request Message */
504 typedef struct _MPI2_SEP_REQUEST {
505 	U16 DevHandle;		/*0x00 */
506 	U8 ChainOffset;		/*0x02 */
507 	U8 Function;		/*0x03 */
508 	U8 Action;		/*0x04 */
509 	U8 Flags;		/*0x05 */
510 	U8 Reserved1;		/*0x06 */
511 	U8 MsgFlags;		/*0x07 */
512 	U8 VP_ID;		/*0x08 */
513 	U8 VF_ID;		/*0x09 */
514 	U16 Reserved2;		/*0x0A */
515 	U32 SlotStatus;		/*0x0C */
516 	U32 Reserved3;		/*0x10 */
517 	U32 Reserved4;		/*0x14 */
518 	U32 Reserved5;		/*0x18 */
519 	U16 Slot;		/*0x1C */
520 	U16 EnclosureHandle;	/*0x1E */
521 } MPI2_SEP_REQUEST, *PTR_MPI2_SEP_REQUEST,
522 	Mpi2SepRequest_t, *pMpi2SepRequest_t;
523 
524 /*Action defines */
525 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS                (0x00)
526 #define MPI2_SEP_REQ_ACTION_READ_STATUS                 (0x01)
527 
528 /*Flags defines */
529 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS            (0x00)
530 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS       (0x01)
531 
532 /*SlotStatus defines */
533 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF                 (0x00080000)
534 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE          (0x00040000)
535 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST        (0x00020000)
536 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED         (0x00000200)
537 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE               (0x00000100)
538 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED            (0x00000080)
539 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT         (0x00000040)
540 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY       (0x00000010)
541 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY         (0x00000008)
542 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING          (0x00000004)
543 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY              (0x00000002)
544 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR                (0x00000001)
545 
546 /*SCSI Enclosure Processor Reply Message */
547 typedef struct _MPI2_SEP_REPLY {
548 	U16 DevHandle;		/*0x00 */
549 	U8 MsgLength;		/*0x02 */
550 	U8 Function;		/*0x03 */
551 	U8 Action;		/*0x04 */
552 	U8 Flags;		/*0x05 */
553 	U8 Reserved1;		/*0x06 */
554 	U8 MsgFlags;		/*0x07 */
555 	U8 VP_ID;		/*0x08 */
556 	U8 VF_ID;		/*0x09 */
557 	U16 Reserved2;		/*0x0A */
558 	U16 Reserved3;		/*0x0C */
559 	U16 IOCStatus;		/*0x0E */
560 	U32 IOCLogInfo;		/*0x10 */
561 	U32 SlotStatus;		/*0x14 */
562 	U32 Reserved4;		/*0x18 */
563 	U16 Slot;		/*0x1C */
564 	U16 EnclosureHandle;	/*0x1E */
565 } MPI2_SEP_REPLY, *PTR_MPI2_SEP_REPLY,
566 	Mpi2SepReply_t, *pMpi2SepReply_t;
567 
568 /*SlotStatus defines */
569 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF               (0x00080000)
570 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY          (0x00040000)
571 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST      (0x00020000)
572 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED       (0x00000200)
573 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE             (0x00000100)
574 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED          (0x00000080)
575 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT       (0x00000040)
576 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY     (0x00000010)
577 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY       (0x00000008)
578 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING        (0x00000004)
579 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY            (0x00000002)
580 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR              (0x00000001)
581 
582 #endif
583