1 /* 2 * Copyright 2000-2015 Avago Technologies. All rights reserved. 3 * 4 * 5 * Name: mpi2_init.h 6 * Title: MPI SCSI initiator mode messages and structures 7 * Creation Date: June 23, 2006 8 * 9 * mpi2_init.h Version: 02.00.17 10 * 11 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 12 * prefix are for use only on MPI v2.5 products, and must not be used 13 * with MPI v2.0 products. Unless otherwise noted, names beginning with 14 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 15 * 16 * Version History 17 * --------------- 18 * 19 * Date Version Description 20 * -------- -------- ------------------------------------------------------ 21 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 22 * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. 23 * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. 24 * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. 25 * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. 26 * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. 27 * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO 28 * Control field Task Attribute flags. 29 * Moved LUN field defines to mpi2.h becasue they are 30 * common to many structures. 31 * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to 32 * Query Asynchronous Event. 33 * Defined two new bits in the SlotStatus field of the SCSI 34 * Enclosure Processor Request and Reply. 35 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for 36 * both SCSI IO Error Reply and SCSI Task Management Reply. 37 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY. 38 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define. 39 * 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it. 40 * 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request. 41 * 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define. 42 * 11-18-11 02.00.12 Incorporating additions for MPI v2.5. 43 * 02-06-12 02.00.13 Added alternate defines for Task Priority / Command 44 * Priority to match SAM-4. 45 * Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY. 46 * 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION. 47 * 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY, 48 * replacing the Reserved4 field. 49 * 11-18-14 02.00.16 Updated copyright information. 50 * 03-16-15 02.00.17 Updated for MPI v2.6. 51 * Added MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH. 52 * Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and 53 * MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF. 54 * -------------------------------------------------------------------------- 55 */ 56 57 #ifndef MPI2_INIT_H 58 #define MPI2_INIT_H 59 60 /***************************************************************************** 61 * 62 * SCSI Initiator Messages 63 * 64 *****************************************************************************/ 65 66 /**************************************************************************** 67 * SCSI IO messages and associated structures 68 ****************************************************************************/ 69 70 typedef struct _MPI2_SCSI_IO_CDB_EEDP32 { 71 U8 CDB[20]; /*0x00 */ 72 U32 PrimaryReferenceTag; /*0x14 */ 73 U16 PrimaryApplicationTag; /*0x18 */ 74 U16 PrimaryApplicationTagMask; /*0x1A */ 75 U32 TransferLength; /*0x1C */ 76 } MPI2_SCSI_IO_CDB_EEDP32, *PTR_MPI2_SCSI_IO_CDB_EEDP32, 77 Mpi2ScsiIoCdbEedp32_t, *pMpi2ScsiIoCdbEedp32_t; 78 79 /*MPI v2.0 CDB field */ 80 typedef union _MPI2_SCSI_IO_CDB_UNION { 81 U8 CDB32[32]; 82 MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 83 MPI2_SGE_SIMPLE_UNION SGE; 84 } MPI2_SCSI_IO_CDB_UNION, *PTR_MPI2_SCSI_IO_CDB_UNION, 85 Mpi2ScsiIoCdb_t, *pMpi2ScsiIoCdb_t; 86 87 /*MPI v2.0 SCSI IO Request Message */ 88 typedef struct _MPI2_SCSI_IO_REQUEST { 89 U16 DevHandle; /*0x00 */ 90 U8 ChainOffset; /*0x02 */ 91 U8 Function; /*0x03 */ 92 U16 Reserved1; /*0x04 */ 93 U8 Reserved2; /*0x06 */ 94 U8 MsgFlags; /*0x07 */ 95 U8 VP_ID; /*0x08 */ 96 U8 VF_ID; /*0x09 */ 97 U16 Reserved3; /*0x0A */ 98 U32 SenseBufferLowAddress; /*0x0C */ 99 U16 SGLFlags; /*0x10 */ 100 U8 SenseBufferLength; /*0x12 */ 101 U8 Reserved4; /*0x13 */ 102 U8 SGLOffset0; /*0x14 */ 103 U8 SGLOffset1; /*0x15 */ 104 U8 SGLOffset2; /*0x16 */ 105 U8 SGLOffset3; /*0x17 */ 106 U32 SkipCount; /*0x18 */ 107 U32 DataLength; /*0x1C */ 108 U32 BidirectionalDataLength; /*0x20 */ 109 U16 IoFlags; /*0x24 */ 110 U16 EEDPFlags; /*0x26 */ 111 U32 EEDPBlockSize; /*0x28 */ 112 U32 SecondaryReferenceTag; /*0x2C */ 113 U16 SecondaryApplicationTag; /*0x30 */ 114 U16 ApplicationTagTranslationMask; /*0x32 */ 115 U8 LUN[8]; /*0x34 */ 116 U32 Control; /*0x3C */ 117 MPI2_SCSI_IO_CDB_UNION CDB; /*0x40 */ 118 119 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */ 120 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion; 121 #endif 122 123 MPI2_SGE_IO_UNION SGL; /*0x60 */ 124 125 } MPI2_SCSI_IO_REQUEST, *PTR_MPI2_SCSI_IO_REQUEST, 126 Mpi2SCSIIORequest_t, *pMpi2SCSIIORequest_t; 127 128 /*SCSI IO MsgFlags bits */ 129 130 /*MsgFlags for SenseBufferAddressSpace */ 131 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C) 132 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00) 133 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04) 134 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) 135 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) 136 #define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08) 137 138 /*SCSI IO SGLFlags bits */ 139 140 /*base values for Data Location Address Space */ 141 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C) 142 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00) 143 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04) 144 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08) 145 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) 146 147 /*base values for Type */ 148 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03) 149 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00) 150 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01) 151 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02) 152 153 /*shift values for each sub-field */ 154 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12) 155 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8) 156 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4) 157 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0) 158 159 /*number of SGLOffset fields */ 160 #define MPI2_SCSIIO_NUM_SGLOFFSETS (4) 161 162 /*SCSI IO IoFlags bits */ 163 164 /*Large CDB Address Space */ 165 #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000) 166 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000) 167 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000) 168 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000) 169 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000) 170 171 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 172 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 173 #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400) 174 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200) 175 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 176 177 /*SCSI IO EEDPFlags bits */ 178 179 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 180 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 181 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 182 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 183 184 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400) 185 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200) 186 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100) 187 188 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) 189 190 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007) 191 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000) 192 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001) 193 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002) 194 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) 195 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004) 196 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006) 197 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007) 198 199 /*SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */ 200 201 /*SCSI IO Control bits */ 202 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000) 203 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 204 205 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 206 #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24) 207 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 208 #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000) 209 #define MPI2_SCSIIO_CONTROL_READ (0x02000000) 210 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000) 211 212 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800) 213 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11) 214 /*alternate name for the previous field; called Command Priority in SAM-4 */ 215 #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800) 216 #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11) 217 218 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 219 #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 220 #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100) 221 #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 222 #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400) 223 224 #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0) 225 #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000) 226 #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040) 227 #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080) 228 229 /*MPI v2.5 CDB field */ 230 typedef union _MPI25_SCSI_IO_CDB_UNION { 231 U8 CDB32[32]; 232 MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 233 MPI2_IEEE_SGE_SIMPLE64 SGE; 234 } MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION, 235 Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t; 236 237 /*MPI v2.5/2.6 SCSI IO Request Message */ 238 typedef struct _MPI25_SCSI_IO_REQUEST { 239 U16 DevHandle; /*0x00 */ 240 U8 ChainOffset; /*0x02 */ 241 U8 Function; /*0x03 */ 242 U16 Reserved1; /*0x04 */ 243 U8 Reserved2; /*0x06 */ 244 U8 MsgFlags; /*0x07 */ 245 U8 VP_ID; /*0x08 */ 246 U8 VF_ID; /*0x09 */ 247 U16 Reserved3; /*0x0A */ 248 U32 SenseBufferLowAddress; /*0x0C */ 249 U8 DMAFlags; /*0x10 */ 250 U8 Reserved5; /*0x11 */ 251 U8 SenseBufferLength; /*0x12 */ 252 U8 Reserved4; /*0x13 */ 253 U8 SGLOffset0; /*0x14 */ 254 U8 SGLOffset1; /*0x15 */ 255 U8 SGLOffset2; /*0x16 */ 256 U8 SGLOffset3; /*0x17 */ 257 U32 SkipCount; /*0x18 */ 258 U32 DataLength; /*0x1C */ 259 U32 BidirectionalDataLength; /*0x20 */ 260 U16 IoFlags; /*0x24 */ 261 U16 EEDPFlags; /*0x26 */ 262 U16 EEDPBlockSize; /*0x28 */ 263 U16 Reserved6; /*0x2A */ 264 U32 SecondaryReferenceTag; /*0x2C */ 265 U16 SecondaryApplicationTag; /*0x30 */ 266 U16 ApplicationTagTranslationMask; /*0x32 */ 267 U8 LUN[8]; /*0x34 */ 268 U32 Control; /*0x3C */ 269 MPI25_SCSI_IO_CDB_UNION CDB; /*0x40 */ 270 271 #ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /*typically this is left undefined */ 272 MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion; 273 #endif 274 275 MPI25_SGE_IO_UNION SGL; /*0x60 */ 276 277 } MPI25_SCSI_IO_REQUEST, *PTR_MPI25_SCSI_IO_REQUEST, 278 Mpi25SCSIIORequest_t, *pMpi25SCSIIORequest_t; 279 280 /*use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */ 281 282 /*Defines for the DMAFlags field 283 * Each setting affects 4 SGLS, from SGL0 to SGL3. 284 * D = Data 285 * C = Cache DIF 286 * I = Interleaved 287 * H = Host DIF 288 */ 289 #define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F) 290 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00) 291 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01) 292 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02) 293 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03) 294 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04) 295 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05) 296 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06) 297 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07) 298 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08) 299 #define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09) 300 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A) 301 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B) 302 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C) 303 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D) 304 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E) 305 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F) 306 307 /*number of SGLOffset fields */ 308 #define MPI25_SCSIIO_NUM_SGLOFFSETS (4) 309 310 /*defines for the IoFlags field */ 311 #define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000) 312 #define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000) 313 #define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000) 314 315 #define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000) 316 #define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 317 #define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 318 #define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400) 319 #define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 320 321 /*MPI v2.5 defines for the EEDPFlags bits */ 322 /*use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */ 323 #define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0) 324 #define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000) 325 #define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040) 326 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080) 327 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0) 328 329 #define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030) 330 #define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000) 331 #define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010) 332 333 /*use MPI2_LUN_ defines from mpi2.h for the LUN field */ 334 335 /*use MPI2_SCSIIO_CONTROL_ defines for the Control field */ 336 337 /*NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so 338 * MPI2_SCSI_IO_REPLY is used for both. 339 */ 340 341 /*SCSI IO Error Reply Message */ 342 typedef struct _MPI2_SCSI_IO_REPLY { 343 U16 DevHandle; /*0x00 */ 344 U8 MsgLength; /*0x02 */ 345 U8 Function; /*0x03 */ 346 U16 Reserved1; /*0x04 */ 347 U8 Reserved2; /*0x06 */ 348 U8 MsgFlags; /*0x07 */ 349 U8 VP_ID; /*0x08 */ 350 U8 VF_ID; /*0x09 */ 351 U16 Reserved3; /*0x0A */ 352 U8 SCSIStatus; /*0x0C */ 353 U8 SCSIState; /*0x0D */ 354 U16 IOCStatus; /*0x0E */ 355 U32 IOCLogInfo; /*0x10 */ 356 U32 TransferCount; /*0x14 */ 357 U32 SenseCount; /*0x18 */ 358 U32 ResponseInfo; /*0x1C */ 359 U16 TaskTag; /*0x20 */ 360 U16 SCSIStatusQualifier; /* 0x22 */ 361 U32 BidirectionalTransferCount; /*0x24 */ 362 U32 EEDPErrorOffset; /*0x28 *//*MPI 2.5 only; Reserved in MPI 2.0*/ 363 U32 Reserved6; /*0x2C */ 364 } MPI2_SCSI_IO_REPLY, *PTR_MPI2_SCSI_IO_REPLY, 365 Mpi2SCSIIOReply_t, *pMpi2SCSIIOReply_t; 366 367 /*SCSI IO Reply SCSIStatus values (SAM-4 status codes) */ 368 369 #define MPI2_SCSI_STATUS_GOOD (0x00) 370 #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02) 371 #define MPI2_SCSI_STATUS_CONDITION_MET (0x04) 372 #define MPI2_SCSI_STATUS_BUSY (0x08) 373 #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10) 374 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 375 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 376 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /*obsolete */ 377 #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28) 378 #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30) 379 #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40) 380 381 /*SCSI IO Reply SCSIState flags */ 382 383 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 384 #define MPI2_SCSI_STATE_TERMINATED (0x08) 385 #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04) 386 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) 387 #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) 388 389 /*masks and shifts for the ResponseInfo field */ 390 391 #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF) 392 #define MPI2_SCSI_RI_SHIFT_REASONCODE (0) 393 394 #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) 395 396 /**************************************************************************** 397 * SCSI Task Management messages 398 ****************************************************************************/ 399 400 /*SCSI Task Management Request Message */ 401 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST { 402 U16 DevHandle; /*0x00 */ 403 U8 ChainOffset; /*0x02 */ 404 U8 Function; /*0x03 */ 405 U8 Reserved1; /*0x04 */ 406 U8 TaskType; /*0x05 */ 407 U8 Reserved2; /*0x06 */ 408 U8 MsgFlags; /*0x07 */ 409 U8 VP_ID; /*0x08 */ 410 U8 VF_ID; /*0x09 */ 411 U16 Reserved3; /*0x0A */ 412 U8 LUN[8]; /*0x0C */ 413 U32 Reserved4[7]; /*0x14 */ 414 U16 TaskMID; /*0x30 */ 415 U16 Reserved5; /*0x32 */ 416 } MPI2_SCSI_TASK_MANAGE_REQUEST, 417 *PTR_MPI2_SCSI_TASK_MANAGE_REQUEST, 418 Mpi2SCSITaskManagementRequest_t, 419 *pMpi2SCSITaskManagementRequest_t; 420 421 /*TaskType values */ 422 423 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 424 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 425 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 426 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 427 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 428 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 429 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) 430 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09) 431 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A) 432 433 /*obsolete TaskType name */ 434 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \ 435 (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT) 436 437 /*MsgFlags bits */ 438 439 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18) 440 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00) 441 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08) 442 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10) 443 444 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) 445 446 /*SCSI Task Management Reply Message */ 447 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY { 448 U16 DevHandle; /*0x00 */ 449 U8 MsgLength; /*0x02 */ 450 U8 Function; /*0x03 */ 451 U8 ResponseCode; /*0x04 */ 452 U8 TaskType; /*0x05 */ 453 U8 Reserved1; /*0x06 */ 454 U8 MsgFlags; /*0x07 */ 455 U8 VP_ID; /*0x08 */ 456 U8 VF_ID; /*0x09 */ 457 U16 Reserved2; /*0x0A */ 458 U16 Reserved3; /*0x0C */ 459 U16 IOCStatus; /*0x0E */ 460 U32 IOCLogInfo; /*0x10 */ 461 U32 TerminationCount; /*0x14 */ 462 U32 ResponseInfo; /*0x18 */ 463 } MPI2_SCSI_TASK_MANAGE_REPLY, 464 *PTR_MPI2_SCSI_TASK_MANAGE_REPLY, 465 Mpi2SCSITaskManagementReply_t, *pMpi2SCSIManagementReply_t; 466 467 /*ResponseCode values */ 468 469 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 470 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 471 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 472 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) 473 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 474 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 475 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A) 476 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 477 478 /*masks and shifts for the ResponseInfo field */ 479 480 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF) 481 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0) 482 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00) 483 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8) 484 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000) 485 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16) 486 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000) 487 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24) 488 489 /**************************************************************************** 490 * SCSI Enclosure Processor messages 491 ****************************************************************************/ 492 493 /*SCSI Enclosure Processor Request Message */ 494 typedef struct _MPI2_SEP_REQUEST { 495 U16 DevHandle; /*0x00 */ 496 U8 ChainOffset; /*0x02 */ 497 U8 Function; /*0x03 */ 498 U8 Action; /*0x04 */ 499 U8 Flags; /*0x05 */ 500 U8 Reserved1; /*0x06 */ 501 U8 MsgFlags; /*0x07 */ 502 U8 VP_ID; /*0x08 */ 503 U8 VF_ID; /*0x09 */ 504 U16 Reserved2; /*0x0A */ 505 U32 SlotStatus; /*0x0C */ 506 U32 Reserved3; /*0x10 */ 507 U32 Reserved4; /*0x14 */ 508 U32 Reserved5; /*0x18 */ 509 U16 Slot; /*0x1C */ 510 U16 EnclosureHandle; /*0x1E */ 511 } MPI2_SEP_REQUEST, *PTR_MPI2_SEP_REQUEST, 512 Mpi2SepRequest_t, *pMpi2SepRequest_t; 513 514 /*Action defines */ 515 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00) 516 #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01) 517 518 /*Flags defines */ 519 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00) 520 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 521 522 /*SlotStatus defines */ 523 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000) 524 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 525 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 526 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 527 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 528 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 529 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 530 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 531 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 532 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 533 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 534 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 535 536 /*SCSI Enclosure Processor Reply Message */ 537 typedef struct _MPI2_SEP_REPLY { 538 U16 DevHandle; /*0x00 */ 539 U8 MsgLength; /*0x02 */ 540 U8 Function; /*0x03 */ 541 U8 Action; /*0x04 */ 542 U8 Flags; /*0x05 */ 543 U8 Reserved1; /*0x06 */ 544 U8 MsgFlags; /*0x07 */ 545 U8 VP_ID; /*0x08 */ 546 U8 VF_ID; /*0x09 */ 547 U16 Reserved2; /*0x0A */ 548 U16 Reserved3; /*0x0C */ 549 U16 IOCStatus; /*0x0E */ 550 U32 IOCLogInfo; /*0x10 */ 551 U32 SlotStatus; /*0x14 */ 552 U32 Reserved4; /*0x18 */ 553 U16 Slot; /*0x1C */ 554 U16 EnclosureHandle; /*0x1E */ 555 } MPI2_SEP_REPLY, *PTR_MPI2_SEP_REPLY, 556 Mpi2SepReply_t, *pMpi2SepReply_t; 557 558 /*SlotStatus defines */ 559 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000) 560 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 561 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 562 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 563 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 564 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 565 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 566 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 567 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 568 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 569 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 570 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 571 572 #endif 573