1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  *  Copyright 2018-2021 Broadcom Inc. All rights reserved.
4  *
5  */
6 #ifndef MPI30_IMAGE_H
7 #define MPI30_IMAGE_H     1
8 struct mpi3_comp_image_version {
9 	__le16     build_num;
10 	__le16     customer_id;
11 	u8         phase_minor;
12 	u8         phase_major;
13 	u8         gen_minor;
14 	u8         gen_major;
15 };
16 
17 struct mpi3_hash_exclusion_format {
18 	__le32                     offset;
19 	__le32                     size;
20 };
21 
22 #define MPI3_IMAGE_HASH_EXCUSION_NUM                           (4)
23 struct mpi3_component_image_header {
24 	__le32                            signature0;
25 	__le32                            load_address;
26 	__le32                            data_size;
27 	__le32                            start_offset;
28 	__le32                            signature1;
29 	__le32                            flash_offset;
30 	__le32                            image_size;
31 	__le32                            version_string_offset;
32 	__le32                            build_date_string_offset;
33 	__le32                            build_time_string_offset;
34 	__le32                            environment_variable_offset;
35 	__le32                            application_specific;
36 	__le32                            signature2;
37 	__le32                            header_size;
38 	__le32                            crc;
39 	__le32                            flags;
40 	__le32                            secondary_flash_offset;
41 	__le32                            etp_offset;
42 	__le32                            etp_size;
43 	union mpi3_version_union             rmc_interface_version;
44 	union mpi3_version_union             etp_interface_version;
45 	struct mpi3_comp_image_version        component_image_version;
46 	struct mpi3_hash_exclusion_format     hash_exclusion[MPI3_IMAGE_HASH_EXCUSION_NUM];
47 	__le32                            next_image_header_offset;
48 	union mpi3_version_union             security_version;
49 	__le32                            reserved84[31];
50 };
51 
52 #define MPI3_IMAGE_HEADER_SIGNATURE0_MPI3                     (0xeb00003e)
53 #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_INVALID                (0x00000000)
54 #define MPI3_IMAGE_HEADER_SIGNATURE1_APPLICATION              (0x20505041)
55 #define MPI3_IMAGE_HEADER_SIGNATURE1_FIRST_MUTABLE            (0x20434d46)
56 #define MPI3_IMAGE_HEADER_SIGNATURE1_BSP                      (0x20505342)
57 #define MPI3_IMAGE_HEADER_SIGNATURE1_ROM_BIOS                 (0x534f4942)
58 #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_X64                  (0x4d494948)
59 #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_ARM                  (0x41494948)
60 #define MPI3_IMAGE_HEADER_SIGNATURE1_CPLD                     (0x444c5043)
61 #define MPI3_IMAGE_HEADER_SIGNATURE1_SPD                      (0x20445053)
62 #define MPI3_IMAGE_HEADER_SIGNATURE1_GAS_GAUGE                (0x20534147)
63 #define MPI3_IMAGE_HEADER_SIGNATURE1_PBLP                     (0x504c4250)
64 #define MPI3_IMAGE_HEADER_SIGNATURE1_MANIFEST                 (0x464e414d)
65 #define MPI3_IMAGE_HEADER_SIGNATURE1_OEM                      (0x204d454f)
66 #define MPI3_IMAGE_HEADER_SIGNATURE2_VALUE                    (0x50584546)
67 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_MASK         (0x00000030)
68 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_CDI          (0x00000000)
69 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_DI           (0x00000010)
70 #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_NVDATA                 (0x00000008)
71 #define MPI3_IMAGE_HEADER_FLAGS_REQUIRES_ACTIVATION           (0x00000004)
72 #define MPI3_IMAGE_HEADER_FLAGS_COMPRESSED                    (0x00000002)
73 #define MPI3_IMAGE_HEADER_FLAGS_FLASH                         (0x00000001)
74 #define MPI3_IMAGE_HEADER_SIGNATURE0_OFFSET                   (0x00)
75 #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_OFFSET                 (0x04)
76 #define MPI3_IMAGE_HEADER_DATA_SIZE_OFFSET                    (0x08)
77 #define MPI3_IMAGE_HEADER_START_OFFSET_OFFSET                 (0x0c)
78 #define MPI3_IMAGE_HEADER_SIGNATURE1_OFFSET                   (0x10)
79 #define MPI3_IMAGE_HEADER_FLASH_OFFSET_OFFSET                 (0x14)
80 #define MPI3_IMAGE_HEADER_FLASH_SIZE_OFFSET                   (0x18)
81 #define MPI3_IMAGE_HEADER_VERSION_STRING_OFFSET_OFFSET        (0x1c)
82 #define MPI3_IMAGE_HEADER_BUILD_DATE_STRING_OFFSET_OFFSET     (0x20)
83 #define MPI3_IMAGE_HEADER_BUILD_TIME_OFFSET_OFFSET            (0x24)
84 #define MPI3_IMAGE_HEADER_ENVIROMENT_VAR_OFFSET_OFFSET        (0x28)
85 #define MPI3_IMAGE_HEADER_APPLICATION_SPECIFIC_OFFSET         (0x2c)
86 #define MPI3_IMAGE_HEADER_SIGNATURE2_OFFSET                   (0x30)
87 #define MPI3_IMAGE_HEADER_HEADER_SIZE_OFFSET                  (0x34)
88 #define MPI3_IMAGE_HEADER_CRC_OFFSET                          (0x38)
89 #define MPI3_IMAGE_HEADER_FLAGS_OFFSET                        (0x3c)
90 #define MPI3_IMAGE_HEADER_SECONDARY_FLASH_OFFSET_OFFSET       (0x40)
91 #define MPI3_IMAGE_HEADER_ETP_OFFSET_OFFSET                   (0x44)
92 #define MPI3_IMAGE_HEADER_ETP_SIZE_OFFSET                     (0x48)
93 #define MPI3_IMAGE_HEADER_RMC_INTERFACE_VER_OFFSET            (0x4c)
94 #define MPI3_IMAGE_HEADER_ETP_INTERFACE_VER_OFFSET            (0x50)
95 #define MPI3_IMAGE_HEADER_COMPONENT_IMAGE_VER_OFFSET          (0x54)
96 #define MPI3_IMAGE_HEADER_HASH_EXCLUSION_OFFSET               (0x5c)
97 #define MPI3_IMAGE_HEADER_NEXT_IMAGE_HEADER_OFFSET_OFFSET     (0x7c)
98 #define MPI3_IMAGE_HEADER_SIZE                                (0x100)
99 #ifndef MPI3_CI_MANIFEST_MPI_MAX
100 #define MPI3_CI_MANIFEST_MPI_MAX                               (1)
101 #endif
102 struct mpi3_ci_manifest_mpi_comp_image_ref {
103 	__le32                                signature1;
104 	__le32                                reserved04[3];
105 	struct mpi3_comp_image_version            component_image_version;
106 	__le32                                component_image_version_string_offset;
107 	__le32                                crc;
108 };
109 
110 struct mpi3_ci_manifest_mpi {
111 	u8                                       manifest_type;
112 	u8                                       reserved01[3];
113 	__le32                                   reserved04[3];
114 	u8                                       num_image_references;
115 	u8                                       release_level;
116 	__le16                                   reserved12;
117 	__le16                                   reserved14;
118 	__le16                                   flags;
119 	__le32                                   reserved18[2];
120 	__le16                                   vendor_id;
121 	__le16                                   device_id;
122 	__le16                                   subsystem_vendor_id;
123 	__le16                                   subsystem_id;
124 	__le32                                   reserved28[2];
125 	union mpi3_version_union                    package_security_version;
126 	__le32                                   reserved34;
127 	struct mpi3_comp_image_version               package_version;
128 	__le32                                   package_version_string_offset;
129 	__le32                                   package_build_date_string_offset;
130 	__le32                                   package_build_time_string_offset;
131 	__le32                                   reserved4c;
132 	__le32                                   diag_authorization_identifier[16];
133 	struct mpi3_ci_manifest_mpi_comp_image_ref   component_image_ref[MPI3_CI_MANIFEST_MPI_MAX];
134 };
135 
136 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_DEV                        (0x00)
137 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_PREALPHA                   (0x10)
138 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_ALPHA                      (0x20)
139 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_BETA                       (0x30)
140 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_RC                         (0x40)
141 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_GCA                        (0x50)
142 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_POINT                      (0x60)
143 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTHORIZATION                 (0x01)
144 #define MPI3_CI_MANIFEST_MPI_SUBSYSTEMID_IGNORED                   (0xffff)
145 #define MPI3_CI_MANIFEST_MPI_PKG_VER_STR_OFF_UNSPECIFIED           (0x00000000)
146 #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_DATE_STR_OFF_UNSPECIFIED    (0x00000000)
147 #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_TIME_STR_OFF_UNSPECIFIED    (0x00000000)
148 union mpi3_ci_manifest {
149 	struct mpi3_ci_manifest_mpi               mpi;
150 	__le32                                dword[1];
151 };
152 
153 #define MPI3_CI_MANIFEST_TYPE_MPI                                  (0x00)
154 struct mpi3_extended_image_header {
155 	u8                                image_type;
156 	u8                                reserved01[3];
157 	__le32                            checksum;
158 	__le32                            image_size;
159 	__le32                            next_image_header_offset;
160 	__le32                            reserved10[4];
161 	__le32                            identify_string[8];
162 };
163 
164 #define MPI3_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
165 #define MPI3_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
166 #define MPI3_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0c)
167 #define MPI3_EXT_IMAGE_HEADER_SIZE              (0x40)
168 #define MPI3_EXT_IMAGE_TYPE_UNSPECIFIED             (0x00)
169 #define MPI3_EXT_IMAGE_TYPE_NVDATA                  (0x03)
170 #define MPI3_EXT_IMAGE_TYPE_SUPPORTED_DEVICES       (0x07)
171 #define MPI3_EXT_IMAGE_TYPE_ENCRYPTED_HASH          (0x09)
172 #define MPI3_EXT_IMAGE_TYPE_RDE                     (0x0a)
173 #define MPI3_EXT_IMAGE_TYPE_AUXILIARY_PROCESSOR     (0x0b)
174 #define MPI3_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
175 #define MPI3_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xff)
176 struct mpi3_supported_device {
177 	__le16                     device_id;
178 	__le16                     vendor_id;
179 	__le16                     device_id_mask;
180 	__le16                     reserved06;
181 	u8                         low_pci_rev;
182 	u8                         high_pci_rev;
183 	__le16                     reserved0a;
184 	__le32                     reserved0c;
185 };
186 
187 #ifndef MPI3_SUPPORTED_DEVICE_MAX
188 #define MPI3_SUPPORTED_DEVICE_MAX                      (1)
189 #endif
190 struct mpi3_supported_devices_data {
191 	u8                         image_version;
192 	u8                         reserved01;
193 	u8                         num_devices;
194 	u8                         reserved03;
195 	__le32                     reserved04;
196 	struct mpi3_supported_device   supported_device[MPI3_SUPPORTED_DEVICE_MAX];
197 };
198 
199 #ifndef MPI3_ENCRYPTED_HASH_MAX
200 #define MPI3_ENCRYPTED_HASH_MAX                      (1)
201 #endif
202 struct mpi3_encrypted_hash_entry {
203 	u8                         hash_image_type;
204 	u8                         hash_algorithm;
205 	u8                         encryption_algorithm;
206 	u8                         reserved03;
207 	__le32                     reserved04;
208 	__le32                     encrypted_hash[MPI3_ENCRYPTED_HASH_MAX];
209 };
210 
211 #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_SIGNATURE      (0x03)
212 #define MPI3_HASH_ALGORITHM_VERSION_MASK             (0xe0)
213 #define MPI3_HASH_ALGORITHM_VERSION_NONE             (0x00)
214 #define MPI3_HASH_ALGORITHM_VERSION_SHA1             (0x20)
215 #define MPI3_HASH_ALGORITHM_VERSION_SHA2             (0x40)
216 #define MPI3_HASH_ALGORITHM_VERSION_SHA3             (0x60)
217 #define MPI3_HASH_ALGORITHM_SIZE_MASK                (0x1f)
218 #define MPI3_HASH_ALGORITHM_SIZE_UNUSED              (0x00)
219 #define MPI3_HASH_ALGORITHM_SIZE_SHA256              (0x01)
220 #define MPI3_HASH_ALGORITHM_SIZE_SHA512              (0x02)
221 #define MPI3_HASH_ALGORITHM_SIZE_SHA384              (0x03)
222 #define MPI3_ENCRYPTION_ALGORITHM_UNUSED             (0x00)
223 #define MPI3_ENCRYPTION_ALGORITHM_RSA256             (0x01)
224 #define MPI3_ENCRYPTION_ALGORITHM_RSA512             (0x02)
225 #define MPI3_ENCRYPTION_ALGORITHM_RSA1024            (0x03)
226 #define MPI3_ENCRYPTION_ALGORITHM_RSA2048            (0x04)
227 #define MPI3_ENCRYPTION_ALGORITHM_RSA4096            (0x05)
228 #define MPI3_ENCRYPTION_ALGORITHM_RSA3072            (0x06)
229 #ifndef MPI3_PUBLIC_KEY_MAX
230 #define MPI3_PUBLIC_KEY_MAX                          (1)
231 #endif
232 struct mpi3_encrypted_key_with_hash_entry {
233 	u8                         hash_image_type;
234 	u8                         hash_algorithm;
235 	u8                         encryption_algorithm;
236 	u8                         reserved03;
237 	__le32                     reserved04;
238 	__le32                     public_key[MPI3_PUBLIC_KEY_MAX];
239 };
240 
241 #ifndef MPI3_ENCRYPTED_HASH_ENTRY_MAX
242 #define MPI3_ENCRYPTED_HASH_ENTRY_MAX               (1)
243 #endif
244 struct mpi3_encrypted_hash_data {
245 	u8                                  image_version;
246 	u8                                  num_hash;
247 	__le16                              reserved02;
248 	__le32                              reserved04;
249 	struct mpi3_encrypted_hash_entry        encrypted_hash_entry[MPI3_ENCRYPTED_HASH_ENTRY_MAX];
250 };
251 
252 #ifndef MPI3_AUX_PROC_DATA_MAX
253 #define MPI3_AUX_PROC_DATA_MAX               (1)
254 #endif
255 struct mpi3_aux_processor_data {
256 	u8                         boot_method;
257 	u8                         num_load_addr;
258 	u8                         reserved02;
259 	u8                         type;
260 	__le32                     version;
261 	__le32                     load_address[8];
262 	__le32                     reserved28[22];
263 	__le32                     aux_processor_data[MPI3_AUX_PROC_DATA_MAX];
264 };
265 
266 #define MPI3_AUX_PROC_DATA_OFFSET                                     (0x80)
267 #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_MSG                          (0x00)
268 #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_DOORBELL                     (0x01)
269 #define MPI3_AUXPROCESSOR_BOOT_METHOD_COMPONENT                       (0x02)
270 #define MPI3_AUXPROCESSOR_TYPE_ARM_A15                                (0x00)
271 #define MPI3_AUXPROCESSOR_TYPE_ARM_M0                                 (0x01)
272 #define MPI3_AUXPROCESSOR_TYPE_ARM_R4                                 (0x02)
273 #endif
274