1c4a3e0a5SBagalkote, Sreenivas /* 2c4a3e0a5SBagalkote, Sreenivas * Linux MegaRAID driver for SAS based RAID controllers 3c4a3e0a5SBagalkote, Sreenivas * 4ae59057bSadam radford * Copyright (c) 2003-2012 LSI Corporation. 5c4a3e0a5SBagalkote, Sreenivas * 6c4a3e0a5SBagalkote, Sreenivas * This program is free software; you can redistribute it and/or 7c4a3e0a5SBagalkote, Sreenivas * modify it under the terms of the GNU General Public License 83f1530c1Sadam radford * as published by the Free Software Foundation; either version 2 93f1530c1Sadam radford * of the License, or (at your option) any later version. 103f1530c1Sadam radford * 113f1530c1Sadam radford * This program is distributed in the hope that it will be useful, 123f1530c1Sadam radford * but WITHOUT ANY WARRANTY; without even the implied warranty of 133f1530c1Sadam radford * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 143f1530c1Sadam radford * GNU General Public License for more details. 153f1530c1Sadam radford * 163f1530c1Sadam radford * You should have received a copy of the GNU General Public License 173f1530c1Sadam radford * along with this program; if not, write to the Free Software 183f1530c1Sadam radford * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19c4a3e0a5SBagalkote, Sreenivas * 20c4a3e0a5SBagalkote, Sreenivas * FILE: megaraid_sas.h 213f1530c1Sadam radford * 223f1530c1Sadam radford * Authors: LSI Corporation 233f1530c1Sadam radford * 243f1530c1Sadam radford * Send feedback to: <megaraidlinux@lsi.com> 253f1530c1Sadam radford * 263f1530c1Sadam radford * Mail to: LSI Corporation, 1621 Barber Lane, Milpitas, CA 95035 273f1530c1Sadam radford * ATTN: Linuxraid 28c4a3e0a5SBagalkote, Sreenivas */ 29c4a3e0a5SBagalkote, Sreenivas 30c4a3e0a5SBagalkote, Sreenivas #ifndef LSI_MEGARAID_SAS_H 31c4a3e0a5SBagalkote, Sreenivas #define LSI_MEGARAID_SAS_H 32c4a3e0a5SBagalkote, Sreenivas 33a69b74d3SRandy Dunlap /* 34c4a3e0a5SBagalkote, Sreenivas * MegaRAID SAS Driver meta data 35c4a3e0a5SBagalkote, Sreenivas */ 362b4857c3Sadam radford #define MEGASAS_VERSION "06.700.06.00-rc1" 372b4857c3Sadam radford #define MEGASAS_RELDATE "Aug. 31, 2013" 382b4857c3Sadam radford #define MEGASAS_EXT_VERSION "Sat. Aug. 31 17:00:00 PDT 2013" 390e98936cSSumant Patro 400e98936cSSumant Patro /* 410e98936cSSumant Patro * Device IDs 420e98936cSSumant Patro */ 430e98936cSSumant Patro #define PCI_DEVICE_ID_LSI_SAS1078R 0x0060 44af7a5647Sbo yang #define PCI_DEVICE_ID_LSI_SAS1078DE 0x007C 450e98936cSSumant Patro #define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413 466610a6b3SYang, Bo #define PCI_DEVICE_ID_LSI_SAS1078GEN2 0x0078 476610a6b3SYang, Bo #define PCI_DEVICE_ID_LSI_SAS0079GEN2 0x0079 4887911122SYang, Bo #define PCI_DEVICE_ID_LSI_SAS0073SKINNY 0x0073 4987911122SYang, Bo #define PCI_DEVICE_ID_LSI_SAS0071SKINNY 0x0071 509c915a8cSadam radford #define PCI_DEVICE_ID_LSI_FUSION 0x005b 5136807e67Sadam radford #define PCI_DEVICE_ID_LSI_INVADER 0x005d 5221d3c710SSumit.Saxena@lsi.com #define PCI_DEVICE_ID_LSI_FURY 0x005f 530e98936cSSumant Patro 54c4a3e0a5SBagalkote, Sreenivas /* 5539b72c3cSSumit.Saxena@lsi.com * Intel HBA SSDIDs 5639b72c3cSSumit.Saxena@lsi.com */ 5739b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC080_SSDID 0x9360 5839b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC040_SSDID 0x9362 5939b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3SC008_SSDID 0x9380 6039b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3MC044_SSDID 0x9381 6139b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC080_SSDID 0x9341 6239b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC040_SSDID 0x9343 6339b72c3cSSumit.Saxena@lsi.com 6439b72c3cSSumit.Saxena@lsi.com /* 6539b72c3cSSumit.Saxena@lsi.com * Intel HBA branding 6639b72c3cSSumit.Saxena@lsi.com */ 6739b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC080_BRANDING \ 6839b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3DC080" 6939b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC040_BRANDING \ 7039b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3DC040" 7139b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3SC008_BRANDING \ 7239b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3SC008" 7339b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3MC044_BRANDING \ 7439b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3MC044" 7539b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC080_BRANDING \ 7639b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3WC080" 7739b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC040_BRANDING \ 7839b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3WC040" 7939b72c3cSSumit.Saxena@lsi.com 8039b72c3cSSumit.Saxena@lsi.com /* 81c4a3e0a5SBagalkote, Sreenivas * ===================================== 82c4a3e0a5SBagalkote, Sreenivas * MegaRAID SAS MFI firmware definitions 83c4a3e0a5SBagalkote, Sreenivas * ===================================== 84c4a3e0a5SBagalkote, Sreenivas */ 85c4a3e0a5SBagalkote, Sreenivas 86c4a3e0a5SBagalkote, Sreenivas /* 87c4a3e0a5SBagalkote, Sreenivas * MFI stands for MegaRAID SAS FW Interface. This is just a moniker for 88c4a3e0a5SBagalkote, Sreenivas * protocol between the software and firmware. Commands are issued using 89c4a3e0a5SBagalkote, Sreenivas * "message frames" 90c4a3e0a5SBagalkote, Sreenivas */ 91c4a3e0a5SBagalkote, Sreenivas 92a69b74d3SRandy Dunlap /* 93c4a3e0a5SBagalkote, Sreenivas * FW posts its state in upper 4 bits of outbound_msg_0 register 94c4a3e0a5SBagalkote, Sreenivas */ 95c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_MASK 0xF0000000 96c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_UNDEFINED 0x00000000 97c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_BB_INIT 0x10000000 98c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FW_INIT 0x40000000 99c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_WAIT_HANDSHAKE 0x60000000 100c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FW_INIT_2 0x70000000 101c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_DEVICE_SCAN 0x80000000 102e3bbff9fSSumant Patro #define MFI_STATE_BOOT_MESSAGE_PENDING 0x90000000 103c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FLUSH_CACHE 0xA0000000 104c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_READY 0xB0000000 105c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_OPERATIONAL 0xC0000000 106c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FAULT 0xF0000000 10739a98554Sbo yang #define MFI_RESET_REQUIRED 0x00000001 1087e70e733Sadam radford #define MFI_RESET_ADAPTER 0x00000002 109c4a3e0a5SBagalkote, Sreenivas #define MEGAMFI_FRAME_SIZE 64 110c4a3e0a5SBagalkote, Sreenivas 111a69b74d3SRandy Dunlap /* 112c4a3e0a5SBagalkote, Sreenivas * During FW init, clear pending cmds & reset state using inbound_msg_0 113c4a3e0a5SBagalkote, Sreenivas * 114c4a3e0a5SBagalkote, Sreenivas * ABORT : Abort all pending cmds 115c4a3e0a5SBagalkote, Sreenivas * READY : Move from OPERATIONAL to READY state; discard queue info 116c4a3e0a5SBagalkote, Sreenivas * MFIMODE : Discard (possible) low MFA posted in 64-bit mode (??) 117c4a3e0a5SBagalkote, Sreenivas * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver 118e3bbff9fSSumant Patro * HOTPLUG : Resume from Hotplug 119e3bbff9fSSumant Patro * MFI_STOP_ADP : Send signal to FW to stop processing 120c4a3e0a5SBagalkote, Sreenivas */ 12139a98554Sbo yang #define WRITE_SEQUENCE_OFFSET (0x0000000FC) /* I20 */ 12239a98554Sbo yang #define HOST_DIAGNOSTIC_OFFSET (0x000000F8) /* I20 */ 12339a98554Sbo yang #define DIAG_WRITE_ENABLE (0x00000080) 12439a98554Sbo yang #define DIAG_RESET_ADAPTER (0x00000004) 12539a98554Sbo yang 12639a98554Sbo yang #define MFI_ADP_RESET 0x00000040 127e3bbff9fSSumant Patro #define MFI_INIT_ABORT 0x00000001 128c4a3e0a5SBagalkote, Sreenivas #define MFI_INIT_READY 0x00000002 129c4a3e0a5SBagalkote, Sreenivas #define MFI_INIT_MFIMODE 0x00000004 130c4a3e0a5SBagalkote, Sreenivas #define MFI_INIT_CLEAR_HANDSHAKE 0x00000008 131e3bbff9fSSumant Patro #define MFI_INIT_HOTPLUG 0x00000010 132e3bbff9fSSumant Patro #define MFI_STOP_ADP 0x00000020 133e3bbff9fSSumant Patro #define MFI_RESET_FLAGS MFI_INIT_READY| \ 134e3bbff9fSSumant Patro MFI_INIT_MFIMODE| \ 135e3bbff9fSSumant Patro MFI_INIT_ABORT 136c4a3e0a5SBagalkote, Sreenivas 137a69b74d3SRandy Dunlap /* 138c4a3e0a5SBagalkote, Sreenivas * MFI frame flags 139c4a3e0a5SBagalkote, Sreenivas */ 140c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_POST_IN_REPLY_QUEUE 0x0000 141c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE 0x0001 142c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SGL32 0x0000 143c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SGL64 0x0002 144c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SENSE32 0x0000 145c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SENSE64 0x0004 146c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_NONE 0x0000 147c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_WRITE 0x0008 148c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_READ 0x0010 149c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_BOTH 0x0018 150f4c9a131SYang, Bo #define MFI_FRAME_IEEE 0x0020 151c4a3e0a5SBagalkote, Sreenivas 152a69b74d3SRandy Dunlap /* 153c4a3e0a5SBagalkote, Sreenivas * Definition for cmd_status 154c4a3e0a5SBagalkote, Sreenivas */ 155c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_STATUS_POLL_MODE 0xFF 156c4a3e0a5SBagalkote, Sreenivas 157a69b74d3SRandy Dunlap /* 158c4a3e0a5SBagalkote, Sreenivas * MFI command opcodes 159c4a3e0a5SBagalkote, Sreenivas */ 160c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_INIT 0x00 161c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_LD_READ 0x01 162c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_LD_WRITE 0x02 163c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_LD_SCSI_IO 0x03 164c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_PD_SCSI_IO 0x04 165c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_DCMD 0x05 166c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_ABORT 0x06 167c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_SMP 0x07 168c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_STP 0x08 169e5f93a36Sadam radford #define MFI_CMD_INVALID 0xff 170c4a3e0a5SBagalkote, Sreenivas 171c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_GET_INFO 0x01010000 172bdc6fb8dSYang, Bo #define MR_DCMD_LD_GET_LIST 0x03010000 17321c9e160Sadam radford #define MR_DCMD_LD_LIST_QUERY 0x03010100 174c4a3e0a5SBagalkote, Sreenivas 175c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000 176c4a3e0a5SBagalkote, Sreenivas #define MR_FLUSH_CTRL_CACHE 0x01 177c4a3e0a5SBagalkote, Sreenivas #define MR_FLUSH_DISK_CACHE 0x02 178c4a3e0a5SBagalkote, Sreenivas 179c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_SHUTDOWN 0x01050000 18031ea7088Sbo yang #define MR_DCMD_HIBERNATE_SHUTDOWN 0x01060000 181c4a3e0a5SBagalkote, Sreenivas #define MR_ENABLE_DRIVE_SPINDOWN 0x01 182c4a3e0a5SBagalkote, Sreenivas 183c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_EVENT_GET_INFO 0x01040100 184c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_EVENT_GET 0x01040300 185c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_EVENT_WAIT 0x01040500 186c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_LD_GET_PROPERTIES 0x03030000 187c4a3e0a5SBagalkote, Sreenivas 188c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CLUSTER 0x08000000 189c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CLUSTER_RESET_ALL 0x08010100 190c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CLUSTER_RESET_LD 0x08010200 19181e403ceSYang, Bo #define MR_DCMD_PD_LIST_QUERY 0x02010100 192c4a3e0a5SBagalkote, Sreenivas 193a69b74d3SRandy Dunlap /* 194bc93d425SSumit.Saxena@lsi.com * Global functions 195bc93d425SSumit.Saxena@lsi.com */ 196bc93d425SSumit.Saxena@lsi.com extern u8 MR_ValidateMapInfo(struct megasas_instance *instance); 197bc93d425SSumit.Saxena@lsi.com 198bc93d425SSumit.Saxena@lsi.com 199bc93d425SSumit.Saxena@lsi.com /* 200c4a3e0a5SBagalkote, Sreenivas * MFI command completion codes 201c4a3e0a5SBagalkote, Sreenivas */ 202c4a3e0a5SBagalkote, Sreenivas enum MFI_STAT { 203c4a3e0a5SBagalkote, Sreenivas MFI_STAT_OK = 0x00, 204c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_CMD = 0x01, 205c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_DCMD = 0x02, 206c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_PARAMETER = 0x03, 207c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04, 208c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ABORT_NOT_POSSIBLE = 0x05, 209c4a3e0a5SBagalkote, Sreenivas MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06, 210c4a3e0a5SBagalkote, Sreenivas MFI_STAT_APP_IN_USE = 0x07, 211c4a3e0a5SBagalkote, Sreenivas MFI_STAT_APP_NOT_INITIALIZED = 0x08, 212c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ARRAY_INDEX_INVALID = 0x09, 213c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a, 214c4a3e0a5SBagalkote, Sreenivas MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b, 215c4a3e0a5SBagalkote, Sreenivas MFI_STAT_DEVICE_NOT_FOUND = 0x0c, 216c4a3e0a5SBagalkote, Sreenivas MFI_STAT_DRIVE_TOO_SMALL = 0x0d, 217c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_ALLOC_FAIL = 0x0e, 218c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_BUSY = 0x0f, 219c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_ERROR = 0x10, 220c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_IMAGE_BAD = 0x11, 221c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12, 222c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_NOT_OPEN = 0x13, 223c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_NOT_STARTED = 0x14, 224c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLUSH_FAILED = 0x15, 225c4a3e0a5SBagalkote, Sreenivas MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16, 226c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_CC_IN_PROGRESS = 0x17, 227c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_INIT_IN_PROGRESS = 0x18, 228c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19, 229c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_MAX_CONFIGURED = 0x1a, 230c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_NOT_OPTIMAL = 0x1b, 231c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c, 232c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d, 233c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e, 234c4a3e0a5SBagalkote, Sreenivas MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f, 235c4a3e0a5SBagalkote, Sreenivas MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20, 236c4a3e0a5SBagalkote, Sreenivas MFI_STAT_MFC_HW_ERROR = 0x21, 237c4a3e0a5SBagalkote, Sreenivas MFI_STAT_NO_HW_PRESENT = 0x22, 238c4a3e0a5SBagalkote, Sreenivas MFI_STAT_NOT_FOUND = 0x23, 239c4a3e0a5SBagalkote, Sreenivas MFI_STAT_NOT_IN_ENCL = 0x24, 240c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25, 241c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PD_TYPE_WRONG = 0x26, 242c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PR_DISABLED = 0x27, 243c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ROW_INDEX_INVALID = 0x28, 244c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29, 245c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a, 246c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b, 247c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c, 248c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d, 249c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SCSI_IO_FAILED = 0x2e, 250c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f, 251c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SHUTDOWN_FAILED = 0x30, 252c4a3e0a5SBagalkote, Sreenivas MFI_STAT_TIME_NOT_SET = 0x31, 253c4a3e0a5SBagalkote, Sreenivas MFI_STAT_WRONG_STATE = 0x32, 254c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_OFFLINE = 0x33, 255c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34, 256c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35, 257c4a3e0a5SBagalkote, Sreenivas MFI_STAT_RESERVATION_IN_PROGRESS = 0x36, 258c4a3e0a5SBagalkote, Sreenivas MFI_STAT_I2C_ERRORS_DETECTED = 0x37, 259c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PCI_ERRORS_DETECTED = 0x38, 26036807e67Sadam radford MFI_STAT_CONFIG_SEQ_MISMATCH = 0x67, 261c4a3e0a5SBagalkote, Sreenivas 262c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_STATUS = 0xFF 263c4a3e0a5SBagalkote, Sreenivas }; 264c4a3e0a5SBagalkote, Sreenivas 265c4a3e0a5SBagalkote, Sreenivas /* 266c4a3e0a5SBagalkote, Sreenivas * Number of mailbox bytes in DCMD message frame 267c4a3e0a5SBagalkote, Sreenivas */ 268c4a3e0a5SBagalkote, Sreenivas #define MFI_MBOX_SIZE 12 269c4a3e0a5SBagalkote, Sreenivas 270c4a3e0a5SBagalkote, Sreenivas enum MR_EVT_CLASS { 271c4a3e0a5SBagalkote, Sreenivas 272c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_DEBUG = -2, 273c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_PROGRESS = -1, 274c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_INFO = 0, 275c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_WARNING = 1, 276c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_CRITICAL = 2, 277c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_FATAL = 3, 278c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_DEAD = 4, 279c4a3e0a5SBagalkote, Sreenivas 280c4a3e0a5SBagalkote, Sreenivas }; 281c4a3e0a5SBagalkote, Sreenivas 282c4a3e0a5SBagalkote, Sreenivas enum MR_EVT_LOCALE { 283c4a3e0a5SBagalkote, Sreenivas 284c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_LD = 0x0001, 285c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_PD = 0x0002, 286c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_ENCL = 0x0004, 287c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_BBU = 0x0008, 288c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_SAS = 0x0010, 289c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_CTRL = 0x0020, 290c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_CONFIG = 0x0040, 291c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_CLUSTER = 0x0080, 292c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_ALL = 0xffff, 293c4a3e0a5SBagalkote, Sreenivas 294c4a3e0a5SBagalkote, Sreenivas }; 295c4a3e0a5SBagalkote, Sreenivas 296c4a3e0a5SBagalkote, Sreenivas enum MR_EVT_ARGS { 297c4a3e0a5SBagalkote, Sreenivas 298c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_NONE, 299c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_CDB_SENSE, 300c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD, 301c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_COUNT, 302c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_LBA, 303c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_OWNER, 304c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_LBA_PD_LBA, 305c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_PROG, 306c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_STATE, 307c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_STRIP, 308c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD, 309c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_ERR, 310c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_LBA, 311c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_LBA_LD, 312c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_PROG, 313c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_STATE, 314c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PCI, 315c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_RATE, 316c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_STR, 317c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_TIME, 318c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_ECC, 31981e403ceSYang, Bo MR_EVT_ARGS_LD_PROP, 32081e403ceSYang, Bo MR_EVT_ARGS_PD_SPARE, 32181e403ceSYang, Bo MR_EVT_ARGS_PD_INDEX, 32281e403ceSYang, Bo MR_EVT_ARGS_DIAG_PASS, 32381e403ceSYang, Bo MR_EVT_ARGS_DIAG_FAIL, 32481e403ceSYang, Bo MR_EVT_ARGS_PD_LBA_LBA, 32581e403ceSYang, Bo MR_EVT_ARGS_PORT_PHY, 32681e403ceSYang, Bo MR_EVT_ARGS_PD_MISSING, 32781e403ceSYang, Bo MR_EVT_ARGS_PD_ADDRESS, 32881e403ceSYang, Bo MR_EVT_ARGS_BITMAP, 32981e403ceSYang, Bo MR_EVT_ARGS_CONNECTOR, 33081e403ceSYang, Bo MR_EVT_ARGS_PD_PD, 33181e403ceSYang, Bo MR_EVT_ARGS_PD_FRU, 33281e403ceSYang, Bo MR_EVT_ARGS_PD_PATHINFO, 33381e403ceSYang, Bo MR_EVT_ARGS_PD_POWER_STATE, 33481e403ceSYang, Bo MR_EVT_ARGS_GENERIC, 335c4a3e0a5SBagalkote, Sreenivas }; 336c4a3e0a5SBagalkote, Sreenivas 337c4a3e0a5SBagalkote, Sreenivas /* 33881e403ceSYang, Bo * define constants for device list query options 33981e403ceSYang, Bo */ 34081e403ceSYang, Bo enum MR_PD_QUERY_TYPE { 34181e403ceSYang, Bo MR_PD_QUERY_TYPE_ALL = 0, 34281e403ceSYang, Bo MR_PD_QUERY_TYPE_STATE = 1, 34381e403ceSYang, Bo MR_PD_QUERY_TYPE_POWER_STATE = 2, 34481e403ceSYang, Bo MR_PD_QUERY_TYPE_MEDIA_TYPE = 3, 34581e403ceSYang, Bo MR_PD_QUERY_TYPE_SPEED = 4, 34681e403ceSYang, Bo MR_PD_QUERY_TYPE_EXPOSED_TO_HOST = 5, 34781e403ceSYang, Bo }; 34881e403ceSYang, Bo 34921c9e160Sadam radford enum MR_LD_QUERY_TYPE { 35021c9e160Sadam radford MR_LD_QUERY_TYPE_ALL = 0, 35121c9e160Sadam radford MR_LD_QUERY_TYPE_EXPOSED_TO_HOST = 1, 35221c9e160Sadam radford MR_LD_QUERY_TYPE_USED_TGT_IDS = 2, 35321c9e160Sadam radford MR_LD_QUERY_TYPE_CLUSTER_ACCESS = 3, 35421c9e160Sadam radford MR_LD_QUERY_TYPE_CLUSTER_LOCALE = 4, 35521c9e160Sadam radford }; 35621c9e160Sadam radford 35721c9e160Sadam radford 3587e8a75f4SYang, Bo #define MR_EVT_CFG_CLEARED 0x0004 3597e8a75f4SYang, Bo #define MR_EVT_LD_STATE_CHANGE 0x0051 3607e8a75f4SYang, Bo #define MR_EVT_PD_INSERTED 0x005b 3617e8a75f4SYang, Bo #define MR_EVT_PD_REMOVED 0x0070 3627e8a75f4SYang, Bo #define MR_EVT_LD_CREATED 0x008a 3637e8a75f4SYang, Bo #define MR_EVT_LD_DELETED 0x008b 3647e8a75f4SYang, Bo #define MR_EVT_FOREIGN_CFG_IMPORTED 0x00db 3657e8a75f4SYang, Bo #define MR_EVT_LD_OFFLINE 0x00fc 3667e8a75f4SYang, Bo #define MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED 0x0152 3677e8a75f4SYang, Bo #define MAX_LOGICAL_DRIVES 64 3687e8a75f4SYang, Bo 36981e403ceSYang, Bo enum MR_PD_STATE { 37081e403ceSYang, Bo MR_PD_STATE_UNCONFIGURED_GOOD = 0x00, 37181e403ceSYang, Bo MR_PD_STATE_UNCONFIGURED_BAD = 0x01, 37281e403ceSYang, Bo MR_PD_STATE_HOT_SPARE = 0x02, 37381e403ceSYang, Bo MR_PD_STATE_OFFLINE = 0x10, 37481e403ceSYang, Bo MR_PD_STATE_FAILED = 0x11, 37581e403ceSYang, Bo MR_PD_STATE_REBUILD = 0x14, 37681e403ceSYang, Bo MR_PD_STATE_ONLINE = 0x18, 37781e403ceSYang, Bo MR_PD_STATE_COPYBACK = 0x20, 37881e403ceSYang, Bo MR_PD_STATE_SYSTEM = 0x40, 37981e403ceSYang, Bo }; 38081e403ceSYang, Bo 38181e403ceSYang, Bo 38281e403ceSYang, Bo /* 38381e403ceSYang, Bo * defines the physical drive address structure 38481e403ceSYang, Bo */ 38581e403ceSYang, Bo struct MR_PD_ADDRESS { 38681e403ceSYang, Bo u16 deviceId; 38781e403ceSYang, Bo u16 enclDeviceId; 38881e403ceSYang, Bo 38981e403ceSYang, Bo union { 39081e403ceSYang, Bo struct { 39181e403ceSYang, Bo u8 enclIndex; 39281e403ceSYang, Bo u8 slotNumber; 39381e403ceSYang, Bo } mrPdAddress; 39481e403ceSYang, Bo struct { 39581e403ceSYang, Bo u8 enclPosition; 39681e403ceSYang, Bo u8 enclConnectorIndex; 39781e403ceSYang, Bo } mrEnclAddress; 39881e403ceSYang, Bo }; 39981e403ceSYang, Bo u8 scsiDevType; 40081e403ceSYang, Bo union { 40181e403ceSYang, Bo u8 connectedPortBitmap; 40281e403ceSYang, Bo u8 connectedPortNumbers; 40381e403ceSYang, Bo }; 40481e403ceSYang, Bo u64 sasAddr[2]; 40581e403ceSYang, Bo } __packed; 40681e403ceSYang, Bo 40781e403ceSYang, Bo /* 40881e403ceSYang, Bo * defines the physical drive list structure 40981e403ceSYang, Bo */ 41081e403ceSYang, Bo struct MR_PD_LIST { 41181e403ceSYang, Bo u32 size; 41281e403ceSYang, Bo u32 count; 41381e403ceSYang, Bo struct MR_PD_ADDRESS addr[1]; 41481e403ceSYang, Bo } __packed; 41581e403ceSYang, Bo 41681e403ceSYang, Bo struct megasas_pd_list { 41781e403ceSYang, Bo u16 tid; 41881e403ceSYang, Bo u8 driveType; 41981e403ceSYang, Bo u8 driveState; 42081e403ceSYang, Bo } __packed; 42181e403ceSYang, Bo 42281e403ceSYang, Bo /* 423bdc6fb8dSYang, Bo * defines the logical drive reference structure 424bdc6fb8dSYang, Bo */ 425bdc6fb8dSYang, Bo union MR_LD_REF { 426bdc6fb8dSYang, Bo struct { 427bdc6fb8dSYang, Bo u8 targetId; 428bdc6fb8dSYang, Bo u8 reserved; 429bdc6fb8dSYang, Bo u16 seqNum; 430bdc6fb8dSYang, Bo }; 431bdc6fb8dSYang, Bo u32 ref; 432bdc6fb8dSYang, Bo } __packed; 433bdc6fb8dSYang, Bo 434bdc6fb8dSYang, Bo /* 435bdc6fb8dSYang, Bo * defines the logical drive list structure 436bdc6fb8dSYang, Bo */ 437bdc6fb8dSYang, Bo struct MR_LD_LIST { 438bdc6fb8dSYang, Bo u32 ldCount; 439bdc6fb8dSYang, Bo u32 reserved; 440bdc6fb8dSYang, Bo struct { 441bdc6fb8dSYang, Bo union MR_LD_REF ref; 442bdc6fb8dSYang, Bo u8 state; 443bdc6fb8dSYang, Bo u8 reserved[3]; 444bdc6fb8dSYang, Bo u64 size; 445bdc6fb8dSYang, Bo } ldList[MAX_LOGICAL_DRIVES]; 446bdc6fb8dSYang, Bo } __packed; 447bdc6fb8dSYang, Bo 44821c9e160Sadam radford struct MR_LD_TARGETID_LIST { 44921c9e160Sadam radford u32 size; 45021c9e160Sadam radford u32 count; 45121c9e160Sadam radford u8 pad[3]; 45221c9e160Sadam radford u8 targetId[MAX_LOGICAL_DRIVES]; 45321c9e160Sadam radford }; 45421c9e160Sadam radford 45521c9e160Sadam radford 456bdc6fb8dSYang, Bo /* 457c4a3e0a5SBagalkote, Sreenivas * SAS controller properties 458c4a3e0a5SBagalkote, Sreenivas */ 459c4a3e0a5SBagalkote, Sreenivas struct megasas_ctrl_prop { 460c4a3e0a5SBagalkote, Sreenivas 461c4a3e0a5SBagalkote, Sreenivas u16 seq_num; 462c4a3e0a5SBagalkote, Sreenivas u16 pred_fail_poll_interval; 463c4a3e0a5SBagalkote, Sreenivas u16 intr_throttle_count; 464c4a3e0a5SBagalkote, Sreenivas u16 intr_throttle_timeouts; 465c4a3e0a5SBagalkote, Sreenivas u8 rebuild_rate; 466c4a3e0a5SBagalkote, Sreenivas u8 patrol_read_rate; 467c4a3e0a5SBagalkote, Sreenivas u8 bgi_rate; 468c4a3e0a5SBagalkote, Sreenivas u8 cc_rate; 469c4a3e0a5SBagalkote, Sreenivas u8 recon_rate; 470c4a3e0a5SBagalkote, Sreenivas u8 cache_flush_interval; 471c4a3e0a5SBagalkote, Sreenivas u8 spinup_drv_count; 472c4a3e0a5SBagalkote, Sreenivas u8 spinup_delay; 473c4a3e0a5SBagalkote, Sreenivas u8 cluster_enable; 474c4a3e0a5SBagalkote, Sreenivas u8 coercion_mode; 475c4a3e0a5SBagalkote, Sreenivas u8 alarm_enable; 476c4a3e0a5SBagalkote, Sreenivas u8 disable_auto_rebuild; 477c4a3e0a5SBagalkote, Sreenivas u8 disable_battery_warn; 478c4a3e0a5SBagalkote, Sreenivas u8 ecc_bucket_size; 479c4a3e0a5SBagalkote, Sreenivas u16 ecc_bucket_leak_rate; 480c4a3e0a5SBagalkote, Sreenivas u8 restore_hotspare_on_insertion; 481c4a3e0a5SBagalkote, Sreenivas u8 expose_encl_devices; 48239a98554Sbo yang u8 maintainPdFailHistory; 48339a98554Sbo yang u8 disallowHostRequestReordering; 48439a98554Sbo yang u8 abortCCOnError; 48539a98554Sbo yang u8 loadBalanceMode; 48639a98554Sbo yang u8 disableAutoDetectBackplane; 487c4a3e0a5SBagalkote, Sreenivas 48839a98554Sbo yang u8 snapVDSpace; 48939a98554Sbo yang 49039a98554Sbo yang /* 49139a98554Sbo yang * Add properties that can be controlled by 49239a98554Sbo yang * a bit in the following structure. 49339a98554Sbo yang */ 49439a98554Sbo yang struct { 49594cd65ddSSumit.Saxena@lsi.com #if defined(__BIG_ENDIAN_BITFIELD) 49694cd65ddSSumit.Saxena@lsi.com u32 reserved:18; 49794cd65ddSSumit.Saxena@lsi.com u32 enableJBOD:1; 49894cd65ddSSumit.Saxena@lsi.com u32 disableSpinDownHS:1; 49994cd65ddSSumit.Saxena@lsi.com u32 allowBootWithPinnedCache:1; 50094cd65ddSSumit.Saxena@lsi.com u32 disableOnlineCtrlReset:1; 50194cd65ddSSumit.Saxena@lsi.com u32 enableSecretKeyControl:1; 50294cd65ddSSumit.Saxena@lsi.com u32 autoEnhancedImport:1; 50394cd65ddSSumit.Saxena@lsi.com u32 enableSpinDownUnconfigured:1; 50494cd65ddSSumit.Saxena@lsi.com u32 SSDPatrolReadEnabled:1; 50594cd65ddSSumit.Saxena@lsi.com u32 SSDSMARTerEnabled:1; 50694cd65ddSSumit.Saxena@lsi.com u32 disableNCQ:1; 50794cd65ddSSumit.Saxena@lsi.com u32 useFdeOnly:1; 50894cd65ddSSumit.Saxena@lsi.com u32 prCorrectUnconfiguredAreas:1; 50994cd65ddSSumit.Saxena@lsi.com u32 SMARTerEnabled:1; 51094cd65ddSSumit.Saxena@lsi.com u32 copyBackDisabled:1; 51194cd65ddSSumit.Saxena@lsi.com #else 51239a98554Sbo yang u32 copyBackDisabled:1; 51339a98554Sbo yang u32 SMARTerEnabled:1; 51439a98554Sbo yang u32 prCorrectUnconfiguredAreas:1; 51539a98554Sbo yang u32 useFdeOnly:1; 51639a98554Sbo yang u32 disableNCQ:1; 51739a98554Sbo yang u32 SSDSMARTerEnabled:1; 51839a98554Sbo yang u32 SSDPatrolReadEnabled:1; 51939a98554Sbo yang u32 enableSpinDownUnconfigured:1; 52039a98554Sbo yang u32 autoEnhancedImport:1; 52139a98554Sbo yang u32 enableSecretKeyControl:1; 52239a98554Sbo yang u32 disableOnlineCtrlReset:1; 52339a98554Sbo yang u32 allowBootWithPinnedCache:1; 52439a98554Sbo yang u32 disableSpinDownHS:1; 52539a98554Sbo yang u32 enableJBOD:1; 52639a98554Sbo yang u32 reserved:18; 52794cd65ddSSumit.Saxena@lsi.com #endif 52839a98554Sbo yang } OnOffProperties; 52939a98554Sbo yang u8 autoSnapVDSpace; 53039a98554Sbo yang u8 viewSpace; 53139a98554Sbo yang u16 spinDownTime; 53239a98554Sbo yang u8 reserved[24]; 53381e403ceSYang, Bo } __packed; 534c4a3e0a5SBagalkote, Sreenivas 535c4a3e0a5SBagalkote, Sreenivas /* 536c4a3e0a5SBagalkote, Sreenivas * SAS controller information 537c4a3e0a5SBagalkote, Sreenivas */ 538c4a3e0a5SBagalkote, Sreenivas struct megasas_ctrl_info { 539c4a3e0a5SBagalkote, Sreenivas 540c4a3e0a5SBagalkote, Sreenivas /* 541c4a3e0a5SBagalkote, Sreenivas * PCI device information 542c4a3e0a5SBagalkote, Sreenivas */ 543c4a3e0a5SBagalkote, Sreenivas struct { 544c4a3e0a5SBagalkote, Sreenivas 545c4a3e0a5SBagalkote, Sreenivas u16 vendor_id; 546c4a3e0a5SBagalkote, Sreenivas u16 device_id; 547c4a3e0a5SBagalkote, Sreenivas u16 sub_vendor_id; 548c4a3e0a5SBagalkote, Sreenivas u16 sub_device_id; 549c4a3e0a5SBagalkote, Sreenivas u8 reserved[24]; 550c4a3e0a5SBagalkote, Sreenivas 551c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pci; 552c4a3e0a5SBagalkote, Sreenivas 553c4a3e0a5SBagalkote, Sreenivas /* 554c4a3e0a5SBagalkote, Sreenivas * Host interface information 555c4a3e0a5SBagalkote, Sreenivas */ 556c4a3e0a5SBagalkote, Sreenivas struct { 557c4a3e0a5SBagalkote, Sreenivas 558c4a3e0a5SBagalkote, Sreenivas u8 PCIX:1; 559c4a3e0a5SBagalkote, Sreenivas u8 PCIE:1; 560c4a3e0a5SBagalkote, Sreenivas u8 iSCSI:1; 561c4a3e0a5SBagalkote, Sreenivas u8 SAS_3G:1; 562c4a3e0a5SBagalkote, Sreenivas u8 reserved_0:4; 563c4a3e0a5SBagalkote, Sreenivas u8 reserved_1[6]; 564c4a3e0a5SBagalkote, Sreenivas u8 port_count; 565c4a3e0a5SBagalkote, Sreenivas u64 port_addr[8]; 566c4a3e0a5SBagalkote, Sreenivas 567c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) host_interface; 568c4a3e0a5SBagalkote, Sreenivas 569c4a3e0a5SBagalkote, Sreenivas /* 570c4a3e0a5SBagalkote, Sreenivas * Device (backend) interface information 571c4a3e0a5SBagalkote, Sreenivas */ 572c4a3e0a5SBagalkote, Sreenivas struct { 573c4a3e0a5SBagalkote, Sreenivas 574c4a3e0a5SBagalkote, Sreenivas u8 SPI:1; 575c4a3e0a5SBagalkote, Sreenivas u8 SAS_3G:1; 576c4a3e0a5SBagalkote, Sreenivas u8 SATA_1_5G:1; 577c4a3e0a5SBagalkote, Sreenivas u8 SATA_3G:1; 578c4a3e0a5SBagalkote, Sreenivas u8 reserved_0:4; 579c4a3e0a5SBagalkote, Sreenivas u8 reserved_1[6]; 580c4a3e0a5SBagalkote, Sreenivas u8 port_count; 581c4a3e0a5SBagalkote, Sreenivas u64 port_addr[8]; 582c4a3e0a5SBagalkote, Sreenivas 583c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) device_interface; 584c4a3e0a5SBagalkote, Sreenivas 585c4a3e0a5SBagalkote, Sreenivas /* 586c4a3e0a5SBagalkote, Sreenivas * List of components residing in flash. All str are null terminated 587c4a3e0a5SBagalkote, Sreenivas */ 588c4a3e0a5SBagalkote, Sreenivas u32 image_check_word; 589c4a3e0a5SBagalkote, Sreenivas u32 image_component_count; 590c4a3e0a5SBagalkote, Sreenivas 591c4a3e0a5SBagalkote, Sreenivas struct { 592c4a3e0a5SBagalkote, Sreenivas 593c4a3e0a5SBagalkote, Sreenivas char name[8]; 594c4a3e0a5SBagalkote, Sreenivas char version[32]; 595c4a3e0a5SBagalkote, Sreenivas char build_date[16]; 596c4a3e0a5SBagalkote, Sreenivas char built_time[16]; 597c4a3e0a5SBagalkote, Sreenivas 598c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) image_component[8]; 599c4a3e0a5SBagalkote, Sreenivas 600c4a3e0a5SBagalkote, Sreenivas /* 601c4a3e0a5SBagalkote, Sreenivas * List of flash components that have been flashed on the card, but 602c4a3e0a5SBagalkote, Sreenivas * are not in use, pending reset of the adapter. This list will be 603c4a3e0a5SBagalkote, Sreenivas * empty if a flash operation has not occurred. All stings are null 604c4a3e0a5SBagalkote, Sreenivas * terminated 605c4a3e0a5SBagalkote, Sreenivas */ 606c4a3e0a5SBagalkote, Sreenivas u32 pending_image_component_count; 607c4a3e0a5SBagalkote, Sreenivas 608c4a3e0a5SBagalkote, Sreenivas struct { 609c4a3e0a5SBagalkote, Sreenivas 610c4a3e0a5SBagalkote, Sreenivas char name[8]; 611c4a3e0a5SBagalkote, Sreenivas char version[32]; 612c4a3e0a5SBagalkote, Sreenivas char build_date[16]; 613c4a3e0a5SBagalkote, Sreenivas char build_time[16]; 614c4a3e0a5SBagalkote, Sreenivas 615c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pending_image_component[8]; 616c4a3e0a5SBagalkote, Sreenivas 617c4a3e0a5SBagalkote, Sreenivas u8 max_arms; 618c4a3e0a5SBagalkote, Sreenivas u8 max_spans; 619c4a3e0a5SBagalkote, Sreenivas u8 max_arrays; 620c4a3e0a5SBagalkote, Sreenivas u8 max_lds; 621c4a3e0a5SBagalkote, Sreenivas 622c4a3e0a5SBagalkote, Sreenivas char product_name[80]; 623c4a3e0a5SBagalkote, Sreenivas char serial_no[32]; 624c4a3e0a5SBagalkote, Sreenivas 625c4a3e0a5SBagalkote, Sreenivas /* 626c4a3e0a5SBagalkote, Sreenivas * Other physical/controller/operation information. Indicates the 627c4a3e0a5SBagalkote, Sreenivas * presence of the hardware 628c4a3e0a5SBagalkote, Sreenivas */ 629c4a3e0a5SBagalkote, Sreenivas struct { 630c4a3e0a5SBagalkote, Sreenivas 631c4a3e0a5SBagalkote, Sreenivas u32 bbu:1; 632c4a3e0a5SBagalkote, Sreenivas u32 alarm:1; 633c4a3e0a5SBagalkote, Sreenivas u32 nvram:1; 634c4a3e0a5SBagalkote, Sreenivas u32 uart:1; 635c4a3e0a5SBagalkote, Sreenivas u32 reserved:28; 636c4a3e0a5SBagalkote, Sreenivas 637c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) hw_present; 638c4a3e0a5SBagalkote, Sreenivas 639c4a3e0a5SBagalkote, Sreenivas u32 current_fw_time; 640c4a3e0a5SBagalkote, Sreenivas 641c4a3e0a5SBagalkote, Sreenivas /* 642c4a3e0a5SBagalkote, Sreenivas * Maximum data transfer sizes 643c4a3e0a5SBagalkote, Sreenivas */ 644c4a3e0a5SBagalkote, Sreenivas u16 max_concurrent_cmds; 645c4a3e0a5SBagalkote, Sreenivas u16 max_sge_count; 646c4a3e0a5SBagalkote, Sreenivas u32 max_request_size; 647c4a3e0a5SBagalkote, Sreenivas 648c4a3e0a5SBagalkote, Sreenivas /* 649c4a3e0a5SBagalkote, Sreenivas * Logical and physical device counts 650c4a3e0a5SBagalkote, Sreenivas */ 651c4a3e0a5SBagalkote, Sreenivas u16 ld_present_count; 652c4a3e0a5SBagalkote, Sreenivas u16 ld_degraded_count; 653c4a3e0a5SBagalkote, Sreenivas u16 ld_offline_count; 654c4a3e0a5SBagalkote, Sreenivas 655c4a3e0a5SBagalkote, Sreenivas u16 pd_present_count; 656c4a3e0a5SBagalkote, Sreenivas u16 pd_disk_present_count; 657c4a3e0a5SBagalkote, Sreenivas u16 pd_disk_pred_failure_count; 658c4a3e0a5SBagalkote, Sreenivas u16 pd_disk_failed_count; 659c4a3e0a5SBagalkote, Sreenivas 660c4a3e0a5SBagalkote, Sreenivas /* 661c4a3e0a5SBagalkote, Sreenivas * Memory size information 662c4a3e0a5SBagalkote, Sreenivas */ 663c4a3e0a5SBagalkote, Sreenivas u16 nvram_size; 664c4a3e0a5SBagalkote, Sreenivas u16 memory_size; 665c4a3e0a5SBagalkote, Sreenivas u16 flash_size; 666c4a3e0a5SBagalkote, Sreenivas 667c4a3e0a5SBagalkote, Sreenivas /* 668c4a3e0a5SBagalkote, Sreenivas * Error counters 669c4a3e0a5SBagalkote, Sreenivas */ 670c4a3e0a5SBagalkote, Sreenivas u16 mem_correctable_error_count; 671c4a3e0a5SBagalkote, Sreenivas u16 mem_uncorrectable_error_count; 672c4a3e0a5SBagalkote, Sreenivas 673c4a3e0a5SBagalkote, Sreenivas /* 674c4a3e0a5SBagalkote, Sreenivas * Cluster information 675c4a3e0a5SBagalkote, Sreenivas */ 676c4a3e0a5SBagalkote, Sreenivas u8 cluster_permitted; 677c4a3e0a5SBagalkote, Sreenivas u8 cluster_active; 678c4a3e0a5SBagalkote, Sreenivas 679c4a3e0a5SBagalkote, Sreenivas /* 680c4a3e0a5SBagalkote, Sreenivas * Additional max data transfer sizes 681c4a3e0a5SBagalkote, Sreenivas */ 682c4a3e0a5SBagalkote, Sreenivas u16 max_strips_per_io; 683c4a3e0a5SBagalkote, Sreenivas 684c4a3e0a5SBagalkote, Sreenivas /* 685c4a3e0a5SBagalkote, Sreenivas * Controller capabilities structures 686c4a3e0a5SBagalkote, Sreenivas */ 687c4a3e0a5SBagalkote, Sreenivas struct { 688c4a3e0a5SBagalkote, Sreenivas 689c4a3e0a5SBagalkote, Sreenivas u32 raid_level_0:1; 690c4a3e0a5SBagalkote, Sreenivas u32 raid_level_1:1; 691c4a3e0a5SBagalkote, Sreenivas u32 raid_level_5:1; 692c4a3e0a5SBagalkote, Sreenivas u32 raid_level_1E:1; 693c4a3e0a5SBagalkote, Sreenivas u32 raid_level_6:1; 694c4a3e0a5SBagalkote, Sreenivas u32 reserved:27; 695c4a3e0a5SBagalkote, Sreenivas 696c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) raid_levels; 697c4a3e0a5SBagalkote, Sreenivas 698c4a3e0a5SBagalkote, Sreenivas struct { 699c4a3e0a5SBagalkote, Sreenivas 700c4a3e0a5SBagalkote, Sreenivas u32 rbld_rate:1; 701c4a3e0a5SBagalkote, Sreenivas u32 cc_rate:1; 702c4a3e0a5SBagalkote, Sreenivas u32 bgi_rate:1; 703c4a3e0a5SBagalkote, Sreenivas u32 recon_rate:1; 704c4a3e0a5SBagalkote, Sreenivas u32 patrol_rate:1; 705c4a3e0a5SBagalkote, Sreenivas u32 alarm_control:1; 706c4a3e0a5SBagalkote, Sreenivas u32 cluster_supported:1; 707c4a3e0a5SBagalkote, Sreenivas u32 bbu:1; 708c4a3e0a5SBagalkote, Sreenivas u32 spanning_allowed:1; 709c4a3e0a5SBagalkote, Sreenivas u32 dedicated_hotspares:1; 710c4a3e0a5SBagalkote, Sreenivas u32 revertible_hotspares:1; 711c4a3e0a5SBagalkote, Sreenivas u32 foreign_config_import:1; 712c4a3e0a5SBagalkote, Sreenivas u32 self_diagnostic:1; 713c4a3e0a5SBagalkote, Sreenivas u32 mixed_redundancy_arr:1; 714c4a3e0a5SBagalkote, Sreenivas u32 global_hot_spares:1; 715c4a3e0a5SBagalkote, Sreenivas u32 reserved:17; 716c4a3e0a5SBagalkote, Sreenivas 717c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) adapter_operations; 718c4a3e0a5SBagalkote, Sreenivas 719c4a3e0a5SBagalkote, Sreenivas struct { 720c4a3e0a5SBagalkote, Sreenivas 721c4a3e0a5SBagalkote, Sreenivas u32 read_policy:1; 722c4a3e0a5SBagalkote, Sreenivas u32 write_policy:1; 723c4a3e0a5SBagalkote, Sreenivas u32 io_policy:1; 724c4a3e0a5SBagalkote, Sreenivas u32 access_policy:1; 725c4a3e0a5SBagalkote, Sreenivas u32 disk_cache_policy:1; 726c4a3e0a5SBagalkote, Sreenivas u32 reserved:27; 727c4a3e0a5SBagalkote, Sreenivas 728c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_operations; 729c4a3e0a5SBagalkote, Sreenivas 730c4a3e0a5SBagalkote, Sreenivas struct { 731c4a3e0a5SBagalkote, Sreenivas 732c4a3e0a5SBagalkote, Sreenivas u8 min; 733c4a3e0a5SBagalkote, Sreenivas u8 max; 734c4a3e0a5SBagalkote, Sreenivas u8 reserved[2]; 735c4a3e0a5SBagalkote, Sreenivas 736c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) stripe_sz_ops; 737c4a3e0a5SBagalkote, Sreenivas 738c4a3e0a5SBagalkote, Sreenivas struct { 739c4a3e0a5SBagalkote, Sreenivas 740c4a3e0a5SBagalkote, Sreenivas u32 force_online:1; 741c4a3e0a5SBagalkote, Sreenivas u32 force_offline:1; 742c4a3e0a5SBagalkote, Sreenivas u32 force_rebuild:1; 743c4a3e0a5SBagalkote, Sreenivas u32 reserved:29; 744c4a3e0a5SBagalkote, Sreenivas 745c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_operations; 746c4a3e0a5SBagalkote, Sreenivas 747c4a3e0a5SBagalkote, Sreenivas struct { 748c4a3e0a5SBagalkote, Sreenivas 749c4a3e0a5SBagalkote, Sreenivas u32 ctrl_supports_sas:1; 750c4a3e0a5SBagalkote, Sreenivas u32 ctrl_supports_sata:1; 751c4a3e0a5SBagalkote, Sreenivas u32 allow_mix_in_encl:1; 752c4a3e0a5SBagalkote, Sreenivas u32 allow_mix_in_ld:1; 753c4a3e0a5SBagalkote, Sreenivas u32 allow_sata_in_cluster:1; 754c4a3e0a5SBagalkote, Sreenivas u32 reserved:27; 755c4a3e0a5SBagalkote, Sreenivas 756c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_mix_support; 757c4a3e0a5SBagalkote, Sreenivas 758c4a3e0a5SBagalkote, Sreenivas /* 759c4a3e0a5SBagalkote, Sreenivas * Define ECC single-bit-error bucket information 760c4a3e0a5SBagalkote, Sreenivas */ 761c4a3e0a5SBagalkote, Sreenivas u8 ecc_bucket_count; 762c4a3e0a5SBagalkote, Sreenivas u8 reserved_2[11]; 763c4a3e0a5SBagalkote, Sreenivas 764c4a3e0a5SBagalkote, Sreenivas /* 765c4a3e0a5SBagalkote, Sreenivas * Include the controller properties (changeable items) 766c4a3e0a5SBagalkote, Sreenivas */ 767c4a3e0a5SBagalkote, Sreenivas struct megasas_ctrl_prop properties; 768c4a3e0a5SBagalkote, Sreenivas 769c4a3e0a5SBagalkote, Sreenivas /* 770c4a3e0a5SBagalkote, Sreenivas * Define FW pkg version (set in envt v'bles on OEM basis) 771c4a3e0a5SBagalkote, Sreenivas */ 772c4a3e0a5SBagalkote, Sreenivas char package_version[0x60]; 773c4a3e0a5SBagalkote, Sreenivas 774c4a3e0a5SBagalkote, Sreenivas 775bc93d425SSumit.Saxena@lsi.com /* 776bc93d425SSumit.Saxena@lsi.com * If adapterOperations.supportMoreThan8Phys is set, 777bc93d425SSumit.Saxena@lsi.com * and deviceInterface.portCount is greater than 8, 778bc93d425SSumit.Saxena@lsi.com * SAS Addrs for first 8 ports shall be populated in 779bc93d425SSumit.Saxena@lsi.com * deviceInterface.portAddr, and the rest shall be 780bc93d425SSumit.Saxena@lsi.com * populated in deviceInterfacePortAddr2. 781bc93d425SSumit.Saxena@lsi.com */ 782bc93d425SSumit.Saxena@lsi.com u64 deviceInterfacePortAddr2[8]; /*6a0h */ 783bc93d425SSumit.Saxena@lsi.com u8 reserved3[128]; /*6e0h */ 784bc93d425SSumit.Saxena@lsi.com 785bc93d425SSumit.Saxena@lsi.com struct { /*760h */ 786bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_0:4; 787bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_0:12; 788bc93d425SSumit.Saxena@lsi.com 789bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1:4; 790bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1:12; 791bc93d425SSumit.Saxena@lsi.com 792bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_5:4; 793bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_5:12; 794bc93d425SSumit.Saxena@lsi.com 795bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1E:4; 796bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1E:12; 797bc93d425SSumit.Saxena@lsi.com 798bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_6:4; 799bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_6:12; 800bc93d425SSumit.Saxena@lsi.com 801bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_10:4; 802bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_10:12; 803bc93d425SSumit.Saxena@lsi.com 804bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_50:4; 805bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_50:12; 806bc93d425SSumit.Saxena@lsi.com 807bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_60:4; 808bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_60:12; 809bc93d425SSumit.Saxena@lsi.com 810bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1E_RLQ0:4; 811bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1E_RLQ0:12; 812bc93d425SSumit.Saxena@lsi.com 813bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1E0_RLQ0:4; 814bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1E0_RLQ0:12; 815bc93d425SSumit.Saxena@lsi.com 816bc93d425SSumit.Saxena@lsi.com u16 reserved[6]; 817bc93d425SSumit.Saxena@lsi.com } pdsForRaidLevels; 818bc93d425SSumit.Saxena@lsi.com 819bc93d425SSumit.Saxena@lsi.com u16 maxPds; /*780h */ 820bc93d425SSumit.Saxena@lsi.com u16 maxDedHSPs; /*782h */ 821bc93d425SSumit.Saxena@lsi.com u16 maxGlobalHSPs; /*784h */ 822bc93d425SSumit.Saxena@lsi.com u16 ddfSize; /*786h */ 823bc93d425SSumit.Saxena@lsi.com u8 maxLdsPerArray; /*788h */ 824bc93d425SSumit.Saxena@lsi.com u8 partitionsInDDF; /*789h */ 825bc93d425SSumit.Saxena@lsi.com u8 lockKeyBinding; /*78ah */ 826bc93d425SSumit.Saxena@lsi.com u8 maxPITsPerLd; /*78bh */ 827bc93d425SSumit.Saxena@lsi.com u8 maxViewsPerLd; /*78ch */ 828bc93d425SSumit.Saxena@lsi.com u8 maxTargetId; /*78dh */ 829bc93d425SSumit.Saxena@lsi.com u16 maxBvlVdSize; /*78eh */ 830bc93d425SSumit.Saxena@lsi.com 831bc93d425SSumit.Saxena@lsi.com u16 maxConfigurableSSCSize; /*790h */ 832bc93d425SSumit.Saxena@lsi.com u16 currentSSCsize; /*792h */ 833bc93d425SSumit.Saxena@lsi.com 834bc93d425SSumit.Saxena@lsi.com char expanderFwVersion[12]; /*794h */ 835bc93d425SSumit.Saxena@lsi.com 836bc93d425SSumit.Saxena@lsi.com u16 PFKTrialTimeRemaining; /*7A0h */ 837bc93d425SSumit.Saxena@lsi.com 838bc93d425SSumit.Saxena@lsi.com u16 cacheMemorySize; /*7A2h */ 839bc93d425SSumit.Saxena@lsi.com 840bc93d425SSumit.Saxena@lsi.com struct { /*7A4h */ 84194cd65ddSSumit.Saxena@lsi.com #if defined(__BIG_ENDIAN_BITFIELD) 84294cd65ddSSumit.Saxena@lsi.com u32 reserved:11; 84394cd65ddSSumit.Saxena@lsi.com u32 supportUnevenSpans:1; 84494cd65ddSSumit.Saxena@lsi.com u32 dedicatedHotSparesLimited:1; 84594cd65ddSSumit.Saxena@lsi.com u32 headlessMode:1; 84694cd65ddSSumit.Saxena@lsi.com u32 supportEmulatedDrives:1; 84794cd65ddSSumit.Saxena@lsi.com u32 supportResetNow:1; 84894cd65ddSSumit.Saxena@lsi.com u32 realTimeScheduler:1; 84994cd65ddSSumit.Saxena@lsi.com u32 supportSSDPatrolRead:1; 85094cd65ddSSumit.Saxena@lsi.com u32 supportPerfTuning:1; 85194cd65ddSSumit.Saxena@lsi.com u32 disableOnlinePFKChange:1; 85294cd65ddSSumit.Saxena@lsi.com u32 supportJBOD:1; 85394cd65ddSSumit.Saxena@lsi.com u32 supportBootTimePFKChange:1; 85494cd65ddSSumit.Saxena@lsi.com u32 supportSetLinkSpeed:1; 85594cd65ddSSumit.Saxena@lsi.com u32 supportEmergencySpares:1; 85694cd65ddSSumit.Saxena@lsi.com u32 supportSuspendResumeBGops:1; 85794cd65ddSSumit.Saxena@lsi.com u32 blockSSDWriteCacheChange:1; 85894cd65ddSSumit.Saxena@lsi.com u32 supportShieldState:1; 85994cd65ddSSumit.Saxena@lsi.com u32 supportLdBBMInfo:1; 86094cd65ddSSumit.Saxena@lsi.com u32 supportLdPIType3:1; 86194cd65ddSSumit.Saxena@lsi.com u32 supportLdPIType2:1; 86294cd65ddSSumit.Saxena@lsi.com u32 supportLdPIType1:1; 86394cd65ddSSumit.Saxena@lsi.com u32 supportPIcontroller:1; 86494cd65ddSSumit.Saxena@lsi.com #else 865bc93d425SSumit.Saxena@lsi.com u32 supportPIcontroller:1; 866bc93d425SSumit.Saxena@lsi.com u32 supportLdPIType1:1; 867bc93d425SSumit.Saxena@lsi.com u32 supportLdPIType2:1; 868bc93d425SSumit.Saxena@lsi.com u32 supportLdPIType3:1; 869bc93d425SSumit.Saxena@lsi.com u32 supportLdBBMInfo:1; 870bc93d425SSumit.Saxena@lsi.com u32 supportShieldState:1; 871bc93d425SSumit.Saxena@lsi.com u32 blockSSDWriteCacheChange:1; 872bc93d425SSumit.Saxena@lsi.com u32 supportSuspendResumeBGops:1; 873bc93d425SSumit.Saxena@lsi.com u32 supportEmergencySpares:1; 874bc93d425SSumit.Saxena@lsi.com u32 supportSetLinkSpeed:1; 875bc93d425SSumit.Saxena@lsi.com u32 supportBootTimePFKChange:1; 876bc93d425SSumit.Saxena@lsi.com u32 supportJBOD:1; 877bc93d425SSumit.Saxena@lsi.com u32 disableOnlinePFKChange:1; 878bc93d425SSumit.Saxena@lsi.com u32 supportPerfTuning:1; 879bc93d425SSumit.Saxena@lsi.com u32 supportSSDPatrolRead:1; 880bc93d425SSumit.Saxena@lsi.com u32 realTimeScheduler:1; 881bc93d425SSumit.Saxena@lsi.com 882bc93d425SSumit.Saxena@lsi.com u32 supportResetNow:1; 883bc93d425SSumit.Saxena@lsi.com u32 supportEmulatedDrives:1; 884bc93d425SSumit.Saxena@lsi.com u32 headlessMode:1; 885bc93d425SSumit.Saxena@lsi.com u32 dedicatedHotSparesLimited:1; 886bc93d425SSumit.Saxena@lsi.com 887bc93d425SSumit.Saxena@lsi.com 888bc93d425SSumit.Saxena@lsi.com u32 supportUnevenSpans:1; 889bc93d425SSumit.Saxena@lsi.com u32 reserved:11; 89094cd65ddSSumit.Saxena@lsi.com #endif 891bc93d425SSumit.Saxena@lsi.com } adapterOperations2; 892bc93d425SSumit.Saxena@lsi.com 893bc93d425SSumit.Saxena@lsi.com u8 driverVersion[32]; /*7A8h */ 894bc93d425SSumit.Saxena@lsi.com u8 maxDAPdCountSpinup60; /*7C8h */ 895bc93d425SSumit.Saxena@lsi.com u8 temperatureROC; /*7C9h */ 896bc93d425SSumit.Saxena@lsi.com u8 temperatureCtrl; /*7CAh */ 897bc93d425SSumit.Saxena@lsi.com u8 reserved4; /*7CBh */ 898bc93d425SSumit.Saxena@lsi.com u16 maxConfigurablePds; /*7CCh */ 899bc93d425SSumit.Saxena@lsi.com 900bc93d425SSumit.Saxena@lsi.com 901bc93d425SSumit.Saxena@lsi.com u8 reserved5[2]; /*0x7CDh */ 902bc93d425SSumit.Saxena@lsi.com 903bc93d425SSumit.Saxena@lsi.com /* 904bc93d425SSumit.Saxena@lsi.com * HA cluster information 905bc93d425SSumit.Saxena@lsi.com */ 906bc93d425SSumit.Saxena@lsi.com struct { 907bc93d425SSumit.Saxena@lsi.com u32 peerIsPresent:1; 908bc93d425SSumit.Saxena@lsi.com u32 peerIsIncompatible:1; 909bc93d425SSumit.Saxena@lsi.com u32 hwIncompatible:1; 910bc93d425SSumit.Saxena@lsi.com u32 fwVersionMismatch:1; 911bc93d425SSumit.Saxena@lsi.com u32 ctrlPropIncompatible:1; 912bc93d425SSumit.Saxena@lsi.com u32 premiumFeatureMismatch:1; 913bc93d425SSumit.Saxena@lsi.com u32 reserved:26; 914bc93d425SSumit.Saxena@lsi.com } cluster; 915bc93d425SSumit.Saxena@lsi.com 916bc93d425SSumit.Saxena@lsi.com char clusterId[16]; /*7D4h */ 917bc93d425SSumit.Saxena@lsi.com 918bc93d425SSumit.Saxena@lsi.com u8 pad[0x800-0x7E4]; /*7E4 */ 91981e403ceSYang, Bo } __packed; 920c4a3e0a5SBagalkote, Sreenivas 921c4a3e0a5SBagalkote, Sreenivas /* 922c4a3e0a5SBagalkote, Sreenivas * =============================== 923c4a3e0a5SBagalkote, Sreenivas * MegaRAID SAS driver definitions 924c4a3e0a5SBagalkote, Sreenivas * =============================== 925c4a3e0a5SBagalkote, Sreenivas */ 926c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_PD_CHANNELS 2 92721c9e160Sadam radford #define MEGASAS_MAX_LD_CHANNELS 1 928c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_CHANNELS (MEGASAS_MAX_PD_CHANNELS + \ 929c4a3e0a5SBagalkote, Sreenivas MEGASAS_MAX_LD_CHANNELS) 930c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_DEV_PER_CHANNEL 128 931c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_DEFAULT_INIT_ID -1 932c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_LUN 8 933c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_LD 64 9346bf579a3Sadam radford #define MEGASAS_DEFAULT_CMD_PER_LUN 256 93581e403ceSYang, Bo #define MEGASAS_MAX_PD (MEGASAS_MAX_PD_CHANNELS * \ 93681e403ceSYang, Bo MEGASAS_MAX_DEV_PER_CHANNEL) 937bdc6fb8dSYang, Bo #define MEGASAS_MAX_LD_IDS (MEGASAS_MAX_LD_CHANNELS * \ 938bdc6fb8dSYang, Bo MEGASAS_MAX_DEV_PER_CHANNEL) 939c4a3e0a5SBagalkote, Sreenivas 9401fd10685SYang, Bo #define MEGASAS_MAX_SECTORS (2*1024) 94142a8d2b3Sadam radford #define MEGASAS_MAX_SECTORS_IEEE (2*128) 942658dcedbSSumant Patro #define MEGASAS_DBG_LVL 1 943658dcedbSSumant Patro 94405e9ebbeSSumant Patro #define MEGASAS_FW_BUSY 1 94505e9ebbeSSumant Patro 946d532dbe2Sbo yang /* Frame Type */ 947d532dbe2Sbo yang #define IO_FRAME 0 948d532dbe2Sbo yang #define PTHRU_FRAME 1 949d532dbe2Sbo yang 950c4a3e0a5SBagalkote, Sreenivas /* 951c4a3e0a5SBagalkote, Sreenivas * When SCSI mid-layer calls driver's reset routine, driver waits for 952c4a3e0a5SBagalkote, Sreenivas * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note 953c4a3e0a5SBagalkote, Sreenivas * that the driver cannot _actually_ abort or reset pending commands. While 954c4a3e0a5SBagalkote, Sreenivas * it is waiting for the commands to complete, it prints a diagnostic message 955c4a3e0a5SBagalkote, Sreenivas * every MEGASAS_RESET_NOTICE_INTERVAL seconds 956c4a3e0a5SBagalkote, Sreenivas */ 957c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_RESET_WAIT_TIME 180 9582a3681e5SSumant Patro #define MEGASAS_INTERNAL_CMD_WAIT_TIME 180 959c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_RESET_NOTICE_INTERVAL 5 960c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_IOCTL_CMD 0 96105e9ebbeSSumant Patro #define MEGASAS_DEFAULT_CMD_TIMEOUT 90 962c5daa6a9Sadam radford #define MEGASAS_THROTTLE_QUEUE_DEPTH 16 963c4a3e0a5SBagalkote, Sreenivas 964c4a3e0a5SBagalkote, Sreenivas /* 965c4a3e0a5SBagalkote, Sreenivas * FW reports the maximum of number of commands that it can accept (maximum 966c4a3e0a5SBagalkote, Sreenivas * commands that can be outstanding) at any time. The driver must report a 967c4a3e0a5SBagalkote, Sreenivas * lower number to the mid layer because it can issue a few internal commands 968c4a3e0a5SBagalkote, Sreenivas * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs 969c4a3e0a5SBagalkote, Sreenivas * is shown below 970c4a3e0a5SBagalkote, Sreenivas */ 971c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_INT_CMDS 32 9727bebf5c7SYang, Bo #define MEGASAS_SKINNY_INT_CMDS 5 973c4a3e0a5SBagalkote, Sreenivas 974d46a3ad6SSumit.Saxena@lsi.com #define MEGASAS_MAX_MSIX_QUEUES 128 975c4a3e0a5SBagalkote, Sreenivas /* 976c4a3e0a5SBagalkote, Sreenivas * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit 977c4a3e0a5SBagalkote, Sreenivas * SGLs based on the size of dma_addr_t 978c4a3e0a5SBagalkote, Sreenivas */ 979c4a3e0a5SBagalkote, Sreenivas #define IS_DMA64 (sizeof(dma_addr_t) == 8) 980c4a3e0a5SBagalkote, Sreenivas 98139a98554Sbo yang #define MFI_XSCALE_OMR0_CHANGE_INTERRUPT 0x00000001 98239a98554Sbo yang 98339a98554Sbo yang #define MFI_INTR_FLAG_REPLY_MESSAGE 0x00000001 98439a98554Sbo yang #define MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE 0x00000002 98539a98554Sbo yang #define MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT 0x00000004 98639a98554Sbo yang 987c4a3e0a5SBagalkote, Sreenivas #define MFI_OB_INTR_STATUS_MASK 0x00000002 98814faea9fSbo yang #define MFI_POLL_TIMEOUT_SECS 60 989c4a3e0a5SBagalkote, Sreenivas 990f9876f0bSSumant Patro #define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000 9916610a6b3SYang, Bo #define MFI_REPLY_GEN2_MESSAGE_INTERRUPT 0x00000001 9926610a6b3SYang, Bo #define MFI_GEN2_ENABLE_INTERRUPT_MASK (0x00000001 | 0x00000004) 99387911122SYang, Bo #define MFI_REPLY_SKINNY_MESSAGE_INTERRUPT 0x40000000 99487911122SYang, Bo #define MFI_SKINNY_ENABLE_INTERRUPT_MASK (0x00000001) 9950e98936cSSumant Patro 99639a98554Sbo yang #define MFI_1068_PCSR_OFFSET 0x84 99739a98554Sbo yang #define MFI_1068_FW_HANDSHAKE_OFFSET 0x64 99839a98554Sbo yang #define MFI_1068_FW_READY 0xDDDD0000 999d46a3ad6SSumit.Saxena@lsi.com 1000d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_REPLY_QUEUES_OFFSET 0X0000001F 1001d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_REPLY_QUEUES_EXT_OFFSET 0X003FC000 1002d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT 14 1003d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_MSIX_REG_ARRAY 16 10040e98936cSSumant Patro /* 10050e98936cSSumant Patro * register set for both 1068 and 1078 controllers 10060e98936cSSumant Patro * structure extended for 1078 registers 10070e98936cSSumant Patro */ 1008c4a3e0a5SBagalkote, Sreenivas 1009f9876f0bSSumant Patro struct megasas_register_set { 10109c915a8cSadam radford u32 doorbell; /*0000h*/ 10119c915a8cSadam radford u32 fusion_seq_offset; /*0004h*/ 10129c915a8cSadam radford u32 fusion_host_diag; /*0008h*/ 10139c915a8cSadam radford u32 reserved_01; /*000Ch*/ 1014c4a3e0a5SBagalkote, Sreenivas 1015c4a3e0a5SBagalkote, Sreenivas u32 inbound_msg_0; /*0010h*/ 1016c4a3e0a5SBagalkote, Sreenivas u32 inbound_msg_1; /*0014h*/ 1017c4a3e0a5SBagalkote, Sreenivas u32 outbound_msg_0; /*0018h*/ 1018c4a3e0a5SBagalkote, Sreenivas u32 outbound_msg_1; /*001Ch*/ 1019c4a3e0a5SBagalkote, Sreenivas 1020c4a3e0a5SBagalkote, Sreenivas u32 inbound_doorbell; /*0020h*/ 1021c4a3e0a5SBagalkote, Sreenivas u32 inbound_intr_status; /*0024h*/ 1022c4a3e0a5SBagalkote, Sreenivas u32 inbound_intr_mask; /*0028h*/ 1023c4a3e0a5SBagalkote, Sreenivas 1024c4a3e0a5SBagalkote, Sreenivas u32 outbound_doorbell; /*002Ch*/ 1025c4a3e0a5SBagalkote, Sreenivas u32 outbound_intr_status; /*0030h*/ 1026c4a3e0a5SBagalkote, Sreenivas u32 outbound_intr_mask; /*0034h*/ 1027c4a3e0a5SBagalkote, Sreenivas 1028c4a3e0a5SBagalkote, Sreenivas u32 reserved_1[2]; /*0038h*/ 1029c4a3e0a5SBagalkote, Sreenivas 1030c4a3e0a5SBagalkote, Sreenivas u32 inbound_queue_port; /*0040h*/ 1031c4a3e0a5SBagalkote, Sreenivas u32 outbound_queue_port; /*0044h*/ 1032c4a3e0a5SBagalkote, Sreenivas 10339c915a8cSadam radford u32 reserved_2[9]; /*0048h*/ 10349c915a8cSadam radford u32 reply_post_host_index; /*006Ch*/ 10359c915a8cSadam radford u32 reserved_2_2[12]; /*0070h*/ 1036c4a3e0a5SBagalkote, Sreenivas 1037f9876f0bSSumant Patro u32 outbound_doorbell_clear; /*00A0h*/ 1038f9876f0bSSumant Patro 1039f9876f0bSSumant Patro u32 reserved_3[3]; /*00A4h*/ 1040f9876f0bSSumant Patro 1041f9876f0bSSumant Patro u32 outbound_scratch_pad ; /*00B0h*/ 10429c915a8cSadam radford u32 outbound_scratch_pad_2; /*00B4h*/ 1043f9876f0bSSumant Patro 10449c915a8cSadam radford u32 reserved_4[2]; /*00B8h*/ 1045f9876f0bSSumant Patro 1046f9876f0bSSumant Patro u32 inbound_low_queue_port ; /*00C0h*/ 1047f9876f0bSSumant Patro 1048f9876f0bSSumant Patro u32 inbound_high_queue_port ; /*00C4h*/ 1049f9876f0bSSumant Patro 1050f9876f0bSSumant Patro u32 reserved_5; /*00C8h*/ 105139a98554Sbo yang u32 res_6[11]; /*CCh*/ 105239a98554Sbo yang u32 host_diag; 105339a98554Sbo yang u32 seq_offset; 105439a98554Sbo yang u32 index_registers[807]; /*00CCh*/ 1055c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1056c4a3e0a5SBagalkote, Sreenivas 1057c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 { 1058c4a3e0a5SBagalkote, Sreenivas 1059c4a3e0a5SBagalkote, Sreenivas u32 phys_addr; 1060c4a3e0a5SBagalkote, Sreenivas u32 length; 1061c4a3e0a5SBagalkote, Sreenivas 1062c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1063c4a3e0a5SBagalkote, Sreenivas 1064c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 { 1065c4a3e0a5SBagalkote, Sreenivas 1066c4a3e0a5SBagalkote, Sreenivas u64 phys_addr; 1067c4a3e0a5SBagalkote, Sreenivas u32 length; 1068c4a3e0a5SBagalkote, Sreenivas 1069c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1070c4a3e0a5SBagalkote, Sreenivas 1071f4c9a131SYang, Bo struct megasas_sge_skinny { 1072f4c9a131SYang, Bo u64 phys_addr; 1073f4c9a131SYang, Bo u32 length; 1074f4c9a131SYang, Bo u32 flag; 1075f4c9a131SYang, Bo } __packed; 1076f4c9a131SYang, Bo 1077c4a3e0a5SBagalkote, Sreenivas union megasas_sgl { 1078c4a3e0a5SBagalkote, Sreenivas 1079c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[1]; 1080c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[1]; 1081f4c9a131SYang, Bo struct megasas_sge_skinny sge_skinny[1]; 1082c4a3e0a5SBagalkote, Sreenivas 1083c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1084c4a3e0a5SBagalkote, Sreenivas 1085c4a3e0a5SBagalkote, Sreenivas struct megasas_header { 1086c4a3e0a5SBagalkote, Sreenivas 1087c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1088c4a3e0a5SBagalkote, Sreenivas u8 sense_len; /*01h */ 1089c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1090c4a3e0a5SBagalkote, Sreenivas u8 scsi_status; /*03h */ 1091c4a3e0a5SBagalkote, Sreenivas 1092c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1093c4a3e0a5SBagalkote, Sreenivas u8 lun; /*05h */ 1094c4a3e0a5SBagalkote, Sreenivas u8 cdb_len; /*06h */ 1095c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1096c4a3e0a5SBagalkote, Sreenivas 1097c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1098c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1099c4a3e0a5SBagalkote, Sreenivas 1100c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1101c4a3e0a5SBagalkote, Sreenivas u16 timeout; /*12h */ 1102c4a3e0a5SBagalkote, Sreenivas u32 data_xferlen; /*14h */ 1103c4a3e0a5SBagalkote, Sreenivas 1104c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1105c4a3e0a5SBagalkote, Sreenivas 1106c4a3e0a5SBagalkote, Sreenivas union megasas_sgl_frame { 1107c4a3e0a5SBagalkote, Sreenivas 1108c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[8]; 1109c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[5]; 1110c4a3e0a5SBagalkote, Sreenivas 1111c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1112c4a3e0a5SBagalkote, Sreenivas 1113d46a3ad6SSumit.Saxena@lsi.com typedef union _MFI_CAPABILITIES { 1114d46a3ad6SSumit.Saxena@lsi.com struct { 111594cd65ddSSumit.Saxena@lsi.com #if defined(__BIG_ENDIAN_BITFIELD) 111694cd65ddSSumit.Saxena@lsi.com u32 reserved:30; 111794cd65ddSSumit.Saxena@lsi.com u32 support_additional_msix:1; 111894cd65ddSSumit.Saxena@lsi.com u32 support_fp_remote_lun:1; 111994cd65ddSSumit.Saxena@lsi.com #else 1120d46a3ad6SSumit.Saxena@lsi.com u32 support_fp_remote_lun:1; 1121d46a3ad6SSumit.Saxena@lsi.com u32 support_additional_msix:1; 1122d46a3ad6SSumit.Saxena@lsi.com u32 reserved:30; 112394cd65ddSSumit.Saxena@lsi.com #endif 1124d46a3ad6SSumit.Saxena@lsi.com } mfi_capabilities; 1125d46a3ad6SSumit.Saxena@lsi.com u32 reg; 1126d46a3ad6SSumit.Saxena@lsi.com } MFI_CAPABILITIES; 1127d46a3ad6SSumit.Saxena@lsi.com 1128c4a3e0a5SBagalkote, Sreenivas struct megasas_init_frame { 1129c4a3e0a5SBagalkote, Sreenivas 1130c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1131c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*01h */ 1132c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1133c4a3e0a5SBagalkote, Sreenivas 1134c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*03h */ 1135d46a3ad6SSumit.Saxena@lsi.com MFI_CAPABILITIES driver_operations; /*04h*/ 1136c4a3e0a5SBagalkote, Sreenivas 1137c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1138c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1139c4a3e0a5SBagalkote, Sreenivas 1140c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1141c4a3e0a5SBagalkote, Sreenivas u16 reserved_3; /*12h */ 1142c4a3e0a5SBagalkote, Sreenivas u32 data_xfer_len; /*14h */ 1143c4a3e0a5SBagalkote, Sreenivas 1144c4a3e0a5SBagalkote, Sreenivas u32 queue_info_new_phys_addr_lo; /*18h */ 1145c4a3e0a5SBagalkote, Sreenivas u32 queue_info_new_phys_addr_hi; /*1Ch */ 1146c4a3e0a5SBagalkote, Sreenivas u32 queue_info_old_phys_addr_lo; /*20h */ 1147c4a3e0a5SBagalkote, Sreenivas u32 queue_info_old_phys_addr_hi; /*24h */ 1148c4a3e0a5SBagalkote, Sreenivas 1149c4a3e0a5SBagalkote, Sreenivas u32 reserved_4[6]; /*28h */ 1150c4a3e0a5SBagalkote, Sreenivas 1151c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1152c4a3e0a5SBagalkote, Sreenivas 1153c4a3e0a5SBagalkote, Sreenivas struct megasas_init_queue_info { 1154c4a3e0a5SBagalkote, Sreenivas 1155c4a3e0a5SBagalkote, Sreenivas u32 init_flags; /*00h */ 1156c4a3e0a5SBagalkote, Sreenivas u32 reply_queue_entries; /*04h */ 1157c4a3e0a5SBagalkote, Sreenivas 1158c4a3e0a5SBagalkote, Sreenivas u32 reply_queue_start_phys_addr_lo; /*08h */ 1159c4a3e0a5SBagalkote, Sreenivas u32 reply_queue_start_phys_addr_hi; /*0Ch */ 1160c4a3e0a5SBagalkote, Sreenivas u32 producer_index_phys_addr_lo; /*10h */ 1161c4a3e0a5SBagalkote, Sreenivas u32 producer_index_phys_addr_hi; /*14h */ 1162c4a3e0a5SBagalkote, Sreenivas u32 consumer_index_phys_addr_lo; /*18h */ 1163c4a3e0a5SBagalkote, Sreenivas u32 consumer_index_phys_addr_hi; /*1Ch */ 1164c4a3e0a5SBagalkote, Sreenivas 1165c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1166c4a3e0a5SBagalkote, Sreenivas 1167c4a3e0a5SBagalkote, Sreenivas struct megasas_io_frame { 1168c4a3e0a5SBagalkote, Sreenivas 1169c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1170c4a3e0a5SBagalkote, Sreenivas u8 sense_len; /*01h */ 1171c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1172c4a3e0a5SBagalkote, Sreenivas u8 scsi_status; /*03h */ 1173c4a3e0a5SBagalkote, Sreenivas 1174c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1175c4a3e0a5SBagalkote, Sreenivas u8 access_byte; /*05h */ 1176c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*06h */ 1177c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1178c4a3e0a5SBagalkote, Sreenivas 1179c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1180c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1181c4a3e0a5SBagalkote, Sreenivas 1182c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1183c4a3e0a5SBagalkote, Sreenivas u16 timeout; /*12h */ 1184c4a3e0a5SBagalkote, Sreenivas u32 lba_count; /*14h */ 1185c4a3e0a5SBagalkote, Sreenivas 1186c4a3e0a5SBagalkote, Sreenivas u32 sense_buf_phys_addr_lo; /*18h */ 1187c4a3e0a5SBagalkote, Sreenivas u32 sense_buf_phys_addr_hi; /*1Ch */ 1188c4a3e0a5SBagalkote, Sreenivas 1189c4a3e0a5SBagalkote, Sreenivas u32 start_lba_lo; /*20h */ 1190c4a3e0a5SBagalkote, Sreenivas u32 start_lba_hi; /*24h */ 1191c4a3e0a5SBagalkote, Sreenivas 1192c4a3e0a5SBagalkote, Sreenivas union megasas_sgl sgl; /*28h */ 1193c4a3e0a5SBagalkote, Sreenivas 1194c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1195c4a3e0a5SBagalkote, Sreenivas 1196c4a3e0a5SBagalkote, Sreenivas struct megasas_pthru_frame { 1197c4a3e0a5SBagalkote, Sreenivas 1198c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1199c4a3e0a5SBagalkote, Sreenivas u8 sense_len; /*01h */ 1200c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1201c4a3e0a5SBagalkote, Sreenivas u8 scsi_status; /*03h */ 1202c4a3e0a5SBagalkote, Sreenivas 1203c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1204c4a3e0a5SBagalkote, Sreenivas u8 lun; /*05h */ 1205c4a3e0a5SBagalkote, Sreenivas u8 cdb_len; /*06h */ 1206c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1207c4a3e0a5SBagalkote, Sreenivas 1208c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1209c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1210c4a3e0a5SBagalkote, Sreenivas 1211c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1212c4a3e0a5SBagalkote, Sreenivas u16 timeout; /*12h */ 1213c4a3e0a5SBagalkote, Sreenivas u32 data_xfer_len; /*14h */ 1214c4a3e0a5SBagalkote, Sreenivas 1215c4a3e0a5SBagalkote, Sreenivas u32 sense_buf_phys_addr_lo; /*18h */ 1216c4a3e0a5SBagalkote, Sreenivas u32 sense_buf_phys_addr_hi; /*1Ch */ 1217c4a3e0a5SBagalkote, Sreenivas 1218c4a3e0a5SBagalkote, Sreenivas u8 cdb[16]; /*20h */ 1219c4a3e0a5SBagalkote, Sreenivas union megasas_sgl sgl; /*30h */ 1220c4a3e0a5SBagalkote, Sreenivas 1221c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1222c4a3e0a5SBagalkote, Sreenivas 1223c4a3e0a5SBagalkote, Sreenivas struct megasas_dcmd_frame { 1224c4a3e0a5SBagalkote, Sreenivas 1225c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1226c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*01h */ 1227c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1228c4a3e0a5SBagalkote, Sreenivas u8 reserved_1[4]; /*03h */ 1229c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1230c4a3e0a5SBagalkote, Sreenivas 1231c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1232c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1233c4a3e0a5SBagalkote, Sreenivas 1234c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1235c4a3e0a5SBagalkote, Sreenivas u16 timeout; /*12h */ 1236c4a3e0a5SBagalkote, Sreenivas 1237c4a3e0a5SBagalkote, Sreenivas u32 data_xfer_len; /*14h */ 1238c4a3e0a5SBagalkote, Sreenivas u32 opcode; /*18h */ 1239c4a3e0a5SBagalkote, Sreenivas 1240c4a3e0a5SBagalkote, Sreenivas union { /*1Ch */ 1241c4a3e0a5SBagalkote, Sreenivas u8 b[12]; 1242c4a3e0a5SBagalkote, Sreenivas u16 s[6]; 1243c4a3e0a5SBagalkote, Sreenivas u32 w[3]; 1244c4a3e0a5SBagalkote, Sreenivas } mbox; 1245c4a3e0a5SBagalkote, Sreenivas 1246c4a3e0a5SBagalkote, Sreenivas union megasas_sgl sgl; /*28h */ 1247c4a3e0a5SBagalkote, Sreenivas 1248c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1249c4a3e0a5SBagalkote, Sreenivas 1250c4a3e0a5SBagalkote, Sreenivas struct megasas_abort_frame { 1251c4a3e0a5SBagalkote, Sreenivas 1252c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1253c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*01h */ 1254c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1255c4a3e0a5SBagalkote, Sreenivas 1256c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*03h */ 1257c4a3e0a5SBagalkote, Sreenivas u32 reserved_2; /*04h */ 1258c4a3e0a5SBagalkote, Sreenivas 1259c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1260c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1261c4a3e0a5SBagalkote, Sreenivas 1262c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1263c4a3e0a5SBagalkote, Sreenivas u16 reserved_3; /*12h */ 1264c4a3e0a5SBagalkote, Sreenivas u32 reserved_4; /*14h */ 1265c4a3e0a5SBagalkote, Sreenivas 1266c4a3e0a5SBagalkote, Sreenivas u32 abort_context; /*18h */ 1267c4a3e0a5SBagalkote, Sreenivas u32 pad_1; /*1Ch */ 1268c4a3e0a5SBagalkote, Sreenivas 1269c4a3e0a5SBagalkote, Sreenivas u32 abort_mfi_phys_addr_lo; /*20h */ 1270c4a3e0a5SBagalkote, Sreenivas u32 abort_mfi_phys_addr_hi; /*24h */ 1271c4a3e0a5SBagalkote, Sreenivas 1272c4a3e0a5SBagalkote, Sreenivas u32 reserved_5[6]; /*28h */ 1273c4a3e0a5SBagalkote, Sreenivas 1274c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1275c4a3e0a5SBagalkote, Sreenivas 1276c4a3e0a5SBagalkote, Sreenivas struct megasas_smp_frame { 1277c4a3e0a5SBagalkote, Sreenivas 1278c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1279c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*01h */ 1280c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1281c4a3e0a5SBagalkote, Sreenivas u8 connection_status; /*03h */ 1282c4a3e0a5SBagalkote, Sreenivas 1283c4a3e0a5SBagalkote, Sreenivas u8 reserved_2[3]; /*04h */ 1284c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1285c4a3e0a5SBagalkote, Sreenivas 1286c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1287c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1288c4a3e0a5SBagalkote, Sreenivas 1289c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1290c4a3e0a5SBagalkote, Sreenivas u16 timeout; /*12h */ 1291c4a3e0a5SBagalkote, Sreenivas 1292c4a3e0a5SBagalkote, Sreenivas u32 data_xfer_len; /*14h */ 1293c4a3e0a5SBagalkote, Sreenivas u64 sas_addr; /*18h */ 1294c4a3e0a5SBagalkote, Sreenivas 1295c4a3e0a5SBagalkote, Sreenivas union { 1296c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[2]; /* [0]: resp [1]: req */ 1297c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[2]; /* [0]: resp [1]: req */ 1298c4a3e0a5SBagalkote, Sreenivas } sgl; 1299c4a3e0a5SBagalkote, Sreenivas 1300c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1301c4a3e0a5SBagalkote, Sreenivas 1302c4a3e0a5SBagalkote, Sreenivas struct megasas_stp_frame { 1303c4a3e0a5SBagalkote, Sreenivas 1304c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1305c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*01h */ 1306c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1307c4a3e0a5SBagalkote, Sreenivas u8 reserved_2; /*03h */ 1308c4a3e0a5SBagalkote, Sreenivas 1309c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1310c4a3e0a5SBagalkote, Sreenivas u8 reserved_3[2]; /*05h */ 1311c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1312c4a3e0a5SBagalkote, Sreenivas 1313c4a3e0a5SBagalkote, Sreenivas u32 context; /*08h */ 1314c4a3e0a5SBagalkote, Sreenivas u32 pad_0; /*0Ch */ 1315c4a3e0a5SBagalkote, Sreenivas 1316c4a3e0a5SBagalkote, Sreenivas u16 flags; /*10h */ 1317c4a3e0a5SBagalkote, Sreenivas u16 timeout; /*12h */ 1318c4a3e0a5SBagalkote, Sreenivas 1319c4a3e0a5SBagalkote, Sreenivas u32 data_xfer_len; /*14h */ 1320c4a3e0a5SBagalkote, Sreenivas 1321c4a3e0a5SBagalkote, Sreenivas u16 fis[10]; /*18h */ 1322c4a3e0a5SBagalkote, Sreenivas u32 stp_flags; 1323c4a3e0a5SBagalkote, Sreenivas 1324c4a3e0a5SBagalkote, Sreenivas union { 1325c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[2]; /* [0]: resp [1]: data */ 1326c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[2]; /* [0]: resp [1]: data */ 1327c4a3e0a5SBagalkote, Sreenivas } sgl; 1328c4a3e0a5SBagalkote, Sreenivas 1329c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1330c4a3e0a5SBagalkote, Sreenivas 1331c4a3e0a5SBagalkote, Sreenivas union megasas_frame { 1332c4a3e0a5SBagalkote, Sreenivas 1333c4a3e0a5SBagalkote, Sreenivas struct megasas_header hdr; 1334c4a3e0a5SBagalkote, Sreenivas struct megasas_init_frame init; 1335c4a3e0a5SBagalkote, Sreenivas struct megasas_io_frame io; 1336c4a3e0a5SBagalkote, Sreenivas struct megasas_pthru_frame pthru; 1337c4a3e0a5SBagalkote, Sreenivas struct megasas_dcmd_frame dcmd; 1338c4a3e0a5SBagalkote, Sreenivas struct megasas_abort_frame abort; 1339c4a3e0a5SBagalkote, Sreenivas struct megasas_smp_frame smp; 1340c4a3e0a5SBagalkote, Sreenivas struct megasas_stp_frame stp; 1341c4a3e0a5SBagalkote, Sreenivas 1342c4a3e0a5SBagalkote, Sreenivas u8 raw_bytes[64]; 1343c4a3e0a5SBagalkote, Sreenivas }; 1344c4a3e0a5SBagalkote, Sreenivas 1345c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd; 1346c4a3e0a5SBagalkote, Sreenivas 1347c4a3e0a5SBagalkote, Sreenivas union megasas_evt_class_locale { 1348c4a3e0a5SBagalkote, Sreenivas 1349c4a3e0a5SBagalkote, Sreenivas struct { 1350c4a3e0a5SBagalkote, Sreenivas u16 locale; 1351c4a3e0a5SBagalkote, Sreenivas u8 reserved; 1352c4a3e0a5SBagalkote, Sreenivas s8 class; 1353c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) members; 1354c4a3e0a5SBagalkote, Sreenivas 1355c4a3e0a5SBagalkote, Sreenivas u32 word; 1356c4a3e0a5SBagalkote, Sreenivas 1357c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1358c4a3e0a5SBagalkote, Sreenivas 1359c4a3e0a5SBagalkote, Sreenivas struct megasas_evt_log_info { 1360c4a3e0a5SBagalkote, Sreenivas u32 newest_seq_num; 1361c4a3e0a5SBagalkote, Sreenivas u32 oldest_seq_num; 1362c4a3e0a5SBagalkote, Sreenivas u32 clear_seq_num; 1363c4a3e0a5SBagalkote, Sreenivas u32 shutdown_seq_num; 1364c4a3e0a5SBagalkote, Sreenivas u32 boot_seq_num; 1365c4a3e0a5SBagalkote, Sreenivas 1366c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1367c4a3e0a5SBagalkote, Sreenivas 1368c4a3e0a5SBagalkote, Sreenivas struct megasas_progress { 1369c4a3e0a5SBagalkote, Sreenivas 1370c4a3e0a5SBagalkote, Sreenivas u16 progress; 1371c4a3e0a5SBagalkote, Sreenivas u16 elapsed_seconds; 1372c4a3e0a5SBagalkote, Sreenivas 1373c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1374c4a3e0a5SBagalkote, Sreenivas 1375c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld { 1376c4a3e0a5SBagalkote, Sreenivas 1377c4a3e0a5SBagalkote, Sreenivas u16 target_id; 1378c4a3e0a5SBagalkote, Sreenivas u8 ld_index; 1379c4a3e0a5SBagalkote, Sreenivas u8 reserved; 1380c4a3e0a5SBagalkote, Sreenivas 1381c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1382c4a3e0a5SBagalkote, Sreenivas 1383c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd { 1384c4a3e0a5SBagalkote, Sreenivas u16 device_id; 1385c4a3e0a5SBagalkote, Sreenivas u8 encl_index; 1386c4a3e0a5SBagalkote, Sreenivas u8 slot_number; 1387c4a3e0a5SBagalkote, Sreenivas 1388c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1389c4a3e0a5SBagalkote, Sreenivas 1390c4a3e0a5SBagalkote, Sreenivas struct megasas_evt_detail { 1391c4a3e0a5SBagalkote, Sreenivas 1392c4a3e0a5SBagalkote, Sreenivas u32 seq_num; 1393c4a3e0a5SBagalkote, Sreenivas u32 time_stamp; 1394c4a3e0a5SBagalkote, Sreenivas u32 code; 1395c4a3e0a5SBagalkote, Sreenivas union megasas_evt_class_locale cl; 1396c4a3e0a5SBagalkote, Sreenivas u8 arg_type; 1397c4a3e0a5SBagalkote, Sreenivas u8 reserved1[15]; 1398c4a3e0a5SBagalkote, Sreenivas 1399c4a3e0a5SBagalkote, Sreenivas union { 1400c4a3e0a5SBagalkote, Sreenivas struct { 1401c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1402c4a3e0a5SBagalkote, Sreenivas u8 cdb_length; 1403c4a3e0a5SBagalkote, Sreenivas u8 sense_length; 1404c4a3e0a5SBagalkote, Sreenivas u8 reserved[2]; 1405c4a3e0a5SBagalkote, Sreenivas u8 cdb[16]; 1406c4a3e0a5SBagalkote, Sreenivas u8 sense[64]; 1407c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) cdbSense; 1408c4a3e0a5SBagalkote, Sreenivas 1409c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1410c4a3e0a5SBagalkote, Sreenivas 1411c4a3e0a5SBagalkote, Sreenivas struct { 1412c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1413c4a3e0a5SBagalkote, Sreenivas u64 count; 1414c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_count; 1415c4a3e0a5SBagalkote, Sreenivas 1416c4a3e0a5SBagalkote, Sreenivas struct { 1417c4a3e0a5SBagalkote, Sreenivas u64 lba; 1418c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1419c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_lba; 1420c4a3e0a5SBagalkote, Sreenivas 1421c4a3e0a5SBagalkote, Sreenivas struct { 1422c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1423c4a3e0a5SBagalkote, Sreenivas u32 prevOwner; 1424c4a3e0a5SBagalkote, Sreenivas u32 newOwner; 1425c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_owner; 1426c4a3e0a5SBagalkote, Sreenivas 1427c4a3e0a5SBagalkote, Sreenivas struct { 1428c4a3e0a5SBagalkote, Sreenivas u64 ld_lba; 1429c4a3e0a5SBagalkote, Sreenivas u64 pd_lba; 1430c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1431c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1432c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_lba_pd_lba; 1433c4a3e0a5SBagalkote, Sreenivas 1434c4a3e0a5SBagalkote, Sreenivas struct { 1435c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1436c4a3e0a5SBagalkote, Sreenivas struct megasas_progress prog; 1437c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_prog; 1438c4a3e0a5SBagalkote, Sreenivas 1439c4a3e0a5SBagalkote, Sreenivas struct { 1440c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1441c4a3e0a5SBagalkote, Sreenivas u32 prev_state; 1442c4a3e0a5SBagalkote, Sreenivas u32 new_state; 1443c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_state; 1444c4a3e0a5SBagalkote, Sreenivas 1445c4a3e0a5SBagalkote, Sreenivas struct { 1446c4a3e0a5SBagalkote, Sreenivas u64 strip; 1447c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1448c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_strip; 1449c4a3e0a5SBagalkote, Sreenivas 1450c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1451c4a3e0a5SBagalkote, Sreenivas 1452c4a3e0a5SBagalkote, Sreenivas struct { 1453c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1454c4a3e0a5SBagalkote, Sreenivas u32 err; 1455c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_err; 1456c4a3e0a5SBagalkote, Sreenivas 1457c4a3e0a5SBagalkote, Sreenivas struct { 1458c4a3e0a5SBagalkote, Sreenivas u64 lba; 1459c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1460c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_lba; 1461c4a3e0a5SBagalkote, Sreenivas 1462c4a3e0a5SBagalkote, Sreenivas struct { 1463c4a3e0a5SBagalkote, Sreenivas u64 lba; 1464c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1465c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1466c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_lba_ld; 1467c4a3e0a5SBagalkote, Sreenivas 1468c4a3e0a5SBagalkote, Sreenivas struct { 1469c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1470c4a3e0a5SBagalkote, Sreenivas struct megasas_progress prog; 1471c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_prog; 1472c4a3e0a5SBagalkote, Sreenivas 1473c4a3e0a5SBagalkote, Sreenivas struct { 1474c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1475c4a3e0a5SBagalkote, Sreenivas u32 prevState; 1476c4a3e0a5SBagalkote, Sreenivas u32 newState; 1477c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_state; 1478c4a3e0a5SBagalkote, Sreenivas 1479c4a3e0a5SBagalkote, Sreenivas struct { 1480c4a3e0a5SBagalkote, Sreenivas u16 vendorId; 1481c4a3e0a5SBagalkote, Sreenivas u16 deviceId; 1482c4a3e0a5SBagalkote, Sreenivas u16 subVendorId; 1483c4a3e0a5SBagalkote, Sreenivas u16 subDeviceId; 1484c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pci; 1485c4a3e0a5SBagalkote, Sreenivas 1486c4a3e0a5SBagalkote, Sreenivas u32 rate; 1487c4a3e0a5SBagalkote, Sreenivas char str[96]; 1488c4a3e0a5SBagalkote, Sreenivas 1489c4a3e0a5SBagalkote, Sreenivas struct { 1490c4a3e0a5SBagalkote, Sreenivas u32 rtc; 1491c4a3e0a5SBagalkote, Sreenivas u32 elapsedSeconds; 1492c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) time; 1493c4a3e0a5SBagalkote, Sreenivas 1494c4a3e0a5SBagalkote, Sreenivas struct { 1495c4a3e0a5SBagalkote, Sreenivas u32 ecar; 1496c4a3e0a5SBagalkote, Sreenivas u32 elog; 1497c4a3e0a5SBagalkote, Sreenivas char str[64]; 1498c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ecc; 1499c4a3e0a5SBagalkote, Sreenivas 1500c4a3e0a5SBagalkote, Sreenivas u8 b[96]; 1501c4a3e0a5SBagalkote, Sreenivas u16 s[48]; 1502c4a3e0a5SBagalkote, Sreenivas u32 w[24]; 1503c4a3e0a5SBagalkote, Sreenivas u64 d[12]; 1504c4a3e0a5SBagalkote, Sreenivas } args; 1505c4a3e0a5SBagalkote, Sreenivas 1506c4a3e0a5SBagalkote, Sreenivas char description[128]; 1507c4a3e0a5SBagalkote, Sreenivas 1508c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1509c4a3e0a5SBagalkote, Sreenivas 15107e8a75f4SYang, Bo struct megasas_aen_event { 1511c1d390d8SXiaotian Feng struct delayed_work hotplug_work; 15127e8a75f4SYang, Bo struct megasas_instance *instance; 15137e8a75f4SYang, Bo }; 15147e8a75f4SYang, Bo 1515c8e858feSadam radford struct megasas_irq_context { 1516c8e858feSadam radford struct megasas_instance *instance; 1517c8e858feSadam radford u32 MSIxIndex; 1518c8e858feSadam radford }; 1519c8e858feSadam radford 1520c4a3e0a5SBagalkote, Sreenivas struct megasas_instance { 1521c4a3e0a5SBagalkote, Sreenivas 1522c4a3e0a5SBagalkote, Sreenivas u32 *producer; 1523c4a3e0a5SBagalkote, Sreenivas dma_addr_t producer_h; 1524c4a3e0a5SBagalkote, Sreenivas u32 *consumer; 1525c4a3e0a5SBagalkote, Sreenivas dma_addr_t consumer_h; 1526c4a3e0a5SBagalkote, Sreenivas 1527c4a3e0a5SBagalkote, Sreenivas u32 *reply_queue; 1528c4a3e0a5SBagalkote, Sreenivas dma_addr_t reply_queue_h; 1529c4a3e0a5SBagalkote, Sreenivas 1530c4a3e0a5SBagalkote, Sreenivas unsigned long base_addr; 1531c4a3e0a5SBagalkote, Sreenivas struct megasas_register_set __iomem *reg_set; 1532d46a3ad6SSumit.Saxena@lsi.com u32 *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY]; 153381e403ceSYang, Bo struct megasas_pd_list pd_list[MEGASAS_MAX_PD]; 1534bdc6fb8dSYang, Bo u8 ld_ids[MEGASAS_MAX_LD_IDS]; 1535c4a3e0a5SBagalkote, Sreenivas s8 init_id; 1536c4a3e0a5SBagalkote, Sreenivas 1537c4a3e0a5SBagalkote, Sreenivas u16 max_num_sge; 1538c4a3e0a5SBagalkote, Sreenivas u16 max_fw_cmds; 15399c915a8cSadam radford /* For Fusion its num IOCTL cmds, for others MFI based its 15409c915a8cSadam radford max_fw_cmds */ 15419c915a8cSadam radford u16 max_mfi_cmds; 1542c4a3e0a5SBagalkote, Sreenivas u32 max_sectors_per_req; 15437e8a75f4SYang, Bo struct megasas_aen_event *ev; 1544c4a3e0a5SBagalkote, Sreenivas 1545c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd **cmd_list; 1546c4a3e0a5SBagalkote, Sreenivas struct list_head cmd_pool; 154739a98554Sbo yang /* used to sync fire the cmd to fw */ 1548c4a3e0a5SBagalkote, Sreenivas spinlock_t cmd_pool_lock; 154939a98554Sbo yang /* used to sync fire the cmd to fw */ 155039a98554Sbo yang spinlock_t hba_lock; 15517343eb65Sbo yang /* used to synch producer, consumer ptrs in dpc */ 15527343eb65Sbo yang spinlock_t completion_lock; 1553c4a3e0a5SBagalkote, Sreenivas struct dma_pool *frame_dma_pool; 1554c4a3e0a5SBagalkote, Sreenivas struct dma_pool *sense_dma_pool; 1555c4a3e0a5SBagalkote, Sreenivas 1556c4a3e0a5SBagalkote, Sreenivas struct megasas_evt_detail *evt_detail; 1557c4a3e0a5SBagalkote, Sreenivas dma_addr_t evt_detail_h; 1558c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd *aen_cmd; 1559e5a69e27SMatthias Kaehlcke struct mutex aen_mutex; 1560c4a3e0a5SBagalkote, Sreenivas struct semaphore ioctl_sem; 1561c4a3e0a5SBagalkote, Sreenivas 1562c4a3e0a5SBagalkote, Sreenivas struct Scsi_Host *host; 1563c4a3e0a5SBagalkote, Sreenivas 1564c4a3e0a5SBagalkote, Sreenivas wait_queue_head_t int_cmd_wait_q; 1565c4a3e0a5SBagalkote, Sreenivas wait_queue_head_t abort_cmd_wait_q; 1566c4a3e0a5SBagalkote, Sreenivas 1567c4a3e0a5SBagalkote, Sreenivas struct pci_dev *pdev; 1568c4a3e0a5SBagalkote, Sreenivas u32 unique_id; 156939a98554Sbo yang u32 fw_support_ieee; 1570c4a3e0a5SBagalkote, Sreenivas 1571e4a082c7SSumant Patro atomic_t fw_outstanding; 157239a98554Sbo yang atomic_t fw_reset_no_pci_access; 15731341c939SSumant Patro 15741341c939SSumant Patro struct megasas_instance_template *instancet; 15755d018ad0SSumant Patro struct tasklet_struct isr_tasklet; 157639a98554Sbo yang struct work_struct work_init; 157705e9ebbeSSumant Patro 157805e9ebbeSSumant Patro u8 flag; 1579c3518837SYang, Bo u8 unload; 1580f4c9a131SYang, Bo u8 flag_ieee; 158139a98554Sbo yang u8 issuepend_done; 158239a98554Sbo yang u8 disableOnlineCtrlReset; 1583bc93d425SSumit.Saxena@lsi.com u8 UnevenSpanSupport; 158439a98554Sbo yang u8 adprecovery; 158505e9ebbeSSumant Patro unsigned long last_time; 158639a98554Sbo yang u32 mfiStatus; 158739a98554Sbo yang u32 last_seq_num; 1588ad84db2eSbo yang 158939a98554Sbo yang struct list_head internal_reset_pending_q; 159080d9da98Sadam radford 159125985edcSLucas De Marchi /* Ptr to hba specific information */ 15929c915a8cSadam radford void *ctrl_context; 1593c8e858feSadam radford unsigned int msix_vectors; 1594c8e858feSadam radford struct msix_entry msixentry[MEGASAS_MAX_MSIX_QUEUES]; 1595c8e858feSadam radford struct megasas_irq_context irq_context[MEGASAS_MAX_MSIX_QUEUES]; 15969c915a8cSadam radford u64 map_id; 15979c915a8cSadam radford struct megasas_cmd *map_update_cmd; 1598b6d5d880Sadam radford unsigned long bar; 15999c915a8cSadam radford long reset_flags; 16009c915a8cSadam radford struct mutex reset_mutex; 1601c5daa6a9Sadam radford int throttlequeuedepth; 1602d46a3ad6SSumit.Saxena@lsi.com u8 mask_interrupts; 1603404a8a1aSSumit.Saxena@lsi.com u8 is_imr; 160439a98554Sbo yang }; 160539a98554Sbo yang 160639a98554Sbo yang enum { 160739a98554Sbo yang MEGASAS_HBA_OPERATIONAL = 0, 160839a98554Sbo yang MEGASAS_ADPRESET_SM_INFAULT = 1, 160939a98554Sbo yang MEGASAS_ADPRESET_SM_FW_RESET_SUCCESS = 2, 161039a98554Sbo yang MEGASAS_ADPRESET_SM_OPERATIONAL = 3, 161139a98554Sbo yang MEGASAS_HW_CRITICAL_ERROR = 4, 161239a98554Sbo yang MEGASAS_ADPRESET_INPROG_SIGN = 0xDEADDEAD, 1613c4a3e0a5SBagalkote, Sreenivas }; 1614c4a3e0a5SBagalkote, Sreenivas 16150c79e681SYang, Bo struct megasas_instance_template { 16160c79e681SYang, Bo void (*fire_cmd)(struct megasas_instance *, dma_addr_t, \ 16170c79e681SYang, Bo u32, struct megasas_register_set __iomem *); 16180c79e681SYang, Bo 1619d46a3ad6SSumit.Saxena@lsi.com void (*enable_intr)(struct megasas_instance *); 1620d46a3ad6SSumit.Saxena@lsi.com void (*disable_intr)(struct megasas_instance *); 16210c79e681SYang, Bo 16220c79e681SYang, Bo int (*clear_intr)(struct megasas_register_set __iomem *); 16230c79e681SYang, Bo 16240c79e681SYang, Bo u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *); 162539a98554Sbo yang int (*adp_reset)(struct megasas_instance *, \ 162639a98554Sbo yang struct megasas_register_set __iomem *); 162739a98554Sbo yang int (*check_reset)(struct megasas_instance *, \ 162839a98554Sbo yang struct megasas_register_set __iomem *); 1629cd50ba8eSadam radford irqreturn_t (*service_isr)(int irq, void *devp); 1630cd50ba8eSadam radford void (*tasklet)(unsigned long); 1631cd50ba8eSadam radford u32 (*init_adapter)(struct megasas_instance *); 1632cd50ba8eSadam radford u32 (*build_and_issue_cmd) (struct megasas_instance *, 1633cd50ba8eSadam radford struct scsi_cmnd *); 1634cd50ba8eSadam radford void (*issue_dcmd) (struct megasas_instance *instance, 1635cd50ba8eSadam radford struct megasas_cmd *cmd); 16360c79e681SYang, Bo }; 16370c79e681SYang, Bo 1638c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_IS_LOGICAL(scp) \ 1639c4a3e0a5SBagalkote, Sreenivas (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1 1640c4a3e0a5SBagalkote, Sreenivas 1641c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_DEV_INDEX(inst, scp) \ 1642c4a3e0a5SBagalkote, Sreenivas ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) + \ 1643c4a3e0a5SBagalkote, Sreenivas scp->device->id 1644c4a3e0a5SBagalkote, Sreenivas 1645c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd { 1646c4a3e0a5SBagalkote, Sreenivas 1647c4a3e0a5SBagalkote, Sreenivas union megasas_frame *frame; 1648c4a3e0a5SBagalkote, Sreenivas dma_addr_t frame_phys_addr; 1649c4a3e0a5SBagalkote, Sreenivas u8 *sense; 1650c4a3e0a5SBagalkote, Sreenivas dma_addr_t sense_phys_addr; 1651c4a3e0a5SBagalkote, Sreenivas 1652c4a3e0a5SBagalkote, Sreenivas u32 index; 1653c4a3e0a5SBagalkote, Sreenivas u8 sync_cmd; 1654c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; 165539a98554Sbo yang u8 abort_aen; 165639a98554Sbo yang u8 retry_for_fw_reset; 165739a98554Sbo yang 1658c4a3e0a5SBagalkote, Sreenivas 1659c4a3e0a5SBagalkote, Sreenivas struct list_head list; 1660c4a3e0a5SBagalkote, Sreenivas struct scsi_cmnd *scmd; 1661c4a3e0a5SBagalkote, Sreenivas struct megasas_instance *instance; 16629c915a8cSadam radford union { 16639c915a8cSadam radford struct { 16649c915a8cSadam radford u16 smid; 16659c915a8cSadam radford u16 resvd; 16669c915a8cSadam radford } context; 1667c4a3e0a5SBagalkote, Sreenivas u32 frame_count; 1668c4a3e0a5SBagalkote, Sreenivas }; 16699c915a8cSadam radford }; 1670c4a3e0a5SBagalkote, Sreenivas 1671c4a3e0a5SBagalkote, Sreenivas #define MAX_MGMT_ADAPTERS 1024 1672c4a3e0a5SBagalkote, Sreenivas #define MAX_IOCTL_SGE 16 1673c4a3e0a5SBagalkote, Sreenivas 1674c4a3e0a5SBagalkote, Sreenivas struct megasas_iocpacket { 1675c4a3e0a5SBagalkote, Sreenivas 1676c4a3e0a5SBagalkote, Sreenivas u16 host_no; 1677c4a3e0a5SBagalkote, Sreenivas u16 __pad1; 1678c4a3e0a5SBagalkote, Sreenivas u32 sgl_off; 1679c4a3e0a5SBagalkote, Sreenivas u32 sge_count; 1680c4a3e0a5SBagalkote, Sreenivas u32 sense_off; 1681c4a3e0a5SBagalkote, Sreenivas u32 sense_len; 1682c4a3e0a5SBagalkote, Sreenivas union { 1683c4a3e0a5SBagalkote, Sreenivas u8 raw[128]; 1684c4a3e0a5SBagalkote, Sreenivas struct megasas_header hdr; 1685c4a3e0a5SBagalkote, Sreenivas } frame; 1686c4a3e0a5SBagalkote, Sreenivas 1687c4a3e0a5SBagalkote, Sreenivas struct iovec sgl[MAX_IOCTL_SGE]; 1688c4a3e0a5SBagalkote, Sreenivas 1689c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1690c4a3e0a5SBagalkote, Sreenivas 1691c4a3e0a5SBagalkote, Sreenivas struct megasas_aen { 1692c4a3e0a5SBagalkote, Sreenivas u16 host_no; 1693c4a3e0a5SBagalkote, Sreenivas u16 __pad1; 1694c4a3e0a5SBagalkote, Sreenivas u32 seq_num; 1695c4a3e0a5SBagalkote, Sreenivas u32 class_locale_word; 1696c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1697c4a3e0a5SBagalkote, Sreenivas 1698c4a3e0a5SBagalkote, Sreenivas #ifdef CONFIG_COMPAT 1699c4a3e0a5SBagalkote, Sreenivas struct compat_megasas_iocpacket { 1700c4a3e0a5SBagalkote, Sreenivas u16 host_no; 1701c4a3e0a5SBagalkote, Sreenivas u16 __pad1; 1702c4a3e0a5SBagalkote, Sreenivas u32 sgl_off; 1703c4a3e0a5SBagalkote, Sreenivas u32 sge_count; 1704c4a3e0a5SBagalkote, Sreenivas u32 sense_off; 1705c4a3e0a5SBagalkote, Sreenivas u32 sense_len; 1706c4a3e0a5SBagalkote, Sreenivas union { 1707c4a3e0a5SBagalkote, Sreenivas u8 raw[128]; 1708c4a3e0a5SBagalkote, Sreenivas struct megasas_header hdr; 1709c4a3e0a5SBagalkote, Sreenivas } frame; 1710c4a3e0a5SBagalkote, Sreenivas struct compat_iovec sgl[MAX_IOCTL_SGE]; 1711c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1712c4a3e0a5SBagalkote, Sreenivas 17130e98936cSSumant Patro #define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket) 1714c4a3e0a5SBagalkote, Sreenivas #endif 1715c4a3e0a5SBagalkote, Sreenivas 1716cb59aa6aSSumant Patro #define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket) 1717c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen) 1718c4a3e0a5SBagalkote, Sreenivas 1719c4a3e0a5SBagalkote, Sreenivas struct megasas_mgmt_info { 1720c4a3e0a5SBagalkote, Sreenivas 1721c4a3e0a5SBagalkote, Sreenivas u16 count; 1722c4a3e0a5SBagalkote, Sreenivas struct megasas_instance *instance[MAX_MGMT_ADAPTERS]; 1723c4a3e0a5SBagalkote, Sreenivas int max_index; 1724c4a3e0a5SBagalkote, Sreenivas }; 1725c4a3e0a5SBagalkote, Sreenivas 172621c9e160Sadam radford u8 172721c9e160Sadam radford MR_BuildRaidContext(struct megasas_instance *instance, 172821c9e160Sadam radford struct IO_REQUEST_INFO *io_info, 172921c9e160Sadam radford struct RAID_CONTEXT *pRAID_Context, 173021c9e160Sadam radford struct MR_FW_RAID_MAP_ALL *map, u8 **raidLUN); 173121c9e160Sadam radford u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_FW_RAID_MAP_ALL *map); 173221c9e160Sadam radford struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_FW_RAID_MAP_ALL *map); 173321c9e160Sadam radford u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_FW_RAID_MAP_ALL *map); 173421c9e160Sadam radford u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_FW_RAID_MAP_ALL *map); 173521c9e160Sadam radford u16 MR_PdDevHandleGet(u32 pd, struct MR_FW_RAID_MAP_ALL *map); 173621c9e160Sadam radford u16 MR_GetLDTgtId(u32 ld, struct MR_FW_RAID_MAP_ALL *map); 173721c9e160Sadam radford 1738c4a3e0a5SBagalkote, Sreenivas #endif /*LSI_MEGARAID_SAS_H */ 1739