1c4a3e0a5SBagalkote, Sreenivas /* 2c4a3e0a5SBagalkote, Sreenivas * Linux MegaRAID driver for SAS based RAID controllers 3c4a3e0a5SBagalkote, Sreenivas * 4e399065bSSumit.Saxena@avagotech.com * Copyright (c) 2003-2013 LSI Corporation 5e399065bSSumit.Saxena@avagotech.com * Copyright (c) 2013-2014 Avago Technologies 6c4a3e0a5SBagalkote, Sreenivas * 7c4a3e0a5SBagalkote, Sreenivas * This program is free software; you can redistribute it and/or 8c4a3e0a5SBagalkote, Sreenivas * modify it under the terms of the GNU General Public License 93f1530c1Sadam radford * as published by the Free Software Foundation; either version 2 103f1530c1Sadam radford * of the License, or (at your option) any later version. 113f1530c1Sadam radford * 123f1530c1Sadam radford * This program is distributed in the hope that it will be useful, 133f1530c1Sadam radford * but WITHOUT ANY WARRANTY; without even the implied warranty of 143f1530c1Sadam radford * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 153f1530c1Sadam radford * GNU General Public License for more details. 163f1530c1Sadam radford * 173f1530c1Sadam radford * You should have received a copy of the GNU General Public License 18e399065bSSumit.Saxena@avagotech.com * along with this program. If not, see <http://www.gnu.org/licenses/>. 19c4a3e0a5SBagalkote, Sreenivas * 20c4a3e0a5SBagalkote, Sreenivas * FILE: megaraid_sas.h 213f1530c1Sadam radford * 22e399065bSSumit.Saxena@avagotech.com * Authors: Avago Technologies 23e399065bSSumit.Saxena@avagotech.com * Kashyap Desai <kashyap.desai@avagotech.com> 24e399065bSSumit.Saxena@avagotech.com * Sumit Saxena <sumit.saxena@avagotech.com> 253f1530c1Sadam radford * 26e399065bSSumit.Saxena@avagotech.com * Send feedback to: megaraidlinux.pdl@avagotech.com 273f1530c1Sadam radford * 28e399065bSSumit.Saxena@avagotech.com * Mail to: Avago Technologies, 350 West Trimble Road, Building 90, 29e399065bSSumit.Saxena@avagotech.com * San Jose, California 95131 30c4a3e0a5SBagalkote, Sreenivas */ 31c4a3e0a5SBagalkote, Sreenivas 32c4a3e0a5SBagalkote, Sreenivas #ifndef LSI_MEGARAID_SAS_H 33c4a3e0a5SBagalkote, Sreenivas #define LSI_MEGARAID_SAS_H 34c4a3e0a5SBagalkote, Sreenivas 35a69b74d3SRandy Dunlap /* 36c4a3e0a5SBagalkote, Sreenivas * MegaRAID SAS Driver meta data 37c4a3e0a5SBagalkote, Sreenivas */ 38609fb07bSsumit.saxena@avagotech.com #define MEGASAS_VERSION "06.808.14.00-rc1" 39609fb07bSsumit.saxena@avagotech.com #define MEGASAS_RELDATE "Jul 31, 2015" 400e98936cSSumant Patro 410e98936cSSumant Patro /* 420e98936cSSumant Patro * Device IDs 430e98936cSSumant Patro */ 440e98936cSSumant Patro #define PCI_DEVICE_ID_LSI_SAS1078R 0x0060 45af7a5647Sbo yang #define PCI_DEVICE_ID_LSI_SAS1078DE 0x007C 460e98936cSSumant Patro #define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413 476610a6b3SYang, Bo #define PCI_DEVICE_ID_LSI_SAS1078GEN2 0x0078 486610a6b3SYang, Bo #define PCI_DEVICE_ID_LSI_SAS0079GEN2 0x0079 4987911122SYang, Bo #define PCI_DEVICE_ID_LSI_SAS0073SKINNY 0x0073 5087911122SYang, Bo #define PCI_DEVICE_ID_LSI_SAS0071SKINNY 0x0071 519c915a8cSadam radford #define PCI_DEVICE_ID_LSI_FUSION 0x005b 52229fe47cSadam radford #define PCI_DEVICE_ID_LSI_PLASMA 0x002f 5336807e67Sadam radford #define PCI_DEVICE_ID_LSI_INVADER 0x005d 5421d3c710SSumit.Saxena@lsi.com #define PCI_DEVICE_ID_LSI_FURY 0x005f 5590c204bcSsumit.saxena@avagotech.com #define PCI_DEVICE_ID_LSI_INTRUDER 0x00ce 5690c204bcSsumit.saxena@avagotech.com #define PCI_DEVICE_ID_LSI_INTRUDER_24 0x00cf 577364d34bSsumit.saxena@avagotech.com #define PCI_DEVICE_ID_LSI_CUTLASS_52 0x0052 587364d34bSsumit.saxena@avagotech.com #define PCI_DEVICE_ID_LSI_CUTLASS_53 0x0053 590e98936cSSumant Patro 60c4a3e0a5SBagalkote, Sreenivas /* 6139b72c3cSSumit.Saxena@lsi.com * Intel HBA SSDIDs 6239b72c3cSSumit.Saxena@lsi.com */ 6339b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC080_SSDID 0x9360 6439b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC040_SSDID 0x9362 6539b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3SC008_SSDID 0x9380 6639b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3MC044_SSDID 0x9381 6739b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC080_SSDID 0x9341 6839b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC040_SSDID 0x9343 697364d34bSsumit.saxena@avagotech.com #define MEGARAID_INTEL_RMS3BC160_SSDID 0x352B 7039b72c3cSSumit.Saxena@lsi.com 7139b72c3cSSumit.Saxena@lsi.com /* 7290c204bcSsumit.saxena@avagotech.com * Intruder HBA SSDIDs 7390c204bcSsumit.saxena@avagotech.com */ 7490c204bcSsumit.saxena@avagotech.com #define MEGARAID_INTRUDER_SSDID1 0x9371 7590c204bcSsumit.saxena@avagotech.com #define MEGARAID_INTRUDER_SSDID2 0x9390 7690c204bcSsumit.saxena@avagotech.com #define MEGARAID_INTRUDER_SSDID3 0x9370 7790c204bcSsumit.saxena@avagotech.com 7890c204bcSsumit.saxena@avagotech.com /* 7939b72c3cSSumit.Saxena@lsi.com * Intel HBA branding 8039b72c3cSSumit.Saxena@lsi.com */ 8139b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC080_BRANDING \ 8239b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3DC080" 8339b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3DC040_BRANDING \ 8439b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3DC040" 8539b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3SC008_BRANDING \ 8639b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3SC008" 8739b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3MC044_BRANDING \ 8839b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3MC044" 8939b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC080_BRANDING \ 9039b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3WC080" 9139b72c3cSSumit.Saxena@lsi.com #define MEGARAID_INTEL_RS3WC040_BRANDING \ 9239b72c3cSSumit.Saxena@lsi.com "Intel(R) RAID Controller RS3WC040" 937364d34bSsumit.saxena@avagotech.com #define MEGARAID_INTEL_RMS3BC160_BRANDING \ 947364d34bSsumit.saxena@avagotech.com "Intel(R) Integrated RAID Module RMS3BC160" 9539b72c3cSSumit.Saxena@lsi.com 9639b72c3cSSumit.Saxena@lsi.com /* 97c4a3e0a5SBagalkote, Sreenivas * ===================================== 98c4a3e0a5SBagalkote, Sreenivas * MegaRAID SAS MFI firmware definitions 99c4a3e0a5SBagalkote, Sreenivas * ===================================== 100c4a3e0a5SBagalkote, Sreenivas */ 101c4a3e0a5SBagalkote, Sreenivas 102c4a3e0a5SBagalkote, Sreenivas /* 103c4a3e0a5SBagalkote, Sreenivas * MFI stands for MegaRAID SAS FW Interface. This is just a moniker for 104c4a3e0a5SBagalkote, Sreenivas * protocol between the software and firmware. Commands are issued using 105c4a3e0a5SBagalkote, Sreenivas * "message frames" 106c4a3e0a5SBagalkote, Sreenivas */ 107c4a3e0a5SBagalkote, Sreenivas 108a69b74d3SRandy Dunlap /* 109c4a3e0a5SBagalkote, Sreenivas * FW posts its state in upper 4 bits of outbound_msg_0 register 110c4a3e0a5SBagalkote, Sreenivas */ 111c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_MASK 0xF0000000 112c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_UNDEFINED 0x00000000 113c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_BB_INIT 0x10000000 114c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FW_INIT 0x40000000 115c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_WAIT_HANDSHAKE 0x60000000 116c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FW_INIT_2 0x70000000 117c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_DEVICE_SCAN 0x80000000 118e3bbff9fSSumant Patro #define MFI_STATE_BOOT_MESSAGE_PENDING 0x90000000 119c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FLUSH_CACHE 0xA0000000 120c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_READY 0xB0000000 121c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_OPERATIONAL 0xC0000000 122c4a3e0a5SBagalkote, Sreenivas #define MFI_STATE_FAULT 0xF0000000 123fc62b3fcSSumit.Saxena@avagotech.com #define MFI_STATE_FORCE_OCR 0x00000080 124fc62b3fcSSumit.Saxena@avagotech.com #define MFI_STATE_DMADONE 0x00000008 125fc62b3fcSSumit.Saxena@avagotech.com #define MFI_STATE_CRASH_DUMP_DONE 0x00000004 12639a98554Sbo yang #define MFI_RESET_REQUIRED 0x00000001 1277e70e733Sadam radford #define MFI_RESET_ADAPTER 0x00000002 128c4a3e0a5SBagalkote, Sreenivas #define MEGAMFI_FRAME_SIZE 64 129c4a3e0a5SBagalkote, Sreenivas 130a69b74d3SRandy Dunlap /* 131c4a3e0a5SBagalkote, Sreenivas * During FW init, clear pending cmds & reset state using inbound_msg_0 132c4a3e0a5SBagalkote, Sreenivas * 133c4a3e0a5SBagalkote, Sreenivas * ABORT : Abort all pending cmds 134c4a3e0a5SBagalkote, Sreenivas * READY : Move from OPERATIONAL to READY state; discard queue info 135c4a3e0a5SBagalkote, Sreenivas * MFIMODE : Discard (possible) low MFA posted in 64-bit mode (??) 136c4a3e0a5SBagalkote, Sreenivas * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver 137e3bbff9fSSumant Patro * HOTPLUG : Resume from Hotplug 138e3bbff9fSSumant Patro * MFI_STOP_ADP : Send signal to FW to stop processing 139c4a3e0a5SBagalkote, Sreenivas */ 14039a98554Sbo yang #define WRITE_SEQUENCE_OFFSET (0x0000000FC) /* I20 */ 14139a98554Sbo yang #define HOST_DIAGNOSTIC_OFFSET (0x000000F8) /* I20 */ 14239a98554Sbo yang #define DIAG_WRITE_ENABLE (0x00000080) 14339a98554Sbo yang #define DIAG_RESET_ADAPTER (0x00000004) 14439a98554Sbo yang 14539a98554Sbo yang #define MFI_ADP_RESET 0x00000040 146e3bbff9fSSumant Patro #define MFI_INIT_ABORT 0x00000001 147c4a3e0a5SBagalkote, Sreenivas #define MFI_INIT_READY 0x00000002 148c4a3e0a5SBagalkote, Sreenivas #define MFI_INIT_MFIMODE 0x00000004 149c4a3e0a5SBagalkote, Sreenivas #define MFI_INIT_CLEAR_HANDSHAKE 0x00000008 150e3bbff9fSSumant Patro #define MFI_INIT_HOTPLUG 0x00000010 151e3bbff9fSSumant Patro #define MFI_STOP_ADP 0x00000020 152e3bbff9fSSumant Patro #define MFI_RESET_FLAGS MFI_INIT_READY| \ 153e3bbff9fSSumant Patro MFI_INIT_MFIMODE| \ 154e3bbff9fSSumant Patro MFI_INIT_ABORT 155c4a3e0a5SBagalkote, Sreenivas 156a69b74d3SRandy Dunlap /* 157c4a3e0a5SBagalkote, Sreenivas * MFI frame flags 158c4a3e0a5SBagalkote, Sreenivas */ 159c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_POST_IN_REPLY_QUEUE 0x0000 160c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE 0x0001 161c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SGL32 0x0000 162c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SGL64 0x0002 163c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SENSE32 0x0000 164c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_SENSE64 0x0004 165c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_NONE 0x0000 166c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_WRITE 0x0008 167c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_READ 0x0010 168c4a3e0a5SBagalkote, Sreenivas #define MFI_FRAME_DIR_BOTH 0x0018 169f4c9a131SYang, Bo #define MFI_FRAME_IEEE 0x0020 170c4a3e0a5SBagalkote, Sreenivas 1714026e9aaSSumit.Saxena@avagotech.com /* Driver internal */ 1724026e9aaSSumit.Saxena@avagotech.com #define DRV_DCMD_POLLED_MODE 0x1 1734026e9aaSSumit.Saxena@avagotech.com 174a69b74d3SRandy Dunlap /* 175c4a3e0a5SBagalkote, Sreenivas * Definition for cmd_status 176c4a3e0a5SBagalkote, Sreenivas */ 177c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_STATUS_POLL_MODE 0xFF 178c4a3e0a5SBagalkote, Sreenivas 179a69b74d3SRandy Dunlap /* 180c4a3e0a5SBagalkote, Sreenivas * MFI command opcodes 181c4a3e0a5SBagalkote, Sreenivas */ 182c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_INIT 0x00 183c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_LD_READ 0x01 184c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_LD_WRITE 0x02 185c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_LD_SCSI_IO 0x03 186c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_PD_SCSI_IO 0x04 187c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_DCMD 0x05 188c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_ABORT 0x06 189c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_SMP 0x07 190c4a3e0a5SBagalkote, Sreenivas #define MFI_CMD_STP 0x08 191e5f93a36Sadam radford #define MFI_CMD_INVALID 0xff 192c4a3e0a5SBagalkote, Sreenivas 193c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_GET_INFO 0x01010000 194bdc6fb8dSYang, Bo #define MR_DCMD_LD_GET_LIST 0x03010000 19521c9e160Sadam radford #define MR_DCMD_LD_LIST_QUERY 0x03010100 196c4a3e0a5SBagalkote, Sreenivas 197c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000 198c4a3e0a5SBagalkote, Sreenivas #define MR_FLUSH_CTRL_CACHE 0x01 199c4a3e0a5SBagalkote, Sreenivas #define MR_FLUSH_DISK_CACHE 0x02 200c4a3e0a5SBagalkote, Sreenivas 201c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_SHUTDOWN 0x01050000 20231ea7088Sbo yang #define MR_DCMD_HIBERNATE_SHUTDOWN 0x01060000 203c4a3e0a5SBagalkote, Sreenivas #define MR_ENABLE_DRIVE_SPINDOWN 0x01 204c4a3e0a5SBagalkote, Sreenivas 205c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_EVENT_GET_INFO 0x01040100 206c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_EVENT_GET 0x01040300 207c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CTRL_EVENT_WAIT 0x01040500 208c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_LD_GET_PROPERTIES 0x03030000 209c4a3e0a5SBagalkote, Sreenivas 210c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CLUSTER 0x08000000 211c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CLUSTER_RESET_ALL 0x08010100 212c4a3e0a5SBagalkote, Sreenivas #define MR_DCMD_CLUSTER_RESET_LD 0x08010200 21381e403ceSYang, Bo #define MR_DCMD_PD_LIST_QUERY 0x02010100 214c4a3e0a5SBagalkote, Sreenivas 215fc62b3fcSSumit.Saxena@avagotech.com #define MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS 0x01190100 216fc62b3fcSSumit.Saxena@avagotech.com #define MR_DRIVER_SET_APP_CRASHDUMP_MODE (0xF0010000 | 0x0600) 217fc62b3fcSSumit.Saxena@avagotech.com 218a69b74d3SRandy Dunlap /* 219bc93d425SSumit.Saxena@lsi.com * Global functions 220bc93d425SSumit.Saxena@lsi.com */ 221bc93d425SSumit.Saxena@lsi.com extern u8 MR_ValidateMapInfo(struct megasas_instance *instance); 222bc93d425SSumit.Saxena@lsi.com 223bc93d425SSumit.Saxena@lsi.com 224bc93d425SSumit.Saxena@lsi.com /* 225c4a3e0a5SBagalkote, Sreenivas * MFI command completion codes 226c4a3e0a5SBagalkote, Sreenivas */ 227c4a3e0a5SBagalkote, Sreenivas enum MFI_STAT { 228c4a3e0a5SBagalkote, Sreenivas MFI_STAT_OK = 0x00, 229c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_CMD = 0x01, 230c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_DCMD = 0x02, 231c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_PARAMETER = 0x03, 232c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04, 233c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ABORT_NOT_POSSIBLE = 0x05, 234c4a3e0a5SBagalkote, Sreenivas MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06, 235c4a3e0a5SBagalkote, Sreenivas MFI_STAT_APP_IN_USE = 0x07, 236c4a3e0a5SBagalkote, Sreenivas MFI_STAT_APP_NOT_INITIALIZED = 0x08, 237c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ARRAY_INDEX_INVALID = 0x09, 238c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a, 239c4a3e0a5SBagalkote, Sreenivas MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b, 240c4a3e0a5SBagalkote, Sreenivas MFI_STAT_DEVICE_NOT_FOUND = 0x0c, 241c4a3e0a5SBagalkote, Sreenivas MFI_STAT_DRIVE_TOO_SMALL = 0x0d, 242c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_ALLOC_FAIL = 0x0e, 243c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_BUSY = 0x0f, 244c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_ERROR = 0x10, 245c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_IMAGE_BAD = 0x11, 246c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12, 247c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_NOT_OPEN = 0x13, 248c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLASH_NOT_STARTED = 0x14, 249c4a3e0a5SBagalkote, Sreenivas MFI_STAT_FLUSH_FAILED = 0x15, 250c4a3e0a5SBagalkote, Sreenivas MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16, 251c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_CC_IN_PROGRESS = 0x17, 252c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_INIT_IN_PROGRESS = 0x18, 253c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19, 254c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_MAX_CONFIGURED = 0x1a, 255c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_NOT_OPTIMAL = 0x1b, 256c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c, 257c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d, 258c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e, 259c4a3e0a5SBagalkote, Sreenivas MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f, 260c4a3e0a5SBagalkote, Sreenivas MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20, 261c4a3e0a5SBagalkote, Sreenivas MFI_STAT_MFC_HW_ERROR = 0x21, 262c4a3e0a5SBagalkote, Sreenivas MFI_STAT_NO_HW_PRESENT = 0x22, 263c4a3e0a5SBagalkote, Sreenivas MFI_STAT_NOT_FOUND = 0x23, 264c4a3e0a5SBagalkote, Sreenivas MFI_STAT_NOT_IN_ENCL = 0x24, 265c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25, 266c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PD_TYPE_WRONG = 0x26, 267c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PR_DISABLED = 0x27, 268c4a3e0a5SBagalkote, Sreenivas MFI_STAT_ROW_INDEX_INVALID = 0x28, 269c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29, 270c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a, 271c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b, 272c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c, 273c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d, 274c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SCSI_IO_FAILED = 0x2e, 275c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f, 276c4a3e0a5SBagalkote, Sreenivas MFI_STAT_SHUTDOWN_FAILED = 0x30, 277c4a3e0a5SBagalkote, Sreenivas MFI_STAT_TIME_NOT_SET = 0x31, 278c4a3e0a5SBagalkote, Sreenivas MFI_STAT_WRONG_STATE = 0x32, 279c4a3e0a5SBagalkote, Sreenivas MFI_STAT_LD_OFFLINE = 0x33, 280c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34, 281c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35, 282c4a3e0a5SBagalkote, Sreenivas MFI_STAT_RESERVATION_IN_PROGRESS = 0x36, 283c4a3e0a5SBagalkote, Sreenivas MFI_STAT_I2C_ERRORS_DETECTED = 0x37, 284c4a3e0a5SBagalkote, Sreenivas MFI_STAT_PCI_ERRORS_DETECTED = 0x38, 28536807e67Sadam radford MFI_STAT_CONFIG_SEQ_MISMATCH = 0x67, 286c4a3e0a5SBagalkote, Sreenivas 287c4a3e0a5SBagalkote, Sreenivas MFI_STAT_INVALID_STATUS = 0xFF 288c4a3e0a5SBagalkote, Sreenivas }; 289c4a3e0a5SBagalkote, Sreenivas 290714f5177Ssumit.saxena@avagotech.com enum mfi_evt_class { 291714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_DEBUG = -2, 292714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_PROGRESS = -1, 293714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_INFO = 0, 294714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_WARNING = 1, 295714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_CRITICAL = 2, 296714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_FATAL = 3, 297714f5177Ssumit.saxena@avagotech.com MFI_EVT_CLASS_DEAD = 4 298714f5177Ssumit.saxena@avagotech.com }; 299714f5177Ssumit.saxena@avagotech.com 300c4a3e0a5SBagalkote, Sreenivas /* 301fc62b3fcSSumit.Saxena@avagotech.com * Crash dump related defines 302fc62b3fcSSumit.Saxena@avagotech.com */ 303fc62b3fcSSumit.Saxena@avagotech.com #define MAX_CRASH_DUMP_SIZE 512 304fc62b3fcSSumit.Saxena@avagotech.com #define CRASH_DMA_BUF_SIZE (1024 * 1024) 305fc62b3fcSSumit.Saxena@avagotech.com 306fc62b3fcSSumit.Saxena@avagotech.com enum MR_FW_CRASH_DUMP_STATE { 307fc62b3fcSSumit.Saxena@avagotech.com UNAVAILABLE = 0, 308fc62b3fcSSumit.Saxena@avagotech.com AVAILABLE = 1, 309fc62b3fcSSumit.Saxena@avagotech.com COPYING = 2, 310fc62b3fcSSumit.Saxena@avagotech.com COPIED = 3, 311fc62b3fcSSumit.Saxena@avagotech.com COPY_ERROR = 4, 312fc62b3fcSSumit.Saxena@avagotech.com }; 313fc62b3fcSSumit.Saxena@avagotech.com 314fc62b3fcSSumit.Saxena@avagotech.com enum _MR_CRASH_BUF_STATUS { 315fc62b3fcSSumit.Saxena@avagotech.com MR_CRASH_BUF_TURN_OFF = 0, 316fc62b3fcSSumit.Saxena@avagotech.com MR_CRASH_BUF_TURN_ON = 1, 317fc62b3fcSSumit.Saxena@avagotech.com }; 318fc62b3fcSSumit.Saxena@avagotech.com 319fc62b3fcSSumit.Saxena@avagotech.com /* 320c4a3e0a5SBagalkote, Sreenivas * Number of mailbox bytes in DCMD message frame 321c4a3e0a5SBagalkote, Sreenivas */ 322c4a3e0a5SBagalkote, Sreenivas #define MFI_MBOX_SIZE 12 323c4a3e0a5SBagalkote, Sreenivas 324c4a3e0a5SBagalkote, Sreenivas enum MR_EVT_CLASS { 325c4a3e0a5SBagalkote, Sreenivas 326c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_DEBUG = -2, 327c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_PROGRESS = -1, 328c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_INFO = 0, 329c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_WARNING = 1, 330c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_CRITICAL = 2, 331c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_FATAL = 3, 332c4a3e0a5SBagalkote, Sreenivas MR_EVT_CLASS_DEAD = 4, 333c4a3e0a5SBagalkote, Sreenivas 334c4a3e0a5SBagalkote, Sreenivas }; 335c4a3e0a5SBagalkote, Sreenivas 336c4a3e0a5SBagalkote, Sreenivas enum MR_EVT_LOCALE { 337c4a3e0a5SBagalkote, Sreenivas 338c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_LD = 0x0001, 339c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_PD = 0x0002, 340c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_ENCL = 0x0004, 341c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_BBU = 0x0008, 342c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_SAS = 0x0010, 343c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_CTRL = 0x0020, 344c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_CONFIG = 0x0040, 345c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_CLUSTER = 0x0080, 346c4a3e0a5SBagalkote, Sreenivas MR_EVT_LOCALE_ALL = 0xffff, 347c4a3e0a5SBagalkote, Sreenivas 348c4a3e0a5SBagalkote, Sreenivas }; 349c4a3e0a5SBagalkote, Sreenivas 350c4a3e0a5SBagalkote, Sreenivas enum MR_EVT_ARGS { 351c4a3e0a5SBagalkote, Sreenivas 352c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_NONE, 353c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_CDB_SENSE, 354c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD, 355c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_COUNT, 356c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_LBA, 357c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_OWNER, 358c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_LBA_PD_LBA, 359c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_PROG, 360c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_STATE, 361c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_LD_STRIP, 362c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD, 363c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_ERR, 364c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_LBA, 365c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_LBA_LD, 366c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_PROG, 367c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PD_STATE, 368c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_PCI, 369c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_RATE, 370c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_STR, 371c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_TIME, 372c4a3e0a5SBagalkote, Sreenivas MR_EVT_ARGS_ECC, 37381e403ceSYang, Bo MR_EVT_ARGS_LD_PROP, 37481e403ceSYang, Bo MR_EVT_ARGS_PD_SPARE, 37581e403ceSYang, Bo MR_EVT_ARGS_PD_INDEX, 37681e403ceSYang, Bo MR_EVT_ARGS_DIAG_PASS, 37781e403ceSYang, Bo MR_EVT_ARGS_DIAG_FAIL, 37881e403ceSYang, Bo MR_EVT_ARGS_PD_LBA_LBA, 37981e403ceSYang, Bo MR_EVT_ARGS_PORT_PHY, 38081e403ceSYang, Bo MR_EVT_ARGS_PD_MISSING, 38181e403ceSYang, Bo MR_EVT_ARGS_PD_ADDRESS, 38281e403ceSYang, Bo MR_EVT_ARGS_BITMAP, 38381e403ceSYang, Bo MR_EVT_ARGS_CONNECTOR, 38481e403ceSYang, Bo MR_EVT_ARGS_PD_PD, 38581e403ceSYang, Bo MR_EVT_ARGS_PD_FRU, 38681e403ceSYang, Bo MR_EVT_ARGS_PD_PATHINFO, 38781e403ceSYang, Bo MR_EVT_ARGS_PD_POWER_STATE, 38881e403ceSYang, Bo MR_EVT_ARGS_GENERIC, 389c4a3e0a5SBagalkote, Sreenivas }; 390c4a3e0a5SBagalkote, Sreenivas 391c4a3e0a5SBagalkote, Sreenivas /* 39281e403ceSYang, Bo * define constants for device list query options 39381e403ceSYang, Bo */ 39481e403ceSYang, Bo enum MR_PD_QUERY_TYPE { 39581e403ceSYang, Bo MR_PD_QUERY_TYPE_ALL = 0, 39681e403ceSYang, Bo MR_PD_QUERY_TYPE_STATE = 1, 39781e403ceSYang, Bo MR_PD_QUERY_TYPE_POWER_STATE = 2, 39881e403ceSYang, Bo MR_PD_QUERY_TYPE_MEDIA_TYPE = 3, 39981e403ceSYang, Bo MR_PD_QUERY_TYPE_SPEED = 4, 40081e403ceSYang, Bo MR_PD_QUERY_TYPE_EXPOSED_TO_HOST = 5, 40181e403ceSYang, Bo }; 40281e403ceSYang, Bo 40321c9e160Sadam radford enum MR_LD_QUERY_TYPE { 40421c9e160Sadam radford MR_LD_QUERY_TYPE_ALL = 0, 40521c9e160Sadam radford MR_LD_QUERY_TYPE_EXPOSED_TO_HOST = 1, 40621c9e160Sadam radford MR_LD_QUERY_TYPE_USED_TGT_IDS = 2, 40721c9e160Sadam radford MR_LD_QUERY_TYPE_CLUSTER_ACCESS = 3, 40821c9e160Sadam radford MR_LD_QUERY_TYPE_CLUSTER_LOCALE = 4, 40921c9e160Sadam radford }; 41021c9e160Sadam radford 41121c9e160Sadam radford 4127e8a75f4SYang, Bo #define MR_EVT_CFG_CLEARED 0x0004 4137e8a75f4SYang, Bo #define MR_EVT_LD_STATE_CHANGE 0x0051 4147e8a75f4SYang, Bo #define MR_EVT_PD_INSERTED 0x005b 4157e8a75f4SYang, Bo #define MR_EVT_PD_REMOVED 0x0070 4167e8a75f4SYang, Bo #define MR_EVT_LD_CREATED 0x008a 4177e8a75f4SYang, Bo #define MR_EVT_LD_DELETED 0x008b 4187e8a75f4SYang, Bo #define MR_EVT_FOREIGN_CFG_IMPORTED 0x00db 4197e8a75f4SYang, Bo #define MR_EVT_LD_OFFLINE 0x00fc 4207e8a75f4SYang, Bo #define MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED 0x0152 4217e8a75f4SYang, Bo 42281e403ceSYang, Bo enum MR_PD_STATE { 42381e403ceSYang, Bo MR_PD_STATE_UNCONFIGURED_GOOD = 0x00, 42481e403ceSYang, Bo MR_PD_STATE_UNCONFIGURED_BAD = 0x01, 42581e403ceSYang, Bo MR_PD_STATE_HOT_SPARE = 0x02, 42681e403ceSYang, Bo MR_PD_STATE_OFFLINE = 0x10, 42781e403ceSYang, Bo MR_PD_STATE_FAILED = 0x11, 42881e403ceSYang, Bo MR_PD_STATE_REBUILD = 0x14, 42981e403ceSYang, Bo MR_PD_STATE_ONLINE = 0x18, 43081e403ceSYang, Bo MR_PD_STATE_COPYBACK = 0x20, 43181e403ceSYang, Bo MR_PD_STATE_SYSTEM = 0x40, 43281e403ceSYang, Bo }; 43381e403ceSYang, Bo 43481e403ceSYang, Bo 43581e403ceSYang, Bo /* 43681e403ceSYang, Bo * defines the physical drive address structure 43781e403ceSYang, Bo */ 43881e403ceSYang, Bo struct MR_PD_ADDRESS { 4399ab9ed38SChristoph Hellwig __le16 deviceId; 44081e403ceSYang, Bo u16 enclDeviceId; 44181e403ceSYang, Bo 44281e403ceSYang, Bo union { 44381e403ceSYang, Bo struct { 44481e403ceSYang, Bo u8 enclIndex; 44581e403ceSYang, Bo u8 slotNumber; 44681e403ceSYang, Bo } mrPdAddress; 44781e403ceSYang, Bo struct { 44881e403ceSYang, Bo u8 enclPosition; 44981e403ceSYang, Bo u8 enclConnectorIndex; 45081e403ceSYang, Bo } mrEnclAddress; 45181e403ceSYang, Bo }; 45281e403ceSYang, Bo u8 scsiDevType; 45381e403ceSYang, Bo union { 45481e403ceSYang, Bo u8 connectedPortBitmap; 45581e403ceSYang, Bo u8 connectedPortNumbers; 45681e403ceSYang, Bo }; 45781e403ceSYang, Bo u64 sasAddr[2]; 45881e403ceSYang, Bo } __packed; 45981e403ceSYang, Bo 46081e403ceSYang, Bo /* 46181e403ceSYang, Bo * defines the physical drive list structure 46281e403ceSYang, Bo */ 46381e403ceSYang, Bo struct MR_PD_LIST { 4649ab9ed38SChristoph Hellwig __le32 size; 4659ab9ed38SChristoph Hellwig __le32 count; 46681e403ceSYang, Bo struct MR_PD_ADDRESS addr[1]; 46781e403ceSYang, Bo } __packed; 46881e403ceSYang, Bo 46981e403ceSYang, Bo struct megasas_pd_list { 47081e403ceSYang, Bo u16 tid; 47181e403ceSYang, Bo u8 driveType; 47281e403ceSYang, Bo u8 driveState; 47381e403ceSYang, Bo } __packed; 47481e403ceSYang, Bo 47581e403ceSYang, Bo /* 476bdc6fb8dSYang, Bo * defines the logical drive reference structure 477bdc6fb8dSYang, Bo */ 478bdc6fb8dSYang, Bo union MR_LD_REF { 479bdc6fb8dSYang, Bo struct { 480bdc6fb8dSYang, Bo u8 targetId; 481bdc6fb8dSYang, Bo u8 reserved; 4829ab9ed38SChristoph Hellwig __le16 seqNum; 483bdc6fb8dSYang, Bo }; 4849ab9ed38SChristoph Hellwig __le32 ref; 485bdc6fb8dSYang, Bo } __packed; 486bdc6fb8dSYang, Bo 487bdc6fb8dSYang, Bo /* 488bdc6fb8dSYang, Bo * defines the logical drive list structure 489bdc6fb8dSYang, Bo */ 490bdc6fb8dSYang, Bo struct MR_LD_LIST { 4919ab9ed38SChristoph Hellwig __le32 ldCount; 4929ab9ed38SChristoph Hellwig __le32 reserved; 493bdc6fb8dSYang, Bo struct { 494bdc6fb8dSYang, Bo union MR_LD_REF ref; 495bdc6fb8dSYang, Bo u8 state; 496bdc6fb8dSYang, Bo u8 reserved[3]; 4979ab9ed38SChristoph Hellwig __le64 size; 49851087a86SSumit.Saxena@avagotech.com } ldList[MAX_LOGICAL_DRIVES_EXT]; 499bdc6fb8dSYang, Bo } __packed; 500bdc6fb8dSYang, Bo 50121c9e160Sadam radford struct MR_LD_TARGETID_LIST { 5029ab9ed38SChristoph Hellwig __le32 size; 5039ab9ed38SChristoph Hellwig __le32 count; 50421c9e160Sadam radford u8 pad[3]; 50551087a86SSumit.Saxena@avagotech.com u8 targetId[MAX_LOGICAL_DRIVES_EXT]; 50621c9e160Sadam radford }; 50721c9e160Sadam radford 50821c9e160Sadam radford 509bdc6fb8dSYang, Bo /* 510c4a3e0a5SBagalkote, Sreenivas * SAS controller properties 511c4a3e0a5SBagalkote, Sreenivas */ 512c4a3e0a5SBagalkote, Sreenivas struct megasas_ctrl_prop { 513c4a3e0a5SBagalkote, Sreenivas 514c4a3e0a5SBagalkote, Sreenivas u16 seq_num; 515c4a3e0a5SBagalkote, Sreenivas u16 pred_fail_poll_interval; 516c4a3e0a5SBagalkote, Sreenivas u16 intr_throttle_count; 517c4a3e0a5SBagalkote, Sreenivas u16 intr_throttle_timeouts; 518c4a3e0a5SBagalkote, Sreenivas u8 rebuild_rate; 519c4a3e0a5SBagalkote, Sreenivas u8 patrol_read_rate; 520c4a3e0a5SBagalkote, Sreenivas u8 bgi_rate; 521c4a3e0a5SBagalkote, Sreenivas u8 cc_rate; 522c4a3e0a5SBagalkote, Sreenivas u8 recon_rate; 523c4a3e0a5SBagalkote, Sreenivas u8 cache_flush_interval; 524c4a3e0a5SBagalkote, Sreenivas u8 spinup_drv_count; 525c4a3e0a5SBagalkote, Sreenivas u8 spinup_delay; 526c4a3e0a5SBagalkote, Sreenivas u8 cluster_enable; 527c4a3e0a5SBagalkote, Sreenivas u8 coercion_mode; 528c4a3e0a5SBagalkote, Sreenivas u8 alarm_enable; 529c4a3e0a5SBagalkote, Sreenivas u8 disable_auto_rebuild; 530c4a3e0a5SBagalkote, Sreenivas u8 disable_battery_warn; 531c4a3e0a5SBagalkote, Sreenivas u8 ecc_bucket_size; 532c4a3e0a5SBagalkote, Sreenivas u16 ecc_bucket_leak_rate; 533c4a3e0a5SBagalkote, Sreenivas u8 restore_hotspare_on_insertion; 534c4a3e0a5SBagalkote, Sreenivas u8 expose_encl_devices; 53539a98554Sbo yang u8 maintainPdFailHistory; 53639a98554Sbo yang u8 disallowHostRequestReordering; 53739a98554Sbo yang u8 abortCCOnError; 53839a98554Sbo yang u8 loadBalanceMode; 53939a98554Sbo yang u8 disableAutoDetectBackplane; 540c4a3e0a5SBagalkote, Sreenivas 54139a98554Sbo yang u8 snapVDSpace; 54239a98554Sbo yang 54339a98554Sbo yang /* 54439a98554Sbo yang * Add properties that can be controlled by 54539a98554Sbo yang * a bit in the following structure. 54639a98554Sbo yang */ 54739a98554Sbo yang struct { 54894cd65ddSSumit.Saxena@lsi.com #if defined(__BIG_ENDIAN_BITFIELD) 54994cd65ddSSumit.Saxena@lsi.com u32 reserved:18; 55094cd65ddSSumit.Saxena@lsi.com u32 enableJBOD:1; 55194cd65ddSSumit.Saxena@lsi.com u32 disableSpinDownHS:1; 55294cd65ddSSumit.Saxena@lsi.com u32 allowBootWithPinnedCache:1; 55394cd65ddSSumit.Saxena@lsi.com u32 disableOnlineCtrlReset:1; 55494cd65ddSSumit.Saxena@lsi.com u32 enableSecretKeyControl:1; 55594cd65ddSSumit.Saxena@lsi.com u32 autoEnhancedImport:1; 55694cd65ddSSumit.Saxena@lsi.com u32 enableSpinDownUnconfigured:1; 55794cd65ddSSumit.Saxena@lsi.com u32 SSDPatrolReadEnabled:1; 55894cd65ddSSumit.Saxena@lsi.com u32 SSDSMARTerEnabled:1; 55994cd65ddSSumit.Saxena@lsi.com u32 disableNCQ:1; 56094cd65ddSSumit.Saxena@lsi.com u32 useFdeOnly:1; 56194cd65ddSSumit.Saxena@lsi.com u32 prCorrectUnconfiguredAreas:1; 56294cd65ddSSumit.Saxena@lsi.com u32 SMARTerEnabled:1; 56394cd65ddSSumit.Saxena@lsi.com u32 copyBackDisabled:1; 56494cd65ddSSumit.Saxena@lsi.com #else 56539a98554Sbo yang u32 copyBackDisabled:1; 56639a98554Sbo yang u32 SMARTerEnabled:1; 56739a98554Sbo yang u32 prCorrectUnconfiguredAreas:1; 56839a98554Sbo yang u32 useFdeOnly:1; 56939a98554Sbo yang u32 disableNCQ:1; 57039a98554Sbo yang u32 SSDSMARTerEnabled:1; 57139a98554Sbo yang u32 SSDPatrolReadEnabled:1; 57239a98554Sbo yang u32 enableSpinDownUnconfigured:1; 57339a98554Sbo yang u32 autoEnhancedImport:1; 57439a98554Sbo yang u32 enableSecretKeyControl:1; 57539a98554Sbo yang u32 disableOnlineCtrlReset:1; 57639a98554Sbo yang u32 allowBootWithPinnedCache:1; 57739a98554Sbo yang u32 disableSpinDownHS:1; 57839a98554Sbo yang u32 enableJBOD:1; 57939a98554Sbo yang u32 reserved:18; 58094cd65ddSSumit.Saxena@lsi.com #endif 58139a98554Sbo yang } OnOffProperties; 58239a98554Sbo yang u8 autoSnapVDSpace; 58339a98554Sbo yang u8 viewSpace; 5849ab9ed38SChristoph Hellwig __le16 spinDownTime; 58539a98554Sbo yang u8 reserved[24]; 58681e403ceSYang, Bo } __packed; 587c4a3e0a5SBagalkote, Sreenivas 588c4a3e0a5SBagalkote, Sreenivas /* 589c4a3e0a5SBagalkote, Sreenivas * SAS controller information 590c4a3e0a5SBagalkote, Sreenivas */ 591c4a3e0a5SBagalkote, Sreenivas struct megasas_ctrl_info { 592c4a3e0a5SBagalkote, Sreenivas 593c4a3e0a5SBagalkote, Sreenivas /* 594c4a3e0a5SBagalkote, Sreenivas * PCI device information 595c4a3e0a5SBagalkote, Sreenivas */ 596c4a3e0a5SBagalkote, Sreenivas struct { 597c4a3e0a5SBagalkote, Sreenivas 5989ab9ed38SChristoph Hellwig __le16 vendor_id; 5999ab9ed38SChristoph Hellwig __le16 device_id; 6009ab9ed38SChristoph Hellwig __le16 sub_vendor_id; 6019ab9ed38SChristoph Hellwig __le16 sub_device_id; 602c4a3e0a5SBagalkote, Sreenivas u8 reserved[24]; 603c4a3e0a5SBagalkote, Sreenivas 604c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pci; 605c4a3e0a5SBagalkote, Sreenivas 606c4a3e0a5SBagalkote, Sreenivas /* 607c4a3e0a5SBagalkote, Sreenivas * Host interface information 608c4a3e0a5SBagalkote, Sreenivas */ 609c4a3e0a5SBagalkote, Sreenivas struct { 610c4a3e0a5SBagalkote, Sreenivas 611c4a3e0a5SBagalkote, Sreenivas u8 PCIX:1; 612c4a3e0a5SBagalkote, Sreenivas u8 PCIE:1; 613c4a3e0a5SBagalkote, Sreenivas u8 iSCSI:1; 614c4a3e0a5SBagalkote, Sreenivas u8 SAS_3G:1; 615229fe47cSadam radford u8 SRIOV:1; 616229fe47cSadam radford u8 reserved_0:3; 617c4a3e0a5SBagalkote, Sreenivas u8 reserved_1[6]; 618c4a3e0a5SBagalkote, Sreenivas u8 port_count; 619c4a3e0a5SBagalkote, Sreenivas u64 port_addr[8]; 620c4a3e0a5SBagalkote, Sreenivas 621c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) host_interface; 622c4a3e0a5SBagalkote, Sreenivas 623c4a3e0a5SBagalkote, Sreenivas /* 624c4a3e0a5SBagalkote, Sreenivas * Device (backend) interface information 625c4a3e0a5SBagalkote, Sreenivas */ 626c4a3e0a5SBagalkote, Sreenivas struct { 627c4a3e0a5SBagalkote, Sreenivas 628c4a3e0a5SBagalkote, Sreenivas u8 SPI:1; 629c4a3e0a5SBagalkote, Sreenivas u8 SAS_3G:1; 630c4a3e0a5SBagalkote, Sreenivas u8 SATA_1_5G:1; 631c4a3e0a5SBagalkote, Sreenivas u8 SATA_3G:1; 632c4a3e0a5SBagalkote, Sreenivas u8 reserved_0:4; 633c4a3e0a5SBagalkote, Sreenivas u8 reserved_1[6]; 634c4a3e0a5SBagalkote, Sreenivas u8 port_count; 635c4a3e0a5SBagalkote, Sreenivas u64 port_addr[8]; 636c4a3e0a5SBagalkote, Sreenivas 637c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) device_interface; 638c4a3e0a5SBagalkote, Sreenivas 639c4a3e0a5SBagalkote, Sreenivas /* 640c4a3e0a5SBagalkote, Sreenivas * List of components residing in flash. All str are null terminated 641c4a3e0a5SBagalkote, Sreenivas */ 6429ab9ed38SChristoph Hellwig __le32 image_check_word; 6439ab9ed38SChristoph Hellwig __le32 image_component_count; 644c4a3e0a5SBagalkote, Sreenivas 645c4a3e0a5SBagalkote, Sreenivas struct { 646c4a3e0a5SBagalkote, Sreenivas 647c4a3e0a5SBagalkote, Sreenivas char name[8]; 648c4a3e0a5SBagalkote, Sreenivas char version[32]; 649c4a3e0a5SBagalkote, Sreenivas char build_date[16]; 650c4a3e0a5SBagalkote, Sreenivas char built_time[16]; 651c4a3e0a5SBagalkote, Sreenivas 652c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) image_component[8]; 653c4a3e0a5SBagalkote, Sreenivas 654c4a3e0a5SBagalkote, Sreenivas /* 655c4a3e0a5SBagalkote, Sreenivas * List of flash components that have been flashed on the card, but 656c4a3e0a5SBagalkote, Sreenivas * are not in use, pending reset of the adapter. This list will be 657c4a3e0a5SBagalkote, Sreenivas * empty if a flash operation has not occurred. All stings are null 658c4a3e0a5SBagalkote, Sreenivas * terminated 659c4a3e0a5SBagalkote, Sreenivas */ 6609ab9ed38SChristoph Hellwig __le32 pending_image_component_count; 661c4a3e0a5SBagalkote, Sreenivas 662c4a3e0a5SBagalkote, Sreenivas struct { 663c4a3e0a5SBagalkote, Sreenivas 664c4a3e0a5SBagalkote, Sreenivas char name[8]; 665c4a3e0a5SBagalkote, Sreenivas char version[32]; 666c4a3e0a5SBagalkote, Sreenivas char build_date[16]; 667c4a3e0a5SBagalkote, Sreenivas char build_time[16]; 668c4a3e0a5SBagalkote, Sreenivas 669c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pending_image_component[8]; 670c4a3e0a5SBagalkote, Sreenivas 671c4a3e0a5SBagalkote, Sreenivas u8 max_arms; 672c4a3e0a5SBagalkote, Sreenivas u8 max_spans; 673c4a3e0a5SBagalkote, Sreenivas u8 max_arrays; 674c4a3e0a5SBagalkote, Sreenivas u8 max_lds; 675c4a3e0a5SBagalkote, Sreenivas 676c4a3e0a5SBagalkote, Sreenivas char product_name[80]; 677c4a3e0a5SBagalkote, Sreenivas char serial_no[32]; 678c4a3e0a5SBagalkote, Sreenivas 679c4a3e0a5SBagalkote, Sreenivas /* 680c4a3e0a5SBagalkote, Sreenivas * Other physical/controller/operation information. Indicates the 681c4a3e0a5SBagalkote, Sreenivas * presence of the hardware 682c4a3e0a5SBagalkote, Sreenivas */ 683c4a3e0a5SBagalkote, Sreenivas struct { 684c4a3e0a5SBagalkote, Sreenivas 685c4a3e0a5SBagalkote, Sreenivas u32 bbu:1; 686c4a3e0a5SBagalkote, Sreenivas u32 alarm:1; 687c4a3e0a5SBagalkote, Sreenivas u32 nvram:1; 688c4a3e0a5SBagalkote, Sreenivas u32 uart:1; 689c4a3e0a5SBagalkote, Sreenivas u32 reserved:28; 690c4a3e0a5SBagalkote, Sreenivas 691c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) hw_present; 692c4a3e0a5SBagalkote, Sreenivas 6939ab9ed38SChristoph Hellwig __le32 current_fw_time; 694c4a3e0a5SBagalkote, Sreenivas 695c4a3e0a5SBagalkote, Sreenivas /* 696c4a3e0a5SBagalkote, Sreenivas * Maximum data transfer sizes 697c4a3e0a5SBagalkote, Sreenivas */ 6989ab9ed38SChristoph Hellwig __le16 max_concurrent_cmds; 6999ab9ed38SChristoph Hellwig __le16 max_sge_count; 7009ab9ed38SChristoph Hellwig __le32 max_request_size; 701c4a3e0a5SBagalkote, Sreenivas 702c4a3e0a5SBagalkote, Sreenivas /* 703c4a3e0a5SBagalkote, Sreenivas * Logical and physical device counts 704c4a3e0a5SBagalkote, Sreenivas */ 7059ab9ed38SChristoph Hellwig __le16 ld_present_count; 7069ab9ed38SChristoph Hellwig __le16 ld_degraded_count; 7079ab9ed38SChristoph Hellwig __le16 ld_offline_count; 708c4a3e0a5SBagalkote, Sreenivas 7099ab9ed38SChristoph Hellwig __le16 pd_present_count; 7109ab9ed38SChristoph Hellwig __le16 pd_disk_present_count; 7119ab9ed38SChristoph Hellwig __le16 pd_disk_pred_failure_count; 7129ab9ed38SChristoph Hellwig __le16 pd_disk_failed_count; 713c4a3e0a5SBagalkote, Sreenivas 714c4a3e0a5SBagalkote, Sreenivas /* 715c4a3e0a5SBagalkote, Sreenivas * Memory size information 716c4a3e0a5SBagalkote, Sreenivas */ 7179ab9ed38SChristoph Hellwig __le16 nvram_size; 7189ab9ed38SChristoph Hellwig __le16 memory_size; 7199ab9ed38SChristoph Hellwig __le16 flash_size; 720c4a3e0a5SBagalkote, Sreenivas 721c4a3e0a5SBagalkote, Sreenivas /* 722c4a3e0a5SBagalkote, Sreenivas * Error counters 723c4a3e0a5SBagalkote, Sreenivas */ 7249ab9ed38SChristoph Hellwig __le16 mem_correctable_error_count; 7259ab9ed38SChristoph Hellwig __le16 mem_uncorrectable_error_count; 726c4a3e0a5SBagalkote, Sreenivas 727c4a3e0a5SBagalkote, Sreenivas /* 728c4a3e0a5SBagalkote, Sreenivas * Cluster information 729c4a3e0a5SBagalkote, Sreenivas */ 730c4a3e0a5SBagalkote, Sreenivas u8 cluster_permitted; 731c4a3e0a5SBagalkote, Sreenivas u8 cluster_active; 732c4a3e0a5SBagalkote, Sreenivas 733c4a3e0a5SBagalkote, Sreenivas /* 734c4a3e0a5SBagalkote, Sreenivas * Additional max data transfer sizes 735c4a3e0a5SBagalkote, Sreenivas */ 7369ab9ed38SChristoph Hellwig __le16 max_strips_per_io; 737c4a3e0a5SBagalkote, Sreenivas 738c4a3e0a5SBagalkote, Sreenivas /* 739c4a3e0a5SBagalkote, Sreenivas * Controller capabilities structures 740c4a3e0a5SBagalkote, Sreenivas */ 741c4a3e0a5SBagalkote, Sreenivas struct { 742c4a3e0a5SBagalkote, Sreenivas 743c4a3e0a5SBagalkote, Sreenivas u32 raid_level_0:1; 744c4a3e0a5SBagalkote, Sreenivas u32 raid_level_1:1; 745c4a3e0a5SBagalkote, Sreenivas u32 raid_level_5:1; 746c4a3e0a5SBagalkote, Sreenivas u32 raid_level_1E:1; 747c4a3e0a5SBagalkote, Sreenivas u32 raid_level_6:1; 748c4a3e0a5SBagalkote, Sreenivas u32 reserved:27; 749c4a3e0a5SBagalkote, Sreenivas 750c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) raid_levels; 751c4a3e0a5SBagalkote, Sreenivas 752c4a3e0a5SBagalkote, Sreenivas struct { 753c4a3e0a5SBagalkote, Sreenivas 754c4a3e0a5SBagalkote, Sreenivas u32 rbld_rate:1; 755c4a3e0a5SBagalkote, Sreenivas u32 cc_rate:1; 756c4a3e0a5SBagalkote, Sreenivas u32 bgi_rate:1; 757c4a3e0a5SBagalkote, Sreenivas u32 recon_rate:1; 758c4a3e0a5SBagalkote, Sreenivas u32 patrol_rate:1; 759c4a3e0a5SBagalkote, Sreenivas u32 alarm_control:1; 760c4a3e0a5SBagalkote, Sreenivas u32 cluster_supported:1; 761c4a3e0a5SBagalkote, Sreenivas u32 bbu:1; 762c4a3e0a5SBagalkote, Sreenivas u32 spanning_allowed:1; 763c4a3e0a5SBagalkote, Sreenivas u32 dedicated_hotspares:1; 764c4a3e0a5SBagalkote, Sreenivas u32 revertible_hotspares:1; 765c4a3e0a5SBagalkote, Sreenivas u32 foreign_config_import:1; 766c4a3e0a5SBagalkote, Sreenivas u32 self_diagnostic:1; 767c4a3e0a5SBagalkote, Sreenivas u32 mixed_redundancy_arr:1; 768c4a3e0a5SBagalkote, Sreenivas u32 global_hot_spares:1; 769c4a3e0a5SBagalkote, Sreenivas u32 reserved:17; 770c4a3e0a5SBagalkote, Sreenivas 771c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) adapter_operations; 772c4a3e0a5SBagalkote, Sreenivas 773c4a3e0a5SBagalkote, Sreenivas struct { 774c4a3e0a5SBagalkote, Sreenivas 775c4a3e0a5SBagalkote, Sreenivas u32 read_policy:1; 776c4a3e0a5SBagalkote, Sreenivas u32 write_policy:1; 777c4a3e0a5SBagalkote, Sreenivas u32 io_policy:1; 778c4a3e0a5SBagalkote, Sreenivas u32 access_policy:1; 779c4a3e0a5SBagalkote, Sreenivas u32 disk_cache_policy:1; 780c4a3e0a5SBagalkote, Sreenivas u32 reserved:27; 781c4a3e0a5SBagalkote, Sreenivas 782c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_operations; 783c4a3e0a5SBagalkote, Sreenivas 784c4a3e0a5SBagalkote, Sreenivas struct { 785c4a3e0a5SBagalkote, Sreenivas 786c4a3e0a5SBagalkote, Sreenivas u8 min; 787c4a3e0a5SBagalkote, Sreenivas u8 max; 788c4a3e0a5SBagalkote, Sreenivas u8 reserved[2]; 789c4a3e0a5SBagalkote, Sreenivas 790c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) stripe_sz_ops; 791c4a3e0a5SBagalkote, Sreenivas 792c4a3e0a5SBagalkote, Sreenivas struct { 793c4a3e0a5SBagalkote, Sreenivas 794c4a3e0a5SBagalkote, Sreenivas u32 force_online:1; 795c4a3e0a5SBagalkote, Sreenivas u32 force_offline:1; 796c4a3e0a5SBagalkote, Sreenivas u32 force_rebuild:1; 797c4a3e0a5SBagalkote, Sreenivas u32 reserved:29; 798c4a3e0a5SBagalkote, Sreenivas 799c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_operations; 800c4a3e0a5SBagalkote, Sreenivas 801c4a3e0a5SBagalkote, Sreenivas struct { 802c4a3e0a5SBagalkote, Sreenivas 803c4a3e0a5SBagalkote, Sreenivas u32 ctrl_supports_sas:1; 804c4a3e0a5SBagalkote, Sreenivas u32 ctrl_supports_sata:1; 805c4a3e0a5SBagalkote, Sreenivas u32 allow_mix_in_encl:1; 806c4a3e0a5SBagalkote, Sreenivas u32 allow_mix_in_ld:1; 807c4a3e0a5SBagalkote, Sreenivas u32 allow_sata_in_cluster:1; 808c4a3e0a5SBagalkote, Sreenivas u32 reserved:27; 809c4a3e0a5SBagalkote, Sreenivas 810c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_mix_support; 811c4a3e0a5SBagalkote, Sreenivas 812c4a3e0a5SBagalkote, Sreenivas /* 813c4a3e0a5SBagalkote, Sreenivas * Define ECC single-bit-error bucket information 814c4a3e0a5SBagalkote, Sreenivas */ 815c4a3e0a5SBagalkote, Sreenivas u8 ecc_bucket_count; 816c4a3e0a5SBagalkote, Sreenivas u8 reserved_2[11]; 817c4a3e0a5SBagalkote, Sreenivas 818c4a3e0a5SBagalkote, Sreenivas /* 819c4a3e0a5SBagalkote, Sreenivas * Include the controller properties (changeable items) 820c4a3e0a5SBagalkote, Sreenivas */ 821c4a3e0a5SBagalkote, Sreenivas struct megasas_ctrl_prop properties; 822c4a3e0a5SBagalkote, Sreenivas 823c4a3e0a5SBagalkote, Sreenivas /* 824c4a3e0a5SBagalkote, Sreenivas * Define FW pkg version (set in envt v'bles on OEM basis) 825c4a3e0a5SBagalkote, Sreenivas */ 826c4a3e0a5SBagalkote, Sreenivas char package_version[0x60]; 827c4a3e0a5SBagalkote, Sreenivas 828c4a3e0a5SBagalkote, Sreenivas 829bc93d425SSumit.Saxena@lsi.com /* 830bc93d425SSumit.Saxena@lsi.com * If adapterOperations.supportMoreThan8Phys is set, 831bc93d425SSumit.Saxena@lsi.com * and deviceInterface.portCount is greater than 8, 832bc93d425SSumit.Saxena@lsi.com * SAS Addrs for first 8 ports shall be populated in 833bc93d425SSumit.Saxena@lsi.com * deviceInterface.portAddr, and the rest shall be 834bc93d425SSumit.Saxena@lsi.com * populated in deviceInterfacePortAddr2. 835bc93d425SSumit.Saxena@lsi.com */ 8369ab9ed38SChristoph Hellwig __le64 deviceInterfacePortAddr2[8]; /*6a0h */ 837bc93d425SSumit.Saxena@lsi.com u8 reserved3[128]; /*6e0h */ 838bc93d425SSumit.Saxena@lsi.com 839bc93d425SSumit.Saxena@lsi.com struct { /*760h */ 840bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_0:4; 841bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_0:12; 842bc93d425SSumit.Saxena@lsi.com 843bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1:4; 844bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1:12; 845bc93d425SSumit.Saxena@lsi.com 846bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_5:4; 847bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_5:12; 848bc93d425SSumit.Saxena@lsi.com 849bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1E:4; 850bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1E:12; 851bc93d425SSumit.Saxena@lsi.com 852bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_6:4; 853bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_6:12; 854bc93d425SSumit.Saxena@lsi.com 855bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_10:4; 856bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_10:12; 857bc93d425SSumit.Saxena@lsi.com 858bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_50:4; 859bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_50:12; 860bc93d425SSumit.Saxena@lsi.com 861bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_60:4; 862bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_60:12; 863bc93d425SSumit.Saxena@lsi.com 864bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1E_RLQ0:4; 865bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1E_RLQ0:12; 866bc93d425SSumit.Saxena@lsi.com 867bc93d425SSumit.Saxena@lsi.com u16 minPdRaidLevel_1E0_RLQ0:4; 868bc93d425SSumit.Saxena@lsi.com u16 maxPdRaidLevel_1E0_RLQ0:12; 869bc93d425SSumit.Saxena@lsi.com 870bc93d425SSumit.Saxena@lsi.com u16 reserved[6]; 871bc93d425SSumit.Saxena@lsi.com } pdsForRaidLevels; 872bc93d425SSumit.Saxena@lsi.com 8739ab9ed38SChristoph Hellwig __le16 maxPds; /*780h */ 8749ab9ed38SChristoph Hellwig __le16 maxDedHSPs; /*782h */ 8759ab9ed38SChristoph Hellwig __le16 maxGlobalHSP; /*784h */ 8769ab9ed38SChristoph Hellwig __le16 ddfSize; /*786h */ 877bc93d425SSumit.Saxena@lsi.com u8 maxLdsPerArray; /*788h */ 878bc93d425SSumit.Saxena@lsi.com u8 partitionsInDDF; /*789h */ 879bc93d425SSumit.Saxena@lsi.com u8 lockKeyBinding; /*78ah */ 880bc93d425SSumit.Saxena@lsi.com u8 maxPITsPerLd; /*78bh */ 881bc93d425SSumit.Saxena@lsi.com u8 maxViewsPerLd; /*78ch */ 882bc93d425SSumit.Saxena@lsi.com u8 maxTargetId; /*78dh */ 8839ab9ed38SChristoph Hellwig __le16 maxBvlVdSize; /*78eh */ 884bc93d425SSumit.Saxena@lsi.com 8859ab9ed38SChristoph Hellwig __le16 maxConfigurableSSCSize; /*790h */ 8869ab9ed38SChristoph Hellwig __le16 currentSSCsize; /*792h */ 887bc93d425SSumit.Saxena@lsi.com 888bc93d425SSumit.Saxena@lsi.com char expanderFwVersion[12]; /*794h */ 889bc93d425SSumit.Saxena@lsi.com 8909ab9ed38SChristoph Hellwig __le16 PFKTrialTimeRemaining; /*7A0h */ 891bc93d425SSumit.Saxena@lsi.com 8929ab9ed38SChristoph Hellwig __le16 cacheMemorySize; /*7A2h */ 893bc93d425SSumit.Saxena@lsi.com 894bc93d425SSumit.Saxena@lsi.com struct { /*7A4h */ 89594cd65ddSSumit.Saxena@lsi.com #if defined(__BIG_ENDIAN_BITFIELD) 896229fe47cSadam radford u32 reserved:5; 897229fe47cSadam radford u32 activePassive:2; 898229fe47cSadam radford u32 supportConfigAutoBalance:1; 899229fe47cSadam radford u32 mpio:1; 900229fe47cSadam radford u32 supportDataLDonSSCArray:1; 901229fe47cSadam radford u32 supportPointInTimeProgress:1; 90294cd65ddSSumit.Saxena@lsi.com u32 supportUnevenSpans:1; 90394cd65ddSSumit.Saxena@lsi.com u32 dedicatedHotSparesLimited:1; 90494cd65ddSSumit.Saxena@lsi.com u32 headlessMode:1; 90594cd65ddSSumit.Saxena@lsi.com u32 supportEmulatedDrives:1; 90694cd65ddSSumit.Saxena@lsi.com u32 supportResetNow:1; 90794cd65ddSSumit.Saxena@lsi.com u32 realTimeScheduler:1; 90894cd65ddSSumit.Saxena@lsi.com u32 supportSSDPatrolRead:1; 90994cd65ddSSumit.Saxena@lsi.com u32 supportPerfTuning:1; 91094cd65ddSSumit.Saxena@lsi.com u32 disableOnlinePFKChange:1; 91194cd65ddSSumit.Saxena@lsi.com u32 supportJBOD:1; 91294cd65ddSSumit.Saxena@lsi.com u32 supportBootTimePFKChange:1; 91394cd65ddSSumit.Saxena@lsi.com u32 supportSetLinkSpeed:1; 91494cd65ddSSumit.Saxena@lsi.com u32 supportEmergencySpares:1; 91594cd65ddSSumit.Saxena@lsi.com u32 supportSuspendResumeBGops:1; 91694cd65ddSSumit.Saxena@lsi.com u32 blockSSDWriteCacheChange:1; 91794cd65ddSSumit.Saxena@lsi.com u32 supportShieldState:1; 91894cd65ddSSumit.Saxena@lsi.com u32 supportLdBBMInfo:1; 91994cd65ddSSumit.Saxena@lsi.com u32 supportLdPIType3:1; 92094cd65ddSSumit.Saxena@lsi.com u32 supportLdPIType2:1; 92194cd65ddSSumit.Saxena@lsi.com u32 supportLdPIType1:1; 92294cd65ddSSumit.Saxena@lsi.com u32 supportPIcontroller:1; 92394cd65ddSSumit.Saxena@lsi.com #else 924bc93d425SSumit.Saxena@lsi.com u32 supportPIcontroller:1; 925bc93d425SSumit.Saxena@lsi.com u32 supportLdPIType1:1; 926bc93d425SSumit.Saxena@lsi.com u32 supportLdPIType2:1; 927bc93d425SSumit.Saxena@lsi.com u32 supportLdPIType3:1; 928bc93d425SSumit.Saxena@lsi.com u32 supportLdBBMInfo:1; 929bc93d425SSumit.Saxena@lsi.com u32 supportShieldState:1; 930bc93d425SSumit.Saxena@lsi.com u32 blockSSDWriteCacheChange:1; 931bc93d425SSumit.Saxena@lsi.com u32 supportSuspendResumeBGops:1; 932bc93d425SSumit.Saxena@lsi.com u32 supportEmergencySpares:1; 933bc93d425SSumit.Saxena@lsi.com u32 supportSetLinkSpeed:1; 934bc93d425SSumit.Saxena@lsi.com u32 supportBootTimePFKChange:1; 935bc93d425SSumit.Saxena@lsi.com u32 supportJBOD:1; 936bc93d425SSumit.Saxena@lsi.com u32 disableOnlinePFKChange:1; 937bc93d425SSumit.Saxena@lsi.com u32 supportPerfTuning:1; 938bc93d425SSumit.Saxena@lsi.com u32 supportSSDPatrolRead:1; 939bc93d425SSumit.Saxena@lsi.com u32 realTimeScheduler:1; 940bc93d425SSumit.Saxena@lsi.com 941bc93d425SSumit.Saxena@lsi.com u32 supportResetNow:1; 942bc93d425SSumit.Saxena@lsi.com u32 supportEmulatedDrives:1; 943bc93d425SSumit.Saxena@lsi.com u32 headlessMode:1; 944bc93d425SSumit.Saxena@lsi.com u32 dedicatedHotSparesLimited:1; 945bc93d425SSumit.Saxena@lsi.com 946bc93d425SSumit.Saxena@lsi.com 947bc93d425SSumit.Saxena@lsi.com u32 supportUnevenSpans:1; 948229fe47cSadam radford u32 supportPointInTimeProgress:1; 949229fe47cSadam radford u32 supportDataLDonSSCArray:1; 950229fe47cSadam radford u32 mpio:1; 951229fe47cSadam radford u32 supportConfigAutoBalance:1; 952229fe47cSadam radford u32 activePassive:2; 953229fe47cSadam radford u32 reserved:5; 95494cd65ddSSumit.Saxena@lsi.com #endif 955bc93d425SSumit.Saxena@lsi.com } adapterOperations2; 956bc93d425SSumit.Saxena@lsi.com 957bc93d425SSumit.Saxena@lsi.com u8 driverVersion[32]; /*7A8h */ 958bc93d425SSumit.Saxena@lsi.com u8 maxDAPdCountSpinup60; /*7C8h */ 959bc93d425SSumit.Saxena@lsi.com u8 temperatureROC; /*7C9h */ 960bc93d425SSumit.Saxena@lsi.com u8 temperatureCtrl; /*7CAh */ 961bc93d425SSumit.Saxena@lsi.com u8 reserved4; /*7CBh */ 9629ab9ed38SChristoph Hellwig __le16 maxConfigurablePds; /*7CCh */ 963bc93d425SSumit.Saxena@lsi.com 964bc93d425SSumit.Saxena@lsi.com 965bc93d425SSumit.Saxena@lsi.com u8 reserved5[2]; /*0x7CDh */ 966bc93d425SSumit.Saxena@lsi.com 967bc93d425SSumit.Saxena@lsi.com /* 968bc93d425SSumit.Saxena@lsi.com * HA cluster information 969bc93d425SSumit.Saxena@lsi.com */ 970bc93d425SSumit.Saxena@lsi.com struct { 97151087a86SSumit.Saxena@avagotech.com #if defined(__BIG_ENDIAN_BITFIELD) 97251087a86SSumit.Saxena@avagotech.com u32 reserved:26; 97351087a86SSumit.Saxena@avagotech.com u32 premiumFeatureMismatch:1; 97451087a86SSumit.Saxena@avagotech.com u32 ctrlPropIncompatible:1; 97551087a86SSumit.Saxena@avagotech.com u32 fwVersionMismatch:1; 97651087a86SSumit.Saxena@avagotech.com u32 hwIncompatible:1; 97751087a86SSumit.Saxena@avagotech.com u32 peerIsIncompatible:1; 97851087a86SSumit.Saxena@avagotech.com u32 peerIsPresent:1; 97951087a86SSumit.Saxena@avagotech.com #else 980bc93d425SSumit.Saxena@lsi.com u32 peerIsPresent:1; 981bc93d425SSumit.Saxena@lsi.com u32 peerIsIncompatible:1; 982bc93d425SSumit.Saxena@lsi.com u32 hwIncompatible:1; 983bc93d425SSumit.Saxena@lsi.com u32 fwVersionMismatch:1; 984bc93d425SSumit.Saxena@lsi.com u32 ctrlPropIncompatible:1; 985bc93d425SSumit.Saxena@lsi.com u32 premiumFeatureMismatch:1; 986bc93d425SSumit.Saxena@lsi.com u32 reserved:26; 98751087a86SSumit.Saxena@avagotech.com #endif 988bc93d425SSumit.Saxena@lsi.com } cluster; 989bc93d425SSumit.Saxena@lsi.com 990bc93d425SSumit.Saxena@lsi.com char clusterId[16]; /*7D4h */ 991229fe47cSadam radford struct { 992229fe47cSadam radford u8 maxVFsSupported; /*0x7E4*/ 993229fe47cSadam radford u8 numVFsEnabled; /*0x7E5*/ 994229fe47cSadam radford u8 requestorId; /*0x7E6 0:PF, 1:VF1, 2:VF2*/ 995229fe47cSadam radford u8 reserved; /*0x7E7*/ 996229fe47cSadam radford } iov; 997bc93d425SSumit.Saxena@lsi.com 998fc62b3fcSSumit.Saxena@avagotech.com struct { 999fc62b3fcSSumit.Saxena@avagotech.com #if defined(__BIG_ENDIAN_BITFIELD) 10003761cb4cSsumit.saxena@avagotech.com u32 reserved:7; 10013761cb4cSsumit.saxena@avagotech.com u32 useSeqNumJbodFP:1; 10020be3f4c9Ssumit.saxena@avagotech.com u32 supportExtendedSSCSize:1; 10030be3f4c9Ssumit.saxena@avagotech.com u32 supportDiskCacheSettingForSysPDs:1; 10040be3f4c9Ssumit.saxena@avagotech.com u32 supportCPLDUpdate:1; 10050be3f4c9Ssumit.saxena@avagotech.com u32 supportTTYLogCompression:1; 10067497cde8SSumit.Saxena@avagotech.com u32 discardCacheDuringLDDelete:1; 10077497cde8SSumit.Saxena@avagotech.com u32 supportSecurityonJBOD:1; 10087497cde8SSumit.Saxena@avagotech.com u32 supportCacheBypassModes:1; 10097497cde8SSumit.Saxena@avagotech.com u32 supportDisableSESMonitoring:1; 10107497cde8SSumit.Saxena@avagotech.com u32 supportForceFlash:1; 10117497cde8SSumit.Saxena@avagotech.com u32 supportNVDRAM:1; 10127497cde8SSumit.Saxena@avagotech.com u32 supportDrvActivityLEDSetting:1; 10137497cde8SSumit.Saxena@avagotech.com u32 supportAllowedOpsforDrvRemoval:1; 10147497cde8SSumit.Saxena@avagotech.com u32 supportHOQRebuild:1; 10157497cde8SSumit.Saxena@avagotech.com u32 supportForceTo512e:1; 10167497cde8SSumit.Saxena@avagotech.com u32 supportNVCacheErase:1; 10177497cde8SSumit.Saxena@avagotech.com u32 supportDebugQueue:1; 10187497cde8SSumit.Saxena@avagotech.com u32 supportSwZone:1; 1019fc62b3fcSSumit.Saxena@avagotech.com u32 supportCrashDump:1; 102051087a86SSumit.Saxena@avagotech.com u32 supportMaxExtLDs:1; 102151087a86SSumit.Saxena@avagotech.com u32 supportT10RebuildAssist:1; 102251087a86SSumit.Saxena@avagotech.com u32 supportDisableImmediateIO:1; 102351087a86SSumit.Saxena@avagotech.com u32 supportThermalPollInterval:1; 102451087a86SSumit.Saxena@avagotech.com u32 supportPersonalityChange:2; 1025fc62b3fcSSumit.Saxena@avagotech.com #else 102651087a86SSumit.Saxena@avagotech.com u32 supportPersonalityChange:2; 102751087a86SSumit.Saxena@avagotech.com u32 supportThermalPollInterval:1; 102851087a86SSumit.Saxena@avagotech.com u32 supportDisableImmediateIO:1; 102951087a86SSumit.Saxena@avagotech.com u32 supportT10RebuildAssist:1; 103051087a86SSumit.Saxena@avagotech.com u32 supportMaxExtLDs:1; 1031fc62b3fcSSumit.Saxena@avagotech.com u32 supportCrashDump:1; 10327497cde8SSumit.Saxena@avagotech.com u32 supportSwZone:1; 10337497cde8SSumit.Saxena@avagotech.com u32 supportDebugQueue:1; 10347497cde8SSumit.Saxena@avagotech.com u32 supportNVCacheErase:1; 10357497cde8SSumit.Saxena@avagotech.com u32 supportForceTo512e:1; 10367497cde8SSumit.Saxena@avagotech.com u32 supportHOQRebuild:1; 10377497cde8SSumit.Saxena@avagotech.com u32 supportAllowedOpsforDrvRemoval:1; 10387497cde8SSumit.Saxena@avagotech.com u32 supportDrvActivityLEDSetting:1; 10397497cde8SSumit.Saxena@avagotech.com u32 supportNVDRAM:1; 10407497cde8SSumit.Saxena@avagotech.com u32 supportForceFlash:1; 10417497cde8SSumit.Saxena@avagotech.com u32 supportDisableSESMonitoring:1; 10427497cde8SSumit.Saxena@avagotech.com u32 supportCacheBypassModes:1; 10437497cde8SSumit.Saxena@avagotech.com u32 supportSecurityonJBOD:1; 10447497cde8SSumit.Saxena@avagotech.com u32 discardCacheDuringLDDelete:1; 10450be3f4c9Ssumit.saxena@avagotech.com u32 supportTTYLogCompression:1; 10460be3f4c9Ssumit.saxena@avagotech.com u32 supportCPLDUpdate:1; 10470be3f4c9Ssumit.saxena@avagotech.com u32 supportDiskCacheSettingForSysPDs:1; 10480be3f4c9Ssumit.saxena@avagotech.com u32 supportExtendedSSCSize:1; 10493761cb4cSsumit.saxena@avagotech.com u32 useSeqNumJbodFP:1; 10503761cb4cSsumit.saxena@avagotech.com u32 reserved:7; 1051fc62b3fcSSumit.Saxena@avagotech.com #endif 1052fc62b3fcSSumit.Saxena@avagotech.com } adapterOperations3; 1053fc62b3fcSSumit.Saxena@avagotech.com 1054fc62b3fcSSumit.Saxena@avagotech.com u8 pad[0x800-0x7EC]; 105581e403ceSYang, Bo } __packed; 1056c4a3e0a5SBagalkote, Sreenivas 1057c4a3e0a5SBagalkote, Sreenivas /* 1058c4a3e0a5SBagalkote, Sreenivas * =============================== 1059c4a3e0a5SBagalkote, Sreenivas * MegaRAID SAS driver definitions 1060c4a3e0a5SBagalkote, Sreenivas * =============================== 1061c4a3e0a5SBagalkote, Sreenivas */ 1062c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_PD_CHANNELS 2 106351087a86SSumit.Saxena@avagotech.com #define MEGASAS_MAX_LD_CHANNELS 2 1064c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_CHANNELS (MEGASAS_MAX_PD_CHANNELS + \ 1065c4a3e0a5SBagalkote, Sreenivas MEGASAS_MAX_LD_CHANNELS) 1066c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_DEV_PER_CHANNEL 128 1067c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_DEFAULT_INIT_ID -1 1068c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_MAX_LUN 8 10696bf579a3Sadam radford #define MEGASAS_DEFAULT_CMD_PER_LUN 256 107081e403ceSYang, Bo #define MEGASAS_MAX_PD (MEGASAS_MAX_PD_CHANNELS * \ 107181e403ceSYang, Bo MEGASAS_MAX_DEV_PER_CHANNEL) 1072bdc6fb8dSYang, Bo #define MEGASAS_MAX_LD_IDS (MEGASAS_MAX_LD_CHANNELS * \ 1073bdc6fb8dSYang, Bo MEGASAS_MAX_DEV_PER_CHANNEL) 1074c4a3e0a5SBagalkote, Sreenivas 10751fd10685SYang, Bo #define MEGASAS_MAX_SECTORS (2*1024) 107642a8d2b3Sadam radford #define MEGASAS_MAX_SECTORS_IEEE (2*128) 1077658dcedbSSumant Patro #define MEGASAS_DBG_LVL 1 1078658dcedbSSumant Patro 107905e9ebbeSSumant Patro #define MEGASAS_FW_BUSY 1 108005e9ebbeSSumant Patro 108151087a86SSumit.Saxena@avagotech.com #define VD_EXT_DEBUG 0 108251087a86SSumit.Saxena@avagotech.com 108390dc9d98SSumit.Saxena@avagotech.com 10847497cde8SSumit.Saxena@avagotech.com enum MR_SCSI_CMD_TYPE { 10857497cde8SSumit.Saxena@avagotech.com READ_WRITE_LDIO = 0, 10867497cde8SSumit.Saxena@avagotech.com NON_READ_WRITE_LDIO = 1, 10877497cde8SSumit.Saxena@avagotech.com READ_WRITE_SYSPDIO = 2, 10887497cde8SSumit.Saxena@avagotech.com NON_READ_WRITE_SYSPDIO = 3, 10897497cde8SSumit.Saxena@avagotech.com }; 10907497cde8SSumit.Saxena@avagotech.com 1091d532dbe2Sbo yang /* Frame Type */ 1092d532dbe2Sbo yang #define IO_FRAME 0 1093d532dbe2Sbo yang #define PTHRU_FRAME 1 1094d532dbe2Sbo yang 1095c4a3e0a5SBagalkote, Sreenivas /* 1096c4a3e0a5SBagalkote, Sreenivas * When SCSI mid-layer calls driver's reset routine, driver waits for 1097c4a3e0a5SBagalkote, Sreenivas * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note 1098c4a3e0a5SBagalkote, Sreenivas * that the driver cannot _actually_ abort or reset pending commands. While 1099c4a3e0a5SBagalkote, Sreenivas * it is waiting for the commands to complete, it prints a diagnostic message 1100c4a3e0a5SBagalkote, Sreenivas * every MEGASAS_RESET_NOTICE_INTERVAL seconds 1101c4a3e0a5SBagalkote, Sreenivas */ 1102c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_RESET_WAIT_TIME 180 11032a3681e5SSumant Patro #define MEGASAS_INTERNAL_CMD_WAIT_TIME 180 1104c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_RESET_NOTICE_INTERVAL 5 1105c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_IOCTL_CMD 0 110605e9ebbeSSumant Patro #define MEGASAS_DEFAULT_CMD_TIMEOUT 90 1107c5daa6a9Sadam radford #define MEGASAS_THROTTLE_QUEUE_DEPTH 16 110890dc9d98SSumit.Saxena@avagotech.com #define MEGASAS_BLOCKED_CMD_TIMEOUT 60 1109c4a3e0a5SBagalkote, Sreenivas /* 1110c4a3e0a5SBagalkote, Sreenivas * FW reports the maximum of number of commands that it can accept (maximum 1111c4a3e0a5SBagalkote, Sreenivas * commands that can be outstanding) at any time. The driver must report a 1112c4a3e0a5SBagalkote, Sreenivas * lower number to the mid layer because it can issue a few internal commands 1113c4a3e0a5SBagalkote, Sreenivas * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs 1114c4a3e0a5SBagalkote, Sreenivas * is shown below 1115c4a3e0a5SBagalkote, Sreenivas */ 1116c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_INT_CMDS 32 11177bebf5c7SYang, Bo #define MEGASAS_SKINNY_INT_CMDS 5 1118ae09a6c1SSumit.Saxena@avagotech.com #define MEGASAS_FUSION_INTERNAL_CMDS 5 1119ae09a6c1SSumit.Saxena@avagotech.com #define MEGASAS_FUSION_IOCTL_CMDS 3 1120f26ac3a1SSumit.Saxena@avagotech.com #define MEGASAS_MFI_IOCTL_CMDS 27 1121c4a3e0a5SBagalkote, Sreenivas 1122d46a3ad6SSumit.Saxena@lsi.com #define MEGASAS_MAX_MSIX_QUEUES 128 1123c4a3e0a5SBagalkote, Sreenivas /* 1124c4a3e0a5SBagalkote, Sreenivas * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit 1125c4a3e0a5SBagalkote, Sreenivas * SGLs based on the size of dma_addr_t 1126c4a3e0a5SBagalkote, Sreenivas */ 1127c4a3e0a5SBagalkote, Sreenivas #define IS_DMA64 (sizeof(dma_addr_t) == 8) 1128c4a3e0a5SBagalkote, Sreenivas 112939a98554Sbo yang #define MFI_XSCALE_OMR0_CHANGE_INTERRUPT 0x00000001 113039a98554Sbo yang 113139a98554Sbo yang #define MFI_INTR_FLAG_REPLY_MESSAGE 0x00000001 113239a98554Sbo yang #define MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE 0x00000002 113339a98554Sbo yang #define MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT 0x00000004 113439a98554Sbo yang 1135c4a3e0a5SBagalkote, Sreenivas #define MFI_OB_INTR_STATUS_MASK 0x00000002 113614faea9fSbo yang #define MFI_POLL_TIMEOUT_SECS 60 1137229fe47cSadam radford #define MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF (5 * HZ) 1138229fe47cSadam radford #define MEGASAS_OCR_SETTLE_TIME_VF (1000 * 30) 1139229fe47cSadam radford #define MEGASAS_ROUTINE_WAIT_TIME_VF 300 1140f9876f0bSSumant Patro #define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000 11416610a6b3SYang, Bo #define MFI_REPLY_GEN2_MESSAGE_INTERRUPT 0x00000001 11426610a6b3SYang, Bo #define MFI_GEN2_ENABLE_INTERRUPT_MASK (0x00000001 | 0x00000004) 114387911122SYang, Bo #define MFI_REPLY_SKINNY_MESSAGE_INTERRUPT 0x40000000 114487911122SYang, Bo #define MFI_SKINNY_ENABLE_INTERRUPT_MASK (0x00000001) 11450e98936cSSumant Patro 114639a98554Sbo yang #define MFI_1068_PCSR_OFFSET 0x84 114739a98554Sbo yang #define MFI_1068_FW_HANDSHAKE_OFFSET 0x64 114839a98554Sbo yang #define MFI_1068_FW_READY 0xDDDD0000 1149d46a3ad6SSumit.Saxena@lsi.com 1150d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_REPLY_QUEUES_OFFSET 0X0000001F 1151d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_REPLY_QUEUES_EXT_OFFSET 0X003FC000 1152d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT 14 1153d46a3ad6SSumit.Saxena@lsi.com #define MR_MAX_MSIX_REG_ARRAY 16 11540e98936cSSumant Patro /* 11550e98936cSSumant Patro * register set for both 1068 and 1078 controllers 11560e98936cSSumant Patro * structure extended for 1078 registers 11570e98936cSSumant Patro */ 1158c4a3e0a5SBagalkote, Sreenivas 1159f9876f0bSSumant Patro struct megasas_register_set { 11609c915a8cSadam radford u32 doorbell; /*0000h*/ 11619c915a8cSadam radford u32 fusion_seq_offset; /*0004h*/ 11629c915a8cSadam radford u32 fusion_host_diag; /*0008h*/ 11639c915a8cSadam radford u32 reserved_01; /*000Ch*/ 1164c4a3e0a5SBagalkote, Sreenivas 1165c4a3e0a5SBagalkote, Sreenivas u32 inbound_msg_0; /*0010h*/ 1166c4a3e0a5SBagalkote, Sreenivas u32 inbound_msg_1; /*0014h*/ 1167c4a3e0a5SBagalkote, Sreenivas u32 outbound_msg_0; /*0018h*/ 1168c4a3e0a5SBagalkote, Sreenivas u32 outbound_msg_1; /*001Ch*/ 1169c4a3e0a5SBagalkote, Sreenivas 1170c4a3e0a5SBagalkote, Sreenivas u32 inbound_doorbell; /*0020h*/ 1171c4a3e0a5SBagalkote, Sreenivas u32 inbound_intr_status; /*0024h*/ 1172c4a3e0a5SBagalkote, Sreenivas u32 inbound_intr_mask; /*0028h*/ 1173c4a3e0a5SBagalkote, Sreenivas 1174c4a3e0a5SBagalkote, Sreenivas u32 outbound_doorbell; /*002Ch*/ 1175c4a3e0a5SBagalkote, Sreenivas u32 outbound_intr_status; /*0030h*/ 1176c4a3e0a5SBagalkote, Sreenivas u32 outbound_intr_mask; /*0034h*/ 1177c4a3e0a5SBagalkote, Sreenivas 1178c4a3e0a5SBagalkote, Sreenivas u32 reserved_1[2]; /*0038h*/ 1179c4a3e0a5SBagalkote, Sreenivas 1180c4a3e0a5SBagalkote, Sreenivas u32 inbound_queue_port; /*0040h*/ 1181c4a3e0a5SBagalkote, Sreenivas u32 outbound_queue_port; /*0044h*/ 1182c4a3e0a5SBagalkote, Sreenivas 11839c915a8cSadam radford u32 reserved_2[9]; /*0048h*/ 11849c915a8cSadam radford u32 reply_post_host_index; /*006Ch*/ 11859c915a8cSadam radford u32 reserved_2_2[12]; /*0070h*/ 1186c4a3e0a5SBagalkote, Sreenivas 1187f9876f0bSSumant Patro u32 outbound_doorbell_clear; /*00A0h*/ 1188f9876f0bSSumant Patro 1189f9876f0bSSumant Patro u32 reserved_3[3]; /*00A4h*/ 1190f9876f0bSSumant Patro 1191f9876f0bSSumant Patro u32 outbound_scratch_pad ; /*00B0h*/ 11929c915a8cSadam radford u32 outbound_scratch_pad_2; /*00B4h*/ 1193f9876f0bSSumant Patro 11949c915a8cSadam radford u32 reserved_4[2]; /*00B8h*/ 1195f9876f0bSSumant Patro 1196f9876f0bSSumant Patro u32 inbound_low_queue_port ; /*00C0h*/ 1197f9876f0bSSumant Patro 1198f9876f0bSSumant Patro u32 inbound_high_queue_port ; /*00C4h*/ 1199f9876f0bSSumant Patro 1200f9876f0bSSumant Patro u32 reserved_5; /*00C8h*/ 120139a98554Sbo yang u32 res_6[11]; /*CCh*/ 120239a98554Sbo yang u32 host_diag; 120339a98554Sbo yang u32 seq_offset; 120439a98554Sbo yang u32 index_registers[807]; /*00CCh*/ 1205c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1206c4a3e0a5SBagalkote, Sreenivas 1207c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 { 1208c4a3e0a5SBagalkote, Sreenivas 12099ab9ed38SChristoph Hellwig __le32 phys_addr; 12109ab9ed38SChristoph Hellwig __le32 length; 1211c4a3e0a5SBagalkote, Sreenivas 1212c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1213c4a3e0a5SBagalkote, Sreenivas 1214c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 { 1215c4a3e0a5SBagalkote, Sreenivas 12169ab9ed38SChristoph Hellwig __le64 phys_addr; 12179ab9ed38SChristoph Hellwig __le32 length; 1218c4a3e0a5SBagalkote, Sreenivas 1219c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1220c4a3e0a5SBagalkote, Sreenivas 1221f4c9a131SYang, Bo struct megasas_sge_skinny { 12229ab9ed38SChristoph Hellwig __le64 phys_addr; 12239ab9ed38SChristoph Hellwig __le32 length; 12249ab9ed38SChristoph Hellwig __le32 flag; 1225f4c9a131SYang, Bo } __packed; 1226f4c9a131SYang, Bo 1227c4a3e0a5SBagalkote, Sreenivas union megasas_sgl { 1228c4a3e0a5SBagalkote, Sreenivas 1229c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[1]; 1230c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[1]; 1231f4c9a131SYang, Bo struct megasas_sge_skinny sge_skinny[1]; 1232c4a3e0a5SBagalkote, Sreenivas 1233c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1234c4a3e0a5SBagalkote, Sreenivas 1235c4a3e0a5SBagalkote, Sreenivas struct megasas_header { 1236c4a3e0a5SBagalkote, Sreenivas 1237c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1238c4a3e0a5SBagalkote, Sreenivas u8 sense_len; /*01h */ 1239c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1240c4a3e0a5SBagalkote, Sreenivas u8 scsi_status; /*03h */ 1241c4a3e0a5SBagalkote, Sreenivas 1242c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1243c4a3e0a5SBagalkote, Sreenivas u8 lun; /*05h */ 1244c4a3e0a5SBagalkote, Sreenivas u8 cdb_len; /*06h */ 1245c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1246c4a3e0a5SBagalkote, Sreenivas 12479ab9ed38SChristoph Hellwig __le32 context; /*08h */ 12489ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1249c4a3e0a5SBagalkote, Sreenivas 12509ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 12519ab9ed38SChristoph Hellwig __le16 timeout; /*12h */ 12529ab9ed38SChristoph Hellwig __le32 data_xferlen; /*14h */ 1253c4a3e0a5SBagalkote, Sreenivas 1254c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1255c4a3e0a5SBagalkote, Sreenivas 1256c4a3e0a5SBagalkote, Sreenivas union megasas_sgl_frame { 1257c4a3e0a5SBagalkote, Sreenivas 1258c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[8]; 1259c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[5]; 1260c4a3e0a5SBagalkote, Sreenivas 1261c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1262c4a3e0a5SBagalkote, Sreenivas 1263d46a3ad6SSumit.Saxena@lsi.com typedef union _MFI_CAPABILITIES { 1264d46a3ad6SSumit.Saxena@lsi.com struct { 126594cd65ddSSumit.Saxena@lsi.com #if defined(__BIG_ENDIAN_BITFIELD) 1266bd5f9484Ssumit.saxena@avagotech.com u32 reserved:23; 1267bd5f9484Ssumit.saxena@avagotech.com u32 support_ext_io_size:1; 12680be3f4c9Ssumit.saxena@avagotech.com u32 support_ext_queue_depth:1; 12697497cde8SSumit.Saxena@avagotech.com u32 security_protocol_cmds_fw:1; 12707497cde8SSumit.Saxena@avagotech.com u32 support_core_affinity:1; 1271d2552ebeSSumit.Saxena@avagotech.com u32 support_ndrive_r1_lb:1; 127251087a86SSumit.Saxena@avagotech.com u32 support_max_255lds:1; 12737497cde8SSumit.Saxena@avagotech.com u32 support_fastpath_wb:1; 127494cd65ddSSumit.Saxena@lsi.com u32 support_additional_msix:1; 127594cd65ddSSumit.Saxena@lsi.com u32 support_fp_remote_lun:1; 127694cd65ddSSumit.Saxena@lsi.com #else 1277d46a3ad6SSumit.Saxena@lsi.com u32 support_fp_remote_lun:1; 1278d46a3ad6SSumit.Saxena@lsi.com u32 support_additional_msix:1; 12797497cde8SSumit.Saxena@avagotech.com u32 support_fastpath_wb:1; 128051087a86SSumit.Saxena@avagotech.com u32 support_max_255lds:1; 1281d2552ebeSSumit.Saxena@avagotech.com u32 support_ndrive_r1_lb:1; 12827497cde8SSumit.Saxena@avagotech.com u32 support_core_affinity:1; 12837497cde8SSumit.Saxena@avagotech.com u32 security_protocol_cmds_fw:1; 12840be3f4c9Ssumit.saxena@avagotech.com u32 support_ext_queue_depth:1; 1285bd5f9484Ssumit.saxena@avagotech.com u32 support_ext_io_size:1; 1286bd5f9484Ssumit.saxena@avagotech.com u32 reserved:23; 128794cd65ddSSumit.Saxena@lsi.com #endif 1288d46a3ad6SSumit.Saxena@lsi.com } mfi_capabilities; 12899ab9ed38SChristoph Hellwig __le32 reg; 1290d46a3ad6SSumit.Saxena@lsi.com } MFI_CAPABILITIES; 1291d46a3ad6SSumit.Saxena@lsi.com 1292c4a3e0a5SBagalkote, Sreenivas struct megasas_init_frame { 1293c4a3e0a5SBagalkote, Sreenivas 1294c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1295c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*01h */ 1296c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1297c4a3e0a5SBagalkote, Sreenivas 1298c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*03h */ 1299d46a3ad6SSumit.Saxena@lsi.com MFI_CAPABILITIES driver_operations; /*04h*/ 1300c4a3e0a5SBagalkote, Sreenivas 13019ab9ed38SChristoph Hellwig __le32 context; /*08h */ 13029ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1303c4a3e0a5SBagalkote, Sreenivas 13049ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 13059ab9ed38SChristoph Hellwig __le16 reserved_3; /*12h */ 13069ab9ed38SChristoph Hellwig __le32 data_xfer_len; /*14h */ 1307c4a3e0a5SBagalkote, Sreenivas 13089ab9ed38SChristoph Hellwig __le32 queue_info_new_phys_addr_lo; /*18h */ 13099ab9ed38SChristoph Hellwig __le32 queue_info_new_phys_addr_hi; /*1Ch */ 13109ab9ed38SChristoph Hellwig __le32 queue_info_old_phys_addr_lo; /*20h */ 13119ab9ed38SChristoph Hellwig __le32 queue_info_old_phys_addr_hi; /*24h */ 13129ab9ed38SChristoph Hellwig __le32 reserved_4[2]; /*28h */ 13139ab9ed38SChristoph Hellwig __le32 system_info_lo; /*30h */ 13149ab9ed38SChristoph Hellwig __le32 system_info_hi; /*34h */ 13159ab9ed38SChristoph Hellwig __le32 reserved_5[2]; /*38h */ 1316c4a3e0a5SBagalkote, Sreenivas 1317c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1318c4a3e0a5SBagalkote, Sreenivas 1319c4a3e0a5SBagalkote, Sreenivas struct megasas_init_queue_info { 1320c4a3e0a5SBagalkote, Sreenivas 13219ab9ed38SChristoph Hellwig __le32 init_flags; /*00h */ 13229ab9ed38SChristoph Hellwig __le32 reply_queue_entries; /*04h */ 1323c4a3e0a5SBagalkote, Sreenivas 13249ab9ed38SChristoph Hellwig __le32 reply_queue_start_phys_addr_lo; /*08h */ 13259ab9ed38SChristoph Hellwig __le32 reply_queue_start_phys_addr_hi; /*0Ch */ 13269ab9ed38SChristoph Hellwig __le32 producer_index_phys_addr_lo; /*10h */ 13279ab9ed38SChristoph Hellwig __le32 producer_index_phys_addr_hi; /*14h */ 13289ab9ed38SChristoph Hellwig __le32 consumer_index_phys_addr_lo; /*18h */ 13299ab9ed38SChristoph Hellwig __le32 consumer_index_phys_addr_hi; /*1Ch */ 1330c4a3e0a5SBagalkote, Sreenivas 1331c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1332c4a3e0a5SBagalkote, Sreenivas 1333c4a3e0a5SBagalkote, Sreenivas struct megasas_io_frame { 1334c4a3e0a5SBagalkote, Sreenivas 1335c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1336c4a3e0a5SBagalkote, Sreenivas u8 sense_len; /*01h */ 1337c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1338c4a3e0a5SBagalkote, Sreenivas u8 scsi_status; /*03h */ 1339c4a3e0a5SBagalkote, Sreenivas 1340c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1341c4a3e0a5SBagalkote, Sreenivas u8 access_byte; /*05h */ 1342c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*06h */ 1343c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1344c4a3e0a5SBagalkote, Sreenivas 13459ab9ed38SChristoph Hellwig __le32 context; /*08h */ 13469ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1347c4a3e0a5SBagalkote, Sreenivas 13489ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 13499ab9ed38SChristoph Hellwig __le16 timeout; /*12h */ 13509ab9ed38SChristoph Hellwig __le32 lba_count; /*14h */ 1351c4a3e0a5SBagalkote, Sreenivas 13529ab9ed38SChristoph Hellwig __le32 sense_buf_phys_addr_lo; /*18h */ 13539ab9ed38SChristoph Hellwig __le32 sense_buf_phys_addr_hi; /*1Ch */ 1354c4a3e0a5SBagalkote, Sreenivas 13559ab9ed38SChristoph Hellwig __le32 start_lba_lo; /*20h */ 13569ab9ed38SChristoph Hellwig __le32 start_lba_hi; /*24h */ 1357c4a3e0a5SBagalkote, Sreenivas 1358c4a3e0a5SBagalkote, Sreenivas union megasas_sgl sgl; /*28h */ 1359c4a3e0a5SBagalkote, Sreenivas 1360c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1361c4a3e0a5SBagalkote, Sreenivas 1362c4a3e0a5SBagalkote, Sreenivas struct megasas_pthru_frame { 1363c4a3e0a5SBagalkote, Sreenivas 1364c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1365c4a3e0a5SBagalkote, Sreenivas u8 sense_len; /*01h */ 1366c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1367c4a3e0a5SBagalkote, Sreenivas u8 scsi_status; /*03h */ 1368c4a3e0a5SBagalkote, Sreenivas 1369c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1370c4a3e0a5SBagalkote, Sreenivas u8 lun; /*05h */ 1371c4a3e0a5SBagalkote, Sreenivas u8 cdb_len; /*06h */ 1372c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1373c4a3e0a5SBagalkote, Sreenivas 13749ab9ed38SChristoph Hellwig __le32 context; /*08h */ 13759ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1376c4a3e0a5SBagalkote, Sreenivas 13779ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 13789ab9ed38SChristoph Hellwig __le16 timeout; /*12h */ 13799ab9ed38SChristoph Hellwig __le32 data_xfer_len; /*14h */ 1380c4a3e0a5SBagalkote, Sreenivas 13819ab9ed38SChristoph Hellwig __le32 sense_buf_phys_addr_lo; /*18h */ 13829ab9ed38SChristoph Hellwig __le32 sense_buf_phys_addr_hi; /*1Ch */ 1383c4a3e0a5SBagalkote, Sreenivas 1384c4a3e0a5SBagalkote, Sreenivas u8 cdb[16]; /*20h */ 1385c4a3e0a5SBagalkote, Sreenivas union megasas_sgl sgl; /*30h */ 1386c4a3e0a5SBagalkote, Sreenivas 1387c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1388c4a3e0a5SBagalkote, Sreenivas 1389c4a3e0a5SBagalkote, Sreenivas struct megasas_dcmd_frame { 1390c4a3e0a5SBagalkote, Sreenivas 1391c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1392c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*01h */ 1393c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1394c4a3e0a5SBagalkote, Sreenivas u8 reserved_1[4]; /*03h */ 1395c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1396c4a3e0a5SBagalkote, Sreenivas 13979ab9ed38SChristoph Hellwig __le32 context; /*08h */ 13989ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1399c4a3e0a5SBagalkote, Sreenivas 14009ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 14019ab9ed38SChristoph Hellwig __le16 timeout; /*12h */ 1402c4a3e0a5SBagalkote, Sreenivas 14039ab9ed38SChristoph Hellwig __le32 data_xfer_len; /*14h */ 14049ab9ed38SChristoph Hellwig __le32 opcode; /*18h */ 1405c4a3e0a5SBagalkote, Sreenivas 1406c4a3e0a5SBagalkote, Sreenivas union { /*1Ch */ 1407c4a3e0a5SBagalkote, Sreenivas u8 b[12]; 14089ab9ed38SChristoph Hellwig __le16 s[6]; 14099ab9ed38SChristoph Hellwig __le32 w[3]; 1410c4a3e0a5SBagalkote, Sreenivas } mbox; 1411c4a3e0a5SBagalkote, Sreenivas 1412c4a3e0a5SBagalkote, Sreenivas union megasas_sgl sgl; /*28h */ 1413c4a3e0a5SBagalkote, Sreenivas 1414c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1415c4a3e0a5SBagalkote, Sreenivas 1416c4a3e0a5SBagalkote, Sreenivas struct megasas_abort_frame { 1417c4a3e0a5SBagalkote, Sreenivas 1418c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1419c4a3e0a5SBagalkote, Sreenivas u8 reserved_0; /*01h */ 1420c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1421c4a3e0a5SBagalkote, Sreenivas 1422c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*03h */ 14239ab9ed38SChristoph Hellwig __le32 reserved_2; /*04h */ 1424c4a3e0a5SBagalkote, Sreenivas 14259ab9ed38SChristoph Hellwig __le32 context; /*08h */ 14269ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1427c4a3e0a5SBagalkote, Sreenivas 14289ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 14299ab9ed38SChristoph Hellwig __le16 reserved_3; /*12h */ 14309ab9ed38SChristoph Hellwig __le32 reserved_4; /*14h */ 1431c4a3e0a5SBagalkote, Sreenivas 14329ab9ed38SChristoph Hellwig __le32 abort_context; /*18h */ 14339ab9ed38SChristoph Hellwig __le32 pad_1; /*1Ch */ 1434c4a3e0a5SBagalkote, Sreenivas 14359ab9ed38SChristoph Hellwig __le32 abort_mfi_phys_addr_lo; /*20h */ 14369ab9ed38SChristoph Hellwig __le32 abort_mfi_phys_addr_hi; /*24h */ 1437c4a3e0a5SBagalkote, Sreenivas 14389ab9ed38SChristoph Hellwig __le32 reserved_5[6]; /*28h */ 1439c4a3e0a5SBagalkote, Sreenivas 1440c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1441c4a3e0a5SBagalkote, Sreenivas 1442c4a3e0a5SBagalkote, Sreenivas struct megasas_smp_frame { 1443c4a3e0a5SBagalkote, Sreenivas 1444c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1445c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*01h */ 1446c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1447c4a3e0a5SBagalkote, Sreenivas u8 connection_status; /*03h */ 1448c4a3e0a5SBagalkote, Sreenivas 1449c4a3e0a5SBagalkote, Sreenivas u8 reserved_2[3]; /*04h */ 1450c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1451c4a3e0a5SBagalkote, Sreenivas 14529ab9ed38SChristoph Hellwig __le32 context; /*08h */ 14539ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1454c4a3e0a5SBagalkote, Sreenivas 14559ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 14569ab9ed38SChristoph Hellwig __le16 timeout; /*12h */ 1457c4a3e0a5SBagalkote, Sreenivas 14589ab9ed38SChristoph Hellwig __le32 data_xfer_len; /*14h */ 14599ab9ed38SChristoph Hellwig __le64 sas_addr; /*18h */ 1460c4a3e0a5SBagalkote, Sreenivas 1461c4a3e0a5SBagalkote, Sreenivas union { 1462c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[2]; /* [0]: resp [1]: req */ 1463c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[2]; /* [0]: resp [1]: req */ 1464c4a3e0a5SBagalkote, Sreenivas } sgl; 1465c4a3e0a5SBagalkote, Sreenivas 1466c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1467c4a3e0a5SBagalkote, Sreenivas 1468c4a3e0a5SBagalkote, Sreenivas struct megasas_stp_frame { 1469c4a3e0a5SBagalkote, Sreenivas 1470c4a3e0a5SBagalkote, Sreenivas u8 cmd; /*00h */ 1471c4a3e0a5SBagalkote, Sreenivas u8 reserved_1; /*01h */ 1472c4a3e0a5SBagalkote, Sreenivas u8 cmd_status; /*02h */ 1473c4a3e0a5SBagalkote, Sreenivas u8 reserved_2; /*03h */ 1474c4a3e0a5SBagalkote, Sreenivas 1475c4a3e0a5SBagalkote, Sreenivas u8 target_id; /*04h */ 1476c4a3e0a5SBagalkote, Sreenivas u8 reserved_3[2]; /*05h */ 1477c4a3e0a5SBagalkote, Sreenivas u8 sge_count; /*07h */ 1478c4a3e0a5SBagalkote, Sreenivas 14799ab9ed38SChristoph Hellwig __le32 context; /*08h */ 14809ab9ed38SChristoph Hellwig __le32 pad_0; /*0Ch */ 1481c4a3e0a5SBagalkote, Sreenivas 14829ab9ed38SChristoph Hellwig __le16 flags; /*10h */ 14839ab9ed38SChristoph Hellwig __le16 timeout; /*12h */ 1484c4a3e0a5SBagalkote, Sreenivas 14859ab9ed38SChristoph Hellwig __le32 data_xfer_len; /*14h */ 1486c4a3e0a5SBagalkote, Sreenivas 14879ab9ed38SChristoph Hellwig __le16 fis[10]; /*18h */ 14889ab9ed38SChristoph Hellwig __le32 stp_flags; 1489c4a3e0a5SBagalkote, Sreenivas 1490c4a3e0a5SBagalkote, Sreenivas union { 1491c4a3e0a5SBagalkote, Sreenivas struct megasas_sge32 sge32[2]; /* [0]: resp [1]: data */ 1492c4a3e0a5SBagalkote, Sreenivas struct megasas_sge64 sge64[2]; /* [0]: resp [1]: data */ 1493c4a3e0a5SBagalkote, Sreenivas } sgl; 1494c4a3e0a5SBagalkote, Sreenivas 1495c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1496c4a3e0a5SBagalkote, Sreenivas 1497c4a3e0a5SBagalkote, Sreenivas union megasas_frame { 1498c4a3e0a5SBagalkote, Sreenivas 1499c4a3e0a5SBagalkote, Sreenivas struct megasas_header hdr; 1500c4a3e0a5SBagalkote, Sreenivas struct megasas_init_frame init; 1501c4a3e0a5SBagalkote, Sreenivas struct megasas_io_frame io; 1502c4a3e0a5SBagalkote, Sreenivas struct megasas_pthru_frame pthru; 1503c4a3e0a5SBagalkote, Sreenivas struct megasas_dcmd_frame dcmd; 1504c4a3e0a5SBagalkote, Sreenivas struct megasas_abort_frame abort; 1505c4a3e0a5SBagalkote, Sreenivas struct megasas_smp_frame smp; 1506c4a3e0a5SBagalkote, Sreenivas struct megasas_stp_frame stp; 1507c4a3e0a5SBagalkote, Sreenivas 1508c4a3e0a5SBagalkote, Sreenivas u8 raw_bytes[64]; 1509c4a3e0a5SBagalkote, Sreenivas }; 1510c4a3e0a5SBagalkote, Sreenivas 1511c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd; 1512c4a3e0a5SBagalkote, Sreenivas 1513c4a3e0a5SBagalkote, Sreenivas union megasas_evt_class_locale { 1514c4a3e0a5SBagalkote, Sreenivas 1515c4a3e0a5SBagalkote, Sreenivas struct { 1516be26374bSSumit.Saxena@lsi.com #ifndef __BIG_ENDIAN_BITFIELD 1517c4a3e0a5SBagalkote, Sreenivas u16 locale; 1518c4a3e0a5SBagalkote, Sreenivas u8 reserved; 1519c4a3e0a5SBagalkote, Sreenivas s8 class; 1520be26374bSSumit.Saxena@lsi.com #else 1521be26374bSSumit.Saxena@lsi.com s8 class; 1522be26374bSSumit.Saxena@lsi.com u8 reserved; 1523be26374bSSumit.Saxena@lsi.com u16 locale; 1524be26374bSSumit.Saxena@lsi.com #endif 1525c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) members; 1526c4a3e0a5SBagalkote, Sreenivas 1527c4a3e0a5SBagalkote, Sreenivas u32 word; 1528c4a3e0a5SBagalkote, Sreenivas 1529c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1530c4a3e0a5SBagalkote, Sreenivas 1531c4a3e0a5SBagalkote, Sreenivas struct megasas_evt_log_info { 15329ab9ed38SChristoph Hellwig __le32 newest_seq_num; 15339ab9ed38SChristoph Hellwig __le32 oldest_seq_num; 15349ab9ed38SChristoph Hellwig __le32 clear_seq_num; 15359ab9ed38SChristoph Hellwig __le32 shutdown_seq_num; 15369ab9ed38SChristoph Hellwig __le32 boot_seq_num; 1537c4a3e0a5SBagalkote, Sreenivas 1538c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1539c4a3e0a5SBagalkote, Sreenivas 1540c4a3e0a5SBagalkote, Sreenivas struct megasas_progress { 1541c4a3e0a5SBagalkote, Sreenivas 15429ab9ed38SChristoph Hellwig __le16 progress; 15439ab9ed38SChristoph Hellwig __le16 elapsed_seconds; 1544c4a3e0a5SBagalkote, Sreenivas 1545c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1546c4a3e0a5SBagalkote, Sreenivas 1547c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld { 1548c4a3e0a5SBagalkote, Sreenivas 1549c4a3e0a5SBagalkote, Sreenivas u16 target_id; 1550c4a3e0a5SBagalkote, Sreenivas u8 ld_index; 1551c4a3e0a5SBagalkote, Sreenivas u8 reserved; 1552c4a3e0a5SBagalkote, Sreenivas 1553c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1554c4a3e0a5SBagalkote, Sreenivas 1555c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd { 1556c4a3e0a5SBagalkote, Sreenivas u16 device_id; 1557c4a3e0a5SBagalkote, Sreenivas u8 encl_index; 1558c4a3e0a5SBagalkote, Sreenivas u8 slot_number; 1559c4a3e0a5SBagalkote, Sreenivas 1560c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1561c4a3e0a5SBagalkote, Sreenivas 1562c4a3e0a5SBagalkote, Sreenivas struct megasas_evt_detail { 1563c4a3e0a5SBagalkote, Sreenivas 15649ab9ed38SChristoph Hellwig __le32 seq_num; 15659ab9ed38SChristoph Hellwig __le32 time_stamp; 15669ab9ed38SChristoph Hellwig __le32 code; 1567c4a3e0a5SBagalkote, Sreenivas union megasas_evt_class_locale cl; 1568c4a3e0a5SBagalkote, Sreenivas u8 arg_type; 1569c4a3e0a5SBagalkote, Sreenivas u8 reserved1[15]; 1570c4a3e0a5SBagalkote, Sreenivas 1571c4a3e0a5SBagalkote, Sreenivas union { 1572c4a3e0a5SBagalkote, Sreenivas struct { 1573c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1574c4a3e0a5SBagalkote, Sreenivas u8 cdb_length; 1575c4a3e0a5SBagalkote, Sreenivas u8 sense_length; 1576c4a3e0a5SBagalkote, Sreenivas u8 reserved[2]; 1577c4a3e0a5SBagalkote, Sreenivas u8 cdb[16]; 1578c4a3e0a5SBagalkote, Sreenivas u8 sense[64]; 1579c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) cdbSense; 1580c4a3e0a5SBagalkote, Sreenivas 1581c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1582c4a3e0a5SBagalkote, Sreenivas 1583c4a3e0a5SBagalkote, Sreenivas struct { 1584c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 15859ab9ed38SChristoph Hellwig __le64 count; 1586c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_count; 1587c4a3e0a5SBagalkote, Sreenivas 1588c4a3e0a5SBagalkote, Sreenivas struct { 15899ab9ed38SChristoph Hellwig __le64 lba; 1590c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1591c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_lba; 1592c4a3e0a5SBagalkote, Sreenivas 1593c4a3e0a5SBagalkote, Sreenivas struct { 1594c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 15959ab9ed38SChristoph Hellwig __le32 prevOwner; 15969ab9ed38SChristoph Hellwig __le32 newOwner; 1597c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_owner; 1598c4a3e0a5SBagalkote, Sreenivas 1599c4a3e0a5SBagalkote, Sreenivas struct { 1600c4a3e0a5SBagalkote, Sreenivas u64 ld_lba; 1601c4a3e0a5SBagalkote, Sreenivas u64 pd_lba; 1602c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1603c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1604c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_lba_pd_lba; 1605c4a3e0a5SBagalkote, Sreenivas 1606c4a3e0a5SBagalkote, Sreenivas struct { 1607c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1608c4a3e0a5SBagalkote, Sreenivas struct megasas_progress prog; 1609c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_prog; 1610c4a3e0a5SBagalkote, Sreenivas 1611c4a3e0a5SBagalkote, Sreenivas struct { 1612c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1613c4a3e0a5SBagalkote, Sreenivas u32 prev_state; 1614c4a3e0a5SBagalkote, Sreenivas u32 new_state; 1615c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_state; 1616c4a3e0a5SBagalkote, Sreenivas 1617c4a3e0a5SBagalkote, Sreenivas struct { 1618c4a3e0a5SBagalkote, Sreenivas u64 strip; 1619c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1620c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ld_strip; 1621c4a3e0a5SBagalkote, Sreenivas 1622c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1623c4a3e0a5SBagalkote, Sreenivas 1624c4a3e0a5SBagalkote, Sreenivas struct { 1625c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1626c4a3e0a5SBagalkote, Sreenivas u32 err; 1627c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_err; 1628c4a3e0a5SBagalkote, Sreenivas 1629c4a3e0a5SBagalkote, Sreenivas struct { 1630c4a3e0a5SBagalkote, Sreenivas u64 lba; 1631c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1632c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_lba; 1633c4a3e0a5SBagalkote, Sreenivas 1634c4a3e0a5SBagalkote, Sreenivas struct { 1635c4a3e0a5SBagalkote, Sreenivas u64 lba; 1636c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1637c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_ld ld; 1638c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_lba_ld; 1639c4a3e0a5SBagalkote, Sreenivas 1640c4a3e0a5SBagalkote, Sreenivas struct { 1641c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1642c4a3e0a5SBagalkote, Sreenivas struct megasas_progress prog; 1643c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_prog; 1644c4a3e0a5SBagalkote, Sreenivas 1645c4a3e0a5SBagalkote, Sreenivas struct { 1646c4a3e0a5SBagalkote, Sreenivas struct megasas_evtarg_pd pd; 1647c4a3e0a5SBagalkote, Sreenivas u32 prevState; 1648c4a3e0a5SBagalkote, Sreenivas u32 newState; 1649c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pd_state; 1650c4a3e0a5SBagalkote, Sreenivas 1651c4a3e0a5SBagalkote, Sreenivas struct { 1652c4a3e0a5SBagalkote, Sreenivas u16 vendorId; 16539ab9ed38SChristoph Hellwig __le16 deviceId; 1654c4a3e0a5SBagalkote, Sreenivas u16 subVendorId; 1655c4a3e0a5SBagalkote, Sreenivas u16 subDeviceId; 1656c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) pci; 1657c4a3e0a5SBagalkote, Sreenivas 1658c4a3e0a5SBagalkote, Sreenivas u32 rate; 1659c4a3e0a5SBagalkote, Sreenivas char str[96]; 1660c4a3e0a5SBagalkote, Sreenivas 1661c4a3e0a5SBagalkote, Sreenivas struct { 1662c4a3e0a5SBagalkote, Sreenivas u32 rtc; 1663c4a3e0a5SBagalkote, Sreenivas u32 elapsedSeconds; 1664c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) time; 1665c4a3e0a5SBagalkote, Sreenivas 1666c4a3e0a5SBagalkote, Sreenivas struct { 1667c4a3e0a5SBagalkote, Sreenivas u32 ecar; 1668c4a3e0a5SBagalkote, Sreenivas u32 elog; 1669c4a3e0a5SBagalkote, Sreenivas char str[64]; 1670c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)) ecc; 1671c4a3e0a5SBagalkote, Sreenivas 1672c4a3e0a5SBagalkote, Sreenivas u8 b[96]; 16739ab9ed38SChristoph Hellwig __le16 s[48]; 16749ab9ed38SChristoph Hellwig __le32 w[24]; 16759ab9ed38SChristoph Hellwig __le64 d[12]; 1676c4a3e0a5SBagalkote, Sreenivas } args; 1677c4a3e0a5SBagalkote, Sreenivas 1678c4a3e0a5SBagalkote, Sreenivas char description[128]; 1679c4a3e0a5SBagalkote, Sreenivas 1680c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1681c4a3e0a5SBagalkote, Sreenivas 16827e8a75f4SYang, Bo struct megasas_aen_event { 1683c1d390d8SXiaotian Feng struct delayed_work hotplug_work; 16847e8a75f4SYang, Bo struct megasas_instance *instance; 16857e8a75f4SYang, Bo }; 16867e8a75f4SYang, Bo 1687c8e858feSadam radford struct megasas_irq_context { 1688c8e858feSadam radford struct megasas_instance *instance; 1689c8e858feSadam radford u32 MSIxIndex; 1690c8e858feSadam radford }; 1691c8e858feSadam radford 16925765c5b8SSumit.Saxena@avagotech.com struct MR_DRV_SYSTEM_INFO { 16935765c5b8SSumit.Saxena@avagotech.com u8 infoVersion; 16945765c5b8SSumit.Saxena@avagotech.com u8 systemIdLength; 16955765c5b8SSumit.Saxena@avagotech.com u16 reserved0; 16965765c5b8SSumit.Saxena@avagotech.com u8 systemId[64]; 16975765c5b8SSumit.Saxena@avagotech.com u8 reserved[1980]; 16985765c5b8SSumit.Saxena@avagotech.com }; 16995765c5b8SSumit.Saxena@avagotech.com 1700c4a3e0a5SBagalkote, Sreenivas struct megasas_instance { 1701c4a3e0a5SBagalkote, Sreenivas 17029ab9ed38SChristoph Hellwig __le32 *producer; 1703c4a3e0a5SBagalkote, Sreenivas dma_addr_t producer_h; 17049ab9ed38SChristoph Hellwig __le32 *consumer; 1705c4a3e0a5SBagalkote, Sreenivas dma_addr_t consumer_h; 17065765c5b8SSumit.Saxena@avagotech.com struct MR_DRV_SYSTEM_INFO *system_info_buf; 17075765c5b8SSumit.Saxena@avagotech.com dma_addr_t system_info_h; 1708229fe47cSadam radford struct MR_LD_VF_AFFILIATION *vf_affiliation; 1709229fe47cSadam radford dma_addr_t vf_affiliation_h; 1710229fe47cSadam radford struct MR_LD_VF_AFFILIATION_111 *vf_affiliation_111; 1711229fe47cSadam radford dma_addr_t vf_affiliation_111_h; 1712229fe47cSadam radford struct MR_CTRL_HB_HOST_MEM *hb_host_mem; 1713229fe47cSadam radford dma_addr_t hb_host_mem_h; 1714c4a3e0a5SBagalkote, Sreenivas 17159ab9ed38SChristoph Hellwig __le32 *reply_queue; 1716c4a3e0a5SBagalkote, Sreenivas dma_addr_t reply_queue_h; 1717c4a3e0a5SBagalkote, Sreenivas 1718fc62b3fcSSumit.Saxena@avagotech.com u32 *crash_dump_buf; 1719fc62b3fcSSumit.Saxena@avagotech.com dma_addr_t crash_dump_h; 1720fc62b3fcSSumit.Saxena@avagotech.com void *crash_buf[MAX_CRASH_DUMP_SIZE]; 1721fc62b3fcSSumit.Saxena@avagotech.com u32 crash_buf_pages; 1722fc62b3fcSSumit.Saxena@avagotech.com unsigned int fw_crash_buffer_size; 1723fc62b3fcSSumit.Saxena@avagotech.com unsigned int fw_crash_state; 1724fc62b3fcSSumit.Saxena@avagotech.com unsigned int fw_crash_buffer_offset; 1725fc62b3fcSSumit.Saxena@avagotech.com u32 drv_buf_index; 1726fc62b3fcSSumit.Saxena@avagotech.com u32 drv_buf_alloc; 1727fc62b3fcSSumit.Saxena@avagotech.com u32 crash_dump_fw_support; 1728fc62b3fcSSumit.Saxena@avagotech.com u32 crash_dump_drv_support; 1729fc62b3fcSSumit.Saxena@avagotech.com u32 crash_dump_app_support; 17307497cde8SSumit.Saxena@avagotech.com u32 secure_jbod_support; 17313761cb4cSsumit.saxena@avagotech.com bool use_seqnum_jbod_fp; /* Added for PD sequence */ 1732fc62b3fcSSumit.Saxena@avagotech.com spinlock_t crashdump_lock; 1733fc62b3fcSSumit.Saxena@avagotech.com 1734c4a3e0a5SBagalkote, Sreenivas struct megasas_register_set __iomem *reg_set; 17358a232bb3SChristoph Hellwig u32 __iomem *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY]; 173681e403ceSYang, Bo struct megasas_pd_list pd_list[MEGASAS_MAX_PD]; 1737999ece0aSSumit.Saxena@lsi.com struct megasas_pd_list local_pd_list[MEGASAS_MAX_PD]; 1738bdc6fb8dSYang, Bo u8 ld_ids[MEGASAS_MAX_LD_IDS]; 1739c4a3e0a5SBagalkote, Sreenivas s8 init_id; 1740c4a3e0a5SBagalkote, Sreenivas 1741c4a3e0a5SBagalkote, Sreenivas u16 max_num_sge; 1742c4a3e0a5SBagalkote, Sreenivas u16 max_fw_cmds; 17439c915a8cSadam radford u16 max_mfi_cmds; 1744ae09a6c1SSumit.Saxena@avagotech.com u16 max_scsi_cmds; 1745c4a3e0a5SBagalkote, Sreenivas u32 max_sectors_per_req; 17467e8a75f4SYang, Bo struct megasas_aen_event *ev; 1747c4a3e0a5SBagalkote, Sreenivas 1748c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd **cmd_list; 1749c4a3e0a5SBagalkote, Sreenivas struct list_head cmd_pool; 175039a98554Sbo yang /* used to sync fire the cmd to fw */ 175190dc9d98SSumit.Saxena@avagotech.com spinlock_t mfi_pool_lock; 175239a98554Sbo yang /* used to sync fire the cmd to fw */ 175339a98554Sbo yang spinlock_t hba_lock; 17547343eb65Sbo yang /* used to synch producer, consumer ptrs in dpc */ 17557343eb65Sbo yang spinlock_t completion_lock; 1756c4a3e0a5SBagalkote, Sreenivas struct dma_pool *frame_dma_pool; 1757c4a3e0a5SBagalkote, Sreenivas struct dma_pool *sense_dma_pool; 1758c4a3e0a5SBagalkote, Sreenivas 1759c4a3e0a5SBagalkote, Sreenivas struct megasas_evt_detail *evt_detail; 1760c4a3e0a5SBagalkote, Sreenivas dma_addr_t evt_detail_h; 1761c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd *aen_cmd; 1762e5a69e27SMatthias Kaehlcke struct mutex aen_mutex; 1763c4a3e0a5SBagalkote, Sreenivas struct semaphore ioctl_sem; 1764c4a3e0a5SBagalkote, Sreenivas 1765c4a3e0a5SBagalkote, Sreenivas struct Scsi_Host *host; 1766c4a3e0a5SBagalkote, Sreenivas 1767c4a3e0a5SBagalkote, Sreenivas wait_queue_head_t int_cmd_wait_q; 1768c4a3e0a5SBagalkote, Sreenivas wait_queue_head_t abort_cmd_wait_q; 1769c4a3e0a5SBagalkote, Sreenivas 1770c4a3e0a5SBagalkote, Sreenivas struct pci_dev *pdev; 1771c4a3e0a5SBagalkote, Sreenivas u32 unique_id; 177239a98554Sbo yang u32 fw_support_ieee; 1773c4a3e0a5SBagalkote, Sreenivas 1774e4a082c7SSumant Patro atomic_t fw_outstanding; 177539a98554Sbo yang atomic_t fw_reset_no_pci_access; 17761341c939SSumant Patro 17771341c939SSumant Patro struct megasas_instance_template *instancet; 17785d018ad0SSumant Patro struct tasklet_struct isr_tasklet; 177939a98554Sbo yang struct work_struct work_init; 1780fc62b3fcSSumit.Saxena@avagotech.com struct work_struct crash_init; 178105e9ebbeSSumant Patro 178205e9ebbeSSumant Patro u8 flag; 1783c3518837SYang, Bo u8 unload; 1784f4c9a131SYang, Bo u8 flag_ieee; 178539a98554Sbo yang u8 issuepend_done; 178639a98554Sbo yang u8 disableOnlineCtrlReset; 1787bc93d425SSumit.Saxena@lsi.com u8 UnevenSpanSupport; 178851087a86SSumit.Saxena@avagotech.com 178951087a86SSumit.Saxena@avagotech.com u8 supportmax256vd; 179051087a86SSumit.Saxena@avagotech.com u16 fw_supported_vd_count; 179151087a86SSumit.Saxena@avagotech.com u16 fw_supported_pd_count; 179251087a86SSumit.Saxena@avagotech.com 179351087a86SSumit.Saxena@avagotech.com u16 drv_supported_vd_count; 179451087a86SSumit.Saxena@avagotech.com u16 drv_supported_pd_count; 179551087a86SSumit.Saxena@avagotech.com 179639a98554Sbo yang u8 adprecovery; 179705e9ebbeSSumant Patro unsigned long last_time; 179839a98554Sbo yang u32 mfiStatus; 179939a98554Sbo yang u32 last_seq_num; 1800ad84db2eSbo yang 180139a98554Sbo yang struct list_head internal_reset_pending_q; 180280d9da98Sadam radford 180325985edcSLucas De Marchi /* Ptr to hba specific information */ 18049c915a8cSadam radford void *ctrl_context; 180551087a86SSumit.Saxena@avagotech.com u32 ctrl_context_pages; 180651087a86SSumit.Saxena@avagotech.com struct megasas_ctrl_info *ctrl_info; 1807c8e858feSadam radford unsigned int msix_vectors; 1808c8e858feSadam radford struct msix_entry msixentry[MEGASAS_MAX_MSIX_QUEUES]; 1809c8e858feSadam radford struct megasas_irq_context irq_context[MEGASAS_MAX_MSIX_QUEUES]; 18109c915a8cSadam radford u64 map_id; 18113761cb4cSsumit.saxena@avagotech.com u64 pd_seq_map_id; 18129c915a8cSadam radford struct megasas_cmd *map_update_cmd; 18133761cb4cSsumit.saxena@avagotech.com struct megasas_cmd *jbod_seq_cmd; 1814b6d5d880Sadam radford unsigned long bar; 18159c915a8cSadam radford long reset_flags; 18169c915a8cSadam radford struct mutex reset_mutex; 1817229fe47cSadam radford struct timer_list sriov_heartbeat_timer; 1818229fe47cSadam radford char skip_heartbeat_timer_del; 1819229fe47cSadam radford u8 requestorId; 1820229fe47cSadam radford char PlasmaFW111; 1821229fe47cSadam radford char mpio; 1822ae09a6c1SSumit.Saxena@avagotech.com u16 throttlequeuedepth; 1823d46a3ad6SSumit.Saxena@lsi.com u8 mask_interrupts; 1824bd5f9484Ssumit.saxena@avagotech.com u16 max_chain_frame_sz; 1825404a8a1aSSumit.Saxena@lsi.com u8 is_imr; 18265765c5b8SSumit.Saxena@avagotech.com bool dev_handle; 182739a98554Sbo yang }; 1828229fe47cSadam radford struct MR_LD_VF_MAP { 1829229fe47cSadam radford u32 size; 1830229fe47cSadam radford union MR_LD_REF ref; 1831229fe47cSadam radford u8 ldVfCount; 1832229fe47cSadam radford u8 reserved[6]; 1833229fe47cSadam radford u8 policy[1]; 1834229fe47cSadam radford }; 1835229fe47cSadam radford 1836229fe47cSadam radford struct MR_LD_VF_AFFILIATION { 1837229fe47cSadam radford u32 size; 1838229fe47cSadam radford u8 ldCount; 1839229fe47cSadam radford u8 vfCount; 1840229fe47cSadam radford u8 thisVf; 1841229fe47cSadam radford u8 reserved[9]; 1842229fe47cSadam radford struct MR_LD_VF_MAP map[1]; 1843229fe47cSadam radford }; 1844229fe47cSadam radford 1845229fe47cSadam radford /* Plasma 1.11 FW backward compatibility structures */ 1846229fe47cSadam radford #define IOV_111_OFFSET 0x7CE 1847229fe47cSadam radford #define MAX_VIRTUAL_FUNCTIONS 8 18484cbfea88SAdam Radford #define MR_LD_ACCESS_HIDDEN 15 1849229fe47cSadam radford 1850229fe47cSadam radford struct IOV_111 { 1851229fe47cSadam radford u8 maxVFsSupported; 1852229fe47cSadam radford u8 numVFsEnabled; 1853229fe47cSadam radford u8 requestorId; 1854229fe47cSadam radford u8 reserved[5]; 1855229fe47cSadam radford }; 1856229fe47cSadam radford 1857229fe47cSadam radford struct MR_LD_VF_MAP_111 { 1858229fe47cSadam radford u8 targetId; 1859229fe47cSadam radford u8 reserved[3]; 1860229fe47cSadam radford u8 policy[MAX_VIRTUAL_FUNCTIONS]; 1861229fe47cSadam radford }; 1862229fe47cSadam radford 1863229fe47cSadam radford struct MR_LD_VF_AFFILIATION_111 { 1864229fe47cSadam radford u8 vdCount; 1865229fe47cSadam radford u8 vfCount; 1866229fe47cSadam radford u8 thisVf; 1867229fe47cSadam radford u8 reserved[5]; 1868229fe47cSadam radford struct MR_LD_VF_MAP_111 map[MAX_LOGICAL_DRIVES]; 1869229fe47cSadam radford }; 1870229fe47cSadam radford 1871229fe47cSadam radford struct MR_CTRL_HB_HOST_MEM { 1872229fe47cSadam radford struct { 1873229fe47cSadam radford u32 fwCounter; /* Firmware heart beat counter */ 1874229fe47cSadam radford struct { 1875229fe47cSadam radford u32 debugmode:1; /* 1=Firmware is in debug mode. 1876229fe47cSadam radford Heart beat will not be updated. */ 1877229fe47cSadam radford u32 reserved:31; 1878229fe47cSadam radford } debug; 1879229fe47cSadam radford u32 reserved_fw[6]; 1880229fe47cSadam radford u32 driverCounter; /* Driver heart beat counter. 0x20 */ 1881229fe47cSadam radford u32 reserved_driver[7]; 1882229fe47cSadam radford } HB; 1883229fe47cSadam radford u8 pad[0x400-0x40]; 1884229fe47cSadam radford }; 188539a98554Sbo yang 188639a98554Sbo yang enum { 188739a98554Sbo yang MEGASAS_HBA_OPERATIONAL = 0, 188839a98554Sbo yang MEGASAS_ADPRESET_SM_INFAULT = 1, 188939a98554Sbo yang MEGASAS_ADPRESET_SM_FW_RESET_SUCCESS = 2, 189039a98554Sbo yang MEGASAS_ADPRESET_SM_OPERATIONAL = 3, 189139a98554Sbo yang MEGASAS_HW_CRITICAL_ERROR = 4, 1892229fe47cSadam radford MEGASAS_ADPRESET_SM_POLLING = 5, 189339a98554Sbo yang MEGASAS_ADPRESET_INPROG_SIGN = 0xDEADDEAD, 1894c4a3e0a5SBagalkote, Sreenivas }; 1895c4a3e0a5SBagalkote, Sreenivas 18960c79e681SYang, Bo struct megasas_instance_template { 18970c79e681SYang, Bo void (*fire_cmd)(struct megasas_instance *, dma_addr_t, \ 18980c79e681SYang, Bo u32, struct megasas_register_set __iomem *); 18990c79e681SYang, Bo 1900d46a3ad6SSumit.Saxena@lsi.com void (*enable_intr)(struct megasas_instance *); 1901d46a3ad6SSumit.Saxena@lsi.com void (*disable_intr)(struct megasas_instance *); 19020c79e681SYang, Bo 19030c79e681SYang, Bo int (*clear_intr)(struct megasas_register_set __iomem *); 19040c79e681SYang, Bo 19050c79e681SYang, Bo u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *); 190639a98554Sbo yang int (*adp_reset)(struct megasas_instance *, \ 190739a98554Sbo yang struct megasas_register_set __iomem *); 190839a98554Sbo yang int (*check_reset)(struct megasas_instance *, \ 190939a98554Sbo yang struct megasas_register_set __iomem *); 1910cd50ba8eSadam radford irqreturn_t (*service_isr)(int irq, void *devp); 1911cd50ba8eSadam radford void (*tasklet)(unsigned long); 1912cd50ba8eSadam radford u32 (*init_adapter)(struct megasas_instance *); 1913cd50ba8eSadam radford u32 (*build_and_issue_cmd) (struct megasas_instance *, 1914cd50ba8eSadam radford struct scsi_cmnd *); 1915cd50ba8eSadam radford void (*issue_dcmd) (struct megasas_instance *instance, 1916cd50ba8eSadam radford struct megasas_cmd *cmd); 19170c79e681SYang, Bo }; 19180c79e681SYang, Bo 1919c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_IS_LOGICAL(scp) \ 1920c4a3e0a5SBagalkote, Sreenivas (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1 1921c4a3e0a5SBagalkote, Sreenivas 19224a5c814dSSumit.Saxena@avagotech.com #define MEGASAS_DEV_INDEX(scp) \ 19234a5c814dSSumit.Saxena@avagotech.com (((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) + \ 19244a5c814dSSumit.Saxena@avagotech.com scp->device->id) 19254a5c814dSSumit.Saxena@avagotech.com 19264a5c814dSSumit.Saxena@avagotech.com #define MEGASAS_PD_INDEX(scp) \ 19274a5c814dSSumit.Saxena@avagotech.com ((scp->device->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + \ 19284a5c814dSSumit.Saxena@avagotech.com scp->device->id) 1929c4a3e0a5SBagalkote, Sreenivas 1930c4a3e0a5SBagalkote, Sreenivas struct megasas_cmd { 1931c4a3e0a5SBagalkote, Sreenivas 1932c4a3e0a5SBagalkote, Sreenivas union megasas_frame *frame; 1933c4a3e0a5SBagalkote, Sreenivas dma_addr_t frame_phys_addr; 1934c4a3e0a5SBagalkote, Sreenivas u8 *sense; 1935c4a3e0a5SBagalkote, Sreenivas dma_addr_t sense_phys_addr; 1936c4a3e0a5SBagalkote, Sreenivas 1937c4a3e0a5SBagalkote, Sreenivas u32 index; 1938c4a3e0a5SBagalkote, Sreenivas u8 sync_cmd; 19392be2a988SSumit.Saxena@avagotech.com u8 cmd_status_drv; 194039a98554Sbo yang u8 abort_aen; 194139a98554Sbo yang u8 retry_for_fw_reset; 194239a98554Sbo yang 1943c4a3e0a5SBagalkote, Sreenivas 1944c4a3e0a5SBagalkote, Sreenivas struct list_head list; 1945c4a3e0a5SBagalkote, Sreenivas struct scsi_cmnd *scmd; 19464026e9aaSSumit.Saxena@avagotech.com u8 flags; 194790dc9d98SSumit.Saxena@avagotech.com 1948c4a3e0a5SBagalkote, Sreenivas struct megasas_instance *instance; 19499c915a8cSadam radford union { 19509c915a8cSadam radford struct { 19519c915a8cSadam radford u16 smid; 19529c915a8cSadam radford u16 resvd; 19539c915a8cSadam radford } context; 1954c4a3e0a5SBagalkote, Sreenivas u32 frame_count; 1955c4a3e0a5SBagalkote, Sreenivas }; 19569c915a8cSadam radford }; 1957c4a3e0a5SBagalkote, Sreenivas 1958c4a3e0a5SBagalkote, Sreenivas #define MAX_MGMT_ADAPTERS 1024 1959c4a3e0a5SBagalkote, Sreenivas #define MAX_IOCTL_SGE 16 1960c4a3e0a5SBagalkote, Sreenivas 1961c4a3e0a5SBagalkote, Sreenivas struct megasas_iocpacket { 1962c4a3e0a5SBagalkote, Sreenivas 1963c4a3e0a5SBagalkote, Sreenivas u16 host_no; 1964c4a3e0a5SBagalkote, Sreenivas u16 __pad1; 1965c4a3e0a5SBagalkote, Sreenivas u32 sgl_off; 1966c4a3e0a5SBagalkote, Sreenivas u32 sge_count; 1967c4a3e0a5SBagalkote, Sreenivas u32 sense_off; 1968c4a3e0a5SBagalkote, Sreenivas u32 sense_len; 1969c4a3e0a5SBagalkote, Sreenivas union { 1970c4a3e0a5SBagalkote, Sreenivas u8 raw[128]; 1971c4a3e0a5SBagalkote, Sreenivas struct megasas_header hdr; 1972c4a3e0a5SBagalkote, Sreenivas } frame; 1973c4a3e0a5SBagalkote, Sreenivas 1974c4a3e0a5SBagalkote, Sreenivas struct iovec sgl[MAX_IOCTL_SGE]; 1975c4a3e0a5SBagalkote, Sreenivas 1976c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1977c4a3e0a5SBagalkote, Sreenivas 1978c4a3e0a5SBagalkote, Sreenivas struct megasas_aen { 1979c4a3e0a5SBagalkote, Sreenivas u16 host_no; 1980c4a3e0a5SBagalkote, Sreenivas u16 __pad1; 1981c4a3e0a5SBagalkote, Sreenivas u32 seq_num; 1982c4a3e0a5SBagalkote, Sreenivas u32 class_locale_word; 1983c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1984c4a3e0a5SBagalkote, Sreenivas 1985c4a3e0a5SBagalkote, Sreenivas #ifdef CONFIG_COMPAT 1986c4a3e0a5SBagalkote, Sreenivas struct compat_megasas_iocpacket { 1987c4a3e0a5SBagalkote, Sreenivas u16 host_no; 1988c4a3e0a5SBagalkote, Sreenivas u16 __pad1; 1989c4a3e0a5SBagalkote, Sreenivas u32 sgl_off; 1990c4a3e0a5SBagalkote, Sreenivas u32 sge_count; 1991c4a3e0a5SBagalkote, Sreenivas u32 sense_off; 1992c4a3e0a5SBagalkote, Sreenivas u32 sense_len; 1993c4a3e0a5SBagalkote, Sreenivas union { 1994c4a3e0a5SBagalkote, Sreenivas u8 raw[128]; 1995c4a3e0a5SBagalkote, Sreenivas struct megasas_header hdr; 1996c4a3e0a5SBagalkote, Sreenivas } frame; 1997c4a3e0a5SBagalkote, Sreenivas struct compat_iovec sgl[MAX_IOCTL_SGE]; 1998c4a3e0a5SBagalkote, Sreenivas } __attribute__ ((packed)); 1999c4a3e0a5SBagalkote, Sreenivas 20000e98936cSSumant Patro #define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket) 2001c4a3e0a5SBagalkote, Sreenivas #endif 2002c4a3e0a5SBagalkote, Sreenivas 2003cb59aa6aSSumant Patro #define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket) 2004c4a3e0a5SBagalkote, Sreenivas #define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen) 2005c4a3e0a5SBagalkote, Sreenivas 2006c4a3e0a5SBagalkote, Sreenivas struct megasas_mgmt_info { 2007c4a3e0a5SBagalkote, Sreenivas 2008c4a3e0a5SBagalkote, Sreenivas u16 count; 2009c4a3e0a5SBagalkote, Sreenivas struct megasas_instance *instance[MAX_MGMT_ADAPTERS]; 2010c4a3e0a5SBagalkote, Sreenivas int max_index; 2011c4a3e0a5SBagalkote, Sreenivas }; 2012c4a3e0a5SBagalkote, Sreenivas 201321c9e160Sadam radford u8 201421c9e160Sadam radford MR_BuildRaidContext(struct megasas_instance *instance, 201521c9e160Sadam radford struct IO_REQUEST_INFO *io_info, 201621c9e160Sadam radford struct RAID_CONTEXT *pRAID_Context, 201751087a86SSumit.Saxena@avagotech.com struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN); 201851087a86SSumit.Saxena@avagotech.com u8 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map); 201951087a86SSumit.Saxena@avagotech.com struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map); 202051087a86SSumit.Saxena@avagotech.com u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map); 202151087a86SSumit.Saxena@avagotech.com u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map); 20229ab9ed38SChristoph Hellwig __le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map); 202351087a86SSumit.Saxena@avagotech.com u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map); 202421c9e160Sadam radford 20259ab9ed38SChristoph Hellwig __le16 get_updated_dev_handle(struct megasas_instance *instance, 2026d2552ebeSSumit.Saxena@avagotech.com struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *in_info); 202751087a86SSumit.Saxena@avagotech.com void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *map, 202851087a86SSumit.Saxena@avagotech.com struct LD_LOAD_BALANCE_INFO *lbInfo); 2029d009b576SSumit.Saxena@avagotech.com int megasas_get_ctrl_info(struct megasas_instance *instance); 20303761cb4cSsumit.saxena@avagotech.com /* PD sequence */ 20313761cb4cSsumit.saxena@avagotech.com int 20323761cb4cSsumit.saxena@avagotech.com megasas_sync_pd_seq_num(struct megasas_instance *instance, bool pend); 2033fc62b3fcSSumit.Saxena@avagotech.com int megasas_set_crash_dump_params(struct megasas_instance *instance, 2034fc62b3fcSSumit.Saxena@avagotech.com u8 crash_buf_state); 2035fc62b3fcSSumit.Saxena@avagotech.com void megasas_free_host_crash_buffer(struct megasas_instance *instance); 2036fc62b3fcSSumit.Saxena@avagotech.com void megasas_fusion_crash_dump_wq(struct work_struct *work); 203751087a86SSumit.Saxena@avagotech.com 203890dc9d98SSumit.Saxena@avagotech.com void megasas_return_cmd_fusion(struct megasas_instance *instance, 203990dc9d98SSumit.Saxena@avagotech.com struct megasas_cmd_fusion *cmd); 204090dc9d98SSumit.Saxena@avagotech.com int megasas_issue_blocked_cmd(struct megasas_instance *instance, 204190dc9d98SSumit.Saxena@avagotech.com struct megasas_cmd *cmd, int timeout); 204290dc9d98SSumit.Saxena@avagotech.com void __megasas_return_cmd(struct megasas_instance *instance, 204390dc9d98SSumit.Saxena@avagotech.com struct megasas_cmd *cmd); 204490dc9d98SSumit.Saxena@avagotech.com 204590dc9d98SSumit.Saxena@avagotech.com void megasas_return_mfi_mpt_pthr(struct megasas_instance *instance, 204690dc9d98SSumit.Saxena@avagotech.com struct megasas_cmd *cmd_mfi, struct megasas_cmd_fusion *cmd_fusion); 20477497cde8SSumit.Saxena@avagotech.com int megasas_cmd_type(struct scsi_cmnd *cmd); 20483761cb4cSsumit.saxena@avagotech.com void megasas_setup_jbod_map(struct megasas_instance *instance); 204990dc9d98SSumit.Saxena@avagotech.com 2050c4a3e0a5SBagalkote, Sreenivas #endif /*LSI_MEGARAID_SAS_H */ 2051