1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2009-2011 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * * 8 * This program is free software; you can redistribute it and/or * 9 * modify it under the terms of version 2 of the GNU General * 10 * Public License as published by the Free Software Foundation. * 11 * This program is distributed in the hope that it will be useful. * 12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 16 * TO BE LEGALLY INVALID. See the GNU General Public License for * 17 * more details, a copy of which can be found in the file COPYING * 18 * included with this package. * 19 *******************************************************************/ 20 21 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 22 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 23 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 24 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 25 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 26 #define LPFC_RPI_LOW_WATER_MARK 10 27 28 #define LPFC_UNREG_FCF 1 29 #define LPFC_SKIP_UNREG_FCF 0 30 31 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 32 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 33 34 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 35 #define LPFC_NEMBED_MBOX_SGL_CNT 254 36 37 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 38 #define LPFC_FCP_IO_CHAN_DEF 4 39 #define LPFC_FCP_IO_CHAN_MIN 1 40 #define LPFC_FCP_IO_CHAN_MAX 16 41 42 /* 43 * Provide the default FCF Record attributes used by the driver 44 * when nonFIP mode is configured and there is no other default 45 * FCF Record attributes. 46 */ 47 #define LPFC_FCOE_FCF_DEF_INDEX 0 48 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 49 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 50 51 #define LPFC_FCOE_NULL_VID 0xFFF 52 #define LPFC_FCOE_IGNORE_VID 0xFFFF 53 54 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 55 #define LPFC_FCOE_FCF_MAC3 0xFF 56 #define LPFC_FCOE_FCF_MAC4 0xFF 57 #define LPFC_FCOE_FCF_MAC5 0xFE 58 #define LPFC_FCOE_FCF_MAP0 0x0E 59 #define LPFC_FCOE_FCF_MAP1 0xFC 60 #define LPFC_FCOE_FCF_MAP2 0x00 61 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 62 #define LPFC_FCOE_FKA_ADV_PER 0 63 #define LPFC_FCOE_FIP_PRIORITY 0x80 64 65 #define sli4_sid_from_fc_hdr(fc_hdr) \ 66 ((fc_hdr)->fh_s_id[0] << 16 | \ 67 (fc_hdr)->fh_s_id[1] << 8 | \ 68 (fc_hdr)->fh_s_id[2]) 69 70 #define sli4_did_from_fc_hdr(fc_hdr) \ 71 ((fc_hdr)->fh_d_id[0] << 16 | \ 72 (fc_hdr)->fh_d_id[1] << 8 | \ 73 (fc_hdr)->fh_d_id[2]) 74 75 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 76 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 77 (fc_hdr)->fh_f_ctl[1] << 8 | \ 78 (fc_hdr)->fh_f_ctl[2]) 79 80 #define sli4_type_from_fc_hdr(fc_hdr) \ 81 ((fc_hdr)->fh_type) 82 83 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 84 85 #define INT_FW_UPGRADE 0 86 #define RUN_FW_UPGRADE 1 87 88 enum lpfc_sli4_queue_type { 89 LPFC_EQ, 90 LPFC_GCQ, 91 LPFC_MCQ, 92 LPFC_WCQ, 93 LPFC_RCQ, 94 LPFC_MQ, 95 LPFC_WQ, 96 LPFC_HRQ, 97 LPFC_DRQ 98 }; 99 100 /* The queue sub-type defines the functional purpose of the queue */ 101 enum lpfc_sli4_queue_subtype { 102 LPFC_NONE, 103 LPFC_MBOX, 104 LPFC_FCP, 105 LPFC_ELS, 106 LPFC_USOL 107 }; 108 109 union sli4_qe { 110 void *address; 111 struct lpfc_eqe *eqe; 112 struct lpfc_cqe *cqe; 113 struct lpfc_mcqe *mcqe; 114 struct lpfc_wcqe_complete *wcqe_complete; 115 struct lpfc_wcqe_release *wcqe_release; 116 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted; 117 struct lpfc_rcqe_complete *rcqe_complete; 118 struct lpfc_mqe *mqe; 119 union lpfc_wqe *wqe; 120 struct lpfc_rqe *rqe; 121 }; 122 123 struct lpfc_queue { 124 struct list_head list; 125 enum lpfc_sli4_queue_type type; 126 enum lpfc_sli4_queue_subtype subtype; 127 struct lpfc_hba *phba; 128 struct list_head child_list; 129 uint32_t entry_count; /* Number of entries to support on the queue */ 130 uint32_t entry_size; /* Size of each queue entry. */ 131 uint32_t entry_repost; /* Count of entries before doorbell is rung */ 132 #define LPFC_QUEUE_MIN_REPOST 8 133 uint32_t queue_id; /* Queue ID assigned by the hardware */ 134 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 135 struct list_head page_list; 136 uint32_t page_count; /* Number of pages allocated for this queue */ 137 uint32_t host_index; /* The host's index for putting or getting */ 138 uint32_t hba_index; /* The last known hba index for get or put */ 139 140 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 141 142 uint16_t db_format; 143 #define LPFC_DB_RING_FORMAT 0x01 144 #define LPFC_DB_LIST_FORMAT 0x02 145 void __iomem *db_regaddr; 146 /* For q stats */ 147 uint32_t q_cnt_1; 148 uint32_t q_cnt_2; 149 uint32_t q_cnt_3; 150 uint64_t q_cnt_4; 151 /* defines for EQ stats */ 152 #define EQ_max_eqe q_cnt_1 153 #define EQ_no_entry q_cnt_2 154 #define EQ_badstate q_cnt_3 155 #define EQ_processed q_cnt_4 156 157 /* defines for CQ stats */ 158 #define CQ_mbox q_cnt_1 159 #define CQ_max_cqe q_cnt_1 160 #define CQ_release_wqe q_cnt_2 161 #define CQ_xri_aborted q_cnt_3 162 #define CQ_wq q_cnt_4 163 164 /* defines for WQ stats */ 165 #define WQ_overflow q_cnt_1 166 #define WQ_posted q_cnt_4 167 168 /* defines for RQ stats */ 169 #define RQ_no_posted_buf q_cnt_1 170 #define RQ_no_buf_found q_cnt_2 171 #define RQ_buf_trunc q_cnt_3 172 #define RQ_rcv_buf q_cnt_4 173 174 union sli4_qe qe[1]; /* array to index entries (must be last) */ 175 }; 176 177 struct lpfc_sli4_link { 178 uint16_t speed; 179 uint8_t duplex; 180 uint8_t status; 181 uint8_t type; 182 uint8_t number; 183 uint8_t fault; 184 uint16_t logical_speed; 185 uint16_t topology; 186 }; 187 188 struct lpfc_fcf_rec { 189 uint8_t fabric_name[8]; 190 uint8_t switch_name[8]; 191 uint8_t mac_addr[6]; 192 uint16_t fcf_indx; 193 uint32_t priority; 194 uint16_t vlan_id; 195 uint32_t addr_mode; 196 uint32_t flag; 197 #define BOOT_ENABLE 0x01 198 #define RECORD_VALID 0x02 199 }; 200 201 struct lpfc_fcf_pri_rec { 202 uint16_t fcf_index; 203 #define LPFC_FCF_ON_PRI_LIST 0x0001 204 #define LPFC_FCF_FLOGI_FAILED 0x0002 205 uint16_t flag; 206 uint32_t priority; 207 }; 208 209 struct lpfc_fcf_pri { 210 struct list_head list; 211 struct lpfc_fcf_pri_rec fcf_rec; 212 }; 213 214 /* 215 * Maximum FCF table index, it is for driver internal book keeping, it 216 * just needs to be no less than the supported HBA's FCF table size. 217 */ 218 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 219 220 struct lpfc_fcf { 221 uint16_t fcfi; 222 uint32_t fcf_flag; 223 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 224 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 225 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 226 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 227 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 228 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 229 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 230 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 231 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 232 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 233 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 234 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 235 uint32_t addr_mode; 236 uint32_t eligible_fcf_cnt; 237 struct lpfc_fcf_rec current_rec; 238 struct lpfc_fcf_rec failover_rec; 239 struct list_head fcf_pri_list; 240 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 241 uint32_t current_fcf_scan_pri; 242 struct timer_list redisc_wait; 243 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 244 }; 245 246 247 #define LPFC_REGION23_SIGNATURE "RG23" 248 #define LPFC_REGION23_VERSION 1 249 #define LPFC_REGION23_LAST_REC 0xff 250 #define DRIVER_SPECIFIC_TYPE 0xA2 251 #define LINUX_DRIVER_ID 0x20 252 #define PORT_STE_TYPE 0x1 253 254 struct lpfc_fip_param_hdr { 255 uint8_t type; 256 #define FCOE_PARAM_TYPE 0xA0 257 uint8_t length; 258 #define FCOE_PARAM_LENGTH 2 259 uint8_t parm_version; 260 #define FIPP_VERSION 0x01 261 uint8_t parm_flags; 262 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 263 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 264 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 265 #define FIPP_MODE_ON 0x1 266 #define FIPP_MODE_OFF 0x0 267 #define FIPP_VLAN_VALID 0x1 268 }; 269 270 struct lpfc_fcoe_params { 271 uint8_t fc_map[3]; 272 uint8_t reserved1; 273 uint16_t vlan_tag; 274 uint8_t reserved[2]; 275 }; 276 277 struct lpfc_fcf_conn_hdr { 278 uint8_t type; 279 #define FCOE_CONN_TBL_TYPE 0xA1 280 uint8_t length; /* words */ 281 uint8_t reserved[2]; 282 }; 283 284 struct lpfc_fcf_conn_rec { 285 uint16_t flags; 286 #define FCFCNCT_VALID 0x0001 287 #define FCFCNCT_BOOT 0x0002 288 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 289 #define FCFCNCT_FBNM_VALID 0x0008 290 #define FCFCNCT_SWNM_VALID 0x0010 291 #define FCFCNCT_VLAN_VALID 0x0020 292 #define FCFCNCT_AM_VALID 0x0040 293 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 294 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 295 296 uint16_t vlan_tag; 297 uint8_t fabric_name[8]; 298 uint8_t switch_name[8]; 299 }; 300 301 struct lpfc_fcf_conn_entry { 302 struct list_head list; 303 struct lpfc_fcf_conn_rec conn_rec; 304 }; 305 306 /* 307 * Define the host's bootstrap mailbox. This structure contains 308 * the member attributes needed to create, use, and destroy the 309 * bootstrap mailbox region. 310 * 311 * The macro definitions for the bmbx data structure are defined 312 * in lpfc_hw4.h with the register definition. 313 */ 314 struct lpfc_bmbx { 315 struct lpfc_dmabuf *dmabuf; 316 struct dma_address dma_address; 317 void *avirt; 318 dma_addr_t aphys; 319 uint32_t bmbx_size; 320 }; 321 322 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 323 324 #define LPFC_EQE_SIZE_4B 4 325 #define LPFC_EQE_SIZE_16B 16 326 #define LPFC_CQE_SIZE 16 327 #define LPFC_WQE_SIZE 64 328 #define LPFC_MQE_SIZE 256 329 #define LPFC_RQE_SIZE 8 330 331 #define LPFC_EQE_DEF_COUNT 1024 332 #define LPFC_CQE_DEF_COUNT 1024 333 #define LPFC_WQE_DEF_COUNT 256 334 #define LPFC_MQE_DEF_COUNT 16 335 #define LPFC_RQE_DEF_COUNT 512 336 337 #define LPFC_QUEUE_NOARM false 338 #define LPFC_QUEUE_REARM true 339 340 341 /* 342 * SLI4 CT field defines 343 */ 344 #define SLI4_CT_RPI 0 345 #define SLI4_CT_VPI 1 346 #define SLI4_CT_VFI 2 347 #define SLI4_CT_FCFI 3 348 349 /* 350 * SLI4 specific data structures 351 */ 352 struct lpfc_max_cfg_param { 353 uint16_t max_xri; 354 uint16_t xri_base; 355 uint16_t xri_used; 356 uint16_t max_rpi; 357 uint16_t rpi_base; 358 uint16_t rpi_used; 359 uint16_t max_vpi; 360 uint16_t vpi_base; 361 uint16_t vpi_used; 362 uint16_t max_vfi; 363 uint16_t vfi_base; 364 uint16_t vfi_used; 365 uint16_t max_fcfi; 366 uint16_t fcfi_used; 367 uint16_t max_eq; 368 uint16_t max_rq; 369 uint16_t max_cq; 370 uint16_t max_wq; 371 }; 372 373 struct lpfc_hba; 374 /* SLI4 HBA multi-fcp queue handler struct */ 375 struct lpfc_fcp_eq_hdl { 376 uint32_t idx; 377 struct lpfc_hba *phba; 378 atomic_t fcp_eq_in_use; 379 }; 380 381 /* Port Capabilities for SLI4 Parameters */ 382 struct lpfc_pc_sli4_params { 383 uint32_t supported; 384 uint32_t if_type; 385 uint32_t sli_rev; 386 uint32_t sli_family; 387 uint32_t featurelevel_1; 388 uint32_t featurelevel_2; 389 uint32_t proto_types; 390 #define LPFC_SLI4_PROTO_FCOE 0x0000001 391 #define LPFC_SLI4_PROTO_FC 0x0000002 392 #define LPFC_SLI4_PROTO_NIC 0x0000004 393 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 394 #define LPFC_SLI4_PROTO_RDMA 0x0000010 395 uint32_t sge_supp_len; 396 uint32_t if_page_sz; 397 uint32_t rq_db_window; 398 uint32_t loopbk_scope; 399 uint32_t eq_pages_max; 400 uint32_t eqe_size; 401 uint32_t cq_pages_max; 402 uint32_t cqe_size; 403 uint32_t mq_pages_max; 404 uint32_t mqe_size; 405 uint32_t mq_elem_cnt; 406 uint32_t wq_pages_max; 407 uint32_t wqe_size; 408 uint32_t rq_pages_max; 409 uint32_t rqe_size; 410 uint32_t hdr_pages_max; 411 uint32_t hdr_size; 412 uint32_t hdr_pp_align; 413 uint32_t sgl_pages_max; 414 uint32_t sgl_pp_align; 415 uint8_t cqv; 416 uint8_t mqv; 417 uint8_t wqv; 418 uint8_t rqv; 419 }; 420 421 struct lpfc_iov { 422 uint32_t pf_number; 423 uint32_t vf_number; 424 }; 425 426 struct lpfc_sli4_lnk_info { 427 uint8_t lnk_dv; 428 #define LPFC_LNK_DAT_INVAL 0 429 #define LPFC_LNK_DAT_VAL 1 430 uint8_t lnk_tp; 431 #define LPFC_LNK_GE 0x0 /* FCoE */ 432 #define LPFC_LNK_FC 0x1 /* FC */ 433 uint8_t lnk_no; 434 }; 435 436 #define LPFC_SLI4_HANDLER_NAME_SZ 16 437 438 /* Used for IRQ vector to CPU mapping */ 439 struct lpfc_vector_map_info { 440 uint16_t phys_id; 441 uint16_t core_id; 442 uint16_t irq; 443 uint16_t channel_id; 444 struct cpumask maskbits; 445 }; 446 #define LPFC_VECTOR_MAP_EMPTY 0xffff 447 #define LPFC_MAX_CPU 256 448 449 /* SLI4 HBA data structure entries */ 450 struct lpfc_sli4_hba { 451 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 452 PCI BAR0, config space registers */ 453 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 454 PCI BAR1, control registers */ 455 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 456 PCI BAR2, doorbell registers */ 457 union { 458 struct { 459 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 460 void __iomem *UERRLOregaddr; 461 void __iomem *UERRHIregaddr; 462 void __iomem *UEMASKLOregaddr; 463 void __iomem *UEMASKHIregaddr; 464 } if_type0; 465 struct { 466 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 467 void __iomem *STATUSregaddr; 468 void __iomem *CTRLregaddr; 469 void __iomem *ERR1regaddr; 470 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 471 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 472 void __iomem *ERR2regaddr; 473 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 474 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 475 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 476 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 477 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 478 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 479 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 480 } if_type2; 481 } u; 482 483 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 484 void __iomem *PSMPHRregaddr; 485 486 /* Well-known SLI INTF register memory map. */ 487 void __iomem *SLIINTFregaddr; 488 489 /* IF type 0, BAR 1 function CSR register memory map */ 490 void __iomem *ISRregaddr; /* HST_ISR register */ 491 void __iomem *IMRregaddr; /* HST_IMR register */ 492 void __iomem *ISCRregaddr; /* HST_ISCR register */ 493 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 494 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 495 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 496 void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */ 497 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 498 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 499 500 uint32_t ue_mask_lo; 501 uint32_t ue_mask_hi; 502 struct lpfc_register sli_intf; 503 struct lpfc_pc_sli4_params pc_sli4_params; 504 struct msix_entry *msix_entries; 505 uint8_t handler_name[LPFC_FCP_IO_CHAN_MAX][LPFC_SLI4_HANDLER_NAME_SZ]; 506 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ 507 508 /* Pointers to the constructed SLI4 queues */ 509 struct lpfc_queue **hba_eq;/* Event queues for HBA */ 510 struct lpfc_queue **fcp_cq;/* Fast-path FCP compl queue */ 511 struct lpfc_queue **fcp_wq;/* Fast-path FCP work queue */ 512 uint16_t *fcp_cq_map; 513 514 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 515 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 516 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 517 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 518 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 519 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 520 521 uint8_t fw_func_mode; /* FW function protocol mode */ 522 uint32_t ulp0_mode; /* ULP0 protocol mode */ 523 uint32_t ulp1_mode; /* ULP1 protocol mode */ 524 525 /* Setup information for various queue parameters */ 526 int eq_esize; 527 int eq_ecount; 528 int cq_esize; 529 int cq_ecount; 530 int wq_esize; 531 int wq_ecount; 532 int mq_esize; 533 int mq_ecount; 534 int rq_esize; 535 int rq_ecount; 536 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 537 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 538 539 uint32_t intr_enable; 540 struct lpfc_bmbx bmbx; 541 struct lpfc_max_cfg_param max_cfg_param; 542 uint16_t extents_in_use; /* must allocate resource extents. */ 543 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 544 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 545 uint16_t next_rpi; 546 uint16_t scsi_xri_max; 547 uint16_t scsi_xri_cnt; 548 uint16_t els_xri_cnt; 549 uint16_t scsi_xri_start; 550 struct list_head lpfc_free_sgl_list; 551 struct list_head lpfc_sgl_list; 552 struct list_head lpfc_abts_els_sgl_list; 553 struct list_head lpfc_abts_scsi_buf_list; 554 struct lpfc_sglq **lpfc_sglq_active_list; 555 struct list_head lpfc_rpi_hdr_list; 556 unsigned long *rpi_bmask; 557 uint16_t *rpi_ids; 558 uint16_t rpi_count; 559 struct list_head lpfc_rpi_blk_list; 560 unsigned long *xri_bmask; 561 uint16_t *xri_ids; 562 struct list_head lpfc_xri_blk_list; 563 unsigned long *vfi_bmask; 564 uint16_t *vfi_ids; 565 uint16_t vfi_count; 566 struct list_head lpfc_vfi_blk_list; 567 struct lpfc_sli4_flags sli4_flags; 568 struct list_head sp_queue_event; 569 struct list_head sp_cqe_event_pool; 570 struct list_head sp_asynce_work_queue; 571 struct list_head sp_fcp_xri_aborted_work_queue; 572 struct list_head sp_els_xri_aborted_work_queue; 573 struct list_head sp_unsol_work_queue; 574 struct lpfc_sli4_link link_state; 575 struct lpfc_sli4_lnk_info lnk_info; 576 uint32_t pport_name_sta; 577 #define LPFC_SLI4_PPNAME_NON 0 578 #define LPFC_SLI4_PPNAME_GET 1 579 struct lpfc_iov iov; 580 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 581 spinlock_t abts_sgl_list_lock; /* list of aborted els IOs */ 582 583 /* CPU to vector mapping information */ 584 struct lpfc_vector_map_info *cpu_map; 585 uint16_t num_online_cpu; 586 uint16_t num_present_cpu; 587 }; 588 589 enum lpfc_sge_type { 590 GEN_BUFF_TYPE, 591 SCSI_BUFF_TYPE 592 }; 593 594 enum lpfc_sgl_state { 595 SGL_FREED, 596 SGL_ALLOCATED, 597 SGL_XRI_ABORTED 598 }; 599 600 struct lpfc_sglq { 601 /* lpfc_sglqs are used in double linked lists */ 602 struct list_head list; 603 struct list_head clist; 604 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 605 enum lpfc_sgl_state state; 606 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 607 uint16_t iotag; /* pre-assigned IO tag */ 608 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 609 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 610 struct sli4_sge *sgl; /* pre-assigned SGL */ 611 void *virt; /* virtual address. */ 612 dma_addr_t phys; /* physical address */ 613 }; 614 615 struct lpfc_rpi_hdr { 616 struct list_head list; 617 uint32_t len; 618 struct lpfc_dmabuf *dmabuf; 619 uint32_t page_count; 620 uint32_t start_rpi; 621 }; 622 623 struct lpfc_rsrc_blks { 624 struct list_head list; 625 uint16_t rsrc_start; 626 uint16_t rsrc_size; 627 uint16_t rsrc_used; 628 }; 629 630 /* 631 * SLI4 specific function prototypes 632 */ 633 int lpfc_pci_function_reset(struct lpfc_hba *); 634 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 635 int lpfc_sli4_hba_setup(struct lpfc_hba *); 636 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 637 uint8_t, uint32_t, bool); 638 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 639 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 640 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 641 struct lpfc_mbx_sge *); 642 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 643 uint16_t); 644 645 void lpfc_sli4_hba_reset(struct lpfc_hba *); 646 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t, 647 uint32_t); 648 void lpfc_sli4_queue_free(struct lpfc_queue *); 649 uint32_t lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 650 uint32_t lpfc_modify_fcp_eq_delay(struct lpfc_hba *, uint16_t); 651 uint32_t lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 652 struct lpfc_queue *, uint32_t, uint32_t); 653 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 654 struct lpfc_queue *, uint32_t); 655 uint32_t lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 656 struct lpfc_queue *, uint32_t); 657 uint32_t lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 658 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 659 void lpfc_rq_adjust_repost(struct lpfc_hba *, struct lpfc_queue *, int); 660 uint32_t lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 661 uint32_t lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 662 uint32_t lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 663 uint32_t lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 664 uint32_t lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 665 struct lpfc_queue *); 666 int lpfc_sli4_queue_setup(struct lpfc_hba *); 667 void lpfc_sli4_queue_unset(struct lpfc_hba *); 668 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 669 int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *); 670 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 671 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 672 int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int); 673 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 674 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 675 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 676 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 677 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 678 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 679 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 680 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 681 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 682 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 683 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 684 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 685 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 686 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 687 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 688 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 689 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 690 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 691 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 692 struct sli4_wcqe_xri_aborted *); 693 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 694 struct sli4_wcqe_xri_aborted *); 695 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 696 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 697 int lpfc_sli4_brdreset(struct lpfc_hba *); 698 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 699 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 700 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 701 int lpfc_sli4_init_vpi(struct lpfc_vport *); 702 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool); 703 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool); 704 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 705 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 706 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 707 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 708 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 709 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 710 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 711 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 712 int lpfc_sli4_post_status_check(struct lpfc_hba *); 713 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 714 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 715