1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 24 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 25 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 26 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 27 #define LPFC_RPI_LOW_WATER_MARK 10 28 29 #define LPFC_UNREG_FCF 1 30 #define LPFC_SKIP_UNREG_FCF 0 31 32 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 33 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 34 35 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 36 #define LPFC_NEMBED_MBOX_SGL_CNT 254 37 38 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 39 #define LPFC_HBA_IO_CHAN_MIN 0 40 #define LPFC_HBA_IO_CHAN_MAX 32 41 #define LPFC_FCP_IO_CHAN_DEF 4 42 #define LPFC_NVME_IO_CHAN_DEF 0 43 44 /* Number of channels used for Flash Optimized Fabric (FOF) operations */ 45 46 #define LPFC_FOF_IO_CHAN_NUM 1 47 48 /* 49 * Provide the default FCF Record attributes used by the driver 50 * when nonFIP mode is configured and there is no other default 51 * FCF Record attributes. 52 */ 53 #define LPFC_FCOE_FCF_DEF_INDEX 0 54 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 55 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 56 57 #define LPFC_FCOE_NULL_VID 0xFFF 58 #define LPFC_FCOE_IGNORE_VID 0xFFFF 59 60 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 61 #define LPFC_FCOE_FCF_MAC3 0xFF 62 #define LPFC_FCOE_FCF_MAC4 0xFF 63 #define LPFC_FCOE_FCF_MAC5 0xFE 64 #define LPFC_FCOE_FCF_MAP0 0x0E 65 #define LPFC_FCOE_FCF_MAP1 0xFC 66 #define LPFC_FCOE_FCF_MAP2 0x00 67 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 68 #define LPFC_FCOE_FKA_ADV_PER 0 69 #define LPFC_FCOE_FIP_PRIORITY 0x80 70 71 #define sli4_sid_from_fc_hdr(fc_hdr) \ 72 ((fc_hdr)->fh_s_id[0] << 16 | \ 73 (fc_hdr)->fh_s_id[1] << 8 | \ 74 (fc_hdr)->fh_s_id[2]) 75 76 #define sli4_did_from_fc_hdr(fc_hdr) \ 77 ((fc_hdr)->fh_d_id[0] << 16 | \ 78 (fc_hdr)->fh_d_id[1] << 8 | \ 79 (fc_hdr)->fh_d_id[2]) 80 81 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 82 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 83 (fc_hdr)->fh_f_ctl[1] << 8 | \ 84 (fc_hdr)->fh_f_ctl[2]) 85 86 #define sli4_type_from_fc_hdr(fc_hdr) \ 87 ((fc_hdr)->fh_type) 88 89 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 90 91 #define INT_FW_UPGRADE 0 92 #define RUN_FW_UPGRADE 1 93 94 enum lpfc_sli4_queue_type { 95 LPFC_EQ, 96 LPFC_GCQ, 97 LPFC_MCQ, 98 LPFC_WCQ, 99 LPFC_RCQ, 100 LPFC_MQ, 101 LPFC_WQ, 102 LPFC_HRQ, 103 LPFC_DRQ 104 }; 105 106 /* The queue sub-type defines the functional purpose of the queue */ 107 enum lpfc_sli4_queue_subtype { 108 LPFC_NONE, 109 LPFC_MBOX, 110 LPFC_FCP, 111 LPFC_ELS, 112 LPFC_NVME, 113 LPFC_NVMET, 114 LPFC_NVME_LS, 115 LPFC_USOL 116 }; 117 118 union sli4_qe { 119 void *address; 120 struct lpfc_eqe *eqe; 121 struct lpfc_cqe *cqe; 122 struct lpfc_mcqe *mcqe; 123 struct lpfc_wcqe_complete *wcqe_complete; 124 struct lpfc_wcqe_release *wcqe_release; 125 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted; 126 struct lpfc_rcqe_complete *rcqe_complete; 127 struct lpfc_mqe *mqe; 128 union lpfc_wqe *wqe; 129 union lpfc_wqe128 *wqe128; 130 struct lpfc_rqe *rqe; 131 }; 132 133 /* RQ buffer list */ 134 struct lpfc_rqb { 135 uint16_t entry_count; /* Current number of RQ slots */ 136 uint16_t buffer_count; /* Current number of buffers posted */ 137 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 138 /* Callback for HBQ buffer allocation */ 139 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 140 /* Callback for HBQ buffer free */ 141 void (*rqb_free_buffer)(struct lpfc_hba *, 142 struct rqb_dmabuf *); 143 }; 144 145 struct lpfc_queue { 146 struct list_head list; 147 struct list_head wq_list; 148 enum lpfc_sli4_queue_type type; 149 enum lpfc_sli4_queue_subtype subtype; 150 struct lpfc_hba *phba; 151 struct list_head child_list; 152 struct list_head page_list; 153 struct list_head sgl_list; 154 uint32_t entry_count; /* Number of entries to support on the queue */ 155 uint32_t entry_size; /* Size of each queue entry. */ 156 uint32_t entry_repost; /* Count of entries before doorbell is rung */ 157 #define LPFC_EQ_REPOST 8 158 #define LPFC_MQ_REPOST 8 159 #define LPFC_CQ_REPOST 64 160 #define LPFC_RQ_REPOST 64 161 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 /* For WQs */ 162 uint32_t queue_id; /* Queue ID assigned by the hardware */ 163 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 164 uint32_t page_count; /* Number of pages allocated for this queue */ 165 uint32_t host_index; /* The host's index for putting or getting */ 166 uint32_t hba_index; /* The last known hba index for get or put */ 167 168 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 169 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 170 171 uint32_t q_mode; 172 uint16_t db_format; 173 #define LPFC_DB_RING_FORMAT 0x01 174 #define LPFC_DB_LIST_FORMAT 0x02 175 void __iomem *db_regaddr; 176 /* For q stats */ 177 uint32_t q_cnt_1; 178 uint32_t q_cnt_2; 179 uint32_t q_cnt_3; 180 uint64_t q_cnt_4; 181 /* defines for EQ stats */ 182 #define EQ_max_eqe q_cnt_1 183 #define EQ_no_entry q_cnt_2 184 #define EQ_cqe_cnt q_cnt_3 185 #define EQ_processed q_cnt_4 186 187 /* defines for CQ stats */ 188 #define CQ_mbox q_cnt_1 189 #define CQ_max_cqe q_cnt_1 190 #define CQ_release_wqe q_cnt_2 191 #define CQ_xri_aborted q_cnt_3 192 #define CQ_wq q_cnt_4 193 194 /* defines for WQ stats */ 195 #define WQ_overflow q_cnt_1 196 #define WQ_posted q_cnt_4 197 198 /* defines for RQ stats */ 199 #define RQ_no_posted_buf q_cnt_1 200 #define RQ_no_buf_found q_cnt_2 201 #define RQ_buf_posted q_cnt_3 202 #define RQ_rcv_buf q_cnt_4 203 204 uint64_t isr_timestamp; 205 struct lpfc_queue *assoc_qp; 206 union sli4_qe qe[1]; /* array to index entries (must be last) */ 207 }; 208 209 struct lpfc_sli4_link { 210 uint16_t speed; 211 uint8_t duplex; 212 uint8_t status; 213 uint8_t type; 214 uint8_t number; 215 uint8_t fault; 216 uint16_t logical_speed; 217 uint16_t topology; 218 }; 219 220 struct lpfc_fcf_rec { 221 uint8_t fabric_name[8]; 222 uint8_t switch_name[8]; 223 uint8_t mac_addr[6]; 224 uint16_t fcf_indx; 225 uint32_t priority; 226 uint16_t vlan_id; 227 uint32_t addr_mode; 228 uint32_t flag; 229 #define BOOT_ENABLE 0x01 230 #define RECORD_VALID 0x02 231 }; 232 233 struct lpfc_fcf_pri_rec { 234 uint16_t fcf_index; 235 #define LPFC_FCF_ON_PRI_LIST 0x0001 236 #define LPFC_FCF_FLOGI_FAILED 0x0002 237 uint16_t flag; 238 uint32_t priority; 239 }; 240 241 struct lpfc_fcf_pri { 242 struct list_head list; 243 struct lpfc_fcf_pri_rec fcf_rec; 244 }; 245 246 /* 247 * Maximum FCF table index, it is for driver internal book keeping, it 248 * just needs to be no less than the supported HBA's FCF table size. 249 */ 250 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 251 252 struct lpfc_fcf { 253 uint16_t fcfi; 254 uint32_t fcf_flag; 255 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 256 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 257 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 258 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 259 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 260 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 261 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 262 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 263 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 264 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 265 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 266 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 267 uint32_t addr_mode; 268 uint32_t eligible_fcf_cnt; 269 struct lpfc_fcf_rec current_rec; 270 struct lpfc_fcf_rec failover_rec; 271 struct list_head fcf_pri_list; 272 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 273 uint32_t current_fcf_scan_pri; 274 struct timer_list redisc_wait; 275 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 276 }; 277 278 279 #define LPFC_REGION23_SIGNATURE "RG23" 280 #define LPFC_REGION23_VERSION 1 281 #define LPFC_REGION23_LAST_REC 0xff 282 #define DRIVER_SPECIFIC_TYPE 0xA2 283 #define LINUX_DRIVER_ID 0x20 284 #define PORT_STE_TYPE 0x1 285 286 struct lpfc_fip_param_hdr { 287 uint8_t type; 288 #define FCOE_PARAM_TYPE 0xA0 289 uint8_t length; 290 #define FCOE_PARAM_LENGTH 2 291 uint8_t parm_version; 292 #define FIPP_VERSION 0x01 293 uint8_t parm_flags; 294 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 295 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 296 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 297 #define FIPP_MODE_ON 0x1 298 #define FIPP_MODE_OFF 0x0 299 #define FIPP_VLAN_VALID 0x1 300 }; 301 302 struct lpfc_fcoe_params { 303 uint8_t fc_map[3]; 304 uint8_t reserved1; 305 uint16_t vlan_tag; 306 uint8_t reserved[2]; 307 }; 308 309 struct lpfc_fcf_conn_hdr { 310 uint8_t type; 311 #define FCOE_CONN_TBL_TYPE 0xA1 312 uint8_t length; /* words */ 313 uint8_t reserved[2]; 314 }; 315 316 struct lpfc_fcf_conn_rec { 317 uint16_t flags; 318 #define FCFCNCT_VALID 0x0001 319 #define FCFCNCT_BOOT 0x0002 320 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 321 #define FCFCNCT_FBNM_VALID 0x0008 322 #define FCFCNCT_SWNM_VALID 0x0010 323 #define FCFCNCT_VLAN_VALID 0x0020 324 #define FCFCNCT_AM_VALID 0x0040 325 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 326 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 327 328 uint16_t vlan_tag; 329 uint8_t fabric_name[8]; 330 uint8_t switch_name[8]; 331 }; 332 333 struct lpfc_fcf_conn_entry { 334 struct list_head list; 335 struct lpfc_fcf_conn_rec conn_rec; 336 }; 337 338 /* 339 * Define the host's bootstrap mailbox. This structure contains 340 * the member attributes needed to create, use, and destroy the 341 * bootstrap mailbox region. 342 * 343 * The macro definitions for the bmbx data structure are defined 344 * in lpfc_hw4.h with the register definition. 345 */ 346 struct lpfc_bmbx { 347 struct lpfc_dmabuf *dmabuf; 348 struct dma_address dma_address; 349 void *avirt; 350 dma_addr_t aphys; 351 uint32_t bmbx_size; 352 }; 353 354 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 355 356 #define LPFC_EQE_SIZE_4B 4 357 #define LPFC_EQE_SIZE_16B 16 358 #define LPFC_CQE_SIZE 16 359 #define LPFC_WQE_SIZE 64 360 #define LPFC_WQE128_SIZE 128 361 #define LPFC_MQE_SIZE 256 362 #define LPFC_RQE_SIZE 8 363 364 #define LPFC_EQE_DEF_COUNT 1024 365 #define LPFC_CQE_DEF_COUNT 1024 366 #define LPFC_WQE_DEF_COUNT 256 367 #define LPFC_WQE128_DEF_COUNT 128 368 #define LPFC_WQE128_MAX_COUNT 256 369 #define LPFC_MQE_DEF_COUNT 16 370 #define LPFC_RQE_DEF_COUNT 512 371 372 #define LPFC_QUEUE_NOARM false 373 #define LPFC_QUEUE_REARM true 374 375 376 /* 377 * SLI4 CT field defines 378 */ 379 #define SLI4_CT_RPI 0 380 #define SLI4_CT_VPI 1 381 #define SLI4_CT_VFI 2 382 #define SLI4_CT_FCFI 3 383 384 /* 385 * SLI4 specific data structures 386 */ 387 struct lpfc_max_cfg_param { 388 uint16_t max_xri; 389 uint16_t xri_base; 390 uint16_t xri_used; 391 uint16_t max_rpi; 392 uint16_t rpi_base; 393 uint16_t rpi_used; 394 uint16_t max_vpi; 395 uint16_t vpi_base; 396 uint16_t vpi_used; 397 uint16_t max_vfi; 398 uint16_t vfi_base; 399 uint16_t vfi_used; 400 uint16_t max_fcfi; 401 uint16_t fcfi_used; 402 uint16_t max_eq; 403 uint16_t max_rq; 404 uint16_t max_cq; 405 uint16_t max_wq; 406 }; 407 408 struct lpfc_hba; 409 /* SLI4 HBA multi-fcp queue handler struct */ 410 #define LPFC_SLI4_HANDLER_NAME_SZ 16 411 struct lpfc_hba_eq_hdl { 412 uint32_t idx; 413 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 414 struct lpfc_hba *phba; 415 atomic_t hba_eq_in_use; 416 struct cpumask *cpumask; 417 /* CPU affinitsed to or 0xffffffff if multiple */ 418 uint32_t cpu; 419 #define LPFC_MULTI_CPU_AFFINITY 0xffffffff 420 }; 421 422 /* Port Capabilities for SLI4 Parameters */ 423 struct lpfc_pc_sli4_params { 424 uint32_t supported; 425 uint32_t if_type; 426 uint32_t sli_rev; 427 uint32_t sli_family; 428 uint32_t featurelevel_1; 429 uint32_t featurelevel_2; 430 uint32_t proto_types; 431 #define LPFC_SLI4_PROTO_FCOE 0x0000001 432 #define LPFC_SLI4_PROTO_FC 0x0000002 433 #define LPFC_SLI4_PROTO_NIC 0x0000004 434 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 435 #define LPFC_SLI4_PROTO_RDMA 0x0000010 436 uint32_t sge_supp_len; 437 uint32_t if_page_sz; 438 uint32_t rq_db_window; 439 uint32_t loopbk_scope; 440 uint32_t oas_supported; 441 uint32_t eq_pages_max; 442 uint32_t eqe_size; 443 uint32_t cq_pages_max; 444 uint32_t cqe_size; 445 uint32_t mq_pages_max; 446 uint32_t mqe_size; 447 uint32_t mq_elem_cnt; 448 uint32_t wq_pages_max; 449 uint32_t wqe_size; 450 uint32_t rq_pages_max; 451 uint32_t rqe_size; 452 uint32_t hdr_pages_max; 453 uint32_t hdr_size; 454 uint32_t hdr_pp_align; 455 uint32_t sgl_pages_max; 456 uint32_t sgl_pp_align; 457 uint8_t cqv; 458 uint8_t mqv; 459 uint8_t wqv; 460 uint8_t rqv; 461 uint8_t wqsize; 462 #define LPFC_WQ_SZ64_SUPPORT 1 463 #define LPFC_WQ_SZ128_SUPPORT 2 464 uint8_t wqpcnt; 465 }; 466 467 struct lpfc_iov { 468 uint32_t pf_number; 469 uint32_t vf_number; 470 }; 471 472 struct lpfc_sli4_lnk_info { 473 uint8_t lnk_dv; 474 #define LPFC_LNK_DAT_INVAL 0 475 #define LPFC_LNK_DAT_VAL 1 476 uint8_t lnk_tp; 477 #define LPFC_LNK_GE 0x0 /* FCoE */ 478 #define LPFC_LNK_FC 0x1 /* FC */ 479 uint8_t lnk_no; 480 uint8_t optic_state; 481 }; 482 483 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 484 LPFC_FOF_IO_CHAN_NUM) 485 486 /* Used for IRQ vector to CPU mapping */ 487 struct lpfc_vector_map_info { 488 uint16_t phys_id; 489 uint16_t core_id; 490 uint16_t irq; 491 uint16_t channel_id; 492 }; 493 #define LPFC_VECTOR_MAP_EMPTY 0xffff 494 495 /* SLI4 HBA data structure entries */ 496 struct lpfc_sli4_hba { 497 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 498 PCI BAR0, config space registers */ 499 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 500 PCI BAR1, control registers */ 501 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 502 PCI BAR2, doorbell registers */ 503 union { 504 struct { 505 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 506 void __iomem *UERRLOregaddr; 507 void __iomem *UERRHIregaddr; 508 void __iomem *UEMASKLOregaddr; 509 void __iomem *UEMASKHIregaddr; 510 } if_type0; 511 struct { 512 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 513 void __iomem *STATUSregaddr; 514 void __iomem *CTRLregaddr; 515 void __iomem *ERR1regaddr; 516 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 517 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 518 void __iomem *ERR2regaddr; 519 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 520 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 521 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 522 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 523 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 524 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 525 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 526 void __iomem *EQDregaddr; 527 } if_type2; 528 } u; 529 530 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 531 void __iomem *PSMPHRregaddr; 532 533 /* Well-known SLI INTF register memory map. */ 534 void __iomem *SLIINTFregaddr; 535 536 /* IF type 0, BAR 1 function CSR register memory map */ 537 void __iomem *ISRregaddr; /* HST_ISR register */ 538 void __iomem *IMRregaddr; /* HST_IMR register */ 539 void __iomem *ISCRregaddr; /* HST_ISCR register */ 540 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 541 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 542 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 543 void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */ 544 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 545 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 546 547 uint32_t ue_mask_lo; 548 uint32_t ue_mask_hi; 549 uint32_t ue_to_sr; 550 uint32_t ue_to_rp; 551 struct lpfc_register sli_intf; 552 struct lpfc_pc_sli4_params pc_sli4_params; 553 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 554 555 /* Pointers to the constructed SLI4 queues */ 556 struct lpfc_queue **hba_eq; /* Event queues for HBA */ 557 struct lpfc_queue **fcp_cq; /* Fast-path FCP compl queue */ 558 struct lpfc_queue **nvme_cq; /* Fast-path NVME compl queue */ 559 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 560 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 561 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 562 struct lpfc_queue **fcp_wq; /* Fast-path FCP work queue */ 563 struct lpfc_queue **nvme_wq; /* Fast-path NVME work queue */ 564 uint16_t *fcp_cq_map; 565 uint16_t *nvme_cq_map; 566 struct list_head lpfc_wq_list; 567 568 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 569 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 570 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 571 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 572 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 573 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 574 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 575 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 576 577 struct lpfc_name wwnn; 578 struct lpfc_name wwpn; 579 580 uint32_t fw_func_mode; /* FW function protocol mode */ 581 uint32_t ulp0_mode; /* ULP0 protocol mode */ 582 uint32_t ulp1_mode; /* ULP1 protocol mode */ 583 584 struct lpfc_queue *fof_eq; /* Flash Optimized Fabric Event queue */ 585 586 /* Optimized Access Storage specific queues/structures */ 587 588 struct lpfc_queue *oas_cq; /* OAS completion queue */ 589 struct lpfc_queue *oas_wq; /* OAS Work queue */ 590 struct lpfc_sli_ring *oas_ring; 591 uint64_t oas_next_lun; 592 uint8_t oas_next_tgt_wwpn[8]; 593 uint8_t oas_next_vpt_wwpn[8]; 594 595 /* Setup information for various queue parameters */ 596 int eq_esize; 597 int eq_ecount; 598 int cq_esize; 599 int cq_ecount; 600 int wq_esize; 601 int wq_ecount; 602 int mq_esize; 603 int mq_ecount; 604 int rq_esize; 605 int rq_ecount; 606 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 607 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 608 609 uint32_t intr_enable; 610 struct lpfc_bmbx bmbx; 611 struct lpfc_max_cfg_param max_cfg_param; 612 uint16_t extents_in_use; /* must allocate resource extents. */ 613 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 614 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 615 uint16_t next_rpi; 616 uint16_t nvme_xri_max; 617 uint16_t nvme_xri_cnt; 618 uint16_t nvme_xri_start; 619 uint16_t scsi_xri_max; 620 uint16_t scsi_xri_cnt; 621 uint16_t scsi_xri_start; 622 uint16_t els_xri_cnt; 623 uint16_t nvmet_xri_cnt; 624 uint16_t nvmet_ctx_get_cnt; 625 uint16_t nvmet_ctx_put_cnt; 626 uint16_t nvmet_io_wait_cnt; 627 uint16_t nvmet_io_wait_total; 628 struct list_head lpfc_els_sgl_list; 629 struct list_head lpfc_abts_els_sgl_list; 630 struct list_head lpfc_nvmet_sgl_list; 631 struct list_head lpfc_abts_nvmet_ctx_list; 632 struct list_head lpfc_abts_scsi_buf_list; 633 struct list_head lpfc_abts_nvme_buf_list; 634 struct list_head lpfc_nvmet_ctx_get_list; 635 struct list_head lpfc_nvmet_ctx_put_list; 636 struct list_head lpfc_nvmet_io_wait_list; 637 struct lpfc_sglq **lpfc_sglq_active_list; 638 struct list_head lpfc_rpi_hdr_list; 639 unsigned long *rpi_bmask; 640 uint16_t *rpi_ids; 641 uint16_t rpi_count; 642 struct list_head lpfc_rpi_blk_list; 643 unsigned long *xri_bmask; 644 uint16_t *xri_ids; 645 struct list_head lpfc_xri_blk_list; 646 unsigned long *vfi_bmask; 647 uint16_t *vfi_ids; 648 uint16_t vfi_count; 649 struct list_head lpfc_vfi_blk_list; 650 struct lpfc_sli4_flags sli4_flags; 651 struct list_head sp_queue_event; 652 struct list_head sp_cqe_event_pool; 653 struct list_head sp_asynce_work_queue; 654 struct list_head sp_fcp_xri_aborted_work_queue; 655 struct list_head sp_els_xri_aborted_work_queue; 656 struct list_head sp_nvme_xri_aborted_work_queue; 657 struct list_head sp_unsol_work_queue; 658 struct lpfc_sli4_link link_state; 659 struct lpfc_sli4_lnk_info lnk_info; 660 uint32_t pport_name_sta; 661 #define LPFC_SLI4_PPNAME_NON 0 662 #define LPFC_SLI4_PPNAME_GET 1 663 struct lpfc_iov iov; 664 spinlock_t abts_nvme_buf_list_lock; /* list of aborted SCSI IOs */ 665 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 666 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 667 spinlock_t nvmet_ctx_get_lock; /* list of avail XRI contexts */ 668 spinlock_t nvmet_ctx_put_lock; /* list of avail XRI contexts */ 669 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 670 uint32_t physical_port; 671 672 /* CPU to vector mapping information */ 673 struct lpfc_vector_map_info *cpu_map; 674 uint16_t num_online_cpu; 675 uint16_t num_present_cpu; 676 uint16_t curr_disp_cpu; 677 }; 678 679 enum lpfc_sge_type { 680 GEN_BUFF_TYPE, 681 SCSI_BUFF_TYPE, 682 NVMET_BUFF_TYPE 683 }; 684 685 enum lpfc_sgl_state { 686 SGL_FREED, 687 SGL_ALLOCATED, 688 SGL_XRI_ABORTED 689 }; 690 691 struct lpfc_sglq { 692 /* lpfc_sglqs are used in double linked lists */ 693 struct list_head list; 694 struct list_head clist; 695 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 696 enum lpfc_sgl_state state; 697 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 698 uint16_t iotag; /* pre-assigned IO tag */ 699 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 700 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 701 struct sli4_sge *sgl; /* pre-assigned SGL */ 702 void *virt; /* virtual address. */ 703 dma_addr_t phys; /* physical address */ 704 }; 705 706 struct lpfc_rpi_hdr { 707 struct list_head list; 708 uint32_t len; 709 struct lpfc_dmabuf *dmabuf; 710 uint32_t page_count; 711 uint32_t start_rpi; 712 uint16_t next_rpi; 713 }; 714 715 struct lpfc_rsrc_blks { 716 struct list_head list; 717 uint16_t rsrc_start; 718 uint16_t rsrc_size; 719 uint16_t rsrc_used; 720 }; 721 722 struct lpfc_rdp_context { 723 struct lpfc_nodelist *ndlp; 724 uint16_t ox_id; 725 uint16_t rx_id; 726 READ_LNK_VAR link_stat; 727 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 728 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 729 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 730 }; 731 732 struct lpfc_lcb_context { 733 uint8_t sub_command; 734 uint8_t type; 735 uint8_t frequency; 736 uint16_t ox_id; 737 uint16_t rx_id; 738 struct lpfc_nodelist *ndlp; 739 }; 740 741 742 /* 743 * SLI4 specific function prototypes 744 */ 745 int lpfc_pci_function_reset(struct lpfc_hba *); 746 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 747 int lpfc_sli4_hba_setup(struct lpfc_hba *); 748 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 749 uint8_t, uint32_t, bool); 750 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 751 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 752 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 753 struct lpfc_mbx_sge *); 754 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 755 uint16_t); 756 757 void lpfc_sli4_hba_reset(struct lpfc_hba *); 758 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t, 759 uint32_t); 760 void lpfc_sli4_queue_free(struct lpfc_queue *); 761 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 762 int lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 763 uint32_t numq, uint32_t imax); 764 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 765 struct lpfc_queue *, uint32_t, uint32_t); 766 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 767 struct lpfc_queue **eqp, uint32_t type, 768 uint32_t subtype); 769 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 770 struct lpfc_queue *, uint32_t); 771 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 772 struct lpfc_queue *, uint32_t); 773 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 774 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 775 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 776 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 777 uint32_t subtype); 778 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 779 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 780 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 781 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 782 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 783 struct lpfc_queue *); 784 int lpfc_sli4_queue_setup(struct lpfc_hba *); 785 void lpfc_sli4_queue_unset(struct lpfc_hba *); 786 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 787 int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *); 788 int lpfc_repost_nvme_sgl_list(struct lpfc_hba *phba); 789 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 790 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 791 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 792 int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int); 793 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 794 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 795 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 796 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 797 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 798 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 799 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 800 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 801 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 802 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 803 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 804 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 805 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 806 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 807 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 808 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 809 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 810 void lpfc_sli4_nvme_xri_abort_event_proc(struct lpfc_hba *phba); 811 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 812 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 813 struct sli4_wcqe_xri_aborted *); 814 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 815 struct sli4_wcqe_xri_aborted *axri); 816 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 817 struct sli4_wcqe_xri_aborted *axri); 818 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 819 struct sli4_wcqe_xri_aborted *); 820 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 821 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 822 int lpfc_sli4_brdreset(struct lpfc_hba *); 823 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 824 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 825 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 826 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 827 int lpfc_sli4_init_vpi(struct lpfc_vport *); 828 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool); 829 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool); 830 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 831 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 832 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 833 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 834 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 835 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 836 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 837 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 838 int lpfc_sli4_post_status_check(struct lpfc_hba *); 839 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 840 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 841