1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 24 #define CONFIG_SCSI_LPFC_DEBUG_FS 25 #endif 26 27 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 28 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 29 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 30 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 31 #define LPFC_RPI_LOW_WATER_MARK 10 32 33 #define LPFC_UNREG_FCF 1 34 #define LPFC_SKIP_UNREG_FCF 0 35 36 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 37 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 38 39 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 40 #define LPFC_NEMBED_MBOX_SGL_CNT 254 41 42 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 43 #define LPFC_HBA_HDWQ_MIN 0 44 #define LPFC_HBA_HDWQ_MAX 128 45 #define LPFC_HBA_HDWQ_DEF 0 46 47 /* Common buffer size to accomidate SCSI and NVME IO buffers */ 48 #define LPFC_COMMON_IO_BUF_SZ 768 49 50 /* 51 * Provide the default FCF Record attributes used by the driver 52 * when nonFIP mode is configured and there is no other default 53 * FCF Record attributes. 54 */ 55 #define LPFC_FCOE_FCF_DEF_INDEX 0 56 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 57 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 58 59 #define LPFC_FCOE_NULL_VID 0xFFF 60 #define LPFC_FCOE_IGNORE_VID 0xFFFF 61 62 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 63 #define LPFC_FCOE_FCF_MAC3 0xFF 64 #define LPFC_FCOE_FCF_MAC4 0xFF 65 #define LPFC_FCOE_FCF_MAC5 0xFE 66 #define LPFC_FCOE_FCF_MAP0 0x0E 67 #define LPFC_FCOE_FCF_MAP1 0xFC 68 #define LPFC_FCOE_FCF_MAP2 0x00 69 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 70 #define LPFC_FCOE_FKA_ADV_PER 0 71 #define LPFC_FCOE_FIP_PRIORITY 0x80 72 73 #define sli4_sid_from_fc_hdr(fc_hdr) \ 74 ((fc_hdr)->fh_s_id[0] << 16 | \ 75 (fc_hdr)->fh_s_id[1] << 8 | \ 76 (fc_hdr)->fh_s_id[2]) 77 78 #define sli4_did_from_fc_hdr(fc_hdr) \ 79 ((fc_hdr)->fh_d_id[0] << 16 | \ 80 (fc_hdr)->fh_d_id[1] << 8 | \ 81 (fc_hdr)->fh_d_id[2]) 82 83 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 84 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 85 (fc_hdr)->fh_f_ctl[1] << 8 | \ 86 (fc_hdr)->fh_f_ctl[2]) 87 88 #define sli4_type_from_fc_hdr(fc_hdr) \ 89 ((fc_hdr)->fh_type) 90 91 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 92 93 #define INT_FW_UPGRADE 0 94 #define RUN_FW_UPGRADE 1 95 96 enum lpfc_sli4_queue_type { 97 LPFC_EQ, 98 LPFC_GCQ, 99 LPFC_MCQ, 100 LPFC_WCQ, 101 LPFC_RCQ, 102 LPFC_MQ, 103 LPFC_WQ, 104 LPFC_HRQ, 105 LPFC_DRQ 106 }; 107 108 /* The queue sub-type defines the functional purpose of the queue */ 109 enum lpfc_sli4_queue_subtype { 110 LPFC_NONE, 111 LPFC_MBOX, 112 LPFC_FCP, 113 LPFC_ELS, 114 LPFC_NVME, 115 LPFC_NVMET, 116 LPFC_NVME_LS, 117 LPFC_USOL 118 }; 119 120 /* RQ buffer list */ 121 struct lpfc_rqb { 122 uint16_t entry_count; /* Current number of RQ slots */ 123 uint16_t buffer_count; /* Current number of buffers posted */ 124 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 125 /* Callback for HBQ buffer allocation */ 126 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 127 /* Callback for HBQ buffer free */ 128 void (*rqb_free_buffer)(struct lpfc_hba *, 129 struct rqb_dmabuf *); 130 }; 131 132 struct lpfc_queue { 133 struct list_head list; 134 struct list_head wq_list; 135 struct list_head wqfull_list; 136 enum lpfc_sli4_queue_type type; 137 enum lpfc_sli4_queue_subtype subtype; 138 struct lpfc_hba *phba; 139 struct list_head child_list; 140 struct list_head page_list; 141 struct list_head sgl_list; 142 struct list_head cpu_list; 143 uint32_t entry_count; /* Number of entries to support on the queue */ 144 uint32_t entry_size; /* Size of each queue entry. */ 145 uint32_t entry_cnt_per_pg; 146 uint32_t notify_interval; /* Queue Notification Interval 147 * For chip->host queues (EQ, CQ, RQ): 148 * specifies the interval (number of 149 * entries) where the doorbell is rung to 150 * notify the chip of entry consumption. 151 * For host->chip queues (WQ): 152 * specifies the interval (number of 153 * entries) where consumption CQE is 154 * requested to indicate WQ entries 155 * consumed by the chip. 156 * Not used on an MQ. 157 */ 158 #define LPFC_EQ_NOTIFY_INTRVL 16 159 #define LPFC_CQ_NOTIFY_INTRVL 16 160 #define LPFC_WQ_NOTIFY_INTRVL 16 161 #define LPFC_RQ_NOTIFY_INTRVL 16 162 uint32_t max_proc_limit; /* Queue Processing Limit 163 * For chip->host queues (EQ, CQ): 164 * specifies the maximum number of 165 * entries to be consumed in one 166 * processing iteration sequence. Queue 167 * will be rearmed after each iteration. 168 * Not used on an MQ, RQ or WQ. 169 */ 170 #define LPFC_EQ_MAX_PROC_LIMIT 256 171 #define LPFC_CQ_MIN_PROC_LIMIT 64 172 #define LPFC_CQ_MAX_PROC_LIMIT LPFC_CQE_EXP_COUNT // 4096 173 #define LPFC_CQ_DEF_MAX_PROC_LIMIT LPFC_CQE_DEF_COUNT // 1024 174 #define LPFC_CQ_MIN_THRESHOLD_TO_POLL 64 175 #define LPFC_CQ_MAX_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 176 #define LPFC_CQ_DEF_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 177 uint32_t queue_claimed; /* indicates queue is being processed */ 178 uint32_t queue_id; /* Queue ID assigned by the hardware */ 179 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 180 uint32_t host_index; /* The host's index for putting or getting */ 181 uint32_t hba_index; /* The last known hba index for get or put */ 182 uint32_t q_mode; 183 184 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 185 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 186 187 uint16_t page_count; /* Number of pages allocated for this queue */ 188 uint16_t page_size; /* size of page allocated for this queue */ 189 #define LPFC_EXPANDED_PAGE_SIZE 16384 190 #define LPFC_DEFAULT_PAGE_SIZE 4096 191 uint16_t chann; /* Hardware Queue association WQ/CQ */ 192 /* CPU affinity for EQ */ 193 #define LPFC_FIND_BY_EQ 0 194 #define LPFC_FIND_BY_HDWQ 1 195 uint8_t db_format; 196 #define LPFC_DB_RING_FORMAT 0x01 197 #define LPFC_DB_LIST_FORMAT 0x02 198 uint8_t q_flag; 199 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */ 200 #define HBA_NVMET_CQ_NOTIFY 0x1 /* LPFC_NVMET_CQ_NOTIFY CQEs this EQE */ 201 #define LPFC_NVMET_CQ_NOTIFY 4 202 void __iomem *db_regaddr; 203 uint16_t dpp_enable; 204 uint16_t dpp_id; 205 void __iomem *dpp_regaddr; 206 207 /* For q stats */ 208 uint32_t q_cnt_1; 209 uint32_t q_cnt_2; 210 uint32_t q_cnt_3; 211 uint64_t q_cnt_4; 212 /* defines for EQ stats */ 213 #define EQ_max_eqe q_cnt_1 214 #define EQ_no_entry q_cnt_2 215 #define EQ_cqe_cnt q_cnt_3 216 #define EQ_processed q_cnt_4 217 218 /* defines for CQ stats */ 219 #define CQ_mbox q_cnt_1 220 #define CQ_max_cqe q_cnt_1 221 #define CQ_release_wqe q_cnt_2 222 #define CQ_xri_aborted q_cnt_3 223 #define CQ_wq q_cnt_4 224 225 /* defines for WQ stats */ 226 #define WQ_overflow q_cnt_1 227 #define WQ_posted q_cnt_4 228 229 /* defines for RQ stats */ 230 #define RQ_no_posted_buf q_cnt_1 231 #define RQ_no_buf_found q_cnt_2 232 #define RQ_buf_posted q_cnt_3 233 #define RQ_rcv_buf q_cnt_4 234 235 struct work_struct irqwork; 236 struct work_struct spwork; 237 struct delayed_work sched_irqwork; 238 struct delayed_work sched_spwork; 239 240 uint64_t isr_timestamp; 241 uint16_t hdwq; 242 uint16_t last_cpu; /* most recent cpu */ 243 uint8_t qe_valid; 244 struct lpfc_queue *assoc_qp; 245 void **q_pgs; /* array to index entries per page */ 246 }; 247 248 struct lpfc_sli4_link { 249 uint32_t speed; 250 uint8_t duplex; 251 uint8_t status; 252 uint8_t type; 253 uint8_t number; 254 uint8_t fault; 255 uint32_t logical_speed; 256 uint16_t topology; 257 }; 258 259 struct lpfc_fcf_rec { 260 uint8_t fabric_name[8]; 261 uint8_t switch_name[8]; 262 uint8_t mac_addr[6]; 263 uint16_t fcf_indx; 264 uint32_t priority; 265 uint16_t vlan_id; 266 uint32_t addr_mode; 267 uint32_t flag; 268 #define BOOT_ENABLE 0x01 269 #define RECORD_VALID 0x02 270 }; 271 272 struct lpfc_fcf_pri_rec { 273 uint16_t fcf_index; 274 #define LPFC_FCF_ON_PRI_LIST 0x0001 275 #define LPFC_FCF_FLOGI_FAILED 0x0002 276 uint16_t flag; 277 uint32_t priority; 278 }; 279 280 struct lpfc_fcf_pri { 281 struct list_head list; 282 struct lpfc_fcf_pri_rec fcf_rec; 283 }; 284 285 /* 286 * Maximum FCF table index, it is for driver internal book keeping, it 287 * just needs to be no less than the supported HBA's FCF table size. 288 */ 289 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 290 291 struct lpfc_fcf { 292 uint16_t fcfi; 293 uint32_t fcf_flag; 294 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 295 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 296 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 297 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 298 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 299 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 300 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 301 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 302 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 303 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 304 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 305 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 306 uint16_t fcf_redisc_attempted; 307 uint32_t addr_mode; 308 uint32_t eligible_fcf_cnt; 309 struct lpfc_fcf_rec current_rec; 310 struct lpfc_fcf_rec failover_rec; 311 struct list_head fcf_pri_list; 312 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 313 uint32_t current_fcf_scan_pri; 314 struct timer_list redisc_wait; 315 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 316 }; 317 318 319 #define LPFC_REGION23_SIGNATURE "RG23" 320 #define LPFC_REGION23_VERSION 1 321 #define LPFC_REGION23_LAST_REC 0xff 322 #define DRIVER_SPECIFIC_TYPE 0xA2 323 #define LINUX_DRIVER_ID 0x20 324 #define PORT_STE_TYPE 0x1 325 326 struct lpfc_fip_param_hdr { 327 uint8_t type; 328 #define FCOE_PARAM_TYPE 0xA0 329 uint8_t length; 330 #define FCOE_PARAM_LENGTH 2 331 uint8_t parm_version; 332 #define FIPP_VERSION 0x01 333 uint8_t parm_flags; 334 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 335 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 336 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 337 #define FIPP_MODE_ON 0x1 338 #define FIPP_MODE_OFF 0x0 339 #define FIPP_VLAN_VALID 0x1 340 }; 341 342 struct lpfc_fcoe_params { 343 uint8_t fc_map[3]; 344 uint8_t reserved1; 345 uint16_t vlan_tag; 346 uint8_t reserved[2]; 347 }; 348 349 struct lpfc_fcf_conn_hdr { 350 uint8_t type; 351 #define FCOE_CONN_TBL_TYPE 0xA1 352 uint8_t length; /* words */ 353 uint8_t reserved[2]; 354 }; 355 356 struct lpfc_fcf_conn_rec { 357 uint16_t flags; 358 #define FCFCNCT_VALID 0x0001 359 #define FCFCNCT_BOOT 0x0002 360 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 361 #define FCFCNCT_FBNM_VALID 0x0008 362 #define FCFCNCT_SWNM_VALID 0x0010 363 #define FCFCNCT_VLAN_VALID 0x0020 364 #define FCFCNCT_AM_VALID 0x0040 365 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 366 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 367 368 uint16_t vlan_tag; 369 uint8_t fabric_name[8]; 370 uint8_t switch_name[8]; 371 }; 372 373 struct lpfc_fcf_conn_entry { 374 struct list_head list; 375 struct lpfc_fcf_conn_rec conn_rec; 376 }; 377 378 /* 379 * Define the host's bootstrap mailbox. This structure contains 380 * the member attributes needed to create, use, and destroy the 381 * bootstrap mailbox region. 382 * 383 * The macro definitions for the bmbx data structure are defined 384 * in lpfc_hw4.h with the register definition. 385 */ 386 struct lpfc_bmbx { 387 struct lpfc_dmabuf *dmabuf; 388 struct dma_address dma_address; 389 void *avirt; 390 dma_addr_t aphys; 391 uint32_t bmbx_size; 392 }; 393 394 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 395 396 #define LPFC_EQE_SIZE_4B 4 397 #define LPFC_EQE_SIZE_16B 16 398 #define LPFC_CQE_SIZE 16 399 #define LPFC_WQE_SIZE 64 400 #define LPFC_WQE128_SIZE 128 401 #define LPFC_MQE_SIZE 256 402 #define LPFC_RQE_SIZE 8 403 404 #define LPFC_EQE_DEF_COUNT 1024 405 #define LPFC_CQE_DEF_COUNT 1024 406 #define LPFC_CQE_EXP_COUNT 4096 407 #define LPFC_WQE_DEF_COUNT 256 408 #define LPFC_WQE_EXP_COUNT 1024 409 #define LPFC_MQE_DEF_COUNT 16 410 #define LPFC_RQE_DEF_COUNT 512 411 412 #define LPFC_QUEUE_NOARM false 413 #define LPFC_QUEUE_REARM true 414 415 416 /* 417 * SLI4 CT field defines 418 */ 419 #define SLI4_CT_RPI 0 420 #define SLI4_CT_VPI 1 421 #define SLI4_CT_VFI 2 422 #define SLI4_CT_FCFI 3 423 424 /* 425 * SLI4 specific data structures 426 */ 427 struct lpfc_max_cfg_param { 428 uint16_t max_xri; 429 uint16_t xri_base; 430 uint16_t xri_used; 431 uint16_t max_rpi; 432 uint16_t rpi_base; 433 uint16_t rpi_used; 434 uint16_t max_vpi; 435 uint16_t vpi_base; 436 uint16_t vpi_used; 437 uint16_t max_vfi; 438 uint16_t vfi_base; 439 uint16_t vfi_used; 440 uint16_t max_fcfi; 441 uint16_t fcfi_used; 442 uint16_t max_eq; 443 uint16_t max_rq; 444 uint16_t max_cq; 445 uint16_t max_wq; 446 }; 447 448 struct lpfc_hba; 449 /* SLI4 HBA multi-fcp queue handler struct */ 450 #define LPFC_SLI4_HANDLER_NAME_SZ 16 451 struct lpfc_hba_eq_hdl { 452 uint32_t idx; 453 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 454 struct lpfc_hba *phba; 455 struct lpfc_queue *eq; 456 }; 457 458 /*BB Credit recovery value*/ 459 struct lpfc_bbscn_params { 460 uint32_t word0; 461 #define lpfc_bbscn_min_SHIFT 0 462 #define lpfc_bbscn_min_MASK 0x0000000F 463 #define lpfc_bbscn_min_WORD word0 464 #define lpfc_bbscn_max_SHIFT 4 465 #define lpfc_bbscn_max_MASK 0x0000000F 466 #define lpfc_bbscn_max_WORD word0 467 #define lpfc_bbscn_def_SHIFT 8 468 #define lpfc_bbscn_def_MASK 0x0000000F 469 #define lpfc_bbscn_def_WORD word0 470 }; 471 472 /* Port Capabilities for SLI4 Parameters */ 473 struct lpfc_pc_sli4_params { 474 uint32_t supported; 475 uint32_t if_type; 476 uint32_t sli_rev; 477 uint32_t sli_family; 478 uint32_t featurelevel_1; 479 uint32_t featurelevel_2; 480 uint32_t proto_types; 481 #define LPFC_SLI4_PROTO_FCOE 0x0000001 482 #define LPFC_SLI4_PROTO_FC 0x0000002 483 #define LPFC_SLI4_PROTO_NIC 0x0000004 484 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 485 #define LPFC_SLI4_PROTO_RDMA 0x0000010 486 uint32_t sge_supp_len; 487 uint32_t if_page_sz; 488 uint32_t rq_db_window; 489 uint32_t loopbk_scope; 490 uint32_t oas_supported; 491 uint32_t eq_pages_max; 492 uint32_t eqe_size; 493 uint32_t cq_pages_max; 494 uint32_t cqe_size; 495 uint32_t mq_pages_max; 496 uint32_t mqe_size; 497 uint32_t mq_elem_cnt; 498 uint32_t wq_pages_max; 499 uint32_t wqe_size; 500 uint32_t rq_pages_max; 501 uint32_t rqe_size; 502 uint32_t hdr_pages_max; 503 uint32_t hdr_size; 504 uint32_t hdr_pp_align; 505 uint32_t sgl_pages_max; 506 uint32_t sgl_pp_align; 507 uint8_t cqv; 508 uint8_t mqv; 509 uint8_t wqv; 510 uint8_t rqv; 511 uint8_t eqav; 512 uint8_t cqav; 513 uint8_t wqsize; 514 uint8_t bv1s; 515 #define LPFC_WQ_SZ64_SUPPORT 1 516 #define LPFC_WQ_SZ128_SUPPORT 2 517 uint8_t wqpcnt; 518 uint8_t nvme; 519 }; 520 521 #define LPFC_CQ_4K_PAGE_SZ 0x1 522 #define LPFC_CQ_16K_PAGE_SZ 0x4 523 #define LPFC_WQ_4K_PAGE_SZ 0x1 524 #define LPFC_WQ_16K_PAGE_SZ 0x4 525 526 struct lpfc_iov { 527 uint32_t pf_number; 528 uint32_t vf_number; 529 }; 530 531 struct lpfc_sli4_lnk_info { 532 uint8_t lnk_dv; 533 #define LPFC_LNK_DAT_INVAL 0 534 #define LPFC_LNK_DAT_VAL 1 535 uint8_t lnk_tp; 536 #define LPFC_LNK_GE 0x0 /* FCoE */ 537 #define LPFC_LNK_FC 0x1 /* FC */ 538 #define LPFC_LNK_FC_TRUNKED 0x2 /* FC_Trunked */ 539 uint8_t lnk_no; 540 uint8_t optic_state; 541 }; 542 543 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 544 LPFC_FOF_IO_CHAN_NUM) 545 546 /* Used for IRQ vector to CPU mapping */ 547 struct lpfc_vector_map_info { 548 uint16_t phys_id; 549 uint16_t core_id; 550 uint16_t irq; 551 uint16_t eq; 552 uint16_t hdwq; 553 uint16_t flag; 554 #define LPFC_CPU_MAP_HYPER 0x1 555 #define LPFC_CPU_MAP_UNASSIGN 0x2 556 #define LPFC_CPU_FIRST_IRQ 0x4 557 }; 558 #define LPFC_VECTOR_MAP_EMPTY 0xffff 559 560 /* Multi-XRI pool */ 561 #define XRI_BATCH 8 562 563 struct lpfc_pbl_pool { 564 struct list_head list; 565 u32 count; 566 spinlock_t lock; /* lock for pbl_pool*/ 567 }; 568 569 struct lpfc_pvt_pool { 570 u32 low_watermark; 571 u32 high_watermark; 572 573 struct list_head list; 574 u32 count; 575 spinlock_t lock; /* lock for pvt_pool */ 576 }; 577 578 struct lpfc_multixri_pool { 579 u32 xri_limit; 580 581 /* Starting point when searching a pbl_pool with round-robin method */ 582 u32 rrb_next_hwqid; 583 584 /* Used by lpfc_adjust_pvt_pool_count. 585 * io_req_count is incremented by 1 during IO submission. The heartbeat 586 * handler uses these two variables to determine if pvt_pool is idle or 587 * busy. 588 */ 589 u32 prev_io_req_count; 590 u32 io_req_count; 591 592 /* statistics */ 593 u32 pbl_empty_count; 594 #ifdef LPFC_MXP_STAT 595 u32 above_limit_count; 596 u32 below_limit_count; 597 u32 local_pbl_hit_count; 598 u32 other_pbl_hit_count; 599 u32 stat_max_hwm; 600 601 #define LPFC_MXP_SNAPSHOT_TAKEN 3 /* snapshot is taken at 3rd heartbeats */ 602 u32 stat_pbl_count; 603 u32 stat_pvt_count; 604 u32 stat_busy_count; 605 u32 stat_snapshot_taken; 606 #endif 607 608 /* TODO: Separate pvt_pool into get and put list */ 609 struct lpfc_pbl_pool pbl_pool; /* Public free XRI pool */ 610 struct lpfc_pvt_pool pvt_pool; /* Private free XRI pool */ 611 }; 612 613 struct lpfc_fc4_ctrl_stat { 614 u32 input_requests; 615 u32 output_requests; 616 u32 control_requests; 617 u32 io_cmpls; 618 }; 619 620 #ifdef LPFC_HDWQ_LOCK_STAT 621 struct lpfc_lock_stat { 622 uint32_t alloc_xri_get; 623 uint32_t alloc_xri_put; 624 uint32_t free_xri; 625 uint32_t wq_access; 626 uint32_t alloc_pvt_pool; 627 uint32_t mv_from_pvt_pool; 628 uint32_t mv_to_pub_pool; 629 uint32_t mv_to_pvt_pool; 630 uint32_t free_pub_pool; 631 uint32_t free_pvt_pool; 632 }; 633 #endif 634 635 struct lpfc_eq_intr_info { 636 struct list_head list; 637 uint32_t icnt; 638 }; 639 640 /* SLI4 HBA data structure entries */ 641 struct lpfc_sli4_hdw_queue { 642 /* Pointers to the constructed SLI4 queues */ 643 struct lpfc_queue *hba_eq; /* Event queues for HBA */ 644 struct lpfc_queue *fcp_cq; /* Fast-path FCP compl queue */ 645 struct lpfc_queue *nvme_cq; /* Fast-path NVME compl queue */ 646 struct lpfc_queue *fcp_wq; /* Fast-path FCP work queue */ 647 struct lpfc_queue *nvme_wq; /* Fast-path NVME work queue */ 648 uint16_t fcp_cq_map; 649 uint16_t nvme_cq_map; 650 651 /* Keep track of IO buffers for this hardware queue */ 652 spinlock_t io_buf_list_get_lock; /* Common buf alloc list lock */ 653 struct list_head lpfc_io_buf_list_get; 654 spinlock_t io_buf_list_put_lock; /* Common buf free list lock */ 655 struct list_head lpfc_io_buf_list_put; 656 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 657 struct list_head lpfc_abts_scsi_buf_list; 658 spinlock_t abts_nvme_buf_list_lock; /* list of aborted NVME IOs */ 659 struct list_head lpfc_abts_nvme_buf_list; 660 uint32_t total_io_bufs; 661 uint32_t get_io_bufs; 662 uint32_t put_io_bufs; 663 uint32_t empty_io_bufs; 664 uint32_t abts_scsi_io_bufs; 665 uint32_t abts_nvme_io_bufs; 666 667 /* Multi-XRI pool per HWQ */ 668 struct lpfc_multixri_pool *p_multixri_pool; 669 670 /* FC-4 Stats counters */ 671 struct lpfc_fc4_ctrl_stat nvme_cstat; 672 struct lpfc_fc4_ctrl_stat scsi_cstat; 673 #ifdef LPFC_HDWQ_LOCK_STAT 674 struct lpfc_lock_stat lock_conflict; 675 #endif 676 677 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 678 #define LPFC_CHECK_CPU_CNT 128 679 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT]; 680 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 681 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 682 #endif 683 }; 684 685 #ifdef LPFC_HDWQ_LOCK_STAT 686 /* compile time trylock stats */ 687 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 688 { \ 689 int only_once = 1; \ 690 while (spin_trylock_irqsave(lock, flag) == 0) { \ 691 if (only_once) { \ 692 only_once = 0; \ 693 qp->lock_conflict.lstat++; \ 694 } \ 695 } \ 696 } 697 #define lpfc_qp_spin_lock(lock, qp, lstat) \ 698 { \ 699 int only_once = 1; \ 700 while (spin_trylock(lock) == 0) { \ 701 if (only_once) { \ 702 only_once = 0; \ 703 qp->lock_conflict.lstat++; \ 704 } \ 705 } \ 706 } 707 #else 708 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 709 spin_lock_irqsave(lock, flag) 710 #define lpfc_qp_spin_lock(lock, qp, lstat) spin_lock(lock) 711 #endif 712 713 struct lpfc_sli4_hba { 714 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 715 * config space registers 716 */ 717 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 718 * control registers 719 */ 720 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 721 * doorbell registers 722 */ 723 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for 724 * dpp registers 725 */ 726 union { 727 struct { 728 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 729 void __iomem *UERRLOregaddr; 730 void __iomem *UERRHIregaddr; 731 void __iomem *UEMASKLOregaddr; 732 void __iomem *UEMASKHIregaddr; 733 } if_type0; 734 struct { 735 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 736 void __iomem *STATUSregaddr; 737 void __iomem *CTRLregaddr; 738 void __iomem *ERR1regaddr; 739 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 740 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 741 void __iomem *ERR2regaddr; 742 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 743 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 744 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 745 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 746 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 747 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 748 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 749 void __iomem *EQDregaddr; 750 } if_type2; 751 } u; 752 753 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 754 void __iomem *PSMPHRregaddr; 755 756 /* Well-known SLI INTF register memory map. */ 757 void __iomem *SLIINTFregaddr; 758 759 /* IF type 0, BAR 1 function CSR register memory map */ 760 void __iomem *ISRregaddr; /* HST_ISR register */ 761 void __iomem *IMRregaddr; /* HST_IMR register */ 762 void __iomem *ISCRregaddr; /* HST_ISCR register */ 763 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 764 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 765 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 766 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */ 767 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */ 768 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 769 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 770 771 uint32_t ue_mask_lo; 772 uint32_t ue_mask_hi; 773 uint32_t ue_to_sr; 774 uint32_t ue_to_rp; 775 struct lpfc_register sli_intf; 776 struct lpfc_pc_sli4_params pc_sli4_params; 777 struct lpfc_bbscn_params bbscn_params; 778 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 779 780 void (*sli4_eq_clr_intr)(struct lpfc_queue *q); 781 void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq, 782 uint32_t count, bool arm); 783 void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq, 784 uint32_t count, bool arm); 785 786 /* Pointers to the constructed SLI4 queues */ 787 struct lpfc_sli4_hdw_queue *hdwq; 788 struct list_head lpfc_wq_list; 789 790 /* Pointers to the constructed SLI4 queues for NVMET */ 791 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 792 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 793 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 794 795 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 796 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 797 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 798 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 799 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 800 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 801 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 802 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 803 804 struct lpfc_name wwnn; 805 struct lpfc_name wwpn; 806 807 uint32_t fw_func_mode; /* FW function protocol mode */ 808 uint32_t ulp0_mode; /* ULP0 protocol mode */ 809 uint32_t ulp1_mode; /* ULP1 protocol mode */ 810 811 /* Optimized Access Storage specific queues/structures */ 812 uint64_t oas_next_lun; 813 uint8_t oas_next_tgt_wwpn[8]; 814 uint8_t oas_next_vpt_wwpn[8]; 815 816 /* Setup information for various queue parameters */ 817 int eq_esize; 818 int eq_ecount; 819 int cq_esize; 820 int cq_ecount; 821 int wq_esize; 822 int wq_ecount; 823 int mq_esize; 824 int mq_ecount; 825 int rq_esize; 826 int rq_ecount; 827 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 828 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 829 830 uint32_t intr_enable; 831 struct lpfc_bmbx bmbx; 832 struct lpfc_max_cfg_param max_cfg_param; 833 uint16_t extents_in_use; /* must allocate resource extents. */ 834 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 835 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 836 uint16_t next_rpi; 837 uint16_t io_xri_max; 838 uint16_t io_xri_cnt; 839 uint16_t io_xri_start; 840 uint16_t els_xri_cnt; 841 uint16_t nvmet_xri_cnt; 842 uint16_t nvmet_io_wait_cnt; 843 uint16_t nvmet_io_wait_total; 844 uint16_t cq_max; 845 struct lpfc_queue **cq_lookup; 846 struct list_head lpfc_els_sgl_list; 847 struct list_head lpfc_abts_els_sgl_list; 848 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 849 struct list_head lpfc_abts_scsi_buf_list; 850 struct list_head lpfc_nvmet_sgl_list; 851 spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */ 852 struct list_head lpfc_abts_nvmet_ctx_list; 853 spinlock_t t_active_list_lock; /* list of active NVMET IOs */ 854 struct list_head t_active_ctx_list; 855 struct list_head lpfc_nvmet_io_wait_list; 856 struct lpfc_nvmet_ctx_info *nvmet_ctx_info; 857 struct lpfc_sglq **lpfc_sglq_active_list; 858 struct list_head lpfc_rpi_hdr_list; 859 unsigned long *rpi_bmask; 860 uint16_t *rpi_ids; 861 uint16_t rpi_count; 862 struct list_head lpfc_rpi_blk_list; 863 unsigned long *xri_bmask; 864 uint16_t *xri_ids; 865 struct list_head lpfc_xri_blk_list; 866 unsigned long *vfi_bmask; 867 uint16_t *vfi_ids; 868 uint16_t vfi_count; 869 struct list_head lpfc_vfi_blk_list; 870 struct lpfc_sli4_flags sli4_flags; 871 struct list_head sp_queue_event; 872 struct list_head sp_cqe_event_pool; 873 struct list_head sp_asynce_work_queue; 874 struct list_head sp_fcp_xri_aborted_work_queue; 875 struct list_head sp_els_xri_aborted_work_queue; 876 struct list_head sp_unsol_work_queue; 877 struct lpfc_sli4_link link_state; 878 struct lpfc_sli4_lnk_info lnk_info; 879 uint32_t pport_name_sta; 880 #define LPFC_SLI4_PPNAME_NON 0 881 #define LPFC_SLI4_PPNAME_GET 1 882 struct lpfc_iov iov; 883 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 884 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 885 uint32_t physical_port; 886 887 /* CPU to vector mapping information */ 888 struct lpfc_vector_map_info *cpu_map; 889 uint16_t num_possible_cpu; 890 uint16_t num_present_cpu; 891 uint16_t curr_disp_cpu; 892 struct lpfc_eq_intr_info __percpu *eq_info; 893 uint32_t conf_trunk; 894 #define lpfc_conf_trunk_port0_WORD conf_trunk 895 #define lpfc_conf_trunk_port0_SHIFT 0 896 #define lpfc_conf_trunk_port0_MASK 0x1 897 #define lpfc_conf_trunk_port1_WORD conf_trunk 898 #define lpfc_conf_trunk_port1_SHIFT 1 899 #define lpfc_conf_trunk_port1_MASK 0x1 900 #define lpfc_conf_trunk_port2_WORD conf_trunk 901 #define lpfc_conf_trunk_port2_SHIFT 2 902 #define lpfc_conf_trunk_port2_MASK 0x1 903 #define lpfc_conf_trunk_port3_WORD conf_trunk 904 #define lpfc_conf_trunk_port3_SHIFT 3 905 #define lpfc_conf_trunk_port3_MASK 0x1 906 #define lpfc_conf_trunk_port0_nd_WORD conf_trunk 907 #define lpfc_conf_trunk_port0_nd_SHIFT 4 908 #define lpfc_conf_trunk_port0_nd_MASK 0x1 909 #define lpfc_conf_trunk_port1_nd_WORD conf_trunk 910 #define lpfc_conf_trunk_port1_nd_SHIFT 5 911 #define lpfc_conf_trunk_port1_nd_MASK 0x1 912 #define lpfc_conf_trunk_port2_nd_WORD conf_trunk 913 #define lpfc_conf_trunk_port2_nd_SHIFT 6 914 #define lpfc_conf_trunk_port2_nd_MASK 0x1 915 #define lpfc_conf_trunk_port3_nd_WORD conf_trunk 916 #define lpfc_conf_trunk_port3_nd_SHIFT 7 917 #define lpfc_conf_trunk_port3_nd_MASK 0x1 918 }; 919 920 enum lpfc_sge_type { 921 GEN_BUFF_TYPE, 922 SCSI_BUFF_TYPE, 923 NVMET_BUFF_TYPE 924 }; 925 926 enum lpfc_sgl_state { 927 SGL_FREED, 928 SGL_ALLOCATED, 929 SGL_XRI_ABORTED 930 }; 931 932 struct lpfc_sglq { 933 /* lpfc_sglqs are used in double linked lists */ 934 struct list_head list; 935 struct list_head clist; 936 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 937 enum lpfc_sgl_state state; 938 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 939 uint16_t iotag; /* pre-assigned IO tag */ 940 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 941 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 942 struct sli4_sge *sgl; /* pre-assigned SGL */ 943 void *virt; /* virtual address. */ 944 dma_addr_t phys; /* physical address */ 945 }; 946 947 struct lpfc_rpi_hdr { 948 struct list_head list; 949 uint32_t len; 950 struct lpfc_dmabuf *dmabuf; 951 uint32_t page_count; 952 uint32_t start_rpi; 953 uint16_t next_rpi; 954 }; 955 956 struct lpfc_rsrc_blks { 957 struct list_head list; 958 uint16_t rsrc_start; 959 uint16_t rsrc_size; 960 uint16_t rsrc_used; 961 }; 962 963 struct lpfc_rdp_context { 964 struct lpfc_nodelist *ndlp; 965 uint16_t ox_id; 966 uint16_t rx_id; 967 READ_LNK_VAR link_stat; 968 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 969 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 970 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 971 }; 972 973 struct lpfc_lcb_context { 974 uint8_t sub_command; 975 uint8_t type; 976 uint8_t capability; 977 uint8_t frequency; 978 uint16_t duration; 979 uint16_t ox_id; 980 uint16_t rx_id; 981 struct lpfc_nodelist *ndlp; 982 }; 983 984 985 /* 986 * SLI4 specific function prototypes 987 */ 988 int lpfc_pci_function_reset(struct lpfc_hba *); 989 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 990 int lpfc_sli4_hba_setup(struct lpfc_hba *); 991 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 992 uint8_t, uint32_t, bool); 993 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 994 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 995 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 996 struct lpfc_mbx_sge *); 997 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 998 uint16_t); 999 1000 void lpfc_sli4_hba_reset(struct lpfc_hba *); 1001 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *phba, 1002 uint32_t page_size, 1003 uint32_t entry_size, 1004 uint32_t entry_count, int cpu); 1005 void lpfc_sli4_queue_free(struct lpfc_queue *); 1006 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 1007 void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 1008 uint32_t numq, uint32_t usdelay); 1009 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 1010 struct lpfc_queue *, uint32_t, uint32_t); 1011 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 1012 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type, 1013 uint32_t subtype); 1014 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 1015 struct lpfc_queue *, uint32_t); 1016 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 1017 struct lpfc_queue *, uint32_t); 1018 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 1019 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 1020 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 1021 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 1022 uint32_t subtype); 1023 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1024 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1025 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1026 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1027 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 1028 struct lpfc_queue *); 1029 int lpfc_sli4_queue_setup(struct lpfc_hba *); 1030 void lpfc_sli4_queue_unset(struct lpfc_hba *); 1031 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 1032 int lpfc_repost_io_sgl_list(struct lpfc_hba *phba); 1033 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 1034 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 1035 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 1036 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1037 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1038 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1039 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1040 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 1041 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 1042 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 1043 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 1044 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 1045 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 1046 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 1047 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 1048 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 1049 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 1050 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 1051 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 1052 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 1053 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 1054 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 1055 struct sli4_wcqe_xri_aborted *, int); 1056 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 1057 struct sli4_wcqe_xri_aborted *axri, int idx); 1058 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 1059 struct sli4_wcqe_xri_aborted *axri); 1060 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 1061 struct sli4_wcqe_xri_aborted *); 1062 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 1063 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 1064 int lpfc_sli4_brdreset(struct lpfc_hba *); 1065 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 1066 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 1067 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 1068 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 1069 int lpfc_sli4_init_vpi(struct lpfc_vport *); 1070 void lpfc_sli4_eq_clr_intr(struct lpfc_queue *); 1071 void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1072 uint32_t count, bool arm); 1073 void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1074 uint32_t count, bool arm); 1075 void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q); 1076 void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1077 uint32_t count, bool arm); 1078 void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1079 uint32_t count, bool arm); 1080 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 1081 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 1082 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 1083 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 1084 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1085 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1086 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1087 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 1088 int lpfc_sli4_post_status_check(struct lpfc_hba *); 1089 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1090 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1091 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba); 1092 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx) 1093 { 1094 return q->q_pgs[idx / q->entry_cnt_per_pg] + 1095 (q->entry_size * (idx % q->entry_cnt_per_pg)); 1096 } 1097