1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 24 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 25 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 26 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 27 #define LPFC_RPI_LOW_WATER_MARK 10 28 29 #define LPFC_UNREG_FCF 1 30 #define LPFC_SKIP_UNREG_FCF 0 31 32 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 33 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 34 35 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 36 #define LPFC_NEMBED_MBOX_SGL_CNT 254 37 38 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 39 #define LPFC_HBA_IO_CHAN_MIN 0 40 #define LPFC_HBA_IO_CHAN_MAX 32 41 #define LPFC_FCP_IO_CHAN_DEF 4 42 #define LPFC_NVME_IO_CHAN_DEF 0 43 44 /* Number of channels used for Flash Optimized Fabric (FOF) operations */ 45 46 #define LPFC_FOF_IO_CHAN_NUM 1 47 48 /* 49 * Provide the default FCF Record attributes used by the driver 50 * when nonFIP mode is configured and there is no other default 51 * FCF Record attributes. 52 */ 53 #define LPFC_FCOE_FCF_DEF_INDEX 0 54 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 55 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 56 57 #define LPFC_FCOE_NULL_VID 0xFFF 58 #define LPFC_FCOE_IGNORE_VID 0xFFFF 59 60 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 61 #define LPFC_FCOE_FCF_MAC3 0xFF 62 #define LPFC_FCOE_FCF_MAC4 0xFF 63 #define LPFC_FCOE_FCF_MAC5 0xFE 64 #define LPFC_FCOE_FCF_MAP0 0x0E 65 #define LPFC_FCOE_FCF_MAP1 0xFC 66 #define LPFC_FCOE_FCF_MAP2 0x00 67 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 68 #define LPFC_FCOE_FKA_ADV_PER 0 69 #define LPFC_FCOE_FIP_PRIORITY 0x80 70 71 #define sli4_sid_from_fc_hdr(fc_hdr) \ 72 ((fc_hdr)->fh_s_id[0] << 16 | \ 73 (fc_hdr)->fh_s_id[1] << 8 | \ 74 (fc_hdr)->fh_s_id[2]) 75 76 #define sli4_did_from_fc_hdr(fc_hdr) \ 77 ((fc_hdr)->fh_d_id[0] << 16 | \ 78 (fc_hdr)->fh_d_id[1] << 8 | \ 79 (fc_hdr)->fh_d_id[2]) 80 81 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 82 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 83 (fc_hdr)->fh_f_ctl[1] << 8 | \ 84 (fc_hdr)->fh_f_ctl[2]) 85 86 #define sli4_type_from_fc_hdr(fc_hdr) \ 87 ((fc_hdr)->fh_type) 88 89 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 90 91 #define INT_FW_UPGRADE 0 92 #define RUN_FW_UPGRADE 1 93 94 enum lpfc_sli4_queue_type { 95 LPFC_EQ, 96 LPFC_GCQ, 97 LPFC_MCQ, 98 LPFC_WCQ, 99 LPFC_RCQ, 100 LPFC_MQ, 101 LPFC_WQ, 102 LPFC_HRQ, 103 LPFC_DRQ 104 }; 105 106 /* The queue sub-type defines the functional purpose of the queue */ 107 enum lpfc_sli4_queue_subtype { 108 LPFC_NONE, 109 LPFC_MBOX, 110 LPFC_FCP, 111 LPFC_ELS, 112 LPFC_NVME, 113 LPFC_NVMET, 114 LPFC_NVME_LS, 115 LPFC_USOL 116 }; 117 118 union sli4_qe { 119 void *address; 120 struct lpfc_eqe *eqe; 121 struct lpfc_cqe *cqe; 122 struct lpfc_mcqe *mcqe; 123 struct lpfc_wcqe_complete *wcqe_complete; 124 struct lpfc_wcqe_release *wcqe_release; 125 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted; 126 struct lpfc_rcqe_complete *rcqe_complete; 127 struct lpfc_mqe *mqe; 128 union lpfc_wqe *wqe; 129 union lpfc_wqe128 *wqe128; 130 struct lpfc_rqe *rqe; 131 }; 132 133 /* RQ buffer list */ 134 struct lpfc_rqb { 135 uint16_t entry_count; /* Current number of RQ slots */ 136 uint16_t buffer_count; /* Current number of buffers posted */ 137 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 138 /* Callback for HBQ buffer allocation */ 139 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 140 /* Callback for HBQ buffer free */ 141 void (*rqb_free_buffer)(struct lpfc_hba *, 142 struct rqb_dmabuf *); 143 }; 144 145 struct lpfc_queue { 146 struct list_head list; 147 struct list_head wq_list; 148 enum lpfc_sli4_queue_type type; 149 enum lpfc_sli4_queue_subtype subtype; 150 struct lpfc_hba *phba; 151 struct list_head child_list; 152 struct list_head page_list; 153 struct list_head sgl_list; 154 uint32_t entry_count; /* Number of entries to support on the queue */ 155 uint32_t entry_size; /* Size of each queue entry. */ 156 uint32_t entry_repost; /* Count of entries before doorbell is rung */ 157 #define LPFC_EQ_REPOST 8 158 #define LPFC_MQ_REPOST 8 159 #define LPFC_CQ_REPOST 64 160 #define LPFC_RQ_REPOST 64 161 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 /* For WQs */ 162 uint32_t queue_id; /* Queue ID assigned by the hardware */ 163 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 164 uint32_t host_index; /* The host's index for putting or getting */ 165 uint32_t hba_index; /* The last known hba index for get or put */ 166 167 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 168 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 169 170 uint32_t q_mode; 171 uint16_t page_count; /* Number of pages allocated for this queue */ 172 uint16_t page_size; /* size of page allocated for this queue */ 173 #define LPFC_EXPANDED_PAGE_SIZE 16384 174 #define LPFC_DEFAULT_PAGE_SIZE 4096 175 uint16_t chann; /* IO channel this queue is associated with */ 176 uint16_t db_format; 177 #define LPFC_DB_RING_FORMAT 0x01 178 #define LPFC_DB_LIST_FORMAT 0x02 179 void __iomem *db_regaddr; 180 /* For q stats */ 181 uint32_t q_cnt_1; 182 uint32_t q_cnt_2; 183 uint32_t q_cnt_3; 184 uint64_t q_cnt_4; 185 /* defines for EQ stats */ 186 #define EQ_max_eqe q_cnt_1 187 #define EQ_no_entry q_cnt_2 188 #define EQ_cqe_cnt q_cnt_3 189 #define EQ_processed q_cnt_4 190 191 /* defines for CQ stats */ 192 #define CQ_mbox q_cnt_1 193 #define CQ_max_cqe q_cnt_1 194 #define CQ_release_wqe q_cnt_2 195 #define CQ_xri_aborted q_cnt_3 196 #define CQ_wq q_cnt_4 197 198 /* defines for WQ stats */ 199 #define WQ_overflow q_cnt_1 200 #define WQ_posted q_cnt_4 201 202 /* defines for RQ stats */ 203 #define RQ_no_posted_buf q_cnt_1 204 #define RQ_no_buf_found q_cnt_2 205 #define RQ_buf_posted q_cnt_3 206 #define RQ_rcv_buf q_cnt_4 207 208 struct work_struct irqwork; 209 struct work_struct spwork; 210 211 uint64_t isr_timestamp; 212 struct lpfc_queue *assoc_qp; 213 union sli4_qe qe[1]; /* array to index entries (must be last) */ 214 }; 215 216 struct lpfc_sli4_link { 217 uint16_t speed; 218 uint8_t duplex; 219 uint8_t status; 220 uint8_t type; 221 uint8_t number; 222 uint8_t fault; 223 uint16_t logical_speed; 224 uint16_t topology; 225 }; 226 227 struct lpfc_fcf_rec { 228 uint8_t fabric_name[8]; 229 uint8_t switch_name[8]; 230 uint8_t mac_addr[6]; 231 uint16_t fcf_indx; 232 uint32_t priority; 233 uint16_t vlan_id; 234 uint32_t addr_mode; 235 uint32_t flag; 236 #define BOOT_ENABLE 0x01 237 #define RECORD_VALID 0x02 238 }; 239 240 struct lpfc_fcf_pri_rec { 241 uint16_t fcf_index; 242 #define LPFC_FCF_ON_PRI_LIST 0x0001 243 #define LPFC_FCF_FLOGI_FAILED 0x0002 244 uint16_t flag; 245 uint32_t priority; 246 }; 247 248 struct lpfc_fcf_pri { 249 struct list_head list; 250 struct lpfc_fcf_pri_rec fcf_rec; 251 }; 252 253 /* 254 * Maximum FCF table index, it is for driver internal book keeping, it 255 * just needs to be no less than the supported HBA's FCF table size. 256 */ 257 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 258 259 struct lpfc_fcf { 260 uint16_t fcfi; 261 uint32_t fcf_flag; 262 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 263 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 264 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 265 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 266 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 267 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 268 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 269 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 270 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 271 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 272 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 273 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 274 uint32_t addr_mode; 275 uint32_t eligible_fcf_cnt; 276 struct lpfc_fcf_rec current_rec; 277 struct lpfc_fcf_rec failover_rec; 278 struct list_head fcf_pri_list; 279 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 280 uint32_t current_fcf_scan_pri; 281 struct timer_list redisc_wait; 282 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 283 }; 284 285 286 #define LPFC_REGION23_SIGNATURE "RG23" 287 #define LPFC_REGION23_VERSION 1 288 #define LPFC_REGION23_LAST_REC 0xff 289 #define DRIVER_SPECIFIC_TYPE 0xA2 290 #define LINUX_DRIVER_ID 0x20 291 #define PORT_STE_TYPE 0x1 292 293 struct lpfc_fip_param_hdr { 294 uint8_t type; 295 #define FCOE_PARAM_TYPE 0xA0 296 uint8_t length; 297 #define FCOE_PARAM_LENGTH 2 298 uint8_t parm_version; 299 #define FIPP_VERSION 0x01 300 uint8_t parm_flags; 301 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 302 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 303 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 304 #define FIPP_MODE_ON 0x1 305 #define FIPP_MODE_OFF 0x0 306 #define FIPP_VLAN_VALID 0x1 307 }; 308 309 struct lpfc_fcoe_params { 310 uint8_t fc_map[3]; 311 uint8_t reserved1; 312 uint16_t vlan_tag; 313 uint8_t reserved[2]; 314 }; 315 316 struct lpfc_fcf_conn_hdr { 317 uint8_t type; 318 #define FCOE_CONN_TBL_TYPE 0xA1 319 uint8_t length; /* words */ 320 uint8_t reserved[2]; 321 }; 322 323 struct lpfc_fcf_conn_rec { 324 uint16_t flags; 325 #define FCFCNCT_VALID 0x0001 326 #define FCFCNCT_BOOT 0x0002 327 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 328 #define FCFCNCT_FBNM_VALID 0x0008 329 #define FCFCNCT_SWNM_VALID 0x0010 330 #define FCFCNCT_VLAN_VALID 0x0020 331 #define FCFCNCT_AM_VALID 0x0040 332 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 333 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 334 335 uint16_t vlan_tag; 336 uint8_t fabric_name[8]; 337 uint8_t switch_name[8]; 338 }; 339 340 struct lpfc_fcf_conn_entry { 341 struct list_head list; 342 struct lpfc_fcf_conn_rec conn_rec; 343 }; 344 345 /* 346 * Define the host's bootstrap mailbox. This structure contains 347 * the member attributes needed to create, use, and destroy the 348 * bootstrap mailbox region. 349 * 350 * The macro definitions for the bmbx data structure are defined 351 * in lpfc_hw4.h with the register definition. 352 */ 353 struct lpfc_bmbx { 354 struct lpfc_dmabuf *dmabuf; 355 struct dma_address dma_address; 356 void *avirt; 357 dma_addr_t aphys; 358 uint32_t bmbx_size; 359 }; 360 361 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 362 363 #define LPFC_EQE_SIZE_4B 4 364 #define LPFC_EQE_SIZE_16B 16 365 #define LPFC_CQE_SIZE 16 366 #define LPFC_WQE_SIZE 64 367 #define LPFC_WQE128_SIZE 128 368 #define LPFC_MQE_SIZE 256 369 #define LPFC_RQE_SIZE 8 370 371 #define LPFC_EQE_DEF_COUNT 1024 372 #define LPFC_CQE_DEF_COUNT 1024 373 #define LPFC_CQE_EXP_COUNT 4096 374 #define LPFC_WQE_DEF_COUNT 256 375 #define LPFC_WQE_EXP_COUNT 1024 376 #define LPFC_MQE_DEF_COUNT 16 377 #define LPFC_RQE_DEF_COUNT 512 378 379 #define LPFC_QUEUE_NOARM false 380 #define LPFC_QUEUE_REARM true 381 382 383 /* 384 * SLI4 CT field defines 385 */ 386 #define SLI4_CT_RPI 0 387 #define SLI4_CT_VPI 1 388 #define SLI4_CT_VFI 2 389 #define SLI4_CT_FCFI 3 390 391 /* 392 * SLI4 specific data structures 393 */ 394 struct lpfc_max_cfg_param { 395 uint16_t max_xri; 396 uint16_t xri_base; 397 uint16_t xri_used; 398 uint16_t max_rpi; 399 uint16_t rpi_base; 400 uint16_t rpi_used; 401 uint16_t max_vpi; 402 uint16_t vpi_base; 403 uint16_t vpi_used; 404 uint16_t max_vfi; 405 uint16_t vfi_base; 406 uint16_t vfi_used; 407 uint16_t max_fcfi; 408 uint16_t fcfi_used; 409 uint16_t max_eq; 410 uint16_t max_rq; 411 uint16_t max_cq; 412 uint16_t max_wq; 413 }; 414 415 struct lpfc_hba; 416 /* SLI4 HBA multi-fcp queue handler struct */ 417 #define LPFC_SLI4_HANDLER_NAME_SZ 16 418 struct lpfc_hba_eq_hdl { 419 uint32_t idx; 420 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 421 struct lpfc_hba *phba; 422 atomic_t hba_eq_in_use; 423 struct cpumask *cpumask; 424 /* CPU affinitsed to or 0xffffffff if multiple */ 425 uint32_t cpu; 426 #define LPFC_MULTI_CPU_AFFINITY 0xffffffff 427 }; 428 429 /*BB Credit recovery value*/ 430 struct lpfc_bbscn_params { 431 uint32_t word0; 432 #define lpfc_bbscn_min_SHIFT 0 433 #define lpfc_bbscn_min_MASK 0x0000000F 434 #define lpfc_bbscn_min_WORD word0 435 #define lpfc_bbscn_max_SHIFT 4 436 #define lpfc_bbscn_max_MASK 0x0000000F 437 #define lpfc_bbscn_max_WORD word0 438 #define lpfc_bbscn_def_SHIFT 8 439 #define lpfc_bbscn_def_MASK 0x0000000F 440 #define lpfc_bbscn_def_WORD word0 441 }; 442 443 /* Port Capabilities for SLI4 Parameters */ 444 struct lpfc_pc_sli4_params { 445 uint32_t supported; 446 uint32_t if_type; 447 uint32_t sli_rev; 448 uint32_t sli_family; 449 uint32_t featurelevel_1; 450 uint32_t featurelevel_2; 451 uint32_t proto_types; 452 #define LPFC_SLI4_PROTO_FCOE 0x0000001 453 #define LPFC_SLI4_PROTO_FC 0x0000002 454 #define LPFC_SLI4_PROTO_NIC 0x0000004 455 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 456 #define LPFC_SLI4_PROTO_RDMA 0x0000010 457 uint32_t sge_supp_len; 458 uint32_t if_page_sz; 459 uint32_t rq_db_window; 460 uint32_t loopbk_scope; 461 uint32_t oas_supported; 462 uint32_t eq_pages_max; 463 uint32_t eqe_size; 464 uint32_t cq_pages_max; 465 uint32_t cqe_size; 466 uint32_t mq_pages_max; 467 uint32_t mqe_size; 468 uint32_t mq_elem_cnt; 469 uint32_t wq_pages_max; 470 uint32_t wqe_size; 471 uint32_t rq_pages_max; 472 uint32_t rqe_size; 473 uint32_t hdr_pages_max; 474 uint32_t hdr_size; 475 uint32_t hdr_pp_align; 476 uint32_t sgl_pages_max; 477 uint32_t sgl_pp_align; 478 uint8_t cqv; 479 uint8_t mqv; 480 uint8_t wqv; 481 uint8_t rqv; 482 uint8_t wqsize; 483 #define LPFC_WQ_SZ64_SUPPORT 1 484 #define LPFC_WQ_SZ128_SUPPORT 2 485 uint8_t wqpcnt; 486 }; 487 488 struct lpfc_iov { 489 uint32_t pf_number; 490 uint32_t vf_number; 491 }; 492 493 struct lpfc_sli4_lnk_info { 494 uint8_t lnk_dv; 495 #define LPFC_LNK_DAT_INVAL 0 496 #define LPFC_LNK_DAT_VAL 1 497 uint8_t lnk_tp; 498 #define LPFC_LNK_GE 0x0 /* FCoE */ 499 #define LPFC_LNK_FC 0x1 /* FC */ 500 uint8_t lnk_no; 501 uint8_t optic_state; 502 }; 503 504 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 505 LPFC_FOF_IO_CHAN_NUM) 506 507 /* Used for IRQ vector to CPU mapping */ 508 struct lpfc_vector_map_info { 509 uint16_t phys_id; 510 uint16_t core_id; 511 uint16_t irq; 512 uint16_t channel_id; 513 }; 514 #define LPFC_VECTOR_MAP_EMPTY 0xffff 515 516 /* SLI4 HBA data structure entries */ 517 struct lpfc_sli4_hba { 518 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 519 PCI BAR0, config space registers */ 520 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 521 PCI BAR1, control registers */ 522 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 523 PCI BAR2, doorbell registers */ 524 union { 525 struct { 526 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 527 void __iomem *UERRLOregaddr; 528 void __iomem *UERRHIregaddr; 529 void __iomem *UEMASKLOregaddr; 530 void __iomem *UEMASKHIregaddr; 531 } if_type0; 532 struct { 533 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 534 void __iomem *STATUSregaddr; 535 void __iomem *CTRLregaddr; 536 void __iomem *ERR1regaddr; 537 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 538 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 539 void __iomem *ERR2regaddr; 540 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 541 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 542 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 543 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 544 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 545 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 546 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 547 void __iomem *EQDregaddr; 548 } if_type2; 549 } u; 550 551 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 552 void __iomem *PSMPHRregaddr; 553 554 /* Well-known SLI INTF register memory map. */ 555 void __iomem *SLIINTFregaddr; 556 557 /* IF type 0, BAR 1 function CSR register memory map */ 558 void __iomem *ISRregaddr; /* HST_ISR register */ 559 void __iomem *IMRregaddr; /* HST_IMR register */ 560 void __iomem *ISCRregaddr; /* HST_ISCR register */ 561 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 562 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 563 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 564 void __iomem *EQCQDBregaddr; /* EQCQ_DOORBELL register */ 565 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 566 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 567 568 uint32_t ue_mask_lo; 569 uint32_t ue_mask_hi; 570 uint32_t ue_to_sr; 571 uint32_t ue_to_rp; 572 struct lpfc_register sli_intf; 573 struct lpfc_pc_sli4_params pc_sli4_params; 574 struct lpfc_bbscn_params bbscn_params; 575 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 576 577 /* Pointers to the constructed SLI4 queues */ 578 struct lpfc_queue **hba_eq; /* Event queues for HBA */ 579 struct lpfc_queue **fcp_cq; /* Fast-path FCP compl queue */ 580 struct lpfc_queue **nvme_cq; /* Fast-path NVME compl queue */ 581 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 582 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 583 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 584 struct lpfc_queue **fcp_wq; /* Fast-path FCP work queue */ 585 struct lpfc_queue **nvme_wq; /* Fast-path NVME work queue */ 586 uint16_t *fcp_cq_map; 587 uint16_t *nvme_cq_map; 588 struct list_head lpfc_wq_list; 589 590 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 591 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 592 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 593 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 594 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 595 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 596 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 597 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 598 599 struct lpfc_name wwnn; 600 struct lpfc_name wwpn; 601 602 uint32_t fw_func_mode; /* FW function protocol mode */ 603 uint32_t ulp0_mode; /* ULP0 protocol mode */ 604 uint32_t ulp1_mode; /* ULP1 protocol mode */ 605 606 struct lpfc_queue *fof_eq; /* Flash Optimized Fabric Event queue */ 607 608 /* Optimized Access Storage specific queues/structures */ 609 610 struct lpfc_queue *oas_cq; /* OAS completion queue */ 611 struct lpfc_queue *oas_wq; /* OAS Work queue */ 612 struct lpfc_sli_ring *oas_ring; 613 uint64_t oas_next_lun; 614 uint8_t oas_next_tgt_wwpn[8]; 615 uint8_t oas_next_vpt_wwpn[8]; 616 617 /* Setup information for various queue parameters */ 618 int eq_esize; 619 int eq_ecount; 620 int cq_esize; 621 int cq_ecount; 622 int wq_esize; 623 int wq_ecount; 624 int mq_esize; 625 int mq_ecount; 626 int rq_esize; 627 int rq_ecount; 628 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 629 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 630 631 uint32_t intr_enable; 632 struct lpfc_bmbx bmbx; 633 struct lpfc_max_cfg_param max_cfg_param; 634 uint16_t extents_in_use; /* must allocate resource extents. */ 635 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 636 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 637 uint16_t next_rpi; 638 uint16_t nvme_xri_max; 639 uint16_t nvme_xri_cnt; 640 uint16_t nvme_xri_start; 641 uint16_t scsi_xri_max; 642 uint16_t scsi_xri_cnt; 643 uint16_t scsi_xri_start; 644 uint16_t els_xri_cnt; 645 uint16_t nvmet_xri_cnt; 646 uint16_t nvmet_io_wait_cnt; 647 uint16_t nvmet_io_wait_total; 648 struct list_head lpfc_els_sgl_list; 649 struct list_head lpfc_abts_els_sgl_list; 650 struct list_head lpfc_nvmet_sgl_list; 651 struct list_head lpfc_abts_nvmet_ctx_list; 652 struct list_head lpfc_abts_scsi_buf_list; 653 struct list_head lpfc_abts_nvme_buf_list; 654 struct list_head lpfc_nvmet_io_wait_list; 655 struct lpfc_nvmet_ctx_info *nvmet_ctx_info; 656 struct lpfc_sglq **lpfc_sglq_active_list; 657 struct list_head lpfc_rpi_hdr_list; 658 unsigned long *rpi_bmask; 659 uint16_t *rpi_ids; 660 uint16_t rpi_count; 661 struct list_head lpfc_rpi_blk_list; 662 unsigned long *xri_bmask; 663 uint16_t *xri_ids; 664 struct list_head lpfc_xri_blk_list; 665 unsigned long *vfi_bmask; 666 uint16_t *vfi_ids; 667 uint16_t vfi_count; 668 struct list_head lpfc_vfi_blk_list; 669 struct lpfc_sli4_flags sli4_flags; 670 struct list_head sp_queue_event; 671 struct list_head sp_cqe_event_pool; 672 struct list_head sp_asynce_work_queue; 673 struct list_head sp_fcp_xri_aborted_work_queue; 674 struct list_head sp_els_xri_aborted_work_queue; 675 struct list_head sp_unsol_work_queue; 676 struct lpfc_sli4_link link_state; 677 struct lpfc_sli4_lnk_info lnk_info; 678 uint32_t pport_name_sta; 679 #define LPFC_SLI4_PPNAME_NON 0 680 #define LPFC_SLI4_PPNAME_GET 1 681 struct lpfc_iov iov; 682 spinlock_t abts_nvme_buf_list_lock; /* list of aborted SCSI IOs */ 683 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 684 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 685 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 686 uint32_t physical_port; 687 688 /* CPU to vector mapping information */ 689 struct lpfc_vector_map_info *cpu_map; 690 uint16_t num_online_cpu; 691 uint16_t num_present_cpu; 692 uint16_t curr_disp_cpu; 693 }; 694 695 enum lpfc_sge_type { 696 GEN_BUFF_TYPE, 697 SCSI_BUFF_TYPE, 698 NVMET_BUFF_TYPE 699 }; 700 701 enum lpfc_sgl_state { 702 SGL_FREED, 703 SGL_ALLOCATED, 704 SGL_XRI_ABORTED 705 }; 706 707 struct lpfc_sglq { 708 /* lpfc_sglqs are used in double linked lists */ 709 struct list_head list; 710 struct list_head clist; 711 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 712 enum lpfc_sgl_state state; 713 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 714 uint16_t iotag; /* pre-assigned IO tag */ 715 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 716 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 717 struct sli4_sge *sgl; /* pre-assigned SGL */ 718 void *virt; /* virtual address. */ 719 dma_addr_t phys; /* physical address */ 720 }; 721 722 struct lpfc_rpi_hdr { 723 struct list_head list; 724 uint32_t len; 725 struct lpfc_dmabuf *dmabuf; 726 uint32_t page_count; 727 uint32_t start_rpi; 728 uint16_t next_rpi; 729 }; 730 731 struct lpfc_rsrc_blks { 732 struct list_head list; 733 uint16_t rsrc_start; 734 uint16_t rsrc_size; 735 uint16_t rsrc_used; 736 }; 737 738 struct lpfc_rdp_context { 739 struct lpfc_nodelist *ndlp; 740 uint16_t ox_id; 741 uint16_t rx_id; 742 READ_LNK_VAR link_stat; 743 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 744 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 745 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 746 }; 747 748 struct lpfc_lcb_context { 749 uint8_t sub_command; 750 uint8_t type; 751 uint8_t frequency; 752 uint16_t ox_id; 753 uint16_t rx_id; 754 struct lpfc_nodelist *ndlp; 755 }; 756 757 758 /* 759 * SLI4 specific function prototypes 760 */ 761 int lpfc_pci_function_reset(struct lpfc_hba *); 762 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 763 int lpfc_sli4_hba_setup(struct lpfc_hba *); 764 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 765 uint8_t, uint32_t, bool); 766 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 767 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 768 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 769 struct lpfc_mbx_sge *); 770 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 771 uint16_t); 772 773 void lpfc_sli4_hba_reset(struct lpfc_hba *); 774 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t, 775 uint32_t, uint32_t); 776 void lpfc_sli4_queue_free(struct lpfc_queue *); 777 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 778 int lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 779 uint32_t numq, uint32_t imax); 780 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 781 struct lpfc_queue *, uint32_t, uint32_t); 782 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 783 struct lpfc_queue **eqp, uint32_t type, 784 uint32_t subtype); 785 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 786 struct lpfc_queue *, uint32_t); 787 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 788 struct lpfc_queue *, uint32_t); 789 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 790 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 791 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 792 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 793 uint32_t subtype); 794 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 795 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 796 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 797 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 798 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 799 struct lpfc_queue *); 800 int lpfc_sli4_queue_setup(struct lpfc_hba *); 801 void lpfc_sli4_queue_unset(struct lpfc_hba *); 802 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 803 int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *); 804 int lpfc_repost_nvme_sgl_list(struct lpfc_hba *phba); 805 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 806 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 807 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 808 int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int); 809 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 810 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 811 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 812 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 813 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 814 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 815 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 816 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 817 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 818 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 819 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 820 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 821 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 822 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 823 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 824 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 825 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 826 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 827 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 828 struct sli4_wcqe_xri_aborted *); 829 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 830 struct sli4_wcqe_xri_aborted *axri); 831 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 832 struct sli4_wcqe_xri_aborted *axri); 833 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 834 struct sli4_wcqe_xri_aborted *); 835 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 836 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 837 int lpfc_sli4_brdreset(struct lpfc_hba *); 838 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 839 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 840 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 841 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 842 int lpfc_sli4_init_vpi(struct lpfc_vport *); 843 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool); 844 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool); 845 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 846 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 847 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 848 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 849 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 850 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 851 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 852 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 853 int lpfc_sli4_post_status_check(struct lpfc_hba *); 854 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 855 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 856