1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2005 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22 #include <linux/blkdev.h> 23 #include <linux/pci.h> 24 #include <linux/interrupt.h> 25 #include <linux/delay.h> 26 27 #include <scsi/scsi.h> 28 #include <scsi/scsi_cmnd.h> 29 #include <scsi/scsi_device.h> 30 #include <scsi/scsi_host.h> 31 #include <scsi/scsi_transport_fc.h> 32 33 #include "lpfc_hw.h" 34 #include "lpfc_sli.h" 35 #include "lpfc_disc.h" 36 #include "lpfc_scsi.h" 37 #include "lpfc.h" 38 #include "lpfc_crtn.h" 39 #include "lpfc_logmsg.h" 40 #include "lpfc_compat.h" 41 42 /* 43 * Define macro to log: Mailbox command x%x cannot issue Data 44 * This allows multiple uses of lpfc_msgBlk0311 45 * w/o perturbing log msg utility. 46 */ 47 #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \ 48 lpfc_printf_log(phba, \ 49 KERN_INFO, \ 50 LOG_MBOX | LOG_SLI, \ 51 "%d:0311 Mailbox command x%x cannot issue " \ 52 "Data: x%x x%x x%x\n", \ 53 phba->brd_no, \ 54 mb->mbxCommand, \ 55 phba->hba_state, \ 56 psli->sli_flag, \ 57 flag); 58 59 60 /* There are only four IOCB completion types. */ 61 typedef enum _lpfc_iocb_type { 62 LPFC_UNKNOWN_IOCB, 63 LPFC_UNSOL_IOCB, 64 LPFC_SOL_IOCB, 65 LPFC_ABORT_IOCB 66 } lpfc_iocb_type; 67 68 struct lpfc_iocbq * 69 lpfc_sli_get_iocbq(struct lpfc_hba * phba) 70 { 71 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list; 72 struct lpfc_iocbq * iocbq = NULL; 73 74 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list); 75 return iocbq; 76 } 77 78 void 79 lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq) 80 { 81 size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb); 82 83 /* 84 * Clean all volatile data fields, preserve iotag and node struct. 85 */ 86 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean); 87 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list); 88 } 89 90 /* 91 * Translate the iocb command to an iocb command type used to decide the final 92 * disposition of each completed IOCB. 93 */ 94 static lpfc_iocb_type 95 lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd) 96 { 97 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB; 98 99 if (iocb_cmnd > CMD_MAX_IOCB_CMD) 100 return 0; 101 102 switch (iocb_cmnd) { 103 case CMD_XMIT_SEQUENCE_CR: 104 case CMD_XMIT_SEQUENCE_CX: 105 case CMD_XMIT_BCAST_CN: 106 case CMD_XMIT_BCAST_CX: 107 case CMD_ELS_REQUEST_CR: 108 case CMD_ELS_REQUEST_CX: 109 case CMD_CREATE_XRI_CR: 110 case CMD_CREATE_XRI_CX: 111 case CMD_GET_RPI_CN: 112 case CMD_XMIT_ELS_RSP_CX: 113 case CMD_GET_RPI_CR: 114 case CMD_FCP_IWRITE_CR: 115 case CMD_FCP_IWRITE_CX: 116 case CMD_FCP_IREAD_CR: 117 case CMD_FCP_IREAD_CX: 118 case CMD_FCP_ICMND_CR: 119 case CMD_FCP_ICMND_CX: 120 case CMD_ADAPTER_MSG: 121 case CMD_ADAPTER_DUMP: 122 case CMD_XMIT_SEQUENCE64_CR: 123 case CMD_XMIT_SEQUENCE64_CX: 124 case CMD_XMIT_BCAST64_CN: 125 case CMD_XMIT_BCAST64_CX: 126 case CMD_ELS_REQUEST64_CR: 127 case CMD_ELS_REQUEST64_CX: 128 case CMD_FCP_IWRITE64_CR: 129 case CMD_FCP_IWRITE64_CX: 130 case CMD_FCP_IREAD64_CR: 131 case CMD_FCP_IREAD64_CX: 132 case CMD_FCP_ICMND64_CR: 133 case CMD_FCP_ICMND64_CX: 134 case CMD_GEN_REQUEST64_CR: 135 case CMD_GEN_REQUEST64_CX: 136 case CMD_XMIT_ELS_RSP64_CX: 137 type = LPFC_SOL_IOCB; 138 break; 139 case CMD_ABORT_XRI_CN: 140 case CMD_ABORT_XRI_CX: 141 case CMD_CLOSE_XRI_CN: 142 case CMD_CLOSE_XRI_CX: 143 case CMD_XRI_ABORTED_CX: 144 case CMD_ABORT_MXRI64_CN: 145 type = LPFC_ABORT_IOCB; 146 break; 147 case CMD_RCV_SEQUENCE_CX: 148 case CMD_RCV_ELS_REQ_CX: 149 case CMD_RCV_SEQUENCE64_CX: 150 case CMD_RCV_ELS_REQ64_CX: 151 type = LPFC_UNSOL_IOCB; 152 break; 153 default: 154 type = LPFC_UNKNOWN_IOCB; 155 break; 156 } 157 158 return type; 159 } 160 161 static int 162 lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb) 163 { 164 struct lpfc_sli *psli = &phba->sli; 165 MAILBOX_t *pmbox = &pmb->mb; 166 int i, rc; 167 168 for (i = 0; i < psli->num_rings; i++) { 169 phba->hba_state = LPFC_INIT_MBX_CMDS; 170 lpfc_config_ring(phba, i, pmb); 171 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 172 if (rc != MBX_SUCCESS) { 173 lpfc_printf_log(phba, 174 KERN_ERR, 175 LOG_INIT, 176 "%d:0446 Adapter failed to init, " 177 "mbxCmd x%x CFG_RING, mbxStatus x%x, " 178 "ring %d\n", 179 phba->brd_no, 180 pmbox->mbxCommand, 181 pmbox->mbxStatus, 182 i); 183 phba->hba_state = LPFC_HBA_ERROR; 184 return -ENXIO; 185 } 186 } 187 return 0; 188 } 189 190 static int 191 lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba, 192 struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb) 193 { 194 uint16_t iotag; 195 196 list_add_tail(&piocb->list, &pring->txcmplq); 197 pring->txcmplq_cnt++; 198 if (unlikely(pring->ringno == LPFC_ELS_RING)) 199 mod_timer(&phba->els_tmofunc, 200 jiffies + HZ * (phba->fc_ratov << 1)); 201 202 if (pring->fast_lookup) { 203 /* Setup fast lookup based on iotag for completion */ 204 iotag = piocb->iocb.ulpIoTag; 205 if (iotag && (iotag < pring->fast_iotag)) 206 *(pring->fast_lookup + iotag) = piocb; 207 else { 208 209 /* Cmd ring <ringno> put: iotag <iotag> greater then 210 configured max <fast_iotag> wd0 <icmd> */ 211 lpfc_printf_log(phba, 212 KERN_ERR, 213 LOG_SLI, 214 "%d:0316 Cmd ring %d put: iotag x%x " 215 "greater then configured max x%x " 216 "wd0 x%x\n", 217 phba->brd_no, 218 pring->ringno, iotag, 219 pring->fast_iotag, 220 *(((uint32_t *)(&piocb->iocb)) + 7)); 221 } 222 } 223 return (0); 224 } 225 226 static struct lpfc_iocbq * 227 lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring) 228 { 229 struct list_head *dlp; 230 struct lpfc_iocbq *cmd_iocb; 231 232 dlp = &pring->txq; 233 cmd_iocb = NULL; 234 list_remove_head((&pring->txq), cmd_iocb, 235 struct lpfc_iocbq, 236 list); 237 if (cmd_iocb) { 238 /* If the first ptr is not equal to the list header, 239 * deque the IOCBQ_t and return it. 240 */ 241 pring->txq_cnt--; 242 } 243 return (cmd_iocb); 244 } 245 246 static IOCB_t * 247 lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring) 248 { 249 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno]; 250 uint32_t max_cmd_idx = pring->numCiocb; 251 IOCB_t *iocb = NULL; 252 253 if ((pring->next_cmdidx == pring->cmdidx) && 254 (++pring->next_cmdidx >= max_cmd_idx)) 255 pring->next_cmdidx = 0; 256 257 if (unlikely(pring->local_getidx == pring->next_cmdidx)) { 258 259 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx); 260 261 if (unlikely(pring->local_getidx >= max_cmd_idx)) { 262 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 263 "%d:0315 Ring %d issue: portCmdGet %d " 264 "is bigger then cmd ring %d\n", 265 phba->brd_no, pring->ringno, 266 pring->local_getidx, max_cmd_idx); 267 268 phba->hba_state = LPFC_HBA_ERROR; 269 /* 270 * All error attention handlers are posted to 271 * worker thread 272 */ 273 phba->work_ha |= HA_ERATT; 274 phba->work_hs = HS_FFER3; 275 if (phba->work_wait) 276 wake_up(phba->work_wait); 277 278 return NULL; 279 } 280 281 if (pring->local_getidx == pring->next_cmdidx) 282 return NULL; 283 } 284 285 iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx); 286 287 return iocb; 288 } 289 290 uint16_t 291 lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq) 292 { 293 struct lpfc_iocbq ** new_arr; 294 struct lpfc_iocbq ** old_arr; 295 size_t new_len; 296 struct lpfc_sli *psli = &phba->sli; 297 uint16_t iotag; 298 299 spin_lock_irq(phba->host->host_lock); 300 iotag = psli->last_iotag; 301 if(++iotag < psli->iocbq_lookup_len) { 302 psli->last_iotag = iotag; 303 psli->iocbq_lookup[iotag] = iocbq; 304 spin_unlock_irq(phba->host->host_lock); 305 iocbq->iotag = iotag; 306 return iotag; 307 } 308 else if (psli->iocbq_lookup_len < (0xffff 309 - LPFC_IOCBQ_LOOKUP_INCREMENT)) { 310 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT; 311 spin_unlock_irq(phba->host->host_lock); 312 new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *), 313 GFP_KERNEL); 314 if (new_arr) { 315 memset((char *)new_arr, 0, 316 new_len * sizeof (struct lpfc_iocbq *)); 317 spin_lock_irq(phba->host->host_lock); 318 old_arr = psli->iocbq_lookup; 319 if (new_len <= psli->iocbq_lookup_len) { 320 /* highly unprobable case */ 321 kfree(new_arr); 322 iotag = psli->last_iotag; 323 if(++iotag < psli->iocbq_lookup_len) { 324 psli->last_iotag = iotag; 325 psli->iocbq_lookup[iotag] = iocbq; 326 spin_unlock_irq(phba->host->host_lock); 327 iocbq->iotag = iotag; 328 return iotag; 329 } 330 spin_unlock_irq(phba->host->host_lock); 331 return 0; 332 } 333 if (psli->iocbq_lookup) 334 memcpy(new_arr, old_arr, 335 ((psli->last_iotag + 1) * 336 sizeof (struct lpfc_iocbq *))); 337 psli->iocbq_lookup = new_arr; 338 psli->iocbq_lookup_len = new_len; 339 psli->last_iotag = iotag; 340 psli->iocbq_lookup[iotag] = iocbq; 341 spin_unlock_irq(phba->host->host_lock); 342 iocbq->iotag = iotag; 343 kfree(old_arr); 344 return iotag; 345 } 346 } 347 348 lpfc_printf_log(phba, KERN_ERR,LOG_SLI, 349 "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n", 350 phba->brd_no, psli->last_iotag); 351 352 return 0; 353 } 354 355 static void 356 lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 357 IOCB_t *iocb, struct lpfc_iocbq *nextiocb) 358 { 359 /* 360 * Set up an iotag 361 */ 362 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0; 363 364 /* 365 * Issue iocb command to adapter 366 */ 367 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t)); 368 wmb(); 369 pring->stats.iocb_cmd++; 370 371 /* 372 * If there is no completion routine to call, we can release the 373 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF, 374 * that have no rsp ring completion, iocb_cmpl MUST be NULL. 375 */ 376 if (nextiocb->iocb_cmpl) 377 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb); 378 else 379 lpfc_sli_release_iocbq(phba, nextiocb); 380 381 /* 382 * Let the HBA know what IOCB slot will be the next one the 383 * driver will put a command into. 384 */ 385 pring->cmdidx = pring->next_cmdidx; 386 writel(pring->cmdidx, phba->MBslimaddr 387 + (SLIMOFF + (pring->ringno * 2)) * 4); 388 } 389 390 static void 391 lpfc_sli_update_full_ring(struct lpfc_hba * phba, 392 struct lpfc_sli_ring *pring) 393 { 394 int ringno = pring->ringno; 395 396 pring->flag |= LPFC_CALL_RING_AVAILABLE; 397 398 wmb(); 399 400 /* 401 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register. 402 * The HBA will tell us when an IOCB entry is available. 403 */ 404 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr); 405 readl(phba->CAregaddr); /* flush */ 406 407 pring->stats.iocb_cmd_full++; 408 } 409 410 static void 411 lpfc_sli_update_ring(struct lpfc_hba * phba, 412 struct lpfc_sli_ring *pring) 413 { 414 int ringno = pring->ringno; 415 416 /* 417 * Tell the HBA that there is work to do in this ring. 418 */ 419 wmb(); 420 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr); 421 readl(phba->CAregaddr); /* flush */ 422 } 423 424 static void 425 lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring) 426 { 427 IOCB_t *iocb; 428 struct lpfc_iocbq *nextiocb; 429 430 /* 431 * Check to see if: 432 * (a) there is anything on the txq to send 433 * (b) link is up 434 * (c) link attention events can be processed (fcp ring only) 435 * (d) IOCB processing is not blocked by the outstanding mbox command. 436 */ 437 if (pring->txq_cnt && 438 (phba->hba_state > LPFC_LINK_DOWN) && 439 (pring->ringno != phba->sli.fcp_ring || 440 phba->sli.sli_flag & LPFC_PROCESS_LA) && 441 !(pring->flag & LPFC_STOP_IOCB_MBX)) { 442 443 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) && 444 (nextiocb = lpfc_sli_ringtx_get(phba, pring))) 445 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb); 446 447 if (iocb) 448 lpfc_sli_update_ring(phba, pring); 449 else 450 lpfc_sli_update_full_ring(phba, pring); 451 } 452 453 return; 454 } 455 456 /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */ 457 static void 458 lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno) 459 { 460 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno]; 461 462 /* If the ring is active, flag it */ 463 if (phba->sli.ring[ringno].cmdringaddr) { 464 if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) { 465 phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX; 466 /* 467 * Force update of the local copy of cmdGetInx 468 */ 469 phba->sli.ring[ringno].local_getidx 470 = le32_to_cpu(pgp->cmdGetInx); 471 spin_lock_irq(phba->host->host_lock); 472 lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]); 473 spin_unlock_irq(phba->host->host_lock); 474 } 475 } 476 } 477 478 static int 479 lpfc_sli_chk_mbx_command(uint8_t mbxCommand) 480 { 481 uint8_t ret; 482 483 switch (mbxCommand) { 484 case MBX_LOAD_SM: 485 case MBX_READ_NV: 486 case MBX_WRITE_NV: 487 case MBX_RUN_BIU_DIAG: 488 case MBX_INIT_LINK: 489 case MBX_DOWN_LINK: 490 case MBX_CONFIG_LINK: 491 case MBX_CONFIG_RING: 492 case MBX_RESET_RING: 493 case MBX_READ_CONFIG: 494 case MBX_READ_RCONFIG: 495 case MBX_READ_SPARM: 496 case MBX_READ_STATUS: 497 case MBX_READ_RPI: 498 case MBX_READ_XRI: 499 case MBX_READ_REV: 500 case MBX_READ_LNK_STAT: 501 case MBX_REG_LOGIN: 502 case MBX_UNREG_LOGIN: 503 case MBX_READ_LA: 504 case MBX_CLEAR_LA: 505 case MBX_DUMP_MEMORY: 506 case MBX_DUMP_CONTEXT: 507 case MBX_RUN_DIAGS: 508 case MBX_RESTART: 509 case MBX_UPDATE_CFG: 510 case MBX_DOWN_LOAD: 511 case MBX_DEL_LD_ENTRY: 512 case MBX_RUN_PROGRAM: 513 case MBX_SET_MASK: 514 case MBX_SET_SLIM: 515 case MBX_UNREG_D_ID: 516 case MBX_CONFIG_FARP: 517 case MBX_LOAD_AREA: 518 case MBX_RUN_BIU_DIAG64: 519 case MBX_CONFIG_PORT: 520 case MBX_READ_SPARM64: 521 case MBX_READ_RPI64: 522 case MBX_REG_LOGIN64: 523 case MBX_READ_LA64: 524 case MBX_FLASH_WR_ULA: 525 case MBX_SET_DEBUG: 526 case MBX_LOAD_EXP_ROM: 527 ret = mbxCommand; 528 break; 529 default: 530 ret = MBX_SHUTDOWN; 531 break; 532 } 533 return (ret); 534 } 535 static void 536 lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 537 { 538 wait_queue_head_t *pdone_q; 539 540 /* 541 * If pdone_q is empty, the driver thread gave up waiting and 542 * continued running. 543 */ 544 pdone_q = (wait_queue_head_t *) pmboxq->context1; 545 if (pdone_q) 546 wake_up_interruptible(pdone_q); 547 return; 548 } 549 550 void 551 lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 552 { 553 struct lpfc_dmabuf *mp; 554 mp = (struct lpfc_dmabuf *) (pmb->context1); 555 if (mp) { 556 lpfc_mbuf_free(phba, mp->virt, mp->phys); 557 kfree(mp); 558 } 559 mempool_free( pmb, phba->mbox_mem_pool); 560 return; 561 } 562 563 int 564 lpfc_sli_handle_mb_event(struct lpfc_hba * phba) 565 { 566 MAILBOX_t *mbox; 567 MAILBOX_t *pmbox; 568 LPFC_MBOXQ_t *pmb; 569 struct lpfc_sli *psli; 570 int i, rc; 571 uint32_t process_next; 572 573 psli = &phba->sli; 574 /* We should only get here if we are in SLI2 mode */ 575 if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) { 576 return (1); 577 } 578 579 phba->sli.slistat.mbox_event++; 580 581 /* Get a Mailbox buffer to setup mailbox commands for callback */ 582 if ((pmb = phba->sli.mbox_active)) { 583 pmbox = &pmb->mb; 584 mbox = &phba->slim2p->mbx; 585 586 /* First check out the status word */ 587 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t)); 588 589 /* Sanity check to ensure the host owns the mailbox */ 590 if (pmbox->mbxOwner != OWN_HOST) { 591 /* Lets try for a while */ 592 for (i = 0; i < 10240; i++) { 593 /* First copy command data */ 594 lpfc_sli_pcimem_bcopy(mbox, pmbox, 595 sizeof (uint32_t)); 596 if (pmbox->mbxOwner == OWN_HOST) 597 goto mbout; 598 } 599 /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus 600 <status> */ 601 lpfc_printf_log(phba, 602 KERN_ERR, 603 LOG_MBOX | LOG_SLI, 604 "%d:0304 Stray Mailbox Interrupt " 605 "mbxCommand x%x mbxStatus x%x\n", 606 phba->brd_no, 607 pmbox->mbxCommand, 608 pmbox->mbxStatus); 609 610 spin_lock_irq(phba->host->host_lock); 611 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE; 612 spin_unlock_irq(phba->host->host_lock); 613 return (1); 614 } 615 616 mbout: 617 del_timer_sync(&phba->sli.mbox_tmo); 618 phba->work_hba_events &= ~WORKER_MBOX_TMO; 619 620 /* 621 * It is a fatal error if unknown mbox command completion. 622 */ 623 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) == 624 MBX_SHUTDOWN) { 625 626 /* Unknow mailbox command compl */ 627 lpfc_printf_log(phba, 628 KERN_ERR, 629 LOG_MBOX | LOG_SLI, 630 "%d:0323 Unknown Mailbox command %x Cmpl\n", 631 phba->brd_no, 632 pmbox->mbxCommand); 633 phba->hba_state = LPFC_HBA_ERROR; 634 phba->work_hs = HS_FFER3; 635 lpfc_handle_eratt(phba); 636 return (0); 637 } 638 639 phba->sli.mbox_active = NULL; 640 if (pmbox->mbxStatus) { 641 phba->sli.slistat.mbox_stat_err++; 642 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) { 643 /* Mbox cmd cmpl error - RETRYing */ 644 lpfc_printf_log(phba, 645 KERN_INFO, 646 LOG_MBOX | LOG_SLI, 647 "%d:0305 Mbox cmd cmpl error - " 648 "RETRYing Data: x%x x%x x%x x%x\n", 649 phba->brd_no, 650 pmbox->mbxCommand, 651 pmbox->mbxStatus, 652 pmbox->un.varWords[0], 653 phba->hba_state); 654 pmbox->mbxStatus = 0; 655 pmbox->mbxOwner = OWN_HOST; 656 spin_lock_irq(phba->host->host_lock); 657 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 658 spin_unlock_irq(phba->host->host_lock); 659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 660 if (rc == MBX_SUCCESS) 661 return (0); 662 } 663 } 664 665 /* Mailbox cmd <cmd> Cmpl <cmpl> */ 666 lpfc_printf_log(phba, 667 KERN_INFO, 668 LOG_MBOX | LOG_SLI, 669 "%d:0307 Mailbox cmd x%x Cmpl x%p " 670 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n", 671 phba->brd_no, 672 pmbox->mbxCommand, 673 pmb->mbox_cmpl, 674 *((uint32_t *) pmbox), 675 pmbox->un.varWords[0], 676 pmbox->un.varWords[1], 677 pmbox->un.varWords[2], 678 pmbox->un.varWords[3], 679 pmbox->un.varWords[4], 680 pmbox->un.varWords[5], 681 pmbox->un.varWords[6], 682 pmbox->un.varWords[7]); 683 684 if (pmb->mbox_cmpl) { 685 lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE); 686 pmb->mbox_cmpl(phba,pmb); 687 } 688 } 689 690 691 do { 692 process_next = 0; /* by default don't loop */ 693 spin_lock_irq(phba->host->host_lock); 694 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 695 696 /* Process next mailbox command if there is one */ 697 if ((pmb = lpfc_mbox_get(phba))) { 698 spin_unlock_irq(phba->host->host_lock); 699 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 700 if (rc == MBX_NOT_FINISHED) { 701 pmb->mb.mbxStatus = MBX_NOT_FINISHED; 702 pmb->mbox_cmpl(phba,pmb); 703 process_next = 1; 704 continue; /* loop back */ 705 } 706 } else { 707 spin_unlock_irq(phba->host->host_lock); 708 /* Turn on IOCB processing */ 709 for (i = 0; i < phba->sli.num_rings; i++) { 710 lpfc_sli_turn_on_ring(phba, i); 711 } 712 713 /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */ 714 while (!list_empty(&phba->freebufList)) { 715 struct lpfc_dmabuf *mp; 716 717 mp = NULL; 718 list_remove_head((&phba->freebufList), 719 mp, 720 struct lpfc_dmabuf, 721 list); 722 if (mp) { 723 lpfc_mbuf_free(phba, mp->virt, 724 mp->phys); 725 kfree(mp); 726 } 727 } 728 } 729 730 } while (process_next); 731 732 return (0); 733 } 734 static int 735 lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 736 struct lpfc_iocbq *saveq) 737 { 738 IOCB_t * irsp; 739 WORD5 * w5p; 740 uint32_t Rctl, Type; 741 uint32_t match, i; 742 743 match = 0; 744 irsp = &(saveq->iocb); 745 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) 746 || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) { 747 Rctl = FC_ELS_REQ; 748 Type = FC_ELS_DATA; 749 } else { 750 w5p = 751 (WORD5 *) & (saveq->iocb.un. 752 ulpWord[5]); 753 Rctl = w5p->hcsw.Rctl; 754 Type = w5p->hcsw.Type; 755 756 /* Firmware Workaround */ 757 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) && 758 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) { 759 Rctl = FC_ELS_REQ; 760 Type = FC_ELS_DATA; 761 w5p->hcsw.Rctl = Rctl; 762 w5p->hcsw.Type = Type; 763 } 764 } 765 /* unSolicited Responses */ 766 if (pring->prt[0].profile) { 767 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq); 768 match = 1; 769 } else { 770 /* We must search, based on rctl / type 771 for the right routine */ 772 for (i = 0; i < pring->num_mask; 773 i++) { 774 if ((pring->prt[i].rctl == 775 Rctl) 776 && (pring->prt[i]. 777 type == Type)) { 778 (pring->prt[i].lpfc_sli_rcv_unsol_event) 779 (phba, pring, saveq); 780 match = 1; 781 break; 782 } 783 } 784 } 785 if (match == 0) { 786 /* Unexpected Rctl / Type received */ 787 /* Ring <ringno> handler: unexpected 788 Rctl <Rctl> Type <Type> received */ 789 lpfc_printf_log(phba, 790 KERN_WARNING, 791 LOG_SLI, 792 "%d:0313 Ring %d handler: unexpected Rctl x%x " 793 "Type x%x received \n", 794 phba->brd_no, 795 pring->ringno, 796 Rctl, 797 Type); 798 } 799 return(1); 800 } 801 802 static struct lpfc_iocbq * 803 lpfc_sli_iocbq_lookup(struct lpfc_hba * phba, 804 struct lpfc_sli_ring * pring, 805 struct lpfc_iocbq * prspiocb) 806 { 807 struct lpfc_iocbq *cmd_iocb = NULL; 808 uint16_t iotag; 809 810 iotag = prspiocb->iocb.ulpIoTag; 811 812 if (iotag != 0 && iotag <= phba->sli.last_iotag) { 813 cmd_iocb = phba->sli.iocbq_lookup[iotag]; 814 list_del(&cmd_iocb->list); 815 pring->txcmplq_cnt--; 816 return cmd_iocb; 817 } 818 819 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 820 "%d:0317 iotag x%x is out off " 821 "range: max iotag x%x wd0 x%x\n", 822 phba->brd_no, iotag, 823 phba->sli.last_iotag, 824 *(((uint32_t *) &prspiocb->iocb) + 7)); 825 return NULL; 826 } 827 828 static int 829 lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, 830 struct lpfc_iocbq *saveq) 831 { 832 struct lpfc_iocbq * cmdiocbp; 833 int rc = 1; 834 unsigned long iflag; 835 836 /* Based on the iotag field, get the cmd IOCB from the txcmplq */ 837 spin_lock_irqsave(phba->host->host_lock, iflag); 838 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq); 839 if (cmdiocbp) { 840 if (cmdiocbp->iocb_cmpl) { 841 /* 842 * Post all ELS completions to the worker thread. 843 * All other are passed to the completion callback. 844 */ 845 if (pring->ringno == LPFC_ELS_RING) { 846 spin_unlock_irqrestore(phba->host->host_lock, 847 iflag); 848 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq); 849 spin_lock_irqsave(phba->host->host_lock, iflag); 850 } 851 else { 852 spin_unlock_irqrestore(phba->host->host_lock, 853 iflag); 854 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq); 855 spin_lock_irqsave(phba->host->host_lock, iflag); 856 } 857 } else 858 lpfc_sli_release_iocbq(phba, cmdiocbp); 859 } else { 860 /* 861 * Unknown initiating command based on the response iotag. 862 * This could be the case on the ELS ring because of 863 * lpfc_els_abort(). 864 */ 865 if (pring->ringno != LPFC_ELS_RING) { 866 /* 867 * Ring <ringno> handler: unexpected completion IoTag 868 * <IoTag> 869 */ 870 lpfc_printf_log(phba, 871 KERN_WARNING, 872 LOG_SLI, 873 "%d:0322 Ring %d handler: unexpected " 874 "completion IoTag x%x Data: x%x x%x x%x x%x\n", 875 phba->brd_no, 876 pring->ringno, 877 saveq->iocb.ulpIoTag, 878 saveq->iocb.ulpStatus, 879 saveq->iocb.un.ulpWord[4], 880 saveq->iocb.ulpCommand, 881 saveq->iocb.ulpContext); 882 } 883 } 884 885 spin_unlock_irqrestore(phba->host->host_lock, iflag); 886 return rc; 887 } 888 889 static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba, 890 struct lpfc_sli_ring * pring) 891 { 892 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno]; 893 /* 894 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then 895 * rsp ring <portRspMax> 896 */ 897 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 898 "%d:0312 Ring %d handler: portRspPut %d " 899 "is bigger then rsp ring %d\n", 900 phba->brd_no, pring->ringno, 901 le32_to_cpu(pgp->rspPutInx), 902 pring->numRiocb); 903 904 phba->hba_state = LPFC_HBA_ERROR; 905 906 /* 907 * All error attention handlers are posted to 908 * worker thread 909 */ 910 phba->work_ha |= HA_ERATT; 911 phba->work_hs = HS_FFER3; 912 if (phba->work_wait) 913 wake_up(phba->work_wait); 914 915 return; 916 } 917 918 void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba) 919 { 920 struct lpfc_sli * psli = &phba->sli; 921 struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING]; 922 IOCB_t *irsp = NULL; 923 IOCB_t *entry = NULL; 924 struct lpfc_iocbq *cmdiocbq = NULL; 925 struct lpfc_iocbq rspiocbq; 926 struct lpfc_pgp *pgp; 927 uint32_t status; 928 uint32_t portRspPut, portRspMax; 929 int type; 930 uint32_t rsp_cmpl = 0; 931 void __iomem *to_slim; 932 uint32_t ha_copy; 933 934 pring->stats.iocb_event++; 935 936 /* The driver assumes SLI-2 mode */ 937 pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno]; 938 939 /* 940 * The next available response entry should never exceed the maximum 941 * entries. If it does, treat it as an adapter hardware error. 942 */ 943 portRspMax = pring->numRiocb; 944 portRspPut = le32_to_cpu(pgp->rspPutInx); 945 if (unlikely(portRspPut >= portRspMax)) { 946 lpfc_sli_rsp_pointers_error(phba, pring); 947 return; 948 } 949 950 rmb(); 951 while (pring->rspidx != portRspPut) { 952 953 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx); 954 955 if (++pring->rspidx >= portRspMax) 956 pring->rspidx = 0; 957 958 lpfc_sli_pcimem_bcopy((uint32_t *) entry, 959 (uint32_t *) &rspiocbq.iocb, 960 sizeof (IOCB_t)); 961 irsp = &rspiocbq.iocb; 962 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK); 963 pring->stats.iocb_rsp++; 964 rsp_cmpl++; 965 966 if (unlikely(irsp->ulpStatus)) { 967 /* Rsp ring <ringno> error: IOCB */ 968 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 969 "%d:0326 Rsp Ring %d error: IOCB Data: " 970 "x%x x%x x%x x%x x%x x%x x%x x%x\n", 971 phba->brd_no, pring->ringno, 972 irsp->un.ulpWord[0], 973 irsp->un.ulpWord[1], 974 irsp->un.ulpWord[2], 975 irsp->un.ulpWord[3], 976 irsp->un.ulpWord[4], 977 irsp->un.ulpWord[5], 978 *(((uint32_t *) irsp) + 6), 979 *(((uint32_t *) irsp) + 7)); 980 } 981 982 switch (type) { 983 case LPFC_ABORT_IOCB: 984 case LPFC_SOL_IOCB: 985 /* 986 * Idle exchange closed via ABTS from port. No iocb 987 * resources need to be recovered. 988 */ 989 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) { 990 printk(KERN_INFO "%s: IOCB cmd 0x%x processed." 991 " Skipping completion\n", __FUNCTION__, 992 irsp->ulpCommand); 993 break; 994 } 995 996 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring, 997 &rspiocbq); 998 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) { 999 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, 1000 &rspiocbq); 1001 } 1002 break; 1003 default: 1004 if (irsp->ulpCommand == CMD_ADAPTER_MSG) { 1005 char adaptermsg[LPFC_MAX_ADPTMSG]; 1006 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG); 1007 memcpy(&adaptermsg[0], (uint8_t *) irsp, 1008 MAX_MSG_DATA); 1009 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s", 1010 phba->brd_no, adaptermsg); 1011 } else { 1012 /* Unknown IOCB command */ 1013 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1014 "%d:0321 Unknown IOCB command " 1015 "Data: x%x, x%x x%x x%x x%x\n", 1016 phba->brd_no, type, 1017 irsp->ulpCommand, 1018 irsp->ulpStatus, 1019 irsp->ulpIoTag, 1020 irsp->ulpContext); 1021 } 1022 break; 1023 } 1024 1025 /* 1026 * The response IOCB has been processed. Update the ring 1027 * pointer in SLIM. If the port response put pointer has not 1028 * been updated, sync the pgp->rspPutInx and fetch the new port 1029 * response put pointer. 1030 */ 1031 to_slim = phba->MBslimaddr + 1032 (SLIMOFF + (pring->ringno * 2) + 1) * 4; 1033 writeb(pring->rspidx, to_slim); 1034 1035 if (pring->rspidx == portRspPut) 1036 portRspPut = le32_to_cpu(pgp->rspPutInx); 1037 } 1038 1039 ha_copy = readl(phba->HAregaddr); 1040 ha_copy >>= (LPFC_FCP_RING * 4); 1041 1042 if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) { 1043 pring->stats.iocb_rsp_full++; 1044 status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4)); 1045 writel(status, phba->CAregaddr); 1046 readl(phba->CAregaddr); 1047 } 1048 if ((ha_copy & HA_R0CE_RSP) && 1049 (pring->flag & LPFC_CALL_RING_AVAILABLE)) { 1050 pring->flag &= ~LPFC_CALL_RING_AVAILABLE; 1051 pring->stats.iocb_cmd_empty++; 1052 1053 /* Force update of the local copy of cmdGetInx */ 1054 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx); 1055 lpfc_sli_resume_iocb(phba, pring); 1056 1057 if ((pring->lpfc_sli_cmd_available)) 1058 (pring->lpfc_sli_cmd_available) (phba, pring); 1059 1060 } 1061 1062 return; 1063 } 1064 1065 /* 1066 * This routine presumes LPFC_FCP_RING handling and doesn't bother 1067 * to check it explicitly. 1068 */ 1069 static int 1070 lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba, 1071 struct lpfc_sli_ring * pring, uint32_t mask) 1072 { 1073 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno]; 1074 IOCB_t *irsp = NULL; 1075 IOCB_t *entry = NULL; 1076 struct lpfc_iocbq *cmdiocbq = NULL; 1077 struct lpfc_iocbq rspiocbq; 1078 uint32_t status; 1079 uint32_t portRspPut, portRspMax; 1080 int rc = 1; 1081 lpfc_iocb_type type; 1082 unsigned long iflag; 1083 uint32_t rsp_cmpl = 0; 1084 void __iomem *to_slim; 1085 1086 spin_lock_irqsave(phba->host->host_lock, iflag); 1087 pring->stats.iocb_event++; 1088 1089 /* 1090 * The next available response entry should never exceed the maximum 1091 * entries. If it does, treat it as an adapter hardware error. 1092 */ 1093 portRspMax = pring->numRiocb; 1094 portRspPut = le32_to_cpu(pgp->rspPutInx); 1095 if (unlikely(portRspPut >= portRspMax)) { 1096 lpfc_sli_rsp_pointers_error(phba, pring); 1097 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1098 return 1; 1099 } 1100 1101 rmb(); 1102 while (pring->rspidx != portRspPut) { 1103 /* 1104 * Fetch an entry off the ring and copy it into a local data 1105 * structure. The copy involves a byte-swap since the 1106 * network byte order and pci byte orders are different. 1107 */ 1108 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx); 1109 1110 if (++pring->rspidx >= portRspMax) 1111 pring->rspidx = 0; 1112 1113 lpfc_sli_pcimem_bcopy((uint32_t *) entry, 1114 (uint32_t *) &rspiocbq.iocb, 1115 sizeof (IOCB_t)); 1116 irsp = &rspiocbq.iocb; 1117 1118 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK); 1119 pring->stats.iocb_rsp++; 1120 rsp_cmpl++; 1121 1122 if (unlikely(irsp->ulpStatus)) { 1123 /* Rsp ring <ringno> error: IOCB */ 1124 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 1125 "%d:0326 Rsp Ring %d error: IOCB Data: " 1126 "x%x x%x x%x x%x x%x x%x x%x x%x\n", 1127 phba->brd_no, pring->ringno, 1128 irsp->un.ulpWord[0], irsp->un.ulpWord[1], 1129 irsp->un.ulpWord[2], irsp->un.ulpWord[3], 1130 irsp->un.ulpWord[4], irsp->un.ulpWord[5], 1131 *(((uint32_t *) irsp) + 6), 1132 *(((uint32_t *) irsp) + 7)); 1133 } 1134 1135 switch (type) { 1136 case LPFC_ABORT_IOCB: 1137 case LPFC_SOL_IOCB: 1138 /* 1139 * Idle exchange closed via ABTS from port. No iocb 1140 * resources need to be recovered. 1141 */ 1142 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) { 1143 printk(KERN_INFO "%s: IOCB cmd 0x%x processed. " 1144 "Skipping completion\n", __FUNCTION__, 1145 irsp->ulpCommand); 1146 break; 1147 } 1148 1149 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring, 1150 &rspiocbq); 1151 if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) { 1152 spin_unlock_irqrestore( 1153 phba->host->host_lock, iflag); 1154 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, 1155 &rspiocbq); 1156 spin_lock_irqsave(phba->host->host_lock, 1157 iflag); 1158 } 1159 break; 1160 default: 1161 if (irsp->ulpCommand == CMD_ADAPTER_MSG) { 1162 char adaptermsg[LPFC_MAX_ADPTMSG]; 1163 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG); 1164 memcpy(&adaptermsg[0], (uint8_t *) irsp, 1165 MAX_MSG_DATA); 1166 dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s", 1167 phba->brd_no, adaptermsg); 1168 } else { 1169 /* Unknown IOCB command */ 1170 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1171 "%d:0321 Unknown IOCB command " 1172 "Data: x%x, x%x x%x x%x x%x\n", 1173 phba->brd_no, type, irsp->ulpCommand, 1174 irsp->ulpStatus, irsp->ulpIoTag, 1175 irsp->ulpContext); 1176 } 1177 break; 1178 } 1179 1180 /* 1181 * The response IOCB has been processed. Update the ring 1182 * pointer in SLIM. If the port response put pointer has not 1183 * been updated, sync the pgp->rspPutInx and fetch the new port 1184 * response put pointer. 1185 */ 1186 to_slim = phba->MBslimaddr + 1187 (SLIMOFF + (pring->ringno * 2) + 1) * 4; 1188 writel(pring->rspidx, to_slim); 1189 1190 if (pring->rspidx == portRspPut) 1191 portRspPut = le32_to_cpu(pgp->rspPutInx); 1192 } 1193 1194 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) { 1195 pring->stats.iocb_rsp_full++; 1196 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4)); 1197 writel(status, phba->CAregaddr); 1198 readl(phba->CAregaddr); 1199 } 1200 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) { 1201 pring->flag &= ~LPFC_CALL_RING_AVAILABLE; 1202 pring->stats.iocb_cmd_empty++; 1203 1204 /* Force update of the local copy of cmdGetInx */ 1205 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx); 1206 lpfc_sli_resume_iocb(phba, pring); 1207 1208 if ((pring->lpfc_sli_cmd_available)) 1209 (pring->lpfc_sli_cmd_available) (phba, pring); 1210 1211 } 1212 1213 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1214 return rc; 1215 } 1216 1217 1218 int 1219 lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba, 1220 struct lpfc_sli_ring * pring, uint32_t mask) 1221 { 1222 IOCB_t *entry; 1223 IOCB_t *irsp = NULL; 1224 struct lpfc_iocbq *rspiocbp = NULL; 1225 struct lpfc_iocbq *next_iocb; 1226 struct lpfc_iocbq *cmdiocbp; 1227 struct lpfc_iocbq *saveq; 1228 struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno]; 1229 uint8_t iocb_cmd_type; 1230 lpfc_iocb_type type; 1231 uint32_t status, free_saveq; 1232 uint32_t portRspPut, portRspMax; 1233 int rc = 1; 1234 unsigned long iflag; 1235 void __iomem *to_slim; 1236 1237 spin_lock_irqsave(phba->host->host_lock, iflag); 1238 pring->stats.iocb_event++; 1239 1240 /* 1241 * The next available response entry should never exceed the maximum 1242 * entries. If it does, treat it as an adapter hardware error. 1243 */ 1244 portRspMax = pring->numRiocb; 1245 portRspPut = le32_to_cpu(pgp->rspPutInx); 1246 if (portRspPut >= portRspMax) { 1247 /* 1248 * Ring <ringno> handler: portRspPut <portRspPut> is bigger then 1249 * rsp ring <portRspMax> 1250 */ 1251 lpfc_printf_log(phba, 1252 KERN_ERR, 1253 LOG_SLI, 1254 "%d:0312 Ring %d handler: portRspPut %d " 1255 "is bigger then rsp ring %d\n", 1256 phba->brd_no, 1257 pring->ringno, portRspPut, portRspMax); 1258 1259 phba->hba_state = LPFC_HBA_ERROR; 1260 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1261 1262 phba->work_hs = HS_FFER3; 1263 lpfc_handle_eratt(phba); 1264 1265 return 1; 1266 } 1267 1268 rmb(); 1269 while (pring->rspidx != portRspPut) { 1270 /* 1271 * Build a completion list and call the appropriate handler. 1272 * The process is to get the next available response iocb, get 1273 * a free iocb from the list, copy the response data into the 1274 * free iocb, insert to the continuation list, and update the 1275 * next response index to slim. This process makes response 1276 * iocb's in the ring available to DMA as fast as possible but 1277 * pays a penalty for a copy operation. Since the iocb is 1278 * only 32 bytes, this penalty is considered small relative to 1279 * the PCI reads for register values and a slim write. When 1280 * the ulpLe field is set, the entire Command has been 1281 * received. 1282 */ 1283 entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx); 1284 rspiocbp = lpfc_sli_get_iocbq(phba); 1285 if (rspiocbp == NULL) { 1286 printk(KERN_ERR "%s: out of buffers! Failing " 1287 "completion.\n", __FUNCTION__); 1288 break; 1289 } 1290 1291 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t)); 1292 irsp = &rspiocbp->iocb; 1293 1294 if (++pring->rspidx >= portRspMax) 1295 pring->rspidx = 0; 1296 1297 to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2) 1298 + 1) * 4; 1299 writel(pring->rspidx, to_slim); 1300 1301 if (list_empty(&(pring->iocb_continueq))) { 1302 list_add(&rspiocbp->list, &(pring->iocb_continueq)); 1303 } else { 1304 list_add_tail(&rspiocbp->list, 1305 &(pring->iocb_continueq)); 1306 } 1307 1308 pring->iocb_continueq_cnt++; 1309 if (irsp->ulpLe) { 1310 /* 1311 * By default, the driver expects to free all resources 1312 * associated with this iocb completion. 1313 */ 1314 free_saveq = 1; 1315 saveq = list_get_first(&pring->iocb_continueq, 1316 struct lpfc_iocbq, list); 1317 irsp = &(saveq->iocb); 1318 list_del_init(&pring->iocb_continueq); 1319 pring->iocb_continueq_cnt = 0; 1320 1321 pring->stats.iocb_rsp++; 1322 1323 if (irsp->ulpStatus) { 1324 /* Rsp ring <ringno> error: IOCB */ 1325 lpfc_printf_log(phba, 1326 KERN_WARNING, 1327 LOG_SLI, 1328 "%d:0328 Rsp Ring %d error: IOCB Data: " 1329 "x%x x%x x%x x%x x%x x%x x%x x%x\n", 1330 phba->brd_no, 1331 pring->ringno, 1332 irsp->un.ulpWord[0], 1333 irsp->un.ulpWord[1], 1334 irsp->un.ulpWord[2], 1335 irsp->un.ulpWord[3], 1336 irsp->un.ulpWord[4], 1337 irsp->un.ulpWord[5], 1338 *(((uint32_t *) irsp) + 6), 1339 *(((uint32_t *) irsp) + 7)); 1340 } 1341 1342 /* 1343 * Fetch the IOCB command type and call the correct 1344 * completion routine. Solicited and Unsolicited 1345 * IOCBs on the ELS ring get freed back to the 1346 * lpfc_iocb_list by the discovery kernel thread. 1347 */ 1348 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK; 1349 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type); 1350 if (type == LPFC_SOL_IOCB) { 1351 spin_unlock_irqrestore(phba->host->host_lock, 1352 iflag); 1353 rc = lpfc_sli_process_sol_iocb(phba, pring, 1354 saveq); 1355 spin_lock_irqsave(phba->host->host_lock, iflag); 1356 } else if (type == LPFC_UNSOL_IOCB) { 1357 spin_unlock_irqrestore(phba->host->host_lock, 1358 iflag); 1359 rc = lpfc_sli_process_unsol_iocb(phba, pring, 1360 saveq); 1361 spin_lock_irqsave(phba->host->host_lock, iflag); 1362 } else if (type == LPFC_ABORT_IOCB) { 1363 if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) && 1364 ((cmdiocbp = 1365 lpfc_sli_iocbq_lookup(phba, pring, 1366 saveq)))) { 1367 /* Call the specified completion 1368 routine */ 1369 if (cmdiocbp->iocb_cmpl) { 1370 spin_unlock_irqrestore( 1371 phba->host->host_lock, 1372 iflag); 1373 (cmdiocbp->iocb_cmpl) (phba, 1374 cmdiocbp, saveq); 1375 spin_lock_irqsave( 1376 phba->host->host_lock, 1377 iflag); 1378 } else 1379 lpfc_sli_release_iocbq(phba, 1380 cmdiocbp); 1381 } 1382 } else if (type == LPFC_UNKNOWN_IOCB) { 1383 if (irsp->ulpCommand == CMD_ADAPTER_MSG) { 1384 1385 char adaptermsg[LPFC_MAX_ADPTMSG]; 1386 1387 memset(adaptermsg, 0, 1388 LPFC_MAX_ADPTMSG); 1389 memcpy(&adaptermsg[0], (uint8_t *) irsp, 1390 MAX_MSG_DATA); 1391 dev_warn(&((phba->pcidev)->dev), 1392 "lpfc%d: %s", 1393 phba->brd_no, adaptermsg); 1394 } else { 1395 /* Unknown IOCB command */ 1396 lpfc_printf_log(phba, 1397 KERN_ERR, 1398 LOG_SLI, 1399 "%d:0321 Unknown IOCB command " 1400 "Data: x%x x%x x%x x%x\n", 1401 phba->brd_no, 1402 irsp->ulpCommand, 1403 irsp->ulpStatus, 1404 irsp->ulpIoTag, 1405 irsp->ulpContext); 1406 } 1407 } 1408 1409 if (free_saveq) { 1410 if (!list_empty(&saveq->list)) { 1411 list_for_each_entry_safe(rspiocbp, 1412 next_iocb, 1413 &saveq->list, 1414 list) { 1415 lpfc_sli_release_iocbq(phba, 1416 rspiocbp); 1417 } 1418 } 1419 1420 lpfc_sli_release_iocbq(phba, saveq); 1421 } 1422 } 1423 1424 /* 1425 * If the port response put pointer has not been updated, sync 1426 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port 1427 * response put pointer. 1428 */ 1429 if (pring->rspidx == portRspPut) { 1430 portRspPut = le32_to_cpu(pgp->rspPutInx); 1431 } 1432 } /* while (pring->rspidx != portRspPut) */ 1433 1434 if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) { 1435 /* At least one response entry has been freed */ 1436 pring->stats.iocb_rsp_full++; 1437 /* SET RxRE_RSP in Chip Att register */ 1438 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4)); 1439 writel(status, phba->CAregaddr); 1440 readl(phba->CAregaddr); /* flush */ 1441 } 1442 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) { 1443 pring->flag &= ~LPFC_CALL_RING_AVAILABLE; 1444 pring->stats.iocb_cmd_empty++; 1445 1446 /* Force update of the local copy of cmdGetInx */ 1447 pring->local_getidx = le32_to_cpu(pgp->cmdGetInx); 1448 lpfc_sli_resume_iocb(phba, pring); 1449 1450 if ((pring->lpfc_sli_cmd_available)) 1451 (pring->lpfc_sli_cmd_available) (phba, pring); 1452 1453 } 1454 1455 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1456 return rc; 1457 } 1458 1459 int 1460 lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring) 1461 { 1462 struct lpfc_iocbq *iocb, *next_iocb; 1463 IOCB_t *icmd = NULL, *cmd = NULL; 1464 int errcnt; 1465 1466 errcnt = 0; 1467 1468 /* Error everything on txq and txcmplq 1469 * First do the txq. 1470 */ 1471 spin_lock_irq(phba->host->host_lock); 1472 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) { 1473 list_del_init(&iocb->list); 1474 if (iocb->iocb_cmpl) { 1475 icmd = &iocb->iocb; 1476 icmd->ulpStatus = IOSTAT_LOCAL_REJECT; 1477 icmd->un.ulpWord[4] = IOERR_SLI_ABORTED; 1478 spin_unlock_irq(phba->host->host_lock); 1479 (iocb->iocb_cmpl) (phba, iocb, iocb); 1480 spin_lock_irq(phba->host->host_lock); 1481 } else 1482 lpfc_sli_release_iocbq(phba, iocb); 1483 } 1484 pring->txq_cnt = 0; 1485 INIT_LIST_HEAD(&(pring->txq)); 1486 1487 /* Next issue ABTS for everything on the txcmplq */ 1488 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) { 1489 cmd = &iocb->iocb; 1490 1491 /* 1492 * Imediate abort of IOCB, deque and call compl 1493 */ 1494 1495 list_del_init(&iocb->list); 1496 pring->txcmplq_cnt--; 1497 1498 if (iocb->iocb_cmpl) { 1499 cmd->ulpStatus = IOSTAT_LOCAL_REJECT; 1500 cmd->un.ulpWord[4] = IOERR_SLI_ABORTED; 1501 spin_unlock_irq(phba->host->host_lock); 1502 (iocb->iocb_cmpl) (phba, iocb, iocb); 1503 spin_lock_irq(phba->host->host_lock); 1504 } else 1505 lpfc_sli_release_iocbq(phba, iocb); 1506 } 1507 1508 INIT_LIST_HEAD(&pring->txcmplq); 1509 pring->txcmplq_cnt = 0; 1510 spin_unlock_irq(phba->host->host_lock); 1511 1512 return errcnt; 1513 } 1514 1515 /****************************************************************************** 1516 * lpfc_sli_send_reset 1517 * 1518 * Note: After returning from this function, the HBA cannot be accessed for 1519 * 1 ms. Since we do not wish to delay in interrupt context, it is the 1520 * responsibility of the caller to perform the mdelay(1) and flush via readl(). 1521 ******************************************************************************/ 1522 static int 1523 lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post) 1524 { 1525 MAILBOX_t *swpmb; 1526 volatile uint32_t word0; 1527 void __iomem *to_slim; 1528 unsigned long flags = 0; 1529 1530 spin_lock_irqsave(phba->host->host_lock, flags); 1531 1532 /* A board reset must use REAL SLIM. */ 1533 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE; 1534 1535 word0 = 0; 1536 swpmb = (MAILBOX_t *) & word0; 1537 swpmb->mbxCommand = MBX_RESTART; 1538 swpmb->mbxHc = 1; 1539 1540 to_slim = phba->MBslimaddr; 1541 writel(*(uint32_t *) swpmb, to_slim); 1542 readl(to_slim); /* flush */ 1543 1544 /* Only skip post after fc_ffinit is completed */ 1545 if (skip_post) { 1546 word0 = 1; /* This is really setting up word1 */ 1547 } else { 1548 word0 = 0; /* This is really setting up word1 */ 1549 } 1550 to_slim = phba->MBslimaddr + sizeof (uint32_t); 1551 writel(*(uint32_t *) swpmb, to_slim); 1552 readl(to_slim); /* flush */ 1553 1554 /* Turn off parity checking and serr during the physical reset */ 1555 pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value); 1556 pci_write_config_word(phba->pcidev, PCI_COMMAND, 1557 (phba->pci_cfg_value & 1558 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR))); 1559 1560 writel(HC_INITFF, phba->HCregaddr); 1561 1562 phba->hba_state = LPFC_INIT_START; 1563 spin_unlock_irqrestore(phba->host->host_lock, flags); 1564 1565 return 0; 1566 } 1567 1568 static int 1569 lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post) 1570 { 1571 struct lpfc_sli_ring *pring; 1572 int i; 1573 struct lpfc_dmabuf *mp, *next_mp; 1574 unsigned long flags = 0; 1575 1576 lpfc_sli_send_reset(phba, skip_post); 1577 mdelay(1); 1578 1579 spin_lock_irqsave(phba->host->host_lock, flags); 1580 /* Risk the write on flush case ie no delay after the readl */ 1581 readl(phba->HCregaddr); /* flush */ 1582 /* Now toggle INITFF bit set by lpfc_sli_send_reset */ 1583 writel(0, phba->HCregaddr); 1584 readl(phba->HCregaddr); /* flush */ 1585 1586 /* Restore PCI cmd register */ 1587 pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value); 1588 1589 /* perform board reset */ 1590 phba->fc_eventTag = 0; 1591 phba->fc_myDID = 0; 1592 phba->fc_prevDID = Mask_DID; 1593 1594 /* Reset HBA */ 1595 lpfc_printf_log(phba, 1596 KERN_INFO, 1597 LOG_SLI, 1598 "%d:0325 Reset HBA Data: x%x x%x x%x\n", 1599 phba->brd_no, 1600 phba->hba_state, 1601 phba->sli.sli_flag, 1602 skip_post); 1603 1604 /* Initialize relevant SLI info */ 1605 for (i = 0; i < phba->sli.num_rings; i++) { 1606 pring = &phba->sli.ring[i]; 1607 pring->flag = 0; 1608 pring->rspidx = 0; 1609 pring->next_cmdidx = 0; 1610 pring->local_getidx = 0; 1611 pring->cmdidx = 0; 1612 pring->missbufcnt = 0; 1613 } 1614 spin_unlock_irqrestore(phba->host->host_lock, flags); 1615 1616 if (skip_post) { 1617 mdelay(100); 1618 } else { 1619 mdelay(2000); 1620 } 1621 1622 spin_lock_irqsave(phba->host->host_lock, flags); 1623 /* Cleanup preposted buffers on the ELS ring */ 1624 pring = &phba->sli.ring[LPFC_ELS_RING]; 1625 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) { 1626 list_del(&mp->list); 1627 pring->postbufq_cnt--; 1628 lpfc_mbuf_free(phba, mp->virt, mp->phys); 1629 kfree(mp); 1630 } 1631 spin_unlock_irqrestore(phba->host->host_lock, flags); 1632 1633 for (i = 0; i < phba->sli.num_rings; i++) 1634 lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]); 1635 1636 return 0; 1637 } 1638 1639 static int 1640 lpfc_sli_chipset_init(struct lpfc_hba *phba) 1641 { 1642 uint32_t status, i = 0; 1643 1644 /* Read the HBA Host Status Register */ 1645 status = readl(phba->HSregaddr); 1646 1647 /* Check status register to see what current state is */ 1648 i = 0; 1649 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) { 1650 1651 /* Check every 100ms for 5 retries, then every 500ms for 5, then 1652 * every 2.5 sec for 5, then reset board and every 2.5 sec for 1653 * 4. 1654 */ 1655 if (i++ >= 20) { 1656 /* Adapter failed to init, timeout, status reg 1657 <status> */ 1658 lpfc_printf_log(phba, 1659 KERN_ERR, 1660 LOG_INIT, 1661 "%d:0436 Adapter failed to init, " 1662 "timeout, status reg x%x\n", 1663 phba->brd_no, 1664 status); 1665 phba->hba_state = LPFC_HBA_ERROR; 1666 return -ETIMEDOUT; 1667 } 1668 1669 /* Check to see if any errors occurred during init */ 1670 if (status & HS_FFERM) { 1671 /* ERROR: During chipset initialization */ 1672 /* Adapter failed to init, chipset, status reg 1673 <status> */ 1674 lpfc_printf_log(phba, 1675 KERN_ERR, 1676 LOG_INIT, 1677 "%d:0437 Adapter failed to init, " 1678 "chipset, status reg x%x\n", 1679 phba->brd_no, 1680 status); 1681 phba->hba_state = LPFC_HBA_ERROR; 1682 return -EIO; 1683 } 1684 1685 if (i <= 5) { 1686 msleep(10); 1687 } else if (i <= 10) { 1688 msleep(500); 1689 } else { 1690 msleep(2500); 1691 } 1692 1693 if (i == 15) { 1694 lpfc_sli_brdreset(phba, 0); 1695 } 1696 /* Read the HBA Host Status Register */ 1697 status = readl(phba->HSregaddr); 1698 } 1699 1700 /* Check to see if any errors occurred during init */ 1701 if (status & HS_FFERM) { 1702 /* ERROR: During chipset initialization */ 1703 /* Adapter failed to init, chipset, status reg <status> */ 1704 lpfc_printf_log(phba, 1705 KERN_ERR, 1706 LOG_INIT, 1707 "%d:0438 Adapter failed to init, chipset, " 1708 "status reg x%x\n", 1709 phba->brd_no, 1710 status); 1711 phba->hba_state = LPFC_HBA_ERROR; 1712 return -EIO; 1713 } 1714 1715 /* Clear all interrupt enable conditions */ 1716 writel(0, phba->HCregaddr); 1717 readl(phba->HCregaddr); /* flush */ 1718 1719 /* setup host attn register */ 1720 writel(0xffffffff, phba->HAregaddr); 1721 readl(phba->HAregaddr); /* flush */ 1722 return 0; 1723 } 1724 1725 int 1726 lpfc_sli_hba_setup(struct lpfc_hba * phba) 1727 { 1728 LPFC_MBOXQ_t *pmb; 1729 uint32_t resetcount = 0, rc = 0, done = 0; 1730 1731 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 1732 if (!pmb) { 1733 phba->hba_state = LPFC_HBA_ERROR; 1734 return -ENOMEM; 1735 } 1736 1737 while (resetcount < 2 && !done) { 1738 phba->hba_state = 0; 1739 lpfc_sli_brdreset(phba, 0); 1740 msleep(2500); 1741 rc = lpfc_sli_chipset_init(phba); 1742 if (rc) 1743 break; 1744 1745 resetcount++; 1746 1747 /* Call pre CONFIG_PORT mailbox command initialization. A value of 0 1748 * means the call was successful. Any other nonzero value is a failure, 1749 * but if ERESTART is returned, the driver may reset the HBA and try 1750 * again. 1751 */ 1752 rc = lpfc_config_port_prep(phba); 1753 if (rc == -ERESTART) { 1754 phba->hba_state = 0; 1755 continue; 1756 } else if (rc) { 1757 break; 1758 } 1759 1760 phba->hba_state = LPFC_INIT_MBX_CMDS; 1761 lpfc_config_port(phba, pmb); 1762 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 1763 if (rc == MBX_SUCCESS) 1764 done = 1; 1765 else { 1766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1767 "%d:0442 Adapter failed to init, mbxCmd x%x " 1768 "CONFIG_PORT, mbxStatus x%x Data: x%x\n", 1769 phba->brd_no, pmb->mb.mbxCommand, 1770 pmb->mb.mbxStatus, 0); 1771 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE; 1772 } 1773 } 1774 if (!done) 1775 goto lpfc_sli_hba_setup_error; 1776 1777 rc = lpfc_sli_ring_map(phba, pmb); 1778 1779 if (rc) 1780 goto lpfc_sli_hba_setup_error; 1781 1782 phba->sli.sli_flag |= LPFC_PROCESS_LA; 1783 1784 rc = lpfc_config_port_post(phba); 1785 if (rc) 1786 goto lpfc_sli_hba_setup_error; 1787 1788 goto lpfc_sli_hba_setup_exit; 1789 lpfc_sli_hba_setup_error: 1790 phba->hba_state = LPFC_HBA_ERROR; 1791 lpfc_sli_hba_setup_exit: 1792 mempool_free(pmb, phba->mbox_mem_pool); 1793 return rc; 1794 } 1795 1796 static void 1797 lpfc_mbox_abort(struct lpfc_hba * phba) 1798 { 1799 LPFC_MBOXQ_t *pmbox; 1800 MAILBOX_t *mb; 1801 1802 if (phba->sli.mbox_active) { 1803 del_timer_sync(&phba->sli.mbox_tmo); 1804 phba->work_hba_events &= ~WORKER_MBOX_TMO; 1805 pmbox = phba->sli.mbox_active; 1806 mb = &pmbox->mb; 1807 phba->sli.mbox_active = NULL; 1808 if (pmbox->mbox_cmpl) { 1809 mb->mbxStatus = MBX_NOT_FINISHED; 1810 (pmbox->mbox_cmpl) (phba, pmbox); 1811 } 1812 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1813 } 1814 1815 /* Abort all the non active mailbox commands. */ 1816 spin_lock_irq(phba->host->host_lock); 1817 pmbox = lpfc_mbox_get(phba); 1818 while (pmbox) { 1819 mb = &pmbox->mb; 1820 if (pmbox->mbox_cmpl) { 1821 mb->mbxStatus = MBX_NOT_FINISHED; 1822 spin_unlock_irq(phba->host->host_lock); 1823 (pmbox->mbox_cmpl) (phba, pmbox); 1824 spin_lock_irq(phba->host->host_lock); 1825 } 1826 pmbox = lpfc_mbox_get(phba); 1827 } 1828 spin_unlock_irq(phba->host->host_lock); 1829 return; 1830 } 1831 1832 /*! lpfc_mbox_timeout 1833 * 1834 * \pre 1835 * \post 1836 * \param hba Pointer to per struct lpfc_hba structure 1837 * \param l1 Pointer to the driver's mailbox queue. 1838 * \return 1839 * void 1840 * 1841 * \b Description: 1842 * 1843 * This routine handles mailbox timeout events at timer interrupt context. 1844 */ 1845 void 1846 lpfc_mbox_timeout(unsigned long ptr) 1847 { 1848 struct lpfc_hba *phba; 1849 unsigned long iflag; 1850 1851 phba = (struct lpfc_hba *)ptr; 1852 spin_lock_irqsave(phba->host->host_lock, iflag); 1853 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) { 1854 phba->work_hba_events |= WORKER_MBOX_TMO; 1855 if (phba->work_wait) 1856 wake_up(phba->work_wait); 1857 } 1858 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1859 } 1860 1861 void 1862 lpfc_mbox_timeout_handler(struct lpfc_hba *phba) 1863 { 1864 LPFC_MBOXQ_t *pmbox; 1865 MAILBOX_t *mb; 1866 1867 spin_lock_irq(phba->host->host_lock); 1868 if (!(phba->work_hba_events & WORKER_MBOX_TMO)) { 1869 spin_unlock_irq(phba->host->host_lock); 1870 return; 1871 } 1872 1873 phba->work_hba_events &= ~WORKER_MBOX_TMO; 1874 1875 pmbox = phba->sli.mbox_active; 1876 mb = &pmbox->mb; 1877 1878 /* Mbox cmd <mbxCommand> timeout */ 1879 lpfc_printf_log(phba, 1880 KERN_ERR, 1881 LOG_MBOX | LOG_SLI, 1882 "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n", 1883 phba->brd_no, 1884 mb->mbxCommand, 1885 phba->hba_state, 1886 phba->sli.sli_flag, 1887 phba->sli.mbox_active); 1888 1889 phba->sli.mbox_active = NULL; 1890 if (pmbox->mbox_cmpl) { 1891 mb->mbxStatus = MBX_NOT_FINISHED; 1892 spin_unlock_irq(phba->host->host_lock); 1893 (pmbox->mbox_cmpl) (phba, pmbox); 1894 spin_lock_irq(phba->host->host_lock); 1895 } 1896 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1897 1898 spin_unlock_irq(phba->host->host_lock); 1899 lpfc_mbox_abort(phba); 1900 return; 1901 } 1902 1903 int 1904 lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag) 1905 { 1906 MAILBOX_t *mb; 1907 struct lpfc_sli *psli; 1908 uint32_t status, evtctr; 1909 uint32_t ha_copy; 1910 int i; 1911 unsigned long drvr_flag = 0; 1912 volatile uint32_t word0, ldata; 1913 void __iomem *to_slim; 1914 1915 psli = &phba->sli; 1916 1917 spin_lock_irqsave(phba->host->host_lock, drvr_flag); 1918 1919 1920 mb = &pmbox->mb; 1921 status = MBX_SUCCESS; 1922 1923 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) { 1924 /* Polling for a mbox command when another one is already active 1925 * is not allowed in SLI. Also, the driver must have established 1926 * SLI2 mode to queue and process multiple mbox commands. 1927 */ 1928 1929 if (flag & MBX_POLL) { 1930 spin_unlock_irqrestore(phba->host->host_lock, 1931 drvr_flag); 1932 1933 /* Mbox command <mbxCommand> cannot issue */ 1934 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) 1935 return (MBX_NOT_FINISHED); 1936 } 1937 1938 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) { 1939 spin_unlock_irqrestore(phba->host->host_lock, 1940 drvr_flag); 1941 /* Mbox command <mbxCommand> cannot issue */ 1942 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) 1943 return (MBX_NOT_FINISHED); 1944 } 1945 1946 /* Handle STOP IOCB processing flag. This is only meaningful 1947 * if we are not polling for mbox completion. 1948 */ 1949 if (flag & MBX_STOP_IOCB) { 1950 flag &= ~MBX_STOP_IOCB; 1951 /* Now flag each ring */ 1952 for (i = 0; i < psli->num_rings; i++) { 1953 /* If the ring is active, flag it */ 1954 if (psli->ring[i].cmdringaddr) { 1955 psli->ring[i].flag |= 1956 LPFC_STOP_IOCB_MBX; 1957 } 1958 } 1959 } 1960 1961 /* Another mailbox command is still being processed, queue this 1962 * command to be processed later. 1963 */ 1964 lpfc_mbox_put(phba, pmbox); 1965 1966 /* Mbox cmd issue - BUSY */ 1967 lpfc_printf_log(phba, 1968 KERN_INFO, 1969 LOG_MBOX | LOG_SLI, 1970 "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n", 1971 phba->brd_no, 1972 mb->mbxCommand, 1973 phba->hba_state, 1974 psli->sli_flag, 1975 flag); 1976 1977 psli->slistat.mbox_busy++; 1978 spin_unlock_irqrestore(phba->host->host_lock, 1979 drvr_flag); 1980 1981 return (MBX_BUSY); 1982 } 1983 1984 /* Handle STOP IOCB processing flag. This is only meaningful 1985 * if we are not polling for mbox completion. 1986 */ 1987 if (flag & MBX_STOP_IOCB) { 1988 flag &= ~MBX_STOP_IOCB; 1989 if (flag == MBX_NOWAIT) { 1990 /* Now flag each ring */ 1991 for (i = 0; i < psli->num_rings; i++) { 1992 /* If the ring is active, flag it */ 1993 if (psli->ring[i].cmdringaddr) { 1994 psli->ring[i].flag |= 1995 LPFC_STOP_IOCB_MBX; 1996 } 1997 } 1998 } 1999 } 2000 2001 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE; 2002 2003 /* If we are not polling, we MUST be in SLI2 mode */ 2004 if (flag != MBX_POLL) { 2005 if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) { 2006 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 2007 spin_unlock_irqrestore(phba->host->host_lock, 2008 drvr_flag); 2009 /* Mbox command <mbxCommand> cannot issue */ 2010 LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag); 2011 return (MBX_NOT_FINISHED); 2012 } 2013 /* timeout active mbox command */ 2014 mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO); 2015 } 2016 2017 /* Mailbox cmd <cmd> issue */ 2018 lpfc_printf_log(phba, 2019 KERN_INFO, 2020 LOG_MBOX | LOG_SLI, 2021 "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n", 2022 phba->brd_no, 2023 mb->mbxCommand, 2024 phba->hba_state, 2025 psli->sli_flag, 2026 flag); 2027 2028 psli->slistat.mbox_cmd++; 2029 evtctr = psli->slistat.mbox_event; 2030 2031 /* next set own bit for the adapter and copy over command word */ 2032 mb->mbxOwner = OWN_CHIP; 2033 2034 if (psli->sli_flag & LPFC_SLI2_ACTIVE) { 2035 /* First copy command data to host SLIM area */ 2036 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE); 2037 } else { 2038 if (mb->mbxCommand == MBX_CONFIG_PORT) { 2039 /* copy command data into host mbox for cmpl */ 2040 lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, 2041 MAILBOX_CMD_SIZE); 2042 } 2043 2044 /* First copy mbox command data to HBA SLIM, skip past first 2045 word */ 2046 to_slim = phba->MBslimaddr + sizeof (uint32_t); 2047 lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0], 2048 MAILBOX_CMD_SIZE - sizeof (uint32_t)); 2049 2050 /* Next copy over first word, with mbxOwner set */ 2051 ldata = *((volatile uint32_t *)mb); 2052 to_slim = phba->MBslimaddr; 2053 writel(ldata, to_slim); 2054 readl(to_slim); /* flush */ 2055 2056 if (mb->mbxCommand == MBX_CONFIG_PORT) { 2057 /* switch over to host mailbox */ 2058 psli->sli_flag |= LPFC_SLI2_ACTIVE; 2059 } 2060 } 2061 2062 wmb(); 2063 /* interrupt board to doit right away */ 2064 writel(CA_MBATT, phba->CAregaddr); 2065 readl(phba->CAregaddr); /* flush */ 2066 2067 switch (flag) { 2068 case MBX_NOWAIT: 2069 /* Don't wait for it to finish, just return */ 2070 psli->mbox_active = pmbox; 2071 break; 2072 2073 case MBX_POLL: 2074 i = 0; 2075 psli->mbox_active = NULL; 2076 if (psli->sli_flag & LPFC_SLI2_ACTIVE) { 2077 /* First read mbox status word */ 2078 word0 = *((volatile uint32_t *)&phba->slim2p->mbx); 2079 word0 = le32_to_cpu(word0); 2080 } else { 2081 /* First read mbox status word */ 2082 word0 = readl(phba->MBslimaddr); 2083 } 2084 2085 /* Read the HBA Host Attention Register */ 2086 ha_copy = readl(phba->HAregaddr); 2087 2088 /* Wait for command to complete */ 2089 while (((word0 & OWN_CHIP) == OWN_CHIP) 2090 || !(ha_copy & HA_MBATT)) { 2091 if (i++ >= 100) { 2092 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 2093 spin_unlock_irqrestore(phba->host->host_lock, 2094 drvr_flag); 2095 return (MBX_NOT_FINISHED); 2096 } 2097 2098 /* Check if we took a mbox interrupt while we were 2099 polling */ 2100 if (((word0 & OWN_CHIP) != OWN_CHIP) 2101 && (evtctr != psli->slistat.mbox_event)) 2102 break; 2103 2104 spin_unlock_irqrestore(phba->host->host_lock, 2105 drvr_flag); 2106 2107 /* Can be in interrupt context, do not sleep */ 2108 /* (or might be called with interrupts disabled) */ 2109 mdelay(i); 2110 2111 spin_lock_irqsave(phba->host->host_lock, drvr_flag); 2112 2113 if (psli->sli_flag & LPFC_SLI2_ACTIVE) { 2114 /* First copy command data */ 2115 word0 = *((volatile uint32_t *) 2116 &phba->slim2p->mbx); 2117 word0 = le32_to_cpu(word0); 2118 if (mb->mbxCommand == MBX_CONFIG_PORT) { 2119 MAILBOX_t *slimmb; 2120 volatile uint32_t slimword0; 2121 /* Check real SLIM for any errors */ 2122 slimword0 = readl(phba->MBslimaddr); 2123 slimmb = (MAILBOX_t *) & slimword0; 2124 if (((slimword0 & OWN_CHIP) != OWN_CHIP) 2125 && slimmb->mbxStatus) { 2126 psli->sli_flag &= 2127 ~LPFC_SLI2_ACTIVE; 2128 word0 = slimword0; 2129 } 2130 } 2131 } else { 2132 /* First copy command data */ 2133 word0 = readl(phba->MBslimaddr); 2134 } 2135 /* Read the HBA Host Attention Register */ 2136 ha_copy = readl(phba->HAregaddr); 2137 } 2138 2139 if (psli->sli_flag & LPFC_SLI2_ACTIVE) { 2140 /* copy results back to user */ 2141 lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb, 2142 MAILBOX_CMD_SIZE); 2143 } else { 2144 /* First copy command data */ 2145 lpfc_memcpy_from_slim(mb, phba->MBslimaddr, 2146 MAILBOX_CMD_SIZE); 2147 if ((mb->mbxCommand == MBX_DUMP_MEMORY) && 2148 pmbox->context2) { 2149 lpfc_memcpy_from_slim((void *)pmbox->context2, 2150 phba->MBslimaddr + DMP_RSP_OFFSET, 2151 mb->un.varDmp.word_cnt); 2152 } 2153 } 2154 2155 writel(HA_MBATT, phba->HAregaddr); 2156 readl(phba->HAregaddr); /* flush */ 2157 2158 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 2159 status = mb->mbxStatus; 2160 } 2161 2162 spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); 2163 return (status); 2164 } 2165 2166 static int 2167 lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, 2168 struct lpfc_iocbq * piocb) 2169 { 2170 /* Insert the caller's iocb in the txq tail for later processing. */ 2171 list_add_tail(&piocb->list, &pring->txq); 2172 pring->txq_cnt++; 2173 return (0); 2174 } 2175 2176 static struct lpfc_iocbq * 2177 lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 2178 struct lpfc_iocbq ** piocb) 2179 { 2180 struct lpfc_iocbq * nextiocb; 2181 2182 nextiocb = lpfc_sli_ringtx_get(phba, pring); 2183 if (!nextiocb) { 2184 nextiocb = *piocb; 2185 *piocb = NULL; 2186 } 2187 2188 return nextiocb; 2189 } 2190 2191 int 2192 lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 2193 struct lpfc_iocbq *piocb, uint32_t flag) 2194 { 2195 struct lpfc_iocbq *nextiocb; 2196 IOCB_t *iocb; 2197 2198 /* 2199 * We should never get an IOCB if we are in a < LINK_DOWN state 2200 */ 2201 if (unlikely(phba->hba_state < LPFC_LINK_DOWN)) 2202 return IOCB_ERROR; 2203 2204 /* 2205 * Check to see if we are blocking IOCB processing because of a 2206 * outstanding mbox command. 2207 */ 2208 if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX)) 2209 goto iocb_busy; 2210 2211 if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) { 2212 /* 2213 * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF 2214 * can be issued if the link is not up. 2215 */ 2216 switch (piocb->iocb.ulpCommand) { 2217 case CMD_QUE_RING_BUF_CN: 2218 case CMD_QUE_RING_BUF64_CN: 2219 /* 2220 * For IOCBs, like QUE_RING_BUF, that have no rsp ring 2221 * completion, iocb_cmpl MUST be 0. 2222 */ 2223 if (piocb->iocb_cmpl) 2224 piocb->iocb_cmpl = NULL; 2225 /*FALLTHROUGH*/ 2226 case CMD_CREATE_XRI_CR: 2227 break; 2228 default: 2229 goto iocb_busy; 2230 } 2231 2232 /* 2233 * For FCP commands, we must be in a state where we can process link 2234 * attention events. 2235 */ 2236 } else if (unlikely(pring->ringno == phba->sli.fcp_ring && 2237 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) 2238 goto iocb_busy; 2239 2240 /* 2241 * Check to see if this is a high priority command. 2242 * If so bypass tx queue processing. 2243 */ 2244 if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) && 2245 (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) { 2246 lpfc_sli_submit_iocb(phba, pring, iocb, piocb); 2247 piocb = NULL; 2248 } 2249 2250 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) && 2251 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb))) 2252 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb); 2253 2254 if (iocb) 2255 lpfc_sli_update_ring(phba, pring); 2256 else 2257 lpfc_sli_update_full_ring(phba, pring); 2258 2259 if (!piocb) 2260 return IOCB_SUCCESS; 2261 2262 goto out_busy; 2263 2264 iocb_busy: 2265 pring->stats.iocb_cmd_delay++; 2266 2267 out_busy: 2268 2269 if (!(flag & SLI_IOCB_RET_IOCB)) { 2270 lpfc_sli_ringtx_put(phba, pring, piocb); 2271 return IOCB_SUCCESS; 2272 } 2273 2274 return IOCB_BUSY; 2275 } 2276 2277 int 2278 lpfc_sli_setup(struct lpfc_hba *phba) 2279 { 2280 int i, totiocb = 0; 2281 struct lpfc_sli *psli = &phba->sli; 2282 struct lpfc_sli_ring *pring; 2283 2284 psli->num_rings = MAX_CONFIGURED_RINGS; 2285 psli->sli_flag = 0; 2286 psli->fcp_ring = LPFC_FCP_RING; 2287 psli->next_ring = LPFC_FCP_NEXT_RING; 2288 psli->ip_ring = LPFC_IP_RING; 2289 2290 psli->iocbq_lookup = NULL; 2291 psli->iocbq_lookup_len = 0; 2292 psli->last_iotag = 0; 2293 2294 for (i = 0; i < psli->num_rings; i++) { 2295 pring = &psli->ring[i]; 2296 switch (i) { 2297 case LPFC_FCP_RING: /* ring 0 - FCP */ 2298 /* numCiocb and numRiocb are used in config_port */ 2299 pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES; 2300 pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES; 2301 pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES; 2302 pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES; 2303 pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES; 2304 pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES; 2305 pring->iotag_ctr = 0; 2306 pring->iotag_max = 2307 (phba->cfg_hba_queue_depth * 2); 2308 pring->fast_iotag = pring->iotag_max; 2309 pring->num_mask = 0; 2310 break; 2311 case LPFC_IP_RING: /* ring 1 - IP */ 2312 /* numCiocb and numRiocb are used in config_port */ 2313 pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES; 2314 pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES; 2315 pring->num_mask = 0; 2316 break; 2317 case LPFC_ELS_RING: /* ring 2 - ELS / CT */ 2318 /* numCiocb and numRiocb are used in config_port */ 2319 pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES; 2320 pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES; 2321 pring->fast_iotag = 0; 2322 pring->iotag_ctr = 0; 2323 pring->iotag_max = 4096; 2324 pring->num_mask = 4; 2325 pring->prt[0].profile = 0; /* Mask 0 */ 2326 pring->prt[0].rctl = FC_ELS_REQ; 2327 pring->prt[0].type = FC_ELS_DATA; 2328 pring->prt[0].lpfc_sli_rcv_unsol_event = 2329 lpfc_els_unsol_event; 2330 pring->prt[1].profile = 0; /* Mask 1 */ 2331 pring->prt[1].rctl = FC_ELS_RSP; 2332 pring->prt[1].type = FC_ELS_DATA; 2333 pring->prt[1].lpfc_sli_rcv_unsol_event = 2334 lpfc_els_unsol_event; 2335 pring->prt[2].profile = 0; /* Mask 2 */ 2336 /* NameServer Inquiry */ 2337 pring->prt[2].rctl = FC_UNSOL_CTL; 2338 /* NameServer */ 2339 pring->prt[2].type = FC_COMMON_TRANSPORT_ULP; 2340 pring->prt[2].lpfc_sli_rcv_unsol_event = 2341 lpfc_ct_unsol_event; 2342 pring->prt[3].profile = 0; /* Mask 3 */ 2343 /* NameServer response */ 2344 pring->prt[3].rctl = FC_SOL_CTL; 2345 /* NameServer */ 2346 pring->prt[3].type = FC_COMMON_TRANSPORT_ULP; 2347 pring->prt[3].lpfc_sli_rcv_unsol_event = 2348 lpfc_ct_unsol_event; 2349 break; 2350 } 2351 totiocb += (pring->numCiocb + pring->numRiocb); 2352 } 2353 if (totiocb > MAX_SLI2_IOCB) { 2354 /* Too many cmd / rsp ring entries in SLI2 SLIM */ 2355 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 2356 "%d:0462 Too many cmd / rsp ring entries in " 2357 "SLI2 SLIM Data: x%x x%x\n", 2358 phba->brd_no, totiocb, MAX_SLI2_IOCB); 2359 } 2360 2361 return 0; 2362 } 2363 2364 int 2365 lpfc_sli_queue_setup(struct lpfc_hba * phba) 2366 { 2367 struct lpfc_sli *psli; 2368 struct lpfc_sli_ring *pring; 2369 int i; 2370 2371 psli = &phba->sli; 2372 spin_lock_irq(phba->host->host_lock); 2373 INIT_LIST_HEAD(&psli->mboxq); 2374 /* Initialize list headers for txq and txcmplq as double linked lists */ 2375 for (i = 0; i < psli->num_rings; i++) { 2376 pring = &psli->ring[i]; 2377 pring->ringno = i; 2378 pring->next_cmdidx = 0; 2379 pring->local_getidx = 0; 2380 pring->cmdidx = 0; 2381 INIT_LIST_HEAD(&pring->txq); 2382 INIT_LIST_HEAD(&pring->txcmplq); 2383 INIT_LIST_HEAD(&pring->iocb_continueq); 2384 INIT_LIST_HEAD(&pring->postbufq); 2385 } 2386 spin_unlock_irq(phba->host->host_lock); 2387 return (1); 2388 } 2389 2390 int 2391 lpfc_sli_hba_down(struct lpfc_hba * phba) 2392 { 2393 struct lpfc_sli *psli; 2394 struct lpfc_sli_ring *pring; 2395 LPFC_MBOXQ_t *pmb; 2396 struct lpfc_iocbq *iocb, *next_iocb; 2397 IOCB_t *icmd = NULL; 2398 int i; 2399 unsigned long flags = 0; 2400 2401 psli = &phba->sli; 2402 lpfc_hba_down_prep(phba); 2403 2404 spin_lock_irqsave(phba->host->host_lock, flags); 2405 2406 for (i = 0; i < psli->num_rings; i++) { 2407 pring = &psli->ring[i]; 2408 pring->flag |= LPFC_DEFERRED_RING_EVENT; 2409 2410 /* 2411 * Error everything on the txq since these iocbs have not been 2412 * given to the FW yet. 2413 */ 2414 pring->txq_cnt = 0; 2415 2416 list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) { 2417 list_del_init(&iocb->list); 2418 if (iocb->iocb_cmpl) { 2419 icmd = &iocb->iocb; 2420 icmd->ulpStatus = IOSTAT_LOCAL_REJECT; 2421 icmd->un.ulpWord[4] = IOERR_SLI_DOWN; 2422 spin_unlock_irqrestore(phba->host->host_lock, 2423 flags); 2424 (iocb->iocb_cmpl) (phba, iocb, iocb); 2425 spin_lock_irqsave(phba->host->host_lock, flags); 2426 } else 2427 lpfc_sli_release_iocbq(phba, iocb); 2428 } 2429 2430 INIT_LIST_HEAD(&(pring->txq)); 2431 2432 kfree(pring->fast_lookup); 2433 pring->fast_lookup = NULL; 2434 } 2435 2436 spin_unlock_irqrestore(phba->host->host_lock, flags); 2437 2438 /* Return any active mbox cmds */ 2439 del_timer_sync(&psli->mbox_tmo); 2440 spin_lock_irqsave(phba->host->host_lock, flags); 2441 phba->work_hba_events &= ~WORKER_MBOX_TMO; 2442 if (psli->mbox_active) { 2443 pmb = psli->mbox_active; 2444 pmb->mb.mbxStatus = MBX_NOT_FINISHED; 2445 if (pmb->mbox_cmpl) { 2446 spin_unlock_irqrestore(phba->host->host_lock, flags); 2447 pmb->mbox_cmpl(phba,pmb); 2448 spin_lock_irqsave(phba->host->host_lock, flags); 2449 } 2450 } 2451 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 2452 psli->mbox_active = NULL; 2453 2454 /* Return any pending mbox cmds */ 2455 while ((pmb = lpfc_mbox_get(phba)) != NULL) { 2456 pmb->mb.mbxStatus = MBX_NOT_FINISHED; 2457 if (pmb->mbox_cmpl) { 2458 spin_unlock_irqrestore(phba->host->host_lock, flags); 2459 pmb->mbox_cmpl(phba,pmb); 2460 spin_lock_irqsave(phba->host->host_lock, flags); 2461 } 2462 } 2463 2464 INIT_LIST_HEAD(&psli->mboxq); 2465 2466 spin_unlock_irqrestore(phba->host->host_lock, flags); 2467 2468 /* 2469 * Provided the hba is not in an error state, reset it. It is not 2470 * capable of IO anymore. 2471 */ 2472 if (phba->hba_state != LPFC_HBA_ERROR) { 2473 phba->hba_state = LPFC_INIT_START; 2474 lpfc_sli_brdreset(phba, 1); 2475 } 2476 2477 return 1; 2478 } 2479 2480 void 2481 lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt) 2482 { 2483 uint32_t *src = srcp; 2484 uint32_t *dest = destp; 2485 uint32_t ldata; 2486 int i; 2487 2488 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) { 2489 ldata = *src; 2490 ldata = le32_to_cpu(ldata); 2491 *dest = ldata; 2492 src++; 2493 dest++; 2494 } 2495 } 2496 2497 int 2498 lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, 2499 struct lpfc_dmabuf * mp) 2500 { 2501 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up 2502 later */ 2503 list_add_tail(&mp->list, &pring->postbufq); 2504 2505 pring->postbufq_cnt++; 2506 return 0; 2507 } 2508 2509 2510 struct lpfc_dmabuf * 2511 lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 2512 dma_addr_t phys) 2513 { 2514 struct lpfc_dmabuf *mp, *next_mp; 2515 struct list_head *slp = &pring->postbufq; 2516 2517 /* Search postbufq, from the begining, looking for a match on phys */ 2518 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) { 2519 if (mp->phys == phys) { 2520 list_del_init(&mp->list); 2521 pring->postbufq_cnt--; 2522 return mp; 2523 } 2524 } 2525 2526 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 2527 "%d:0410 Cannot find virtual addr for mapped buf on " 2528 "ring %d Data x%llx x%p x%p x%x\n", 2529 phba->brd_no, pring->ringno, (unsigned long long)phys, 2530 slp->next, slp->prev, pring->postbufq_cnt); 2531 return NULL; 2532 } 2533 2534 static void 2535 lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb, 2536 struct lpfc_iocbq * rspiocb) 2537 { 2538 struct lpfc_dmabuf *buf_ptr, *buf_ptr1; 2539 /* Free the resources associated with the ELS_REQUEST64 IOCB the driver 2540 * just aborted. 2541 * In this case, context2 = cmd, context2->next = rsp, context3 = bpl 2542 */ 2543 if (cmdiocb->context2) { 2544 buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2; 2545 2546 /* Free the response IOCB before completing the abort 2547 command. */ 2548 buf_ptr = NULL; 2549 list_remove_head((&buf_ptr1->list), buf_ptr, 2550 struct lpfc_dmabuf, list); 2551 if (buf_ptr) { 2552 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 2553 kfree(buf_ptr); 2554 } 2555 lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys); 2556 kfree(buf_ptr1); 2557 } 2558 2559 if (cmdiocb->context3) { 2560 buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3; 2561 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 2562 kfree(buf_ptr); 2563 } 2564 2565 lpfc_sli_release_iocbq(phba, cmdiocb); 2566 return; 2567 } 2568 2569 int 2570 lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba, 2571 struct lpfc_sli_ring * pring, 2572 struct lpfc_iocbq * cmdiocb) 2573 { 2574 struct lpfc_iocbq *abtsiocbp; 2575 IOCB_t *icmd = NULL; 2576 IOCB_t *iabt = NULL; 2577 2578 /* issue ABTS for this IOCB based on iotag */ 2579 abtsiocbp = lpfc_sli_get_iocbq(phba); 2580 if (abtsiocbp == NULL) 2581 return 0; 2582 2583 iabt = &abtsiocbp->iocb; 2584 icmd = &cmdiocb->iocb; 2585 switch (icmd->ulpCommand) { 2586 case CMD_ELS_REQUEST64_CR: 2587 /* Even though we abort the ELS command, the firmware may access 2588 * the BPL or other resources before it processes our 2589 * ABORT_MXRI64. Thus we must delay reusing the cmdiocb 2590 * resources till the actual abort request completes. 2591 */ 2592 abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand); 2593 abtsiocbp->context2 = cmdiocb->context2; 2594 abtsiocbp->context3 = cmdiocb->context3; 2595 cmdiocb->context2 = NULL; 2596 cmdiocb->context3 = NULL; 2597 abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl; 2598 break; 2599 default: 2600 lpfc_sli_release_iocbq(phba, abtsiocbp); 2601 return 0; 2602 } 2603 2604 iabt->un.amxri.abortType = ABORT_TYPE_ABTS; 2605 iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32; 2606 2607 iabt->ulpLe = 1; 2608 iabt->ulpClass = CLASS3; 2609 iabt->ulpCommand = CMD_ABORT_MXRI64_CN; 2610 2611 if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) { 2612 lpfc_sli_release_iocbq(phba, abtsiocbp); 2613 return 0; 2614 } 2615 2616 return 1; 2617 } 2618 2619 static int 2620 lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id, 2621 uint64_t lun_id, uint32_t ctx, 2622 lpfc_ctx_cmd ctx_cmd) 2623 { 2624 struct lpfc_scsi_buf *lpfc_cmd; 2625 struct scsi_cmnd *cmnd; 2626 int rc = 1; 2627 2628 if (!(iocbq->iocb_flag & LPFC_IO_FCP)) 2629 return rc; 2630 2631 lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq); 2632 cmnd = lpfc_cmd->pCmd; 2633 2634 if (cmnd == NULL) 2635 return rc; 2636 2637 switch (ctx_cmd) { 2638 case LPFC_CTX_LUN: 2639 if ((cmnd->device->id == tgt_id) && 2640 (cmnd->device->lun == lun_id)) 2641 rc = 0; 2642 break; 2643 case LPFC_CTX_TGT: 2644 if (cmnd->device->id == tgt_id) 2645 rc = 0; 2646 break; 2647 case LPFC_CTX_CTX: 2648 if (iocbq->iocb.ulpContext == ctx) 2649 rc = 0; 2650 break; 2651 case LPFC_CTX_HOST: 2652 rc = 0; 2653 break; 2654 default: 2655 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n", 2656 __FUNCTION__, ctx_cmd); 2657 break; 2658 } 2659 2660 return rc; 2661 } 2662 2663 int 2664 lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 2665 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd) 2666 { 2667 struct lpfc_iocbq *iocbq; 2668 int sum, i; 2669 2670 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) { 2671 iocbq = phba->sli.iocbq_lookup[i]; 2672 2673 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id, 2674 0, ctx_cmd) == 0) 2675 sum++; 2676 } 2677 2678 return sum; 2679 } 2680 2681 void 2682 lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb, 2683 struct lpfc_iocbq * rspiocb) 2684 { 2685 spin_lock_irq(phba->host->host_lock); 2686 lpfc_sli_release_iocbq(phba, cmdiocb); 2687 spin_unlock_irq(phba->host->host_lock); 2688 return; 2689 } 2690 2691 int 2692 lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 2693 uint16_t tgt_id, uint64_t lun_id, uint32_t ctx, 2694 lpfc_ctx_cmd abort_cmd) 2695 { 2696 struct lpfc_iocbq *iocbq; 2697 struct lpfc_iocbq *abtsiocb; 2698 IOCB_t *cmd = NULL; 2699 int errcnt = 0, ret_val = 0; 2700 int i; 2701 2702 for (i = 1; i <= phba->sli.last_iotag; i++) { 2703 iocbq = phba->sli.iocbq_lookup[i]; 2704 2705 if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id, 2706 0, abort_cmd) != 0) 2707 continue; 2708 2709 /* issue ABTS for this IOCB based on iotag */ 2710 abtsiocb = lpfc_sli_get_iocbq(phba); 2711 if (abtsiocb == NULL) { 2712 errcnt++; 2713 continue; 2714 } 2715 2716 cmd = &iocbq->iocb; 2717 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS; 2718 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext; 2719 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag; 2720 abtsiocb->iocb.ulpLe = 1; 2721 abtsiocb->iocb.ulpClass = cmd->ulpClass; 2722 2723 if (phba->hba_state >= LPFC_LINK_UP) 2724 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN; 2725 else 2726 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN; 2727 2728 /* Setup callback routine and issue the command. */ 2729 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl; 2730 ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0); 2731 if (ret_val == IOCB_ERROR) { 2732 lpfc_sli_release_iocbq(phba, abtsiocb); 2733 errcnt++; 2734 continue; 2735 } 2736 } 2737 2738 return errcnt; 2739 } 2740 2741 static void 2742 lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba, 2743 struct lpfc_iocbq *cmdiocbq, 2744 struct lpfc_iocbq *rspiocbq) 2745 { 2746 wait_queue_head_t *pdone_q; 2747 unsigned long iflags; 2748 2749 spin_lock_irqsave(phba->host->host_lock, iflags); 2750 cmdiocbq->iocb_flag |= LPFC_IO_WAKE; 2751 if (cmdiocbq->context2 && rspiocbq) 2752 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb, 2753 &rspiocbq->iocb, sizeof(IOCB_t)); 2754 2755 pdone_q = cmdiocbq->context_un.wait_queue; 2756 spin_unlock_irqrestore(phba->host->host_lock, iflags); 2757 if (pdone_q) 2758 wake_up(pdone_q); 2759 return; 2760 } 2761 2762 /* 2763 * Issue the caller's iocb and wait for its completion, but no longer than the 2764 * caller's timeout. Note that iocb_flags is cleared before the 2765 * lpfc_sli_issue_call since the wake routine sets a unique value and by 2766 * definition this is a wait function. 2767 */ 2768 int 2769 lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba, 2770 struct lpfc_sli_ring * pring, 2771 struct lpfc_iocbq * piocb, 2772 struct lpfc_iocbq * prspiocbq, 2773 uint32_t timeout) 2774 { 2775 DECLARE_WAIT_QUEUE_HEAD(done_q); 2776 long timeleft, timeout_req = 0; 2777 int retval = IOCB_SUCCESS; 2778 uint32_t creg_val; 2779 2780 /* 2781 * If the caller has provided a response iocbq buffer, then context2 2782 * is NULL or its an error. 2783 */ 2784 if (prspiocbq) { 2785 if (piocb->context2) 2786 return IOCB_ERROR; 2787 piocb->context2 = prspiocbq; 2788 } 2789 2790 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait; 2791 piocb->context_un.wait_queue = &done_q; 2792 piocb->iocb_flag &= ~LPFC_IO_WAKE; 2793 2794 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 2795 creg_val = readl(phba->HCregaddr); 2796 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING); 2797 writel(creg_val, phba->HCregaddr); 2798 readl(phba->HCregaddr); /* flush */ 2799 } 2800 2801 retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0); 2802 if (retval == IOCB_SUCCESS) { 2803 timeout_req = timeout * HZ; 2804 spin_unlock_irq(phba->host->host_lock); 2805 timeleft = wait_event_timeout(done_q, 2806 piocb->iocb_flag & LPFC_IO_WAKE, 2807 timeout_req); 2808 spin_lock_irq(phba->host->host_lock); 2809 2810 if (timeleft == 0) { 2811 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2812 "%d:0329 IOCB wait timeout error - no " 2813 "wake response Data x%x\n", 2814 phba->brd_no, timeout); 2815 retval = IOCB_TIMEDOUT; 2816 } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) { 2817 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2818 "%d:0330 IOCB wake NOT set, " 2819 "Data x%x x%lx\n", phba->brd_no, 2820 timeout, (timeleft / jiffies)); 2821 retval = IOCB_TIMEDOUT; 2822 } else { 2823 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 2824 "%d:0331 IOCB wake signaled\n", 2825 phba->brd_no); 2826 } 2827 } else { 2828 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 2829 "%d:0332 IOCB wait issue failed, Data x%x\n", 2830 phba->brd_no, retval); 2831 retval = IOCB_ERROR; 2832 } 2833 2834 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 2835 creg_val = readl(phba->HCregaddr); 2836 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING); 2837 writel(creg_val, phba->HCregaddr); 2838 readl(phba->HCregaddr); /* flush */ 2839 } 2840 2841 if (prspiocbq) 2842 piocb->context2 = NULL; 2843 2844 piocb->context_un.wait_queue = NULL; 2845 piocb->iocb_cmpl = NULL; 2846 return retval; 2847 } 2848 2849 int 2850 lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq, 2851 uint32_t timeout) 2852 { 2853 DECLARE_WAIT_QUEUE_HEAD(done_q); 2854 DECLARE_WAITQUEUE(wq_entry, current); 2855 uint32_t timeleft = 0; 2856 int retval; 2857 2858 /* The caller must leave context1 empty. */ 2859 if (pmboxq->context1 != 0) { 2860 return (MBX_NOT_FINISHED); 2861 } 2862 2863 /* setup wake call as IOCB callback */ 2864 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait; 2865 /* setup context field to pass wait_queue pointer to wake function */ 2866 pmboxq->context1 = &done_q; 2867 2868 /* start to sleep before we wait, to avoid races */ 2869 set_current_state(TASK_INTERRUPTIBLE); 2870 add_wait_queue(&done_q, &wq_entry); 2871 2872 /* now issue the command */ 2873 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); 2874 2875 if (retval == MBX_BUSY || retval == MBX_SUCCESS) { 2876 timeleft = schedule_timeout(timeout * HZ); 2877 pmboxq->context1 = NULL; 2878 /* if schedule_timeout returns 0, we timed out and were not 2879 woken up */ 2880 if (timeleft == 0) { 2881 retval = MBX_TIMEOUT; 2882 } else { 2883 retval = MBX_SUCCESS; 2884 } 2885 } 2886 2887 2888 set_current_state(TASK_RUNNING); 2889 remove_wait_queue(&done_q, &wq_entry); 2890 return retval; 2891 } 2892 2893 irqreturn_t 2894 lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs) 2895 { 2896 struct lpfc_hba *phba; 2897 uint32_t ha_copy; 2898 uint32_t work_ha_copy; 2899 unsigned long status; 2900 int i; 2901 uint32_t control; 2902 2903 /* 2904 * Get the driver's phba structure from the dev_id and 2905 * assume the HBA is not interrupting. 2906 */ 2907 phba = (struct lpfc_hba *) dev_id; 2908 2909 if (unlikely(!phba)) 2910 return IRQ_NONE; 2911 2912 phba->sli.slistat.sli_intr++; 2913 2914 /* 2915 * Call the HBA to see if it is interrupting. If not, don't claim 2916 * the interrupt 2917 */ 2918 2919 /* Ignore all interrupts during initialization. */ 2920 if (unlikely(phba->hba_state < LPFC_LINK_DOWN)) 2921 return IRQ_NONE; 2922 2923 /* 2924 * Read host attention register to determine interrupt source 2925 * Clear Attention Sources, except Error Attention (to 2926 * preserve status) and Link Attention 2927 */ 2928 spin_lock(phba->host->host_lock); 2929 ha_copy = readl(phba->HAregaddr); 2930 writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr); 2931 readl(phba->HAregaddr); /* flush */ 2932 spin_unlock(phba->host->host_lock); 2933 2934 if (unlikely(!ha_copy)) 2935 return IRQ_NONE; 2936 2937 work_ha_copy = ha_copy & phba->work_ha_mask; 2938 2939 if (unlikely(work_ha_copy)) { 2940 if (work_ha_copy & HA_LATT) { 2941 if (phba->sli.sli_flag & LPFC_PROCESS_LA) { 2942 /* 2943 * Turn off Link Attention interrupts 2944 * until CLEAR_LA done 2945 */ 2946 spin_lock(phba->host->host_lock); 2947 phba->sli.sli_flag &= ~LPFC_PROCESS_LA; 2948 control = readl(phba->HCregaddr); 2949 control &= ~HC_LAINT_ENA; 2950 writel(control, phba->HCregaddr); 2951 readl(phba->HCregaddr); /* flush */ 2952 spin_unlock(phba->host->host_lock); 2953 } 2954 else 2955 work_ha_copy &= ~HA_LATT; 2956 } 2957 2958 if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) { 2959 for (i = 0; i < phba->sli.num_rings; i++) { 2960 if (work_ha_copy & (HA_RXATT << (4*i))) { 2961 /* 2962 * Turn off Slow Rings interrupts 2963 */ 2964 spin_lock(phba->host->host_lock); 2965 control = readl(phba->HCregaddr); 2966 control &= ~(HC_R0INT_ENA << i); 2967 writel(control, phba->HCregaddr); 2968 readl(phba->HCregaddr); /* flush */ 2969 spin_unlock(phba->host->host_lock); 2970 } 2971 } 2972 } 2973 2974 if (work_ha_copy & HA_ERATT) { 2975 phba->hba_state = LPFC_HBA_ERROR; 2976 /* 2977 * There was a link/board error. Read the 2978 * status register to retrieve the error event 2979 * and process it. 2980 */ 2981 phba->sli.slistat.err_attn_event++; 2982 /* Save status info */ 2983 phba->work_hs = readl(phba->HSregaddr); 2984 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); 2985 phba->work_status[1] = readl(phba->MBslimaddr + 0xac); 2986 2987 /* Clear Chip error bit */ 2988 writel(HA_ERATT, phba->HAregaddr); 2989 readl(phba->HAregaddr); /* flush */ 2990 2991 /* 2992 * Reseting the HBA is the only reliable way 2993 * to shutdown interrupt when there is a 2994 * ERROR. 2995 */ 2996 lpfc_sli_send_reset(phba, phba->hba_state); 2997 } 2998 2999 spin_lock(phba->host->host_lock); 3000 phba->work_ha |= work_ha_copy; 3001 if (phba->work_wait) 3002 wake_up(phba->work_wait); 3003 spin_unlock(phba->host->host_lock); 3004 } 3005 3006 ha_copy &= ~(phba->work_ha_mask); 3007 3008 /* 3009 * Process all events on FCP ring. Take the optimized path for 3010 * FCP IO. Any other IO is slow path and is handled by 3011 * the worker thread. 3012 */ 3013 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING))); 3014 status >>= (4*LPFC_FCP_RING); 3015 if (status & HA_RXATT) 3016 lpfc_sli_handle_fast_ring_event(phba, 3017 &phba->sli.ring[LPFC_FCP_RING], 3018 status); 3019 return IRQ_HANDLED; 3020 3021 } /* lpfc_intr_handler */ 3022