1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2005 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22 #include <linux/blkdev.h> 23 #include <linux/delay.h> 24 #include <linux/dma-mapping.h> 25 #include <linux/idr.h> 26 #include <linux/interrupt.h> 27 #include <linux/kthread.h> 28 #include <linux/pci.h> 29 #include <linux/spinlock.h> 30 31 #include <scsi/scsi.h> 32 #include <scsi/scsi_device.h> 33 #include <scsi/scsi_host.h> 34 #include <scsi/scsi_transport_fc.h> 35 36 #include "lpfc_hw.h" 37 #include "lpfc_sli.h" 38 #include "lpfc_disc.h" 39 #include "lpfc_scsi.h" 40 #include "lpfc.h" 41 #include "lpfc_logmsg.h" 42 #include "lpfc_crtn.h" 43 #include "lpfc_version.h" 44 45 static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *); 46 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 47 static int lpfc_post_rcv_buf(struct lpfc_hba *); 48 49 static struct scsi_transport_template *lpfc_transport_template = NULL; 50 static DEFINE_IDR(lpfc_hba_index); 51 52 /************************************************************************/ 53 /* */ 54 /* lpfc_config_port_prep */ 55 /* This routine will do LPFC initialization prior to the */ 56 /* CONFIG_PORT mailbox command. This will be initialized */ 57 /* as a SLI layer callback routine. */ 58 /* This routine returns 0 on success or -ERESTART if it wants */ 59 /* the SLI layer to reset the HBA and try again. Any */ 60 /* other return value indicates an error. */ 61 /* */ 62 /************************************************************************/ 63 int 64 lpfc_config_port_prep(struct lpfc_hba * phba) 65 { 66 lpfc_vpd_t *vp = &phba->vpd; 67 int i = 0, rc; 68 LPFC_MBOXQ_t *pmb; 69 MAILBOX_t *mb; 70 char *lpfc_vpd_data = NULL; 71 uint16_t offset = 0; 72 static char licensed[56] = 73 "key unlock for use with gnu public licensed code only\0"; 74 75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 76 if (!pmb) { 77 phba->hba_state = LPFC_HBA_ERROR; 78 return -ENOMEM; 79 } 80 81 mb = &pmb->mb; 82 phba->hba_state = LPFC_INIT_MBX_CMDS; 83 84 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 85 uint32_t *ptext = (uint32_t *) licensed; 86 87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 88 *ptext = cpu_to_be32(*ptext); 89 90 lpfc_read_nv(phba, pmb); 91 memset((char*)mb->un.varRDnvp.rsvd3, 0, 92 sizeof (mb->un.varRDnvp.rsvd3)); 93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 94 sizeof (licensed)); 95 96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 97 98 if (rc != MBX_SUCCESS) { 99 lpfc_printf_log(phba, 100 KERN_ERR, 101 LOG_MBOX, 102 "%d:0324 Config Port initialization " 103 "error, mbxCmd x%x READ_NVPARM, " 104 "mbxStatus x%x\n", 105 phba->brd_no, 106 mb->mbxCommand, mb->mbxStatus); 107 mempool_free(pmb, phba->mbox_mem_pool); 108 return -ERESTART; 109 } 110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 111 sizeof (mb->un.varRDnvp.nodename)); 112 } 113 114 /* Setup and issue mailbox READ REV command */ 115 lpfc_read_rev(phba, pmb); 116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 117 if (rc != MBX_SUCCESS) { 118 lpfc_printf_log(phba, 119 KERN_ERR, 120 LOG_INIT, 121 "%d:0439 Adapter failed to init, mbxCmd x%x " 122 "READ_REV, mbxStatus x%x\n", 123 phba->brd_no, 124 mb->mbxCommand, mb->mbxStatus); 125 mempool_free( pmb, phba->mbox_mem_pool); 126 return -ERESTART; 127 } 128 129 /* 130 * The value of rr must be 1 since the driver set the cv field to 1. 131 * This setting requires the FW to set all revision fields. 132 */ 133 if (mb->un.varRdRev.rr == 0) { 134 vp->rev.rBit = 0; 135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 136 "%d:0440 Adapter failed to init, READ_REV has " 137 "missing revision information.\n", 138 phba->brd_no); 139 mempool_free(pmb, phba->mbox_mem_pool); 140 return -ERESTART; 141 } 142 143 /* Save information as VPD data */ 144 vp->rev.rBit = 1; 145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 149 vp->rev.biuRev = mb->un.varRdRev.biuRev; 150 vp->rev.smRev = mb->un.varRdRev.smRev; 151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 152 vp->rev.endecRev = mb->un.varRdRev.endecRev; 153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 159 160 if (lpfc_is_LC_HBA(phba->pcidev->device)) 161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 162 sizeof (phba->RandomData)); 163 164 /* Get the default values for Model Name and Description */ 165 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 166 167 /* Get adapter VPD information */ 168 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL); 169 if (!pmb->context2) 170 goto out_free_mbox; 171 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 172 if (!lpfc_vpd_data) 173 goto out_free_context2; 174 175 do { 176 lpfc_dump_mem(phba, pmb, offset); 177 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 178 179 if (rc != MBX_SUCCESS) { 180 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 181 "%d:0441 VPD not present on adapter, " 182 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 183 phba->brd_no, 184 mb->mbxCommand, mb->mbxStatus); 185 kfree(lpfc_vpd_data); 186 lpfc_vpd_data = NULL; 187 break; 188 } 189 190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset, 191 mb->un.varDmp.word_cnt); 192 offset += mb->un.varDmp.word_cnt; 193 } while (mb->un.varDmp.word_cnt); 194 lpfc_parse_vpd(phba, lpfc_vpd_data); 195 196 kfree(lpfc_vpd_data); 197 out_free_context2: 198 kfree(pmb->context2); 199 out_free_mbox: 200 mempool_free(pmb, phba->mbox_mem_pool); 201 return 0; 202 } 203 204 /************************************************************************/ 205 /* */ 206 /* lpfc_config_port_post */ 207 /* This routine will do LPFC initialization after the */ 208 /* CONFIG_PORT mailbox command. This will be initialized */ 209 /* as a SLI layer callback routine. */ 210 /* This routine returns 0 on success. Any other return value */ 211 /* indicates an error. */ 212 /* */ 213 /************************************************************************/ 214 int 215 lpfc_config_port_post(struct lpfc_hba * phba) 216 { 217 LPFC_MBOXQ_t *pmb; 218 MAILBOX_t *mb; 219 struct lpfc_dmabuf *mp; 220 struct lpfc_sli *psli = &phba->sli; 221 uint32_t status, timeout; 222 int i, j, rc; 223 224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 225 if (!pmb) { 226 phba->hba_state = LPFC_HBA_ERROR; 227 return -ENOMEM; 228 } 229 mb = &pmb->mb; 230 231 lpfc_config_link(phba, pmb); 232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 233 if (rc != MBX_SUCCESS) { 234 lpfc_printf_log(phba, 235 KERN_ERR, 236 LOG_INIT, 237 "%d:0447 Adapter failed init, mbxCmd x%x " 238 "CONFIG_LINK mbxStatus x%x\n", 239 phba->brd_no, 240 mb->mbxCommand, mb->mbxStatus); 241 phba->hba_state = LPFC_HBA_ERROR; 242 mempool_free( pmb, phba->mbox_mem_pool); 243 return -EIO; 244 } 245 246 /* Get login parameters for NID. */ 247 lpfc_read_sparam(phba, pmb); 248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 249 lpfc_printf_log(phba, 250 KERN_ERR, 251 LOG_INIT, 252 "%d:0448 Adapter failed init, mbxCmd x%x " 253 "READ_SPARM mbxStatus x%x\n", 254 phba->brd_no, 255 mb->mbxCommand, mb->mbxStatus); 256 phba->hba_state = LPFC_HBA_ERROR; 257 mp = (struct lpfc_dmabuf *) pmb->context1; 258 mempool_free( pmb, phba->mbox_mem_pool); 259 lpfc_mbuf_free(phba, mp->virt, mp->phys); 260 kfree(mp); 261 return -EIO; 262 } 263 264 mp = (struct lpfc_dmabuf *) pmb->context1; 265 266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm)); 267 lpfc_mbuf_free(phba, mp->virt, mp->phys); 268 kfree(mp); 269 pmb->context1 = NULL; 270 271 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName, 272 sizeof (struct lpfc_name)); 273 memcpy(&phba->fc_portname, &phba->fc_sparam.portName, 274 sizeof (struct lpfc_name)); 275 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 276 /* This should be consolidated into parse_vpd ? - mr */ 277 if (phba->SerialNumber[0] == 0) { 278 uint8_t *outptr; 279 280 outptr = &phba->fc_nodename.u.s.IEEE[0]; 281 for (i = 0; i < 12; i++) { 282 status = *outptr++; 283 j = ((status & 0xf0) >> 4); 284 if (j <= 9) 285 phba->SerialNumber[i] = 286 (char)((uint8_t) 0x30 + (uint8_t) j); 287 else 288 phba->SerialNumber[i] = 289 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 290 i++; 291 j = (status & 0xf); 292 if (j <= 9) 293 phba->SerialNumber[i] = 294 (char)((uint8_t) 0x30 + (uint8_t) j); 295 else 296 phba->SerialNumber[i] = 297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 298 } 299 } 300 301 /* This should turn on DELAYED ABTS for ELS timeouts */ 302 lpfc_set_slim(phba, pmb, 0x052198, 0x1); 303 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 304 phba->hba_state = LPFC_HBA_ERROR; 305 mempool_free( pmb, phba->mbox_mem_pool); 306 return -EIO; 307 } 308 309 310 lpfc_read_config(phba, pmb); 311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 312 lpfc_printf_log(phba, 313 KERN_ERR, 314 LOG_INIT, 315 "%d:0453 Adapter failed to init, mbxCmd x%x " 316 "READ_CONFIG, mbxStatus x%x\n", 317 phba->brd_no, 318 mb->mbxCommand, mb->mbxStatus); 319 phba->hba_state = LPFC_HBA_ERROR; 320 mempool_free( pmb, phba->mbox_mem_pool); 321 return -EIO; 322 } 323 324 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 325 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1)) 326 phba->cfg_hba_queue_depth = 327 mb->un.varRdConfig.max_xri + 1; 328 329 phba->lmt = mb->un.varRdConfig.lmt; 330 /* HBA is not 4GB capable, or HBA is not 2GB capable, 331 don't let link speed ask for it */ 332 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) && 333 (phba->cfg_link_speed > LINK_SPEED_2G)) || 334 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) && 335 (phba->cfg_link_speed > LINK_SPEED_1G))) { 336 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */ 337 lpfc_printf_log(phba, 338 KERN_WARNING, 339 LOG_LINK_EVENT, 340 "%d:1302 Invalid speed for this board: " 341 "Reset link speed to auto: x%x\n", 342 phba->brd_no, 343 phba->cfg_link_speed); 344 phba->cfg_link_speed = LINK_SPEED_AUTO; 345 } 346 347 phba->hba_state = LPFC_LINK_DOWN; 348 349 /* Only process IOCBs on ring 0 till hba_state is READY */ 350 if (psli->ring[psli->ip_ring].cmdringaddr) 351 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT; 352 if (psli->ring[psli->fcp_ring].cmdringaddr) 353 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT; 354 if (psli->ring[psli->next_ring].cmdringaddr) 355 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT; 356 357 /* Post receive buffers for desired rings */ 358 lpfc_post_rcv_buf(phba); 359 360 /* Enable appropriate host interrupts */ 361 spin_lock_irq(phba->host->host_lock); 362 status = readl(phba->HCregaddr); 363 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 364 if (psli->num_rings > 0) 365 status |= HC_R0INT_ENA; 366 if (psli->num_rings > 1) 367 status |= HC_R1INT_ENA; 368 if (psli->num_rings > 2) 369 status |= HC_R2INT_ENA; 370 if (psli->num_rings > 3) 371 status |= HC_R3INT_ENA; 372 373 writel(status, phba->HCregaddr); 374 readl(phba->HCregaddr); /* flush */ 375 spin_unlock_irq(phba->host->host_lock); 376 377 /* 378 * Setup the ring 0 (els) timeout handler 379 */ 380 timeout = phba->fc_ratov << 1; 381 phba->els_tmofunc.expires = jiffies + HZ * timeout; 382 add_timer(&phba->els_tmofunc); 383 384 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed); 385 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 386 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) { 387 lpfc_printf_log(phba, 388 KERN_ERR, 389 LOG_INIT, 390 "%d:0454 Adapter failed to init, mbxCmd x%x " 391 "INIT_LINK, mbxStatus x%x\n", 392 phba->brd_no, 393 mb->mbxCommand, mb->mbxStatus); 394 395 /* Clear all interrupt enable conditions */ 396 writel(0, phba->HCregaddr); 397 readl(phba->HCregaddr); /* flush */ 398 /* Clear all pending interrupts */ 399 writel(0xffffffff, phba->HAregaddr); 400 readl(phba->HAregaddr); /* flush */ 401 402 phba->hba_state = LPFC_HBA_ERROR; 403 mempool_free(pmb, phba->mbox_mem_pool); 404 return -EIO; 405 } 406 /* MBOX buffer will be freed in mbox compl */ 407 408 i = 0; 409 while ((phba->hba_state != LPFC_HBA_READY) || 410 (phba->num_disc_nodes) || (phba->fc_prli_sent) || 411 ((phba->fc_map_cnt == 0) && (i<2)) || 412 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) { 413 /* Check every second for 30 retries. */ 414 i++; 415 if (i > 30) { 416 break; 417 } 418 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) { 419 /* The link is down. Set linkdown timeout */ 420 break; 421 } 422 423 /* Delay for 1 second to give discovery time to complete. */ 424 msleep(1000); 425 426 } 427 428 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let 429 * any potential PRLIs to flush thru the SLI sub-system. 430 */ 431 msleep(50); 432 433 return (0); 434 } 435 436 /************************************************************************/ 437 /* */ 438 /* lpfc_hba_down_prep */ 439 /* This routine will do LPFC uninitialization before the */ 440 /* HBA is reset when bringing down the SLI Layer. This will be */ 441 /* initialized as a SLI layer callback routine. */ 442 /* This routine returns 0 on success. Any other return value */ 443 /* indicates an error. */ 444 /* */ 445 /************************************************************************/ 446 int 447 lpfc_hba_down_prep(struct lpfc_hba * phba) 448 { 449 /* Disable interrupts */ 450 writel(0, phba->HCregaddr); 451 readl(phba->HCregaddr); /* flush */ 452 453 /* Cleanup potential discovery resources */ 454 lpfc_els_flush_rscn(phba); 455 lpfc_els_flush_cmd(phba); 456 lpfc_disc_flush_list(phba); 457 458 return (0); 459 } 460 461 /************************************************************************/ 462 /* */ 463 /* lpfc_handle_eratt */ 464 /* This routine will handle processing a Host Attention */ 465 /* Error Status event. This will be initialized */ 466 /* as a SLI layer callback routine. */ 467 /* */ 468 /************************************************************************/ 469 void 470 lpfc_handle_eratt(struct lpfc_hba * phba) 471 { 472 struct lpfc_sli *psli = &phba->sli; 473 struct lpfc_sli_ring *pring; 474 475 /* 476 * If a reset is sent to the HBA restore PCI configuration registers. 477 */ 478 if ( phba->hba_state == LPFC_INIT_START ) { 479 mdelay(1); 480 readl(phba->HCregaddr); /* flush */ 481 writel(0, phba->HCregaddr); 482 readl(phba->HCregaddr); /* flush */ 483 484 /* Restore PCI cmd register */ 485 pci_write_config_word(phba->pcidev, 486 PCI_COMMAND, phba->pci_cfg_value); 487 } 488 489 if (phba->work_hs & HS_FFER6) { 490 /* Re-establishing Link */ 491 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 492 "%d:1301 Re-establishing Link " 493 "Data: x%x x%x x%x\n", 494 phba->brd_no, phba->work_hs, 495 phba->work_status[0], phba->work_status[1]); 496 spin_lock_irq(phba->host->host_lock); 497 phba->fc_flag |= FC_ESTABLISH_LINK; 498 spin_unlock_irq(phba->host->host_lock); 499 500 /* 501 * Firmware stops when it triggled erratt with HS_FFER6. 502 * That could cause the I/Os dropped by the firmware. 503 * Error iocb (I/O) on txcmplq and let the SCSI layer 504 * retry it after re-establishing link. 505 */ 506 pring = &psli->ring[psli->fcp_ring]; 507 lpfc_sli_abort_iocb_ring(phba, pring); 508 509 510 /* 511 * There was a firmware error. Take the hba offline and then 512 * attempt to restart it. 513 */ 514 lpfc_offline(phba); 515 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 516 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60); 517 return; 518 } 519 } else { 520 /* The if clause above forces this code path when the status 521 * failure is a value other than FFER6. Do not call the offline 522 * twice. This is the adapter hardware error path. 523 */ 524 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 525 "%d:0457 Adapter Hardware Error " 526 "Data: x%x x%x x%x\n", 527 phba->brd_no, phba->work_hs, 528 phba->work_status[0], phba->work_status[1]); 529 530 lpfc_offline(phba); 531 532 } 533 } 534 535 /************************************************************************/ 536 /* */ 537 /* lpfc_handle_latt */ 538 /* This routine will handle processing a Host Attention */ 539 /* Link Status event. This will be initialized */ 540 /* as a SLI layer callback routine. */ 541 /* */ 542 /************************************************************************/ 543 void 544 lpfc_handle_latt(struct lpfc_hba * phba) 545 { 546 struct lpfc_sli *psli = &phba->sli; 547 LPFC_MBOXQ_t *pmb; 548 volatile uint32_t control; 549 struct lpfc_dmabuf *mp; 550 int rc = -ENOMEM; 551 552 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 553 if (!pmb) 554 goto lpfc_handle_latt_err_exit; 555 556 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 557 if (!mp) 558 goto lpfc_handle_latt_free_pmb; 559 560 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); 561 if (!mp->virt) 562 goto lpfc_handle_latt_free_mp; 563 564 rc = -EIO; 565 566 /* Cleanup any outstanding ELS commands */ 567 lpfc_els_flush_cmd(phba); 568 569 psli->slistat.link_event++; 570 lpfc_read_la(phba, pmb, mp); 571 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la; 572 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB)); 573 if (rc == MBX_NOT_FINISHED) 574 goto lpfc_handle_latt_free_mp; 575 576 /* Clear Link Attention in HA REG */ 577 spin_lock_irq(phba->host->host_lock); 578 writel(HA_LATT, phba->HAregaddr); 579 readl(phba->HAregaddr); /* flush */ 580 spin_unlock_irq(phba->host->host_lock); 581 582 return; 583 584 lpfc_handle_latt_free_mp: 585 kfree(mp); 586 lpfc_handle_latt_free_pmb: 587 kfree(pmb); 588 lpfc_handle_latt_err_exit: 589 /* Enable Link attention interrupts */ 590 spin_lock_irq(phba->host->host_lock); 591 psli->sli_flag |= LPFC_PROCESS_LA; 592 control = readl(phba->HCregaddr); 593 control |= HC_LAINT_ENA; 594 writel(control, phba->HCregaddr); 595 readl(phba->HCregaddr); /* flush */ 596 597 /* Clear Link Attention in HA REG */ 598 writel(HA_LATT, phba->HAregaddr); 599 readl(phba->HAregaddr); /* flush */ 600 spin_unlock_irq(phba->host->host_lock); 601 lpfc_linkdown(phba); 602 phba->hba_state = LPFC_HBA_ERROR; 603 604 /* The other case is an error from issue_mbox */ 605 if (rc == -ENOMEM) 606 lpfc_printf_log(phba, 607 KERN_WARNING, 608 LOG_MBOX, 609 "%d:0300 READ_LA: no buffers\n", 610 phba->brd_no); 611 612 return; 613 } 614 615 /************************************************************************/ 616 /* */ 617 /* lpfc_parse_vpd */ 618 /* This routine will parse the VPD data */ 619 /* */ 620 /************************************************************************/ 621 static int 622 lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd) 623 { 624 uint8_t lenlo, lenhi; 625 uint32_t Length; 626 int i, j; 627 int finished = 0; 628 int index = 0; 629 630 if (!vpd) 631 return 0; 632 633 /* Vital Product */ 634 lpfc_printf_log(phba, 635 KERN_INFO, 636 LOG_INIT, 637 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n", 638 phba->brd_no, 639 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 640 (uint32_t) vpd[3]); 641 do { 642 switch (vpd[index]) { 643 case 0x82: 644 index += 1; 645 lenlo = vpd[index]; 646 index += 1; 647 lenhi = vpd[index]; 648 index += 1; 649 i = ((((unsigned short)lenhi) << 8) + lenlo); 650 index += i; 651 break; 652 case 0x90: 653 index += 1; 654 lenlo = vpd[index]; 655 index += 1; 656 lenhi = vpd[index]; 657 index += 1; 658 Length = ((((unsigned short)lenhi) << 8) + lenlo); 659 660 while (Length > 0) { 661 /* Look for Serial Number */ 662 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { 663 index += 2; 664 i = vpd[index]; 665 index += 1; 666 j = 0; 667 Length -= (3+i); 668 while(i--) { 669 phba->SerialNumber[j++] = vpd[index++]; 670 if (j == 31) 671 break; 672 } 673 phba->SerialNumber[j] = 0; 674 continue; 675 } 676 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { 677 phba->vpd_flag |= VPD_MODEL_DESC; 678 index += 2; 679 i = vpd[index]; 680 index += 1; 681 j = 0; 682 Length -= (3+i); 683 while(i--) { 684 phba->ModelDesc[j++] = vpd[index++]; 685 if (j == 255) 686 break; 687 } 688 phba->ModelDesc[j] = 0; 689 continue; 690 } 691 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { 692 phba->vpd_flag |= VPD_MODEL_NAME; 693 index += 2; 694 i = vpd[index]; 695 index += 1; 696 j = 0; 697 Length -= (3+i); 698 while(i--) { 699 phba->ModelName[j++] = vpd[index++]; 700 if (j == 79) 701 break; 702 } 703 phba->ModelName[j] = 0; 704 continue; 705 } 706 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { 707 phba->vpd_flag |= VPD_PROGRAM_TYPE; 708 index += 2; 709 i = vpd[index]; 710 index += 1; 711 j = 0; 712 Length -= (3+i); 713 while(i--) { 714 phba->ProgramType[j++] = vpd[index++]; 715 if (j == 255) 716 break; 717 } 718 phba->ProgramType[j] = 0; 719 continue; 720 } 721 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { 722 phba->vpd_flag |= VPD_PORT; 723 index += 2; 724 i = vpd[index]; 725 index += 1; 726 j = 0; 727 Length -= (3+i); 728 while(i--) { 729 phba->Port[j++] = vpd[index++]; 730 if (j == 19) 731 break; 732 } 733 phba->Port[j] = 0; 734 continue; 735 } 736 else { 737 index += 2; 738 i = vpd[index]; 739 index += 1; 740 index += i; 741 Length -= (3 + i); 742 } 743 } 744 finished = 0; 745 break; 746 case 0x78: 747 finished = 1; 748 break; 749 default: 750 index ++; 751 break; 752 } 753 } while (!finished && (index < 108)); 754 755 return(1); 756 } 757 758 static void 759 lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp) 760 { 761 lpfc_vpd_t *vp; 762 uint16_t dev_id; 763 uint16_t dev_subid; 764 uint8_t hdrtype; 765 char *model_str = ""; 766 767 vp = &phba->vpd; 768 pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &dev_id); 769 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype); 770 771 switch (dev_id) { 772 case PCI_DEVICE_ID_FIREFLY: 773 model_str = "LP6000 1Gb PCI"; 774 break; 775 case PCI_DEVICE_ID_SUPERFLY: 776 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 777 model_str = "LP7000 1Gb PCI"; 778 else 779 model_str = "LP7000E 1Gb PCI"; 780 break; 781 case PCI_DEVICE_ID_DRAGONFLY: 782 model_str = "LP8000 1Gb PCI"; 783 break; 784 case PCI_DEVICE_ID_CENTAUR: 785 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 786 model_str = "LP9002 2Gb PCI"; 787 else 788 model_str = "LP9000 1Gb PCI"; 789 break; 790 case PCI_DEVICE_ID_RFLY: 791 model_str = "LP952 2Gb PCI"; 792 break; 793 case PCI_DEVICE_ID_PEGASUS: 794 model_str = "LP9802 2Gb PCI-X"; 795 break; 796 case PCI_DEVICE_ID_THOR: 797 if (hdrtype == 0x80) 798 model_str = "LP10000DC 2Gb 2-port PCI-X"; 799 else 800 model_str = "LP10000 2Gb PCI-X"; 801 break; 802 case PCI_DEVICE_ID_VIPER: 803 model_str = "LPX1000 10Gb PCI-X"; 804 break; 805 case PCI_DEVICE_ID_PFLY: 806 model_str = "LP982 2Gb PCI-X"; 807 break; 808 case PCI_DEVICE_ID_TFLY: 809 if (hdrtype == 0x80) 810 model_str = "LP1050DC 2Gb 2-port PCI-X"; 811 else 812 model_str = "LP1050 2Gb PCI-X"; 813 break; 814 case PCI_DEVICE_ID_HELIOS: 815 if (hdrtype == 0x80) 816 model_str = "LP11002 4Gb 2-port PCI-X2"; 817 else 818 model_str = "LP11000 4Gb PCI-X2"; 819 break; 820 case PCI_DEVICE_ID_HELIOS_SCSP: 821 model_str = "LP11000-SP 4Gb PCI-X2"; 822 break; 823 case PCI_DEVICE_ID_HELIOS_DCSP: 824 model_str = "LP11002-SP 4Gb 2-port PCI-X2"; 825 break; 826 case PCI_DEVICE_ID_NEPTUNE: 827 if (hdrtype == 0x80) 828 model_str = "LPe1002 4Gb 2-port"; 829 else 830 model_str = "LPe1000 4Gb PCIe"; 831 break; 832 case PCI_DEVICE_ID_NEPTUNE_SCSP: 833 model_str = "LPe1000-SP 4Gb PCIe"; 834 break; 835 case PCI_DEVICE_ID_NEPTUNE_DCSP: 836 model_str = "LPe1002-SP 4Gb 2-port PCIe"; 837 break; 838 case PCI_DEVICE_ID_BMID: 839 model_str = "LP1150 4Gb PCI-X2"; 840 break; 841 case PCI_DEVICE_ID_BSMB: 842 model_str = "LP111 4Gb PCI-X2"; 843 break; 844 case PCI_DEVICE_ID_ZEPHYR: 845 if (hdrtype == 0x80) 846 model_str = "LPe11002 4Gb 2-port PCIe"; 847 else 848 model_str = "LPe11000 4Gb PCIe"; 849 break; 850 case PCI_DEVICE_ID_ZEPHYR_SCSP: 851 model_str = "LPe11000-SP 4Gb PCIe"; 852 break; 853 case PCI_DEVICE_ID_ZEPHYR_DCSP: 854 model_str = "LPe11002-SP 4Gb 2-port PCIe"; 855 break; 856 case PCI_DEVICE_ID_ZMID: 857 model_str = "LPe1150 4Gb PCIe"; 858 break; 859 case PCI_DEVICE_ID_ZSMB: 860 model_str = "LPe111 4Gb PCIe"; 861 break; 862 case PCI_DEVICE_ID_LP101: 863 model_str = "LP101 2Gb PCI-X"; 864 break; 865 case PCI_DEVICE_ID_LP10000S: 866 model_str = "LP10000-S 2Gb PCI"; 867 break; 868 case PCI_DEVICE_ID_LP11000S: 869 case PCI_DEVICE_ID_LPE11000S: 870 pci_read_config_word(phba->pcidev, PCI_SUBSYSTEM_ID, 871 &dev_subid); 872 switch (dev_subid) { 873 case PCI_SUBSYSTEM_ID_LP11000S: 874 model_str = "LP11002-S 4Gb PCI-X2"; 875 break; 876 case PCI_SUBSYSTEM_ID_LP11002S: 877 model_str = "LP11000-S 4Gb 2-port PCI-X2"; 878 break; 879 case PCI_SUBSYSTEM_ID_LPE11000S: 880 model_str = "LPe11002-S 4Gb PCIe"; 881 break; 882 case PCI_SUBSYSTEM_ID_LPE11002S: 883 model_str = "LPe11002-S 4Gb 2-port PCIe"; 884 break; 885 case PCI_SUBSYSTEM_ID_LPE11010S: 886 model_str = "LPe11010-S 4Gb 10-port PCIe"; 887 break; 888 default: 889 break; 890 } 891 break; 892 default: 893 break; 894 } 895 if (mdp) 896 sscanf(model_str, "%s", mdp); 897 if (descp) 898 sprintf(descp, "Emulex %s Fibre Channel Adapter", model_str); 899 } 900 901 /**************************************************/ 902 /* lpfc_post_buffer */ 903 /* */ 904 /* This routine will post count buffers to the */ 905 /* ring with the QUE_RING_BUF_CN command. This */ 906 /* allows 3 buffers / command to be posted. */ 907 /* Returns the number of buffers NOT posted. */ 908 /**************************************************/ 909 int 910 lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt, 911 int type) 912 { 913 IOCB_t *icmd; 914 struct lpfc_iocbq *iocb; 915 struct lpfc_dmabuf *mp1, *mp2; 916 917 cnt += pring->missbufcnt; 918 919 /* While there are buffers to post */ 920 while (cnt > 0) { 921 /* Allocate buffer for command iocb */ 922 spin_lock_irq(phba->host->host_lock); 923 iocb = lpfc_sli_get_iocbq(phba); 924 spin_unlock_irq(phba->host->host_lock); 925 if (iocb == NULL) { 926 pring->missbufcnt = cnt; 927 return cnt; 928 } 929 icmd = &iocb->iocb; 930 931 /* 2 buffers can be posted per command */ 932 /* Allocate buffer to post */ 933 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 934 if (mp1) 935 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 936 &mp1->phys); 937 if (mp1 == 0 || mp1->virt == 0) { 938 kfree(mp1); 939 spin_lock_irq(phba->host->host_lock); 940 lpfc_sli_release_iocbq(phba, iocb); 941 spin_unlock_irq(phba->host->host_lock); 942 pring->missbufcnt = cnt; 943 return cnt; 944 } 945 946 INIT_LIST_HEAD(&mp1->list); 947 /* Allocate buffer to post */ 948 if (cnt > 1) { 949 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 950 if (mp2) 951 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 952 &mp2->phys); 953 if (mp2 == 0 || mp2->virt == 0) { 954 kfree(mp2); 955 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 956 kfree(mp1); 957 spin_lock_irq(phba->host->host_lock); 958 lpfc_sli_release_iocbq(phba, iocb); 959 spin_unlock_irq(phba->host->host_lock); 960 pring->missbufcnt = cnt; 961 return cnt; 962 } 963 964 INIT_LIST_HEAD(&mp2->list); 965 } else { 966 mp2 = NULL; 967 } 968 969 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 970 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 971 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 972 icmd->ulpBdeCount = 1; 973 cnt--; 974 if (mp2) { 975 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 976 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 977 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 978 cnt--; 979 icmd->ulpBdeCount = 2; 980 } 981 982 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 983 icmd->ulpLe = 1; 984 985 spin_lock_irq(phba->host->host_lock); 986 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) { 987 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 988 kfree(mp1); 989 cnt++; 990 if (mp2) { 991 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 992 kfree(mp2); 993 cnt++; 994 } 995 lpfc_sli_release_iocbq(phba, iocb); 996 pring->missbufcnt = cnt; 997 spin_unlock_irq(phba->host->host_lock); 998 return cnt; 999 } 1000 spin_unlock_irq(phba->host->host_lock); 1001 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 1002 if (mp2) { 1003 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 1004 } 1005 } 1006 pring->missbufcnt = 0; 1007 return 0; 1008 } 1009 1010 /************************************************************************/ 1011 /* */ 1012 /* lpfc_post_rcv_buf */ 1013 /* This routine post initial rcv buffers to the configured rings */ 1014 /* */ 1015 /************************************************************************/ 1016 static int 1017 lpfc_post_rcv_buf(struct lpfc_hba * phba) 1018 { 1019 struct lpfc_sli *psli = &phba->sli; 1020 1021 /* Ring 0, ELS / CT buffers */ 1022 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1); 1023 /* Ring 2 - FCP no buffers needed */ 1024 1025 return 0; 1026 } 1027 1028 #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 1029 1030 /************************************************************************/ 1031 /* */ 1032 /* lpfc_sha_init */ 1033 /* */ 1034 /************************************************************************/ 1035 static void 1036 lpfc_sha_init(uint32_t * HashResultPointer) 1037 { 1038 HashResultPointer[0] = 0x67452301; 1039 HashResultPointer[1] = 0xEFCDAB89; 1040 HashResultPointer[2] = 0x98BADCFE; 1041 HashResultPointer[3] = 0x10325476; 1042 HashResultPointer[4] = 0xC3D2E1F0; 1043 } 1044 1045 /************************************************************************/ 1046 /* */ 1047 /* lpfc_sha_iterate */ 1048 /* */ 1049 /************************************************************************/ 1050 static void 1051 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 1052 { 1053 int t; 1054 uint32_t TEMP; 1055 uint32_t A, B, C, D, E; 1056 t = 16; 1057 do { 1058 HashWorkingPointer[t] = 1059 S(1, 1060 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 1061 8] ^ 1062 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 1063 } while (++t <= 79); 1064 t = 0; 1065 A = HashResultPointer[0]; 1066 B = HashResultPointer[1]; 1067 C = HashResultPointer[2]; 1068 D = HashResultPointer[3]; 1069 E = HashResultPointer[4]; 1070 1071 do { 1072 if (t < 20) { 1073 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 1074 } else if (t < 40) { 1075 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 1076 } else if (t < 60) { 1077 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 1078 } else { 1079 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 1080 } 1081 TEMP += S(5, A) + E + HashWorkingPointer[t]; 1082 E = D; 1083 D = C; 1084 C = S(30, B); 1085 B = A; 1086 A = TEMP; 1087 } while (++t <= 79); 1088 1089 HashResultPointer[0] += A; 1090 HashResultPointer[1] += B; 1091 HashResultPointer[2] += C; 1092 HashResultPointer[3] += D; 1093 HashResultPointer[4] += E; 1094 1095 } 1096 1097 /************************************************************************/ 1098 /* */ 1099 /* lpfc_challenge_key */ 1100 /* */ 1101 /************************************************************************/ 1102 static void 1103 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 1104 { 1105 *HashWorking = (*RandomChallenge ^ *HashWorking); 1106 } 1107 1108 /************************************************************************/ 1109 /* */ 1110 /* lpfc_hba_init */ 1111 /* */ 1112 /************************************************************************/ 1113 void 1114 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 1115 { 1116 int t; 1117 uint32_t *HashWorking; 1118 uint32_t *pwwnn = phba->wwnn; 1119 1120 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL); 1121 if (!HashWorking) 1122 return; 1123 1124 memset(HashWorking, 0, (80 * sizeof(uint32_t))); 1125 HashWorking[0] = HashWorking[78] = *pwwnn++; 1126 HashWorking[1] = HashWorking[79] = *pwwnn; 1127 1128 for (t = 0; t < 7; t++) 1129 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 1130 1131 lpfc_sha_init(hbainit); 1132 lpfc_sha_iterate(hbainit, HashWorking); 1133 kfree(HashWorking); 1134 } 1135 1136 static void 1137 lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind) 1138 { 1139 struct lpfc_nodelist *ndlp, *next_ndlp; 1140 1141 /* clean up phba - lpfc specific */ 1142 lpfc_can_disctmo(phba); 1143 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list, 1144 nlp_listp) { 1145 lpfc_nlp_remove(phba, ndlp); 1146 } 1147 1148 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list, 1149 nlp_listp) { 1150 lpfc_nlp_remove(phba, ndlp); 1151 } 1152 1153 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list, 1154 nlp_listp) { 1155 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST); 1156 } 1157 1158 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list, 1159 nlp_listp) { 1160 lpfc_nlp_remove(phba, ndlp); 1161 } 1162 1163 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list, 1164 nlp_listp) { 1165 lpfc_nlp_remove(phba, ndlp); 1166 } 1167 1168 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list, 1169 nlp_listp) { 1170 lpfc_nlp_remove(phba, ndlp); 1171 } 1172 1173 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list, 1174 nlp_listp) { 1175 lpfc_nlp_remove(phba, ndlp); 1176 } 1177 1178 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list, 1179 nlp_listp) { 1180 lpfc_nlp_remove(phba, ndlp); 1181 } 1182 1183 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1184 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1185 INIT_LIST_HEAD(&phba->fc_unused_list); 1186 INIT_LIST_HEAD(&phba->fc_plogi_list); 1187 INIT_LIST_HEAD(&phba->fc_adisc_list); 1188 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1189 INIT_LIST_HEAD(&phba->fc_prli_list); 1190 INIT_LIST_HEAD(&phba->fc_npr_list); 1191 1192 phba->fc_map_cnt = 0; 1193 phba->fc_unmap_cnt = 0; 1194 phba->fc_plogi_cnt = 0; 1195 phba->fc_adisc_cnt = 0; 1196 phba->fc_reglogin_cnt = 0; 1197 phba->fc_prli_cnt = 0; 1198 phba->fc_npr_cnt = 0; 1199 phba->fc_unused_cnt= 0; 1200 return; 1201 } 1202 1203 static void 1204 lpfc_establish_link_tmo(unsigned long ptr) 1205 { 1206 struct lpfc_hba *phba = (struct lpfc_hba *)ptr; 1207 unsigned long iflag; 1208 1209 1210 /* Re-establishing Link, timer expired */ 1211 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT, 1212 "%d:1300 Re-establishing Link, timer expired " 1213 "Data: x%x x%x\n", 1214 phba->brd_no, phba->fc_flag, phba->hba_state); 1215 spin_lock_irqsave(phba->host->host_lock, iflag); 1216 phba->fc_flag &= ~FC_ESTABLISH_LINK; 1217 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1218 } 1219 1220 static int 1221 lpfc_stop_timer(struct lpfc_hba * phba) 1222 { 1223 struct lpfc_sli *psli = &phba->sli; 1224 1225 /* Instead of a timer, this has been converted to a 1226 * deferred procedding list. 1227 */ 1228 while (!list_empty(&phba->freebufList)) { 1229 1230 struct lpfc_dmabuf *mp = NULL; 1231 1232 list_remove_head((&phba->freebufList), mp, 1233 struct lpfc_dmabuf, list); 1234 if (mp) { 1235 lpfc_mbuf_free(phba, mp->virt, mp->phys); 1236 kfree(mp); 1237 } 1238 } 1239 1240 del_timer_sync(&phba->fc_estabtmo); 1241 del_timer_sync(&phba->fc_disctmo); 1242 del_timer_sync(&phba->fc_fdmitmo); 1243 del_timer_sync(&phba->els_tmofunc); 1244 psli = &phba->sli; 1245 del_timer_sync(&psli->mbox_tmo); 1246 return(1); 1247 } 1248 1249 int 1250 lpfc_online(struct lpfc_hba * phba) 1251 { 1252 if (!phba) 1253 return 0; 1254 1255 if (!(phba->fc_flag & FC_OFFLINE_MODE)) 1256 return 0; 1257 1258 lpfc_printf_log(phba, 1259 KERN_WARNING, 1260 LOG_INIT, 1261 "%d:0458 Bring Adapter online\n", 1262 phba->brd_no); 1263 1264 if (!lpfc_sli_queue_setup(phba)) 1265 return 1; 1266 1267 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */ 1268 return 1; 1269 1270 spin_lock_irq(phba->host->host_lock); 1271 phba->fc_flag &= ~FC_OFFLINE_MODE; 1272 spin_unlock_irq(phba->host->host_lock); 1273 1274 return 0; 1275 } 1276 1277 int 1278 lpfc_offline(struct lpfc_hba * phba) 1279 { 1280 struct lpfc_sli_ring *pring; 1281 struct lpfc_sli *psli; 1282 unsigned long iflag; 1283 int i = 0; 1284 1285 if (!phba) 1286 return 0; 1287 1288 if (phba->fc_flag & FC_OFFLINE_MODE) 1289 return 0; 1290 1291 psli = &phba->sli; 1292 pring = &psli->ring[psli->fcp_ring]; 1293 1294 lpfc_linkdown(phba); 1295 1296 /* The linkdown event takes 30 seconds to timeout. */ 1297 while (pring->txcmplq_cnt) { 1298 mdelay(10); 1299 if (i++ > 3000) 1300 break; 1301 } 1302 1303 /* stop all timers associated with this hba */ 1304 lpfc_stop_timer(phba); 1305 phba->work_hba_events = 0; 1306 1307 lpfc_printf_log(phba, 1308 KERN_WARNING, 1309 LOG_INIT, 1310 "%d:0460 Bring Adapter offline\n", 1311 phba->brd_no); 1312 1313 /* Bring down the SLI Layer and cleanup. The HBA is offline 1314 now. */ 1315 lpfc_sli_hba_down(phba); 1316 lpfc_cleanup(phba, 1); 1317 spin_lock_irqsave(phba->host->host_lock, iflag); 1318 phba->fc_flag |= FC_OFFLINE_MODE; 1319 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1320 return 0; 1321 } 1322 1323 /****************************************************************************** 1324 * Function name: lpfc_scsi_free 1325 * 1326 * Description: Called from lpfc_pci_remove_one free internal driver resources 1327 * 1328 ******************************************************************************/ 1329 static int 1330 lpfc_scsi_free(struct lpfc_hba * phba) 1331 { 1332 struct lpfc_scsi_buf *sb, *sb_next; 1333 struct lpfc_iocbq *io, *io_next; 1334 1335 spin_lock_irq(phba->host->host_lock); 1336 /* Release all the lpfc_scsi_bufs maintained by this host. */ 1337 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) { 1338 list_del(&sb->list); 1339 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data, 1340 sb->dma_handle); 1341 kfree(sb); 1342 phba->total_scsi_bufs--; 1343 } 1344 1345 /* Release all the lpfc_iocbq entries maintained by this host. */ 1346 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) { 1347 list_del(&io->list); 1348 kfree(io); 1349 phba->total_iocbq_bufs--; 1350 } 1351 1352 spin_unlock_irq(phba->host->host_lock); 1353 1354 return 0; 1355 } 1356 1357 1358 static int __devinit 1359 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 1360 { 1361 struct Scsi_Host *host; 1362 struct lpfc_hba *phba; 1363 struct lpfc_sli *psli; 1364 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 1365 unsigned long bar0map_len, bar2map_len; 1366 int error = -ENODEV, retval; 1367 int i; 1368 uint16_t iotag; 1369 1370 if (pci_enable_device(pdev)) 1371 goto out; 1372 if (pci_request_regions(pdev, LPFC_DRIVER_NAME)) 1373 goto out_disable_device; 1374 1375 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba)); 1376 if (!host) 1377 goto out_release_regions; 1378 1379 phba = (struct lpfc_hba*)host->hostdata; 1380 memset(phba, 0, sizeof (struct lpfc_hba)); 1381 phba->host = host; 1382 1383 phba->fc_flag |= FC_LOADING; 1384 phba->pcidev = pdev; 1385 1386 /* Assign an unused board number */ 1387 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL)) 1388 goto out_put_host; 1389 1390 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no); 1391 if (error) 1392 goto out_put_host; 1393 1394 host->unique_id = phba->brd_no; 1395 init_MUTEX(&phba->hba_can_block); 1396 INIT_LIST_HEAD(&phba->ctrspbuflist); 1397 INIT_LIST_HEAD(&phba->rnidrspbuflist); 1398 INIT_LIST_HEAD(&phba->freebufList); 1399 1400 /* Initialize timers used by driver */ 1401 init_timer(&phba->fc_estabtmo); 1402 phba->fc_estabtmo.function = lpfc_establish_link_tmo; 1403 phba->fc_estabtmo.data = (unsigned long)phba; 1404 init_timer(&phba->fc_disctmo); 1405 phba->fc_disctmo.function = lpfc_disc_timeout; 1406 phba->fc_disctmo.data = (unsigned long)phba; 1407 1408 init_timer(&phba->fc_fdmitmo); 1409 phba->fc_fdmitmo.function = lpfc_fdmi_tmo; 1410 phba->fc_fdmitmo.data = (unsigned long)phba; 1411 init_timer(&phba->els_tmofunc); 1412 phba->els_tmofunc.function = lpfc_els_timeout; 1413 phba->els_tmofunc.data = (unsigned long)phba; 1414 psli = &phba->sli; 1415 init_timer(&psli->mbox_tmo); 1416 psli->mbox_tmo.function = lpfc_mbox_timeout; 1417 psli->mbox_tmo.data = (unsigned long)phba; 1418 1419 /* 1420 * Get all the module params for configuring this host and then 1421 * establish the host parameters. 1422 */ 1423 lpfc_get_cfgparam(phba); 1424 1425 host->max_id = LPFC_MAX_TARGET; 1426 host->max_lun = phba->cfg_max_luns; 1427 host->this_id = -1; 1428 1429 /* Initialize all internally managed lists. */ 1430 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1431 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1432 INIT_LIST_HEAD(&phba->fc_unused_list); 1433 INIT_LIST_HEAD(&phba->fc_plogi_list); 1434 INIT_LIST_HEAD(&phba->fc_adisc_list); 1435 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1436 INIT_LIST_HEAD(&phba->fc_prli_list); 1437 INIT_LIST_HEAD(&phba->fc_npr_list); 1438 1439 1440 pci_set_master(pdev); 1441 retval = pci_set_mwi(pdev); 1442 if (retval) 1443 dev_printk(KERN_WARNING, &pdev->dev, 1444 "Warning: pci_set_mwi returned %d\n", retval); 1445 1446 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0) 1447 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0) 1448 goto out_idr_remove; 1449 1450 /* 1451 * Get the bus address of Bar0 and Bar2 and the number of bytes 1452 * required by each mapping. 1453 */ 1454 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0); 1455 bar0map_len = pci_resource_len(phba->pcidev, 0); 1456 1457 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2); 1458 bar2map_len = pci_resource_len(phba->pcidev, 2); 1459 1460 /* Map HBA SLIM and Control Registers to a kernel virtual address. */ 1461 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 1462 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 1463 1464 /* Allocate memory for SLI-2 structures */ 1465 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE, 1466 &phba->slim2p_mapping, GFP_KERNEL); 1467 if (!phba->slim2p) 1468 goto out_iounmap; 1469 1470 memset(phba->slim2p, 0, SLI2_SLIM_SIZE); 1471 1472 /* Initialize the SLI Layer to run with lpfc HBAs. */ 1473 lpfc_sli_setup(phba); 1474 lpfc_sli_queue_setup(phba); 1475 1476 error = lpfc_mem_alloc(phba); 1477 if (error) 1478 goto out_free_slim; 1479 1480 /* Initialize and populate the iocb list per host. */ 1481 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 1482 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) { 1483 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 1484 if (iocbq_entry == NULL) { 1485 printk(KERN_ERR "%s: only allocated %d iocbs of " 1486 "expected %d count. Unloading driver.\n", 1487 __FUNCTION__, i, LPFC_IOCB_LIST_CNT); 1488 error = -ENOMEM; 1489 goto out_free_iocbq; 1490 } 1491 1492 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq)); 1493 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 1494 if (iotag == 0) { 1495 kfree (iocbq_entry); 1496 printk(KERN_ERR "%s: failed to allocate IOTAG. " 1497 "Unloading driver.\n", 1498 __FUNCTION__); 1499 error = -ENOMEM; 1500 goto out_free_iocbq; 1501 } 1502 spin_lock_irq(phba->host->host_lock); 1503 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 1504 phba->total_iocbq_bufs++; 1505 spin_unlock_irq(phba->host->host_lock); 1506 } 1507 1508 /* Initialize HBA structure */ 1509 phba->fc_edtov = FF_DEF_EDTOV; 1510 phba->fc_ratov = FF_DEF_RATOV; 1511 phba->fc_altov = FF_DEF_ALTOV; 1512 phba->fc_arbtov = FF_DEF_ARBTOV; 1513 1514 INIT_LIST_HEAD(&phba->work_list); 1515 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT); 1516 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 1517 1518 /* Startup the kernel thread for this host adapter. */ 1519 phba->worker_thread = kthread_run(lpfc_do_work, phba, 1520 "lpfc_worker_%d", phba->brd_no); 1521 if (IS_ERR(phba->worker_thread)) { 1522 error = PTR_ERR(phba->worker_thread); 1523 goto out_free_iocbq; 1524 } 1525 1526 /* We can rely on a queue depth attribute only after SLI HBA setup */ 1527 host->can_queue = phba->cfg_hba_queue_depth - 10; 1528 1529 /* Tell the midlayer we support 16 byte commands */ 1530 host->max_cmd_len = 16; 1531 1532 /* Initialize the list of scsi buffers used by driver for scsi IO. */ 1533 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list); 1534 1535 host->transportt = lpfc_transport_template; 1536 host->hostdata[0] = (unsigned long)phba; 1537 pci_set_drvdata(pdev, host); 1538 error = scsi_add_host(host, &pdev->dev); 1539 if (error) 1540 goto out_kthread_stop; 1541 1542 error = lpfc_alloc_sysfs_attr(phba); 1543 if (error) 1544 goto out_kthread_stop; 1545 1546 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ, 1547 LPFC_DRIVER_NAME, phba); 1548 if (error) { 1549 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1550 "%d:0451 Enable interrupt handler failed\n", 1551 phba->brd_no); 1552 goto out_free_sysfs_attr; 1553 } 1554 phba->MBslimaddr = phba->slim_memmap_p; 1555 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 1556 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 1557 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 1558 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 1559 1560 error = lpfc_sli_hba_setup(phba); 1561 if (error) 1562 goto out_free_irq; 1563 1564 /* 1565 * set fixed host attributes 1566 * Must done after lpfc_sli_hba_setup() 1567 */ 1568 1569 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn); 1570 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn); 1571 fc_host_supported_classes(host) = FC_COS_CLASS3; 1572 1573 memset(fc_host_supported_fc4s(host), 0, 1574 sizeof(fc_host_supported_fc4s(host))); 1575 fc_host_supported_fc4s(host)[2] = 1; 1576 fc_host_supported_fc4s(host)[7] = 1; 1577 1578 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host)); 1579 1580 fc_host_supported_speeds(host) = 0; 1581 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) { 1582 case VIPER_JEDEC_ID: 1583 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT; 1584 break; 1585 case HELIOS_JEDEC_ID: 1586 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT; 1587 /* Fall through */ 1588 case CENTAUR_2G_JEDEC_ID: 1589 case PEGASUS_JEDEC_ID: 1590 case THOR_JEDEC_ID: 1591 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT; 1592 /* Fall through */ 1593 default: 1594 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT; 1595 } 1596 1597 fc_host_maxframe_size(host) = 1598 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 1599 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb); 1600 1601 /* This value is also unchanging */ 1602 memset(fc_host_active_fc4s(host), 0, 1603 sizeof(fc_host_active_fc4s(host))); 1604 fc_host_active_fc4s(host)[2] = 1; 1605 fc_host_active_fc4s(host)[7] = 1; 1606 1607 spin_lock_irq(phba->host->host_lock); 1608 phba->fc_flag &= ~FC_LOADING; 1609 spin_unlock_irq(phba->host->host_lock); 1610 return 0; 1611 1612 out_free_irq: 1613 lpfc_stop_timer(phba); 1614 phba->work_hba_events = 0; 1615 free_irq(phba->pcidev->irq, phba); 1616 out_free_sysfs_attr: 1617 lpfc_free_sysfs_attr(phba); 1618 out_kthread_stop: 1619 kthread_stop(phba->worker_thread); 1620 out_free_iocbq: 1621 list_for_each_entry_safe(iocbq_entry, iocbq_next, 1622 &phba->lpfc_iocb_list, list) { 1623 spin_lock_irq(phba->host->host_lock); 1624 kfree(iocbq_entry); 1625 phba->total_iocbq_bufs--; 1626 spin_unlock_irq(phba->host->host_lock); 1627 } 1628 lpfc_mem_free(phba); 1629 out_free_slim: 1630 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p, 1631 phba->slim2p_mapping); 1632 out_iounmap: 1633 iounmap(phba->ctrl_regs_memmap_p); 1634 iounmap(phba->slim_memmap_p); 1635 out_idr_remove: 1636 idr_remove(&lpfc_hba_index, phba->brd_no); 1637 out_put_host: 1638 scsi_host_put(host); 1639 out_release_regions: 1640 pci_release_regions(pdev); 1641 out_disable_device: 1642 pci_disable_device(pdev); 1643 out: 1644 return error; 1645 } 1646 1647 static void __devexit 1648 lpfc_pci_remove_one(struct pci_dev *pdev) 1649 { 1650 struct Scsi_Host *host = pci_get_drvdata(pdev); 1651 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata[0]; 1652 unsigned long iflag; 1653 1654 lpfc_free_sysfs_attr(phba); 1655 1656 spin_lock_irqsave(phba->host->host_lock, iflag); 1657 phba->fc_flag |= FC_UNLOADING; 1658 1659 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1660 1661 fc_remove_host(phba->host); 1662 scsi_remove_host(phba->host); 1663 1664 kthread_stop(phba->worker_thread); 1665 1666 /* 1667 * Bring down the SLI Layer. This step disable all interrupts, 1668 * clears the rings, discards all mailbox commands, and resets 1669 * the HBA. 1670 */ 1671 lpfc_sli_hba_down(phba); 1672 1673 /* Release the irq reservation */ 1674 free_irq(phba->pcidev->irq, phba); 1675 1676 lpfc_cleanup(phba, 0); 1677 lpfc_stop_timer(phba); 1678 phba->work_hba_events = 0; 1679 1680 /* 1681 * Call scsi_free before mem_free since scsi bufs are released to their 1682 * corresponding pools here. 1683 */ 1684 lpfc_scsi_free(phba); 1685 lpfc_mem_free(phba); 1686 1687 /* Free resources associated with SLI2 interface */ 1688 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 1689 phba->slim2p, phba->slim2p_mapping); 1690 1691 /* unmap adapter SLIM and Control Registers */ 1692 iounmap(phba->ctrl_regs_memmap_p); 1693 iounmap(phba->slim_memmap_p); 1694 1695 pci_release_regions(phba->pcidev); 1696 pci_disable_device(phba->pcidev); 1697 1698 idr_remove(&lpfc_hba_index, phba->brd_no); 1699 scsi_host_put(phba->host); 1700 1701 pci_set_drvdata(pdev, NULL); 1702 } 1703 1704 static struct pci_device_id lpfc_id_table[] = { 1705 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER, 1706 PCI_ANY_ID, PCI_ANY_ID, }, 1707 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY, 1708 PCI_ANY_ID, PCI_ANY_ID, }, 1709 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR, 1710 PCI_ANY_ID, PCI_ANY_ID, }, 1711 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS, 1712 PCI_ANY_ID, PCI_ANY_ID, }, 1713 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR, 1714 PCI_ANY_ID, PCI_ANY_ID, }, 1715 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY, 1716 PCI_ANY_ID, PCI_ANY_ID, }, 1717 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY, 1718 PCI_ANY_ID, PCI_ANY_ID, }, 1719 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY, 1720 PCI_ANY_ID, PCI_ANY_ID, }, 1721 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY, 1722 PCI_ANY_ID, PCI_ANY_ID, }, 1723 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE, 1724 PCI_ANY_ID, PCI_ANY_ID, }, 1725 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP, 1726 PCI_ANY_ID, PCI_ANY_ID, }, 1727 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP, 1728 PCI_ANY_ID, PCI_ANY_ID, }, 1729 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS, 1730 PCI_ANY_ID, PCI_ANY_ID, }, 1731 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP, 1732 PCI_ANY_ID, PCI_ANY_ID, }, 1733 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP, 1734 PCI_ANY_ID, PCI_ANY_ID, }, 1735 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID, 1736 PCI_ANY_ID, PCI_ANY_ID, }, 1737 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB, 1738 PCI_ANY_ID, PCI_ANY_ID, }, 1739 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR, 1740 PCI_ANY_ID, PCI_ANY_ID, }, 1741 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP, 1742 PCI_ANY_ID, PCI_ANY_ID, }, 1743 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP, 1744 PCI_ANY_ID, PCI_ANY_ID, }, 1745 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID, 1746 PCI_ANY_ID, PCI_ANY_ID, }, 1747 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB, 1748 PCI_ANY_ID, PCI_ANY_ID, }, 1749 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY, 1750 PCI_ANY_ID, PCI_ANY_ID, }, 1751 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101, 1752 PCI_ANY_ID, PCI_ANY_ID, }, 1753 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S, 1754 PCI_ANY_ID, PCI_ANY_ID, }, 1755 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S, 1756 PCI_ANY_ID, PCI_ANY_ID, }, 1757 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S, 1758 PCI_ANY_ID, PCI_ANY_ID, }, 1759 { 0 } 1760 }; 1761 1762 MODULE_DEVICE_TABLE(pci, lpfc_id_table); 1763 1764 static struct pci_driver lpfc_driver = { 1765 .name = LPFC_DRIVER_NAME, 1766 .id_table = lpfc_id_table, 1767 .probe = lpfc_pci_probe_one, 1768 .remove = __devexit_p(lpfc_pci_remove_one), 1769 }; 1770 1771 static int __init 1772 lpfc_init(void) 1773 { 1774 int error = 0; 1775 1776 printk(LPFC_MODULE_DESC "\n"); 1777 printk(LPFC_COPYRIGHT "\n"); 1778 1779 lpfc_transport_template = 1780 fc_attach_transport(&lpfc_transport_functions); 1781 if (!lpfc_transport_template) 1782 return -ENOMEM; 1783 error = pci_register_driver(&lpfc_driver); 1784 if (error) 1785 fc_release_transport(lpfc_transport_template); 1786 1787 return error; 1788 } 1789 1790 static void __exit 1791 lpfc_exit(void) 1792 { 1793 pci_unregister_driver(&lpfc_driver); 1794 fc_release_transport(lpfc_transport_template); 1795 } 1796 1797 module_init(lpfc_init); 1798 module_exit(lpfc_exit); 1799 MODULE_LICENSE("GPL"); 1800 MODULE_DESCRIPTION(LPFC_MODULE_DESC); 1801 MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com"); 1802 MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 1803