1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <linux/blkdev.h> 25 #include <linux/delay.h> 26 #include <linux/dma-mapping.h> 27 #include <linux/idr.h> 28 #include <linux/interrupt.h> 29 #include <linux/module.h> 30 #include <linux/kthread.h> 31 #include <linux/pci.h> 32 #include <linux/spinlock.h> 33 #include <linux/sched/clock.h> 34 #include <linux/ctype.h> 35 #include <linux/slab.h> 36 #include <linux/firmware.h> 37 #include <linux/miscdevice.h> 38 #include <linux/percpu.h> 39 #include <linux/irq.h> 40 #include <linux/bitops.h> 41 #include <linux/crash_dump.h> 42 #include <linux/cpu.h> 43 #include <linux/cpuhotplug.h> 44 45 #include <scsi/scsi.h> 46 #include <scsi/scsi_device.h> 47 #include <scsi/scsi_host.h> 48 #include <scsi/scsi_transport_fc.h> 49 #include <scsi/scsi_tcq.h> 50 #include <scsi/fc/fc_fs.h> 51 52 #include "lpfc_hw4.h" 53 #include "lpfc_hw.h" 54 #include "lpfc_sli.h" 55 #include "lpfc_sli4.h" 56 #include "lpfc_nl.h" 57 #include "lpfc_disc.h" 58 #include "lpfc.h" 59 #include "lpfc_scsi.h" 60 #include "lpfc_nvme.h" 61 #include "lpfc_logmsg.h" 62 #include "lpfc_crtn.h" 63 #include "lpfc_vport.h" 64 #include "lpfc_version.h" 65 #include "lpfc_ids.h" 66 67 static enum cpuhp_state lpfc_cpuhp_state; 68 /* Used when mapping IRQ vectors in a driver centric manner */ 69 static uint32_t lpfc_present_cpu; 70 static bool lpfc_pldv_detect; 71 72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); 73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba); 74 static void lpfc_cpuhp_add(struct lpfc_hba *phba); 75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 76 static int lpfc_post_rcv_buf(struct lpfc_hba *); 77 static int lpfc_sli4_queue_verify(struct lpfc_hba *); 78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); 79 static int lpfc_setup_endian_order(struct lpfc_hba *); 80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); 81 static void lpfc_free_els_sgl_list(struct lpfc_hba *); 82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); 83 static void lpfc_init_sgl_list(struct lpfc_hba *); 84 static int lpfc_init_active_sgl_array(struct lpfc_hba *); 85 static void lpfc_free_active_sgl(struct lpfc_hba *); 86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); 87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); 88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); 89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); 90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); 91 static void lpfc_sli4_disable_intr(struct lpfc_hba *); 92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); 93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); 94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); 95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); 96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *); 97 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba); 98 99 static struct scsi_transport_template *lpfc_transport_template = NULL; 100 static struct scsi_transport_template *lpfc_vport_transport_template = NULL; 101 static DEFINE_IDR(lpfc_hba_index); 102 #define LPFC_NVMET_BUF_POST 254 103 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport); 104 105 /** 106 * lpfc_config_port_prep - Perform lpfc initialization prior to config port 107 * @phba: pointer to lpfc hba data structure. 108 * 109 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT 110 * mailbox command. It retrieves the revision information from the HBA and 111 * collects the Vital Product Data (VPD) about the HBA for preparing the 112 * configuration of the HBA. 113 * 114 * Return codes: 115 * 0 - success. 116 * -ERESTART - requests the SLI layer to reset the HBA and try again. 117 * Any other value - indicates an error. 118 **/ 119 int 120 lpfc_config_port_prep(struct lpfc_hba *phba) 121 { 122 lpfc_vpd_t *vp = &phba->vpd; 123 int i = 0, rc; 124 LPFC_MBOXQ_t *pmb; 125 MAILBOX_t *mb; 126 char *lpfc_vpd_data = NULL; 127 uint16_t offset = 0; 128 static char licensed[56] = 129 "key unlock for use with gnu public licensed code only\0"; 130 static int init_key = 1; 131 132 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 133 if (!pmb) { 134 phba->link_state = LPFC_HBA_ERROR; 135 return -ENOMEM; 136 } 137 138 mb = &pmb->u.mb; 139 phba->link_state = LPFC_INIT_MBX_CMDS; 140 141 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 142 if (init_key) { 143 uint32_t *ptext = (uint32_t *) licensed; 144 145 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 146 *ptext = cpu_to_be32(*ptext); 147 init_key = 0; 148 } 149 150 lpfc_read_nv(phba, pmb); 151 memset((char*)mb->un.varRDnvp.rsvd3, 0, 152 sizeof (mb->un.varRDnvp.rsvd3)); 153 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 154 sizeof (licensed)); 155 156 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 157 158 if (rc != MBX_SUCCESS) { 159 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 160 "0324 Config Port initialization " 161 "error, mbxCmd x%x READ_NVPARM, " 162 "mbxStatus x%x\n", 163 mb->mbxCommand, mb->mbxStatus); 164 mempool_free(pmb, phba->mbox_mem_pool); 165 return -ERESTART; 166 } 167 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 168 sizeof(phba->wwnn)); 169 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, 170 sizeof(phba->wwpn)); 171 } 172 173 /* 174 * Clear all option bits except LPFC_SLI3_BG_ENABLED, 175 * which was already set in lpfc_get_cfgparam() 176 */ 177 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; 178 179 /* Setup and issue mailbox READ REV command */ 180 lpfc_read_rev(phba, pmb); 181 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 182 if (rc != MBX_SUCCESS) { 183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 184 "0439 Adapter failed to init, mbxCmd x%x " 185 "READ_REV, mbxStatus x%x\n", 186 mb->mbxCommand, mb->mbxStatus); 187 mempool_free( pmb, phba->mbox_mem_pool); 188 return -ERESTART; 189 } 190 191 192 /* 193 * The value of rr must be 1 since the driver set the cv field to 1. 194 * This setting requires the FW to set all revision fields. 195 */ 196 if (mb->un.varRdRev.rr == 0) { 197 vp->rev.rBit = 0; 198 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 199 "0440 Adapter failed to init, READ_REV has " 200 "missing revision information.\n"); 201 mempool_free(pmb, phba->mbox_mem_pool); 202 return -ERESTART; 203 } 204 205 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { 206 mempool_free(pmb, phba->mbox_mem_pool); 207 return -EINVAL; 208 } 209 210 /* Save information as VPD data */ 211 vp->rev.rBit = 1; 212 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); 213 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 214 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 215 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 216 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 217 vp->rev.biuRev = mb->un.varRdRev.biuRev; 218 vp->rev.smRev = mb->un.varRdRev.smRev; 219 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 220 vp->rev.endecRev = mb->un.varRdRev.endecRev; 221 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 222 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 223 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 224 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 225 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 226 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 227 228 /* If the sli feature level is less then 9, we must 229 * tear down all RPIs and VPIs on link down if NPIV 230 * is enabled. 231 */ 232 if (vp->rev.feaLevelHigh < 9) 233 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; 234 235 if (lpfc_is_LC_HBA(phba->pcidev->device)) 236 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 237 sizeof (phba->RandomData)); 238 239 /* Get adapter VPD information */ 240 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 241 if (!lpfc_vpd_data) 242 goto out_free_mbox; 243 do { 244 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); 245 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 246 247 if (rc != MBX_SUCCESS) { 248 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 249 "0441 VPD not present on adapter, " 250 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 251 mb->mbxCommand, mb->mbxStatus); 252 mb->un.varDmp.word_cnt = 0; 253 } 254 /* dump mem may return a zero when finished or we got a 255 * mailbox error, either way we are done. 256 */ 257 if (mb->un.varDmp.word_cnt == 0) 258 break; 259 260 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) 261 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; 262 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, 263 lpfc_vpd_data + offset, 264 mb->un.varDmp.word_cnt); 265 offset += mb->un.varDmp.word_cnt; 266 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); 267 268 lpfc_parse_vpd(phba, lpfc_vpd_data, offset); 269 270 kfree(lpfc_vpd_data); 271 out_free_mbox: 272 mempool_free(pmb, phba->mbox_mem_pool); 273 return 0; 274 } 275 276 /** 277 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd 278 * @phba: pointer to lpfc hba data structure. 279 * @pmboxq: pointer to the driver internal queue element for mailbox command. 280 * 281 * This is the completion handler for driver's configuring asynchronous event 282 * mailbox command to the device. If the mailbox command returns successfully, 283 * it will set internal async event support flag to 1; otherwise, it will 284 * set internal async event support flag to 0. 285 **/ 286 static void 287 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 288 { 289 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) 290 phba->temp_sensor_support = 1; 291 else 292 phba->temp_sensor_support = 0; 293 mempool_free(pmboxq, phba->mbox_mem_pool); 294 return; 295 } 296 297 /** 298 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler 299 * @phba: pointer to lpfc hba data structure. 300 * @pmboxq: pointer to the driver internal queue element for mailbox command. 301 * 302 * This is the completion handler for dump mailbox command for getting 303 * wake up parameters. When this command complete, the response contain 304 * Option rom version of the HBA. This function translate the version number 305 * into a human readable string and store it in OptionROMVersion. 306 **/ 307 static void 308 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) 309 { 310 struct prog_id *prg; 311 uint32_t prog_id_word; 312 char dist = ' '; 313 /* character array used for decoding dist type. */ 314 char dist_char[] = "nabx"; 315 316 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { 317 mempool_free(pmboxq, phba->mbox_mem_pool); 318 return; 319 } 320 321 prg = (struct prog_id *) &prog_id_word; 322 323 /* word 7 contain option rom version */ 324 prog_id_word = pmboxq->u.mb.un.varWords[7]; 325 326 /* Decode the Option rom version word to a readable string */ 327 dist = dist_char[prg->dist]; 328 329 if ((prg->dist == 3) && (prg->num == 0)) 330 snprintf(phba->OptionROMVersion, 32, "%d.%d%d", 331 prg->ver, prg->rev, prg->lev); 332 else 333 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", 334 prg->ver, prg->rev, prg->lev, 335 dist, prg->num); 336 mempool_free(pmboxq, phba->mbox_mem_pool); 337 return; 338 } 339 340 /** 341 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, 342 * @vport: pointer to lpfc vport data structure. 343 * 344 * 345 * Return codes 346 * None. 347 **/ 348 void 349 lpfc_update_vport_wwn(struct lpfc_vport *vport) 350 { 351 struct lpfc_hba *phba = vport->phba; 352 353 /* 354 * If the name is empty or there exists a soft name 355 * then copy the service params name, otherwise use the fc name 356 */ 357 if (vport->fc_nodename.u.wwn[0] == 0) 358 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, 359 sizeof(struct lpfc_name)); 360 else 361 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, 362 sizeof(struct lpfc_name)); 363 364 /* 365 * If the port name has changed, then set the Param changes flag 366 * to unreg the login 367 */ 368 if (vport->fc_portname.u.wwn[0] != 0 && 369 memcmp(&vport->fc_portname, &vport->fc_sparam.portName, 370 sizeof(struct lpfc_name))) { 371 vport->vport_flag |= FAWWPN_PARAM_CHG; 372 373 if (phba->sli_rev == LPFC_SLI_REV4 && 374 vport->port_type == LPFC_PHYSICAL_PORT && 375 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) { 376 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG)) 377 phba->sli4_hba.fawwpn_flag &= 378 ~LPFC_FAWWPN_FABRIC; 379 lpfc_printf_log(phba, KERN_INFO, 380 LOG_SLI | LOG_DISCOVERY | LOG_ELS, 381 "2701 FA-PWWN change WWPN from %llx to " 382 "%llx: vflag x%x fawwpn_flag x%x\n", 383 wwn_to_u64(vport->fc_portname.u.wwn), 384 wwn_to_u64 385 (vport->fc_sparam.portName.u.wwn), 386 vport->vport_flag, 387 phba->sli4_hba.fawwpn_flag); 388 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 389 sizeof(struct lpfc_name)); 390 } 391 } 392 393 if (vport->fc_portname.u.wwn[0] == 0) 394 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 395 sizeof(struct lpfc_name)); 396 else 397 memcpy(&vport->fc_sparam.portName, &vport->fc_portname, 398 sizeof(struct lpfc_name)); 399 } 400 401 /** 402 * lpfc_config_port_post - Perform lpfc initialization after config port 403 * @phba: pointer to lpfc hba data structure. 404 * 405 * This routine will do LPFC initialization after the CONFIG_PORT mailbox 406 * command call. It performs all internal resource and state setups on the 407 * port: post IOCB buffers, enable appropriate host interrupt attentions, 408 * ELS ring timers, etc. 409 * 410 * Return codes 411 * 0 - success. 412 * Any other value - error. 413 **/ 414 int 415 lpfc_config_port_post(struct lpfc_hba *phba) 416 { 417 struct lpfc_vport *vport = phba->pport; 418 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 419 LPFC_MBOXQ_t *pmb; 420 MAILBOX_t *mb; 421 struct lpfc_dmabuf *mp; 422 struct lpfc_sli *psli = &phba->sli; 423 uint32_t status, timeout; 424 int i, j; 425 int rc; 426 427 spin_lock_irq(&phba->hbalock); 428 /* 429 * If the Config port completed correctly the HBA is not 430 * over heated any more. 431 */ 432 if (phba->over_temp_state == HBA_OVER_TEMP) 433 phba->over_temp_state = HBA_NORMAL_TEMP; 434 spin_unlock_irq(&phba->hbalock); 435 436 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 437 if (!pmb) { 438 phba->link_state = LPFC_HBA_ERROR; 439 return -ENOMEM; 440 } 441 mb = &pmb->u.mb; 442 443 /* Get login parameters for NID. */ 444 rc = lpfc_read_sparam(phba, pmb, 0); 445 if (rc) { 446 mempool_free(pmb, phba->mbox_mem_pool); 447 return -ENOMEM; 448 } 449 450 pmb->vport = vport; 451 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 452 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 453 "0448 Adapter failed init, mbxCmd x%x " 454 "READ_SPARM mbxStatus x%x\n", 455 mb->mbxCommand, mb->mbxStatus); 456 phba->link_state = LPFC_HBA_ERROR; 457 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 458 return -EIO; 459 } 460 461 mp = (struct lpfc_dmabuf *)pmb->ctx_buf; 462 463 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no 464 * longer needed. Prevent unintended ctx_buf access as the mbox is 465 * reused. 466 */ 467 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); 468 lpfc_mbuf_free(phba, mp->virt, mp->phys); 469 kfree(mp); 470 pmb->ctx_buf = NULL; 471 lpfc_update_vport_wwn(vport); 472 473 /* Update the fc_host data structures with new wwn. */ 474 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 475 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 476 fc_host_max_npiv_vports(shost) = phba->max_vpi; 477 478 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 479 /* This should be consolidated into parse_vpd ? - mr */ 480 if (phba->SerialNumber[0] == 0) { 481 uint8_t *outptr; 482 483 outptr = &vport->fc_nodename.u.s.IEEE[0]; 484 for (i = 0; i < 12; i++) { 485 status = *outptr++; 486 j = ((status & 0xf0) >> 4); 487 if (j <= 9) 488 phba->SerialNumber[i] = 489 (char)((uint8_t) 0x30 + (uint8_t) j); 490 else 491 phba->SerialNumber[i] = 492 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 493 i++; 494 j = (status & 0xf); 495 if (j <= 9) 496 phba->SerialNumber[i] = 497 (char)((uint8_t) 0x30 + (uint8_t) j); 498 else 499 phba->SerialNumber[i] = 500 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 501 } 502 } 503 504 lpfc_read_config(phba, pmb); 505 pmb->vport = vport; 506 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 508 "0453 Adapter failed to init, mbxCmd x%x " 509 "READ_CONFIG, mbxStatus x%x\n", 510 mb->mbxCommand, mb->mbxStatus); 511 phba->link_state = LPFC_HBA_ERROR; 512 mempool_free( pmb, phba->mbox_mem_pool); 513 return -EIO; 514 } 515 516 /* Check if the port is disabled */ 517 lpfc_sli_read_link_ste(phba); 518 519 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 520 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { 521 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 522 "3359 HBA queue depth changed from %d to %d\n", 523 phba->cfg_hba_queue_depth, 524 mb->un.varRdConfig.max_xri); 525 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; 526 } 527 528 phba->lmt = mb->un.varRdConfig.lmt; 529 530 /* Get the default values for Model Name and Description */ 531 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 532 533 phba->link_state = LPFC_LINK_DOWN; 534 535 /* Only process IOCBs on ELS ring till hba_state is READY */ 536 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) 537 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; 538 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) 539 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; 540 541 /* Post receive buffers for desired rings */ 542 if (phba->sli_rev != 3) 543 lpfc_post_rcv_buf(phba); 544 545 /* 546 * Configure HBA MSI-X attention conditions to messages if MSI-X mode 547 */ 548 if (phba->intr_type == MSIX) { 549 rc = lpfc_config_msi(phba, pmb); 550 if (rc) { 551 mempool_free(pmb, phba->mbox_mem_pool); 552 return -EIO; 553 } 554 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 555 if (rc != MBX_SUCCESS) { 556 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 557 "0352 Config MSI mailbox command " 558 "failed, mbxCmd x%x, mbxStatus x%x\n", 559 pmb->u.mb.mbxCommand, 560 pmb->u.mb.mbxStatus); 561 mempool_free(pmb, phba->mbox_mem_pool); 562 return -EIO; 563 } 564 } 565 566 spin_lock_irq(&phba->hbalock); 567 /* Initialize ERATT handling flag */ 568 phba->hba_flag &= ~HBA_ERATT_HANDLED; 569 570 /* Enable appropriate host interrupts */ 571 if (lpfc_readl(phba->HCregaddr, &status)) { 572 spin_unlock_irq(&phba->hbalock); 573 return -EIO; 574 } 575 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 576 if (psli->num_rings > 0) 577 status |= HC_R0INT_ENA; 578 if (psli->num_rings > 1) 579 status |= HC_R1INT_ENA; 580 if (psli->num_rings > 2) 581 status |= HC_R2INT_ENA; 582 if (psli->num_rings > 3) 583 status |= HC_R3INT_ENA; 584 585 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 586 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 587 status &= ~(HC_R0INT_ENA); 588 589 writel(status, phba->HCregaddr); 590 readl(phba->HCregaddr); /* flush */ 591 spin_unlock_irq(&phba->hbalock); 592 593 /* Set up ring-0 (ELS) timer */ 594 timeout = phba->fc_ratov * 2; 595 mod_timer(&vport->els_tmofunc, 596 jiffies + msecs_to_jiffies(1000 * timeout)); 597 /* Set up heart beat (HB) timer */ 598 mod_timer(&phba->hb_tmofunc, 599 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 600 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 601 phba->last_completion_time = jiffies; 602 /* Set up error attention (ERATT) polling timer */ 603 mod_timer(&phba->eratt_poll, 604 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); 605 606 if (phba->hba_flag & LINK_DISABLED) { 607 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 608 "2598 Adapter Link is disabled.\n"); 609 lpfc_down_link(phba, pmb); 610 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 611 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 612 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 613 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 614 "2599 Adapter failed to issue DOWN_LINK" 615 " mbox command rc 0x%x\n", rc); 616 617 mempool_free(pmb, phba->mbox_mem_pool); 618 return -EIO; 619 } 620 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { 621 mempool_free(pmb, phba->mbox_mem_pool); 622 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); 623 if (rc) 624 return rc; 625 } 626 /* MBOX buffer will be freed in mbox compl */ 627 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 628 if (!pmb) { 629 phba->link_state = LPFC_HBA_ERROR; 630 return -ENOMEM; 631 } 632 633 lpfc_config_async(phba, pmb, LPFC_ELS_RING); 634 pmb->mbox_cmpl = lpfc_config_async_cmpl; 635 pmb->vport = phba->pport; 636 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 637 638 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 639 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 640 "0456 Adapter failed to issue " 641 "ASYNCEVT_ENABLE mbox status x%x\n", 642 rc); 643 mempool_free(pmb, phba->mbox_mem_pool); 644 } 645 646 /* Get Option rom version */ 647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 648 if (!pmb) { 649 phba->link_state = LPFC_HBA_ERROR; 650 return -ENOMEM; 651 } 652 653 lpfc_dump_wakeup_param(phba, pmb); 654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; 655 pmb->vport = phba->pport; 656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 657 658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 659 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 660 "0435 Adapter failed " 661 "to get Option ROM version status x%x\n", rc); 662 mempool_free(pmb, phba->mbox_mem_pool); 663 } 664 665 return 0; 666 } 667 668 /** 669 * lpfc_sli4_refresh_params - update driver copy of params. 670 * @phba: Pointer to HBA context object. 671 * 672 * This is called to refresh driver copy of dynamic fields from the 673 * common_get_sli4_parameters descriptor. 674 **/ 675 int 676 lpfc_sli4_refresh_params(struct lpfc_hba *phba) 677 { 678 LPFC_MBOXQ_t *mboxq; 679 struct lpfc_mqe *mqe; 680 struct lpfc_sli4_parameters *mbx_sli4_parameters; 681 int length, rc; 682 683 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 684 if (!mboxq) 685 return -ENOMEM; 686 687 mqe = &mboxq->u.mqe; 688 /* Read the port's SLI4 Config Parameters */ 689 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 690 sizeof(struct lpfc_sli4_cfg_mhdr)); 691 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 692 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 693 length, LPFC_SLI4_MBX_EMBED); 694 695 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 696 if (unlikely(rc)) { 697 mempool_free(mboxq, phba->mbox_mem_pool); 698 return rc; 699 } 700 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 701 phba->sli4_hba.pc_sli4_params.mi_cap = 702 bf_get(cfg_mi_ver, mbx_sli4_parameters); 703 704 /* Are we forcing MI off via module parameter? */ 705 if (phba->cfg_enable_mi) 706 phba->sli4_hba.pc_sli4_params.mi_ver = 707 bf_get(cfg_mi_ver, mbx_sli4_parameters); 708 else 709 phba->sli4_hba.pc_sli4_params.mi_ver = 0; 710 711 phba->sli4_hba.pc_sli4_params.cmf = 712 bf_get(cfg_cmf, mbx_sli4_parameters); 713 phba->sli4_hba.pc_sli4_params.pls = 714 bf_get(cfg_pvl, mbx_sli4_parameters); 715 716 mempool_free(mboxq, phba->mbox_mem_pool); 717 return rc; 718 } 719 720 /** 721 * lpfc_hba_init_link - Initialize the FC link 722 * @phba: pointer to lpfc hba data structure. 723 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 724 * 725 * This routine will issue the INIT_LINK mailbox command call. 726 * It is available to other drivers through the lpfc_hba data 727 * structure for use as a delayed link up mechanism with the 728 * module parameter lpfc_suppress_link_up. 729 * 730 * Return code 731 * 0 - success 732 * Any other value - error 733 **/ 734 static int 735 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) 736 { 737 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); 738 } 739 740 /** 741 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology 742 * @phba: pointer to lpfc hba data structure. 743 * @fc_topology: desired fc topology. 744 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 745 * 746 * This routine will issue the INIT_LINK mailbox command call. 747 * It is available to other drivers through the lpfc_hba data 748 * structure for use as a delayed link up mechanism with the 749 * module parameter lpfc_suppress_link_up. 750 * 751 * Return code 752 * 0 - success 753 * Any other value - error 754 **/ 755 int 756 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, 757 uint32_t flag) 758 { 759 struct lpfc_vport *vport = phba->pport; 760 LPFC_MBOXQ_t *pmb; 761 MAILBOX_t *mb; 762 int rc; 763 764 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 765 if (!pmb) { 766 phba->link_state = LPFC_HBA_ERROR; 767 return -ENOMEM; 768 } 769 mb = &pmb->u.mb; 770 pmb->vport = vport; 771 772 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || 773 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && 774 !(phba->lmt & LMT_1Gb)) || 775 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && 776 !(phba->lmt & LMT_2Gb)) || 777 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && 778 !(phba->lmt & LMT_4Gb)) || 779 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && 780 !(phba->lmt & LMT_8Gb)) || 781 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && 782 !(phba->lmt & LMT_10Gb)) || 783 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && 784 !(phba->lmt & LMT_16Gb)) || 785 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && 786 !(phba->lmt & LMT_32Gb)) || 787 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && 788 !(phba->lmt & LMT_64Gb))) { 789 /* Reset link speed to auto */ 790 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 791 "1302 Invalid speed for this board:%d " 792 "Reset link speed to auto.\n", 793 phba->cfg_link_speed); 794 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; 795 } 796 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); 797 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 798 if (phba->sli_rev < LPFC_SLI_REV4) 799 lpfc_set_loopback_flag(phba); 800 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 801 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 802 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 803 "0498 Adapter failed to init, mbxCmd x%x " 804 "INIT_LINK, mbxStatus x%x\n", 805 mb->mbxCommand, mb->mbxStatus); 806 if (phba->sli_rev <= LPFC_SLI_REV3) { 807 /* Clear all interrupt enable conditions */ 808 writel(0, phba->HCregaddr); 809 readl(phba->HCregaddr); /* flush */ 810 /* Clear all pending interrupts */ 811 writel(0xffffffff, phba->HAregaddr); 812 readl(phba->HAregaddr); /* flush */ 813 } 814 phba->link_state = LPFC_HBA_ERROR; 815 if (rc != MBX_BUSY || flag == MBX_POLL) 816 mempool_free(pmb, phba->mbox_mem_pool); 817 return -EIO; 818 } 819 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; 820 if (flag == MBX_POLL) 821 mempool_free(pmb, phba->mbox_mem_pool); 822 823 return 0; 824 } 825 826 /** 827 * lpfc_hba_down_link - this routine downs the FC link 828 * @phba: pointer to lpfc hba data structure. 829 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 830 * 831 * This routine will issue the DOWN_LINK mailbox command call. 832 * It is available to other drivers through the lpfc_hba data 833 * structure for use to stop the link. 834 * 835 * Return code 836 * 0 - success 837 * Any other value - error 838 **/ 839 static int 840 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) 841 { 842 LPFC_MBOXQ_t *pmb; 843 int rc; 844 845 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 846 if (!pmb) { 847 phba->link_state = LPFC_HBA_ERROR; 848 return -ENOMEM; 849 } 850 851 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 852 "0491 Adapter Link is disabled.\n"); 853 lpfc_down_link(phba, pmb); 854 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 855 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 856 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 857 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 858 "2522 Adapter failed to issue DOWN_LINK" 859 " mbox command rc 0x%x\n", rc); 860 861 mempool_free(pmb, phba->mbox_mem_pool); 862 return -EIO; 863 } 864 if (flag == MBX_POLL) 865 mempool_free(pmb, phba->mbox_mem_pool); 866 867 return 0; 868 } 869 870 /** 871 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset 872 * @phba: pointer to lpfc HBA data structure. 873 * 874 * This routine will do LPFC uninitialization before the HBA is reset when 875 * bringing down the SLI Layer. 876 * 877 * Return codes 878 * 0 - success. 879 * Any other value - error. 880 **/ 881 int 882 lpfc_hba_down_prep(struct lpfc_hba *phba) 883 { 884 struct lpfc_vport **vports; 885 int i; 886 887 if (phba->sli_rev <= LPFC_SLI_REV3) { 888 /* Disable interrupts */ 889 writel(0, phba->HCregaddr); 890 readl(phba->HCregaddr); /* flush */ 891 } 892 893 if (phba->pport->load_flag & FC_UNLOADING) 894 lpfc_cleanup_discovery_resources(phba->pport); 895 else { 896 vports = lpfc_create_vport_work_array(phba); 897 if (vports != NULL) 898 for (i = 0; i <= phba->max_vports && 899 vports[i] != NULL; i++) 900 lpfc_cleanup_discovery_resources(vports[i]); 901 lpfc_destroy_vport_work_array(phba, vports); 902 } 903 return 0; 904 } 905 906 /** 907 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free 908 * rspiocb which got deferred 909 * 910 * @phba: pointer to lpfc HBA data structure. 911 * 912 * This routine will cleanup completed slow path events after HBA is reset 913 * when bringing down the SLI Layer. 914 * 915 * 916 * Return codes 917 * void. 918 **/ 919 static void 920 lpfc_sli4_free_sp_events(struct lpfc_hba *phba) 921 { 922 struct lpfc_iocbq *rspiocbq; 923 struct hbq_dmabuf *dmabuf; 924 struct lpfc_cq_event *cq_event; 925 926 spin_lock_irq(&phba->hbalock); 927 phba->hba_flag &= ~HBA_SP_QUEUE_EVT; 928 spin_unlock_irq(&phba->hbalock); 929 930 while (!list_empty(&phba->sli4_hba.sp_queue_event)) { 931 /* Get the response iocb from the head of work queue */ 932 spin_lock_irq(&phba->hbalock); 933 list_remove_head(&phba->sli4_hba.sp_queue_event, 934 cq_event, struct lpfc_cq_event, list); 935 spin_unlock_irq(&phba->hbalock); 936 937 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { 938 case CQE_CODE_COMPL_WQE: 939 rspiocbq = container_of(cq_event, struct lpfc_iocbq, 940 cq_event); 941 lpfc_sli_release_iocbq(phba, rspiocbq); 942 break; 943 case CQE_CODE_RECEIVE: 944 case CQE_CODE_RECEIVE_V1: 945 dmabuf = container_of(cq_event, struct hbq_dmabuf, 946 cq_event); 947 lpfc_in_buf_free(phba, &dmabuf->dbuf); 948 } 949 } 950 } 951 952 /** 953 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset 954 * @phba: pointer to lpfc HBA data structure. 955 * 956 * This routine will cleanup posted ELS buffers after the HBA is reset 957 * when bringing down the SLI Layer. 958 * 959 * 960 * Return codes 961 * void. 962 **/ 963 static void 964 lpfc_hba_free_post_buf(struct lpfc_hba *phba) 965 { 966 struct lpfc_sli *psli = &phba->sli; 967 struct lpfc_sli_ring *pring; 968 struct lpfc_dmabuf *mp, *next_mp; 969 LIST_HEAD(buflist); 970 int count; 971 972 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) 973 lpfc_sli_hbqbuf_free_all(phba); 974 else { 975 /* Cleanup preposted buffers on the ELS ring */ 976 pring = &psli->sli3_ring[LPFC_ELS_RING]; 977 spin_lock_irq(&phba->hbalock); 978 list_splice_init(&pring->postbufq, &buflist); 979 spin_unlock_irq(&phba->hbalock); 980 981 count = 0; 982 list_for_each_entry_safe(mp, next_mp, &buflist, list) { 983 list_del(&mp->list); 984 count++; 985 lpfc_mbuf_free(phba, mp->virt, mp->phys); 986 kfree(mp); 987 } 988 989 spin_lock_irq(&phba->hbalock); 990 pring->postbufq_cnt -= count; 991 spin_unlock_irq(&phba->hbalock); 992 } 993 } 994 995 /** 996 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset 997 * @phba: pointer to lpfc HBA data structure. 998 * 999 * This routine will cleanup the txcmplq after the HBA is reset when bringing 1000 * down the SLI Layer. 1001 * 1002 * Return codes 1003 * void 1004 **/ 1005 static void 1006 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) 1007 { 1008 struct lpfc_sli *psli = &phba->sli; 1009 struct lpfc_queue *qp = NULL; 1010 struct lpfc_sli_ring *pring; 1011 LIST_HEAD(completions); 1012 int i; 1013 struct lpfc_iocbq *piocb, *next_iocb; 1014 1015 if (phba->sli_rev != LPFC_SLI_REV4) { 1016 for (i = 0; i < psli->num_rings; i++) { 1017 pring = &psli->sli3_ring[i]; 1018 spin_lock_irq(&phba->hbalock); 1019 /* At this point in time the HBA is either reset or DOA 1020 * Nothing should be on txcmplq as it will 1021 * NEVER complete. 1022 */ 1023 list_splice_init(&pring->txcmplq, &completions); 1024 pring->txcmplq_cnt = 0; 1025 spin_unlock_irq(&phba->hbalock); 1026 1027 lpfc_sli_abort_iocb_ring(phba, pring); 1028 } 1029 /* Cancel all the IOCBs from the completions list */ 1030 lpfc_sli_cancel_iocbs(phba, &completions, 1031 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1032 return; 1033 } 1034 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { 1035 pring = qp->pring; 1036 if (!pring) 1037 continue; 1038 spin_lock_irq(&pring->ring_lock); 1039 list_for_each_entry_safe(piocb, next_iocb, 1040 &pring->txcmplq, list) 1041 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ; 1042 list_splice_init(&pring->txcmplq, &completions); 1043 pring->txcmplq_cnt = 0; 1044 spin_unlock_irq(&pring->ring_lock); 1045 lpfc_sli_abort_iocb_ring(phba, pring); 1046 } 1047 /* Cancel all the IOCBs from the completions list */ 1048 lpfc_sli_cancel_iocbs(phba, &completions, 1049 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1050 } 1051 1052 /** 1053 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset 1054 * @phba: pointer to lpfc HBA data structure. 1055 * 1056 * This routine will do uninitialization after the HBA is reset when bring 1057 * down the SLI Layer. 1058 * 1059 * Return codes 1060 * 0 - success. 1061 * Any other value - error. 1062 **/ 1063 static int 1064 lpfc_hba_down_post_s3(struct lpfc_hba *phba) 1065 { 1066 lpfc_hba_free_post_buf(phba); 1067 lpfc_hba_clean_txcmplq(phba); 1068 return 0; 1069 } 1070 1071 /** 1072 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset 1073 * @phba: pointer to lpfc HBA data structure. 1074 * 1075 * This routine will do uninitialization after the HBA is reset when bring 1076 * down the SLI Layer. 1077 * 1078 * Return codes 1079 * 0 - success. 1080 * Any other value - error. 1081 **/ 1082 static int 1083 lpfc_hba_down_post_s4(struct lpfc_hba *phba) 1084 { 1085 struct lpfc_io_buf *psb, *psb_next; 1086 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; 1087 struct lpfc_sli4_hdw_queue *qp; 1088 LIST_HEAD(aborts); 1089 LIST_HEAD(nvme_aborts); 1090 LIST_HEAD(nvmet_aborts); 1091 struct lpfc_sglq *sglq_entry = NULL; 1092 int cnt, idx; 1093 1094 1095 lpfc_sli_hbqbuf_free_all(phba); 1096 lpfc_hba_clean_txcmplq(phba); 1097 1098 /* At this point in time the HBA is either reset or DOA. Either 1099 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be 1100 * on the lpfc_els_sgl_list so that it can either be freed if the 1101 * driver is unloading or reposted if the driver is restarting 1102 * the port. 1103 */ 1104 1105 /* sgl_list_lock required because worker thread uses this 1106 * list. 1107 */ 1108 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 1109 list_for_each_entry(sglq_entry, 1110 &phba->sli4_hba.lpfc_abts_els_sgl_list, list) 1111 sglq_entry->state = SGL_FREED; 1112 1113 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, 1114 &phba->sli4_hba.lpfc_els_sgl_list); 1115 1116 1117 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 1118 1119 /* abts_xxxx_buf_list_lock required because worker thread uses this 1120 * list. 1121 */ 1122 spin_lock_irq(&phba->hbalock); 1123 cnt = 0; 1124 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 1125 qp = &phba->sli4_hba.hdwq[idx]; 1126 1127 spin_lock(&qp->abts_io_buf_list_lock); 1128 list_splice_init(&qp->lpfc_abts_io_buf_list, 1129 &aborts); 1130 1131 list_for_each_entry_safe(psb, psb_next, &aborts, list) { 1132 psb->pCmd = NULL; 1133 psb->status = IOSTAT_SUCCESS; 1134 cnt++; 1135 } 1136 spin_lock(&qp->io_buf_list_put_lock); 1137 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); 1138 qp->put_io_bufs += qp->abts_scsi_io_bufs; 1139 qp->put_io_bufs += qp->abts_nvme_io_bufs; 1140 qp->abts_scsi_io_bufs = 0; 1141 qp->abts_nvme_io_bufs = 0; 1142 spin_unlock(&qp->io_buf_list_put_lock); 1143 spin_unlock(&qp->abts_io_buf_list_lock); 1144 } 1145 spin_unlock_irq(&phba->hbalock); 1146 1147 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 1148 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1149 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, 1150 &nvmet_aborts); 1151 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1152 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { 1153 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); 1154 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); 1155 } 1156 } 1157 1158 lpfc_sli4_free_sp_events(phba); 1159 return cnt; 1160 } 1161 1162 /** 1163 * lpfc_hba_down_post - Wrapper func for hba down post routine 1164 * @phba: pointer to lpfc HBA data structure. 1165 * 1166 * This routine wraps the actual SLI3 or SLI4 routine for performing 1167 * uninitialization after the HBA is reset when bring down the SLI Layer. 1168 * 1169 * Return codes 1170 * 0 - success. 1171 * Any other value - error. 1172 **/ 1173 int 1174 lpfc_hba_down_post(struct lpfc_hba *phba) 1175 { 1176 return (*phba->lpfc_hba_down_post)(phba); 1177 } 1178 1179 /** 1180 * lpfc_hb_timeout - The HBA-timer timeout handler 1181 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1182 * 1183 * This is the HBA-timer timeout handler registered to the lpfc driver. When 1184 * this timer fires, a HBA timeout event shall be posted to the lpfc driver 1185 * work-port-events bitmap and the worker thread is notified. This timeout 1186 * event will be used by the worker thread to invoke the actual timeout 1187 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will 1188 * be performed in the timeout handler and the HBA timeout event bit shall 1189 * be cleared by the worker thread after it has taken the event bitmap out. 1190 **/ 1191 static void 1192 lpfc_hb_timeout(struct timer_list *t) 1193 { 1194 struct lpfc_hba *phba; 1195 uint32_t tmo_posted; 1196 unsigned long iflag; 1197 1198 phba = from_timer(phba, t, hb_tmofunc); 1199 1200 /* Check for heart beat timeout conditions */ 1201 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1202 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; 1203 if (!tmo_posted) 1204 phba->pport->work_port_events |= WORKER_HB_TMO; 1205 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1206 1207 /* Tell the worker thread there is work to do */ 1208 if (!tmo_posted) 1209 lpfc_worker_wake_up(phba); 1210 return; 1211 } 1212 1213 /** 1214 * lpfc_rrq_timeout - The RRQ-timer timeout handler 1215 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1216 * 1217 * This is the RRQ-timer timeout handler registered to the lpfc driver. When 1218 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver 1219 * work-port-events bitmap and the worker thread is notified. This timeout 1220 * event will be used by the worker thread to invoke the actual timeout 1221 * handler routine, lpfc_rrq_handler. Any periodical operations will 1222 * be performed in the timeout handler and the RRQ timeout event bit shall 1223 * be cleared by the worker thread after it has taken the event bitmap out. 1224 **/ 1225 static void 1226 lpfc_rrq_timeout(struct timer_list *t) 1227 { 1228 struct lpfc_hba *phba; 1229 unsigned long iflag; 1230 1231 phba = from_timer(phba, t, rrq_tmr); 1232 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1233 if (!(phba->pport->load_flag & FC_UNLOADING)) 1234 phba->hba_flag |= HBA_RRQ_ACTIVE; 1235 else 1236 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 1237 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1238 1239 if (!(phba->pport->load_flag & FC_UNLOADING)) 1240 lpfc_worker_wake_up(phba); 1241 } 1242 1243 /** 1244 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function 1245 * @phba: pointer to lpfc hba data structure. 1246 * @pmboxq: pointer to the driver internal queue element for mailbox command. 1247 * 1248 * This is the callback function to the lpfc heart-beat mailbox command. 1249 * If configured, the lpfc driver issues the heart-beat mailbox command to 1250 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the 1251 * heart-beat mailbox command is issued, the driver shall set up heart-beat 1252 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks 1253 * heart-beat outstanding state. Once the mailbox command comes back and 1254 * no error conditions detected, the heart-beat mailbox command timer is 1255 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding 1256 * state is cleared for the next heart-beat. If the timer expired with the 1257 * heart-beat outstanding state set, the driver will put the HBA offline. 1258 **/ 1259 static void 1260 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 1261 { 1262 unsigned long drvr_flag; 1263 1264 spin_lock_irqsave(&phba->hbalock, drvr_flag); 1265 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 1266 spin_unlock_irqrestore(&phba->hbalock, drvr_flag); 1267 1268 /* Check and reset heart-beat timer if necessary */ 1269 mempool_free(pmboxq, phba->mbox_mem_pool); 1270 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && 1271 !(phba->link_state == LPFC_HBA_ERROR) && 1272 !(phba->pport->load_flag & FC_UNLOADING)) 1273 mod_timer(&phba->hb_tmofunc, 1274 jiffies + 1275 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 1276 return; 1277 } 1278 1279 /* 1280 * lpfc_idle_stat_delay_work - idle_stat tracking 1281 * 1282 * This routine tracks per-cq idle_stat and determines polling decisions. 1283 * 1284 * Return codes: 1285 * None 1286 **/ 1287 static void 1288 lpfc_idle_stat_delay_work(struct work_struct *work) 1289 { 1290 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1291 struct lpfc_hba, 1292 idle_stat_delay_work); 1293 struct lpfc_queue *cq; 1294 struct lpfc_sli4_hdw_queue *hdwq; 1295 struct lpfc_idle_stat *idle_stat; 1296 u32 i, idle_percent; 1297 u64 wall, wall_idle, diff_wall, diff_idle, busy_time; 1298 1299 if (phba->pport->load_flag & FC_UNLOADING) 1300 return; 1301 1302 if (phba->link_state == LPFC_HBA_ERROR || 1303 phba->pport->fc_flag & FC_OFFLINE_MODE || 1304 phba->cmf_active_mode != LPFC_CFG_OFF) 1305 goto requeue; 1306 1307 for_each_present_cpu(i) { 1308 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; 1309 cq = hdwq->io_cq; 1310 1311 /* Skip if we've already handled this cq's primary CPU */ 1312 if (cq->chann != i) 1313 continue; 1314 1315 idle_stat = &phba->sli4_hba.idle_stat[i]; 1316 1317 /* get_cpu_idle_time returns values as running counters. Thus, 1318 * to know the amount for this period, the prior counter values 1319 * need to be subtracted from the current counter values. 1320 * From there, the idle time stat can be calculated as a 1321 * percentage of 100 - the sum of the other consumption times. 1322 */ 1323 wall_idle = get_cpu_idle_time(i, &wall, 1); 1324 diff_idle = wall_idle - idle_stat->prev_idle; 1325 diff_wall = wall - idle_stat->prev_wall; 1326 1327 if (diff_wall <= diff_idle) 1328 busy_time = 0; 1329 else 1330 busy_time = diff_wall - diff_idle; 1331 1332 idle_percent = div64_u64(100 * busy_time, diff_wall); 1333 idle_percent = 100 - idle_percent; 1334 1335 if (idle_percent < 15) 1336 cq->poll_mode = LPFC_QUEUE_WORK; 1337 else 1338 cq->poll_mode = LPFC_IRQ_POLL; 1339 1340 idle_stat->prev_idle = wall_idle; 1341 idle_stat->prev_wall = wall; 1342 } 1343 1344 requeue: 1345 schedule_delayed_work(&phba->idle_stat_delay_work, 1346 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); 1347 } 1348 1349 static void 1350 lpfc_hb_eq_delay_work(struct work_struct *work) 1351 { 1352 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1353 struct lpfc_hba, eq_delay_work); 1354 struct lpfc_eq_intr_info *eqi, *eqi_new; 1355 struct lpfc_queue *eq, *eq_next; 1356 unsigned char *ena_delay = NULL; 1357 uint32_t usdelay; 1358 int i; 1359 1360 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) 1361 return; 1362 1363 if (phba->link_state == LPFC_HBA_ERROR || 1364 phba->pport->fc_flag & FC_OFFLINE_MODE) 1365 goto requeue; 1366 1367 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), 1368 GFP_KERNEL); 1369 if (!ena_delay) 1370 goto requeue; 1371 1372 for (i = 0; i < phba->cfg_irq_chann; i++) { 1373 /* Get the EQ corresponding to the IRQ vector */ 1374 eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1375 if (!eq) 1376 continue; 1377 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { 1378 eq->q_flag &= ~HBA_EQ_DELAY_CHK; 1379 ena_delay[eq->last_cpu] = 1; 1380 } 1381 } 1382 1383 for_each_present_cpu(i) { 1384 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); 1385 if (ena_delay[i]) { 1386 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; 1387 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) 1388 usdelay = LPFC_MAX_AUTO_EQ_DELAY; 1389 } else { 1390 usdelay = 0; 1391 } 1392 1393 eqi->icnt = 0; 1394 1395 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { 1396 if (unlikely(eq->last_cpu != i)) { 1397 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, 1398 eq->last_cpu); 1399 list_move_tail(&eq->cpu_list, &eqi_new->list); 1400 continue; 1401 } 1402 if (usdelay != eq->q_mode) 1403 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, 1404 usdelay); 1405 } 1406 } 1407 1408 kfree(ena_delay); 1409 1410 requeue: 1411 queue_delayed_work(phba->wq, &phba->eq_delay_work, 1412 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); 1413 } 1414 1415 /** 1416 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution 1417 * @phba: pointer to lpfc hba data structure. 1418 * 1419 * For each heartbeat, this routine does some heuristic methods to adjust 1420 * XRI distribution. The goal is to fully utilize free XRIs. 1421 **/ 1422 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) 1423 { 1424 u32 i; 1425 u32 hwq_count; 1426 1427 hwq_count = phba->cfg_hdw_queue; 1428 for (i = 0; i < hwq_count; i++) { 1429 /* Adjust XRIs in private pool */ 1430 lpfc_adjust_pvt_pool_count(phba, i); 1431 1432 /* Adjust high watermark */ 1433 lpfc_adjust_high_watermark(phba, i); 1434 1435 #ifdef LPFC_MXP_STAT 1436 /* Snapshot pbl, pvt and busy count */ 1437 lpfc_snapshot_mxp(phba, i); 1438 #endif 1439 } 1440 } 1441 1442 /** 1443 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command 1444 * @phba: pointer to lpfc hba data structure. 1445 * 1446 * If a HB mbox is not already in progrees, this routine will allocate 1447 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command, 1448 * and issue it. The HBA_HBEAT_INP flag means the command is in progress. 1449 **/ 1450 int 1451 lpfc_issue_hb_mbox(struct lpfc_hba *phba) 1452 { 1453 LPFC_MBOXQ_t *pmboxq; 1454 int retval; 1455 1456 /* Is a Heartbeat mbox already in progress */ 1457 if (phba->hba_flag & HBA_HBEAT_INP) 1458 return 0; 1459 1460 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 1461 if (!pmboxq) 1462 return -ENOMEM; 1463 1464 lpfc_heart_beat(phba, pmboxq); 1465 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; 1466 pmboxq->vport = phba->pport; 1467 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); 1468 1469 if (retval != MBX_BUSY && retval != MBX_SUCCESS) { 1470 mempool_free(pmboxq, phba->mbox_mem_pool); 1471 return -ENXIO; 1472 } 1473 phba->hba_flag |= HBA_HBEAT_INP; 1474 1475 return 0; 1476 } 1477 1478 /** 1479 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command 1480 * @phba: pointer to lpfc hba data structure. 1481 * 1482 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO 1483 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless 1484 * of the value of lpfc_enable_hba_heartbeat. 1485 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always 1486 * try to issue a MBX_HEARTBEAT mbox command. 1487 **/ 1488 void 1489 lpfc_issue_hb_tmo(struct lpfc_hba *phba) 1490 { 1491 if (phba->cfg_enable_hba_heartbeat) 1492 return; 1493 phba->hba_flag |= HBA_HBEAT_TMO; 1494 } 1495 1496 /** 1497 * lpfc_hb_timeout_handler - The HBA-timer timeout handler 1498 * @phba: pointer to lpfc hba data structure. 1499 * 1500 * This is the actual HBA-timer timeout handler to be invoked by the worker 1501 * thread whenever the HBA timer fired and HBA-timeout event posted. This 1502 * handler performs any periodic operations needed for the device. If such 1503 * periodic event has already been attended to either in the interrupt handler 1504 * or by processing slow-ring or fast-ring events within the HBA-timer 1505 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets 1506 * the timer for the next timeout period. If lpfc heart-beat mailbox command 1507 * is configured and there is no heart-beat mailbox command outstanding, a 1508 * heart-beat mailbox is issued and timer set properly. Otherwise, if there 1509 * has been a heart-beat mailbox command outstanding, the HBA shall be put 1510 * to offline. 1511 **/ 1512 void 1513 lpfc_hb_timeout_handler(struct lpfc_hba *phba) 1514 { 1515 struct lpfc_vport **vports; 1516 struct lpfc_dmabuf *buf_ptr; 1517 int retval = 0; 1518 int i, tmo; 1519 struct lpfc_sli *psli = &phba->sli; 1520 LIST_HEAD(completions); 1521 1522 if (phba->cfg_xri_rebalancing) { 1523 /* Multi-XRI pools handler */ 1524 lpfc_hb_mxp_handler(phba); 1525 } 1526 1527 vports = lpfc_create_vport_work_array(phba); 1528 if (vports != NULL) 1529 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 1530 lpfc_rcv_seq_check_edtov(vports[i]); 1531 lpfc_fdmi_change_check(vports[i]); 1532 } 1533 lpfc_destroy_vport_work_array(phba, vports); 1534 1535 if ((phba->link_state == LPFC_HBA_ERROR) || 1536 (phba->pport->load_flag & FC_UNLOADING) || 1537 (phba->pport->fc_flag & FC_OFFLINE_MODE)) 1538 return; 1539 1540 if (phba->elsbuf_cnt && 1541 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { 1542 spin_lock_irq(&phba->hbalock); 1543 list_splice_init(&phba->elsbuf, &completions); 1544 phba->elsbuf_cnt = 0; 1545 phba->elsbuf_prev_cnt = 0; 1546 spin_unlock_irq(&phba->hbalock); 1547 1548 while (!list_empty(&completions)) { 1549 list_remove_head(&completions, buf_ptr, 1550 struct lpfc_dmabuf, list); 1551 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 1552 kfree(buf_ptr); 1553 } 1554 } 1555 phba->elsbuf_prev_cnt = phba->elsbuf_cnt; 1556 1557 /* If there is no heart beat outstanding, issue a heartbeat command */ 1558 if (phba->cfg_enable_hba_heartbeat) { 1559 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */ 1560 spin_lock_irq(&phba->pport->work_port_lock); 1561 if (time_after(phba->last_completion_time + 1562 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), 1563 jiffies)) { 1564 spin_unlock_irq(&phba->pport->work_port_lock); 1565 if (phba->hba_flag & HBA_HBEAT_INP) 1566 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1567 else 1568 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1569 goto out; 1570 } 1571 spin_unlock_irq(&phba->pport->work_port_lock); 1572 1573 /* Check if a MBX_HEARTBEAT is already in progress */ 1574 if (phba->hba_flag & HBA_HBEAT_INP) { 1575 /* 1576 * If heart beat timeout called with HBA_HBEAT_INP set 1577 * we need to give the hb mailbox cmd a chance to 1578 * complete or TMO. 1579 */ 1580 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 1581 "0459 Adapter heartbeat still outstanding: " 1582 "last compl time was %d ms.\n", 1583 jiffies_to_msecs(jiffies 1584 - phba->last_completion_time)); 1585 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1586 } else { 1587 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && 1588 (list_empty(&psli->mboxq))) { 1589 1590 retval = lpfc_issue_hb_mbox(phba); 1591 if (retval) { 1592 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1593 goto out; 1594 } 1595 phba->skipped_hb = 0; 1596 } else if (time_before_eq(phba->last_completion_time, 1597 phba->skipped_hb)) { 1598 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 1599 "2857 Last completion time not " 1600 " updated in %d ms\n", 1601 jiffies_to_msecs(jiffies 1602 - phba->last_completion_time)); 1603 } else 1604 phba->skipped_hb = jiffies; 1605 1606 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1607 goto out; 1608 } 1609 } else { 1610 /* Check to see if we want to force a MBX_HEARTBEAT */ 1611 if (phba->hba_flag & HBA_HBEAT_TMO) { 1612 retval = lpfc_issue_hb_mbox(phba); 1613 if (retval) 1614 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1615 else 1616 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1617 goto out; 1618 } 1619 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1620 } 1621 out: 1622 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo)); 1623 } 1624 1625 /** 1626 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention 1627 * @phba: pointer to lpfc hba data structure. 1628 * 1629 * This routine is called to bring the HBA offline when HBA hardware error 1630 * other than Port Error 6 has been detected. 1631 **/ 1632 static void 1633 lpfc_offline_eratt(struct lpfc_hba *phba) 1634 { 1635 struct lpfc_sli *psli = &phba->sli; 1636 1637 spin_lock_irq(&phba->hbalock); 1638 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1639 spin_unlock_irq(&phba->hbalock); 1640 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1641 1642 lpfc_offline(phba); 1643 lpfc_reset_barrier(phba); 1644 spin_lock_irq(&phba->hbalock); 1645 lpfc_sli_brdreset(phba); 1646 spin_unlock_irq(&phba->hbalock); 1647 lpfc_hba_down_post(phba); 1648 lpfc_sli_brdready(phba, HS_MBRDY); 1649 lpfc_unblock_mgmt_io(phba); 1650 phba->link_state = LPFC_HBA_ERROR; 1651 return; 1652 } 1653 1654 /** 1655 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention 1656 * @phba: pointer to lpfc hba data structure. 1657 * 1658 * This routine is called to bring a SLI4 HBA offline when HBA hardware error 1659 * other than Port Error 6 has been detected. 1660 **/ 1661 void 1662 lpfc_sli4_offline_eratt(struct lpfc_hba *phba) 1663 { 1664 spin_lock_irq(&phba->hbalock); 1665 if (phba->link_state == LPFC_HBA_ERROR && 1666 test_bit(HBA_PCI_ERR, &phba->bit_flags)) { 1667 spin_unlock_irq(&phba->hbalock); 1668 return; 1669 } 1670 phba->link_state = LPFC_HBA_ERROR; 1671 spin_unlock_irq(&phba->hbalock); 1672 1673 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1674 lpfc_sli_flush_io_rings(phba); 1675 lpfc_offline(phba); 1676 lpfc_hba_down_post(phba); 1677 lpfc_unblock_mgmt_io(phba); 1678 } 1679 1680 /** 1681 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler 1682 * @phba: pointer to lpfc hba data structure. 1683 * 1684 * This routine is invoked to handle the deferred HBA hardware error 1685 * conditions. This type of error is indicated by HBA by setting ER1 1686 * and another ER bit in the host status register. The driver will 1687 * wait until the ER1 bit clears before handling the error condition. 1688 **/ 1689 static void 1690 lpfc_handle_deferred_eratt(struct lpfc_hba *phba) 1691 { 1692 uint32_t old_host_status = phba->work_hs; 1693 struct lpfc_sli *psli = &phba->sli; 1694 1695 /* If the pci channel is offline, ignore possible errors, 1696 * since we cannot communicate with the pci card anyway. 1697 */ 1698 if (pci_channel_offline(phba->pcidev)) { 1699 spin_lock_irq(&phba->hbalock); 1700 phba->hba_flag &= ~DEFER_ERATT; 1701 spin_unlock_irq(&phba->hbalock); 1702 return; 1703 } 1704 1705 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1706 "0479 Deferred Adapter Hardware Error " 1707 "Data: x%x x%x x%x\n", 1708 phba->work_hs, phba->work_status[0], 1709 phba->work_status[1]); 1710 1711 spin_lock_irq(&phba->hbalock); 1712 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1713 spin_unlock_irq(&phba->hbalock); 1714 1715 1716 /* 1717 * Firmware stops when it triggred erratt. That could cause the I/Os 1718 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the 1719 * SCSI layer retry it after re-establishing link. 1720 */ 1721 lpfc_sli_abort_fcp_rings(phba); 1722 1723 /* 1724 * There was a firmware error. Take the hba offline and then 1725 * attempt to restart it. 1726 */ 1727 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 1728 lpfc_offline(phba); 1729 1730 /* Wait for the ER1 bit to clear.*/ 1731 while (phba->work_hs & HS_FFER1) { 1732 msleep(100); 1733 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { 1734 phba->work_hs = UNPLUG_ERR ; 1735 break; 1736 } 1737 /* If driver is unloading let the worker thread continue */ 1738 if (phba->pport->load_flag & FC_UNLOADING) { 1739 phba->work_hs = 0; 1740 break; 1741 } 1742 } 1743 1744 /* 1745 * This is to ptrotect against a race condition in which 1746 * first write to the host attention register clear the 1747 * host status register. 1748 */ 1749 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) 1750 phba->work_hs = old_host_status & ~HS_FFER1; 1751 1752 spin_lock_irq(&phba->hbalock); 1753 phba->hba_flag &= ~DEFER_ERATT; 1754 spin_unlock_irq(&phba->hbalock); 1755 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); 1756 phba->work_status[1] = readl(phba->MBslimaddr + 0xac); 1757 } 1758 1759 static void 1760 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) 1761 { 1762 struct lpfc_board_event_header board_event; 1763 struct Scsi_Host *shost; 1764 1765 board_event.event_type = FC_REG_BOARD_EVENT; 1766 board_event.subcategory = LPFC_EVENT_PORTINTERR; 1767 shost = lpfc_shost_from_vport(phba->pport); 1768 fc_host_post_vendor_event(shost, fc_get_event_number(), 1769 sizeof(board_event), 1770 (char *) &board_event, 1771 LPFC_NL_VENDOR_ID); 1772 } 1773 1774 /** 1775 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler 1776 * @phba: pointer to lpfc hba data structure. 1777 * 1778 * This routine is invoked to handle the following HBA hardware error 1779 * conditions: 1780 * 1 - HBA error attention interrupt 1781 * 2 - DMA ring index out of range 1782 * 3 - Mailbox command came back as unknown 1783 **/ 1784 static void 1785 lpfc_handle_eratt_s3(struct lpfc_hba *phba) 1786 { 1787 struct lpfc_vport *vport = phba->pport; 1788 struct lpfc_sli *psli = &phba->sli; 1789 uint32_t event_data; 1790 unsigned long temperature; 1791 struct temp_event temp_event_data; 1792 struct Scsi_Host *shost; 1793 1794 /* If the pci channel is offline, ignore possible errors, 1795 * since we cannot communicate with the pci card anyway. 1796 */ 1797 if (pci_channel_offline(phba->pcidev)) { 1798 spin_lock_irq(&phba->hbalock); 1799 phba->hba_flag &= ~DEFER_ERATT; 1800 spin_unlock_irq(&phba->hbalock); 1801 return; 1802 } 1803 1804 /* If resets are disabled then leave the HBA alone and return */ 1805 if (!phba->cfg_enable_hba_reset) 1806 return; 1807 1808 /* Send an internal error event to mgmt application */ 1809 lpfc_board_errevt_to_mgmt(phba); 1810 1811 if (phba->hba_flag & DEFER_ERATT) 1812 lpfc_handle_deferred_eratt(phba); 1813 1814 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { 1815 if (phba->work_hs & HS_FFER6) 1816 /* Re-establishing Link */ 1817 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1818 "1301 Re-establishing Link " 1819 "Data: x%x x%x x%x\n", 1820 phba->work_hs, phba->work_status[0], 1821 phba->work_status[1]); 1822 if (phba->work_hs & HS_FFER8) 1823 /* Device Zeroization */ 1824 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1825 "2861 Host Authentication device " 1826 "zeroization Data:x%x x%x x%x\n", 1827 phba->work_hs, phba->work_status[0], 1828 phba->work_status[1]); 1829 1830 spin_lock_irq(&phba->hbalock); 1831 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1832 spin_unlock_irq(&phba->hbalock); 1833 1834 /* 1835 * Firmware stops when it triggled erratt with HS_FFER6. 1836 * That could cause the I/Os dropped by the firmware. 1837 * Error iocb (I/O) on txcmplq and let the SCSI layer 1838 * retry it after re-establishing link. 1839 */ 1840 lpfc_sli_abort_fcp_rings(phba); 1841 1842 /* 1843 * There was a firmware error. Take the hba offline and then 1844 * attempt to restart it. 1845 */ 1846 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1847 lpfc_offline(phba); 1848 lpfc_sli_brdrestart(phba); 1849 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 1850 lpfc_unblock_mgmt_io(phba); 1851 return; 1852 } 1853 lpfc_unblock_mgmt_io(phba); 1854 } else if (phba->work_hs & HS_CRIT_TEMP) { 1855 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); 1856 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 1857 temp_event_data.event_code = LPFC_CRIT_TEMP; 1858 temp_event_data.data = (uint32_t)temperature; 1859 1860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1861 "0406 Adapter maximum temperature exceeded " 1862 "(%ld), taking this port offline " 1863 "Data: x%x x%x x%x\n", 1864 temperature, phba->work_hs, 1865 phba->work_status[0], phba->work_status[1]); 1866 1867 shost = lpfc_shost_from_vport(phba->pport); 1868 fc_host_post_vendor_event(shost, fc_get_event_number(), 1869 sizeof(temp_event_data), 1870 (char *) &temp_event_data, 1871 SCSI_NL_VID_TYPE_PCI 1872 | PCI_VENDOR_ID_EMULEX); 1873 1874 spin_lock_irq(&phba->hbalock); 1875 phba->over_temp_state = HBA_OVER_TEMP; 1876 spin_unlock_irq(&phba->hbalock); 1877 lpfc_offline_eratt(phba); 1878 1879 } else { 1880 /* The if clause above forces this code path when the status 1881 * failure is a value other than FFER6. Do not call the offline 1882 * twice. This is the adapter hardware error path. 1883 */ 1884 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1885 "0457 Adapter Hardware Error " 1886 "Data: x%x x%x x%x\n", 1887 phba->work_hs, 1888 phba->work_status[0], phba->work_status[1]); 1889 1890 event_data = FC_REG_DUMP_EVENT; 1891 shost = lpfc_shost_from_vport(vport); 1892 fc_host_post_vendor_event(shost, fc_get_event_number(), 1893 sizeof(event_data), (char *) &event_data, 1894 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 1895 1896 lpfc_offline_eratt(phba); 1897 } 1898 return; 1899 } 1900 1901 /** 1902 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg 1903 * @phba: pointer to lpfc hba data structure. 1904 * @mbx_action: flag for mailbox shutdown action. 1905 * @en_rn_msg: send reset/port recovery message. 1906 * This routine is invoked to perform an SLI4 port PCI function reset in 1907 * response to port status register polling attention. It waits for port 1908 * status register (ERR, RDY, RN) bits before proceeding with function reset. 1909 * During this process, interrupt vectors are freed and later requested 1910 * for handling possible port resource change. 1911 **/ 1912 static int 1913 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, 1914 bool en_rn_msg) 1915 { 1916 int rc; 1917 uint32_t intr_mode; 1918 LPFC_MBOXQ_t *mboxq; 1919 1920 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 1921 LPFC_SLI_INTF_IF_TYPE_2) { 1922 /* 1923 * On error status condition, driver need to wait for port 1924 * ready before performing reset. 1925 */ 1926 rc = lpfc_sli4_pdev_status_reg_wait(phba); 1927 if (rc) 1928 return rc; 1929 } 1930 1931 /* need reset: attempt for port recovery */ 1932 if (en_rn_msg) 1933 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1934 "2887 Reset Needed: Attempting Port " 1935 "Recovery...\n"); 1936 1937 /* If we are no wait, the HBA has been reset and is not 1938 * functional, thus we should clear 1939 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags. 1940 */ 1941 if (mbx_action == LPFC_MBX_NO_WAIT) { 1942 spin_lock_irq(&phba->hbalock); 1943 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; 1944 if (phba->sli.mbox_active) { 1945 mboxq = phba->sli.mbox_active; 1946 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 1947 __lpfc_mbox_cmpl_put(phba, mboxq); 1948 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1949 phba->sli.mbox_active = NULL; 1950 } 1951 spin_unlock_irq(&phba->hbalock); 1952 } 1953 1954 lpfc_offline_prep(phba, mbx_action); 1955 lpfc_sli_flush_io_rings(phba); 1956 lpfc_offline(phba); 1957 /* release interrupt for possible resource change */ 1958 lpfc_sli4_disable_intr(phba); 1959 rc = lpfc_sli_brdrestart(phba); 1960 if (rc) { 1961 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1962 "6309 Failed to restart board\n"); 1963 return rc; 1964 } 1965 /* request and enable interrupt */ 1966 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 1967 if (intr_mode == LPFC_INTR_ERROR) { 1968 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1969 "3175 Failed to enable interrupt\n"); 1970 return -EIO; 1971 } 1972 phba->intr_mode = intr_mode; 1973 rc = lpfc_online(phba); 1974 if (rc == 0) 1975 lpfc_unblock_mgmt_io(phba); 1976 1977 return rc; 1978 } 1979 1980 /** 1981 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler 1982 * @phba: pointer to lpfc hba data structure. 1983 * 1984 * This routine is invoked to handle the SLI4 HBA hardware error attention 1985 * conditions. 1986 **/ 1987 static void 1988 lpfc_handle_eratt_s4(struct lpfc_hba *phba) 1989 { 1990 struct lpfc_vport *vport = phba->pport; 1991 uint32_t event_data; 1992 struct Scsi_Host *shost; 1993 uint32_t if_type; 1994 struct lpfc_register portstat_reg = {0}; 1995 uint32_t reg_err1, reg_err2; 1996 uint32_t uerrlo_reg, uemasklo_reg; 1997 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; 1998 bool en_rn_msg = true; 1999 struct temp_event temp_event_data; 2000 struct lpfc_register portsmphr_reg; 2001 int rc, i; 2002 2003 /* If the pci channel is offline, ignore possible errors, since 2004 * we cannot communicate with the pci card anyway. 2005 */ 2006 if (pci_channel_offline(phba->pcidev)) { 2007 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2008 "3166 pci channel is offline\n"); 2009 lpfc_sli_flush_io_rings(phba); 2010 return; 2011 } 2012 2013 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 2014 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 2015 switch (if_type) { 2016 case LPFC_SLI_INTF_IF_TYPE_0: 2017 pci_rd_rc1 = lpfc_readl( 2018 phba->sli4_hba.u.if_type0.UERRLOregaddr, 2019 &uerrlo_reg); 2020 pci_rd_rc2 = lpfc_readl( 2021 phba->sli4_hba.u.if_type0.UEMASKLOregaddr, 2022 &uemasklo_reg); 2023 /* consider PCI bus read error as pci_channel_offline */ 2024 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) 2025 return; 2026 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { 2027 lpfc_sli4_offline_eratt(phba); 2028 return; 2029 } 2030 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2031 "7623 Checking UE recoverable"); 2032 2033 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { 2034 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2035 &portsmphr_reg.word0)) 2036 continue; 2037 2038 smphr_port_status = bf_get(lpfc_port_smphr_port_status, 2039 &portsmphr_reg); 2040 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2041 LPFC_PORT_SEM_UE_RECOVERABLE) 2042 break; 2043 /*Sleep for 1Sec, before checking SEMAPHORE */ 2044 msleep(1000); 2045 } 2046 2047 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2048 "4827 smphr_port_status x%x : Waited %dSec", 2049 smphr_port_status, i); 2050 2051 /* Recoverable UE, reset the HBA device */ 2052 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2053 LPFC_PORT_SEM_UE_RECOVERABLE) { 2054 for (i = 0; i < 20; i++) { 2055 msleep(1000); 2056 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2057 &portsmphr_reg.word0) && 2058 (LPFC_POST_STAGE_PORT_READY == 2059 bf_get(lpfc_port_smphr_port_status, 2060 &portsmphr_reg))) { 2061 rc = lpfc_sli4_port_sta_fn_reset(phba, 2062 LPFC_MBX_NO_WAIT, en_rn_msg); 2063 if (rc == 0) 2064 return; 2065 lpfc_printf_log(phba, KERN_ERR, 2066 LOG_TRACE_EVENT, 2067 "4215 Failed to recover UE"); 2068 break; 2069 } 2070 } 2071 } 2072 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2073 "7624 Firmware not ready: Failing UE recovery," 2074 " waited %dSec", i); 2075 phba->link_state = LPFC_HBA_ERROR; 2076 break; 2077 2078 case LPFC_SLI_INTF_IF_TYPE_2: 2079 case LPFC_SLI_INTF_IF_TYPE_6: 2080 pci_rd_rc1 = lpfc_readl( 2081 phba->sli4_hba.u.if_type2.STATUSregaddr, 2082 &portstat_reg.word0); 2083 /* consider PCI bus read error as pci_channel_offline */ 2084 if (pci_rd_rc1 == -EIO) { 2085 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2086 "3151 PCI bus read access failure: x%x\n", 2087 readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); 2088 lpfc_sli4_offline_eratt(phba); 2089 return; 2090 } 2091 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); 2092 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); 2093 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { 2094 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2095 "2889 Port Overtemperature event, " 2096 "taking port offline Data: x%x x%x\n", 2097 reg_err1, reg_err2); 2098 2099 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 2100 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 2101 temp_event_data.event_code = LPFC_CRIT_TEMP; 2102 temp_event_data.data = 0xFFFFFFFF; 2103 2104 shost = lpfc_shost_from_vport(phba->pport); 2105 fc_host_post_vendor_event(shost, fc_get_event_number(), 2106 sizeof(temp_event_data), 2107 (char *)&temp_event_data, 2108 SCSI_NL_VID_TYPE_PCI 2109 | PCI_VENDOR_ID_EMULEX); 2110 2111 spin_lock_irq(&phba->hbalock); 2112 phba->over_temp_state = HBA_OVER_TEMP; 2113 spin_unlock_irq(&phba->hbalock); 2114 lpfc_sli4_offline_eratt(phba); 2115 return; 2116 } 2117 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2118 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { 2119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2120 "3143 Port Down: Firmware Update " 2121 "Detected\n"); 2122 en_rn_msg = false; 2123 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2124 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2125 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2126 "3144 Port Down: Debug Dump\n"); 2127 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2128 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) 2129 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2130 "3145 Port Down: Provisioning\n"); 2131 2132 /* If resets are disabled then leave the HBA alone and return */ 2133 if (!phba->cfg_enable_hba_reset) 2134 return; 2135 2136 /* Check port status register for function reset */ 2137 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, 2138 en_rn_msg); 2139 if (rc == 0) { 2140 /* don't report event on forced debug dump */ 2141 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2142 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2143 return; 2144 else 2145 break; 2146 } 2147 /* fall through for not able to recover */ 2148 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2149 "3152 Unrecoverable error\n"); 2150 lpfc_sli4_offline_eratt(phba); 2151 break; 2152 case LPFC_SLI_INTF_IF_TYPE_1: 2153 default: 2154 break; 2155 } 2156 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 2157 "3123 Report dump event to upper layer\n"); 2158 /* Send an internal error event to mgmt application */ 2159 lpfc_board_errevt_to_mgmt(phba); 2160 2161 event_data = FC_REG_DUMP_EVENT; 2162 shost = lpfc_shost_from_vport(vport); 2163 fc_host_post_vendor_event(shost, fc_get_event_number(), 2164 sizeof(event_data), (char *) &event_data, 2165 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 2166 } 2167 2168 /** 2169 * lpfc_handle_eratt - Wrapper func for handling hba error attention 2170 * @phba: pointer to lpfc HBA data structure. 2171 * 2172 * This routine wraps the actual SLI3 or SLI4 hba error attention handling 2173 * routine from the API jump table function pointer from the lpfc_hba struct. 2174 * 2175 * Return codes 2176 * 0 - success. 2177 * Any other value - error. 2178 **/ 2179 void 2180 lpfc_handle_eratt(struct lpfc_hba *phba) 2181 { 2182 (*phba->lpfc_handle_eratt)(phba); 2183 } 2184 2185 /** 2186 * lpfc_handle_latt - The HBA link event handler 2187 * @phba: pointer to lpfc hba data structure. 2188 * 2189 * This routine is invoked from the worker thread to handle a HBA host 2190 * attention link event. SLI3 only. 2191 **/ 2192 void 2193 lpfc_handle_latt(struct lpfc_hba *phba) 2194 { 2195 struct lpfc_vport *vport = phba->pport; 2196 struct lpfc_sli *psli = &phba->sli; 2197 LPFC_MBOXQ_t *pmb; 2198 volatile uint32_t control; 2199 int rc = 0; 2200 2201 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 2202 if (!pmb) { 2203 rc = 1; 2204 goto lpfc_handle_latt_err_exit; 2205 } 2206 2207 rc = lpfc_mbox_rsrc_prep(phba, pmb); 2208 if (rc) { 2209 rc = 2; 2210 mempool_free(pmb, phba->mbox_mem_pool); 2211 goto lpfc_handle_latt_err_exit; 2212 } 2213 2214 /* Cleanup any outstanding ELS commands */ 2215 lpfc_els_flush_all_cmd(phba); 2216 psli->slistat.link_event++; 2217 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 2218 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 2219 pmb->vport = vport; 2220 /* Block ELS IOCBs until we have processed this mbox command */ 2221 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; 2222 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); 2223 if (rc == MBX_NOT_FINISHED) { 2224 rc = 4; 2225 goto lpfc_handle_latt_free_mbuf; 2226 } 2227 2228 /* Clear Link Attention in HA REG */ 2229 spin_lock_irq(&phba->hbalock); 2230 writel(HA_LATT, phba->HAregaddr); 2231 readl(phba->HAregaddr); /* flush */ 2232 spin_unlock_irq(&phba->hbalock); 2233 2234 return; 2235 2236 lpfc_handle_latt_free_mbuf: 2237 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; 2238 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 2239 lpfc_handle_latt_err_exit: 2240 /* Enable Link attention interrupts */ 2241 spin_lock_irq(&phba->hbalock); 2242 psli->sli_flag |= LPFC_PROCESS_LA; 2243 control = readl(phba->HCregaddr); 2244 control |= HC_LAINT_ENA; 2245 writel(control, phba->HCregaddr); 2246 readl(phba->HCregaddr); /* flush */ 2247 2248 /* Clear Link Attention in HA REG */ 2249 writel(HA_LATT, phba->HAregaddr); 2250 readl(phba->HAregaddr); /* flush */ 2251 spin_unlock_irq(&phba->hbalock); 2252 lpfc_linkdown(phba); 2253 phba->link_state = LPFC_HBA_ERROR; 2254 2255 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2256 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); 2257 2258 return; 2259 } 2260 2261 static void 2262 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex) 2263 { 2264 int i, j; 2265 2266 while (length > 0) { 2267 /* Look for Serial Number */ 2268 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) { 2269 *pindex += 2; 2270 i = vpd[*pindex]; 2271 *pindex += 1; 2272 j = 0; 2273 length -= (3+i); 2274 while (i--) { 2275 phba->SerialNumber[j++] = vpd[(*pindex)++]; 2276 if (j == 31) 2277 break; 2278 } 2279 phba->SerialNumber[j] = 0; 2280 continue; 2281 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) { 2282 phba->vpd_flag |= VPD_MODEL_DESC; 2283 *pindex += 2; 2284 i = vpd[*pindex]; 2285 *pindex += 1; 2286 j = 0; 2287 length -= (3+i); 2288 while (i--) { 2289 phba->ModelDesc[j++] = vpd[(*pindex)++]; 2290 if (j == 255) 2291 break; 2292 } 2293 phba->ModelDesc[j] = 0; 2294 continue; 2295 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) { 2296 phba->vpd_flag |= VPD_MODEL_NAME; 2297 *pindex += 2; 2298 i = vpd[*pindex]; 2299 *pindex += 1; 2300 j = 0; 2301 length -= (3+i); 2302 while (i--) { 2303 phba->ModelName[j++] = vpd[(*pindex)++]; 2304 if (j == 79) 2305 break; 2306 } 2307 phba->ModelName[j] = 0; 2308 continue; 2309 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) { 2310 phba->vpd_flag |= VPD_PROGRAM_TYPE; 2311 *pindex += 2; 2312 i = vpd[*pindex]; 2313 *pindex += 1; 2314 j = 0; 2315 length -= (3+i); 2316 while (i--) { 2317 phba->ProgramType[j++] = vpd[(*pindex)++]; 2318 if (j == 255) 2319 break; 2320 } 2321 phba->ProgramType[j] = 0; 2322 continue; 2323 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) { 2324 phba->vpd_flag |= VPD_PORT; 2325 *pindex += 2; 2326 i = vpd[*pindex]; 2327 *pindex += 1; 2328 j = 0; 2329 length -= (3 + i); 2330 while (i--) { 2331 if ((phba->sli_rev == LPFC_SLI_REV4) && 2332 (phba->sli4_hba.pport_name_sta == 2333 LPFC_SLI4_PPNAME_GET)) { 2334 j++; 2335 (*pindex)++; 2336 } else 2337 phba->Port[j++] = vpd[(*pindex)++]; 2338 if (j == 19) 2339 break; 2340 } 2341 if ((phba->sli_rev != LPFC_SLI_REV4) || 2342 (phba->sli4_hba.pport_name_sta == 2343 LPFC_SLI4_PPNAME_NON)) 2344 phba->Port[j] = 0; 2345 continue; 2346 } else { 2347 *pindex += 2; 2348 i = vpd[*pindex]; 2349 *pindex += 1; 2350 *pindex += i; 2351 length -= (3 + i); 2352 } 2353 } 2354 } 2355 2356 /** 2357 * lpfc_parse_vpd - Parse VPD (Vital Product Data) 2358 * @phba: pointer to lpfc hba data structure. 2359 * @vpd: pointer to the vital product data. 2360 * @len: length of the vital product data in bytes. 2361 * 2362 * This routine parses the Vital Product Data (VPD). The VPD is treated as 2363 * an array of characters. In this routine, the ModelName, ProgramType, and 2364 * ModelDesc, etc. fields of the phba data structure will be populated. 2365 * 2366 * Return codes 2367 * 0 - pointer to the VPD passed in is NULL 2368 * 1 - success 2369 **/ 2370 int 2371 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) 2372 { 2373 uint8_t lenlo, lenhi; 2374 int Length; 2375 int i; 2376 int finished = 0; 2377 int index = 0; 2378 2379 if (!vpd) 2380 return 0; 2381 2382 /* Vital Product */ 2383 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 2384 "0455 Vital Product Data: x%x x%x x%x x%x\n", 2385 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 2386 (uint32_t) vpd[3]); 2387 while (!finished && (index < (len - 4))) { 2388 switch (vpd[index]) { 2389 case 0x82: 2390 case 0x91: 2391 index += 1; 2392 lenlo = vpd[index]; 2393 index += 1; 2394 lenhi = vpd[index]; 2395 index += 1; 2396 i = ((((unsigned short)lenhi) << 8) + lenlo); 2397 index += i; 2398 break; 2399 case 0x90: 2400 index += 1; 2401 lenlo = vpd[index]; 2402 index += 1; 2403 lenhi = vpd[index]; 2404 index += 1; 2405 Length = ((((unsigned short)lenhi) << 8) + lenlo); 2406 if (Length > len - index) 2407 Length = len - index; 2408 2409 lpfc_fill_vpd(phba, vpd, Length, &index); 2410 finished = 0; 2411 break; 2412 case 0x78: 2413 finished = 1; 2414 break; 2415 default: 2416 index ++; 2417 break; 2418 } 2419 } 2420 2421 return(1); 2422 } 2423 2424 /** 2425 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description 2426 * @phba: pointer to lpfc hba data structure. 2427 * @mdp: pointer to the data structure to hold the derived model name. 2428 * @descp: pointer to the data structure to hold the derived description. 2429 * 2430 * This routine retrieves HBA's description based on its registered PCI device 2431 * ID. The @descp passed into this function points to an array of 256 chars. It 2432 * shall be returned with the model name, maximum speed, and the host bus type. 2433 * The @mdp passed into this function points to an array of 80 chars. When the 2434 * function returns, the @mdp will be filled with the model name. 2435 **/ 2436 static void 2437 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2438 { 2439 uint16_t sub_dev_id = phba->pcidev->subsystem_device; 2440 char *model = "<Unknown>"; 2441 int tbolt = 0; 2442 2443 switch (sub_dev_id) { 2444 case PCI_DEVICE_ID_CLRY_161E: 2445 model = "161E"; 2446 break; 2447 case PCI_DEVICE_ID_CLRY_162E: 2448 model = "162E"; 2449 break; 2450 case PCI_DEVICE_ID_CLRY_164E: 2451 model = "164E"; 2452 break; 2453 case PCI_DEVICE_ID_CLRY_161P: 2454 model = "161P"; 2455 break; 2456 case PCI_DEVICE_ID_CLRY_162P: 2457 model = "162P"; 2458 break; 2459 case PCI_DEVICE_ID_CLRY_164P: 2460 model = "164P"; 2461 break; 2462 case PCI_DEVICE_ID_CLRY_321E: 2463 model = "321E"; 2464 break; 2465 case PCI_DEVICE_ID_CLRY_322E: 2466 model = "322E"; 2467 break; 2468 case PCI_DEVICE_ID_CLRY_324E: 2469 model = "324E"; 2470 break; 2471 case PCI_DEVICE_ID_CLRY_321P: 2472 model = "321P"; 2473 break; 2474 case PCI_DEVICE_ID_CLRY_322P: 2475 model = "322P"; 2476 break; 2477 case PCI_DEVICE_ID_CLRY_324P: 2478 model = "324P"; 2479 break; 2480 case PCI_DEVICE_ID_TLFC_2XX2: 2481 model = "2XX2"; 2482 tbolt = 1; 2483 break; 2484 case PCI_DEVICE_ID_TLFC_3162: 2485 model = "3162"; 2486 tbolt = 1; 2487 break; 2488 case PCI_DEVICE_ID_TLFC_3322: 2489 model = "3322"; 2490 tbolt = 1; 2491 break; 2492 default: 2493 model = "Unknown"; 2494 break; 2495 } 2496 2497 if (mdp && mdp[0] == '\0') 2498 snprintf(mdp, 79, "%s", model); 2499 2500 if (descp && descp[0] == '\0') 2501 snprintf(descp, 255, 2502 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s", 2503 (tbolt) ? "ThunderLink FC " : "Celerity FC-", 2504 model, 2505 phba->Port); 2506 } 2507 2508 /** 2509 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description 2510 * @phba: pointer to lpfc hba data structure. 2511 * @mdp: pointer to the data structure to hold the derived model name. 2512 * @descp: pointer to the data structure to hold the derived description. 2513 * 2514 * This routine retrieves HBA's description based on its registered PCI device 2515 * ID. The @descp passed into this function points to an array of 256 chars. It 2516 * shall be returned with the model name, maximum speed, and the host bus type. 2517 * The @mdp passed into this function points to an array of 80 chars. When the 2518 * function returns, the @mdp will be filled with the model name. 2519 **/ 2520 static void 2521 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2522 { 2523 lpfc_vpd_t *vp; 2524 uint16_t dev_id = phba->pcidev->device; 2525 int max_speed; 2526 int GE = 0; 2527 int oneConnect = 0; /* default is not a oneConnect */ 2528 struct { 2529 char *name; 2530 char *bus; 2531 char *function; 2532 } m = {"<Unknown>", "", ""}; 2533 2534 if (mdp && mdp[0] != '\0' 2535 && descp && descp[0] != '\0') 2536 return; 2537 2538 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) { 2539 lpfc_get_atto_model_desc(phba, mdp, descp); 2540 return; 2541 } 2542 2543 if (phba->lmt & LMT_64Gb) 2544 max_speed = 64; 2545 else if (phba->lmt & LMT_32Gb) 2546 max_speed = 32; 2547 else if (phba->lmt & LMT_16Gb) 2548 max_speed = 16; 2549 else if (phba->lmt & LMT_10Gb) 2550 max_speed = 10; 2551 else if (phba->lmt & LMT_8Gb) 2552 max_speed = 8; 2553 else if (phba->lmt & LMT_4Gb) 2554 max_speed = 4; 2555 else if (phba->lmt & LMT_2Gb) 2556 max_speed = 2; 2557 else if (phba->lmt & LMT_1Gb) 2558 max_speed = 1; 2559 else 2560 max_speed = 0; 2561 2562 vp = &phba->vpd; 2563 2564 switch (dev_id) { 2565 case PCI_DEVICE_ID_FIREFLY: 2566 m = (typeof(m)){"LP6000", "PCI", 2567 "Obsolete, Unsupported Fibre Channel Adapter"}; 2568 break; 2569 case PCI_DEVICE_ID_SUPERFLY: 2570 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 2571 m = (typeof(m)){"LP7000", "PCI", ""}; 2572 else 2573 m = (typeof(m)){"LP7000E", "PCI", ""}; 2574 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2575 break; 2576 case PCI_DEVICE_ID_DRAGONFLY: 2577 m = (typeof(m)){"LP8000", "PCI", 2578 "Obsolete, Unsupported Fibre Channel Adapter"}; 2579 break; 2580 case PCI_DEVICE_ID_CENTAUR: 2581 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 2582 m = (typeof(m)){"LP9002", "PCI", ""}; 2583 else 2584 m = (typeof(m)){"LP9000", "PCI", ""}; 2585 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2586 break; 2587 case PCI_DEVICE_ID_RFLY: 2588 m = (typeof(m)){"LP952", "PCI", 2589 "Obsolete, Unsupported Fibre Channel Adapter"}; 2590 break; 2591 case PCI_DEVICE_ID_PEGASUS: 2592 m = (typeof(m)){"LP9802", "PCI-X", 2593 "Obsolete, Unsupported Fibre Channel Adapter"}; 2594 break; 2595 case PCI_DEVICE_ID_THOR: 2596 m = (typeof(m)){"LP10000", "PCI-X", 2597 "Obsolete, Unsupported Fibre Channel Adapter"}; 2598 break; 2599 case PCI_DEVICE_ID_VIPER: 2600 m = (typeof(m)){"LPX1000", "PCI-X", 2601 "Obsolete, Unsupported Fibre Channel Adapter"}; 2602 break; 2603 case PCI_DEVICE_ID_PFLY: 2604 m = (typeof(m)){"LP982", "PCI-X", 2605 "Obsolete, Unsupported Fibre Channel Adapter"}; 2606 break; 2607 case PCI_DEVICE_ID_TFLY: 2608 m = (typeof(m)){"LP1050", "PCI-X", 2609 "Obsolete, Unsupported Fibre Channel Adapter"}; 2610 break; 2611 case PCI_DEVICE_ID_HELIOS: 2612 m = (typeof(m)){"LP11000", "PCI-X2", 2613 "Obsolete, Unsupported Fibre Channel Adapter"}; 2614 break; 2615 case PCI_DEVICE_ID_HELIOS_SCSP: 2616 m = (typeof(m)){"LP11000-SP", "PCI-X2", 2617 "Obsolete, Unsupported Fibre Channel Adapter"}; 2618 break; 2619 case PCI_DEVICE_ID_HELIOS_DCSP: 2620 m = (typeof(m)){"LP11002-SP", "PCI-X2", 2621 "Obsolete, Unsupported Fibre Channel Adapter"}; 2622 break; 2623 case PCI_DEVICE_ID_NEPTUNE: 2624 m = (typeof(m)){"LPe1000", "PCIe", 2625 "Obsolete, Unsupported Fibre Channel Adapter"}; 2626 break; 2627 case PCI_DEVICE_ID_NEPTUNE_SCSP: 2628 m = (typeof(m)){"LPe1000-SP", "PCIe", 2629 "Obsolete, Unsupported Fibre Channel Adapter"}; 2630 break; 2631 case PCI_DEVICE_ID_NEPTUNE_DCSP: 2632 m = (typeof(m)){"LPe1002-SP", "PCIe", 2633 "Obsolete, Unsupported Fibre Channel Adapter"}; 2634 break; 2635 case PCI_DEVICE_ID_BMID: 2636 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; 2637 break; 2638 case PCI_DEVICE_ID_BSMB: 2639 m = (typeof(m)){"LP111", "PCI-X2", 2640 "Obsolete, Unsupported Fibre Channel Adapter"}; 2641 break; 2642 case PCI_DEVICE_ID_ZEPHYR: 2643 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2644 break; 2645 case PCI_DEVICE_ID_ZEPHYR_SCSP: 2646 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2647 break; 2648 case PCI_DEVICE_ID_ZEPHYR_DCSP: 2649 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; 2650 GE = 1; 2651 break; 2652 case PCI_DEVICE_ID_ZMID: 2653 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; 2654 break; 2655 case PCI_DEVICE_ID_ZSMB: 2656 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; 2657 break; 2658 case PCI_DEVICE_ID_LP101: 2659 m = (typeof(m)){"LP101", "PCI-X", 2660 "Obsolete, Unsupported Fibre Channel Adapter"}; 2661 break; 2662 case PCI_DEVICE_ID_LP10000S: 2663 m = (typeof(m)){"LP10000-S", "PCI", 2664 "Obsolete, Unsupported Fibre Channel Adapter"}; 2665 break; 2666 case PCI_DEVICE_ID_LP11000S: 2667 m = (typeof(m)){"LP11000-S", "PCI-X2", 2668 "Obsolete, Unsupported Fibre Channel Adapter"}; 2669 break; 2670 case PCI_DEVICE_ID_LPE11000S: 2671 m = (typeof(m)){"LPe11000-S", "PCIe", 2672 "Obsolete, Unsupported Fibre Channel Adapter"}; 2673 break; 2674 case PCI_DEVICE_ID_SAT: 2675 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; 2676 break; 2677 case PCI_DEVICE_ID_SAT_MID: 2678 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; 2679 break; 2680 case PCI_DEVICE_ID_SAT_SMB: 2681 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; 2682 break; 2683 case PCI_DEVICE_ID_SAT_DCSP: 2684 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; 2685 break; 2686 case PCI_DEVICE_ID_SAT_SCSP: 2687 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; 2688 break; 2689 case PCI_DEVICE_ID_SAT_S: 2690 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; 2691 break; 2692 case PCI_DEVICE_ID_PROTEUS_VF: 2693 m = (typeof(m)){"LPev12000", "PCIe IOV", 2694 "Obsolete, Unsupported Fibre Channel Adapter"}; 2695 break; 2696 case PCI_DEVICE_ID_PROTEUS_PF: 2697 m = (typeof(m)){"LPev12000", "PCIe IOV", 2698 "Obsolete, Unsupported Fibre Channel Adapter"}; 2699 break; 2700 case PCI_DEVICE_ID_PROTEUS_S: 2701 m = (typeof(m)){"LPemv12002-S", "PCIe IOV", 2702 "Obsolete, Unsupported Fibre Channel Adapter"}; 2703 break; 2704 case PCI_DEVICE_ID_TIGERSHARK: 2705 oneConnect = 1; 2706 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; 2707 break; 2708 case PCI_DEVICE_ID_TOMCAT: 2709 oneConnect = 1; 2710 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; 2711 break; 2712 case PCI_DEVICE_ID_FALCON: 2713 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", 2714 "EmulexSecure Fibre"}; 2715 break; 2716 case PCI_DEVICE_ID_BALIUS: 2717 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", 2718 "Obsolete, Unsupported Fibre Channel Adapter"}; 2719 break; 2720 case PCI_DEVICE_ID_LANCER_FC: 2721 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; 2722 break; 2723 case PCI_DEVICE_ID_LANCER_FC_VF: 2724 m = (typeof(m)){"LPe16000", "PCIe", 2725 "Obsolete, Unsupported Fibre Channel Adapter"}; 2726 break; 2727 case PCI_DEVICE_ID_LANCER_FCOE: 2728 oneConnect = 1; 2729 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; 2730 break; 2731 case PCI_DEVICE_ID_LANCER_FCOE_VF: 2732 oneConnect = 1; 2733 m = (typeof(m)){"OCe15100", "PCIe", 2734 "Obsolete, Unsupported FCoE"}; 2735 break; 2736 case PCI_DEVICE_ID_LANCER_G6_FC: 2737 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; 2738 break; 2739 case PCI_DEVICE_ID_LANCER_G7_FC: 2740 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; 2741 break; 2742 case PCI_DEVICE_ID_LANCER_G7P_FC: 2743 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"}; 2744 break; 2745 case PCI_DEVICE_ID_SKYHAWK: 2746 case PCI_DEVICE_ID_SKYHAWK_VF: 2747 oneConnect = 1; 2748 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; 2749 break; 2750 default: 2751 m = (typeof(m)){"Unknown", "", ""}; 2752 break; 2753 } 2754 2755 if (mdp && mdp[0] == '\0') 2756 snprintf(mdp, 79,"%s", m.name); 2757 /* 2758 * oneConnect hba requires special processing, they are all initiators 2759 * and we put the port number on the end 2760 */ 2761 if (descp && descp[0] == '\0') { 2762 if (oneConnect) 2763 snprintf(descp, 255, 2764 "Emulex OneConnect %s, %s Initiator %s", 2765 m.name, m.function, 2766 phba->Port); 2767 else if (max_speed == 0) 2768 snprintf(descp, 255, 2769 "Emulex %s %s %s", 2770 m.name, m.bus, m.function); 2771 else 2772 snprintf(descp, 255, 2773 "Emulex %s %d%s %s %s", 2774 m.name, max_speed, (GE) ? "GE" : "Gb", 2775 m.bus, m.function); 2776 } 2777 } 2778 2779 /** 2780 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring 2781 * @phba: pointer to lpfc hba data structure. 2782 * @pring: pointer to a IOCB ring. 2783 * @cnt: the number of IOCBs to be posted to the IOCB ring. 2784 * 2785 * This routine posts a given number of IOCBs with the associated DMA buffer 2786 * descriptors specified by the cnt argument to the given IOCB ring. 2787 * 2788 * Return codes 2789 * The number of IOCBs NOT able to be posted to the IOCB ring. 2790 **/ 2791 int 2792 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) 2793 { 2794 IOCB_t *icmd; 2795 struct lpfc_iocbq *iocb; 2796 struct lpfc_dmabuf *mp1, *mp2; 2797 2798 cnt += pring->missbufcnt; 2799 2800 /* While there are buffers to post */ 2801 while (cnt > 0) { 2802 /* Allocate buffer for command iocb */ 2803 iocb = lpfc_sli_get_iocbq(phba); 2804 if (iocb == NULL) { 2805 pring->missbufcnt = cnt; 2806 return cnt; 2807 } 2808 icmd = &iocb->iocb; 2809 2810 /* 2 buffers can be posted per command */ 2811 /* Allocate buffer to post */ 2812 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2813 if (mp1) 2814 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); 2815 if (!mp1 || !mp1->virt) { 2816 kfree(mp1); 2817 lpfc_sli_release_iocbq(phba, iocb); 2818 pring->missbufcnt = cnt; 2819 return cnt; 2820 } 2821 2822 INIT_LIST_HEAD(&mp1->list); 2823 /* Allocate buffer to post */ 2824 if (cnt > 1) { 2825 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2826 if (mp2) 2827 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 2828 &mp2->phys); 2829 if (!mp2 || !mp2->virt) { 2830 kfree(mp2); 2831 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2832 kfree(mp1); 2833 lpfc_sli_release_iocbq(phba, iocb); 2834 pring->missbufcnt = cnt; 2835 return cnt; 2836 } 2837 2838 INIT_LIST_HEAD(&mp2->list); 2839 } else { 2840 mp2 = NULL; 2841 } 2842 2843 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 2844 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 2845 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 2846 icmd->ulpBdeCount = 1; 2847 cnt--; 2848 if (mp2) { 2849 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 2850 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 2851 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 2852 cnt--; 2853 icmd->ulpBdeCount = 2; 2854 } 2855 2856 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 2857 icmd->ulpLe = 1; 2858 2859 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == 2860 IOCB_ERROR) { 2861 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2862 kfree(mp1); 2863 cnt++; 2864 if (mp2) { 2865 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 2866 kfree(mp2); 2867 cnt++; 2868 } 2869 lpfc_sli_release_iocbq(phba, iocb); 2870 pring->missbufcnt = cnt; 2871 return cnt; 2872 } 2873 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 2874 if (mp2) 2875 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 2876 } 2877 pring->missbufcnt = 0; 2878 return 0; 2879 } 2880 2881 /** 2882 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring 2883 * @phba: pointer to lpfc hba data structure. 2884 * 2885 * This routine posts initial receive IOCB buffers to the ELS ring. The 2886 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is 2887 * set to 64 IOCBs. SLI3 only. 2888 * 2889 * Return codes 2890 * 0 - success (currently always success) 2891 **/ 2892 static int 2893 lpfc_post_rcv_buf(struct lpfc_hba *phba) 2894 { 2895 struct lpfc_sli *psli = &phba->sli; 2896 2897 /* Ring 0, ELS / CT buffers */ 2898 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); 2899 /* Ring 2 - FCP no buffers needed */ 2900 2901 return 0; 2902 } 2903 2904 #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 2905 2906 /** 2907 * lpfc_sha_init - Set up initial array of hash table entries 2908 * @HashResultPointer: pointer to an array as hash table. 2909 * 2910 * This routine sets up the initial values to the array of hash table entries 2911 * for the LC HBAs. 2912 **/ 2913 static void 2914 lpfc_sha_init(uint32_t * HashResultPointer) 2915 { 2916 HashResultPointer[0] = 0x67452301; 2917 HashResultPointer[1] = 0xEFCDAB89; 2918 HashResultPointer[2] = 0x98BADCFE; 2919 HashResultPointer[3] = 0x10325476; 2920 HashResultPointer[4] = 0xC3D2E1F0; 2921 } 2922 2923 /** 2924 * lpfc_sha_iterate - Iterate initial hash table with the working hash table 2925 * @HashResultPointer: pointer to an initial/result hash table. 2926 * @HashWorkingPointer: pointer to an working hash table. 2927 * 2928 * This routine iterates an initial hash table pointed by @HashResultPointer 2929 * with the values from the working hash table pointeed by @HashWorkingPointer. 2930 * The results are putting back to the initial hash table, returned through 2931 * the @HashResultPointer as the result hash table. 2932 **/ 2933 static void 2934 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 2935 { 2936 int t; 2937 uint32_t TEMP; 2938 uint32_t A, B, C, D, E; 2939 t = 16; 2940 do { 2941 HashWorkingPointer[t] = 2942 S(1, 2943 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 2944 8] ^ 2945 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 2946 } while (++t <= 79); 2947 t = 0; 2948 A = HashResultPointer[0]; 2949 B = HashResultPointer[1]; 2950 C = HashResultPointer[2]; 2951 D = HashResultPointer[3]; 2952 E = HashResultPointer[4]; 2953 2954 do { 2955 if (t < 20) { 2956 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 2957 } else if (t < 40) { 2958 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 2959 } else if (t < 60) { 2960 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 2961 } else { 2962 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 2963 } 2964 TEMP += S(5, A) + E + HashWorkingPointer[t]; 2965 E = D; 2966 D = C; 2967 C = S(30, B); 2968 B = A; 2969 A = TEMP; 2970 } while (++t <= 79); 2971 2972 HashResultPointer[0] += A; 2973 HashResultPointer[1] += B; 2974 HashResultPointer[2] += C; 2975 HashResultPointer[3] += D; 2976 HashResultPointer[4] += E; 2977 2978 } 2979 2980 /** 2981 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA 2982 * @RandomChallenge: pointer to the entry of host challenge random number array. 2983 * @HashWorking: pointer to the entry of the working hash array. 2984 * 2985 * This routine calculates the working hash array referred by @HashWorking 2986 * from the challenge random numbers associated with the host, referred by 2987 * @RandomChallenge. The result is put into the entry of the working hash 2988 * array and returned by reference through @HashWorking. 2989 **/ 2990 static void 2991 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 2992 { 2993 *HashWorking = (*RandomChallenge ^ *HashWorking); 2994 } 2995 2996 /** 2997 * lpfc_hba_init - Perform special handling for LC HBA initialization 2998 * @phba: pointer to lpfc hba data structure. 2999 * @hbainit: pointer to an array of unsigned 32-bit integers. 3000 * 3001 * This routine performs the special handling for LC HBA initialization. 3002 **/ 3003 void 3004 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 3005 { 3006 int t; 3007 uint32_t *HashWorking; 3008 uint32_t *pwwnn = (uint32_t *) phba->wwnn; 3009 3010 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); 3011 if (!HashWorking) 3012 return; 3013 3014 HashWorking[0] = HashWorking[78] = *pwwnn++; 3015 HashWorking[1] = HashWorking[79] = *pwwnn; 3016 3017 for (t = 0; t < 7; t++) 3018 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 3019 3020 lpfc_sha_init(hbainit); 3021 lpfc_sha_iterate(hbainit, HashWorking); 3022 kfree(HashWorking); 3023 } 3024 3025 /** 3026 * lpfc_cleanup - Performs vport cleanups before deleting a vport 3027 * @vport: pointer to a virtual N_Port data structure. 3028 * 3029 * This routine performs the necessary cleanups before deleting the @vport. 3030 * It invokes the discovery state machine to perform necessary state 3031 * transitions and to release the ndlps associated with the @vport. Note, 3032 * the physical port is treated as @vport 0. 3033 **/ 3034 void 3035 lpfc_cleanup(struct lpfc_vport *vport) 3036 { 3037 struct lpfc_hba *phba = vport->phba; 3038 struct lpfc_nodelist *ndlp, *next_ndlp; 3039 int i = 0; 3040 3041 if (phba->link_state > LPFC_LINK_DOWN) 3042 lpfc_port_link_failure(vport); 3043 3044 /* Clean up VMID resources */ 3045 if (lpfc_is_vmid_enabled(phba)) 3046 lpfc_vmid_vport_cleanup(vport); 3047 3048 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 3049 if (vport->port_type != LPFC_PHYSICAL_PORT && 3050 ndlp->nlp_DID == Fabric_DID) { 3051 /* Just free up ndlp with Fabric_DID for vports */ 3052 lpfc_nlp_put(ndlp); 3053 continue; 3054 } 3055 3056 if (ndlp->nlp_DID == Fabric_Cntl_DID && 3057 ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 3058 lpfc_nlp_put(ndlp); 3059 continue; 3060 } 3061 3062 /* Fabric Ports not in UNMAPPED state are cleaned up in the 3063 * DEVICE_RM event. 3064 */ 3065 if (ndlp->nlp_type & NLP_FABRIC && 3066 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) 3067 lpfc_disc_state_machine(vport, ndlp, NULL, 3068 NLP_EVT_DEVICE_RECOVERY); 3069 3070 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) 3071 lpfc_disc_state_machine(vport, ndlp, NULL, 3072 NLP_EVT_DEVICE_RM); 3073 } 3074 3075 /* This is a special case flush to return all 3076 * IOs before entering this loop. There are 3077 * two points in the code where a flush is 3078 * avoided if the FC_UNLOADING flag is set. 3079 * one is in the multipool destroy, 3080 * (this prevents a crash) and the other is 3081 * in the nvme abort handler, ( also prevents 3082 * a crash). Both of these exceptions are 3083 * cases where the slot is still accessible. 3084 * The flush here is only when the pci slot 3085 * is offline. 3086 */ 3087 if (vport->load_flag & FC_UNLOADING && 3088 pci_channel_offline(phba->pcidev)) 3089 lpfc_sli_flush_io_rings(vport->phba); 3090 3091 /* At this point, ALL ndlp's should be gone 3092 * because of the previous NLP_EVT_DEVICE_RM. 3093 * Lets wait for this to happen, if needed. 3094 */ 3095 while (!list_empty(&vport->fc_nodes)) { 3096 if (i++ > 3000) { 3097 lpfc_printf_vlog(vport, KERN_ERR, 3098 LOG_TRACE_EVENT, 3099 "0233 Nodelist not empty\n"); 3100 list_for_each_entry_safe(ndlp, next_ndlp, 3101 &vport->fc_nodes, nlp_listp) { 3102 lpfc_printf_vlog(ndlp->vport, KERN_ERR, 3103 LOG_DISCOVERY, 3104 "0282 did:x%x ndlp:x%px " 3105 "refcnt:%d xflags x%x nflag x%x\n", 3106 ndlp->nlp_DID, (void *)ndlp, 3107 kref_read(&ndlp->kref), 3108 ndlp->fc4_xpt_flags, 3109 ndlp->nlp_flag); 3110 } 3111 break; 3112 } 3113 3114 /* Wait for any activity on ndlps to settle */ 3115 msleep(10); 3116 } 3117 lpfc_cleanup_vports_rrqs(vport, NULL); 3118 } 3119 3120 /** 3121 * lpfc_stop_vport_timers - Stop all the timers associated with a vport 3122 * @vport: pointer to a virtual N_Port data structure. 3123 * 3124 * This routine stops all the timers associated with a @vport. This function 3125 * is invoked before disabling or deleting a @vport. Note that the physical 3126 * port is treated as @vport 0. 3127 **/ 3128 void 3129 lpfc_stop_vport_timers(struct lpfc_vport *vport) 3130 { 3131 del_timer_sync(&vport->els_tmofunc); 3132 del_timer_sync(&vport->delayed_disc_tmo); 3133 lpfc_can_disctmo(vport); 3134 return; 3135 } 3136 3137 /** 3138 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3139 * @phba: pointer to lpfc hba data structure. 3140 * 3141 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The 3142 * caller of this routine should already hold the host lock. 3143 **/ 3144 void 3145 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3146 { 3147 /* Clear pending FCF rediscovery wait flag */ 3148 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 3149 3150 /* Now, try to stop the timer */ 3151 del_timer(&phba->fcf.redisc_wait); 3152 } 3153 3154 /** 3155 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3156 * @phba: pointer to lpfc hba data structure. 3157 * 3158 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It 3159 * checks whether the FCF rediscovery wait timer is pending with the host 3160 * lock held before proceeding with disabling the timer and clearing the 3161 * wait timer pendig flag. 3162 **/ 3163 void 3164 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3165 { 3166 spin_lock_irq(&phba->hbalock); 3167 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 3168 /* FCF rediscovery timer already fired or stopped */ 3169 spin_unlock_irq(&phba->hbalock); 3170 return; 3171 } 3172 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3173 /* Clear failover in progress flags */ 3174 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); 3175 spin_unlock_irq(&phba->hbalock); 3176 } 3177 3178 /** 3179 * lpfc_cmf_stop - Stop CMF processing 3180 * @phba: pointer to lpfc hba data structure. 3181 * 3182 * This is called when the link goes down or if CMF mode is turned OFF. 3183 * It is also called when going offline or unloaded just before the 3184 * congestion info buffer is unregistered. 3185 **/ 3186 void 3187 lpfc_cmf_stop(struct lpfc_hba *phba) 3188 { 3189 int cpu; 3190 struct lpfc_cgn_stat *cgs; 3191 3192 /* We only do something if CMF is enabled */ 3193 if (!phba->sli4_hba.pc_sli4_params.cmf) 3194 return; 3195 3196 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3197 "6221 Stop CMF / Cancel Timer\n"); 3198 3199 /* Cancel the CMF timer */ 3200 hrtimer_cancel(&phba->cmf_timer); 3201 3202 /* Zero CMF counters */ 3203 atomic_set(&phba->cmf_busy, 0); 3204 for_each_present_cpu(cpu) { 3205 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3206 atomic64_set(&cgs->total_bytes, 0); 3207 atomic64_set(&cgs->rcv_bytes, 0); 3208 atomic_set(&cgs->rx_io_cnt, 0); 3209 atomic64_set(&cgs->rx_latency, 0); 3210 } 3211 atomic_set(&phba->cmf_bw_wait, 0); 3212 3213 /* Resume any blocked IO - Queue unblock on workqueue */ 3214 queue_work(phba->wq, &phba->unblock_request_work); 3215 } 3216 3217 static inline uint64_t 3218 lpfc_get_max_line_rate(struct lpfc_hba *phba) 3219 { 3220 uint64_t rate = lpfc_sli_port_speed_get(phba); 3221 3222 return ((((unsigned long)rate) * 1024 * 1024) / 10); 3223 } 3224 3225 void 3226 lpfc_cmf_signal_init(struct lpfc_hba *phba) 3227 { 3228 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3229 "6223 Signal CMF init\n"); 3230 3231 /* Use the new fc_linkspeed to recalculate */ 3232 phba->cmf_interval_rate = LPFC_CMF_INTERVAL; 3233 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba); 3234 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 3235 phba->cmf_interval_rate, 1000); 3236 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; 3237 3238 /* This is a signal to firmware to sync up CMF BW with link speed */ 3239 lpfc_issue_cmf_sync_wqe(phba, 0, 0); 3240 } 3241 3242 /** 3243 * lpfc_cmf_start - Start CMF processing 3244 * @phba: pointer to lpfc hba data structure. 3245 * 3246 * This is called when the link comes up or if CMF mode is turned OFF 3247 * to Monitor or Managed. 3248 **/ 3249 void 3250 lpfc_cmf_start(struct lpfc_hba *phba) 3251 { 3252 struct lpfc_cgn_stat *cgs; 3253 int cpu; 3254 3255 /* We only do something if CMF is enabled */ 3256 if (!phba->sli4_hba.pc_sli4_params.cmf || 3257 phba->cmf_active_mode == LPFC_CFG_OFF) 3258 return; 3259 3260 /* Reinitialize congestion buffer info */ 3261 lpfc_init_congestion_buf(phba); 3262 3263 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 3264 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 3265 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 3266 atomic_set(&phba->cgn_sync_warn_cnt, 0); 3267 3268 atomic_set(&phba->cmf_busy, 0); 3269 for_each_present_cpu(cpu) { 3270 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3271 atomic64_set(&cgs->total_bytes, 0); 3272 atomic64_set(&cgs->rcv_bytes, 0); 3273 atomic_set(&cgs->rx_io_cnt, 0); 3274 atomic64_set(&cgs->rx_latency, 0); 3275 } 3276 phba->cmf_latency.tv_sec = 0; 3277 phba->cmf_latency.tv_nsec = 0; 3278 3279 lpfc_cmf_signal_init(phba); 3280 3281 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3282 "6222 Start CMF / Timer\n"); 3283 3284 phba->cmf_timer_cnt = 0; 3285 hrtimer_start(&phba->cmf_timer, 3286 ktime_set(0, LPFC_CMF_INTERVAL * 1000000), 3287 HRTIMER_MODE_REL); 3288 /* Setup for latency check in IO cmpl routines */ 3289 ktime_get_real_ts64(&phba->cmf_latency); 3290 3291 atomic_set(&phba->cmf_bw_wait, 0); 3292 atomic_set(&phba->cmf_stop_io, 0); 3293 } 3294 3295 /** 3296 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA 3297 * @phba: pointer to lpfc hba data structure. 3298 * 3299 * This routine stops all the timers associated with a HBA. This function is 3300 * invoked before either putting a HBA offline or unloading the driver. 3301 **/ 3302 void 3303 lpfc_stop_hba_timers(struct lpfc_hba *phba) 3304 { 3305 if (phba->pport) 3306 lpfc_stop_vport_timers(phba->pport); 3307 cancel_delayed_work_sync(&phba->eq_delay_work); 3308 cancel_delayed_work_sync(&phba->idle_stat_delay_work); 3309 del_timer_sync(&phba->sli.mbox_tmo); 3310 del_timer_sync(&phba->fabric_block_timer); 3311 del_timer_sync(&phba->eratt_poll); 3312 del_timer_sync(&phba->hb_tmofunc); 3313 if (phba->sli_rev == LPFC_SLI_REV4) { 3314 del_timer_sync(&phba->rrq_tmr); 3315 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 3316 } 3317 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 3318 3319 switch (phba->pci_dev_grp) { 3320 case LPFC_PCI_DEV_LP: 3321 /* Stop any LightPulse device specific driver timers */ 3322 del_timer_sync(&phba->fcp_poll_timer); 3323 break; 3324 case LPFC_PCI_DEV_OC: 3325 /* Stop any OneConnect device specific driver timers */ 3326 lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3327 break; 3328 default: 3329 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3330 "0297 Invalid device group (x%x)\n", 3331 phba->pci_dev_grp); 3332 break; 3333 } 3334 return; 3335 } 3336 3337 /** 3338 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked 3339 * @phba: pointer to lpfc hba data structure. 3340 * @mbx_action: flag for mailbox no wait action. 3341 * 3342 * This routine marks a HBA's management interface as blocked. Once the HBA's 3343 * management interface is marked as blocked, all the user space access to 3344 * the HBA, whether they are from sysfs interface or libdfc interface will 3345 * all be blocked. The HBA is set to block the management interface when the 3346 * driver prepares the HBA interface for online or offline. 3347 **/ 3348 static void 3349 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) 3350 { 3351 unsigned long iflag; 3352 uint8_t actcmd = MBX_HEARTBEAT; 3353 unsigned long timeout; 3354 3355 spin_lock_irqsave(&phba->hbalock, iflag); 3356 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; 3357 spin_unlock_irqrestore(&phba->hbalock, iflag); 3358 if (mbx_action == LPFC_MBX_NO_WAIT) 3359 return; 3360 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; 3361 spin_lock_irqsave(&phba->hbalock, iflag); 3362 if (phba->sli.mbox_active) { 3363 actcmd = phba->sli.mbox_active->u.mb.mbxCommand; 3364 /* Determine how long we might wait for the active mailbox 3365 * command to be gracefully completed by firmware. 3366 */ 3367 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, 3368 phba->sli.mbox_active) * 1000) + jiffies; 3369 } 3370 spin_unlock_irqrestore(&phba->hbalock, iflag); 3371 3372 /* Wait for the outstnading mailbox command to complete */ 3373 while (phba->sli.mbox_active) { 3374 /* Check active mailbox complete status every 2ms */ 3375 msleep(2); 3376 if (time_after(jiffies, timeout)) { 3377 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3378 "2813 Mgmt IO is Blocked %x " 3379 "- mbox cmd %x still active\n", 3380 phba->sli.sli_flag, actcmd); 3381 break; 3382 } 3383 } 3384 } 3385 3386 /** 3387 * lpfc_sli4_node_prep - Assign RPIs for active nodes. 3388 * @phba: pointer to lpfc hba data structure. 3389 * 3390 * Allocate RPIs for all active remote nodes. This is needed whenever 3391 * an SLI4 adapter is reset and the driver is not unloading. Its purpose 3392 * is to fixup the temporary rpi assignments. 3393 **/ 3394 void 3395 lpfc_sli4_node_prep(struct lpfc_hba *phba) 3396 { 3397 struct lpfc_nodelist *ndlp, *next_ndlp; 3398 struct lpfc_vport **vports; 3399 int i, rpi; 3400 3401 if (phba->sli_rev != LPFC_SLI_REV4) 3402 return; 3403 3404 vports = lpfc_create_vport_work_array(phba); 3405 if (vports == NULL) 3406 return; 3407 3408 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3409 if (vports[i]->load_flag & FC_UNLOADING) 3410 continue; 3411 3412 list_for_each_entry_safe(ndlp, next_ndlp, 3413 &vports[i]->fc_nodes, 3414 nlp_listp) { 3415 rpi = lpfc_sli4_alloc_rpi(phba); 3416 if (rpi == LPFC_RPI_ALLOC_ERROR) { 3417 /* TODO print log? */ 3418 continue; 3419 } 3420 ndlp->nlp_rpi = rpi; 3421 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 3422 LOG_NODE | LOG_DISCOVERY, 3423 "0009 Assign RPI x%x to ndlp x%px " 3424 "DID:x%06x flg:x%x\n", 3425 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, 3426 ndlp->nlp_flag); 3427 } 3428 } 3429 lpfc_destroy_vport_work_array(phba, vports); 3430 } 3431 3432 /** 3433 * lpfc_create_expedite_pool - create expedite pool 3434 * @phba: pointer to lpfc hba data structure. 3435 * 3436 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 3437 * to expedite pool. Mark them as expedite. 3438 **/ 3439 static void lpfc_create_expedite_pool(struct lpfc_hba *phba) 3440 { 3441 struct lpfc_sli4_hdw_queue *qp; 3442 struct lpfc_io_buf *lpfc_ncmd; 3443 struct lpfc_io_buf *lpfc_ncmd_next; 3444 struct lpfc_epd_pool *epd_pool; 3445 unsigned long iflag; 3446 3447 epd_pool = &phba->epd_pool; 3448 qp = &phba->sli4_hba.hdwq[0]; 3449 3450 spin_lock_init(&epd_pool->lock); 3451 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3452 spin_lock(&epd_pool->lock); 3453 INIT_LIST_HEAD(&epd_pool->list); 3454 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3455 &qp->lpfc_io_buf_list_put, list) { 3456 list_move_tail(&lpfc_ncmd->list, &epd_pool->list); 3457 lpfc_ncmd->expedite = true; 3458 qp->put_io_bufs--; 3459 epd_pool->count++; 3460 if (epd_pool->count >= XRI_BATCH) 3461 break; 3462 } 3463 spin_unlock(&epd_pool->lock); 3464 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3465 } 3466 3467 /** 3468 * lpfc_destroy_expedite_pool - destroy expedite pool 3469 * @phba: pointer to lpfc hba data structure. 3470 * 3471 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put 3472 * of HWQ 0. Clear the mark. 3473 **/ 3474 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) 3475 { 3476 struct lpfc_sli4_hdw_queue *qp; 3477 struct lpfc_io_buf *lpfc_ncmd; 3478 struct lpfc_io_buf *lpfc_ncmd_next; 3479 struct lpfc_epd_pool *epd_pool; 3480 unsigned long iflag; 3481 3482 epd_pool = &phba->epd_pool; 3483 qp = &phba->sli4_hba.hdwq[0]; 3484 3485 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3486 spin_lock(&epd_pool->lock); 3487 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3488 &epd_pool->list, list) { 3489 list_move_tail(&lpfc_ncmd->list, 3490 &qp->lpfc_io_buf_list_put); 3491 lpfc_ncmd->flags = false; 3492 qp->put_io_bufs++; 3493 epd_pool->count--; 3494 } 3495 spin_unlock(&epd_pool->lock); 3496 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3497 } 3498 3499 /** 3500 * lpfc_create_multixri_pools - create multi-XRI pools 3501 * @phba: pointer to lpfc hba data structure. 3502 * 3503 * This routine initialize public, private per HWQ. Then, move XRIs from 3504 * lpfc_io_buf_list_put to public pool. High and low watermark are also 3505 * Initialized. 3506 **/ 3507 void lpfc_create_multixri_pools(struct lpfc_hba *phba) 3508 { 3509 u32 i, j; 3510 u32 hwq_count; 3511 u32 count_per_hwq; 3512 struct lpfc_io_buf *lpfc_ncmd; 3513 struct lpfc_io_buf *lpfc_ncmd_next; 3514 unsigned long iflag; 3515 struct lpfc_sli4_hdw_queue *qp; 3516 struct lpfc_multixri_pool *multixri_pool; 3517 struct lpfc_pbl_pool *pbl_pool; 3518 struct lpfc_pvt_pool *pvt_pool; 3519 3520 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3521 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", 3522 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, 3523 phba->sli4_hba.io_xri_cnt); 3524 3525 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3526 lpfc_create_expedite_pool(phba); 3527 3528 hwq_count = phba->cfg_hdw_queue; 3529 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; 3530 3531 for (i = 0; i < hwq_count; i++) { 3532 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); 3533 3534 if (!multixri_pool) { 3535 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3536 "1238 Failed to allocate memory for " 3537 "multixri_pool\n"); 3538 3539 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3540 lpfc_destroy_expedite_pool(phba); 3541 3542 j = 0; 3543 while (j < i) { 3544 qp = &phba->sli4_hba.hdwq[j]; 3545 kfree(qp->p_multixri_pool); 3546 j++; 3547 } 3548 phba->cfg_xri_rebalancing = 0; 3549 return; 3550 } 3551 3552 qp = &phba->sli4_hba.hdwq[i]; 3553 qp->p_multixri_pool = multixri_pool; 3554 3555 multixri_pool->xri_limit = count_per_hwq; 3556 multixri_pool->rrb_next_hwqid = i; 3557 3558 /* Deal with public free xri pool */ 3559 pbl_pool = &multixri_pool->pbl_pool; 3560 spin_lock_init(&pbl_pool->lock); 3561 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3562 spin_lock(&pbl_pool->lock); 3563 INIT_LIST_HEAD(&pbl_pool->list); 3564 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3565 &qp->lpfc_io_buf_list_put, list) { 3566 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); 3567 qp->put_io_bufs--; 3568 pbl_pool->count++; 3569 } 3570 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3571 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", 3572 pbl_pool->count, i); 3573 spin_unlock(&pbl_pool->lock); 3574 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3575 3576 /* Deal with private free xri pool */ 3577 pvt_pool = &multixri_pool->pvt_pool; 3578 pvt_pool->high_watermark = multixri_pool->xri_limit / 2; 3579 pvt_pool->low_watermark = XRI_BATCH; 3580 spin_lock_init(&pvt_pool->lock); 3581 spin_lock_irqsave(&pvt_pool->lock, iflag); 3582 INIT_LIST_HEAD(&pvt_pool->list); 3583 pvt_pool->count = 0; 3584 spin_unlock_irqrestore(&pvt_pool->lock, iflag); 3585 } 3586 } 3587 3588 /** 3589 * lpfc_destroy_multixri_pools - destroy multi-XRI pools 3590 * @phba: pointer to lpfc hba data structure. 3591 * 3592 * This routine returns XRIs from public/private to lpfc_io_buf_list_put. 3593 **/ 3594 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) 3595 { 3596 u32 i; 3597 u32 hwq_count; 3598 struct lpfc_io_buf *lpfc_ncmd; 3599 struct lpfc_io_buf *lpfc_ncmd_next; 3600 unsigned long iflag; 3601 struct lpfc_sli4_hdw_queue *qp; 3602 struct lpfc_multixri_pool *multixri_pool; 3603 struct lpfc_pbl_pool *pbl_pool; 3604 struct lpfc_pvt_pool *pvt_pool; 3605 3606 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3607 lpfc_destroy_expedite_pool(phba); 3608 3609 if (!(phba->pport->load_flag & FC_UNLOADING)) 3610 lpfc_sli_flush_io_rings(phba); 3611 3612 hwq_count = phba->cfg_hdw_queue; 3613 3614 for (i = 0; i < hwq_count; i++) { 3615 qp = &phba->sli4_hba.hdwq[i]; 3616 multixri_pool = qp->p_multixri_pool; 3617 if (!multixri_pool) 3618 continue; 3619 3620 qp->p_multixri_pool = NULL; 3621 3622 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3623 3624 /* Deal with public free xri pool */ 3625 pbl_pool = &multixri_pool->pbl_pool; 3626 spin_lock(&pbl_pool->lock); 3627 3628 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3629 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", 3630 pbl_pool->count, i); 3631 3632 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3633 &pbl_pool->list, list) { 3634 list_move_tail(&lpfc_ncmd->list, 3635 &qp->lpfc_io_buf_list_put); 3636 qp->put_io_bufs++; 3637 pbl_pool->count--; 3638 } 3639 3640 INIT_LIST_HEAD(&pbl_pool->list); 3641 pbl_pool->count = 0; 3642 3643 spin_unlock(&pbl_pool->lock); 3644 3645 /* Deal with private free xri pool */ 3646 pvt_pool = &multixri_pool->pvt_pool; 3647 spin_lock(&pvt_pool->lock); 3648 3649 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3650 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", 3651 pvt_pool->count, i); 3652 3653 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3654 &pvt_pool->list, list) { 3655 list_move_tail(&lpfc_ncmd->list, 3656 &qp->lpfc_io_buf_list_put); 3657 qp->put_io_bufs++; 3658 pvt_pool->count--; 3659 } 3660 3661 INIT_LIST_HEAD(&pvt_pool->list); 3662 pvt_pool->count = 0; 3663 3664 spin_unlock(&pvt_pool->lock); 3665 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3666 3667 kfree(multixri_pool); 3668 } 3669 } 3670 3671 /** 3672 * lpfc_online - Initialize and bring a HBA online 3673 * @phba: pointer to lpfc hba data structure. 3674 * 3675 * This routine initializes the HBA and brings a HBA online. During this 3676 * process, the management interface is blocked to prevent user space access 3677 * to the HBA interfering with the driver initialization. 3678 * 3679 * Return codes 3680 * 0 - successful 3681 * 1 - failed 3682 **/ 3683 int 3684 lpfc_online(struct lpfc_hba *phba) 3685 { 3686 struct lpfc_vport *vport; 3687 struct lpfc_vport **vports; 3688 int i, error = 0; 3689 bool vpis_cleared = false; 3690 3691 if (!phba) 3692 return 0; 3693 vport = phba->pport; 3694 3695 if (!(vport->fc_flag & FC_OFFLINE_MODE)) 3696 return 0; 3697 3698 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3699 "0458 Bring Adapter online\n"); 3700 3701 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 3702 3703 if (phba->sli_rev == LPFC_SLI_REV4) { 3704 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ 3705 lpfc_unblock_mgmt_io(phba); 3706 return 1; 3707 } 3708 spin_lock_irq(&phba->hbalock); 3709 if (!phba->sli4_hba.max_cfg_param.vpi_used) 3710 vpis_cleared = true; 3711 spin_unlock_irq(&phba->hbalock); 3712 3713 /* Reestablish the local initiator port. 3714 * The offline process destroyed the previous lport. 3715 */ 3716 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && 3717 !phba->nvmet_support) { 3718 error = lpfc_nvme_create_localport(phba->pport); 3719 if (error) 3720 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3721 "6132 NVME restore reg failed " 3722 "on nvmei error x%x\n", error); 3723 } 3724 } else { 3725 lpfc_sli_queue_init(phba); 3726 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ 3727 lpfc_unblock_mgmt_io(phba); 3728 return 1; 3729 } 3730 } 3731 3732 vports = lpfc_create_vport_work_array(phba); 3733 if (vports != NULL) { 3734 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3735 struct Scsi_Host *shost; 3736 shost = lpfc_shost_from_vport(vports[i]); 3737 spin_lock_irq(shost->host_lock); 3738 vports[i]->fc_flag &= ~FC_OFFLINE_MODE; 3739 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) 3740 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3741 if (phba->sli_rev == LPFC_SLI_REV4) { 3742 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 3743 if ((vpis_cleared) && 3744 (vports[i]->port_type != 3745 LPFC_PHYSICAL_PORT)) 3746 vports[i]->vpi = 0; 3747 } 3748 spin_unlock_irq(shost->host_lock); 3749 } 3750 } 3751 lpfc_destroy_vport_work_array(phba, vports); 3752 3753 if (phba->cfg_xri_rebalancing) 3754 lpfc_create_multixri_pools(phba); 3755 3756 lpfc_cpuhp_add(phba); 3757 3758 lpfc_unblock_mgmt_io(phba); 3759 return 0; 3760 } 3761 3762 /** 3763 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked 3764 * @phba: pointer to lpfc hba data structure. 3765 * 3766 * This routine marks a HBA's management interface as not blocked. Once the 3767 * HBA's management interface is marked as not blocked, all the user space 3768 * access to the HBA, whether they are from sysfs interface or libdfc 3769 * interface will be allowed. The HBA is set to block the management interface 3770 * when the driver prepares the HBA interface for online or offline and then 3771 * set to unblock the management interface afterwards. 3772 **/ 3773 void 3774 lpfc_unblock_mgmt_io(struct lpfc_hba * phba) 3775 { 3776 unsigned long iflag; 3777 3778 spin_lock_irqsave(&phba->hbalock, iflag); 3779 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; 3780 spin_unlock_irqrestore(&phba->hbalock, iflag); 3781 } 3782 3783 /** 3784 * lpfc_offline_prep - Prepare a HBA to be brought offline 3785 * @phba: pointer to lpfc hba data structure. 3786 * @mbx_action: flag for mailbox shutdown action. 3787 * 3788 * This routine is invoked to prepare a HBA to be brought offline. It performs 3789 * unregistration login to all the nodes on all vports and flushes the mailbox 3790 * queue to make it ready to be brought offline. 3791 **/ 3792 void 3793 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) 3794 { 3795 struct lpfc_vport *vport = phba->pport; 3796 struct lpfc_nodelist *ndlp, *next_ndlp; 3797 struct lpfc_vport **vports; 3798 struct Scsi_Host *shost; 3799 int i; 3800 int offline; 3801 bool hba_pci_err; 3802 3803 if (vport->fc_flag & FC_OFFLINE_MODE) 3804 return; 3805 3806 lpfc_block_mgmt_io(phba, mbx_action); 3807 3808 lpfc_linkdown(phba); 3809 3810 offline = pci_channel_offline(phba->pcidev); 3811 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags); 3812 3813 /* Issue an unreg_login to all nodes on all vports */ 3814 vports = lpfc_create_vport_work_array(phba); 3815 if (vports != NULL) { 3816 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3817 if (vports[i]->load_flag & FC_UNLOADING) 3818 continue; 3819 shost = lpfc_shost_from_vport(vports[i]); 3820 spin_lock_irq(shost->host_lock); 3821 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 3822 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3823 vports[i]->fc_flag &= ~FC_VFI_REGISTERED; 3824 spin_unlock_irq(shost->host_lock); 3825 3826 shost = lpfc_shost_from_vport(vports[i]); 3827 list_for_each_entry_safe(ndlp, next_ndlp, 3828 &vports[i]->fc_nodes, 3829 nlp_listp) { 3830 3831 spin_lock_irq(&ndlp->lock); 3832 ndlp->nlp_flag &= ~NLP_NPR_ADISC; 3833 spin_unlock_irq(&ndlp->lock); 3834 3835 if (offline || hba_pci_err) { 3836 spin_lock_irq(&ndlp->lock); 3837 ndlp->nlp_flag &= ~(NLP_UNREG_INP | 3838 NLP_RPI_REGISTERED); 3839 spin_unlock_irq(&ndlp->lock); 3840 if (phba->sli_rev == LPFC_SLI_REV4) 3841 lpfc_sli_rpi_release(vports[i], 3842 ndlp); 3843 } else { 3844 lpfc_unreg_rpi(vports[i], ndlp); 3845 } 3846 /* 3847 * Whenever an SLI4 port goes offline, free the 3848 * RPI. Get a new RPI when the adapter port 3849 * comes back online. 3850 */ 3851 if (phba->sli_rev == LPFC_SLI_REV4) { 3852 lpfc_printf_vlog(vports[i], KERN_INFO, 3853 LOG_NODE | LOG_DISCOVERY, 3854 "0011 Free RPI x%x on " 3855 "ndlp: x%px did x%x\n", 3856 ndlp->nlp_rpi, ndlp, 3857 ndlp->nlp_DID); 3858 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); 3859 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; 3860 } 3861 3862 if (ndlp->nlp_type & NLP_FABRIC) { 3863 lpfc_disc_state_machine(vports[i], ndlp, 3864 NULL, NLP_EVT_DEVICE_RECOVERY); 3865 3866 /* Don't remove the node unless the node 3867 * has been unregistered with the 3868 * transport, and we're not in recovery 3869 * before dev_loss_tmo triggered. 3870 * Otherwise, let dev_loss take care of 3871 * the node. 3872 */ 3873 if (!(ndlp->save_flags & 3874 NLP_IN_RECOV_POST_DEV_LOSS) && 3875 !(ndlp->fc4_xpt_flags & 3876 (NVME_XPT_REGD | SCSI_XPT_REGD))) 3877 lpfc_disc_state_machine 3878 (vports[i], ndlp, 3879 NULL, 3880 NLP_EVT_DEVICE_RM); 3881 } 3882 } 3883 } 3884 } 3885 lpfc_destroy_vport_work_array(phba, vports); 3886 3887 lpfc_sli_mbox_sys_shutdown(phba, mbx_action); 3888 3889 if (phba->wq) 3890 flush_workqueue(phba->wq); 3891 } 3892 3893 /** 3894 * lpfc_offline - Bring a HBA offline 3895 * @phba: pointer to lpfc hba data structure. 3896 * 3897 * This routine actually brings a HBA offline. It stops all the timers 3898 * associated with the HBA, brings down the SLI layer, and eventually 3899 * marks the HBA as in offline state for the upper layer protocol. 3900 **/ 3901 void 3902 lpfc_offline(struct lpfc_hba *phba) 3903 { 3904 struct Scsi_Host *shost; 3905 struct lpfc_vport **vports; 3906 int i; 3907 3908 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3909 return; 3910 3911 /* stop port and all timers associated with this hba */ 3912 lpfc_stop_port(phba); 3913 3914 /* Tear down the local and target port registrations. The 3915 * nvme transports need to cleanup. 3916 */ 3917 lpfc_nvmet_destroy_targetport(phba); 3918 lpfc_nvme_destroy_localport(phba->pport); 3919 3920 vports = lpfc_create_vport_work_array(phba); 3921 if (vports != NULL) 3922 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 3923 lpfc_stop_vport_timers(vports[i]); 3924 lpfc_destroy_vport_work_array(phba, vports); 3925 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3926 "0460 Bring Adapter offline\n"); 3927 /* Bring down the SLI Layer and cleanup. The HBA is offline 3928 now. */ 3929 lpfc_sli_hba_down(phba); 3930 spin_lock_irq(&phba->hbalock); 3931 phba->work_ha = 0; 3932 spin_unlock_irq(&phba->hbalock); 3933 vports = lpfc_create_vport_work_array(phba); 3934 if (vports != NULL) 3935 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3936 shost = lpfc_shost_from_vport(vports[i]); 3937 spin_lock_irq(shost->host_lock); 3938 vports[i]->work_port_events = 0; 3939 vports[i]->fc_flag |= FC_OFFLINE_MODE; 3940 spin_unlock_irq(shost->host_lock); 3941 } 3942 lpfc_destroy_vport_work_array(phba, vports); 3943 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled 3944 * in hba_unset 3945 */ 3946 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3947 __lpfc_cpuhp_remove(phba); 3948 3949 if (phba->cfg_xri_rebalancing) 3950 lpfc_destroy_multixri_pools(phba); 3951 } 3952 3953 /** 3954 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists 3955 * @phba: pointer to lpfc hba data structure. 3956 * 3957 * This routine is to free all the SCSI buffers and IOCBs from the driver 3958 * list back to kernel. It is called from lpfc_pci_remove_one to free 3959 * the internal resources before the device is removed from the system. 3960 **/ 3961 static void 3962 lpfc_scsi_free(struct lpfc_hba *phba) 3963 { 3964 struct lpfc_io_buf *sb, *sb_next; 3965 3966 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 3967 return; 3968 3969 spin_lock_irq(&phba->hbalock); 3970 3971 /* Release all the lpfc_scsi_bufs maintained by this host. */ 3972 3973 spin_lock(&phba->scsi_buf_list_put_lock); 3974 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, 3975 list) { 3976 list_del(&sb->list); 3977 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3978 sb->dma_handle); 3979 kfree(sb); 3980 phba->total_scsi_bufs--; 3981 } 3982 spin_unlock(&phba->scsi_buf_list_put_lock); 3983 3984 spin_lock(&phba->scsi_buf_list_get_lock); 3985 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, 3986 list) { 3987 list_del(&sb->list); 3988 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3989 sb->dma_handle); 3990 kfree(sb); 3991 phba->total_scsi_bufs--; 3992 } 3993 spin_unlock(&phba->scsi_buf_list_get_lock); 3994 spin_unlock_irq(&phba->hbalock); 3995 } 3996 3997 /** 3998 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists 3999 * @phba: pointer to lpfc hba data structure. 4000 * 4001 * This routine is to free all the IO buffers and IOCBs from the driver 4002 * list back to kernel. It is called from lpfc_pci_remove_one to free 4003 * the internal resources before the device is removed from the system. 4004 **/ 4005 void 4006 lpfc_io_free(struct lpfc_hba *phba) 4007 { 4008 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; 4009 struct lpfc_sli4_hdw_queue *qp; 4010 int idx; 4011 4012 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4013 qp = &phba->sli4_hba.hdwq[idx]; 4014 /* Release all the lpfc_nvme_bufs maintained by this host. */ 4015 spin_lock(&qp->io_buf_list_put_lock); 4016 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4017 &qp->lpfc_io_buf_list_put, 4018 list) { 4019 list_del(&lpfc_ncmd->list); 4020 qp->put_io_bufs--; 4021 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4022 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4023 if (phba->cfg_xpsgl && !phba->nvmet_support) 4024 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4025 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4026 kfree(lpfc_ncmd); 4027 qp->total_io_bufs--; 4028 } 4029 spin_unlock(&qp->io_buf_list_put_lock); 4030 4031 spin_lock(&qp->io_buf_list_get_lock); 4032 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4033 &qp->lpfc_io_buf_list_get, 4034 list) { 4035 list_del(&lpfc_ncmd->list); 4036 qp->get_io_bufs--; 4037 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4038 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4039 if (phba->cfg_xpsgl && !phba->nvmet_support) 4040 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4041 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4042 kfree(lpfc_ncmd); 4043 qp->total_io_bufs--; 4044 } 4045 spin_unlock(&qp->io_buf_list_get_lock); 4046 } 4047 } 4048 4049 /** 4050 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping 4051 * @phba: pointer to lpfc hba data structure. 4052 * 4053 * This routine first calculates the sizes of the current els and allocated 4054 * scsi sgl lists, and then goes through all sgls to updates the physical 4055 * XRIs assigned due to port function reset. During port initialization, the 4056 * current els and allocated scsi sgl lists are 0s. 4057 * 4058 * Return codes 4059 * 0 - successful (for now, it always returns 0) 4060 **/ 4061 int 4062 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) 4063 { 4064 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4065 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4066 LIST_HEAD(els_sgl_list); 4067 int rc; 4068 4069 /* 4070 * update on pci function's els xri-sgl list 4071 */ 4072 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4073 4074 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { 4075 /* els xri-sgl expanded */ 4076 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; 4077 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4078 "3157 ELS xri-sgl count increased from " 4079 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4080 els_xri_cnt); 4081 /* allocate the additional els sgls */ 4082 for (i = 0; i < xri_cnt; i++) { 4083 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4084 GFP_KERNEL); 4085 if (sglq_entry == NULL) { 4086 lpfc_printf_log(phba, KERN_ERR, 4087 LOG_TRACE_EVENT, 4088 "2562 Failure to allocate an " 4089 "ELS sgl entry:%d\n", i); 4090 rc = -ENOMEM; 4091 goto out_free_mem; 4092 } 4093 sglq_entry->buff_type = GEN_BUFF_TYPE; 4094 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, 4095 &sglq_entry->phys); 4096 if (sglq_entry->virt == NULL) { 4097 kfree(sglq_entry); 4098 lpfc_printf_log(phba, KERN_ERR, 4099 LOG_TRACE_EVENT, 4100 "2563 Failure to allocate an " 4101 "ELS mbuf:%d\n", i); 4102 rc = -ENOMEM; 4103 goto out_free_mem; 4104 } 4105 sglq_entry->sgl = sglq_entry->virt; 4106 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); 4107 sglq_entry->state = SGL_FREED; 4108 list_add_tail(&sglq_entry->list, &els_sgl_list); 4109 } 4110 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4111 list_splice_init(&els_sgl_list, 4112 &phba->sli4_hba.lpfc_els_sgl_list); 4113 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4114 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { 4115 /* els xri-sgl shrinked */ 4116 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; 4117 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4118 "3158 ELS xri-sgl count decreased from " 4119 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4120 els_xri_cnt); 4121 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4122 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, 4123 &els_sgl_list); 4124 /* release extra els sgls from list */ 4125 for (i = 0; i < xri_cnt; i++) { 4126 list_remove_head(&els_sgl_list, 4127 sglq_entry, struct lpfc_sglq, list); 4128 if (sglq_entry) { 4129 __lpfc_mbuf_free(phba, sglq_entry->virt, 4130 sglq_entry->phys); 4131 kfree(sglq_entry); 4132 } 4133 } 4134 list_splice_init(&els_sgl_list, 4135 &phba->sli4_hba.lpfc_els_sgl_list); 4136 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4137 } else 4138 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4139 "3163 ELS xri-sgl count unchanged: %d\n", 4140 els_xri_cnt); 4141 phba->sli4_hba.els_xri_cnt = els_xri_cnt; 4142 4143 /* update xris to els sgls on the list */ 4144 sglq_entry = NULL; 4145 sglq_entry_next = NULL; 4146 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4147 &phba->sli4_hba.lpfc_els_sgl_list, list) { 4148 lxri = lpfc_sli4_next_xritag(phba); 4149 if (lxri == NO_XRI) { 4150 lpfc_printf_log(phba, KERN_ERR, 4151 LOG_TRACE_EVENT, 4152 "2400 Failed to allocate xri for " 4153 "ELS sgl\n"); 4154 rc = -ENOMEM; 4155 goto out_free_mem; 4156 } 4157 sglq_entry->sli4_lxritag = lxri; 4158 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4159 } 4160 return 0; 4161 4162 out_free_mem: 4163 lpfc_free_els_sgl_list(phba); 4164 return rc; 4165 } 4166 4167 /** 4168 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping 4169 * @phba: pointer to lpfc hba data structure. 4170 * 4171 * This routine first calculates the sizes of the current els and allocated 4172 * scsi sgl lists, and then goes through all sgls to updates the physical 4173 * XRIs assigned due to port function reset. During port initialization, the 4174 * current els and allocated scsi sgl lists are 0s. 4175 * 4176 * Return codes 4177 * 0 - successful (for now, it always returns 0) 4178 **/ 4179 int 4180 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) 4181 { 4182 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4183 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4184 uint16_t nvmet_xri_cnt; 4185 LIST_HEAD(nvmet_sgl_list); 4186 int rc; 4187 4188 /* 4189 * update on pci function's nvmet xri-sgl list 4190 */ 4191 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4192 4193 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ 4194 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4195 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { 4196 /* els xri-sgl expanded */ 4197 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; 4198 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4199 "6302 NVMET xri-sgl cnt grew from %d to %d\n", 4200 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); 4201 /* allocate the additional nvmet sgls */ 4202 for (i = 0; i < xri_cnt; i++) { 4203 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4204 GFP_KERNEL); 4205 if (sglq_entry == NULL) { 4206 lpfc_printf_log(phba, KERN_ERR, 4207 LOG_TRACE_EVENT, 4208 "6303 Failure to allocate an " 4209 "NVMET sgl entry:%d\n", i); 4210 rc = -ENOMEM; 4211 goto out_free_mem; 4212 } 4213 sglq_entry->buff_type = NVMET_BUFF_TYPE; 4214 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, 4215 &sglq_entry->phys); 4216 if (sglq_entry->virt == NULL) { 4217 kfree(sglq_entry); 4218 lpfc_printf_log(phba, KERN_ERR, 4219 LOG_TRACE_EVENT, 4220 "6304 Failure to allocate an " 4221 "NVMET buf:%d\n", i); 4222 rc = -ENOMEM; 4223 goto out_free_mem; 4224 } 4225 sglq_entry->sgl = sglq_entry->virt; 4226 memset(sglq_entry->sgl, 0, 4227 phba->cfg_sg_dma_buf_size); 4228 sglq_entry->state = SGL_FREED; 4229 list_add_tail(&sglq_entry->list, &nvmet_sgl_list); 4230 } 4231 spin_lock_irq(&phba->hbalock); 4232 spin_lock(&phba->sli4_hba.sgl_list_lock); 4233 list_splice_init(&nvmet_sgl_list, 4234 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4235 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4236 spin_unlock_irq(&phba->hbalock); 4237 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { 4238 /* nvmet xri-sgl shrunk */ 4239 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; 4240 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4241 "6305 NVMET xri-sgl count decreased from " 4242 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, 4243 nvmet_xri_cnt); 4244 spin_lock_irq(&phba->hbalock); 4245 spin_lock(&phba->sli4_hba.sgl_list_lock); 4246 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, 4247 &nvmet_sgl_list); 4248 /* release extra nvmet sgls from list */ 4249 for (i = 0; i < xri_cnt; i++) { 4250 list_remove_head(&nvmet_sgl_list, 4251 sglq_entry, struct lpfc_sglq, list); 4252 if (sglq_entry) { 4253 lpfc_nvmet_buf_free(phba, sglq_entry->virt, 4254 sglq_entry->phys); 4255 kfree(sglq_entry); 4256 } 4257 } 4258 list_splice_init(&nvmet_sgl_list, 4259 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4260 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4261 spin_unlock_irq(&phba->hbalock); 4262 } else 4263 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4264 "6306 NVMET xri-sgl count unchanged: %d\n", 4265 nvmet_xri_cnt); 4266 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; 4267 4268 /* update xris to nvmet sgls on the list */ 4269 sglq_entry = NULL; 4270 sglq_entry_next = NULL; 4271 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4272 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { 4273 lxri = lpfc_sli4_next_xritag(phba); 4274 if (lxri == NO_XRI) { 4275 lpfc_printf_log(phba, KERN_ERR, 4276 LOG_TRACE_EVENT, 4277 "6307 Failed to allocate xri for " 4278 "NVMET sgl\n"); 4279 rc = -ENOMEM; 4280 goto out_free_mem; 4281 } 4282 sglq_entry->sli4_lxritag = lxri; 4283 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4284 } 4285 return 0; 4286 4287 out_free_mem: 4288 lpfc_free_nvmet_sgl_list(phba); 4289 return rc; 4290 } 4291 4292 int 4293 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) 4294 { 4295 LIST_HEAD(blist); 4296 struct lpfc_sli4_hdw_queue *qp; 4297 struct lpfc_io_buf *lpfc_cmd; 4298 struct lpfc_io_buf *iobufp, *prev_iobufp; 4299 int idx, cnt, xri, inserted; 4300 4301 cnt = 0; 4302 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4303 qp = &phba->sli4_hba.hdwq[idx]; 4304 spin_lock_irq(&qp->io_buf_list_get_lock); 4305 spin_lock(&qp->io_buf_list_put_lock); 4306 4307 /* Take everything off the get and put lists */ 4308 list_splice_init(&qp->lpfc_io_buf_list_get, &blist); 4309 list_splice(&qp->lpfc_io_buf_list_put, &blist); 4310 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 4311 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 4312 cnt += qp->get_io_bufs + qp->put_io_bufs; 4313 qp->get_io_bufs = 0; 4314 qp->put_io_bufs = 0; 4315 qp->total_io_bufs = 0; 4316 spin_unlock(&qp->io_buf_list_put_lock); 4317 spin_unlock_irq(&qp->io_buf_list_get_lock); 4318 } 4319 4320 /* 4321 * Take IO buffers off blist and put on cbuf sorted by XRI. 4322 * This is because POST_SGL takes a sequential range of XRIs 4323 * to post to the firmware. 4324 */ 4325 for (idx = 0; idx < cnt; idx++) { 4326 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); 4327 if (!lpfc_cmd) 4328 return cnt; 4329 if (idx == 0) { 4330 list_add_tail(&lpfc_cmd->list, cbuf); 4331 continue; 4332 } 4333 xri = lpfc_cmd->cur_iocbq.sli4_xritag; 4334 inserted = 0; 4335 prev_iobufp = NULL; 4336 list_for_each_entry(iobufp, cbuf, list) { 4337 if (xri < iobufp->cur_iocbq.sli4_xritag) { 4338 if (prev_iobufp) 4339 list_add(&lpfc_cmd->list, 4340 &prev_iobufp->list); 4341 else 4342 list_add(&lpfc_cmd->list, cbuf); 4343 inserted = 1; 4344 break; 4345 } 4346 prev_iobufp = iobufp; 4347 } 4348 if (!inserted) 4349 list_add_tail(&lpfc_cmd->list, cbuf); 4350 } 4351 return cnt; 4352 } 4353 4354 int 4355 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) 4356 { 4357 struct lpfc_sli4_hdw_queue *qp; 4358 struct lpfc_io_buf *lpfc_cmd; 4359 int idx, cnt; 4360 4361 qp = phba->sli4_hba.hdwq; 4362 cnt = 0; 4363 while (!list_empty(cbuf)) { 4364 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4365 list_remove_head(cbuf, lpfc_cmd, 4366 struct lpfc_io_buf, list); 4367 if (!lpfc_cmd) 4368 return cnt; 4369 cnt++; 4370 qp = &phba->sli4_hba.hdwq[idx]; 4371 lpfc_cmd->hdwq_no = idx; 4372 lpfc_cmd->hdwq = qp; 4373 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL; 4374 spin_lock(&qp->io_buf_list_put_lock); 4375 list_add_tail(&lpfc_cmd->list, 4376 &qp->lpfc_io_buf_list_put); 4377 qp->put_io_bufs++; 4378 qp->total_io_bufs++; 4379 spin_unlock(&qp->io_buf_list_put_lock); 4380 } 4381 } 4382 return cnt; 4383 } 4384 4385 /** 4386 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping 4387 * @phba: pointer to lpfc hba data structure. 4388 * 4389 * This routine first calculates the sizes of the current els and allocated 4390 * scsi sgl lists, and then goes through all sgls to updates the physical 4391 * XRIs assigned due to port function reset. During port initialization, the 4392 * current els and allocated scsi sgl lists are 0s. 4393 * 4394 * Return codes 4395 * 0 - successful (for now, it always returns 0) 4396 **/ 4397 int 4398 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) 4399 { 4400 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; 4401 uint16_t i, lxri, els_xri_cnt; 4402 uint16_t io_xri_cnt, io_xri_max; 4403 LIST_HEAD(io_sgl_list); 4404 int rc, cnt; 4405 4406 /* 4407 * update on pci function's allocated nvme xri-sgl list 4408 */ 4409 4410 /* maximum number of xris available for nvme buffers */ 4411 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4412 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4413 phba->sli4_hba.io_xri_max = io_xri_max; 4414 4415 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4416 "6074 Current allocated XRI sgl count:%d, " 4417 "maximum XRI count:%d els_xri_cnt:%d\n\n", 4418 phba->sli4_hba.io_xri_cnt, 4419 phba->sli4_hba.io_xri_max, 4420 els_xri_cnt); 4421 4422 cnt = lpfc_io_buf_flush(phba, &io_sgl_list); 4423 4424 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { 4425 /* max nvme xri shrunk below the allocated nvme buffers */ 4426 io_xri_cnt = phba->sli4_hba.io_xri_cnt - 4427 phba->sli4_hba.io_xri_max; 4428 /* release the extra allocated nvme buffers */ 4429 for (i = 0; i < io_xri_cnt; i++) { 4430 list_remove_head(&io_sgl_list, lpfc_ncmd, 4431 struct lpfc_io_buf, list); 4432 if (lpfc_ncmd) { 4433 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4434 lpfc_ncmd->data, 4435 lpfc_ncmd->dma_handle); 4436 kfree(lpfc_ncmd); 4437 } 4438 } 4439 phba->sli4_hba.io_xri_cnt -= io_xri_cnt; 4440 } 4441 4442 /* update xris associated to remaining allocated nvme buffers */ 4443 lpfc_ncmd = NULL; 4444 lpfc_ncmd_next = NULL; 4445 phba->sli4_hba.io_xri_cnt = cnt; 4446 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4447 &io_sgl_list, list) { 4448 lxri = lpfc_sli4_next_xritag(phba); 4449 if (lxri == NO_XRI) { 4450 lpfc_printf_log(phba, KERN_ERR, 4451 LOG_TRACE_EVENT, 4452 "6075 Failed to allocate xri for " 4453 "nvme buffer\n"); 4454 rc = -ENOMEM; 4455 goto out_free_mem; 4456 } 4457 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; 4458 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4459 } 4460 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); 4461 return 0; 4462 4463 out_free_mem: 4464 lpfc_io_free(phba); 4465 return rc; 4466 } 4467 4468 /** 4469 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec 4470 * @phba: Pointer to lpfc hba data structure. 4471 * @num_to_alloc: The requested number of buffers to allocate. 4472 * 4473 * This routine allocates nvme buffers for device with SLI-4 interface spec, 4474 * the nvme buffer contains all the necessary information needed to initiate 4475 * an I/O. After allocating up to @num_to_allocate IO buffers and put 4476 * them on a list, it post them to the port by using SGL block post. 4477 * 4478 * Return codes: 4479 * int - number of IO buffers that were allocated and posted. 4480 * 0 = failure, less than num_to_alloc is a partial failure. 4481 **/ 4482 int 4483 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) 4484 { 4485 struct lpfc_io_buf *lpfc_ncmd; 4486 struct lpfc_iocbq *pwqeq; 4487 uint16_t iotag, lxri = 0; 4488 int bcnt, num_posted; 4489 LIST_HEAD(prep_nblist); 4490 LIST_HEAD(post_nblist); 4491 LIST_HEAD(nvme_nblist); 4492 4493 phba->sli4_hba.io_xri_cnt = 0; 4494 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { 4495 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); 4496 if (!lpfc_ncmd) 4497 break; 4498 /* 4499 * Get memory from the pci pool to map the virt space to 4500 * pci bus space for an I/O. The DMA buffer includes the 4501 * number of SGE's necessary to support the sg_tablesize. 4502 */ 4503 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, 4504 GFP_KERNEL, 4505 &lpfc_ncmd->dma_handle); 4506 if (!lpfc_ncmd->data) { 4507 kfree(lpfc_ncmd); 4508 break; 4509 } 4510 4511 if (phba->cfg_xpsgl && !phba->nvmet_support) { 4512 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); 4513 } else { 4514 /* 4515 * 4K Page alignment is CRITICAL to BlockGuard, double 4516 * check to be sure. 4517 */ 4518 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4519 (((unsigned long)(lpfc_ncmd->data) & 4520 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4521 lpfc_printf_log(phba, KERN_ERR, 4522 LOG_TRACE_EVENT, 4523 "3369 Memory alignment err: " 4524 "addr=%lx\n", 4525 (unsigned long)lpfc_ncmd->data); 4526 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4527 lpfc_ncmd->data, 4528 lpfc_ncmd->dma_handle); 4529 kfree(lpfc_ncmd); 4530 break; 4531 } 4532 } 4533 4534 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); 4535 4536 lxri = lpfc_sli4_next_xritag(phba); 4537 if (lxri == NO_XRI) { 4538 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4539 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4540 kfree(lpfc_ncmd); 4541 break; 4542 } 4543 pwqeq = &lpfc_ncmd->cur_iocbq; 4544 4545 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ 4546 iotag = lpfc_sli_next_iotag(phba, pwqeq); 4547 if (iotag == 0) { 4548 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4549 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4550 kfree(lpfc_ncmd); 4551 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4552 "6121 Failed to allocate IOTAG for" 4553 " XRI:0x%x\n", lxri); 4554 lpfc_sli4_free_xri(phba, lxri); 4555 break; 4556 } 4557 pwqeq->sli4_lxritag = lxri; 4558 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4559 4560 /* Initialize local short-hand pointers. */ 4561 lpfc_ncmd->dma_sgl = lpfc_ncmd->data; 4562 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; 4563 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd; 4564 spin_lock_init(&lpfc_ncmd->buf_lock); 4565 4566 /* add the nvme buffer to a post list */ 4567 list_add_tail(&lpfc_ncmd->list, &post_nblist); 4568 phba->sli4_hba.io_xri_cnt++; 4569 } 4570 lpfc_printf_log(phba, KERN_INFO, LOG_NVME, 4571 "6114 Allocate %d out of %d requested new NVME " 4572 "buffers of size x%zu bytes\n", bcnt, num_to_alloc, 4573 sizeof(*lpfc_ncmd)); 4574 4575 4576 /* post the list of nvme buffer sgls to port if available */ 4577 if (!list_empty(&post_nblist)) 4578 num_posted = lpfc_sli4_post_io_sgl_list( 4579 phba, &post_nblist, bcnt); 4580 else 4581 num_posted = 0; 4582 4583 return num_posted; 4584 } 4585 4586 static uint64_t 4587 lpfc_get_wwpn(struct lpfc_hba *phba) 4588 { 4589 uint64_t wwn; 4590 int rc; 4591 LPFC_MBOXQ_t *mboxq; 4592 MAILBOX_t *mb; 4593 4594 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 4595 GFP_KERNEL); 4596 if (!mboxq) 4597 return (uint64_t)-1; 4598 4599 /* First get WWN of HBA instance */ 4600 lpfc_read_nv(phba, mboxq); 4601 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 4602 if (rc != MBX_SUCCESS) { 4603 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4604 "6019 Mailbox failed , mbxCmd x%x " 4605 "READ_NV, mbxStatus x%x\n", 4606 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 4607 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 4608 mempool_free(mboxq, phba->mbox_mem_pool); 4609 return (uint64_t) -1; 4610 } 4611 mb = &mboxq->u.mb; 4612 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); 4613 /* wwn is WWPN of HBA instance */ 4614 mempool_free(mboxq, phba->mbox_mem_pool); 4615 if (phba->sli_rev == LPFC_SLI_REV4) 4616 return be64_to_cpu(wwn); 4617 else 4618 return rol64(wwn, 32); 4619 } 4620 4621 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba) 4622 { 4623 if (phba->sli_rev == LPFC_SLI_REV4) 4624 if (phba->cfg_xpsgl && !phba->nvmet_support) 4625 return LPFC_MAX_SG_TABLESIZE; 4626 else 4627 return phba->cfg_scsi_seg_cnt; 4628 else 4629 return phba->cfg_sg_seg_cnt; 4630 } 4631 4632 /** 4633 * lpfc_vmid_res_alloc - Allocates resources for VMID 4634 * @phba: pointer to lpfc hba data structure. 4635 * @vport: pointer to vport data structure 4636 * 4637 * This routine allocated the resources needed for the VMID. 4638 * 4639 * Return codes 4640 * 0 on Success 4641 * Non-0 on Failure 4642 */ 4643 static int 4644 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport) 4645 { 4646 /* VMID feature is supported only on SLI4 */ 4647 if (phba->sli_rev == LPFC_SLI_REV3) { 4648 phba->cfg_vmid_app_header = 0; 4649 phba->cfg_vmid_priority_tagging = 0; 4650 } 4651 4652 if (lpfc_is_vmid_enabled(phba)) { 4653 vport->vmid = 4654 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid), 4655 GFP_KERNEL); 4656 if (!vport->vmid) 4657 return -ENOMEM; 4658 4659 rwlock_init(&vport->vmid_lock); 4660 4661 /* Set the VMID parameters for the vport */ 4662 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging; 4663 vport->vmid_inactivity_timeout = 4664 phba->cfg_vmid_inactivity_timeout; 4665 vport->max_vmid = phba->cfg_max_vmid; 4666 vport->cur_vmid_cnt = 0; 4667 4668 vport->vmid_priority_range = bitmap_zalloc 4669 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL); 4670 4671 if (!vport->vmid_priority_range) { 4672 kfree(vport->vmid); 4673 return -ENOMEM; 4674 } 4675 4676 hash_init(vport->hash_table); 4677 } 4678 return 0; 4679 } 4680 4681 /** 4682 * lpfc_create_port - Create an FC port 4683 * @phba: pointer to lpfc hba data structure. 4684 * @instance: a unique integer ID to this FC port. 4685 * @dev: pointer to the device data structure. 4686 * 4687 * This routine creates a FC port for the upper layer protocol. The FC port 4688 * can be created on top of either a physical port or a virtual port provided 4689 * by the HBA. This routine also allocates a SCSI host data structure (shost) 4690 * and associates the FC port created before adding the shost into the SCSI 4691 * layer. 4692 * 4693 * Return codes 4694 * @vport - pointer to the virtual N_Port data structure. 4695 * NULL - port create failed. 4696 **/ 4697 struct lpfc_vport * 4698 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) 4699 { 4700 struct lpfc_vport *vport; 4701 struct Scsi_Host *shost = NULL; 4702 struct scsi_host_template *template; 4703 int error = 0; 4704 int i; 4705 uint64_t wwn; 4706 bool use_no_reset_hba = false; 4707 int rc; 4708 4709 if (lpfc_no_hba_reset_cnt) { 4710 if (phba->sli_rev < LPFC_SLI_REV4 && 4711 dev == &phba->pcidev->dev) { 4712 /* Reset the port first */ 4713 lpfc_sli_brdrestart(phba); 4714 rc = lpfc_sli_chipset_init(phba); 4715 if (rc) 4716 return NULL; 4717 } 4718 wwn = lpfc_get_wwpn(phba); 4719 } 4720 4721 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { 4722 if (wwn == lpfc_no_hba_reset[i]) { 4723 lpfc_printf_log(phba, KERN_ERR, 4724 LOG_TRACE_EVENT, 4725 "6020 Setting use_no_reset port=%llx\n", 4726 wwn); 4727 use_no_reset_hba = true; 4728 break; 4729 } 4730 } 4731 4732 /* Seed template for SCSI host registration */ 4733 if (dev == &phba->pcidev->dev) { 4734 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 4735 /* Seed physical port template */ 4736 template = &lpfc_template; 4737 4738 if (use_no_reset_hba) 4739 /* template is for a no reset SCSI Host */ 4740 template->eh_host_reset_handler = NULL; 4741 4742 /* Seed updated value of sg_tablesize */ 4743 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4744 } else { 4745 /* NVMET is for physical port only */ 4746 template = &lpfc_template_nvme; 4747 } 4748 } else { 4749 /* Seed vport template */ 4750 template = &lpfc_vport_template; 4751 4752 /* Seed updated value of sg_tablesize */ 4753 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4754 } 4755 4756 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); 4757 if (!shost) 4758 goto out; 4759 4760 vport = (struct lpfc_vport *) shost->hostdata; 4761 vport->phba = phba; 4762 vport->load_flag |= FC_LOADING; 4763 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 4764 vport->fc_rscn_flush = 0; 4765 lpfc_get_vport_cfgparam(vport); 4766 4767 /* Adjust value in vport */ 4768 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; 4769 4770 shost->unique_id = instance; 4771 shost->max_id = LPFC_MAX_TARGET; 4772 shost->max_lun = vport->cfg_max_luns; 4773 shost->this_id = -1; 4774 shost->max_cmd_len = 16; 4775 4776 if (phba->sli_rev == LPFC_SLI_REV4) { 4777 if (!phba->cfg_fcp_mq_threshold || 4778 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) 4779 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; 4780 4781 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), 4782 phba->cfg_fcp_mq_threshold); 4783 4784 shost->dma_boundary = 4785 phba->sli4_hba.pc_sli4_params.sge_supp_len-1; 4786 } else 4787 /* SLI-3 has a limited number of hardware queues (3), 4788 * thus there is only one for FCP processing. 4789 */ 4790 shost->nr_hw_queues = 1; 4791 4792 /* 4793 * Set initial can_queue value since 0 is no longer supported and 4794 * scsi_add_host will fail. This will be adjusted later based on the 4795 * max xri value determined in hba setup. 4796 */ 4797 shost->can_queue = phba->cfg_hba_queue_depth - 10; 4798 if (dev != &phba->pcidev->dev) { 4799 shost->transportt = lpfc_vport_transport_template; 4800 vport->port_type = LPFC_NPIV_PORT; 4801 } else { 4802 shost->transportt = lpfc_transport_template; 4803 vport->port_type = LPFC_PHYSICAL_PORT; 4804 } 4805 4806 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 4807 "9081 CreatePort TMPLATE type %x TBLsize %d " 4808 "SEGcnt %d/%d\n", 4809 vport->port_type, shost->sg_tablesize, 4810 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); 4811 4812 /* Allocate the resources for VMID */ 4813 rc = lpfc_vmid_res_alloc(phba, vport); 4814 4815 if (rc) 4816 goto out_put_shost; 4817 4818 /* Initialize all internally managed lists. */ 4819 INIT_LIST_HEAD(&vport->fc_nodes); 4820 INIT_LIST_HEAD(&vport->rcv_buffer_list); 4821 spin_lock_init(&vport->work_port_lock); 4822 4823 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); 4824 4825 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); 4826 4827 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); 4828 4829 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) 4830 lpfc_setup_bg(phba, shost); 4831 4832 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); 4833 if (error) 4834 goto out_free_vmid; 4835 4836 spin_lock_irq(&phba->port_list_lock); 4837 list_add_tail(&vport->listentry, &phba->port_list); 4838 spin_unlock_irq(&phba->port_list_lock); 4839 return vport; 4840 4841 out_free_vmid: 4842 kfree(vport->vmid); 4843 bitmap_free(vport->vmid_priority_range); 4844 out_put_shost: 4845 scsi_host_put(shost); 4846 out: 4847 return NULL; 4848 } 4849 4850 /** 4851 * destroy_port - destroy an FC port 4852 * @vport: pointer to an lpfc virtual N_Port data structure. 4853 * 4854 * This routine destroys a FC port from the upper layer protocol. All the 4855 * resources associated with the port are released. 4856 **/ 4857 void 4858 destroy_port(struct lpfc_vport *vport) 4859 { 4860 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 4861 struct lpfc_hba *phba = vport->phba; 4862 4863 lpfc_debugfs_terminate(vport); 4864 fc_remove_host(shost); 4865 scsi_remove_host(shost); 4866 4867 spin_lock_irq(&phba->port_list_lock); 4868 list_del_init(&vport->listentry); 4869 spin_unlock_irq(&phba->port_list_lock); 4870 4871 lpfc_cleanup(vport); 4872 return; 4873 } 4874 4875 /** 4876 * lpfc_get_instance - Get a unique integer ID 4877 * 4878 * This routine allocates a unique integer ID from lpfc_hba_index pool. It 4879 * uses the kernel idr facility to perform the task. 4880 * 4881 * Return codes: 4882 * instance - a unique integer ID allocated as the new instance. 4883 * -1 - lpfc get instance failed. 4884 **/ 4885 int 4886 lpfc_get_instance(void) 4887 { 4888 int ret; 4889 4890 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); 4891 return ret < 0 ? -1 : ret; 4892 } 4893 4894 /** 4895 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done 4896 * @shost: pointer to SCSI host data structure. 4897 * @time: elapsed time of the scan in jiffies. 4898 * 4899 * This routine is called by the SCSI layer with a SCSI host to determine 4900 * whether the scan host is finished. 4901 * 4902 * Note: there is no scan_start function as adapter initialization will have 4903 * asynchronously kicked off the link initialization. 4904 * 4905 * Return codes 4906 * 0 - SCSI host scan is not over yet. 4907 * 1 - SCSI host scan is over. 4908 **/ 4909 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) 4910 { 4911 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4912 struct lpfc_hba *phba = vport->phba; 4913 int stat = 0; 4914 4915 spin_lock_irq(shost->host_lock); 4916 4917 if (vport->load_flag & FC_UNLOADING) { 4918 stat = 1; 4919 goto finished; 4920 } 4921 if (time >= msecs_to_jiffies(30 * 1000)) { 4922 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4923 "0461 Scanning longer than 30 " 4924 "seconds. Continuing initialization\n"); 4925 stat = 1; 4926 goto finished; 4927 } 4928 if (time >= msecs_to_jiffies(15 * 1000) && 4929 phba->link_state <= LPFC_LINK_DOWN) { 4930 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4931 "0465 Link down longer than 15 " 4932 "seconds. Continuing initialization\n"); 4933 stat = 1; 4934 goto finished; 4935 } 4936 4937 if (vport->port_state != LPFC_VPORT_READY) 4938 goto finished; 4939 if (vport->num_disc_nodes || vport->fc_prli_sent) 4940 goto finished; 4941 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) 4942 goto finished; 4943 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) 4944 goto finished; 4945 4946 stat = 1; 4947 4948 finished: 4949 spin_unlock_irq(shost->host_lock); 4950 return stat; 4951 } 4952 4953 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) 4954 { 4955 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; 4956 struct lpfc_hba *phba = vport->phba; 4957 4958 fc_host_supported_speeds(shost) = 0; 4959 /* 4960 * Avoid reporting supported link speed for FCoE as it can't be 4961 * controlled via FCoE. 4962 */ 4963 if (phba->hba_flag & HBA_FCOE_MODE) 4964 return; 4965 4966 if (phba->lmt & LMT_256Gb) 4967 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT; 4968 if (phba->lmt & LMT_128Gb) 4969 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; 4970 if (phba->lmt & LMT_64Gb) 4971 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; 4972 if (phba->lmt & LMT_32Gb) 4973 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; 4974 if (phba->lmt & LMT_16Gb) 4975 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; 4976 if (phba->lmt & LMT_10Gb) 4977 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; 4978 if (phba->lmt & LMT_8Gb) 4979 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; 4980 if (phba->lmt & LMT_4Gb) 4981 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; 4982 if (phba->lmt & LMT_2Gb) 4983 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; 4984 if (phba->lmt & LMT_1Gb) 4985 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; 4986 } 4987 4988 /** 4989 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port 4990 * @shost: pointer to SCSI host data structure. 4991 * 4992 * This routine initializes a given SCSI host attributes on a FC port. The 4993 * SCSI host can be either on top of a physical port or a virtual port. 4994 **/ 4995 void lpfc_host_attrib_init(struct Scsi_Host *shost) 4996 { 4997 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4998 struct lpfc_hba *phba = vport->phba; 4999 /* 5000 * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). 5001 */ 5002 5003 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 5004 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 5005 fc_host_supported_classes(shost) = FC_COS_CLASS3; 5006 5007 memset(fc_host_supported_fc4s(shost), 0, 5008 sizeof(fc_host_supported_fc4s(shost))); 5009 fc_host_supported_fc4s(shost)[2] = 1; 5010 fc_host_supported_fc4s(shost)[7] = 1; 5011 5012 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), 5013 sizeof fc_host_symbolic_name(shost)); 5014 5015 lpfc_host_supported_speeds_set(shost); 5016 5017 fc_host_maxframe_size(shost) = 5018 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 5019 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; 5020 5021 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; 5022 5023 /* This value is also unchanging */ 5024 memset(fc_host_active_fc4s(shost), 0, 5025 sizeof(fc_host_active_fc4s(shost))); 5026 fc_host_active_fc4s(shost)[2] = 1; 5027 fc_host_active_fc4s(shost)[7] = 1; 5028 5029 fc_host_max_npiv_vports(shost) = phba->max_vpi; 5030 spin_lock_irq(shost->host_lock); 5031 vport->load_flag &= ~FC_LOADING; 5032 spin_unlock_irq(shost->host_lock); 5033 } 5034 5035 /** 5036 * lpfc_stop_port_s3 - Stop SLI3 device port 5037 * @phba: pointer to lpfc hba data structure. 5038 * 5039 * This routine is invoked to stop an SLI3 device port, it stops the device 5040 * from generating interrupts and stops the device driver's timers for the 5041 * device. 5042 **/ 5043 static void 5044 lpfc_stop_port_s3(struct lpfc_hba *phba) 5045 { 5046 /* Clear all interrupt enable conditions */ 5047 writel(0, phba->HCregaddr); 5048 readl(phba->HCregaddr); /* flush */ 5049 /* Clear all pending interrupts */ 5050 writel(0xffffffff, phba->HAregaddr); 5051 readl(phba->HAregaddr); /* flush */ 5052 5053 /* Reset some HBA SLI setup states */ 5054 lpfc_stop_hba_timers(phba); 5055 phba->pport->work_port_events = 0; 5056 } 5057 5058 /** 5059 * lpfc_stop_port_s4 - Stop SLI4 device port 5060 * @phba: pointer to lpfc hba data structure. 5061 * 5062 * This routine is invoked to stop an SLI4 device port, it stops the device 5063 * from generating interrupts and stops the device driver's timers for the 5064 * device. 5065 **/ 5066 static void 5067 lpfc_stop_port_s4(struct lpfc_hba *phba) 5068 { 5069 /* Reset some HBA SLI4 setup states */ 5070 lpfc_stop_hba_timers(phba); 5071 if (phba->pport) 5072 phba->pport->work_port_events = 0; 5073 phba->sli4_hba.intr_enable = 0; 5074 } 5075 5076 /** 5077 * lpfc_stop_port - Wrapper function for stopping hba port 5078 * @phba: Pointer to HBA context object. 5079 * 5080 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from 5081 * the API jump table function pointer from the lpfc_hba struct. 5082 **/ 5083 void 5084 lpfc_stop_port(struct lpfc_hba *phba) 5085 { 5086 phba->lpfc_stop_port(phba); 5087 5088 if (phba->wq) 5089 flush_workqueue(phba->wq); 5090 } 5091 5092 /** 5093 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer 5094 * @phba: Pointer to hba for which this call is being executed. 5095 * 5096 * This routine starts the timer waiting for the FCF rediscovery to complete. 5097 **/ 5098 void 5099 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) 5100 { 5101 unsigned long fcf_redisc_wait_tmo = 5102 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); 5103 /* Start fcf rediscovery wait period timer */ 5104 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); 5105 spin_lock_irq(&phba->hbalock); 5106 /* Allow action to new fcf asynchronous event */ 5107 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); 5108 /* Mark the FCF rediscovery pending state */ 5109 phba->fcf.fcf_flag |= FCF_REDISC_PEND; 5110 spin_unlock_irq(&phba->hbalock); 5111 } 5112 5113 /** 5114 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout 5115 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5116 * 5117 * This routine is invoked when waiting for FCF table rediscover has been 5118 * timed out. If new FCF record(s) has (have) been discovered during the 5119 * wait period, a new FCF event shall be added to the FCOE async event 5120 * list, and then worker thread shall be waked up for processing from the 5121 * worker thread context. 5122 **/ 5123 static void 5124 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) 5125 { 5126 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); 5127 5128 /* Don't send FCF rediscovery event if timer cancelled */ 5129 spin_lock_irq(&phba->hbalock); 5130 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 5131 spin_unlock_irq(&phba->hbalock); 5132 return; 5133 } 5134 /* Clear FCF rediscovery timer pending flag */ 5135 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 5136 /* FCF rediscovery event to worker thread */ 5137 phba->fcf.fcf_flag |= FCF_REDISC_EVT; 5138 spin_unlock_irq(&phba->hbalock); 5139 lpfc_printf_log(phba, KERN_INFO, LOG_FIP, 5140 "2776 FCF rediscover quiescent timer expired\n"); 5141 /* wake up worker thread */ 5142 lpfc_worker_wake_up(phba); 5143 } 5144 5145 /** 5146 * lpfc_vmid_poll - VMID timeout detection 5147 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5148 * 5149 * This routine is invoked when there is no I/O on by a VM for the specified 5150 * amount of time. When this situation is detected, the VMID has to be 5151 * deregistered from the switch and all the local resources freed. The VMID 5152 * will be reassigned to the VM once the I/O begins. 5153 **/ 5154 static void 5155 lpfc_vmid_poll(struct timer_list *t) 5156 { 5157 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll); 5158 u32 wake_up = 0; 5159 5160 /* check if there is a need to issue QFPA */ 5161 if (phba->pport->vmid_priority_tagging) { 5162 wake_up = 1; 5163 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA; 5164 } 5165 5166 /* Is the vmid inactivity timer enabled */ 5167 if (phba->pport->vmid_inactivity_timeout || 5168 phba->pport->load_flag & FC_DEREGISTER_ALL_APP_ID) { 5169 wake_up = 1; 5170 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID; 5171 } 5172 5173 if (wake_up) 5174 lpfc_worker_wake_up(phba); 5175 5176 /* restart the timer for the next iteration */ 5177 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 * 5178 LPFC_VMID_TIMER)); 5179 } 5180 5181 /** 5182 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code 5183 * @phba: pointer to lpfc hba data structure. 5184 * @acqe_link: pointer to the async link completion queue entry. 5185 * 5186 * This routine is to parse the SLI4 link-attention link fault code. 5187 **/ 5188 static void 5189 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, 5190 struct lpfc_acqe_link *acqe_link) 5191 { 5192 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) { 5193 case LPFC_FC_LA_TYPE_LINK_DOWN: 5194 case LPFC_FC_LA_TYPE_TRUNKING_EVENT: 5195 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 5196 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 5197 break; 5198 default: 5199 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5200 case LPFC_ASYNC_LINK_FAULT_NONE: 5201 case LPFC_ASYNC_LINK_FAULT_LOCAL: 5202 case LPFC_ASYNC_LINK_FAULT_REMOTE: 5203 case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5204 break; 5205 default: 5206 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5207 "0398 Unknown link fault code: x%x\n", 5208 bf_get(lpfc_acqe_link_fault, acqe_link)); 5209 break; 5210 } 5211 break; 5212 } 5213 } 5214 5215 /** 5216 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type 5217 * @phba: pointer to lpfc hba data structure. 5218 * @acqe_link: pointer to the async link completion queue entry. 5219 * 5220 * This routine is to parse the SLI4 link attention type and translate it 5221 * into the base driver's link attention type coding. 5222 * 5223 * Return: Link attention type in terms of base driver's coding. 5224 **/ 5225 static uint8_t 5226 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, 5227 struct lpfc_acqe_link *acqe_link) 5228 { 5229 uint8_t att_type; 5230 5231 switch (bf_get(lpfc_acqe_link_status, acqe_link)) { 5232 case LPFC_ASYNC_LINK_STATUS_DOWN: 5233 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: 5234 att_type = LPFC_ATT_LINK_DOWN; 5235 break; 5236 case LPFC_ASYNC_LINK_STATUS_UP: 5237 /* Ignore physical link up events - wait for logical link up */ 5238 att_type = LPFC_ATT_RESERVED; 5239 break; 5240 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: 5241 att_type = LPFC_ATT_LINK_UP; 5242 break; 5243 default: 5244 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5245 "0399 Invalid link attention type: x%x\n", 5246 bf_get(lpfc_acqe_link_status, acqe_link)); 5247 att_type = LPFC_ATT_RESERVED; 5248 break; 5249 } 5250 return att_type; 5251 } 5252 5253 /** 5254 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed 5255 * @phba: pointer to lpfc hba data structure. 5256 * 5257 * This routine is to get an SLI3 FC port's link speed in Mbps. 5258 * 5259 * Return: link speed in terms of Mbps. 5260 **/ 5261 uint32_t 5262 lpfc_sli_port_speed_get(struct lpfc_hba *phba) 5263 { 5264 uint32_t link_speed; 5265 5266 if (!lpfc_is_link_up(phba)) 5267 return 0; 5268 5269 if (phba->sli_rev <= LPFC_SLI_REV3) { 5270 switch (phba->fc_linkspeed) { 5271 case LPFC_LINK_SPEED_1GHZ: 5272 link_speed = 1000; 5273 break; 5274 case LPFC_LINK_SPEED_2GHZ: 5275 link_speed = 2000; 5276 break; 5277 case LPFC_LINK_SPEED_4GHZ: 5278 link_speed = 4000; 5279 break; 5280 case LPFC_LINK_SPEED_8GHZ: 5281 link_speed = 8000; 5282 break; 5283 case LPFC_LINK_SPEED_10GHZ: 5284 link_speed = 10000; 5285 break; 5286 case LPFC_LINK_SPEED_16GHZ: 5287 link_speed = 16000; 5288 break; 5289 default: 5290 link_speed = 0; 5291 } 5292 } else { 5293 if (phba->sli4_hba.link_state.logical_speed) 5294 link_speed = 5295 phba->sli4_hba.link_state.logical_speed; 5296 else 5297 link_speed = phba->sli4_hba.link_state.speed; 5298 } 5299 return link_speed; 5300 } 5301 5302 /** 5303 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed 5304 * @phba: pointer to lpfc hba data structure. 5305 * @evt_code: asynchronous event code. 5306 * @speed_code: asynchronous event link speed code. 5307 * 5308 * This routine is to parse the giving SLI4 async event link speed code into 5309 * value of Mbps for the link speed. 5310 * 5311 * Return: link speed in terms of Mbps. 5312 **/ 5313 static uint32_t 5314 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, 5315 uint8_t speed_code) 5316 { 5317 uint32_t port_speed; 5318 5319 switch (evt_code) { 5320 case LPFC_TRAILER_CODE_LINK: 5321 switch (speed_code) { 5322 case LPFC_ASYNC_LINK_SPEED_ZERO: 5323 port_speed = 0; 5324 break; 5325 case LPFC_ASYNC_LINK_SPEED_10MBPS: 5326 port_speed = 10; 5327 break; 5328 case LPFC_ASYNC_LINK_SPEED_100MBPS: 5329 port_speed = 100; 5330 break; 5331 case LPFC_ASYNC_LINK_SPEED_1GBPS: 5332 port_speed = 1000; 5333 break; 5334 case LPFC_ASYNC_LINK_SPEED_10GBPS: 5335 port_speed = 10000; 5336 break; 5337 case LPFC_ASYNC_LINK_SPEED_20GBPS: 5338 port_speed = 20000; 5339 break; 5340 case LPFC_ASYNC_LINK_SPEED_25GBPS: 5341 port_speed = 25000; 5342 break; 5343 case LPFC_ASYNC_LINK_SPEED_40GBPS: 5344 port_speed = 40000; 5345 break; 5346 case LPFC_ASYNC_LINK_SPEED_100GBPS: 5347 port_speed = 100000; 5348 break; 5349 default: 5350 port_speed = 0; 5351 } 5352 break; 5353 case LPFC_TRAILER_CODE_FC: 5354 switch (speed_code) { 5355 case LPFC_FC_LA_SPEED_UNKNOWN: 5356 port_speed = 0; 5357 break; 5358 case LPFC_FC_LA_SPEED_1G: 5359 port_speed = 1000; 5360 break; 5361 case LPFC_FC_LA_SPEED_2G: 5362 port_speed = 2000; 5363 break; 5364 case LPFC_FC_LA_SPEED_4G: 5365 port_speed = 4000; 5366 break; 5367 case LPFC_FC_LA_SPEED_8G: 5368 port_speed = 8000; 5369 break; 5370 case LPFC_FC_LA_SPEED_10G: 5371 port_speed = 10000; 5372 break; 5373 case LPFC_FC_LA_SPEED_16G: 5374 port_speed = 16000; 5375 break; 5376 case LPFC_FC_LA_SPEED_32G: 5377 port_speed = 32000; 5378 break; 5379 case LPFC_FC_LA_SPEED_64G: 5380 port_speed = 64000; 5381 break; 5382 case LPFC_FC_LA_SPEED_128G: 5383 port_speed = 128000; 5384 break; 5385 case LPFC_FC_LA_SPEED_256G: 5386 port_speed = 256000; 5387 break; 5388 default: 5389 port_speed = 0; 5390 } 5391 break; 5392 default: 5393 port_speed = 0; 5394 } 5395 return port_speed; 5396 } 5397 5398 /** 5399 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event 5400 * @phba: pointer to lpfc hba data structure. 5401 * @acqe_link: pointer to the async link completion queue entry. 5402 * 5403 * This routine is to handle the SLI4 asynchronous FCoE link event. 5404 **/ 5405 static void 5406 lpfc_sli4_async_link_evt(struct lpfc_hba *phba, 5407 struct lpfc_acqe_link *acqe_link) 5408 { 5409 LPFC_MBOXQ_t *pmb; 5410 MAILBOX_t *mb; 5411 struct lpfc_mbx_read_top *la; 5412 uint8_t att_type; 5413 int rc; 5414 5415 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); 5416 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) 5417 return; 5418 phba->fcoe_eventtag = acqe_link->event_tag; 5419 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 5420 if (!pmb) { 5421 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5422 "0395 The mboxq allocation failed\n"); 5423 return; 5424 } 5425 5426 rc = lpfc_mbox_rsrc_prep(phba, pmb); 5427 if (rc) { 5428 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5429 "0396 mailbox allocation failed\n"); 5430 goto out_free_pmb; 5431 } 5432 5433 /* Cleanup any outstanding ELS commands */ 5434 lpfc_els_flush_all_cmd(phba); 5435 5436 /* Block ELS IOCBs until we have done process link event */ 5437 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 5438 5439 /* Update link event statistics */ 5440 phba->sli.slistat.link_event++; 5441 5442 /* Create lpfc_handle_latt mailbox command from link ACQE */ 5443 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 5444 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 5445 pmb->vport = phba->pport; 5446 5447 /* Keep the link status for extra SLI4 state machine reference */ 5448 phba->sli4_hba.link_state.speed = 5449 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, 5450 bf_get(lpfc_acqe_link_speed, acqe_link)); 5451 phba->sli4_hba.link_state.duplex = 5452 bf_get(lpfc_acqe_link_duplex, acqe_link); 5453 phba->sli4_hba.link_state.status = 5454 bf_get(lpfc_acqe_link_status, acqe_link); 5455 phba->sli4_hba.link_state.type = 5456 bf_get(lpfc_acqe_link_type, acqe_link); 5457 phba->sli4_hba.link_state.number = 5458 bf_get(lpfc_acqe_link_number, acqe_link); 5459 phba->sli4_hba.link_state.fault = 5460 bf_get(lpfc_acqe_link_fault, acqe_link); 5461 phba->sli4_hba.link_state.logical_speed = 5462 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; 5463 5464 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 5465 "2900 Async FC/FCoE Link event - Speed:%dGBit " 5466 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " 5467 "Logical speed:%dMbps Fault:%d\n", 5468 phba->sli4_hba.link_state.speed, 5469 phba->sli4_hba.link_state.topology, 5470 phba->sli4_hba.link_state.status, 5471 phba->sli4_hba.link_state.type, 5472 phba->sli4_hba.link_state.number, 5473 phba->sli4_hba.link_state.logical_speed, 5474 phba->sli4_hba.link_state.fault); 5475 /* 5476 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch 5477 * topology info. Note: Optional for non FC-AL ports. 5478 */ 5479 if (!(phba->hba_flag & HBA_FCOE_MODE)) { 5480 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 5481 if (rc == MBX_NOT_FINISHED) 5482 goto out_free_pmb; 5483 return; 5484 } 5485 /* 5486 * For FCoE Mode: fill in all the topology information we need and call 5487 * the READ_TOPOLOGY completion routine to continue without actually 5488 * sending the READ_TOPOLOGY mailbox command to the port. 5489 */ 5490 /* Initialize completion status */ 5491 mb = &pmb->u.mb; 5492 mb->mbxStatus = MBX_SUCCESS; 5493 5494 /* Parse port fault information field */ 5495 lpfc_sli4_parse_latt_fault(phba, acqe_link); 5496 5497 /* Parse and translate link attention fields */ 5498 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; 5499 la->eventTag = acqe_link->event_tag; 5500 bf_set(lpfc_mbx_read_top_att_type, la, att_type); 5501 bf_set(lpfc_mbx_read_top_link_spd, la, 5502 (bf_get(lpfc_acqe_link_speed, acqe_link))); 5503 5504 /* Fake the following irrelevant fields */ 5505 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); 5506 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); 5507 bf_set(lpfc_mbx_read_top_il, la, 0); 5508 bf_set(lpfc_mbx_read_top_pb, la, 0); 5509 bf_set(lpfc_mbx_read_top_fa, la, 0); 5510 bf_set(lpfc_mbx_read_top_mm, la, 0); 5511 5512 /* Invoke the lpfc_handle_latt mailbox command callback function */ 5513 lpfc_mbx_cmpl_read_topology(phba, pmb); 5514 5515 return; 5516 5517 out_free_pmb: 5518 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 5519 } 5520 5521 /** 5522 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read 5523 * topology. 5524 * @phba: pointer to lpfc hba data structure. 5525 * @speed_code: asynchronous event link speed code. 5526 * 5527 * This routine is to parse the giving SLI4 async event link speed code into 5528 * value of Read topology link speed. 5529 * 5530 * Return: link speed in terms of Read topology. 5531 **/ 5532 static uint8_t 5533 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) 5534 { 5535 uint8_t port_speed; 5536 5537 switch (speed_code) { 5538 case LPFC_FC_LA_SPEED_1G: 5539 port_speed = LPFC_LINK_SPEED_1GHZ; 5540 break; 5541 case LPFC_FC_LA_SPEED_2G: 5542 port_speed = LPFC_LINK_SPEED_2GHZ; 5543 break; 5544 case LPFC_FC_LA_SPEED_4G: 5545 port_speed = LPFC_LINK_SPEED_4GHZ; 5546 break; 5547 case LPFC_FC_LA_SPEED_8G: 5548 port_speed = LPFC_LINK_SPEED_8GHZ; 5549 break; 5550 case LPFC_FC_LA_SPEED_16G: 5551 port_speed = LPFC_LINK_SPEED_16GHZ; 5552 break; 5553 case LPFC_FC_LA_SPEED_32G: 5554 port_speed = LPFC_LINK_SPEED_32GHZ; 5555 break; 5556 case LPFC_FC_LA_SPEED_64G: 5557 port_speed = LPFC_LINK_SPEED_64GHZ; 5558 break; 5559 case LPFC_FC_LA_SPEED_128G: 5560 port_speed = LPFC_LINK_SPEED_128GHZ; 5561 break; 5562 case LPFC_FC_LA_SPEED_256G: 5563 port_speed = LPFC_LINK_SPEED_256GHZ; 5564 break; 5565 default: 5566 port_speed = 0; 5567 break; 5568 } 5569 5570 return port_speed; 5571 } 5572 5573 void 5574 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba) 5575 { 5576 if (!phba->rx_monitor) { 5577 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5578 "4411 Rx Monitor Info is empty.\n"); 5579 } else { 5580 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0, 5581 LPFC_MAX_RXMONITOR_DUMP); 5582 } 5583 } 5584 5585 /** 5586 * lpfc_cgn_update_stat - Save data into congestion stats buffer 5587 * @phba: pointer to lpfc hba data structure. 5588 * @dtag: FPIN descriptor received 5589 * 5590 * Increment the FPIN received counter/time when it happens. 5591 */ 5592 void 5593 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag) 5594 { 5595 struct lpfc_cgn_info *cp; 5596 struct tm broken; 5597 struct timespec64 cur_time; 5598 u32 cnt; 5599 u32 value; 5600 5601 /* Make sure we have a congestion info buffer */ 5602 if (!phba->cgn_i) 5603 return; 5604 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5605 ktime_get_real_ts64(&cur_time); 5606 time64_to_tm(cur_time.tv_sec, 0, &broken); 5607 5608 /* Update congestion statistics */ 5609 switch (dtag) { 5610 case ELS_DTAG_LNK_INTEGRITY: 5611 cnt = le32_to_cpu(cp->link_integ_notification); 5612 cnt++; 5613 cp->link_integ_notification = cpu_to_le32(cnt); 5614 5615 cp->cgn_stat_lnk_month = broken.tm_mon + 1; 5616 cp->cgn_stat_lnk_day = broken.tm_mday; 5617 cp->cgn_stat_lnk_year = broken.tm_year - 100; 5618 cp->cgn_stat_lnk_hour = broken.tm_hour; 5619 cp->cgn_stat_lnk_min = broken.tm_min; 5620 cp->cgn_stat_lnk_sec = broken.tm_sec; 5621 break; 5622 case ELS_DTAG_DELIVERY: 5623 cnt = le32_to_cpu(cp->delivery_notification); 5624 cnt++; 5625 cp->delivery_notification = cpu_to_le32(cnt); 5626 5627 cp->cgn_stat_del_month = broken.tm_mon + 1; 5628 cp->cgn_stat_del_day = broken.tm_mday; 5629 cp->cgn_stat_del_year = broken.tm_year - 100; 5630 cp->cgn_stat_del_hour = broken.tm_hour; 5631 cp->cgn_stat_del_min = broken.tm_min; 5632 cp->cgn_stat_del_sec = broken.tm_sec; 5633 break; 5634 case ELS_DTAG_PEER_CONGEST: 5635 cnt = le32_to_cpu(cp->cgn_peer_notification); 5636 cnt++; 5637 cp->cgn_peer_notification = cpu_to_le32(cnt); 5638 5639 cp->cgn_stat_peer_month = broken.tm_mon + 1; 5640 cp->cgn_stat_peer_day = broken.tm_mday; 5641 cp->cgn_stat_peer_year = broken.tm_year - 100; 5642 cp->cgn_stat_peer_hour = broken.tm_hour; 5643 cp->cgn_stat_peer_min = broken.tm_min; 5644 cp->cgn_stat_peer_sec = broken.tm_sec; 5645 break; 5646 case ELS_DTAG_CONGESTION: 5647 cnt = le32_to_cpu(cp->cgn_notification); 5648 cnt++; 5649 cp->cgn_notification = cpu_to_le32(cnt); 5650 5651 cp->cgn_stat_cgn_month = broken.tm_mon + 1; 5652 cp->cgn_stat_cgn_day = broken.tm_mday; 5653 cp->cgn_stat_cgn_year = broken.tm_year - 100; 5654 cp->cgn_stat_cgn_hour = broken.tm_hour; 5655 cp->cgn_stat_cgn_min = broken.tm_min; 5656 cp->cgn_stat_cgn_sec = broken.tm_sec; 5657 } 5658 if (phba->cgn_fpin_frequency && 5659 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5660 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5661 cp->cgn_stat_npm = value; 5662 } 5663 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5664 LPFC_CGN_CRC32_SEED); 5665 cp->cgn_info_crc = cpu_to_le32(value); 5666 } 5667 5668 /** 5669 * lpfc_cgn_save_evt_cnt - Save data into registered congestion buffer 5670 * @phba: pointer to lpfc hba data structure. 5671 * 5672 * Save the congestion event data every minute. 5673 * On the hour collapse all the minute data into hour data. Every day 5674 * collapse all the hour data into daily data. Separate driver 5675 * and fabrc congestion event counters that will be saved out 5676 * to the registered congestion buffer every minute. 5677 */ 5678 static void 5679 lpfc_cgn_save_evt_cnt(struct lpfc_hba *phba) 5680 { 5681 struct lpfc_cgn_info *cp; 5682 struct tm broken; 5683 struct timespec64 cur_time; 5684 uint32_t i, index; 5685 uint16_t value, mvalue; 5686 uint64_t bps; 5687 uint32_t mbps; 5688 uint32_t dvalue, wvalue, lvalue, avalue; 5689 uint64_t latsum; 5690 __le16 *ptr; 5691 __le32 *lptr; 5692 __le16 *mptr; 5693 5694 /* Make sure we have a congestion info buffer */ 5695 if (!phba->cgn_i) 5696 return; 5697 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5698 5699 if (time_before(jiffies, phba->cgn_evt_timestamp)) 5700 return; 5701 phba->cgn_evt_timestamp = jiffies + 5702 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 5703 phba->cgn_evt_minute++; 5704 5705 /* We should get to this point in the routine on 1 minute intervals */ 5706 5707 ktime_get_real_ts64(&cur_time); 5708 time64_to_tm(cur_time.tv_sec, 0, &broken); 5709 5710 if (phba->cgn_fpin_frequency && 5711 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5712 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5713 cp->cgn_stat_npm = value; 5714 } 5715 5716 /* Read and clear the latency counters for this minute */ 5717 lvalue = atomic_read(&phba->cgn_latency_evt_cnt); 5718 latsum = atomic64_read(&phba->cgn_latency_evt); 5719 atomic_set(&phba->cgn_latency_evt_cnt, 0); 5720 atomic64_set(&phba->cgn_latency_evt, 0); 5721 5722 /* We need to store MB/sec bandwidth in the congestion information. 5723 * block_cnt is count of 512 byte blocks for the entire minute, 5724 * bps will get bytes per sec before finally converting to MB/sec. 5725 */ 5726 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512; 5727 phba->rx_block_cnt = 0; 5728 mvalue = bps / (1024 * 1024); /* convert to MB/sec */ 5729 5730 /* Every minute */ 5731 /* cgn parameters */ 5732 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 5733 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 5734 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 5735 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 5736 5737 /* Fill in default LUN qdepth */ 5738 value = (uint16_t)(phba->pport->cfg_lun_queue_depth); 5739 cp->cgn_lunq = cpu_to_le16(value); 5740 5741 /* Record congestion buffer info - every minute 5742 * cgn_driver_evt_cnt (Driver events) 5743 * cgn_fabric_warn_cnt (Congestion Warnings) 5744 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency) 5745 * cgn_fabric_alarm_cnt (Congestion Alarms) 5746 */ 5747 index = ++cp->cgn_index_minute; 5748 if (cp->cgn_index_minute == LPFC_MIN_HOUR) { 5749 cp->cgn_index_minute = 0; 5750 index = 0; 5751 } 5752 5753 /* Get the number of driver events in this sample and reset counter */ 5754 dvalue = atomic_read(&phba->cgn_driver_evt_cnt); 5755 atomic_set(&phba->cgn_driver_evt_cnt, 0); 5756 5757 /* Get the number of warning events - FPIN and Signal for this minute */ 5758 wvalue = 0; 5759 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) || 5760 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 5761 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5762 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt); 5763 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 5764 5765 /* Get the number of alarm events - FPIN and Signal for this minute */ 5766 avalue = 0; 5767 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) || 5768 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5769 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt); 5770 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 5771 5772 /* Collect the driver, warning, alarm and latency counts for this 5773 * minute into the driver congestion buffer. 5774 */ 5775 ptr = &cp->cgn_drvr_min[index]; 5776 value = (uint16_t)dvalue; 5777 *ptr = cpu_to_le16(value); 5778 5779 ptr = &cp->cgn_warn_min[index]; 5780 value = (uint16_t)wvalue; 5781 *ptr = cpu_to_le16(value); 5782 5783 ptr = &cp->cgn_alarm_min[index]; 5784 value = (uint16_t)avalue; 5785 *ptr = cpu_to_le16(value); 5786 5787 lptr = &cp->cgn_latency_min[index]; 5788 if (lvalue) { 5789 lvalue = (uint32_t)div_u64(latsum, lvalue); 5790 *lptr = cpu_to_le32(lvalue); 5791 } else { 5792 *lptr = 0; 5793 } 5794 5795 /* Collect the bandwidth value into the driver's congesion buffer. */ 5796 mptr = &cp->cgn_bw_min[index]; 5797 *mptr = cpu_to_le16(mvalue); 5798 5799 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5800 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n", 5801 index, dvalue, wvalue, *lptr, mvalue, avalue); 5802 5803 /* Every hour */ 5804 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) { 5805 /* Record congestion buffer info - every hour 5806 * Collapse all minutes into an hour 5807 */ 5808 index = ++cp->cgn_index_hour; 5809 if (cp->cgn_index_hour == LPFC_HOUR_DAY) { 5810 cp->cgn_index_hour = 0; 5811 index = 0; 5812 } 5813 5814 dvalue = 0; 5815 wvalue = 0; 5816 lvalue = 0; 5817 avalue = 0; 5818 mvalue = 0; 5819 mbps = 0; 5820 for (i = 0; i < LPFC_MIN_HOUR; i++) { 5821 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]); 5822 wvalue += le16_to_cpu(cp->cgn_warn_min[i]); 5823 lvalue += le32_to_cpu(cp->cgn_latency_min[i]); 5824 mbps += le16_to_cpu(cp->cgn_bw_min[i]); 5825 avalue += le16_to_cpu(cp->cgn_alarm_min[i]); 5826 } 5827 if (lvalue) /* Avg of latency averages */ 5828 lvalue /= LPFC_MIN_HOUR; 5829 if (mbps) /* Avg of Bandwidth averages */ 5830 mvalue = mbps / LPFC_MIN_HOUR; 5831 5832 lptr = &cp->cgn_drvr_hr[index]; 5833 *lptr = cpu_to_le32(dvalue); 5834 lptr = &cp->cgn_warn_hr[index]; 5835 *lptr = cpu_to_le32(wvalue); 5836 lptr = &cp->cgn_latency_hr[index]; 5837 *lptr = cpu_to_le32(lvalue); 5838 mptr = &cp->cgn_bw_hr[index]; 5839 *mptr = cpu_to_le16(mvalue); 5840 lptr = &cp->cgn_alarm_hr[index]; 5841 *lptr = cpu_to_le32(avalue); 5842 5843 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5844 "2419 Congestion Info - hour " 5845 "(%d): %d %d %d %d %d\n", 5846 index, dvalue, wvalue, lvalue, mvalue, avalue); 5847 } 5848 5849 /* Every day */ 5850 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) { 5851 /* Record congestion buffer info - every hour 5852 * Collapse all hours into a day. Rotate days 5853 * after LPFC_MAX_CGN_DAYS. 5854 */ 5855 index = ++cp->cgn_index_day; 5856 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) { 5857 cp->cgn_index_day = 0; 5858 index = 0; 5859 } 5860 5861 /* Anytime we overwrite daily index 0, after we wrap, 5862 * we will be overwriting the oldest day, so we must 5863 * update the congestion data start time for that day. 5864 * That start time should have previously been saved after 5865 * we wrote the last days worth of data. 5866 */ 5867 if ((phba->hba_flag & HBA_CGN_DAY_WRAP) && index == 0) { 5868 time64_to_tm(phba->cgn_daily_ts.tv_sec, 0, &broken); 5869 5870 cp->cgn_info_month = broken.tm_mon + 1; 5871 cp->cgn_info_day = broken.tm_mday; 5872 cp->cgn_info_year = broken.tm_year - 100; 5873 cp->cgn_info_hour = broken.tm_hour; 5874 cp->cgn_info_minute = broken.tm_min; 5875 cp->cgn_info_second = broken.tm_sec; 5876 5877 lpfc_printf_log 5878 (phba, KERN_INFO, LOG_CGN_MGMT, 5879 "2646 CGNInfo idx0 Start Time: " 5880 "%d/%d/%d %d:%d:%d\n", 5881 cp->cgn_info_day, cp->cgn_info_month, 5882 cp->cgn_info_year, cp->cgn_info_hour, 5883 cp->cgn_info_minute, cp->cgn_info_second); 5884 } 5885 5886 dvalue = 0; 5887 wvalue = 0; 5888 lvalue = 0; 5889 mvalue = 0; 5890 mbps = 0; 5891 avalue = 0; 5892 for (i = 0; i < LPFC_HOUR_DAY; i++) { 5893 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]); 5894 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]); 5895 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]); 5896 mbps += le16_to_cpu(cp->cgn_bw_hr[i]); 5897 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]); 5898 } 5899 if (lvalue) /* Avg of latency averages */ 5900 lvalue /= LPFC_HOUR_DAY; 5901 if (mbps) /* Avg of Bandwidth averages */ 5902 mvalue = mbps / LPFC_HOUR_DAY; 5903 5904 lptr = &cp->cgn_drvr_day[index]; 5905 *lptr = cpu_to_le32(dvalue); 5906 lptr = &cp->cgn_warn_day[index]; 5907 *lptr = cpu_to_le32(wvalue); 5908 lptr = &cp->cgn_latency_day[index]; 5909 *lptr = cpu_to_le32(lvalue); 5910 mptr = &cp->cgn_bw_day[index]; 5911 *mptr = cpu_to_le16(mvalue); 5912 lptr = &cp->cgn_alarm_day[index]; 5913 *lptr = cpu_to_le32(avalue); 5914 5915 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5916 "2420 Congestion Info - daily (%d): " 5917 "%d %d %d %d %d\n", 5918 index, dvalue, wvalue, lvalue, mvalue, avalue); 5919 5920 /* We just wrote LPFC_MAX_CGN_DAYS of data, 5921 * so we are wrapped on any data after this. 5922 * Save this as the start time for the next day. 5923 */ 5924 if (index == (LPFC_MAX_CGN_DAYS - 1)) { 5925 phba->hba_flag |= HBA_CGN_DAY_WRAP; 5926 ktime_get_real_ts64(&phba->cgn_daily_ts); 5927 } 5928 } 5929 5930 /* Use the frequency found in the last rcv'ed FPIN */ 5931 value = phba->cgn_fpin_frequency; 5932 cp->cgn_warn_freq = cpu_to_le16(value); 5933 cp->cgn_alarm_freq = cpu_to_le16(value); 5934 5935 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5936 LPFC_CGN_CRC32_SEED); 5937 cp->cgn_info_crc = cpu_to_le32(lvalue); 5938 } 5939 5940 /** 5941 * lpfc_calc_cmf_latency - latency from start of rxate timer interval 5942 * @phba: The Hba for which this call is being executed. 5943 * 5944 * The routine calculates the latency from the beginning of the CMF timer 5945 * interval to the current point in time. It is called from IO completion 5946 * when we exceed our Bandwidth limitation for the time interval. 5947 */ 5948 uint32_t 5949 lpfc_calc_cmf_latency(struct lpfc_hba *phba) 5950 { 5951 struct timespec64 cmpl_time; 5952 uint32_t msec = 0; 5953 5954 ktime_get_real_ts64(&cmpl_time); 5955 5956 /* This routine works on a ms granularity so sec and usec are 5957 * converted accordingly. 5958 */ 5959 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) { 5960 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / 5961 NSEC_PER_MSEC; 5962 } else { 5963 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) { 5964 msec = (cmpl_time.tv_sec - 5965 phba->cmf_latency.tv_sec) * MSEC_PER_SEC; 5966 msec += ((cmpl_time.tv_nsec - 5967 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC); 5968 } else { 5969 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec - 5970 1) * MSEC_PER_SEC; 5971 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) + 5972 cmpl_time.tv_nsec) / NSEC_PER_MSEC); 5973 } 5974 } 5975 return msec; 5976 } 5977 5978 /** 5979 * lpfc_cmf_timer - This is the timer function for one congestion 5980 * rate interval. 5981 * @timer: Pointer to the high resolution timer that expired 5982 */ 5983 static enum hrtimer_restart 5984 lpfc_cmf_timer(struct hrtimer *timer) 5985 { 5986 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba, 5987 cmf_timer); 5988 struct rx_info_entry entry; 5989 uint32_t io_cnt; 5990 uint32_t busy, max_read; 5991 uint64_t total, rcv, lat, mbpi, extra, cnt; 5992 int timer_interval = LPFC_CMF_INTERVAL; 5993 uint32_t ms; 5994 struct lpfc_cgn_stat *cgs; 5995 int cpu; 5996 5997 /* Only restart the timer if congestion mgmt is on */ 5998 if (phba->cmf_active_mode == LPFC_CFG_OFF || 5999 !phba->cmf_latency.tv_sec) { 6000 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 6001 "6224 CMF timer exit: %d %lld\n", 6002 phba->cmf_active_mode, 6003 (uint64_t)phba->cmf_latency.tv_sec); 6004 return HRTIMER_NORESTART; 6005 } 6006 6007 /* If pport is not ready yet, just exit and wait for 6008 * the next timer cycle to hit. 6009 */ 6010 if (!phba->pport) 6011 goto skip; 6012 6013 /* Do not block SCSI IO while in the timer routine since 6014 * total_bytes will be cleared 6015 */ 6016 atomic_set(&phba->cmf_stop_io, 1); 6017 6018 /* First we need to calculate the actual ms between 6019 * the last timer interrupt and this one. We ask for 6020 * LPFC_CMF_INTERVAL, however the actual time may 6021 * vary depending on system overhead. 6022 */ 6023 ms = lpfc_calc_cmf_latency(phba); 6024 6025 6026 /* Immediately after we calculate the time since the last 6027 * timer interrupt, set the start time for the next 6028 * interrupt 6029 */ 6030 ktime_get_real_ts64(&phba->cmf_latency); 6031 6032 phba->cmf_link_byte_count = 6033 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000); 6034 6035 /* Collect all the stats from the prior timer interval */ 6036 total = 0; 6037 io_cnt = 0; 6038 lat = 0; 6039 rcv = 0; 6040 for_each_present_cpu(cpu) { 6041 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 6042 total += atomic64_xchg(&cgs->total_bytes, 0); 6043 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0); 6044 lat += atomic64_xchg(&cgs->rx_latency, 0); 6045 rcv += atomic64_xchg(&cgs->rcv_bytes, 0); 6046 } 6047 6048 /* Before we issue another CMF_SYNC_WQE, retrieve the BW 6049 * returned from the last CMF_SYNC_WQE issued, from 6050 * cmf_last_sync_bw. This will be the target BW for 6051 * this next timer interval. 6052 */ 6053 if (phba->cmf_active_mode == LPFC_CFG_MANAGED && 6054 phba->link_state != LPFC_LINK_DOWN && 6055 phba->hba_flag & HBA_SETUP) { 6056 mbpi = phba->cmf_last_sync_bw; 6057 phba->cmf_last_sync_bw = 0; 6058 extra = 0; 6059 6060 /* Calculate any extra bytes needed to account for the 6061 * timer accuracy. If we are less than LPFC_CMF_INTERVAL 6062 * calculate the adjustment needed for total to reflect 6063 * a full LPFC_CMF_INTERVAL. 6064 */ 6065 if (ms && ms < LPFC_CMF_INTERVAL) { 6066 cnt = div_u64(total, ms); /* bytes per ms */ 6067 cnt *= LPFC_CMF_INTERVAL; /* what total should be */ 6068 6069 /* If the timeout is scheduled to be shorter, 6070 * this value may skew the data, so cap it at mbpi. 6071 */ 6072 if ((phba->hba_flag & HBA_SHORT_CMF) && cnt > mbpi) 6073 cnt = mbpi; 6074 6075 extra = cnt - total; 6076 } 6077 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra); 6078 } else { 6079 /* For Monitor mode or link down we want mbpi 6080 * to be the full link speed 6081 */ 6082 mbpi = phba->cmf_link_byte_count; 6083 extra = 0; 6084 } 6085 phba->cmf_timer_cnt++; 6086 6087 if (io_cnt) { 6088 /* Update congestion info buffer latency in us */ 6089 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt); 6090 atomic64_add(lat, &phba->cgn_latency_evt); 6091 } 6092 busy = atomic_xchg(&phba->cmf_busy, 0); 6093 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0); 6094 6095 /* Calculate MBPI for the next timer interval */ 6096 if (mbpi) { 6097 if (mbpi > phba->cmf_link_byte_count || 6098 phba->cmf_active_mode == LPFC_CFG_MONITOR) 6099 mbpi = phba->cmf_link_byte_count; 6100 6101 /* Change max_bytes_per_interval to what the prior 6102 * CMF_SYNC_WQE cmpl indicated. 6103 */ 6104 if (mbpi != phba->cmf_max_bytes_per_interval) 6105 phba->cmf_max_bytes_per_interval = mbpi; 6106 } 6107 6108 /* Save rxmonitor information for debug */ 6109 if (phba->rx_monitor) { 6110 entry.total_bytes = total; 6111 entry.cmf_bytes = total + extra; 6112 entry.rcv_bytes = rcv; 6113 entry.cmf_busy = busy; 6114 entry.cmf_info = phba->cmf_active_info; 6115 if (io_cnt) { 6116 entry.avg_io_latency = div_u64(lat, io_cnt); 6117 entry.avg_io_size = div_u64(rcv, io_cnt); 6118 } else { 6119 entry.avg_io_latency = 0; 6120 entry.avg_io_size = 0; 6121 } 6122 entry.max_read_cnt = max_read; 6123 entry.io_cnt = io_cnt; 6124 entry.max_bytes_per_interval = mbpi; 6125 if (phba->cmf_active_mode == LPFC_CFG_MANAGED) 6126 entry.timer_utilization = phba->cmf_last_ts; 6127 else 6128 entry.timer_utilization = ms; 6129 entry.timer_interval = ms; 6130 phba->cmf_last_ts = 0; 6131 6132 lpfc_rx_monitor_record(phba->rx_monitor, &entry); 6133 } 6134 6135 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) { 6136 /* If Monitor mode, check if we are oversubscribed 6137 * against the full line rate. 6138 */ 6139 if (mbpi && total > mbpi) 6140 atomic_inc(&phba->cgn_driver_evt_cnt); 6141 } 6142 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ 6143 6144 /* Each minute save Fabric and Driver congestion information */ 6145 lpfc_cgn_save_evt_cnt(phba); 6146 6147 phba->hba_flag &= ~HBA_SHORT_CMF; 6148 6149 /* Since we need to call lpfc_cgn_save_evt_cnt every minute, on the 6150 * minute, adjust our next timer interval, if needed, to ensure a 6151 * 1 minute granularity when we get the next timer interrupt. 6152 */ 6153 if (time_after(jiffies + msecs_to_jiffies(LPFC_CMF_INTERVAL), 6154 phba->cgn_evt_timestamp)) { 6155 timer_interval = jiffies_to_msecs(phba->cgn_evt_timestamp - 6156 jiffies); 6157 if (timer_interval <= 0) 6158 timer_interval = LPFC_CMF_INTERVAL; 6159 else 6160 phba->hba_flag |= HBA_SHORT_CMF; 6161 6162 /* If we adjust timer_interval, max_bytes_per_interval 6163 * needs to be adjusted as well. 6164 */ 6165 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 6166 timer_interval, 1000); 6167 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) 6168 phba->cmf_max_bytes_per_interval = 6169 phba->cmf_link_byte_count; 6170 } 6171 6172 /* Since total_bytes has already been zero'ed, its okay to unblock 6173 * after max_bytes_per_interval is setup. 6174 */ 6175 if (atomic_xchg(&phba->cmf_bw_wait, 0)) 6176 queue_work(phba->wq, &phba->unblock_request_work); 6177 6178 /* SCSI IO is now unblocked */ 6179 atomic_set(&phba->cmf_stop_io, 0); 6180 6181 skip: 6182 hrtimer_forward_now(timer, 6183 ktime_set(0, timer_interval * NSEC_PER_MSEC)); 6184 return HRTIMER_RESTART; 6185 } 6186 6187 #define trunk_link_status(__idx)\ 6188 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6189 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ 6190 "Link up" : "Link down") : "NA" 6191 /* Did port __idx reported an error */ 6192 #define trunk_port_fault(__idx)\ 6193 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6194 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" 6195 6196 static void 6197 lpfc_update_trunk_link_status(struct lpfc_hba *phba, 6198 struct lpfc_acqe_fc_la *acqe_fc) 6199 { 6200 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); 6201 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); 6202 u8 cnt = 0; 6203 6204 phba->sli4_hba.link_state.speed = 6205 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6206 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6207 6208 phba->sli4_hba.link_state.logical_speed = 6209 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6210 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ 6211 phba->fc_linkspeed = 6212 lpfc_async_link_speed_to_read_top( 6213 phba, 6214 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6215 6216 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { 6217 phba->trunk_link.link0.state = 6218 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) 6219 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6220 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; 6221 cnt++; 6222 } 6223 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { 6224 phba->trunk_link.link1.state = 6225 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) 6226 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6227 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; 6228 cnt++; 6229 } 6230 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { 6231 phba->trunk_link.link2.state = 6232 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) 6233 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6234 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; 6235 cnt++; 6236 } 6237 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { 6238 phba->trunk_link.link3.state = 6239 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) 6240 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6241 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; 6242 cnt++; 6243 } 6244 6245 if (cnt) 6246 phba->trunk_link.phy_lnk_speed = 6247 phba->sli4_hba.link_state.logical_speed / (cnt * 1000); 6248 else 6249 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN; 6250 6251 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6252 "2910 Async FC Trunking Event - Speed:%d\n" 6253 "\tLogical speed:%d " 6254 "port0: %s port1: %s port2: %s port3: %s\n", 6255 phba->sli4_hba.link_state.speed, 6256 phba->sli4_hba.link_state.logical_speed, 6257 trunk_link_status(0), trunk_link_status(1), 6258 trunk_link_status(2), trunk_link_status(3)); 6259 6260 if (phba->cmf_active_mode != LPFC_CFG_OFF) 6261 lpfc_cmf_signal_init(phba); 6262 6263 if (port_fault) 6264 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6265 "3202 trunk error:0x%x (%s) seen on port0:%s " 6266 /* 6267 * SLI-4: We have only 0xA error codes 6268 * defined as of now. print an appropriate 6269 * message in case driver needs to be updated. 6270 */ 6271 "port1:%s port2:%s port3:%s\n", err, err > 0xA ? 6272 "UNDEFINED. update driver." : trunk_errmsg[err], 6273 trunk_port_fault(0), trunk_port_fault(1), 6274 trunk_port_fault(2), trunk_port_fault(3)); 6275 } 6276 6277 6278 /** 6279 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event 6280 * @phba: pointer to lpfc hba data structure. 6281 * @acqe_fc: pointer to the async fc completion queue entry. 6282 * 6283 * This routine is to handle the SLI4 asynchronous FC event. It will simply log 6284 * that the event was received and then issue a read_topology mailbox command so 6285 * that the rest of the driver will treat it the same as SLI3. 6286 **/ 6287 static void 6288 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) 6289 { 6290 LPFC_MBOXQ_t *pmb; 6291 MAILBOX_t *mb; 6292 struct lpfc_mbx_read_top *la; 6293 char *log_level; 6294 int rc; 6295 6296 if (bf_get(lpfc_trailer_type, acqe_fc) != 6297 LPFC_FC_LA_EVENT_TYPE_FC_LINK) { 6298 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6299 "2895 Non FC link Event detected.(%d)\n", 6300 bf_get(lpfc_trailer_type, acqe_fc)); 6301 return; 6302 } 6303 6304 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6305 LPFC_FC_LA_TYPE_TRUNKING_EVENT) { 6306 lpfc_update_trunk_link_status(phba, acqe_fc); 6307 return; 6308 } 6309 6310 /* Keep the link status for extra SLI4 state machine reference */ 6311 phba->sli4_hba.link_state.speed = 6312 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6313 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6314 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; 6315 phba->sli4_hba.link_state.topology = 6316 bf_get(lpfc_acqe_fc_la_topology, acqe_fc); 6317 phba->sli4_hba.link_state.status = 6318 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); 6319 phba->sli4_hba.link_state.type = 6320 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); 6321 phba->sli4_hba.link_state.number = 6322 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); 6323 phba->sli4_hba.link_state.fault = 6324 bf_get(lpfc_acqe_link_fault, acqe_fc); 6325 phba->sli4_hba.link_state.link_status = 6326 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc); 6327 6328 /* 6329 * Only select attention types need logical speed modification to what 6330 * was previously set. 6331 */ 6332 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP && 6333 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6334 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6335 LPFC_FC_LA_TYPE_LINK_DOWN) 6336 phba->sli4_hba.link_state.logical_speed = 0; 6337 else if (!phba->sli4_hba.conf_trunk) 6338 phba->sli4_hba.link_state.logical_speed = 6339 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6340 } 6341 6342 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6343 "2896 Async FC event - Speed:%dGBaud Topology:x%x " 6344 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" 6345 "%dMbps Fault:x%x Link Status:x%x\n", 6346 phba->sli4_hba.link_state.speed, 6347 phba->sli4_hba.link_state.topology, 6348 phba->sli4_hba.link_state.status, 6349 phba->sli4_hba.link_state.type, 6350 phba->sli4_hba.link_state.number, 6351 phba->sli4_hba.link_state.logical_speed, 6352 phba->sli4_hba.link_state.fault, 6353 phba->sli4_hba.link_state.link_status); 6354 6355 /* 6356 * The following attention types are informational only, providing 6357 * further details about link status. Overwrite the value of 6358 * link_state.status appropriately. No further action is required. 6359 */ 6360 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6361 switch (phba->sli4_hba.link_state.status) { 6362 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 6363 log_level = KERN_WARNING; 6364 phba->sli4_hba.link_state.status = 6365 LPFC_FC_LA_TYPE_LINK_DOWN; 6366 break; 6367 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 6368 /* 6369 * During bb credit recovery establishment, receiving 6370 * this attention type is normal. Link Up attention 6371 * type is expected to occur before this informational 6372 * attention type so keep the Link Up status. 6373 */ 6374 log_level = KERN_INFO; 6375 phba->sli4_hba.link_state.status = 6376 LPFC_FC_LA_TYPE_LINK_UP; 6377 break; 6378 default: 6379 log_level = KERN_INFO; 6380 break; 6381 } 6382 lpfc_log_msg(phba, log_level, LOG_SLI, 6383 "2992 Async FC event - Informational Link " 6384 "Attention Type x%x\n", 6385 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc)); 6386 return; 6387 } 6388 6389 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6390 if (!pmb) { 6391 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6392 "2897 The mboxq allocation failed\n"); 6393 return; 6394 } 6395 rc = lpfc_mbox_rsrc_prep(phba, pmb); 6396 if (rc) { 6397 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6398 "2898 The mboxq prep failed\n"); 6399 goto out_free_pmb; 6400 } 6401 6402 /* Cleanup any outstanding ELS commands */ 6403 lpfc_els_flush_all_cmd(phba); 6404 6405 /* Block ELS IOCBs until we have done process link event */ 6406 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 6407 6408 /* Update link event statistics */ 6409 phba->sli.slistat.link_event++; 6410 6411 /* Create lpfc_handle_latt mailbox command from link ACQE */ 6412 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 6413 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 6414 pmb->vport = phba->pport; 6415 6416 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { 6417 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); 6418 6419 switch (phba->sli4_hba.link_state.status) { 6420 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: 6421 phba->link_flag |= LS_MDS_LINK_DOWN; 6422 break; 6423 case LPFC_FC_LA_TYPE_MDS_LOOPBACK: 6424 phba->link_flag |= LS_MDS_LOOPBACK; 6425 break; 6426 default: 6427 break; 6428 } 6429 6430 /* Initialize completion status */ 6431 mb = &pmb->u.mb; 6432 mb->mbxStatus = MBX_SUCCESS; 6433 6434 /* Parse port fault information field */ 6435 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); 6436 6437 /* Parse and translate link attention fields */ 6438 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; 6439 la->eventTag = acqe_fc->event_tag; 6440 6441 if (phba->sli4_hba.link_state.status == 6442 LPFC_FC_LA_TYPE_UNEXP_WWPN) { 6443 bf_set(lpfc_mbx_read_top_att_type, la, 6444 LPFC_FC_LA_TYPE_UNEXP_WWPN); 6445 } else { 6446 bf_set(lpfc_mbx_read_top_att_type, la, 6447 LPFC_FC_LA_TYPE_LINK_DOWN); 6448 } 6449 /* Invoke the mailbox command callback function */ 6450 lpfc_mbx_cmpl_read_topology(phba, pmb); 6451 6452 return; 6453 } 6454 6455 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 6456 if (rc == MBX_NOT_FINISHED) 6457 goto out_free_pmb; 6458 return; 6459 6460 out_free_pmb: 6461 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 6462 } 6463 6464 /** 6465 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event 6466 * @phba: pointer to lpfc hba data structure. 6467 * @acqe_sli: pointer to the async SLI completion queue entry. 6468 * 6469 * This routine is to handle the SLI4 asynchronous SLI events. 6470 **/ 6471 static void 6472 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) 6473 { 6474 char port_name; 6475 char message[128]; 6476 uint8_t status; 6477 uint8_t evt_type; 6478 uint8_t operational = 0; 6479 struct temp_event temp_event_data; 6480 struct lpfc_acqe_misconfigured_event *misconfigured; 6481 struct lpfc_acqe_cgn_signal *cgn_signal; 6482 struct Scsi_Host *shost; 6483 struct lpfc_vport **vports; 6484 int rc, i, cnt; 6485 6486 evt_type = bf_get(lpfc_trailer_type, acqe_sli); 6487 6488 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6489 "2901 Async SLI event - Type:%d, Event Data: x%08x " 6490 "x%08x x%08x x%08x\n", evt_type, 6491 acqe_sli->event_data1, acqe_sli->event_data2, 6492 acqe_sli->event_data3, acqe_sli->trailer); 6493 6494 port_name = phba->Port[0]; 6495 if (port_name == 0x00) 6496 port_name = '?'; /* get port name is empty */ 6497 6498 switch (evt_type) { 6499 case LPFC_SLI_EVENT_TYPE_OVER_TEMP: 6500 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6501 temp_event_data.event_code = LPFC_THRESHOLD_TEMP; 6502 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6503 6504 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6505 "3190 Over Temperature:%d Celsius- Port Name %c\n", 6506 acqe_sli->event_data1, port_name); 6507 6508 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 6509 shost = lpfc_shost_from_vport(phba->pport); 6510 fc_host_post_vendor_event(shost, fc_get_event_number(), 6511 sizeof(temp_event_data), 6512 (char *)&temp_event_data, 6513 SCSI_NL_VID_TYPE_PCI 6514 | PCI_VENDOR_ID_EMULEX); 6515 break; 6516 case LPFC_SLI_EVENT_TYPE_NORM_TEMP: 6517 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6518 temp_event_data.event_code = LPFC_NORMAL_TEMP; 6519 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6520 6521 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT, 6522 "3191 Normal Temperature:%d Celsius - Port Name %c\n", 6523 acqe_sli->event_data1, port_name); 6524 6525 shost = lpfc_shost_from_vport(phba->pport); 6526 fc_host_post_vendor_event(shost, fc_get_event_number(), 6527 sizeof(temp_event_data), 6528 (char *)&temp_event_data, 6529 SCSI_NL_VID_TYPE_PCI 6530 | PCI_VENDOR_ID_EMULEX); 6531 break; 6532 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: 6533 misconfigured = (struct lpfc_acqe_misconfigured_event *) 6534 &acqe_sli->event_data1; 6535 6536 /* fetch the status for this port */ 6537 switch (phba->sli4_hba.lnk_info.lnk_no) { 6538 case LPFC_LINK_NUMBER_0: 6539 status = bf_get(lpfc_sli_misconfigured_port0_state, 6540 &misconfigured->theEvent); 6541 operational = bf_get(lpfc_sli_misconfigured_port0_op, 6542 &misconfigured->theEvent); 6543 break; 6544 case LPFC_LINK_NUMBER_1: 6545 status = bf_get(lpfc_sli_misconfigured_port1_state, 6546 &misconfigured->theEvent); 6547 operational = bf_get(lpfc_sli_misconfigured_port1_op, 6548 &misconfigured->theEvent); 6549 break; 6550 case LPFC_LINK_NUMBER_2: 6551 status = bf_get(lpfc_sli_misconfigured_port2_state, 6552 &misconfigured->theEvent); 6553 operational = bf_get(lpfc_sli_misconfigured_port2_op, 6554 &misconfigured->theEvent); 6555 break; 6556 case LPFC_LINK_NUMBER_3: 6557 status = bf_get(lpfc_sli_misconfigured_port3_state, 6558 &misconfigured->theEvent); 6559 operational = bf_get(lpfc_sli_misconfigured_port3_op, 6560 &misconfigured->theEvent); 6561 break; 6562 default: 6563 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6564 "3296 " 6565 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " 6566 "event: Invalid link %d", 6567 phba->sli4_hba.lnk_info.lnk_no); 6568 return; 6569 } 6570 6571 /* Skip if optic state unchanged */ 6572 if (phba->sli4_hba.lnk_info.optic_state == status) 6573 return; 6574 6575 switch (status) { 6576 case LPFC_SLI_EVENT_STATUS_VALID: 6577 sprintf(message, "Physical Link is functional"); 6578 break; 6579 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: 6580 sprintf(message, "Optics faulted/incorrectly " 6581 "installed/not installed - Reseat optics, " 6582 "if issue not resolved, replace."); 6583 break; 6584 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: 6585 sprintf(message, 6586 "Optics of two types installed - Remove one " 6587 "optic or install matching pair of optics."); 6588 break; 6589 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: 6590 sprintf(message, "Incompatible optics - Replace with " 6591 "compatible optics for card to function."); 6592 break; 6593 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: 6594 sprintf(message, "Unqualified optics - Replace with " 6595 "Avago optics for Warranty and Technical " 6596 "Support - Link is%s operational", 6597 (operational) ? " not" : ""); 6598 break; 6599 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: 6600 sprintf(message, "Uncertified optics - Replace with " 6601 "Avago-certified optics to enable link " 6602 "operation - Link is%s operational", 6603 (operational) ? " not" : ""); 6604 break; 6605 default: 6606 /* firmware is reporting a status we don't know about */ 6607 sprintf(message, "Unknown event status x%02x", status); 6608 break; 6609 } 6610 6611 /* Issue READ_CONFIG mbox command to refresh supported speeds */ 6612 rc = lpfc_sli4_read_config(phba); 6613 if (rc) { 6614 phba->lmt = 0; 6615 lpfc_printf_log(phba, KERN_ERR, 6616 LOG_TRACE_EVENT, 6617 "3194 Unable to retrieve supported " 6618 "speeds, rc = 0x%x\n", rc); 6619 } 6620 rc = lpfc_sli4_refresh_params(phba); 6621 if (rc) { 6622 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6623 "3174 Unable to update pls support, " 6624 "rc x%x\n", rc); 6625 } 6626 vports = lpfc_create_vport_work_array(phba); 6627 if (vports != NULL) { 6628 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6629 i++) { 6630 shost = lpfc_shost_from_vport(vports[i]); 6631 lpfc_host_supported_speeds_set(shost); 6632 } 6633 } 6634 lpfc_destroy_vport_work_array(phba, vports); 6635 6636 phba->sli4_hba.lnk_info.optic_state = status; 6637 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6638 "3176 Port Name %c %s\n", port_name, message); 6639 break; 6640 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: 6641 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6642 "3192 Remote DPort Test Initiated - " 6643 "Event Data1:x%08x Event Data2: x%08x\n", 6644 acqe_sli->event_data1, acqe_sli->event_data2); 6645 break; 6646 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG: 6647 /* Call FW to obtain active parms */ 6648 lpfc_sli4_cgn_parm_chg_evt(phba); 6649 break; 6650 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: 6651 /* Misconfigured WWN. Reports that the SLI Port is configured 6652 * to use FA-WWN, but the attached device doesn’t support it. 6653 * Event Data1 - N.A, Event Data2 - N.A 6654 * This event only happens on the physical port. 6655 */ 6656 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY, 6657 "2699 Misconfigured FA-PWWN - Attached device " 6658 "does not support FA-PWWN\n"); 6659 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; 6660 memset(phba->pport->fc_portname.u.wwn, 0, 6661 sizeof(struct lpfc_name)); 6662 break; 6663 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: 6664 /* EEPROM failure. No driver action is required */ 6665 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6666 "2518 EEPROM failure - " 6667 "Event Data1: x%08x Event Data2: x%08x\n", 6668 acqe_sli->event_data1, acqe_sli->event_data2); 6669 break; 6670 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL: 6671 if (phba->cmf_active_mode == LPFC_CFG_OFF) 6672 break; 6673 cgn_signal = (struct lpfc_acqe_cgn_signal *) 6674 &acqe_sli->event_data1; 6675 phba->cgn_acqe_cnt++; 6676 6677 cnt = bf_get(lpfc_warn_acqe, cgn_signal); 6678 atomic64_add(cnt, &phba->cgn_acqe_stat.warn); 6679 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm); 6680 6681 /* no threshold for CMF, even 1 signal will trigger an event */ 6682 6683 /* Alarm overrides warning, so check that first */ 6684 if (cgn_signal->alarm_cnt) { 6685 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6686 /* Keep track of alarm cnt for CMF_SYNC_WQE */ 6687 atomic_add(cgn_signal->alarm_cnt, 6688 &phba->cgn_sync_alarm_cnt); 6689 } 6690 } else if (cnt) { 6691 /* signal action needs to be taken */ 6692 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 6693 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6694 /* Keep track of warning cnt for CMF_SYNC_WQE */ 6695 atomic_add(cnt, &phba->cgn_sync_warn_cnt); 6696 } 6697 } 6698 break; 6699 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL: 6700 /* May be accompanied by a temperature event */ 6701 lpfc_printf_log(phba, KERN_INFO, 6702 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT, 6703 "2902 Remote Degrade Signaling: x%08x x%08x " 6704 "x%08x\n", 6705 acqe_sli->event_data1, acqe_sli->event_data2, 6706 acqe_sli->event_data3); 6707 break; 6708 default: 6709 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6710 "3193 Unrecognized SLI event, type: 0x%x", 6711 evt_type); 6712 break; 6713 } 6714 } 6715 6716 /** 6717 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport 6718 * @vport: pointer to vport data structure. 6719 * 6720 * This routine is to perform Clear Virtual Link (CVL) on a vport in 6721 * response to a CVL event. 6722 * 6723 * Return the pointer to the ndlp with the vport if successful, otherwise 6724 * return NULL. 6725 **/ 6726 static struct lpfc_nodelist * 6727 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) 6728 { 6729 struct lpfc_nodelist *ndlp; 6730 struct Scsi_Host *shost; 6731 struct lpfc_hba *phba; 6732 6733 if (!vport) 6734 return NULL; 6735 phba = vport->phba; 6736 if (!phba) 6737 return NULL; 6738 ndlp = lpfc_findnode_did(vport, Fabric_DID); 6739 if (!ndlp) { 6740 /* Cannot find existing Fabric ndlp, so allocate a new one */ 6741 ndlp = lpfc_nlp_init(vport, Fabric_DID); 6742 if (!ndlp) 6743 return NULL; 6744 /* Set the node type */ 6745 ndlp->nlp_type |= NLP_FABRIC; 6746 /* Put ndlp onto node list */ 6747 lpfc_enqueue_node(vport, ndlp); 6748 } 6749 if ((phba->pport->port_state < LPFC_FLOGI) && 6750 (phba->pport->port_state != LPFC_VPORT_FAILED)) 6751 return NULL; 6752 /* If virtual link is not yet instantiated ignore CVL */ 6753 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) 6754 && (vport->port_state != LPFC_VPORT_FAILED)) 6755 return NULL; 6756 shost = lpfc_shost_from_vport(vport); 6757 if (!shost) 6758 return NULL; 6759 lpfc_linkdown_port(vport); 6760 lpfc_cleanup_pending_mbox(vport); 6761 spin_lock_irq(shost->host_lock); 6762 vport->fc_flag |= FC_VPORT_CVL_RCVD; 6763 spin_unlock_irq(shost->host_lock); 6764 6765 return ndlp; 6766 } 6767 6768 /** 6769 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports 6770 * @phba: pointer to lpfc hba data structure. 6771 * 6772 * This routine is to perform Clear Virtual Link (CVL) on all vports in 6773 * response to a FCF dead event. 6774 **/ 6775 static void 6776 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) 6777 { 6778 struct lpfc_vport **vports; 6779 int i; 6780 6781 vports = lpfc_create_vport_work_array(phba); 6782 if (vports) 6783 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 6784 lpfc_sli4_perform_vport_cvl(vports[i]); 6785 lpfc_destroy_vport_work_array(phba, vports); 6786 } 6787 6788 /** 6789 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event 6790 * @phba: pointer to lpfc hba data structure. 6791 * @acqe_fip: pointer to the async fcoe completion queue entry. 6792 * 6793 * This routine is to handle the SLI4 asynchronous fcoe event. 6794 **/ 6795 static void 6796 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, 6797 struct lpfc_acqe_fip *acqe_fip) 6798 { 6799 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); 6800 int rc; 6801 struct lpfc_vport *vport; 6802 struct lpfc_nodelist *ndlp; 6803 int active_vlink_present; 6804 struct lpfc_vport **vports; 6805 int i; 6806 6807 phba->fc_eventTag = acqe_fip->event_tag; 6808 phba->fcoe_eventtag = acqe_fip->event_tag; 6809 switch (event_type) { 6810 case LPFC_FIP_EVENT_TYPE_NEW_FCF: 6811 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: 6812 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) 6813 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6814 "2546 New FCF event, evt_tag:x%x, " 6815 "index:x%x\n", 6816 acqe_fip->event_tag, 6817 acqe_fip->index); 6818 else 6819 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | 6820 LOG_DISCOVERY, 6821 "2788 FCF param modified event, " 6822 "evt_tag:x%x, index:x%x\n", 6823 acqe_fip->event_tag, 6824 acqe_fip->index); 6825 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6826 /* 6827 * During period of FCF discovery, read the FCF 6828 * table record indexed by the event to update 6829 * FCF roundrobin failover eligible FCF bmask. 6830 */ 6831 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6832 LOG_DISCOVERY, 6833 "2779 Read FCF (x%x) for updating " 6834 "roundrobin FCF failover bmask\n", 6835 acqe_fip->index); 6836 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); 6837 } 6838 6839 /* If the FCF discovery is in progress, do nothing. */ 6840 spin_lock_irq(&phba->hbalock); 6841 if (phba->hba_flag & FCF_TS_INPROG) { 6842 spin_unlock_irq(&phba->hbalock); 6843 break; 6844 } 6845 /* If fast FCF failover rescan event is pending, do nothing */ 6846 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { 6847 spin_unlock_irq(&phba->hbalock); 6848 break; 6849 } 6850 6851 /* If the FCF has been in discovered state, do nothing. */ 6852 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { 6853 spin_unlock_irq(&phba->hbalock); 6854 break; 6855 } 6856 spin_unlock_irq(&phba->hbalock); 6857 6858 /* Otherwise, scan the entire FCF table and re-discover SAN */ 6859 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6860 "2770 Start FCF table scan per async FCF " 6861 "event, evt_tag:x%x, index:x%x\n", 6862 acqe_fip->event_tag, acqe_fip->index); 6863 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 6864 LPFC_FCOE_FCF_GET_FIRST); 6865 if (rc) 6866 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6867 "2547 Issue FCF scan read FCF mailbox " 6868 "command failed (x%x)\n", rc); 6869 break; 6870 6871 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: 6872 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6873 "2548 FCF Table full count 0x%x tag 0x%x\n", 6874 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), 6875 acqe_fip->event_tag); 6876 break; 6877 6878 case LPFC_FIP_EVENT_TYPE_FCF_DEAD: 6879 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6880 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6881 "2549 FCF (x%x) disconnected from network, " 6882 "tag:x%x\n", acqe_fip->index, 6883 acqe_fip->event_tag); 6884 /* 6885 * If we are in the middle of FCF failover process, clear 6886 * the corresponding FCF bit in the roundrobin bitmap. 6887 */ 6888 spin_lock_irq(&phba->hbalock); 6889 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && 6890 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { 6891 spin_unlock_irq(&phba->hbalock); 6892 /* Update FLOGI FCF failover eligible FCF bmask */ 6893 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); 6894 break; 6895 } 6896 spin_unlock_irq(&phba->hbalock); 6897 6898 /* If the event is not for currently used fcf do nothing */ 6899 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) 6900 break; 6901 6902 /* 6903 * Otherwise, request the port to rediscover the entire FCF 6904 * table for a fast recovery from case that the current FCF 6905 * is no longer valid as we are not in the middle of FCF 6906 * failover process already. 6907 */ 6908 spin_lock_irq(&phba->hbalock); 6909 /* Mark the fast failover process in progress */ 6910 phba->fcf.fcf_flag |= FCF_DEAD_DISC; 6911 spin_unlock_irq(&phba->hbalock); 6912 6913 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6914 "2771 Start FCF fast failover process due to " 6915 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " 6916 "\n", acqe_fip->event_tag, acqe_fip->index); 6917 rc = lpfc_sli4_redisc_fcf_table(phba); 6918 if (rc) { 6919 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6920 LOG_TRACE_EVENT, 6921 "2772 Issue FCF rediscover mailbox " 6922 "command failed, fail through to FCF " 6923 "dead event\n"); 6924 spin_lock_irq(&phba->hbalock); 6925 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; 6926 spin_unlock_irq(&phba->hbalock); 6927 /* 6928 * Last resort will fail over by treating this 6929 * as a link down to FCF registration. 6930 */ 6931 lpfc_sli4_fcf_dead_failthrough(phba); 6932 } else { 6933 /* Reset FCF roundrobin bmask for new discovery */ 6934 lpfc_sli4_clear_fcf_rr_bmask(phba); 6935 /* 6936 * Handling fast FCF failover to a DEAD FCF event is 6937 * considered equalivant to receiving CVL to all vports. 6938 */ 6939 lpfc_sli4_perform_all_vport_cvl(phba); 6940 } 6941 break; 6942 case LPFC_FIP_EVENT_TYPE_CVL: 6943 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6944 lpfc_printf_log(phba, KERN_ERR, 6945 LOG_TRACE_EVENT, 6946 "2718 Clear Virtual Link Received for VPI 0x%x" 6947 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); 6948 6949 vport = lpfc_find_vport_by_vpid(phba, 6950 acqe_fip->index); 6951 ndlp = lpfc_sli4_perform_vport_cvl(vport); 6952 if (!ndlp) 6953 break; 6954 active_vlink_present = 0; 6955 6956 vports = lpfc_create_vport_work_array(phba); 6957 if (vports) { 6958 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6959 i++) { 6960 if ((!(vports[i]->fc_flag & 6961 FC_VPORT_CVL_RCVD)) && 6962 (vports[i]->port_state > LPFC_FDISC)) { 6963 active_vlink_present = 1; 6964 break; 6965 } 6966 } 6967 lpfc_destroy_vport_work_array(phba, vports); 6968 } 6969 6970 /* 6971 * Don't re-instantiate if vport is marked for deletion. 6972 * If we are here first then vport_delete is going to wait 6973 * for discovery to complete. 6974 */ 6975 if (!(vport->load_flag & FC_UNLOADING) && 6976 active_vlink_present) { 6977 /* 6978 * If there are other active VLinks present, 6979 * re-instantiate the Vlink using FDISC. 6980 */ 6981 mod_timer(&ndlp->nlp_delayfunc, 6982 jiffies + msecs_to_jiffies(1000)); 6983 spin_lock_irq(&ndlp->lock); 6984 ndlp->nlp_flag |= NLP_DELAY_TMO; 6985 spin_unlock_irq(&ndlp->lock); 6986 ndlp->nlp_last_elscmd = ELS_CMD_FDISC; 6987 vport->port_state = LPFC_FDISC; 6988 } else { 6989 /* 6990 * Otherwise, we request port to rediscover 6991 * the entire FCF table for a fast recovery 6992 * from possible case that the current FCF 6993 * is no longer valid if we are not already 6994 * in the FCF failover process. 6995 */ 6996 spin_lock_irq(&phba->hbalock); 6997 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6998 spin_unlock_irq(&phba->hbalock); 6999 break; 7000 } 7001 /* Mark the fast failover process in progress */ 7002 phba->fcf.fcf_flag |= FCF_ACVL_DISC; 7003 spin_unlock_irq(&phba->hbalock); 7004 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 7005 LOG_DISCOVERY, 7006 "2773 Start FCF failover per CVL, " 7007 "evt_tag:x%x\n", acqe_fip->event_tag); 7008 rc = lpfc_sli4_redisc_fcf_table(phba); 7009 if (rc) { 7010 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 7011 LOG_TRACE_EVENT, 7012 "2774 Issue FCF rediscover " 7013 "mailbox command failed, " 7014 "through to CVL event\n"); 7015 spin_lock_irq(&phba->hbalock); 7016 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; 7017 spin_unlock_irq(&phba->hbalock); 7018 /* 7019 * Last resort will be re-try on the 7020 * the current registered FCF entry. 7021 */ 7022 lpfc_retry_pport_discovery(phba); 7023 } else 7024 /* 7025 * Reset FCF roundrobin bmask for new 7026 * discovery. 7027 */ 7028 lpfc_sli4_clear_fcf_rr_bmask(phba); 7029 } 7030 break; 7031 default: 7032 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7033 "0288 Unknown FCoE event type 0x%x event tag " 7034 "0x%x\n", event_type, acqe_fip->event_tag); 7035 break; 7036 } 7037 } 7038 7039 /** 7040 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event 7041 * @phba: pointer to lpfc hba data structure. 7042 * @acqe_dcbx: pointer to the async dcbx completion queue entry. 7043 * 7044 * This routine is to handle the SLI4 asynchronous dcbx event. 7045 **/ 7046 static void 7047 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, 7048 struct lpfc_acqe_dcbx *acqe_dcbx) 7049 { 7050 phba->fc_eventTag = acqe_dcbx->event_tag; 7051 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7052 "0290 The SLI4 DCBX asynchronous event is not " 7053 "handled yet\n"); 7054 } 7055 7056 /** 7057 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event 7058 * @phba: pointer to lpfc hba data structure. 7059 * @acqe_grp5: pointer to the async grp5 completion queue entry. 7060 * 7061 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event 7062 * is an asynchronous notified of a logical link speed change. The Port 7063 * reports the logical link speed in units of 10Mbps. 7064 **/ 7065 static void 7066 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, 7067 struct lpfc_acqe_grp5 *acqe_grp5) 7068 { 7069 uint16_t prev_ll_spd; 7070 7071 phba->fc_eventTag = acqe_grp5->event_tag; 7072 phba->fcoe_eventtag = acqe_grp5->event_tag; 7073 prev_ll_spd = phba->sli4_hba.link_state.logical_speed; 7074 phba->sli4_hba.link_state.logical_speed = 7075 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; 7076 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 7077 "2789 GRP5 Async Event: Updating logical link speed " 7078 "from %dMbps to %dMbps\n", prev_ll_spd, 7079 phba->sli4_hba.link_state.logical_speed); 7080 } 7081 7082 /** 7083 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event 7084 * @phba: pointer to lpfc hba data structure. 7085 * 7086 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event 7087 * is an asynchronous notification of a request to reset CM stats. 7088 **/ 7089 static void 7090 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba) 7091 { 7092 if (!phba->cgn_i) 7093 return; 7094 lpfc_init_congestion_stat(phba); 7095 } 7096 7097 /** 7098 * lpfc_cgn_params_val - Validate FW congestion parameters. 7099 * @phba: pointer to lpfc hba data structure. 7100 * @p_cfg_param: pointer to FW provided congestion parameters. 7101 * 7102 * This routine validates the congestion parameters passed 7103 * by the FW to the driver via an ACQE event. 7104 **/ 7105 static void 7106 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param) 7107 { 7108 spin_lock_irq(&phba->hbalock); 7109 7110 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF, 7111 LPFC_CFG_MONITOR)) { 7112 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT, 7113 "6225 CMF mode param out of range: %d\n", 7114 p_cfg_param->cgn_param_mode); 7115 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF; 7116 } 7117 7118 spin_unlock_irq(&phba->hbalock); 7119 } 7120 7121 static const char * const lpfc_cmf_mode_to_str[] = { 7122 "OFF", 7123 "MANAGED", 7124 "MONITOR", 7125 }; 7126 7127 /** 7128 * lpfc_cgn_params_parse - Process a FW cong parm change event 7129 * @phba: pointer to lpfc hba data structure. 7130 * @p_cgn_param: pointer to a data buffer with the FW cong params. 7131 * @len: the size of pdata in bytes. 7132 * 7133 * This routine validates the congestion management buffer signature 7134 * from the FW, validates the contents and makes corrections for 7135 * valid, in-range values. If the signature magic is correct and 7136 * after parameter validation, the contents are copied to the driver's 7137 * @phba structure. If the magic is incorrect, an error message is 7138 * logged. 7139 **/ 7140 static void 7141 lpfc_cgn_params_parse(struct lpfc_hba *phba, 7142 struct lpfc_cgn_param *p_cgn_param, uint32_t len) 7143 { 7144 struct lpfc_cgn_info *cp; 7145 uint32_t crc, oldmode; 7146 char acr_string[4] = {0}; 7147 7148 /* Make sure the FW has encoded the correct magic number to 7149 * validate the congestion parameter in FW memory. 7150 */ 7151 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) { 7152 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7153 "4668 FW cgn parm buffer data: " 7154 "magic 0x%x version %d mode %d " 7155 "level0 %d level1 %d " 7156 "level2 %d byte13 %d " 7157 "byte14 %d byte15 %d " 7158 "byte11 %d byte12 %d activeMode %d\n", 7159 p_cgn_param->cgn_param_magic, 7160 p_cgn_param->cgn_param_version, 7161 p_cgn_param->cgn_param_mode, 7162 p_cgn_param->cgn_param_level0, 7163 p_cgn_param->cgn_param_level1, 7164 p_cgn_param->cgn_param_level2, 7165 p_cgn_param->byte13, 7166 p_cgn_param->byte14, 7167 p_cgn_param->byte15, 7168 p_cgn_param->byte11, 7169 p_cgn_param->byte12, 7170 phba->cmf_active_mode); 7171 7172 oldmode = phba->cmf_active_mode; 7173 7174 /* Any parameters out of range are corrected to defaults 7175 * by this routine. No need to fail. 7176 */ 7177 lpfc_cgn_params_val(phba, p_cgn_param); 7178 7179 /* Parameters are verified, move them into driver storage */ 7180 spin_lock_irq(&phba->hbalock); 7181 memcpy(&phba->cgn_p, p_cgn_param, 7182 sizeof(struct lpfc_cgn_param)); 7183 7184 /* Update parameters in congestion info buffer now */ 7185 if (phba->cgn_i) { 7186 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 7187 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 7188 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 7189 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 7190 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 7191 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 7192 LPFC_CGN_CRC32_SEED); 7193 cp->cgn_info_crc = cpu_to_le32(crc); 7194 } 7195 spin_unlock_irq(&phba->hbalock); 7196 7197 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode; 7198 7199 switch (oldmode) { 7200 case LPFC_CFG_OFF: 7201 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) { 7202 /* Turning CMF on */ 7203 lpfc_cmf_start(phba); 7204 7205 if (phba->link_state >= LPFC_LINK_UP) { 7206 phba->cgn_reg_fpin = 7207 phba->cgn_init_reg_fpin; 7208 phba->cgn_reg_signal = 7209 phba->cgn_init_reg_signal; 7210 lpfc_issue_els_edc(phba->pport, 0); 7211 } 7212 } 7213 break; 7214 case LPFC_CFG_MANAGED: 7215 switch (phba->cgn_p.cgn_param_mode) { 7216 case LPFC_CFG_OFF: 7217 /* Turning CMF off */ 7218 lpfc_cmf_stop(phba); 7219 if (phba->link_state >= LPFC_LINK_UP) 7220 lpfc_issue_els_edc(phba->pport, 0); 7221 break; 7222 case LPFC_CFG_MONITOR: 7223 phba->cmf_max_bytes_per_interval = 7224 phba->cmf_link_byte_count; 7225 7226 /* Resume blocked IO - unblock on workqueue */ 7227 queue_work(phba->wq, 7228 &phba->unblock_request_work); 7229 break; 7230 } 7231 break; 7232 case LPFC_CFG_MONITOR: 7233 switch (phba->cgn_p.cgn_param_mode) { 7234 case LPFC_CFG_OFF: 7235 /* Turning CMF off */ 7236 lpfc_cmf_stop(phba); 7237 if (phba->link_state >= LPFC_LINK_UP) 7238 lpfc_issue_els_edc(phba->pport, 0); 7239 break; 7240 case LPFC_CFG_MANAGED: 7241 lpfc_cmf_signal_init(phba); 7242 break; 7243 } 7244 break; 7245 } 7246 if (oldmode != LPFC_CFG_OFF || 7247 oldmode != phba->cgn_p.cgn_param_mode) { 7248 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED) 7249 scnprintf(acr_string, sizeof(acr_string), "%u", 7250 phba->cgn_p.cgn_param_level0); 7251 else 7252 scnprintf(acr_string, sizeof(acr_string), "NA"); 7253 7254 dev_info(&phba->pcidev->dev, "%d: " 7255 "4663 CMF: Mode %s acr %s\n", 7256 phba->brd_no, 7257 lpfc_cmf_mode_to_str 7258 [phba->cgn_p.cgn_param_mode], 7259 acr_string); 7260 } 7261 } else { 7262 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7263 "4669 FW cgn parm buf wrong magic 0x%x " 7264 "version %d\n", p_cgn_param->cgn_param_magic, 7265 p_cgn_param->cgn_param_version); 7266 } 7267 } 7268 7269 /** 7270 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters. 7271 * @phba: pointer to lpfc hba data structure. 7272 * 7273 * This routine issues a read_object mailbox command to 7274 * get the congestion management parameters from the FW 7275 * parses it and updates the driver maintained values. 7276 * 7277 * Returns 7278 * 0 if the object was empty 7279 * -Eval if an error was encountered 7280 * Count if bytes were read from object 7281 **/ 7282 int 7283 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba) 7284 { 7285 int ret = 0; 7286 struct lpfc_cgn_param *p_cgn_param = NULL; 7287 u32 *pdata = NULL; 7288 u32 len = 0; 7289 7290 /* Find out if the FW has a new set of congestion parameters. */ 7291 len = sizeof(struct lpfc_cgn_param); 7292 pdata = kzalloc(len, GFP_KERNEL); 7293 if (!pdata) 7294 return -ENOMEM; 7295 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME, 7296 pdata, len); 7297 7298 /* 0 means no data. A negative means error. A positive means 7299 * bytes were copied. 7300 */ 7301 if (!ret) { 7302 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7303 "4670 CGN RD OBJ returns no data\n"); 7304 goto rd_obj_err; 7305 } else if (ret < 0) { 7306 /* Some error. Just exit and return it to the caller.*/ 7307 goto rd_obj_err; 7308 } 7309 7310 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7311 "6234 READ CGN PARAMS Successful %d\n", len); 7312 7313 /* Parse data pointer over len and update the phba congestion 7314 * parameters with values passed back. The receive rate values 7315 * may have been altered in FW, but take no action here. 7316 */ 7317 p_cgn_param = (struct lpfc_cgn_param *)pdata; 7318 lpfc_cgn_params_parse(phba, p_cgn_param, len); 7319 7320 rd_obj_err: 7321 kfree(pdata); 7322 return ret; 7323 } 7324 7325 /** 7326 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event 7327 * @phba: pointer to lpfc hba data structure. 7328 * 7329 * The FW generated Async ACQE SLI event calls this routine when 7330 * the event type is an SLI Internal Port Event and the Event Code 7331 * indicates a change to the FW maintained congestion parameters. 7332 * 7333 * This routine executes a Read_Object mailbox call to obtain the 7334 * current congestion parameters maintained in FW and corrects 7335 * the driver's active congestion parameters. 7336 * 7337 * The acqe event is not passed because there is no further data 7338 * required. 7339 * 7340 * Returns nonzero error if event processing encountered an error. 7341 * Zero otherwise for success. 7342 **/ 7343 static int 7344 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba) 7345 { 7346 int ret = 0; 7347 7348 if (!phba->sli4_hba.pc_sli4_params.cmf) { 7349 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7350 "4664 Cgn Evt when E2E off. Drop event\n"); 7351 return -EACCES; 7352 } 7353 7354 /* If the event is claiming an empty object, it's ok. A write 7355 * could have cleared it. Only error is a negative return 7356 * status. 7357 */ 7358 ret = lpfc_sli4_cgn_params_read(phba); 7359 if (ret < 0) { 7360 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7361 "4667 Error reading Cgn Params (%d)\n", 7362 ret); 7363 } else if (!ret) { 7364 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7365 "4673 CGN Event empty object.\n"); 7366 } 7367 return ret; 7368 } 7369 7370 /** 7371 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event 7372 * @phba: pointer to lpfc hba data structure. 7373 * 7374 * This routine is invoked by the worker thread to process all the pending 7375 * SLI4 asynchronous events. 7376 **/ 7377 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) 7378 { 7379 struct lpfc_cq_event *cq_event; 7380 unsigned long iflags; 7381 7382 /* First, declare the async event has been handled */ 7383 spin_lock_irqsave(&phba->hbalock, iflags); 7384 phba->hba_flag &= ~ASYNC_EVENT; 7385 spin_unlock_irqrestore(&phba->hbalock, iflags); 7386 7387 /* Now, handle all the async events */ 7388 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7389 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { 7390 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, 7391 cq_event, struct lpfc_cq_event, list); 7392 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, 7393 iflags); 7394 7395 /* Process the asynchronous event */ 7396 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { 7397 case LPFC_TRAILER_CODE_LINK: 7398 lpfc_sli4_async_link_evt(phba, 7399 &cq_event->cqe.acqe_link); 7400 break; 7401 case LPFC_TRAILER_CODE_FCOE: 7402 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); 7403 break; 7404 case LPFC_TRAILER_CODE_DCBX: 7405 lpfc_sli4_async_dcbx_evt(phba, 7406 &cq_event->cqe.acqe_dcbx); 7407 break; 7408 case LPFC_TRAILER_CODE_GRP5: 7409 lpfc_sli4_async_grp5_evt(phba, 7410 &cq_event->cqe.acqe_grp5); 7411 break; 7412 case LPFC_TRAILER_CODE_FC: 7413 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); 7414 break; 7415 case LPFC_TRAILER_CODE_SLI: 7416 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); 7417 break; 7418 case LPFC_TRAILER_CODE_CMSTAT: 7419 lpfc_sli4_async_cmstat_evt(phba); 7420 break; 7421 default: 7422 lpfc_printf_log(phba, KERN_ERR, 7423 LOG_TRACE_EVENT, 7424 "1804 Invalid asynchronous event code: " 7425 "x%x\n", bf_get(lpfc_trailer_code, 7426 &cq_event->cqe.mcqe_cmpl)); 7427 break; 7428 } 7429 7430 /* Free the completion event processed to the free pool */ 7431 lpfc_sli4_cq_event_release(phba, cq_event); 7432 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7433 } 7434 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 7435 } 7436 7437 /** 7438 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event 7439 * @phba: pointer to lpfc hba data structure. 7440 * 7441 * This routine is invoked by the worker thread to process FCF table 7442 * rediscovery pending completion event. 7443 **/ 7444 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) 7445 { 7446 int rc; 7447 7448 spin_lock_irq(&phba->hbalock); 7449 /* Clear FCF rediscovery timeout event */ 7450 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; 7451 /* Clear driver fast failover FCF record flag */ 7452 phba->fcf.failover_rec.flag = 0; 7453 /* Set state for FCF fast failover */ 7454 phba->fcf.fcf_flag |= FCF_REDISC_FOV; 7455 spin_unlock_irq(&phba->hbalock); 7456 7457 /* Scan FCF table from the first entry to re-discover SAN */ 7458 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 7459 "2777 Start post-quiescent FCF table scan\n"); 7460 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); 7461 if (rc) 7462 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7463 "2747 Issue FCF scan read FCF mailbox " 7464 "command failed 0x%x\n", rc); 7465 } 7466 7467 /** 7468 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table 7469 * @phba: pointer to lpfc hba data structure. 7470 * @dev_grp: The HBA PCI-Device group number. 7471 * 7472 * This routine is invoked to set up the per HBA PCI-Device group function 7473 * API jump table entries. 7474 * 7475 * Return: 0 if success, otherwise -ENODEV 7476 **/ 7477 int 7478 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 7479 { 7480 int rc; 7481 7482 /* Set up lpfc PCI-device group */ 7483 phba->pci_dev_grp = dev_grp; 7484 7485 /* The LPFC_PCI_DEV_OC uses SLI4 */ 7486 if (dev_grp == LPFC_PCI_DEV_OC) 7487 phba->sli_rev = LPFC_SLI_REV4; 7488 7489 /* Set up device INIT API function jump table */ 7490 rc = lpfc_init_api_table_setup(phba, dev_grp); 7491 if (rc) 7492 return -ENODEV; 7493 /* Set up SCSI API function jump table */ 7494 rc = lpfc_scsi_api_table_setup(phba, dev_grp); 7495 if (rc) 7496 return -ENODEV; 7497 /* Set up SLI API function jump table */ 7498 rc = lpfc_sli_api_table_setup(phba, dev_grp); 7499 if (rc) 7500 return -ENODEV; 7501 /* Set up MBOX API function jump table */ 7502 rc = lpfc_mbox_api_table_setup(phba, dev_grp); 7503 if (rc) 7504 return -ENODEV; 7505 7506 return 0; 7507 } 7508 7509 /** 7510 * lpfc_log_intr_mode - Log the active interrupt mode 7511 * @phba: pointer to lpfc hba data structure. 7512 * @intr_mode: active interrupt mode adopted. 7513 * 7514 * This routine it invoked to log the currently used active interrupt mode 7515 * to the device. 7516 **/ 7517 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) 7518 { 7519 switch (intr_mode) { 7520 case 0: 7521 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7522 "0470 Enable INTx interrupt mode.\n"); 7523 break; 7524 case 1: 7525 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7526 "0481 Enabled MSI interrupt mode.\n"); 7527 break; 7528 case 2: 7529 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7530 "0480 Enabled MSI-X interrupt mode.\n"); 7531 break; 7532 default: 7533 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7534 "0482 Illegal interrupt mode.\n"); 7535 break; 7536 } 7537 return; 7538 } 7539 7540 /** 7541 * lpfc_enable_pci_dev - Enable a generic PCI device. 7542 * @phba: pointer to lpfc hba data structure. 7543 * 7544 * This routine is invoked to enable the PCI device that is common to all 7545 * PCI devices. 7546 * 7547 * Return codes 7548 * 0 - successful 7549 * other values - error 7550 **/ 7551 static int 7552 lpfc_enable_pci_dev(struct lpfc_hba *phba) 7553 { 7554 struct pci_dev *pdev; 7555 7556 /* Obtain PCI device reference */ 7557 if (!phba->pcidev) 7558 goto out_error; 7559 else 7560 pdev = phba->pcidev; 7561 /* Enable PCI device */ 7562 if (pci_enable_device_mem(pdev)) 7563 goto out_error; 7564 /* Request PCI resource for the device */ 7565 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) 7566 goto out_disable_device; 7567 /* Set up device as PCI master and save state for EEH */ 7568 pci_set_master(pdev); 7569 pci_try_set_mwi(pdev); 7570 pci_save_state(pdev); 7571 7572 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ 7573 if (pci_is_pcie(pdev)) 7574 pdev->needs_freset = 1; 7575 7576 return 0; 7577 7578 out_disable_device: 7579 pci_disable_device(pdev); 7580 out_error: 7581 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7582 "1401 Failed to enable pci device\n"); 7583 return -ENODEV; 7584 } 7585 7586 /** 7587 * lpfc_disable_pci_dev - Disable a generic PCI device. 7588 * @phba: pointer to lpfc hba data structure. 7589 * 7590 * This routine is invoked to disable the PCI device that is common to all 7591 * PCI devices. 7592 **/ 7593 static void 7594 lpfc_disable_pci_dev(struct lpfc_hba *phba) 7595 { 7596 struct pci_dev *pdev; 7597 7598 /* Obtain PCI device reference */ 7599 if (!phba->pcidev) 7600 return; 7601 else 7602 pdev = phba->pcidev; 7603 /* Release PCI resource and disable PCI device */ 7604 pci_release_mem_regions(pdev); 7605 pci_disable_device(pdev); 7606 7607 return; 7608 } 7609 7610 /** 7611 * lpfc_reset_hba - Reset a hba 7612 * @phba: pointer to lpfc hba data structure. 7613 * 7614 * This routine is invoked to reset a hba device. It brings the HBA 7615 * offline, performs a board restart, and then brings the board back 7616 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up 7617 * on outstanding mailbox commands. 7618 **/ 7619 void 7620 lpfc_reset_hba(struct lpfc_hba *phba) 7621 { 7622 /* If resets are disabled then set error state and return. */ 7623 if (!phba->cfg_enable_hba_reset) { 7624 phba->link_state = LPFC_HBA_ERROR; 7625 return; 7626 } 7627 7628 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */ 7629 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) { 7630 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 7631 } else { 7632 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 7633 lpfc_sli_flush_io_rings(phba); 7634 } 7635 lpfc_offline(phba); 7636 lpfc_sli_brdrestart(phba); 7637 lpfc_online(phba); 7638 lpfc_unblock_mgmt_io(phba); 7639 } 7640 7641 /** 7642 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions 7643 * @phba: pointer to lpfc hba data structure. 7644 * 7645 * This function enables the PCI SR-IOV virtual functions to a physical 7646 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7647 * enable the number of virtual functions to the physical function. As 7648 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7649 * API call does not considered as an error condition for most of the device. 7650 **/ 7651 uint16_t 7652 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) 7653 { 7654 struct pci_dev *pdev = phba->pcidev; 7655 uint16_t nr_virtfn; 7656 int pos; 7657 7658 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 7659 if (pos == 0) 7660 return 0; 7661 7662 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); 7663 return nr_virtfn; 7664 } 7665 7666 /** 7667 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions 7668 * @phba: pointer to lpfc hba data structure. 7669 * @nr_vfn: number of virtual functions to be enabled. 7670 * 7671 * This function enables the PCI SR-IOV virtual functions to a physical 7672 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7673 * enable the number of virtual functions to the physical function. As 7674 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7675 * API call does not considered as an error condition for most of the device. 7676 **/ 7677 int 7678 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) 7679 { 7680 struct pci_dev *pdev = phba->pcidev; 7681 uint16_t max_nr_vfn; 7682 int rc; 7683 7684 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); 7685 if (nr_vfn > max_nr_vfn) { 7686 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7687 "3057 Requested vfs (%d) greater than " 7688 "supported vfs (%d)", nr_vfn, max_nr_vfn); 7689 return -EINVAL; 7690 } 7691 7692 rc = pci_enable_sriov(pdev, nr_vfn); 7693 if (rc) { 7694 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7695 "2806 Failed to enable sriov on this device " 7696 "with vfn number nr_vf:%d, rc:%d\n", 7697 nr_vfn, rc); 7698 } else 7699 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7700 "2807 Successful enable sriov on this device " 7701 "with vfn number nr_vf:%d\n", nr_vfn); 7702 return rc; 7703 } 7704 7705 static void 7706 lpfc_unblock_requests_work(struct work_struct *work) 7707 { 7708 struct lpfc_hba *phba = container_of(work, struct lpfc_hba, 7709 unblock_request_work); 7710 7711 lpfc_unblock_requests(phba); 7712 } 7713 7714 /** 7715 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. 7716 * @phba: pointer to lpfc hba data structure. 7717 * 7718 * This routine is invoked to set up the driver internal resources before the 7719 * device specific resource setup to support the HBA device it attached to. 7720 * 7721 * Return codes 7722 * 0 - successful 7723 * other values - error 7724 **/ 7725 static int 7726 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) 7727 { 7728 struct lpfc_sli *psli = &phba->sli; 7729 7730 /* 7731 * Driver resources common to all SLI revisions 7732 */ 7733 atomic_set(&phba->fast_event_count, 0); 7734 atomic_set(&phba->dbg_log_idx, 0); 7735 atomic_set(&phba->dbg_log_cnt, 0); 7736 atomic_set(&phba->dbg_log_dmping, 0); 7737 spin_lock_init(&phba->hbalock); 7738 7739 /* Initialize port_list spinlock */ 7740 spin_lock_init(&phba->port_list_lock); 7741 INIT_LIST_HEAD(&phba->port_list); 7742 7743 INIT_LIST_HEAD(&phba->work_list); 7744 7745 /* Initialize the wait queue head for the kernel thread */ 7746 init_waitqueue_head(&phba->work_waitq); 7747 7748 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7749 "1403 Protocols supported %s %s %s\n", 7750 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? 7751 "SCSI" : " "), 7752 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? 7753 "NVME" : " "), 7754 (phba->nvmet_support ? "NVMET" : " ")); 7755 7756 /* Initialize the IO buffer list used by driver for SLI3 SCSI */ 7757 spin_lock_init(&phba->scsi_buf_list_get_lock); 7758 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); 7759 spin_lock_init(&phba->scsi_buf_list_put_lock); 7760 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); 7761 7762 /* Initialize the fabric iocb list */ 7763 INIT_LIST_HEAD(&phba->fabric_iocb_list); 7764 7765 /* Initialize list to save ELS buffers */ 7766 INIT_LIST_HEAD(&phba->elsbuf); 7767 7768 /* Initialize FCF connection rec list */ 7769 INIT_LIST_HEAD(&phba->fcf_conn_rec_list); 7770 7771 /* Initialize OAS configuration list */ 7772 spin_lock_init(&phba->devicelock); 7773 INIT_LIST_HEAD(&phba->luns); 7774 7775 /* MBOX heartbeat timer */ 7776 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); 7777 /* Fabric block timer */ 7778 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); 7779 /* EA polling mode timer */ 7780 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); 7781 /* Heartbeat timer */ 7782 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); 7783 7784 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); 7785 7786 INIT_DELAYED_WORK(&phba->idle_stat_delay_work, 7787 lpfc_idle_stat_delay_work); 7788 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work); 7789 return 0; 7790 } 7791 7792 /** 7793 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev 7794 * @phba: pointer to lpfc hba data structure. 7795 * 7796 * This routine is invoked to set up the driver internal resources specific to 7797 * support the SLI-3 HBA device it attached to. 7798 * 7799 * Return codes 7800 * 0 - successful 7801 * other values - error 7802 **/ 7803 static int 7804 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) 7805 { 7806 int rc, entry_sz; 7807 7808 /* 7809 * Initialize timers used by driver 7810 */ 7811 7812 /* FCP polling mode timer */ 7813 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); 7814 7815 /* Host attention work mask setup */ 7816 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); 7817 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 7818 7819 /* Get all the module params for configuring this host */ 7820 lpfc_get_cfgparam(phba); 7821 /* Set up phase-1 common device driver resources */ 7822 7823 rc = lpfc_setup_driver_resource_phase1(phba); 7824 if (rc) 7825 return -ENODEV; 7826 7827 if (!phba->sli.sli3_ring) 7828 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, 7829 sizeof(struct lpfc_sli_ring), 7830 GFP_KERNEL); 7831 if (!phba->sli.sli3_ring) 7832 return -ENOMEM; 7833 7834 /* 7835 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size 7836 * used to create the sg_dma_buf_pool must be dynamically calculated. 7837 */ 7838 7839 if (phba->sli_rev == LPFC_SLI_REV4) 7840 entry_sz = sizeof(struct sli4_sge); 7841 else 7842 entry_sz = sizeof(struct ulp_bde64); 7843 7844 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ 7845 if (phba->cfg_enable_bg) { 7846 /* 7847 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, 7848 * the FCP rsp, and a BDE for each. Sice we have no control 7849 * over how many protection data segments the SCSI Layer 7850 * will hand us (ie: there could be one for every block 7851 * in the IO), we just allocate enough BDEs to accomidate 7852 * our max amount and we need to limit lpfc_sg_seg_cnt to 7853 * minimize the risk of running out. 7854 */ 7855 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7856 sizeof(struct fcp_rsp) + 7857 (LPFC_MAX_SG_SEG_CNT * entry_sz); 7858 7859 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) 7860 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; 7861 7862 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ 7863 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; 7864 } else { 7865 /* 7866 * The scsi_buf for a regular I/O will hold the FCP cmnd, 7867 * the FCP rsp, a BDE for each, and a BDE for up to 7868 * cfg_sg_seg_cnt data segments. 7869 */ 7870 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7871 sizeof(struct fcp_rsp) + 7872 ((phba->cfg_sg_seg_cnt + 2) * entry_sz); 7873 7874 /* Total BDEs in BPL for scsi_sg_list */ 7875 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; 7876 } 7877 7878 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 7879 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", 7880 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 7881 phba->cfg_total_seg_cnt); 7882 7883 phba->max_vpi = LPFC_MAX_VPI; 7884 /* This will be set to correct value after config_port mbox */ 7885 phba->max_vports = 0; 7886 7887 /* 7888 * Initialize the SLI Layer to run with lpfc HBAs. 7889 */ 7890 lpfc_sli_setup(phba); 7891 lpfc_sli_queue_init(phba); 7892 7893 /* Allocate device driver memory */ 7894 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) 7895 return -ENOMEM; 7896 7897 phba->lpfc_sg_dma_buf_pool = 7898 dma_pool_create("lpfc_sg_dma_buf_pool", 7899 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 7900 BPL_ALIGN_SZ, 0); 7901 7902 if (!phba->lpfc_sg_dma_buf_pool) 7903 goto fail_free_mem; 7904 7905 phba->lpfc_cmd_rsp_buf_pool = 7906 dma_pool_create("lpfc_cmd_rsp_buf_pool", 7907 &phba->pcidev->dev, 7908 sizeof(struct fcp_cmnd) + 7909 sizeof(struct fcp_rsp), 7910 BPL_ALIGN_SZ, 0); 7911 7912 if (!phba->lpfc_cmd_rsp_buf_pool) 7913 goto fail_free_dma_buf_pool; 7914 7915 /* 7916 * Enable sr-iov virtual functions if supported and configured 7917 * through the module parameter. 7918 */ 7919 if (phba->cfg_sriov_nr_virtfn > 0) { 7920 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 7921 phba->cfg_sriov_nr_virtfn); 7922 if (rc) { 7923 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7924 "2808 Requested number of SR-IOV " 7925 "virtual functions (%d) is not " 7926 "supported\n", 7927 phba->cfg_sriov_nr_virtfn); 7928 phba->cfg_sriov_nr_virtfn = 0; 7929 } 7930 } 7931 7932 return 0; 7933 7934 fail_free_dma_buf_pool: 7935 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 7936 phba->lpfc_sg_dma_buf_pool = NULL; 7937 fail_free_mem: 7938 lpfc_mem_free(phba); 7939 return -ENOMEM; 7940 } 7941 7942 /** 7943 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev 7944 * @phba: pointer to lpfc hba data structure. 7945 * 7946 * This routine is invoked to unset the driver internal resources set up 7947 * specific for supporting the SLI-3 HBA device it attached to. 7948 **/ 7949 static void 7950 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) 7951 { 7952 /* Free device driver memory allocated */ 7953 lpfc_mem_free_all(phba); 7954 7955 return; 7956 } 7957 7958 /** 7959 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev 7960 * @phba: pointer to lpfc hba data structure. 7961 * 7962 * This routine is invoked to set up the driver internal resources specific to 7963 * support the SLI-4 HBA device it attached to. 7964 * 7965 * Return codes 7966 * 0 - successful 7967 * other values - error 7968 **/ 7969 static int 7970 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 7971 { 7972 LPFC_MBOXQ_t *mboxq; 7973 MAILBOX_t *mb; 7974 int rc, i, max_buf_size; 7975 int longs; 7976 int extra; 7977 uint64_t wwn; 7978 u32 if_type; 7979 u32 if_fam; 7980 7981 phba->sli4_hba.num_present_cpu = lpfc_present_cpu; 7982 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; 7983 phba->sli4_hba.curr_disp_cpu = 0; 7984 7985 /* Get all the module params for configuring this host */ 7986 lpfc_get_cfgparam(phba); 7987 7988 /* Set up phase-1 common device driver resources */ 7989 rc = lpfc_setup_driver_resource_phase1(phba); 7990 if (rc) 7991 return -ENODEV; 7992 7993 /* Before proceed, wait for POST done and device ready */ 7994 rc = lpfc_sli4_post_status_check(phba); 7995 if (rc) 7996 return -ENODEV; 7997 7998 /* Allocate all driver workqueues here */ 7999 8000 /* The lpfc_wq workqueue for deferred irq use */ 8001 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 8002 if (!phba->wq) 8003 return -ENOMEM; 8004 8005 /* 8006 * Initialize timers used by driver 8007 */ 8008 8009 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); 8010 8011 /* FCF rediscover timer */ 8012 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); 8013 8014 /* CMF congestion timer */ 8015 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 8016 phba->cmf_timer.function = lpfc_cmf_timer; 8017 8018 /* 8019 * Control structure for handling external multi-buffer mailbox 8020 * command pass-through. 8021 */ 8022 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, 8023 sizeof(struct lpfc_mbox_ext_buf_ctx)); 8024 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); 8025 8026 phba->max_vpi = LPFC_MAX_VPI; 8027 8028 /* This will be set to correct value after the read_config mbox */ 8029 phba->max_vports = 0; 8030 8031 /* Program the default value of vlan_id and fc_map */ 8032 phba->valid_vlan = 0; 8033 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; 8034 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; 8035 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; 8036 8037 /* 8038 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands 8039 * we will associate a new ring, for each EQ/CQ/WQ tuple. 8040 * The WQ create will allocate the ring. 8041 */ 8042 8043 /* Initialize buffer queue management fields */ 8044 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); 8045 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; 8046 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; 8047 8048 /* for VMID idle timeout if VMID is enabled */ 8049 if (lpfc_is_vmid_enabled(phba)) 8050 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0); 8051 8052 /* 8053 * Initialize the SLI Layer to run with lpfc SLI4 HBAs. 8054 */ 8055 /* Initialize the Abort buffer list used by driver */ 8056 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); 8057 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); 8058 8059 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8060 /* Initialize the Abort nvme buffer list used by driver */ 8061 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); 8062 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8063 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); 8064 spin_lock_init(&phba->sli4_hba.t_active_list_lock); 8065 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); 8066 } 8067 8068 /* This abort list used by worker thread */ 8069 spin_lock_init(&phba->sli4_hba.sgl_list_lock); 8070 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); 8071 spin_lock_init(&phba->sli4_hba.asynce_list_lock); 8072 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); 8073 8074 /* 8075 * Initialize driver internal slow-path work queues 8076 */ 8077 8078 /* Driver internel slow-path CQ Event pool */ 8079 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); 8080 /* Response IOCB work queue list */ 8081 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); 8082 /* Asynchronous event CQ Event work queue list */ 8083 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); 8084 /* Slow-path XRI aborted CQ Event work queue list */ 8085 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); 8086 /* Receive queue CQ Event work queue list */ 8087 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); 8088 8089 /* Initialize extent block lists. */ 8090 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); 8091 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); 8092 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); 8093 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); 8094 8095 /* Initialize mboxq lists. If the early init routines fail 8096 * these lists need to be correctly initialized. 8097 */ 8098 INIT_LIST_HEAD(&phba->sli.mboxq); 8099 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); 8100 8101 /* initialize optic_state to 0xFF */ 8102 phba->sli4_hba.lnk_info.optic_state = 0xff; 8103 8104 /* Allocate device driver memory */ 8105 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); 8106 if (rc) 8107 goto out_destroy_workqueue; 8108 8109 /* IF Type 2 ports get initialized now. */ 8110 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 8111 LPFC_SLI_INTF_IF_TYPE_2) { 8112 rc = lpfc_pci_function_reset(phba); 8113 if (unlikely(rc)) { 8114 rc = -ENODEV; 8115 goto out_free_mem; 8116 } 8117 phba->temp_sensor_support = 1; 8118 } 8119 8120 /* Create the bootstrap mailbox command */ 8121 rc = lpfc_create_bootstrap_mbox(phba); 8122 if (unlikely(rc)) 8123 goto out_free_mem; 8124 8125 /* Set up the host's endian order with the device. */ 8126 rc = lpfc_setup_endian_order(phba); 8127 if (unlikely(rc)) 8128 goto out_free_bsmbx; 8129 8130 /* Set up the hba's configuration parameters. */ 8131 rc = lpfc_sli4_read_config(phba); 8132 if (unlikely(rc)) 8133 goto out_free_bsmbx; 8134 8135 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) { 8136 /* Right now the link is down, if FA-PWWN is configured the 8137 * firmware will try FLOGI before the driver gets a link up. 8138 * If it fails, the driver should get a MISCONFIGURED async 8139 * event which will clear this flag. The only notification 8140 * the driver gets is if it fails, if it succeeds there is no 8141 * notification given. Assume success. 8142 */ 8143 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC; 8144 } 8145 8146 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); 8147 if (unlikely(rc)) 8148 goto out_free_bsmbx; 8149 8150 /* IF Type 0 ports get initialized now. */ 8151 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 8152 LPFC_SLI_INTF_IF_TYPE_0) { 8153 rc = lpfc_pci_function_reset(phba); 8154 if (unlikely(rc)) 8155 goto out_free_bsmbx; 8156 } 8157 8158 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 8159 GFP_KERNEL); 8160 if (!mboxq) { 8161 rc = -ENOMEM; 8162 goto out_free_bsmbx; 8163 } 8164 8165 /* Check for NVMET being configured */ 8166 phba->nvmet_support = 0; 8167 if (lpfc_enable_nvmet_cnt) { 8168 8169 /* First get WWN of HBA instance */ 8170 lpfc_read_nv(phba, mboxq); 8171 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 8172 if (rc != MBX_SUCCESS) { 8173 lpfc_printf_log(phba, KERN_ERR, 8174 LOG_TRACE_EVENT, 8175 "6016 Mailbox failed , mbxCmd x%x " 8176 "READ_NV, mbxStatus x%x\n", 8177 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 8178 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 8179 mempool_free(mboxq, phba->mbox_mem_pool); 8180 rc = -EIO; 8181 goto out_free_bsmbx; 8182 } 8183 mb = &mboxq->u.mb; 8184 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, 8185 sizeof(uint64_t)); 8186 wwn = cpu_to_be64(wwn); 8187 phba->sli4_hba.wwnn.u.name = wwn; 8188 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, 8189 sizeof(uint64_t)); 8190 /* wwn is WWPN of HBA instance */ 8191 wwn = cpu_to_be64(wwn); 8192 phba->sli4_hba.wwpn.u.name = wwn; 8193 8194 /* Check to see if it matches any module parameter */ 8195 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { 8196 if (wwn == lpfc_enable_nvmet[i]) { 8197 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) 8198 if (lpfc_nvmet_mem_alloc(phba)) 8199 break; 8200 8201 phba->nvmet_support = 1; /* a match */ 8202 8203 lpfc_printf_log(phba, KERN_ERR, 8204 LOG_TRACE_EVENT, 8205 "6017 NVME Target %016llx\n", 8206 wwn); 8207 #else 8208 lpfc_printf_log(phba, KERN_ERR, 8209 LOG_TRACE_EVENT, 8210 "6021 Can't enable NVME Target." 8211 " NVME_TARGET_FC infrastructure" 8212 " is not in kernel\n"); 8213 #endif 8214 /* Not supported for NVMET */ 8215 phba->cfg_xri_rebalancing = 0; 8216 if (phba->irq_chann_mode == NHT_MODE) { 8217 phba->cfg_irq_chann = 8218 phba->sli4_hba.num_present_cpu; 8219 phba->cfg_hdw_queue = 8220 phba->sli4_hba.num_present_cpu; 8221 phba->irq_chann_mode = NORMAL_MODE; 8222 } 8223 break; 8224 } 8225 } 8226 } 8227 8228 lpfc_nvme_mod_param_dep(phba); 8229 8230 /* 8231 * Get sli4 parameters that override parameters from Port capabilities. 8232 * If this call fails, it isn't critical unless the SLI4 parameters come 8233 * back in conflict. 8234 */ 8235 rc = lpfc_get_sli4_parameters(phba, mboxq); 8236 if (rc) { 8237 if_type = bf_get(lpfc_sli_intf_if_type, 8238 &phba->sli4_hba.sli_intf); 8239 if_fam = bf_get(lpfc_sli_intf_sli_family, 8240 &phba->sli4_hba.sli_intf); 8241 if (phba->sli4_hba.extents_in_use && 8242 phba->sli4_hba.rpi_hdrs_in_use) { 8243 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8244 "2999 Unsupported SLI4 Parameters " 8245 "Extents and RPI headers enabled.\n"); 8246 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8247 if_fam == LPFC_SLI_INTF_FAMILY_BE2) { 8248 mempool_free(mboxq, phba->mbox_mem_pool); 8249 rc = -EIO; 8250 goto out_free_bsmbx; 8251 } 8252 } 8253 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8254 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { 8255 mempool_free(mboxq, phba->mbox_mem_pool); 8256 rc = -EIO; 8257 goto out_free_bsmbx; 8258 } 8259 } 8260 8261 /* 8262 * 1 for cmd, 1 for rsp, NVME adds an extra one 8263 * for boundary conditions in its max_sgl_segment template. 8264 */ 8265 extra = 2; 8266 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 8267 extra++; 8268 8269 /* 8270 * It doesn't matter what family our adapter is in, we are 8271 * limited to 2 Pages, 512 SGEs, for our SGL. 8272 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 8273 */ 8274 max_buf_size = (2 * SLI4_PAGE_SIZE); 8275 8276 /* 8277 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 8278 * used to create the sg_dma_buf_pool must be calculated. 8279 */ 8280 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 8281 /* Both cfg_enable_bg and cfg_external_dif code paths */ 8282 8283 /* 8284 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 8285 * the FCP rsp, and a SGE. Sice we have no control 8286 * over how many protection segments the SCSI Layer 8287 * will hand us (ie: there could be one for every block 8288 * in the IO), just allocate enough SGEs to accomidate 8289 * our max amount and we need to limit lpfc_sg_seg_cnt 8290 * to minimize the risk of running out. 8291 */ 8292 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8293 sizeof(struct fcp_rsp) + max_buf_size; 8294 8295 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 8296 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 8297 8298 /* 8299 * If supporting DIF, reduce the seg count for scsi to 8300 * allow room for the DIF sges. 8301 */ 8302 if (phba->cfg_enable_bg && 8303 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 8304 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 8305 else 8306 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8307 8308 } else { 8309 /* 8310 * The scsi_buf for a regular I/O holds the FCP cmnd, 8311 * the FCP rsp, a SGE for each, and a SGE for up to 8312 * cfg_sg_seg_cnt data segments. 8313 */ 8314 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8315 sizeof(struct fcp_rsp) + 8316 ((phba->cfg_sg_seg_cnt + extra) * 8317 sizeof(struct sli4_sge)); 8318 8319 /* Total SGEs for scsi_sg_list */ 8320 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 8321 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8322 8323 /* 8324 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 8325 * need to post 1 page for the SGL. 8326 */ 8327 } 8328 8329 if (phba->cfg_xpsgl && !phba->nvmet_support) 8330 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; 8331 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 8332 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 8333 else 8334 phba->cfg_sg_dma_buf_size = 8335 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 8336 8337 phba->border_sge_num = phba->cfg_sg_dma_buf_size / 8338 sizeof(struct sli4_sge); 8339 8340 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 8341 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8342 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 8343 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 8344 "6300 Reducing NVME sg segment " 8345 "cnt to %d\n", 8346 LPFC_MAX_NVME_SEG_CNT); 8347 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 8348 } else 8349 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 8350 } 8351 8352 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 8353 "9087 sg_seg_cnt:%d dmabuf_size:%d " 8354 "total:%d scsi:%d nvme:%d\n", 8355 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 8356 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 8357 phba->cfg_nvme_seg_cnt); 8358 8359 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 8360 i = phba->cfg_sg_dma_buf_size; 8361 else 8362 i = SLI4_PAGE_SIZE; 8363 8364 phba->lpfc_sg_dma_buf_pool = 8365 dma_pool_create("lpfc_sg_dma_buf_pool", 8366 &phba->pcidev->dev, 8367 phba->cfg_sg_dma_buf_size, 8368 i, 0); 8369 if (!phba->lpfc_sg_dma_buf_pool) { 8370 rc = -ENOMEM; 8371 goto out_free_bsmbx; 8372 } 8373 8374 phba->lpfc_cmd_rsp_buf_pool = 8375 dma_pool_create("lpfc_cmd_rsp_buf_pool", 8376 &phba->pcidev->dev, 8377 sizeof(struct fcp_cmnd) + 8378 sizeof(struct fcp_rsp), 8379 i, 0); 8380 if (!phba->lpfc_cmd_rsp_buf_pool) { 8381 rc = -ENOMEM; 8382 goto out_free_sg_dma_buf; 8383 } 8384 8385 mempool_free(mboxq, phba->mbox_mem_pool); 8386 8387 /* Verify OAS is supported */ 8388 lpfc_sli4_oas_verify(phba); 8389 8390 /* Verify RAS support on adapter */ 8391 lpfc_sli4_ras_init(phba); 8392 8393 /* Verify all the SLI4 queues */ 8394 rc = lpfc_sli4_queue_verify(phba); 8395 if (rc) 8396 goto out_free_cmd_rsp_buf; 8397 8398 /* Create driver internal CQE event pool */ 8399 rc = lpfc_sli4_cq_event_pool_create(phba); 8400 if (rc) 8401 goto out_free_cmd_rsp_buf; 8402 8403 /* Initialize sgl lists per host */ 8404 lpfc_init_sgl_list(phba); 8405 8406 /* Allocate and initialize active sgl array */ 8407 rc = lpfc_init_active_sgl_array(phba); 8408 if (rc) { 8409 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8410 "1430 Failed to initialize sgl list.\n"); 8411 goto out_destroy_cq_event_pool; 8412 } 8413 rc = lpfc_sli4_init_rpi_hdrs(phba); 8414 if (rc) { 8415 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8416 "1432 Failed to initialize rpi headers.\n"); 8417 goto out_free_active_sgl; 8418 } 8419 8420 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ 8421 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; 8422 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), 8423 GFP_KERNEL); 8424 if (!phba->fcf.fcf_rr_bmask) { 8425 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8426 "2759 Failed allocate memory for FCF round " 8427 "robin failover bmask\n"); 8428 rc = -ENOMEM; 8429 goto out_remove_rpi_hdrs; 8430 } 8431 8432 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, 8433 sizeof(struct lpfc_hba_eq_hdl), 8434 GFP_KERNEL); 8435 if (!phba->sli4_hba.hba_eq_hdl) { 8436 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8437 "2572 Failed allocate memory for " 8438 "fast-path per-EQ handle array\n"); 8439 rc = -ENOMEM; 8440 goto out_free_fcf_rr_bmask; 8441 } 8442 8443 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, 8444 sizeof(struct lpfc_vector_map_info), 8445 GFP_KERNEL); 8446 if (!phba->sli4_hba.cpu_map) { 8447 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8448 "3327 Failed allocate memory for msi-x " 8449 "interrupt vector mapping\n"); 8450 rc = -ENOMEM; 8451 goto out_free_hba_eq_hdl; 8452 } 8453 8454 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); 8455 if (!phba->sli4_hba.eq_info) { 8456 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8457 "3321 Failed allocation for per_cpu stats\n"); 8458 rc = -ENOMEM; 8459 goto out_free_hba_cpu_map; 8460 } 8461 8462 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, 8463 sizeof(*phba->sli4_hba.idle_stat), 8464 GFP_KERNEL); 8465 if (!phba->sli4_hba.idle_stat) { 8466 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8467 "3390 Failed allocation for idle_stat\n"); 8468 rc = -ENOMEM; 8469 goto out_free_hba_eq_info; 8470 } 8471 8472 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8473 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); 8474 if (!phba->sli4_hba.c_stat) { 8475 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8476 "3332 Failed allocating per cpu hdwq stats\n"); 8477 rc = -ENOMEM; 8478 goto out_free_hba_idle_stat; 8479 } 8480 #endif 8481 8482 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat); 8483 if (!phba->cmf_stat) { 8484 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8485 "3331 Failed allocating per cpu cgn stats\n"); 8486 rc = -ENOMEM; 8487 goto out_free_hba_hdwq_info; 8488 } 8489 8490 /* 8491 * Enable sr-iov virtual functions if supported and configured 8492 * through the module parameter. 8493 */ 8494 if (phba->cfg_sriov_nr_virtfn > 0) { 8495 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 8496 phba->cfg_sriov_nr_virtfn); 8497 if (rc) { 8498 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 8499 "3020 Requested number of SR-IOV " 8500 "virtual functions (%d) is not " 8501 "supported\n", 8502 phba->cfg_sriov_nr_virtfn); 8503 phba->cfg_sriov_nr_virtfn = 0; 8504 } 8505 } 8506 8507 return 0; 8508 8509 out_free_hba_hdwq_info: 8510 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8511 free_percpu(phba->sli4_hba.c_stat); 8512 out_free_hba_idle_stat: 8513 #endif 8514 kfree(phba->sli4_hba.idle_stat); 8515 out_free_hba_eq_info: 8516 free_percpu(phba->sli4_hba.eq_info); 8517 out_free_hba_cpu_map: 8518 kfree(phba->sli4_hba.cpu_map); 8519 out_free_hba_eq_hdl: 8520 kfree(phba->sli4_hba.hba_eq_hdl); 8521 out_free_fcf_rr_bmask: 8522 kfree(phba->fcf.fcf_rr_bmask); 8523 out_remove_rpi_hdrs: 8524 lpfc_sli4_remove_rpi_hdrs(phba); 8525 out_free_active_sgl: 8526 lpfc_free_active_sgl(phba); 8527 out_destroy_cq_event_pool: 8528 lpfc_sli4_cq_event_pool_destroy(phba); 8529 out_free_cmd_rsp_buf: 8530 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 8531 phba->lpfc_cmd_rsp_buf_pool = NULL; 8532 out_free_sg_dma_buf: 8533 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 8534 phba->lpfc_sg_dma_buf_pool = NULL; 8535 out_free_bsmbx: 8536 lpfc_destroy_bootstrap_mbox(phba); 8537 out_free_mem: 8538 lpfc_mem_free(phba); 8539 out_destroy_workqueue: 8540 destroy_workqueue(phba->wq); 8541 phba->wq = NULL; 8542 return rc; 8543 } 8544 8545 /** 8546 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev 8547 * @phba: pointer to lpfc hba data structure. 8548 * 8549 * This routine is invoked to unset the driver internal resources set up 8550 * specific for supporting the SLI-4 HBA device it attached to. 8551 **/ 8552 static void 8553 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) 8554 { 8555 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; 8556 8557 free_percpu(phba->sli4_hba.eq_info); 8558 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8559 free_percpu(phba->sli4_hba.c_stat); 8560 #endif 8561 free_percpu(phba->cmf_stat); 8562 kfree(phba->sli4_hba.idle_stat); 8563 8564 /* Free memory allocated for msi-x interrupt vector to CPU mapping */ 8565 kfree(phba->sli4_hba.cpu_map); 8566 phba->sli4_hba.num_possible_cpu = 0; 8567 phba->sli4_hba.num_present_cpu = 0; 8568 phba->sli4_hba.curr_disp_cpu = 0; 8569 cpumask_clear(&phba->sli4_hba.irq_aff_mask); 8570 8571 /* Free memory allocated for fast-path work queue handles */ 8572 kfree(phba->sli4_hba.hba_eq_hdl); 8573 8574 /* Free the allocated rpi headers. */ 8575 lpfc_sli4_remove_rpi_hdrs(phba); 8576 lpfc_sli4_remove_rpis(phba); 8577 8578 /* Free eligible FCF index bmask */ 8579 kfree(phba->fcf.fcf_rr_bmask); 8580 8581 /* Free the ELS sgl list */ 8582 lpfc_free_active_sgl(phba); 8583 lpfc_free_els_sgl_list(phba); 8584 lpfc_free_nvmet_sgl_list(phba); 8585 8586 /* Free the completion queue EQ event pool */ 8587 lpfc_sli4_cq_event_release_all(phba); 8588 lpfc_sli4_cq_event_pool_destroy(phba); 8589 8590 /* Release resource identifiers. */ 8591 lpfc_sli4_dealloc_resource_identifiers(phba); 8592 8593 /* Free the bsmbx region. */ 8594 lpfc_destroy_bootstrap_mbox(phba); 8595 8596 /* Free the SLI Layer memory with SLI4 HBAs */ 8597 lpfc_mem_free_all(phba); 8598 8599 /* Free the current connect table */ 8600 list_for_each_entry_safe(conn_entry, next_conn_entry, 8601 &phba->fcf_conn_rec_list, list) { 8602 list_del_init(&conn_entry->list); 8603 kfree(conn_entry); 8604 } 8605 8606 return; 8607 } 8608 8609 /** 8610 * lpfc_init_api_table_setup - Set up init api function jump table 8611 * @phba: The hba struct for which this call is being executed. 8612 * @dev_grp: The HBA PCI-Device group number. 8613 * 8614 * This routine sets up the device INIT interface API function jump table 8615 * in @phba struct. 8616 * 8617 * Returns: 0 - success, -ENODEV - failure. 8618 **/ 8619 int 8620 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 8621 { 8622 phba->lpfc_hba_init_link = lpfc_hba_init_link; 8623 phba->lpfc_hba_down_link = lpfc_hba_down_link; 8624 phba->lpfc_selective_reset = lpfc_selective_reset; 8625 switch (dev_grp) { 8626 case LPFC_PCI_DEV_LP: 8627 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; 8628 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; 8629 phba->lpfc_stop_port = lpfc_stop_port_s3; 8630 break; 8631 case LPFC_PCI_DEV_OC: 8632 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; 8633 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; 8634 phba->lpfc_stop_port = lpfc_stop_port_s4; 8635 break; 8636 default: 8637 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8638 "1431 Invalid HBA PCI-device group: 0x%x\n", 8639 dev_grp); 8640 return -ENODEV; 8641 } 8642 return 0; 8643 } 8644 8645 /** 8646 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. 8647 * @phba: pointer to lpfc hba data structure. 8648 * 8649 * This routine is invoked to set up the driver internal resources after the 8650 * device specific resource setup to support the HBA device it attached to. 8651 * 8652 * Return codes 8653 * 0 - successful 8654 * other values - error 8655 **/ 8656 static int 8657 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) 8658 { 8659 int error; 8660 8661 /* Startup the kernel thread for this host adapter. */ 8662 phba->worker_thread = kthread_run(lpfc_do_work, phba, 8663 "lpfc_worker_%d", phba->brd_no); 8664 if (IS_ERR(phba->worker_thread)) { 8665 error = PTR_ERR(phba->worker_thread); 8666 return error; 8667 } 8668 8669 return 0; 8670 } 8671 8672 /** 8673 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. 8674 * @phba: pointer to lpfc hba data structure. 8675 * 8676 * This routine is invoked to unset the driver internal resources set up after 8677 * the device specific resource setup for supporting the HBA device it 8678 * attached to. 8679 **/ 8680 static void 8681 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) 8682 { 8683 if (phba->wq) { 8684 destroy_workqueue(phba->wq); 8685 phba->wq = NULL; 8686 } 8687 8688 /* Stop kernel worker thread */ 8689 if (phba->worker_thread) 8690 kthread_stop(phba->worker_thread); 8691 } 8692 8693 /** 8694 * lpfc_free_iocb_list - Free iocb list. 8695 * @phba: pointer to lpfc hba data structure. 8696 * 8697 * This routine is invoked to free the driver's IOCB list and memory. 8698 **/ 8699 void 8700 lpfc_free_iocb_list(struct lpfc_hba *phba) 8701 { 8702 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 8703 8704 spin_lock_irq(&phba->hbalock); 8705 list_for_each_entry_safe(iocbq_entry, iocbq_next, 8706 &phba->lpfc_iocb_list, list) { 8707 list_del(&iocbq_entry->list); 8708 kfree(iocbq_entry); 8709 phba->total_iocbq_bufs--; 8710 } 8711 spin_unlock_irq(&phba->hbalock); 8712 8713 return; 8714 } 8715 8716 /** 8717 * lpfc_init_iocb_list - Allocate and initialize iocb list. 8718 * @phba: pointer to lpfc hba data structure. 8719 * @iocb_count: number of requested iocbs 8720 * 8721 * This routine is invoked to allocate and initizlize the driver's IOCB 8722 * list and set up the IOCB tag array accordingly. 8723 * 8724 * Return codes 8725 * 0 - successful 8726 * other values - error 8727 **/ 8728 int 8729 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) 8730 { 8731 struct lpfc_iocbq *iocbq_entry = NULL; 8732 uint16_t iotag; 8733 int i; 8734 8735 /* Initialize and populate the iocb list per host. */ 8736 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 8737 for (i = 0; i < iocb_count; i++) { 8738 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 8739 if (iocbq_entry == NULL) { 8740 printk(KERN_ERR "%s: only allocated %d iocbs of " 8741 "expected %d count. Unloading driver.\n", 8742 __func__, i, iocb_count); 8743 goto out_free_iocbq; 8744 } 8745 8746 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 8747 if (iotag == 0) { 8748 kfree(iocbq_entry); 8749 printk(KERN_ERR "%s: failed to allocate IOTAG. " 8750 "Unloading driver.\n", __func__); 8751 goto out_free_iocbq; 8752 } 8753 iocbq_entry->sli4_lxritag = NO_XRI; 8754 iocbq_entry->sli4_xritag = NO_XRI; 8755 8756 spin_lock_irq(&phba->hbalock); 8757 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 8758 phba->total_iocbq_bufs++; 8759 spin_unlock_irq(&phba->hbalock); 8760 } 8761 8762 return 0; 8763 8764 out_free_iocbq: 8765 lpfc_free_iocb_list(phba); 8766 8767 return -ENOMEM; 8768 } 8769 8770 /** 8771 * lpfc_free_sgl_list - Free a given sgl list. 8772 * @phba: pointer to lpfc hba data structure. 8773 * @sglq_list: pointer to the head of sgl list. 8774 * 8775 * This routine is invoked to free a give sgl list and memory. 8776 **/ 8777 void 8778 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) 8779 { 8780 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8781 8782 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { 8783 list_del(&sglq_entry->list); 8784 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); 8785 kfree(sglq_entry); 8786 } 8787 } 8788 8789 /** 8790 * lpfc_free_els_sgl_list - Free els sgl list. 8791 * @phba: pointer to lpfc hba data structure. 8792 * 8793 * This routine is invoked to free the driver's els sgl list and memory. 8794 **/ 8795 static void 8796 lpfc_free_els_sgl_list(struct lpfc_hba *phba) 8797 { 8798 LIST_HEAD(sglq_list); 8799 8800 /* Retrieve all els sgls from driver list */ 8801 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 8802 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); 8803 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 8804 8805 /* Now free the sgl list */ 8806 lpfc_free_sgl_list(phba, &sglq_list); 8807 } 8808 8809 /** 8810 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. 8811 * @phba: pointer to lpfc hba data structure. 8812 * 8813 * This routine is invoked to free the driver's nvmet sgl list and memory. 8814 **/ 8815 static void 8816 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) 8817 { 8818 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8819 LIST_HEAD(sglq_list); 8820 8821 /* Retrieve all nvmet sgls from driver list */ 8822 spin_lock_irq(&phba->hbalock); 8823 spin_lock(&phba->sli4_hba.sgl_list_lock); 8824 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); 8825 spin_unlock(&phba->sli4_hba.sgl_list_lock); 8826 spin_unlock_irq(&phba->hbalock); 8827 8828 /* Now free the sgl list */ 8829 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { 8830 list_del(&sglq_entry->list); 8831 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); 8832 kfree(sglq_entry); 8833 } 8834 8835 /* Update the nvmet_xri_cnt to reflect no current sgls. 8836 * The next initialization cycle sets the count and allocates 8837 * the sgls over again. 8838 */ 8839 phba->sli4_hba.nvmet_xri_cnt = 0; 8840 } 8841 8842 /** 8843 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. 8844 * @phba: pointer to lpfc hba data structure. 8845 * 8846 * This routine is invoked to allocate the driver's active sgl memory. 8847 * This array will hold the sglq_entry's for active IOs. 8848 **/ 8849 static int 8850 lpfc_init_active_sgl_array(struct lpfc_hba *phba) 8851 { 8852 int size; 8853 size = sizeof(struct lpfc_sglq *); 8854 size *= phba->sli4_hba.max_cfg_param.max_xri; 8855 8856 phba->sli4_hba.lpfc_sglq_active_list = 8857 kzalloc(size, GFP_KERNEL); 8858 if (!phba->sli4_hba.lpfc_sglq_active_list) 8859 return -ENOMEM; 8860 return 0; 8861 } 8862 8863 /** 8864 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. 8865 * @phba: pointer to lpfc hba data structure. 8866 * 8867 * This routine is invoked to walk through the array of active sglq entries 8868 * and free all of the resources. 8869 * This is just a place holder for now. 8870 **/ 8871 static void 8872 lpfc_free_active_sgl(struct lpfc_hba *phba) 8873 { 8874 kfree(phba->sli4_hba.lpfc_sglq_active_list); 8875 } 8876 8877 /** 8878 * lpfc_init_sgl_list - Allocate and initialize sgl list. 8879 * @phba: pointer to lpfc hba data structure. 8880 * 8881 * This routine is invoked to allocate and initizlize the driver's sgl 8882 * list and set up the sgl xritag tag array accordingly. 8883 * 8884 **/ 8885 static void 8886 lpfc_init_sgl_list(struct lpfc_hba *phba) 8887 { 8888 /* Initialize and populate the sglq list per host/VF. */ 8889 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); 8890 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); 8891 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); 8892 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8893 8894 /* els xri-sgl book keeping */ 8895 phba->sli4_hba.els_xri_cnt = 0; 8896 8897 /* nvme xri-buffer book keeping */ 8898 phba->sli4_hba.io_xri_cnt = 0; 8899 } 8900 8901 /** 8902 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port 8903 * @phba: pointer to lpfc hba data structure. 8904 * 8905 * This routine is invoked to post rpi header templates to the 8906 * port for those SLI4 ports that do not support extents. This routine 8907 * posts a PAGE_SIZE memory region to the port to hold up to 8908 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine 8909 * and should be called only when interrupts are disabled. 8910 * 8911 * Return codes 8912 * 0 - successful 8913 * -ERROR - otherwise. 8914 **/ 8915 int 8916 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) 8917 { 8918 int rc = 0; 8919 struct lpfc_rpi_hdr *rpi_hdr; 8920 8921 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); 8922 if (!phba->sli4_hba.rpi_hdrs_in_use) 8923 return rc; 8924 if (phba->sli4_hba.extents_in_use) 8925 return -EIO; 8926 8927 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); 8928 if (!rpi_hdr) { 8929 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8930 "0391 Error during rpi post operation\n"); 8931 lpfc_sli4_remove_rpis(phba); 8932 rc = -ENODEV; 8933 } 8934 8935 return rc; 8936 } 8937 8938 /** 8939 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region 8940 * @phba: pointer to lpfc hba data structure. 8941 * 8942 * This routine is invoked to allocate a single 4KB memory region to 8943 * support rpis and stores them in the phba. This single region 8944 * provides support for up to 64 rpis. The region is used globally 8945 * by the device. 8946 * 8947 * Returns: 8948 * A valid rpi hdr on success. 8949 * A NULL pointer on any failure. 8950 **/ 8951 struct lpfc_rpi_hdr * 8952 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) 8953 { 8954 uint16_t rpi_limit, curr_rpi_range; 8955 struct lpfc_dmabuf *dmabuf; 8956 struct lpfc_rpi_hdr *rpi_hdr; 8957 8958 /* 8959 * If the SLI4 port supports extents, posting the rpi header isn't 8960 * required. Set the expected maximum count and let the actual value 8961 * get set when extents are fully allocated. 8962 */ 8963 if (!phba->sli4_hba.rpi_hdrs_in_use) 8964 return NULL; 8965 if (phba->sli4_hba.extents_in_use) 8966 return NULL; 8967 8968 /* The limit on the logical index is just the max_rpi count. */ 8969 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; 8970 8971 spin_lock_irq(&phba->hbalock); 8972 /* 8973 * Establish the starting RPI in this header block. The starting 8974 * rpi is normalized to a zero base because the physical rpi is 8975 * port based. 8976 */ 8977 curr_rpi_range = phba->sli4_hba.next_rpi; 8978 spin_unlock_irq(&phba->hbalock); 8979 8980 /* Reached full RPI range */ 8981 if (curr_rpi_range == rpi_limit) 8982 return NULL; 8983 8984 /* 8985 * First allocate the protocol header region for the port. The 8986 * port expects a 4KB DMA-mapped memory region that is 4K aligned. 8987 */ 8988 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 8989 if (!dmabuf) 8990 return NULL; 8991 8992 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 8993 LPFC_HDR_TEMPLATE_SIZE, 8994 &dmabuf->phys, GFP_KERNEL); 8995 if (!dmabuf->virt) { 8996 rpi_hdr = NULL; 8997 goto err_free_dmabuf; 8998 } 8999 9000 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { 9001 rpi_hdr = NULL; 9002 goto err_free_coherent; 9003 } 9004 9005 /* Save the rpi header data for cleanup later. */ 9006 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); 9007 if (!rpi_hdr) 9008 goto err_free_coherent; 9009 9010 rpi_hdr->dmabuf = dmabuf; 9011 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; 9012 rpi_hdr->page_count = 1; 9013 spin_lock_irq(&phba->hbalock); 9014 9015 /* The rpi_hdr stores the logical index only. */ 9016 rpi_hdr->start_rpi = curr_rpi_range; 9017 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; 9018 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); 9019 9020 spin_unlock_irq(&phba->hbalock); 9021 return rpi_hdr; 9022 9023 err_free_coherent: 9024 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, 9025 dmabuf->virt, dmabuf->phys); 9026 err_free_dmabuf: 9027 kfree(dmabuf); 9028 return NULL; 9029 } 9030 9031 /** 9032 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions 9033 * @phba: pointer to lpfc hba data structure. 9034 * 9035 * This routine is invoked to remove all memory resources allocated 9036 * to support rpis for SLI4 ports not supporting extents. This routine 9037 * presumes the caller has released all rpis consumed by fabric or port 9038 * logins and is prepared to have the header pages removed. 9039 **/ 9040 void 9041 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) 9042 { 9043 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; 9044 9045 if (!phba->sli4_hba.rpi_hdrs_in_use) 9046 goto exit; 9047 9048 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, 9049 &phba->sli4_hba.lpfc_rpi_hdr_list, list) { 9050 list_del(&rpi_hdr->list); 9051 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, 9052 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); 9053 kfree(rpi_hdr->dmabuf); 9054 kfree(rpi_hdr); 9055 } 9056 exit: 9057 /* There are no rpis available to the port now. */ 9058 phba->sli4_hba.next_rpi = 0; 9059 } 9060 9061 /** 9062 * lpfc_hba_alloc - Allocate driver hba data structure for a device. 9063 * @pdev: pointer to pci device data structure. 9064 * 9065 * This routine is invoked to allocate the driver hba data structure for an 9066 * HBA device. If the allocation is successful, the phba reference to the 9067 * PCI device data structure is set. 9068 * 9069 * Return codes 9070 * pointer to @phba - successful 9071 * NULL - error 9072 **/ 9073 static struct lpfc_hba * 9074 lpfc_hba_alloc(struct pci_dev *pdev) 9075 { 9076 struct lpfc_hba *phba; 9077 9078 /* Allocate memory for HBA structure */ 9079 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); 9080 if (!phba) { 9081 dev_err(&pdev->dev, "failed to allocate hba struct\n"); 9082 return NULL; 9083 } 9084 9085 /* Set reference to PCI device in HBA structure */ 9086 phba->pcidev = pdev; 9087 9088 /* Assign an unused board number */ 9089 phba->brd_no = lpfc_get_instance(); 9090 if (phba->brd_no < 0) { 9091 kfree(phba); 9092 return NULL; 9093 } 9094 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; 9095 9096 spin_lock_init(&phba->ct_ev_lock); 9097 INIT_LIST_HEAD(&phba->ct_ev_waiters); 9098 9099 return phba; 9100 } 9101 9102 /** 9103 * lpfc_hba_free - Free driver hba data structure with a device. 9104 * @phba: pointer to lpfc hba data structure. 9105 * 9106 * This routine is invoked to free the driver hba data structure with an 9107 * HBA device. 9108 **/ 9109 static void 9110 lpfc_hba_free(struct lpfc_hba *phba) 9111 { 9112 if (phba->sli_rev == LPFC_SLI_REV4) 9113 kfree(phba->sli4_hba.hdwq); 9114 9115 /* Release the driver assigned board number */ 9116 idr_remove(&lpfc_hba_index, phba->brd_no); 9117 9118 /* Free memory allocated with sli3 rings */ 9119 kfree(phba->sli.sli3_ring); 9120 phba->sli.sli3_ring = NULL; 9121 9122 kfree(phba); 9123 return; 9124 } 9125 9126 /** 9127 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes 9128 * @vport: pointer to lpfc vport data structure. 9129 * 9130 * This routine is will setup initial FDMI attribute masks for 9131 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt 9132 * to get these attributes first before falling back, the attribute 9133 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1 9134 **/ 9135 void 9136 lpfc_setup_fdmi_mask(struct lpfc_vport *vport) 9137 { 9138 struct lpfc_hba *phba = vport->phba; 9139 9140 vport->load_flag |= FC_ALLOW_FDMI; 9141 if (phba->cfg_enable_SmartSAN || 9142 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) { 9143 /* Setup appropriate attribute masks */ 9144 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; 9145 if (phba->cfg_enable_SmartSAN) 9146 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; 9147 else 9148 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; 9149 } 9150 9151 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY, 9152 "6077 Setup FDMI mask: hba x%x port x%x\n", 9153 vport->fdmi_hba_mask, vport->fdmi_port_mask); 9154 } 9155 9156 /** 9157 * lpfc_create_shost - Create hba physical port with associated scsi host. 9158 * @phba: pointer to lpfc hba data structure. 9159 * 9160 * This routine is invoked to create HBA physical port and associate a SCSI 9161 * host with it. 9162 * 9163 * Return codes 9164 * 0 - successful 9165 * other values - error 9166 **/ 9167 static int 9168 lpfc_create_shost(struct lpfc_hba *phba) 9169 { 9170 struct lpfc_vport *vport; 9171 struct Scsi_Host *shost; 9172 9173 /* Initialize HBA FC structure */ 9174 phba->fc_edtov = FF_DEF_EDTOV; 9175 phba->fc_ratov = FF_DEF_RATOV; 9176 phba->fc_altov = FF_DEF_ALTOV; 9177 phba->fc_arbtov = FF_DEF_ARBTOV; 9178 9179 atomic_set(&phba->sdev_cnt, 0); 9180 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); 9181 if (!vport) 9182 return -ENODEV; 9183 9184 shost = lpfc_shost_from_vport(vport); 9185 phba->pport = vport; 9186 9187 if (phba->nvmet_support) { 9188 /* Only 1 vport (pport) will support NVME target */ 9189 phba->targetport = NULL; 9190 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; 9191 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, 9192 "6076 NVME Target Found\n"); 9193 } 9194 9195 lpfc_debugfs_initialize(vport); 9196 /* Put reference to SCSI host to driver's device private data */ 9197 pci_set_drvdata(phba->pcidev, shost); 9198 9199 lpfc_setup_fdmi_mask(vport); 9200 9201 /* 9202 * At this point we are fully registered with PSA. In addition, 9203 * any initial discovery should be completed. 9204 */ 9205 return 0; 9206 } 9207 9208 /** 9209 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. 9210 * @phba: pointer to lpfc hba data structure. 9211 * 9212 * This routine is invoked to destroy HBA physical port and the associated 9213 * SCSI host. 9214 **/ 9215 static void 9216 lpfc_destroy_shost(struct lpfc_hba *phba) 9217 { 9218 struct lpfc_vport *vport = phba->pport; 9219 9220 /* Destroy physical port that associated with the SCSI host */ 9221 destroy_port(vport); 9222 9223 return; 9224 } 9225 9226 /** 9227 * lpfc_setup_bg - Setup Block guard structures and debug areas. 9228 * @phba: pointer to lpfc hba data structure. 9229 * @shost: the shost to be used to detect Block guard settings. 9230 * 9231 * This routine sets up the local Block guard protocol settings for @shost. 9232 * This routine also allocates memory for debugging bg buffers. 9233 **/ 9234 static void 9235 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) 9236 { 9237 uint32_t old_mask; 9238 uint32_t old_guard; 9239 9240 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9241 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9242 "1478 Registering BlockGuard with the " 9243 "SCSI layer\n"); 9244 9245 old_mask = phba->cfg_prot_mask; 9246 old_guard = phba->cfg_prot_guard; 9247 9248 /* Only allow supported values */ 9249 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | 9250 SHOST_DIX_TYPE0_PROTECTION | 9251 SHOST_DIX_TYPE1_PROTECTION); 9252 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | 9253 SHOST_DIX_GUARD_CRC); 9254 9255 /* DIF Type 1 protection for profiles AST1/C1 is end to end */ 9256 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) 9257 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; 9258 9259 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9260 if ((old_mask != phba->cfg_prot_mask) || 9261 (old_guard != phba->cfg_prot_guard)) 9262 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9263 "1475 Registering BlockGuard with the " 9264 "SCSI layer: mask %d guard %d\n", 9265 phba->cfg_prot_mask, 9266 phba->cfg_prot_guard); 9267 9268 scsi_host_set_prot(shost, phba->cfg_prot_mask); 9269 scsi_host_set_guard(shost, phba->cfg_prot_guard); 9270 } else 9271 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9272 "1479 Not Registering BlockGuard with the SCSI " 9273 "layer, Bad protection parameters: %d %d\n", 9274 old_mask, old_guard); 9275 } 9276 } 9277 9278 /** 9279 * lpfc_post_init_setup - Perform necessary device post initialization setup. 9280 * @phba: pointer to lpfc hba data structure. 9281 * 9282 * This routine is invoked to perform all the necessary post initialization 9283 * setup for the device. 9284 **/ 9285 static void 9286 lpfc_post_init_setup(struct lpfc_hba *phba) 9287 { 9288 struct Scsi_Host *shost; 9289 struct lpfc_adapter_event_header adapter_event; 9290 9291 /* Get the default values for Model Name and Description */ 9292 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 9293 9294 /* 9295 * hba setup may have changed the hba_queue_depth so we need to 9296 * adjust the value of can_queue. 9297 */ 9298 shost = pci_get_drvdata(phba->pcidev); 9299 shost->can_queue = phba->cfg_hba_queue_depth - 10; 9300 9301 lpfc_host_attrib_init(shost); 9302 9303 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 9304 spin_lock_irq(shost->host_lock); 9305 lpfc_poll_start_timer(phba); 9306 spin_unlock_irq(shost->host_lock); 9307 } 9308 9309 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9310 "0428 Perform SCSI scan\n"); 9311 /* Send board arrival event to upper layer */ 9312 adapter_event.event_type = FC_REG_ADAPTER_EVENT; 9313 adapter_event.subcategory = LPFC_EVENT_ARRIVAL; 9314 fc_host_post_vendor_event(shost, fc_get_event_number(), 9315 sizeof(adapter_event), 9316 (char *) &adapter_event, 9317 LPFC_NL_VENDOR_ID); 9318 return; 9319 } 9320 9321 /** 9322 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. 9323 * @phba: pointer to lpfc hba data structure. 9324 * 9325 * This routine is invoked to set up the PCI device memory space for device 9326 * with SLI-3 interface spec. 9327 * 9328 * Return codes 9329 * 0 - successful 9330 * other values - error 9331 **/ 9332 static int 9333 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) 9334 { 9335 struct pci_dev *pdev = phba->pcidev; 9336 unsigned long bar0map_len, bar2map_len; 9337 int i, hbq_count; 9338 void *ptr; 9339 int error; 9340 9341 if (!pdev) 9342 return -ENODEV; 9343 9344 /* Set the device DMA mask size */ 9345 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9346 if (error) 9347 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9348 if (error) 9349 return error; 9350 error = -ENODEV; 9351 9352 /* Get the bus address of Bar0 and Bar2 and the number of bytes 9353 * required by each mapping. 9354 */ 9355 phba->pci_bar0_map = pci_resource_start(pdev, 0); 9356 bar0map_len = pci_resource_len(pdev, 0); 9357 9358 phba->pci_bar2_map = pci_resource_start(pdev, 2); 9359 bar2map_len = pci_resource_len(pdev, 2); 9360 9361 /* Map HBA SLIM to a kernel virtual address. */ 9362 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 9363 if (!phba->slim_memmap_p) { 9364 dev_printk(KERN_ERR, &pdev->dev, 9365 "ioremap failed for SLIM memory.\n"); 9366 goto out; 9367 } 9368 9369 /* Map HBA Control Registers to a kernel virtual address. */ 9370 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 9371 if (!phba->ctrl_regs_memmap_p) { 9372 dev_printk(KERN_ERR, &pdev->dev, 9373 "ioremap failed for HBA control registers.\n"); 9374 goto out_iounmap_slim; 9375 } 9376 9377 /* Allocate memory for SLI-2 structures */ 9378 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9379 &phba->slim2p.phys, GFP_KERNEL); 9380 if (!phba->slim2p.virt) 9381 goto out_iounmap; 9382 9383 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); 9384 phba->mbox_ext = (phba->slim2p.virt + 9385 offsetof(struct lpfc_sli2_slim, mbx_ext_words)); 9386 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); 9387 phba->IOCBs = (phba->slim2p.virt + 9388 offsetof(struct lpfc_sli2_slim, IOCBs)); 9389 9390 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, 9391 lpfc_sli_hbq_size(), 9392 &phba->hbqslimp.phys, 9393 GFP_KERNEL); 9394 if (!phba->hbqslimp.virt) 9395 goto out_free_slim; 9396 9397 hbq_count = lpfc_sli_hbq_count(); 9398 ptr = phba->hbqslimp.virt; 9399 for (i = 0; i < hbq_count; ++i) { 9400 phba->hbqs[i].hbq_virt = ptr; 9401 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); 9402 ptr += (lpfc_hbq_defs[i]->entry_count * 9403 sizeof(struct lpfc_hbq_entry)); 9404 } 9405 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; 9406 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; 9407 9408 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); 9409 9410 phba->MBslimaddr = phba->slim_memmap_p; 9411 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 9412 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 9413 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 9414 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 9415 9416 return 0; 9417 9418 out_free_slim: 9419 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9420 phba->slim2p.virt, phba->slim2p.phys); 9421 out_iounmap: 9422 iounmap(phba->ctrl_regs_memmap_p); 9423 out_iounmap_slim: 9424 iounmap(phba->slim_memmap_p); 9425 out: 9426 return error; 9427 } 9428 9429 /** 9430 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. 9431 * @phba: pointer to lpfc hba data structure. 9432 * 9433 * This routine is invoked to unset the PCI device memory space for device 9434 * with SLI-3 interface spec. 9435 **/ 9436 static void 9437 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) 9438 { 9439 struct pci_dev *pdev; 9440 9441 /* Obtain PCI device reference */ 9442 if (!phba->pcidev) 9443 return; 9444 else 9445 pdev = phba->pcidev; 9446 9447 /* Free coherent DMA memory allocated */ 9448 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 9449 phba->hbqslimp.virt, phba->hbqslimp.phys); 9450 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9451 phba->slim2p.virt, phba->slim2p.phys); 9452 9453 /* I/O memory unmap */ 9454 iounmap(phba->ctrl_regs_memmap_p); 9455 iounmap(phba->slim_memmap_p); 9456 9457 return; 9458 } 9459 9460 /** 9461 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status 9462 * @phba: pointer to lpfc hba data structure. 9463 * 9464 * This routine is invoked to wait for SLI4 device Power On Self Test (POST) 9465 * done and check status. 9466 * 9467 * Return 0 if successful, otherwise -ENODEV. 9468 **/ 9469 int 9470 lpfc_sli4_post_status_check(struct lpfc_hba *phba) 9471 { 9472 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; 9473 struct lpfc_register reg_data; 9474 int i, port_error = 0; 9475 uint32_t if_type; 9476 9477 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 9478 memset(®_data, 0, sizeof(reg_data)); 9479 if (!phba->sli4_hba.PSMPHRregaddr) 9480 return -ENODEV; 9481 9482 /* Wait up to 30 seconds for the SLI Port POST done and ready */ 9483 for (i = 0; i < 3000; i++) { 9484 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 9485 &portsmphr_reg.word0) || 9486 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { 9487 /* Port has a fatal POST error, break out */ 9488 port_error = -ENODEV; 9489 break; 9490 } 9491 if (LPFC_POST_STAGE_PORT_READY == 9492 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) 9493 break; 9494 msleep(10); 9495 } 9496 9497 /* 9498 * If there was a port error during POST, then don't proceed with 9499 * other register reads as the data may not be valid. Just exit. 9500 */ 9501 if (port_error) { 9502 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9503 "1408 Port Failed POST - portsmphr=0x%x, " 9504 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " 9505 "scr2=x%x, hscratch=x%x, pstatus=x%x\n", 9506 portsmphr_reg.word0, 9507 bf_get(lpfc_port_smphr_perr, &portsmphr_reg), 9508 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), 9509 bf_get(lpfc_port_smphr_nip, &portsmphr_reg), 9510 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), 9511 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), 9512 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), 9513 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), 9514 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); 9515 } else { 9516 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9517 "2534 Device Info: SLIFamily=0x%x, " 9518 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " 9519 "SLIHint_2=0x%x, FT=0x%x\n", 9520 bf_get(lpfc_sli_intf_sli_family, 9521 &phba->sli4_hba.sli_intf), 9522 bf_get(lpfc_sli_intf_slirev, 9523 &phba->sli4_hba.sli_intf), 9524 bf_get(lpfc_sli_intf_if_type, 9525 &phba->sli4_hba.sli_intf), 9526 bf_get(lpfc_sli_intf_sli_hint1, 9527 &phba->sli4_hba.sli_intf), 9528 bf_get(lpfc_sli_intf_sli_hint2, 9529 &phba->sli4_hba.sli_intf), 9530 bf_get(lpfc_sli_intf_func_type, 9531 &phba->sli4_hba.sli_intf)); 9532 /* 9533 * Check for other Port errors during the initialization 9534 * process. Fail the load if the port did not come up 9535 * correctly. 9536 */ 9537 if_type = bf_get(lpfc_sli_intf_if_type, 9538 &phba->sli4_hba.sli_intf); 9539 switch (if_type) { 9540 case LPFC_SLI_INTF_IF_TYPE_0: 9541 phba->sli4_hba.ue_mask_lo = 9542 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); 9543 phba->sli4_hba.ue_mask_hi = 9544 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); 9545 uerrlo_reg.word0 = 9546 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); 9547 uerrhi_reg.word0 = 9548 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); 9549 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || 9550 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { 9551 lpfc_printf_log(phba, KERN_ERR, 9552 LOG_TRACE_EVENT, 9553 "1422 Unrecoverable Error " 9554 "Detected during POST " 9555 "uerr_lo_reg=0x%x, " 9556 "uerr_hi_reg=0x%x, " 9557 "ue_mask_lo_reg=0x%x, " 9558 "ue_mask_hi_reg=0x%x\n", 9559 uerrlo_reg.word0, 9560 uerrhi_reg.word0, 9561 phba->sli4_hba.ue_mask_lo, 9562 phba->sli4_hba.ue_mask_hi); 9563 port_error = -ENODEV; 9564 } 9565 break; 9566 case LPFC_SLI_INTF_IF_TYPE_2: 9567 case LPFC_SLI_INTF_IF_TYPE_6: 9568 /* Final checks. The port status should be clean. */ 9569 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, 9570 ®_data.word0) || 9571 lpfc_sli4_unrecoverable_port(®_data)) { 9572 phba->work_status[0] = 9573 readl(phba->sli4_hba.u.if_type2. 9574 ERR1regaddr); 9575 phba->work_status[1] = 9576 readl(phba->sli4_hba.u.if_type2. 9577 ERR2regaddr); 9578 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9579 "2888 Unrecoverable port error " 9580 "following POST: port status reg " 9581 "0x%x, port_smphr reg 0x%x, " 9582 "error 1=0x%x, error 2=0x%x\n", 9583 reg_data.word0, 9584 portsmphr_reg.word0, 9585 phba->work_status[0], 9586 phba->work_status[1]); 9587 port_error = -ENODEV; 9588 break; 9589 } 9590 9591 if (lpfc_pldv_detect && 9592 bf_get(lpfc_sli_intf_sli_family, 9593 &phba->sli4_hba.sli_intf) == 9594 LPFC_SLI_INTF_FAMILY_G6) 9595 pci_write_config_byte(phba->pcidev, 9596 LPFC_SLI_INTF, CFG_PLD); 9597 break; 9598 case LPFC_SLI_INTF_IF_TYPE_1: 9599 default: 9600 break; 9601 } 9602 } 9603 return port_error; 9604 } 9605 9606 /** 9607 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. 9608 * @phba: pointer to lpfc hba data structure. 9609 * @if_type: The SLI4 interface type getting configured. 9610 * 9611 * This routine is invoked to set up SLI4 BAR0 PCI config space register 9612 * memory map. 9613 **/ 9614 static void 9615 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9616 { 9617 switch (if_type) { 9618 case LPFC_SLI_INTF_IF_TYPE_0: 9619 phba->sli4_hba.u.if_type0.UERRLOregaddr = 9620 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; 9621 phba->sli4_hba.u.if_type0.UERRHIregaddr = 9622 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; 9623 phba->sli4_hba.u.if_type0.UEMASKLOregaddr = 9624 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; 9625 phba->sli4_hba.u.if_type0.UEMASKHIregaddr = 9626 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; 9627 phba->sli4_hba.SLIINTFregaddr = 9628 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9629 break; 9630 case LPFC_SLI_INTF_IF_TYPE_2: 9631 phba->sli4_hba.u.if_type2.EQDregaddr = 9632 phba->sli4_hba.conf_regs_memmap_p + 9633 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9634 phba->sli4_hba.u.if_type2.ERR1regaddr = 9635 phba->sli4_hba.conf_regs_memmap_p + 9636 LPFC_CTL_PORT_ER1_OFFSET; 9637 phba->sli4_hba.u.if_type2.ERR2regaddr = 9638 phba->sli4_hba.conf_regs_memmap_p + 9639 LPFC_CTL_PORT_ER2_OFFSET; 9640 phba->sli4_hba.u.if_type2.CTRLregaddr = 9641 phba->sli4_hba.conf_regs_memmap_p + 9642 LPFC_CTL_PORT_CTL_OFFSET; 9643 phba->sli4_hba.u.if_type2.STATUSregaddr = 9644 phba->sli4_hba.conf_regs_memmap_p + 9645 LPFC_CTL_PORT_STA_OFFSET; 9646 phba->sli4_hba.SLIINTFregaddr = 9647 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9648 phba->sli4_hba.PSMPHRregaddr = 9649 phba->sli4_hba.conf_regs_memmap_p + 9650 LPFC_CTL_PORT_SEM_OFFSET; 9651 phba->sli4_hba.RQDBregaddr = 9652 phba->sli4_hba.conf_regs_memmap_p + 9653 LPFC_ULP0_RQ_DOORBELL; 9654 phba->sli4_hba.WQDBregaddr = 9655 phba->sli4_hba.conf_regs_memmap_p + 9656 LPFC_ULP0_WQ_DOORBELL; 9657 phba->sli4_hba.CQDBregaddr = 9658 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; 9659 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9660 phba->sli4_hba.MQDBregaddr = 9661 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; 9662 phba->sli4_hba.BMBXregaddr = 9663 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9664 break; 9665 case LPFC_SLI_INTF_IF_TYPE_6: 9666 phba->sli4_hba.u.if_type2.EQDregaddr = 9667 phba->sli4_hba.conf_regs_memmap_p + 9668 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9669 phba->sli4_hba.u.if_type2.ERR1regaddr = 9670 phba->sli4_hba.conf_regs_memmap_p + 9671 LPFC_CTL_PORT_ER1_OFFSET; 9672 phba->sli4_hba.u.if_type2.ERR2regaddr = 9673 phba->sli4_hba.conf_regs_memmap_p + 9674 LPFC_CTL_PORT_ER2_OFFSET; 9675 phba->sli4_hba.u.if_type2.CTRLregaddr = 9676 phba->sli4_hba.conf_regs_memmap_p + 9677 LPFC_CTL_PORT_CTL_OFFSET; 9678 phba->sli4_hba.u.if_type2.STATUSregaddr = 9679 phba->sli4_hba.conf_regs_memmap_p + 9680 LPFC_CTL_PORT_STA_OFFSET; 9681 phba->sli4_hba.PSMPHRregaddr = 9682 phba->sli4_hba.conf_regs_memmap_p + 9683 LPFC_CTL_PORT_SEM_OFFSET; 9684 phba->sli4_hba.BMBXregaddr = 9685 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9686 break; 9687 case LPFC_SLI_INTF_IF_TYPE_1: 9688 default: 9689 dev_printk(KERN_ERR, &phba->pcidev->dev, 9690 "FATAL - unsupported SLI4 interface type - %d\n", 9691 if_type); 9692 break; 9693 } 9694 } 9695 9696 /** 9697 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. 9698 * @phba: pointer to lpfc hba data structure. 9699 * @if_type: sli if type to operate on. 9700 * 9701 * This routine is invoked to set up SLI4 BAR1 register memory map. 9702 **/ 9703 static void 9704 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9705 { 9706 switch (if_type) { 9707 case LPFC_SLI_INTF_IF_TYPE_0: 9708 phba->sli4_hba.PSMPHRregaddr = 9709 phba->sli4_hba.ctrl_regs_memmap_p + 9710 LPFC_SLIPORT_IF0_SMPHR; 9711 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9712 LPFC_HST_ISR0; 9713 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9714 LPFC_HST_IMR0; 9715 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9716 LPFC_HST_ISCR0; 9717 break; 9718 case LPFC_SLI_INTF_IF_TYPE_6: 9719 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9720 LPFC_IF6_RQ_DOORBELL; 9721 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9722 LPFC_IF6_WQ_DOORBELL; 9723 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9724 LPFC_IF6_CQ_DOORBELL; 9725 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9726 LPFC_IF6_EQ_DOORBELL; 9727 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9728 LPFC_IF6_MQ_DOORBELL; 9729 break; 9730 case LPFC_SLI_INTF_IF_TYPE_2: 9731 case LPFC_SLI_INTF_IF_TYPE_1: 9732 default: 9733 dev_err(&phba->pcidev->dev, 9734 "FATAL - unsupported SLI4 interface type - %d\n", 9735 if_type); 9736 break; 9737 } 9738 } 9739 9740 /** 9741 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. 9742 * @phba: pointer to lpfc hba data structure. 9743 * @vf: virtual function number 9744 * 9745 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map 9746 * based on the given viftual function number, @vf. 9747 * 9748 * Return 0 if successful, otherwise -ENODEV. 9749 **/ 9750 static int 9751 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) 9752 { 9753 if (vf > LPFC_VIR_FUNC_MAX) 9754 return -ENODEV; 9755 9756 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9757 vf * LPFC_VFR_PAGE_SIZE + 9758 LPFC_ULP0_RQ_DOORBELL); 9759 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9760 vf * LPFC_VFR_PAGE_SIZE + 9761 LPFC_ULP0_WQ_DOORBELL); 9762 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9763 vf * LPFC_VFR_PAGE_SIZE + 9764 LPFC_EQCQ_DOORBELL); 9765 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9766 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9767 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); 9768 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9769 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); 9770 return 0; 9771 } 9772 9773 /** 9774 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox 9775 * @phba: pointer to lpfc hba data structure. 9776 * 9777 * This routine is invoked to create the bootstrap mailbox 9778 * region consistent with the SLI-4 interface spec. This 9779 * routine allocates all memory necessary to communicate 9780 * mailbox commands to the port and sets up all alignment 9781 * needs. No locks are expected to be held when calling 9782 * this routine. 9783 * 9784 * Return codes 9785 * 0 - successful 9786 * -ENOMEM - could not allocated memory. 9787 **/ 9788 static int 9789 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) 9790 { 9791 uint32_t bmbx_size; 9792 struct lpfc_dmabuf *dmabuf; 9793 struct dma_address *dma_address; 9794 uint32_t pa_addr; 9795 uint64_t phys_addr; 9796 9797 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 9798 if (!dmabuf) 9799 return -ENOMEM; 9800 9801 /* 9802 * The bootstrap mailbox region is comprised of 2 parts 9803 * plus an alignment restriction of 16 bytes. 9804 */ 9805 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); 9806 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, 9807 &dmabuf->phys, GFP_KERNEL); 9808 if (!dmabuf->virt) { 9809 kfree(dmabuf); 9810 return -ENOMEM; 9811 } 9812 9813 /* 9814 * Initialize the bootstrap mailbox pointers now so that the register 9815 * operations are simple later. The mailbox dma address is required 9816 * to be 16-byte aligned. Also align the virtual memory as each 9817 * maibox is copied into the bmbx mailbox region before issuing the 9818 * command to the port. 9819 */ 9820 phba->sli4_hba.bmbx.dmabuf = dmabuf; 9821 phba->sli4_hba.bmbx.bmbx_size = bmbx_size; 9822 9823 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, 9824 LPFC_ALIGN_16_BYTE); 9825 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, 9826 LPFC_ALIGN_16_BYTE); 9827 9828 /* 9829 * Set the high and low physical addresses now. The SLI4 alignment 9830 * requirement is 16 bytes and the mailbox is posted to the port 9831 * as two 30-bit addresses. The other data is a bit marking whether 9832 * the 30-bit address is the high or low address. 9833 * Upcast bmbx aphys to 64bits so shift instruction compiles 9834 * clean on 32 bit machines. 9835 */ 9836 dma_address = &phba->sli4_hba.bmbx.dma_address; 9837 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; 9838 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); 9839 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | 9840 LPFC_BMBX_BIT1_ADDR_HI); 9841 9842 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); 9843 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | 9844 LPFC_BMBX_BIT1_ADDR_LO); 9845 return 0; 9846 } 9847 9848 /** 9849 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources 9850 * @phba: pointer to lpfc hba data structure. 9851 * 9852 * This routine is invoked to teardown the bootstrap mailbox 9853 * region and release all host resources. This routine requires 9854 * the caller to ensure all mailbox commands recovered, no 9855 * additional mailbox comands are sent, and interrupts are disabled 9856 * before calling this routine. 9857 * 9858 **/ 9859 static void 9860 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) 9861 { 9862 dma_free_coherent(&phba->pcidev->dev, 9863 phba->sli4_hba.bmbx.bmbx_size, 9864 phba->sli4_hba.bmbx.dmabuf->virt, 9865 phba->sli4_hba.bmbx.dmabuf->phys); 9866 9867 kfree(phba->sli4_hba.bmbx.dmabuf); 9868 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); 9869 } 9870 9871 static const char * const lpfc_topo_to_str[] = { 9872 "Loop then P2P", 9873 "Loopback", 9874 "P2P Only", 9875 "Unsupported", 9876 "Loop Only", 9877 "Unsupported", 9878 "P2P then Loop", 9879 }; 9880 9881 #define LINK_FLAGS_DEF 0x0 9882 #define LINK_FLAGS_P2P 0x1 9883 #define LINK_FLAGS_LOOP 0x2 9884 /** 9885 * lpfc_map_topology - Map the topology read from READ_CONFIG 9886 * @phba: pointer to lpfc hba data structure. 9887 * @rd_config: pointer to read config data 9888 * 9889 * This routine is invoked to map the topology values as read 9890 * from the read config mailbox command. If the persistent 9891 * topology feature is supported, the firmware will provide the 9892 * saved topology information to be used in INIT_LINK 9893 **/ 9894 static void 9895 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) 9896 { 9897 u8 ptv, tf, pt; 9898 9899 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); 9900 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); 9901 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); 9902 9903 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9904 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", 9905 ptv, tf, pt); 9906 if (!ptv) { 9907 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9908 "2019 FW does not support persistent topology " 9909 "Using driver parameter defined value [%s]", 9910 lpfc_topo_to_str[phba->cfg_topology]); 9911 return; 9912 } 9913 /* FW supports persistent topology - override module parameter value */ 9914 phba->hba_flag |= HBA_PERSISTENT_TOPO; 9915 9916 /* if ASIC_GEN_NUM >= 0xC) */ 9917 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 9918 LPFC_SLI_INTF_IF_TYPE_6) || 9919 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 9920 LPFC_SLI_INTF_FAMILY_G6)) { 9921 if (!tf) { 9922 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) 9923 ? FLAGS_TOPOLOGY_MODE_LOOP 9924 : FLAGS_TOPOLOGY_MODE_PT_PT); 9925 } else { 9926 phba->hba_flag &= ~HBA_PERSISTENT_TOPO; 9927 } 9928 } else { /* G5 */ 9929 if (tf) { 9930 /* If topology failover set - pt is '0' or '1' */ 9931 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : 9932 FLAGS_TOPOLOGY_MODE_LOOP_PT); 9933 } else { 9934 phba->cfg_topology = ((pt == LINK_FLAGS_P2P) 9935 ? FLAGS_TOPOLOGY_MODE_PT_PT 9936 : FLAGS_TOPOLOGY_MODE_LOOP); 9937 } 9938 } 9939 if (phba->hba_flag & HBA_PERSISTENT_TOPO) { 9940 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9941 "2020 Using persistent topology value [%s]", 9942 lpfc_topo_to_str[phba->cfg_topology]); 9943 } else { 9944 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9945 "2021 Invalid topology values from FW " 9946 "Using driver parameter defined value [%s]", 9947 lpfc_topo_to_str[phba->cfg_topology]); 9948 } 9949 } 9950 9951 /** 9952 * lpfc_sli4_read_config - Get the config parameters. 9953 * @phba: pointer to lpfc hba data structure. 9954 * 9955 * This routine is invoked to read the configuration parameters from the HBA. 9956 * The configuration parameters are used to set the base and maximum values 9957 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource 9958 * allocation for the port. 9959 * 9960 * Return codes 9961 * 0 - successful 9962 * -ENOMEM - No available memory 9963 * -EIO - The mailbox failed to complete successfully. 9964 **/ 9965 int 9966 lpfc_sli4_read_config(struct lpfc_hba *phba) 9967 { 9968 LPFC_MBOXQ_t *pmb; 9969 struct lpfc_mbx_read_config *rd_config; 9970 union lpfc_sli4_cfg_shdr *shdr; 9971 uint32_t shdr_status, shdr_add_status; 9972 struct lpfc_mbx_get_func_cfg *get_func_cfg; 9973 struct lpfc_rsrc_desc_fcfcoe *desc; 9974 char *pdesc_0; 9975 uint16_t forced_link_speed; 9976 uint32_t if_type, qmin, fawwpn; 9977 int length, i, rc = 0, rc2; 9978 9979 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 9980 if (!pmb) { 9981 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9982 "2011 Unable to allocate memory for issuing " 9983 "SLI_CONFIG_SPECIAL mailbox command\n"); 9984 return -ENOMEM; 9985 } 9986 9987 lpfc_read_config(phba, pmb); 9988 9989 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 9990 if (rc != MBX_SUCCESS) { 9991 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9992 "2012 Mailbox failed , mbxCmd x%x " 9993 "READ_CONFIG, mbxStatus x%x\n", 9994 bf_get(lpfc_mqe_command, &pmb->u.mqe), 9995 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 9996 rc = -EIO; 9997 } else { 9998 rd_config = &pmb->u.mqe.un.rd_config; 9999 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { 10000 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; 10001 phba->sli4_hba.lnk_info.lnk_tp = 10002 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); 10003 phba->sli4_hba.lnk_info.lnk_no = 10004 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); 10005 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10006 "3081 lnk_type:%d, lnk_numb:%d\n", 10007 phba->sli4_hba.lnk_info.lnk_tp, 10008 phba->sli4_hba.lnk_info.lnk_no); 10009 } else 10010 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 10011 "3082 Mailbox (x%x) returned ldv:x0\n", 10012 bf_get(lpfc_mqe_command, &pmb->u.mqe)); 10013 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { 10014 phba->bbcredit_support = 1; 10015 phba->sli4_hba.bbscn_params.word0 = rd_config->word8; 10016 } 10017 10018 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config); 10019 10020 if (fawwpn) { 10021 lpfc_printf_log(phba, KERN_INFO, 10022 LOG_INIT | LOG_DISCOVERY, 10023 "2702 READ_CONFIG: FA-PWWN is " 10024 "configured on\n"); 10025 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG; 10026 } else { 10027 /* Clear FW configured flag, preserve driver flag */ 10028 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG; 10029 } 10030 10031 phba->sli4_hba.conf_trunk = 10032 bf_get(lpfc_mbx_rd_conf_trunk, rd_config); 10033 phba->sli4_hba.extents_in_use = 10034 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); 10035 10036 phba->sli4_hba.max_cfg_param.max_xri = 10037 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); 10038 /* Reduce resource usage in kdump environment */ 10039 if (is_kdump_kernel() && 10040 phba->sli4_hba.max_cfg_param.max_xri > 512) 10041 phba->sli4_hba.max_cfg_param.max_xri = 512; 10042 phba->sli4_hba.max_cfg_param.xri_base = 10043 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); 10044 phba->sli4_hba.max_cfg_param.max_vpi = 10045 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); 10046 /* Limit the max we support */ 10047 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) 10048 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; 10049 phba->sli4_hba.max_cfg_param.vpi_base = 10050 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); 10051 phba->sli4_hba.max_cfg_param.max_rpi = 10052 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); 10053 phba->sli4_hba.max_cfg_param.rpi_base = 10054 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); 10055 phba->sli4_hba.max_cfg_param.max_vfi = 10056 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); 10057 phba->sli4_hba.max_cfg_param.vfi_base = 10058 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); 10059 phba->sli4_hba.max_cfg_param.max_fcfi = 10060 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); 10061 phba->sli4_hba.max_cfg_param.max_eq = 10062 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); 10063 phba->sli4_hba.max_cfg_param.max_rq = 10064 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); 10065 phba->sli4_hba.max_cfg_param.max_wq = 10066 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); 10067 phba->sli4_hba.max_cfg_param.max_cq = 10068 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); 10069 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); 10070 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; 10071 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; 10072 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; 10073 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? 10074 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; 10075 phba->max_vports = phba->max_vpi; 10076 10077 /* Next decide on FPIN or Signal E2E CGN support 10078 * For congestion alarms and warnings valid combination are: 10079 * 1. FPIN alarms / FPIN warnings 10080 * 2. Signal alarms / Signal warnings 10081 * 3. FPIN alarms / Signal warnings 10082 * 4. Signal alarms / FPIN warnings 10083 * 10084 * Initialize the adapter frequency to 100 mSecs 10085 */ 10086 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10087 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; 10088 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency; 10089 10090 if (lpfc_use_cgn_signal) { 10091 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) { 10092 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY; 10093 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN; 10094 } 10095 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) { 10096 /* MUST support both alarm and warning 10097 * because EDC does not support alarm alone. 10098 */ 10099 if (phba->cgn_reg_signal != 10100 EDC_CG_SIG_WARN_ONLY) { 10101 /* Must support both or none */ 10102 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10103 phba->cgn_reg_signal = 10104 EDC_CG_SIG_NOTSUPPORTED; 10105 } else { 10106 phba->cgn_reg_signal = 10107 EDC_CG_SIG_WARN_ALARM; 10108 phba->cgn_reg_fpin = 10109 LPFC_CGN_FPIN_NONE; 10110 } 10111 } 10112 } 10113 10114 /* Set the congestion initial signal and fpin values. */ 10115 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin; 10116 phba->cgn_init_reg_signal = phba->cgn_reg_signal; 10117 10118 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 10119 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n", 10120 phba->cgn_reg_signal, phba->cgn_reg_fpin); 10121 10122 lpfc_map_topology(phba, rd_config); 10123 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10124 "2003 cfg params Extents? %d " 10125 "XRI(B:%d M:%d), " 10126 "VPI(B:%d M:%d) " 10127 "VFI(B:%d M:%d) " 10128 "RPI(B:%d M:%d) " 10129 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", 10130 phba->sli4_hba.extents_in_use, 10131 phba->sli4_hba.max_cfg_param.xri_base, 10132 phba->sli4_hba.max_cfg_param.max_xri, 10133 phba->sli4_hba.max_cfg_param.vpi_base, 10134 phba->sli4_hba.max_cfg_param.max_vpi, 10135 phba->sli4_hba.max_cfg_param.vfi_base, 10136 phba->sli4_hba.max_cfg_param.max_vfi, 10137 phba->sli4_hba.max_cfg_param.rpi_base, 10138 phba->sli4_hba.max_cfg_param.max_rpi, 10139 phba->sli4_hba.max_cfg_param.max_fcfi, 10140 phba->sli4_hba.max_cfg_param.max_eq, 10141 phba->sli4_hba.max_cfg_param.max_cq, 10142 phba->sli4_hba.max_cfg_param.max_wq, 10143 phba->sli4_hba.max_cfg_param.max_rq, 10144 phba->lmt); 10145 10146 /* 10147 * Calculate queue resources based on how 10148 * many WQ/CQ/EQs are available. 10149 */ 10150 qmin = phba->sli4_hba.max_cfg_param.max_wq; 10151 if (phba->sli4_hba.max_cfg_param.max_cq < qmin) 10152 qmin = phba->sli4_hba.max_cfg_param.max_cq; 10153 /* 10154 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and 10155 * the remainder can be used for NVME / FCP. 10156 */ 10157 qmin -= 4; 10158 if (phba->sli4_hba.max_cfg_param.max_eq < qmin) 10159 qmin = phba->sli4_hba.max_cfg_param.max_eq; 10160 10161 /* Check to see if there is enough for default cfg */ 10162 if ((phba->cfg_irq_chann > qmin) || 10163 (phba->cfg_hdw_queue > qmin)) { 10164 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10165 "2005 Reducing Queues - " 10166 "FW resource limitation: " 10167 "WQ %d CQ %d EQ %d: min %d: " 10168 "IRQ %d HDWQ %d\n", 10169 phba->sli4_hba.max_cfg_param.max_wq, 10170 phba->sli4_hba.max_cfg_param.max_cq, 10171 phba->sli4_hba.max_cfg_param.max_eq, 10172 qmin, phba->cfg_irq_chann, 10173 phba->cfg_hdw_queue); 10174 10175 if (phba->cfg_irq_chann > qmin) 10176 phba->cfg_irq_chann = qmin; 10177 if (phba->cfg_hdw_queue > qmin) 10178 phba->cfg_hdw_queue = qmin; 10179 } 10180 } 10181 10182 if (rc) 10183 goto read_cfg_out; 10184 10185 /* Update link speed if forced link speed is supported */ 10186 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10187 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 10188 forced_link_speed = 10189 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); 10190 if (forced_link_speed) { 10191 phba->hba_flag |= HBA_FORCED_LINK_SPEED; 10192 10193 switch (forced_link_speed) { 10194 case LINK_SPEED_1G: 10195 phba->cfg_link_speed = 10196 LPFC_USER_LINK_SPEED_1G; 10197 break; 10198 case LINK_SPEED_2G: 10199 phba->cfg_link_speed = 10200 LPFC_USER_LINK_SPEED_2G; 10201 break; 10202 case LINK_SPEED_4G: 10203 phba->cfg_link_speed = 10204 LPFC_USER_LINK_SPEED_4G; 10205 break; 10206 case LINK_SPEED_8G: 10207 phba->cfg_link_speed = 10208 LPFC_USER_LINK_SPEED_8G; 10209 break; 10210 case LINK_SPEED_10G: 10211 phba->cfg_link_speed = 10212 LPFC_USER_LINK_SPEED_10G; 10213 break; 10214 case LINK_SPEED_16G: 10215 phba->cfg_link_speed = 10216 LPFC_USER_LINK_SPEED_16G; 10217 break; 10218 case LINK_SPEED_32G: 10219 phba->cfg_link_speed = 10220 LPFC_USER_LINK_SPEED_32G; 10221 break; 10222 case LINK_SPEED_64G: 10223 phba->cfg_link_speed = 10224 LPFC_USER_LINK_SPEED_64G; 10225 break; 10226 case 0xffff: 10227 phba->cfg_link_speed = 10228 LPFC_USER_LINK_SPEED_AUTO; 10229 break; 10230 default: 10231 lpfc_printf_log(phba, KERN_ERR, 10232 LOG_TRACE_EVENT, 10233 "0047 Unrecognized link " 10234 "speed : %d\n", 10235 forced_link_speed); 10236 phba->cfg_link_speed = 10237 LPFC_USER_LINK_SPEED_AUTO; 10238 } 10239 } 10240 } 10241 10242 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 10243 length = phba->sli4_hba.max_cfg_param.max_xri - 10244 lpfc_sli4_get_els_iocb_cnt(phba); 10245 if (phba->cfg_hba_queue_depth > length) { 10246 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 10247 "3361 HBA queue depth changed from %d to %d\n", 10248 phba->cfg_hba_queue_depth, length); 10249 phba->cfg_hba_queue_depth = length; 10250 } 10251 10252 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 10253 LPFC_SLI_INTF_IF_TYPE_2) 10254 goto read_cfg_out; 10255 10256 /* get the pf# and vf# for SLI4 if_type 2 port */ 10257 length = (sizeof(struct lpfc_mbx_get_func_cfg) - 10258 sizeof(struct lpfc_sli4_cfg_mhdr)); 10259 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, 10260 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, 10261 length, LPFC_SLI4_MBX_EMBED); 10262 10263 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 10264 shdr = (union lpfc_sli4_cfg_shdr *) 10265 &pmb->u.mqe.un.sli4_config.header.cfg_shdr; 10266 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 10267 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 10268 if (rc2 || shdr_status || shdr_add_status) { 10269 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10270 "3026 Mailbox failed , mbxCmd x%x " 10271 "GET_FUNCTION_CONFIG, mbxStatus x%x\n", 10272 bf_get(lpfc_mqe_command, &pmb->u.mqe), 10273 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 10274 goto read_cfg_out; 10275 } 10276 10277 /* search for fc_fcoe resrouce descriptor */ 10278 get_func_cfg = &pmb->u.mqe.un.get_func_cfg; 10279 10280 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; 10281 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; 10282 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); 10283 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) 10284 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; 10285 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) 10286 goto read_cfg_out; 10287 10288 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { 10289 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); 10290 if (LPFC_RSRC_DESC_TYPE_FCFCOE == 10291 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { 10292 phba->sli4_hba.iov.pf_number = 10293 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); 10294 phba->sli4_hba.iov.vf_number = 10295 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); 10296 break; 10297 } 10298 } 10299 10300 if (i < LPFC_RSRC_DESC_MAX_NUM) 10301 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10302 "3027 GET_FUNCTION_CONFIG: pf_number:%d, " 10303 "vf_number:%d\n", phba->sli4_hba.iov.pf_number, 10304 phba->sli4_hba.iov.vf_number); 10305 else 10306 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10307 "3028 GET_FUNCTION_CONFIG: failed to find " 10308 "Resource Descriptor:x%x\n", 10309 LPFC_RSRC_DESC_TYPE_FCFCOE); 10310 10311 read_cfg_out: 10312 mempool_free(pmb, phba->mbox_mem_pool); 10313 return rc; 10314 } 10315 10316 /** 10317 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. 10318 * @phba: pointer to lpfc hba data structure. 10319 * 10320 * This routine is invoked to setup the port-side endian order when 10321 * the port if_type is 0. This routine has no function for other 10322 * if_types. 10323 * 10324 * Return codes 10325 * 0 - successful 10326 * -ENOMEM - No available memory 10327 * -EIO - The mailbox failed to complete successfully. 10328 **/ 10329 static int 10330 lpfc_setup_endian_order(struct lpfc_hba *phba) 10331 { 10332 LPFC_MBOXQ_t *mboxq; 10333 uint32_t if_type, rc = 0; 10334 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, 10335 HOST_ENDIAN_HIGH_WORD1}; 10336 10337 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10338 switch (if_type) { 10339 case LPFC_SLI_INTF_IF_TYPE_0: 10340 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 10341 GFP_KERNEL); 10342 if (!mboxq) { 10343 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10344 "0492 Unable to allocate memory for " 10345 "issuing SLI_CONFIG_SPECIAL mailbox " 10346 "command\n"); 10347 return -ENOMEM; 10348 } 10349 10350 /* 10351 * The SLI4_CONFIG_SPECIAL mailbox command requires the first 10352 * two words to contain special data values and no other data. 10353 */ 10354 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); 10355 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); 10356 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 10357 if (rc != MBX_SUCCESS) { 10358 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10359 "0493 SLI_CONFIG_SPECIAL mailbox " 10360 "failed with status x%x\n", 10361 rc); 10362 rc = -EIO; 10363 } 10364 mempool_free(mboxq, phba->mbox_mem_pool); 10365 break; 10366 case LPFC_SLI_INTF_IF_TYPE_6: 10367 case LPFC_SLI_INTF_IF_TYPE_2: 10368 case LPFC_SLI_INTF_IF_TYPE_1: 10369 default: 10370 break; 10371 } 10372 return rc; 10373 } 10374 10375 /** 10376 * lpfc_sli4_queue_verify - Verify and update EQ counts 10377 * @phba: pointer to lpfc hba data structure. 10378 * 10379 * This routine is invoked to check the user settable queue counts for EQs. 10380 * After this routine is called the counts will be set to valid values that 10381 * adhere to the constraints of the system's interrupt vectors and the port's 10382 * queue resources. 10383 * 10384 * Return codes 10385 * 0 - successful 10386 * -ENOMEM - No available memory 10387 **/ 10388 static int 10389 lpfc_sli4_queue_verify(struct lpfc_hba *phba) 10390 { 10391 /* 10392 * Sanity check for configured queue parameters against the run-time 10393 * device parameters 10394 */ 10395 10396 if (phba->nvmet_support) { 10397 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) 10398 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; 10399 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) 10400 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; 10401 } 10402 10403 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10404 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", 10405 phba->cfg_hdw_queue, phba->cfg_irq_chann, 10406 phba->cfg_nvmet_mrq); 10407 10408 /* Get EQ depth from module parameter, fake the default for now */ 10409 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10410 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10411 10412 /* Get CQ depth from module parameter, fake the default for now */ 10413 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10414 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10415 return 0; 10416 } 10417 10418 static int 10419 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) 10420 { 10421 struct lpfc_queue *qdesc; 10422 u32 wqesize; 10423 int cpu; 10424 10425 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); 10426 /* Create Fast Path IO CQs */ 10427 if (phba->enab_exp_wqcq_pages) 10428 /* Increase the CQ size when WQEs contain an embedded cdb */ 10429 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10430 phba->sli4_hba.cq_esize, 10431 LPFC_CQE_EXP_COUNT, cpu); 10432 10433 else 10434 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10435 phba->sli4_hba.cq_esize, 10436 phba->sli4_hba.cq_ecount, cpu); 10437 if (!qdesc) { 10438 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10439 "0499 Failed allocate fast-path IO CQ (%d)\n", 10440 idx); 10441 return 1; 10442 } 10443 qdesc->qe_valid = 1; 10444 qdesc->hdwq = idx; 10445 qdesc->chann = cpu; 10446 phba->sli4_hba.hdwq[idx].io_cq = qdesc; 10447 10448 /* Create Fast Path IO WQs */ 10449 if (phba->enab_exp_wqcq_pages) { 10450 /* Increase the WQ size when WQEs contain an embedded cdb */ 10451 wqesize = (phba->fcp_embed_io) ? 10452 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; 10453 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10454 wqesize, 10455 LPFC_WQE_EXP_COUNT, cpu); 10456 } else 10457 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10458 phba->sli4_hba.wq_esize, 10459 phba->sli4_hba.wq_ecount, cpu); 10460 10461 if (!qdesc) { 10462 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10463 "0503 Failed allocate fast-path IO WQ (%d)\n", 10464 idx); 10465 return 1; 10466 } 10467 qdesc->hdwq = idx; 10468 qdesc->chann = cpu; 10469 phba->sli4_hba.hdwq[idx].io_wq = qdesc; 10470 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10471 return 0; 10472 } 10473 10474 /** 10475 * lpfc_sli4_queue_create - Create all the SLI4 queues 10476 * @phba: pointer to lpfc hba data structure. 10477 * 10478 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA 10479 * operation. For each SLI4 queue type, the parameters such as queue entry 10480 * count (queue depth) shall be taken from the module parameter. For now, 10481 * we just use some constant number as place holder. 10482 * 10483 * Return codes 10484 * 0 - successful 10485 * -ENOMEM - No availble memory 10486 * -EIO - The mailbox failed to complete successfully. 10487 **/ 10488 int 10489 lpfc_sli4_queue_create(struct lpfc_hba *phba) 10490 { 10491 struct lpfc_queue *qdesc; 10492 int idx, cpu, eqcpu; 10493 struct lpfc_sli4_hdw_queue *qp; 10494 struct lpfc_vector_map_info *cpup; 10495 struct lpfc_vector_map_info *eqcpup; 10496 struct lpfc_eq_intr_info *eqi; 10497 10498 /* 10499 * Create HBA Record arrays. 10500 * Both NVME and FCP will share that same vectors / EQs 10501 */ 10502 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; 10503 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; 10504 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; 10505 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; 10506 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; 10507 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; 10508 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10509 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10510 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10511 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10512 10513 if (!phba->sli4_hba.hdwq) { 10514 phba->sli4_hba.hdwq = kcalloc( 10515 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), 10516 GFP_KERNEL); 10517 if (!phba->sli4_hba.hdwq) { 10518 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10519 "6427 Failed allocate memory for " 10520 "fast-path Hardware Queue array\n"); 10521 goto out_error; 10522 } 10523 /* Prepare hardware queues to take IO buffers */ 10524 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10525 qp = &phba->sli4_hba.hdwq[idx]; 10526 spin_lock_init(&qp->io_buf_list_get_lock); 10527 spin_lock_init(&qp->io_buf_list_put_lock); 10528 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 10529 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 10530 qp->get_io_bufs = 0; 10531 qp->put_io_bufs = 0; 10532 qp->total_io_bufs = 0; 10533 spin_lock_init(&qp->abts_io_buf_list_lock); 10534 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); 10535 qp->abts_scsi_io_bufs = 0; 10536 qp->abts_nvme_io_bufs = 0; 10537 INIT_LIST_HEAD(&qp->sgl_list); 10538 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); 10539 spin_lock_init(&qp->hdwq_lock); 10540 } 10541 } 10542 10543 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10544 if (phba->nvmet_support) { 10545 phba->sli4_hba.nvmet_cqset = kcalloc( 10546 phba->cfg_nvmet_mrq, 10547 sizeof(struct lpfc_queue *), 10548 GFP_KERNEL); 10549 if (!phba->sli4_hba.nvmet_cqset) { 10550 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10551 "3121 Fail allocate memory for " 10552 "fast-path CQ set array\n"); 10553 goto out_error; 10554 } 10555 phba->sli4_hba.nvmet_mrq_hdr = kcalloc( 10556 phba->cfg_nvmet_mrq, 10557 sizeof(struct lpfc_queue *), 10558 GFP_KERNEL); 10559 if (!phba->sli4_hba.nvmet_mrq_hdr) { 10560 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10561 "3122 Fail allocate memory for " 10562 "fast-path RQ set hdr array\n"); 10563 goto out_error; 10564 } 10565 phba->sli4_hba.nvmet_mrq_data = kcalloc( 10566 phba->cfg_nvmet_mrq, 10567 sizeof(struct lpfc_queue *), 10568 GFP_KERNEL); 10569 if (!phba->sli4_hba.nvmet_mrq_data) { 10570 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10571 "3124 Fail allocate memory for " 10572 "fast-path RQ set data array\n"); 10573 goto out_error; 10574 } 10575 } 10576 } 10577 10578 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10579 10580 /* Create HBA Event Queues (EQs) */ 10581 for_each_present_cpu(cpu) { 10582 /* We only want to create 1 EQ per vector, even though 10583 * multiple CPUs might be using that vector. so only 10584 * selects the CPUs that are LPFC_CPU_FIRST_IRQ. 10585 */ 10586 cpup = &phba->sli4_hba.cpu_map[cpu]; 10587 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 10588 continue; 10589 10590 /* Get a ptr to the Hardware Queue associated with this CPU */ 10591 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10592 10593 /* Allocate an EQ */ 10594 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10595 phba->sli4_hba.eq_esize, 10596 phba->sli4_hba.eq_ecount, cpu); 10597 if (!qdesc) { 10598 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10599 "0497 Failed allocate EQ (%d)\n", 10600 cpup->hdwq); 10601 goto out_error; 10602 } 10603 qdesc->qe_valid = 1; 10604 qdesc->hdwq = cpup->hdwq; 10605 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ 10606 qdesc->last_cpu = qdesc->chann; 10607 10608 /* Save the allocated EQ in the Hardware Queue */ 10609 qp->hba_eq = qdesc; 10610 10611 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); 10612 list_add(&qdesc->cpu_list, &eqi->list); 10613 } 10614 10615 /* Now we need to populate the other Hardware Queues, that share 10616 * an IRQ vector, with the associated EQ ptr. 10617 */ 10618 for_each_present_cpu(cpu) { 10619 cpup = &phba->sli4_hba.cpu_map[cpu]; 10620 10621 /* Check for EQ already allocated in previous loop */ 10622 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 10623 continue; 10624 10625 /* Check for multiple CPUs per hdwq */ 10626 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10627 if (qp->hba_eq) 10628 continue; 10629 10630 /* We need to share an EQ for this hdwq */ 10631 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); 10632 eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; 10633 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; 10634 } 10635 10636 /* Allocate IO Path SLI4 CQ/WQs */ 10637 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10638 if (lpfc_alloc_io_wq_cq(phba, idx)) 10639 goto out_error; 10640 } 10641 10642 if (phba->nvmet_support) { 10643 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10644 cpu = lpfc_find_cpu_handle(phba, idx, 10645 LPFC_FIND_BY_HDWQ); 10646 qdesc = lpfc_sli4_queue_alloc(phba, 10647 LPFC_DEFAULT_PAGE_SIZE, 10648 phba->sli4_hba.cq_esize, 10649 phba->sli4_hba.cq_ecount, 10650 cpu); 10651 if (!qdesc) { 10652 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10653 "3142 Failed allocate NVME " 10654 "CQ Set (%d)\n", idx); 10655 goto out_error; 10656 } 10657 qdesc->qe_valid = 1; 10658 qdesc->hdwq = idx; 10659 qdesc->chann = cpu; 10660 phba->sli4_hba.nvmet_cqset[idx] = qdesc; 10661 } 10662 } 10663 10664 /* 10665 * Create Slow Path Completion Queues (CQs) 10666 */ 10667 10668 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); 10669 /* Create slow-path Mailbox Command Complete Queue */ 10670 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10671 phba->sli4_hba.cq_esize, 10672 phba->sli4_hba.cq_ecount, cpu); 10673 if (!qdesc) { 10674 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10675 "0500 Failed allocate slow-path mailbox CQ\n"); 10676 goto out_error; 10677 } 10678 qdesc->qe_valid = 1; 10679 phba->sli4_hba.mbx_cq = qdesc; 10680 10681 /* Create slow-path ELS Complete Queue */ 10682 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10683 phba->sli4_hba.cq_esize, 10684 phba->sli4_hba.cq_ecount, cpu); 10685 if (!qdesc) { 10686 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10687 "0501 Failed allocate slow-path ELS CQ\n"); 10688 goto out_error; 10689 } 10690 qdesc->qe_valid = 1; 10691 qdesc->chann = cpu; 10692 phba->sli4_hba.els_cq = qdesc; 10693 10694 10695 /* 10696 * Create Slow Path Work Queues (WQs) 10697 */ 10698 10699 /* Create Mailbox Command Queue */ 10700 10701 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10702 phba->sli4_hba.mq_esize, 10703 phba->sli4_hba.mq_ecount, cpu); 10704 if (!qdesc) { 10705 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10706 "0505 Failed allocate slow-path MQ\n"); 10707 goto out_error; 10708 } 10709 qdesc->chann = cpu; 10710 phba->sli4_hba.mbx_wq = qdesc; 10711 10712 /* 10713 * Create ELS Work Queues 10714 */ 10715 10716 /* Create slow-path ELS Work Queue */ 10717 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10718 phba->sli4_hba.wq_esize, 10719 phba->sli4_hba.wq_ecount, cpu); 10720 if (!qdesc) { 10721 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10722 "0504 Failed allocate slow-path ELS WQ\n"); 10723 goto out_error; 10724 } 10725 qdesc->chann = cpu; 10726 phba->sli4_hba.els_wq = qdesc; 10727 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10728 10729 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10730 /* Create NVME LS Complete Queue */ 10731 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10732 phba->sli4_hba.cq_esize, 10733 phba->sli4_hba.cq_ecount, cpu); 10734 if (!qdesc) { 10735 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10736 "6079 Failed allocate NVME LS CQ\n"); 10737 goto out_error; 10738 } 10739 qdesc->chann = cpu; 10740 qdesc->qe_valid = 1; 10741 phba->sli4_hba.nvmels_cq = qdesc; 10742 10743 /* Create NVME LS Work Queue */ 10744 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10745 phba->sli4_hba.wq_esize, 10746 phba->sli4_hba.wq_ecount, cpu); 10747 if (!qdesc) { 10748 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10749 "6080 Failed allocate NVME LS WQ\n"); 10750 goto out_error; 10751 } 10752 qdesc->chann = cpu; 10753 phba->sli4_hba.nvmels_wq = qdesc; 10754 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10755 } 10756 10757 /* 10758 * Create Receive Queue (RQ) 10759 */ 10760 10761 /* Create Receive Queue for header */ 10762 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10763 phba->sli4_hba.rq_esize, 10764 phba->sli4_hba.rq_ecount, cpu); 10765 if (!qdesc) { 10766 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10767 "0506 Failed allocate receive HRQ\n"); 10768 goto out_error; 10769 } 10770 phba->sli4_hba.hdr_rq = qdesc; 10771 10772 /* Create Receive Queue for data */ 10773 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10774 phba->sli4_hba.rq_esize, 10775 phba->sli4_hba.rq_ecount, cpu); 10776 if (!qdesc) { 10777 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10778 "0507 Failed allocate receive DRQ\n"); 10779 goto out_error; 10780 } 10781 phba->sli4_hba.dat_rq = qdesc; 10782 10783 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && 10784 phba->nvmet_support) { 10785 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10786 cpu = lpfc_find_cpu_handle(phba, idx, 10787 LPFC_FIND_BY_HDWQ); 10788 /* Create NVMET Receive Queue for header */ 10789 qdesc = lpfc_sli4_queue_alloc(phba, 10790 LPFC_DEFAULT_PAGE_SIZE, 10791 phba->sli4_hba.rq_esize, 10792 LPFC_NVMET_RQE_DEF_COUNT, 10793 cpu); 10794 if (!qdesc) { 10795 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10796 "3146 Failed allocate " 10797 "receive HRQ\n"); 10798 goto out_error; 10799 } 10800 qdesc->hdwq = idx; 10801 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; 10802 10803 /* Only needed for header of RQ pair */ 10804 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), 10805 GFP_KERNEL, 10806 cpu_to_node(cpu)); 10807 if (qdesc->rqbp == NULL) { 10808 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10809 "6131 Failed allocate " 10810 "Header RQBP\n"); 10811 goto out_error; 10812 } 10813 10814 /* Put list in known state in case driver load fails. */ 10815 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); 10816 10817 /* Create NVMET Receive Queue for data */ 10818 qdesc = lpfc_sli4_queue_alloc(phba, 10819 LPFC_DEFAULT_PAGE_SIZE, 10820 phba->sli4_hba.rq_esize, 10821 LPFC_NVMET_RQE_DEF_COUNT, 10822 cpu); 10823 if (!qdesc) { 10824 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10825 "3156 Failed allocate " 10826 "receive DRQ\n"); 10827 goto out_error; 10828 } 10829 qdesc->hdwq = idx; 10830 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; 10831 } 10832 } 10833 10834 /* Clear NVME stats */ 10835 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10836 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10837 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, 10838 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); 10839 } 10840 } 10841 10842 /* Clear SCSI stats */ 10843 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 10844 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10845 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, 10846 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); 10847 } 10848 } 10849 10850 return 0; 10851 10852 out_error: 10853 lpfc_sli4_queue_destroy(phba); 10854 return -ENOMEM; 10855 } 10856 10857 static inline void 10858 __lpfc_sli4_release_queue(struct lpfc_queue **qp) 10859 { 10860 if (*qp != NULL) { 10861 lpfc_sli4_queue_free(*qp); 10862 *qp = NULL; 10863 } 10864 } 10865 10866 static inline void 10867 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) 10868 { 10869 int idx; 10870 10871 if (*qs == NULL) 10872 return; 10873 10874 for (idx = 0; idx < max; idx++) 10875 __lpfc_sli4_release_queue(&(*qs)[idx]); 10876 10877 kfree(*qs); 10878 *qs = NULL; 10879 } 10880 10881 static inline void 10882 lpfc_sli4_release_hdwq(struct lpfc_hba *phba) 10883 { 10884 struct lpfc_sli4_hdw_queue *hdwq; 10885 struct lpfc_queue *eq; 10886 uint32_t idx; 10887 10888 hdwq = phba->sli4_hba.hdwq; 10889 10890 /* Loop thru all Hardware Queues */ 10891 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10892 /* Free the CQ/WQ corresponding to the Hardware Queue */ 10893 lpfc_sli4_queue_free(hdwq[idx].io_cq); 10894 lpfc_sli4_queue_free(hdwq[idx].io_wq); 10895 hdwq[idx].hba_eq = NULL; 10896 hdwq[idx].io_cq = NULL; 10897 hdwq[idx].io_wq = NULL; 10898 if (phba->cfg_xpsgl && !phba->nvmet_support) 10899 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); 10900 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); 10901 } 10902 /* Loop thru all IRQ vectors */ 10903 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 10904 /* Free the EQ corresponding to the IRQ vector */ 10905 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 10906 lpfc_sli4_queue_free(eq); 10907 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; 10908 } 10909 } 10910 10911 /** 10912 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues 10913 * @phba: pointer to lpfc hba data structure. 10914 * 10915 * This routine is invoked to release all the SLI4 queues with the FCoE HBA 10916 * operation. 10917 * 10918 * Return codes 10919 * 0 - successful 10920 * -ENOMEM - No available memory 10921 * -EIO - The mailbox failed to complete successfully. 10922 **/ 10923 void 10924 lpfc_sli4_queue_destroy(struct lpfc_hba *phba) 10925 { 10926 /* 10927 * Set FREE_INIT before beginning to free the queues. 10928 * Wait until the users of queues to acknowledge to 10929 * release queues by clearing FREE_WAIT. 10930 */ 10931 spin_lock_irq(&phba->hbalock); 10932 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; 10933 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { 10934 spin_unlock_irq(&phba->hbalock); 10935 msleep(20); 10936 spin_lock_irq(&phba->hbalock); 10937 } 10938 spin_unlock_irq(&phba->hbalock); 10939 10940 lpfc_sli4_cleanup_poll_list(phba); 10941 10942 /* Release HBA eqs */ 10943 if (phba->sli4_hba.hdwq) 10944 lpfc_sli4_release_hdwq(phba); 10945 10946 if (phba->nvmet_support) { 10947 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, 10948 phba->cfg_nvmet_mrq); 10949 10950 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, 10951 phba->cfg_nvmet_mrq); 10952 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, 10953 phba->cfg_nvmet_mrq); 10954 } 10955 10956 /* Release mailbox command work queue */ 10957 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); 10958 10959 /* Release ELS work queue */ 10960 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); 10961 10962 /* Release ELS work queue */ 10963 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); 10964 10965 /* Release unsolicited receive queue */ 10966 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); 10967 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); 10968 10969 /* Release ELS complete queue */ 10970 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); 10971 10972 /* Release NVME LS complete queue */ 10973 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); 10974 10975 /* Release mailbox command complete queue */ 10976 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); 10977 10978 /* Everything on this list has been freed */ 10979 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10980 10981 /* Done with freeing the queues */ 10982 spin_lock_irq(&phba->hbalock); 10983 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; 10984 spin_unlock_irq(&phba->hbalock); 10985 } 10986 10987 int 10988 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) 10989 { 10990 struct lpfc_rqb *rqbp; 10991 struct lpfc_dmabuf *h_buf; 10992 struct rqb_dmabuf *rqb_buffer; 10993 10994 rqbp = rq->rqbp; 10995 while (!list_empty(&rqbp->rqb_buffer_list)) { 10996 list_remove_head(&rqbp->rqb_buffer_list, h_buf, 10997 struct lpfc_dmabuf, list); 10998 10999 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); 11000 (rqbp->rqb_free_buffer)(phba, rqb_buffer); 11001 rqbp->buffer_count--; 11002 } 11003 return 1; 11004 } 11005 11006 static int 11007 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, 11008 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, 11009 int qidx, uint32_t qtype) 11010 { 11011 struct lpfc_sli_ring *pring; 11012 int rc; 11013 11014 if (!eq || !cq || !wq) { 11015 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11016 "6085 Fast-path %s (%d) not allocated\n", 11017 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); 11018 return -ENOMEM; 11019 } 11020 11021 /* create the Cq first */ 11022 rc = lpfc_cq_create(phba, cq, eq, 11023 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); 11024 if (rc) { 11025 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11026 "6086 Failed setup of CQ (%d), rc = 0x%x\n", 11027 qidx, (uint32_t)rc); 11028 return rc; 11029 } 11030 11031 if (qtype != LPFC_MBOX) { 11032 /* Setup cq_map for fast lookup */ 11033 if (cq_map) 11034 *cq_map = cq->queue_id; 11035 11036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11037 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", 11038 qidx, cq->queue_id, qidx, eq->queue_id); 11039 11040 /* create the wq */ 11041 rc = lpfc_wq_create(phba, wq, cq, qtype); 11042 if (rc) { 11043 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11044 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", 11045 qidx, (uint32_t)rc); 11046 /* no need to tear down cq - caller will do so */ 11047 return rc; 11048 } 11049 11050 /* Bind this CQ/WQ to the NVME ring */ 11051 pring = wq->pring; 11052 pring->sli.sli4.wqp = (void *)wq; 11053 cq->pring = pring; 11054 11055 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11056 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", 11057 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); 11058 } else { 11059 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); 11060 if (rc) { 11061 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11062 "0539 Failed setup of slow-path MQ: " 11063 "rc = 0x%x\n", rc); 11064 /* no need to tear down cq - caller will do so */ 11065 return rc; 11066 } 11067 11068 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11069 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", 11070 phba->sli4_hba.mbx_wq->queue_id, 11071 phba->sli4_hba.mbx_cq->queue_id); 11072 } 11073 11074 return 0; 11075 } 11076 11077 /** 11078 * lpfc_setup_cq_lookup - Setup the CQ lookup table 11079 * @phba: pointer to lpfc hba data structure. 11080 * 11081 * This routine will populate the cq_lookup table by all 11082 * available CQ queue_id's. 11083 **/ 11084 static void 11085 lpfc_setup_cq_lookup(struct lpfc_hba *phba) 11086 { 11087 struct lpfc_queue *eq, *childq; 11088 int qidx; 11089 11090 memset(phba->sli4_hba.cq_lookup, 0, 11091 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); 11092 /* Loop thru all IRQ vectors */ 11093 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11094 /* Get the EQ corresponding to the IRQ vector */ 11095 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11096 if (!eq) 11097 continue; 11098 /* Loop through all CQs associated with that EQ */ 11099 list_for_each_entry(childq, &eq->child_list, list) { 11100 if (childq->queue_id > phba->sli4_hba.cq_max) 11101 continue; 11102 if (childq->subtype == LPFC_IO) 11103 phba->sli4_hba.cq_lookup[childq->queue_id] = 11104 childq; 11105 } 11106 } 11107 } 11108 11109 /** 11110 * lpfc_sli4_queue_setup - Set up all the SLI4 queues 11111 * @phba: pointer to lpfc hba data structure. 11112 * 11113 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA 11114 * operation. 11115 * 11116 * Return codes 11117 * 0 - successful 11118 * -ENOMEM - No available memory 11119 * -EIO - The mailbox failed to complete successfully. 11120 **/ 11121 int 11122 lpfc_sli4_queue_setup(struct lpfc_hba *phba) 11123 { 11124 uint32_t shdr_status, shdr_add_status; 11125 union lpfc_sli4_cfg_shdr *shdr; 11126 struct lpfc_vector_map_info *cpup; 11127 struct lpfc_sli4_hdw_queue *qp; 11128 LPFC_MBOXQ_t *mboxq; 11129 int qidx, cpu; 11130 uint32_t length, usdelay; 11131 int rc = -ENOMEM; 11132 11133 /* Check for dual-ULP support */ 11134 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 11135 if (!mboxq) { 11136 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11137 "3249 Unable to allocate memory for " 11138 "QUERY_FW_CFG mailbox command\n"); 11139 return -ENOMEM; 11140 } 11141 length = (sizeof(struct lpfc_mbx_query_fw_config) - 11142 sizeof(struct lpfc_sli4_cfg_mhdr)); 11143 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11144 LPFC_MBOX_OPCODE_QUERY_FW_CFG, 11145 length, LPFC_SLI4_MBX_EMBED); 11146 11147 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11148 11149 shdr = (union lpfc_sli4_cfg_shdr *) 11150 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11151 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11152 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 11153 if (shdr_status || shdr_add_status || rc) { 11154 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11155 "3250 QUERY_FW_CFG mailbox failed with status " 11156 "x%x add_status x%x, mbx status x%x\n", 11157 shdr_status, shdr_add_status, rc); 11158 mempool_free(mboxq, phba->mbox_mem_pool); 11159 rc = -ENXIO; 11160 goto out_error; 11161 } 11162 11163 phba->sli4_hba.fw_func_mode = 11164 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; 11165 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; 11166 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; 11167 phba->sli4_hba.physical_port = 11168 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; 11169 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11170 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " 11171 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, 11172 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); 11173 11174 mempool_free(mboxq, phba->mbox_mem_pool); 11175 11176 /* 11177 * Set up HBA Event Queues (EQs) 11178 */ 11179 qp = phba->sli4_hba.hdwq; 11180 11181 /* Set up HBA event queue */ 11182 if (!qp) { 11183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11184 "3147 Fast-path EQs not allocated\n"); 11185 rc = -ENOMEM; 11186 goto out_error; 11187 } 11188 11189 /* Loop thru all IRQ vectors */ 11190 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11191 /* Create HBA Event Queues (EQs) in order */ 11192 for_each_present_cpu(cpu) { 11193 cpup = &phba->sli4_hba.cpu_map[cpu]; 11194 11195 /* Look for the CPU thats using that vector with 11196 * LPFC_CPU_FIRST_IRQ set. 11197 */ 11198 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 11199 continue; 11200 if (qidx != cpup->eq) 11201 continue; 11202 11203 /* Create an EQ for that vector */ 11204 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, 11205 phba->cfg_fcp_imax); 11206 if (rc) { 11207 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11208 "0523 Failed setup of fast-path" 11209 " EQ (%d), rc = 0x%x\n", 11210 cpup->eq, (uint32_t)rc); 11211 goto out_destroy; 11212 } 11213 11214 /* Save the EQ for that vector in the hba_eq_hdl */ 11215 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = 11216 qp[cpup->hdwq].hba_eq; 11217 11218 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11219 "2584 HBA EQ setup: queue[%d]-id=%d\n", 11220 cpup->eq, 11221 qp[cpup->hdwq].hba_eq->queue_id); 11222 } 11223 } 11224 11225 /* Loop thru all Hardware Queues */ 11226 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11227 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); 11228 cpup = &phba->sli4_hba.cpu_map[cpu]; 11229 11230 /* Create the CQ/WQ corresponding to the Hardware Queue */ 11231 rc = lpfc_create_wq_cq(phba, 11232 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 11233 qp[qidx].io_cq, 11234 qp[qidx].io_wq, 11235 &phba->sli4_hba.hdwq[qidx].io_cq_map, 11236 qidx, 11237 LPFC_IO); 11238 if (rc) { 11239 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11240 "0535 Failed to setup fastpath " 11241 "IO WQ/CQ (%d), rc = 0x%x\n", 11242 qidx, (uint32_t)rc); 11243 goto out_destroy; 11244 } 11245 } 11246 11247 /* 11248 * Set up Slow Path Complete Queues (CQs) 11249 */ 11250 11251 /* Set up slow-path MBOX CQ/MQ */ 11252 11253 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { 11254 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11255 "0528 %s not allocated\n", 11256 phba->sli4_hba.mbx_cq ? 11257 "Mailbox WQ" : "Mailbox CQ"); 11258 rc = -ENOMEM; 11259 goto out_destroy; 11260 } 11261 11262 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11263 phba->sli4_hba.mbx_cq, 11264 phba->sli4_hba.mbx_wq, 11265 NULL, 0, LPFC_MBOX); 11266 if (rc) { 11267 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11268 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", 11269 (uint32_t)rc); 11270 goto out_destroy; 11271 } 11272 if (phba->nvmet_support) { 11273 if (!phba->sli4_hba.nvmet_cqset) { 11274 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11275 "3165 Fast-path NVME CQ Set " 11276 "array not allocated\n"); 11277 rc = -ENOMEM; 11278 goto out_destroy; 11279 } 11280 if (phba->cfg_nvmet_mrq > 1) { 11281 rc = lpfc_cq_create_set(phba, 11282 phba->sli4_hba.nvmet_cqset, 11283 qp, 11284 LPFC_WCQ, LPFC_NVMET); 11285 if (rc) { 11286 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11287 "3164 Failed setup of NVME CQ " 11288 "Set, rc = 0x%x\n", 11289 (uint32_t)rc); 11290 goto out_destroy; 11291 } 11292 } else { 11293 /* Set up NVMET Receive Complete Queue */ 11294 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], 11295 qp[0].hba_eq, 11296 LPFC_WCQ, LPFC_NVMET); 11297 if (rc) { 11298 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11299 "6089 Failed setup NVMET CQ: " 11300 "rc = 0x%x\n", (uint32_t)rc); 11301 goto out_destroy; 11302 } 11303 phba->sli4_hba.nvmet_cqset[0]->chann = 0; 11304 11305 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11306 "6090 NVMET CQ setup: cq-id=%d, " 11307 "parent eq-id=%d\n", 11308 phba->sli4_hba.nvmet_cqset[0]->queue_id, 11309 qp[0].hba_eq->queue_id); 11310 } 11311 } 11312 11313 /* Set up slow-path ELS WQ/CQ */ 11314 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { 11315 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11316 "0530 ELS %s not allocated\n", 11317 phba->sli4_hba.els_cq ? "WQ" : "CQ"); 11318 rc = -ENOMEM; 11319 goto out_destroy; 11320 } 11321 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11322 phba->sli4_hba.els_cq, 11323 phba->sli4_hba.els_wq, 11324 NULL, 0, LPFC_ELS); 11325 if (rc) { 11326 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11327 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", 11328 (uint32_t)rc); 11329 goto out_destroy; 11330 } 11331 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11332 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", 11333 phba->sli4_hba.els_wq->queue_id, 11334 phba->sli4_hba.els_cq->queue_id); 11335 11336 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11337 /* Set up NVME LS Complete Queue */ 11338 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { 11339 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11340 "6091 LS %s not allocated\n", 11341 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); 11342 rc = -ENOMEM; 11343 goto out_destroy; 11344 } 11345 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11346 phba->sli4_hba.nvmels_cq, 11347 phba->sli4_hba.nvmels_wq, 11348 NULL, 0, LPFC_NVME_LS); 11349 if (rc) { 11350 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11351 "0526 Failed setup of NVVME LS WQ/CQ: " 11352 "rc = 0x%x\n", (uint32_t)rc); 11353 goto out_destroy; 11354 } 11355 11356 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11357 "6096 ELS WQ setup: wq-id=%d, " 11358 "parent cq-id=%d\n", 11359 phba->sli4_hba.nvmels_wq->queue_id, 11360 phba->sli4_hba.nvmels_cq->queue_id); 11361 } 11362 11363 /* 11364 * Create NVMET Receive Queue (RQ) 11365 */ 11366 if (phba->nvmet_support) { 11367 if ((!phba->sli4_hba.nvmet_cqset) || 11368 (!phba->sli4_hba.nvmet_mrq_hdr) || 11369 (!phba->sli4_hba.nvmet_mrq_data)) { 11370 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11371 "6130 MRQ CQ Queues not " 11372 "allocated\n"); 11373 rc = -ENOMEM; 11374 goto out_destroy; 11375 } 11376 if (phba->cfg_nvmet_mrq > 1) { 11377 rc = lpfc_mrq_create(phba, 11378 phba->sli4_hba.nvmet_mrq_hdr, 11379 phba->sli4_hba.nvmet_mrq_data, 11380 phba->sli4_hba.nvmet_cqset, 11381 LPFC_NVMET); 11382 if (rc) { 11383 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11384 "6098 Failed setup of NVMET " 11385 "MRQ: rc = 0x%x\n", 11386 (uint32_t)rc); 11387 goto out_destroy; 11388 } 11389 11390 } else { 11391 rc = lpfc_rq_create(phba, 11392 phba->sli4_hba.nvmet_mrq_hdr[0], 11393 phba->sli4_hba.nvmet_mrq_data[0], 11394 phba->sli4_hba.nvmet_cqset[0], 11395 LPFC_NVMET); 11396 if (rc) { 11397 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11398 "6057 Failed setup of NVMET " 11399 "Receive Queue: rc = 0x%x\n", 11400 (uint32_t)rc); 11401 goto out_destroy; 11402 } 11403 11404 lpfc_printf_log( 11405 phba, KERN_INFO, LOG_INIT, 11406 "6099 NVMET RQ setup: hdr-rq-id=%d, " 11407 "dat-rq-id=%d parent cq-id=%d\n", 11408 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, 11409 phba->sli4_hba.nvmet_mrq_data[0]->queue_id, 11410 phba->sli4_hba.nvmet_cqset[0]->queue_id); 11411 11412 } 11413 } 11414 11415 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { 11416 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11417 "0540 Receive Queue not allocated\n"); 11418 rc = -ENOMEM; 11419 goto out_destroy; 11420 } 11421 11422 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, 11423 phba->sli4_hba.els_cq, LPFC_USOL); 11424 if (rc) { 11425 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11426 "0541 Failed setup of Receive Queue: " 11427 "rc = 0x%x\n", (uint32_t)rc); 11428 goto out_destroy; 11429 } 11430 11431 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11432 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " 11433 "parent cq-id=%d\n", 11434 phba->sli4_hba.hdr_rq->queue_id, 11435 phba->sli4_hba.dat_rq->queue_id, 11436 phba->sli4_hba.els_cq->queue_id); 11437 11438 if (phba->cfg_fcp_imax) 11439 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; 11440 else 11441 usdelay = 0; 11442 11443 for (qidx = 0; qidx < phba->cfg_irq_chann; 11444 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) 11445 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, 11446 usdelay); 11447 11448 if (phba->sli4_hba.cq_max) { 11449 kfree(phba->sli4_hba.cq_lookup); 11450 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), 11451 sizeof(struct lpfc_queue *), GFP_KERNEL); 11452 if (!phba->sli4_hba.cq_lookup) { 11453 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11454 "0549 Failed setup of CQ Lookup table: " 11455 "size 0x%x\n", phba->sli4_hba.cq_max); 11456 rc = -ENOMEM; 11457 goto out_destroy; 11458 } 11459 lpfc_setup_cq_lookup(phba); 11460 } 11461 return 0; 11462 11463 out_destroy: 11464 lpfc_sli4_queue_unset(phba); 11465 out_error: 11466 return rc; 11467 } 11468 11469 /** 11470 * lpfc_sli4_queue_unset - Unset all the SLI4 queues 11471 * @phba: pointer to lpfc hba data structure. 11472 * 11473 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA 11474 * operation. 11475 * 11476 * Return codes 11477 * 0 - successful 11478 * -ENOMEM - No available memory 11479 * -EIO - The mailbox failed to complete successfully. 11480 **/ 11481 void 11482 lpfc_sli4_queue_unset(struct lpfc_hba *phba) 11483 { 11484 struct lpfc_sli4_hdw_queue *qp; 11485 struct lpfc_queue *eq; 11486 int qidx; 11487 11488 /* Unset mailbox command work queue */ 11489 if (phba->sli4_hba.mbx_wq) 11490 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); 11491 11492 /* Unset NVME LS work queue */ 11493 if (phba->sli4_hba.nvmels_wq) 11494 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); 11495 11496 /* Unset ELS work queue */ 11497 if (phba->sli4_hba.els_wq) 11498 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); 11499 11500 /* Unset unsolicited receive queue */ 11501 if (phba->sli4_hba.hdr_rq) 11502 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, 11503 phba->sli4_hba.dat_rq); 11504 11505 /* Unset mailbox command complete queue */ 11506 if (phba->sli4_hba.mbx_cq) 11507 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); 11508 11509 /* Unset ELS complete queue */ 11510 if (phba->sli4_hba.els_cq) 11511 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); 11512 11513 /* Unset NVME LS complete queue */ 11514 if (phba->sli4_hba.nvmels_cq) 11515 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); 11516 11517 if (phba->nvmet_support) { 11518 /* Unset NVMET MRQ queue */ 11519 if (phba->sli4_hba.nvmet_mrq_hdr) { 11520 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11521 lpfc_rq_destroy( 11522 phba, 11523 phba->sli4_hba.nvmet_mrq_hdr[qidx], 11524 phba->sli4_hba.nvmet_mrq_data[qidx]); 11525 } 11526 11527 /* Unset NVMET CQ Set complete queue */ 11528 if (phba->sli4_hba.nvmet_cqset) { 11529 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11530 lpfc_cq_destroy( 11531 phba, phba->sli4_hba.nvmet_cqset[qidx]); 11532 } 11533 } 11534 11535 /* Unset fast-path SLI4 queues */ 11536 if (phba->sli4_hba.hdwq) { 11537 /* Loop thru all Hardware Queues */ 11538 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11539 /* Destroy the CQ/WQ corresponding to Hardware Queue */ 11540 qp = &phba->sli4_hba.hdwq[qidx]; 11541 lpfc_wq_destroy(phba, qp->io_wq); 11542 lpfc_cq_destroy(phba, qp->io_cq); 11543 } 11544 /* Loop thru all IRQ vectors */ 11545 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11546 /* Destroy the EQ corresponding to the IRQ vector */ 11547 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11548 lpfc_eq_destroy(phba, eq); 11549 } 11550 } 11551 11552 kfree(phba->sli4_hba.cq_lookup); 11553 phba->sli4_hba.cq_lookup = NULL; 11554 phba->sli4_hba.cq_max = 0; 11555 } 11556 11557 /** 11558 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool 11559 * @phba: pointer to lpfc hba data structure. 11560 * 11561 * This routine is invoked to allocate and set up a pool of completion queue 11562 * events. The body of the completion queue event is a completion queue entry 11563 * CQE. For now, this pool is used for the interrupt service routine to queue 11564 * the following HBA completion queue events for the worker thread to process: 11565 * - Mailbox asynchronous events 11566 * - Receive queue completion unsolicited events 11567 * Later, this can be used for all the slow-path events. 11568 * 11569 * Return codes 11570 * 0 - successful 11571 * -ENOMEM - No available memory 11572 **/ 11573 static int 11574 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) 11575 { 11576 struct lpfc_cq_event *cq_event; 11577 int i; 11578 11579 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { 11580 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); 11581 if (!cq_event) 11582 goto out_pool_create_fail; 11583 list_add_tail(&cq_event->list, 11584 &phba->sli4_hba.sp_cqe_event_pool); 11585 } 11586 return 0; 11587 11588 out_pool_create_fail: 11589 lpfc_sli4_cq_event_pool_destroy(phba); 11590 return -ENOMEM; 11591 } 11592 11593 /** 11594 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool 11595 * @phba: pointer to lpfc hba data structure. 11596 * 11597 * This routine is invoked to free the pool of completion queue events at 11598 * driver unload time. Note that, it is the responsibility of the driver 11599 * cleanup routine to free all the outstanding completion-queue events 11600 * allocated from this pool back into the pool before invoking this routine 11601 * to destroy the pool. 11602 **/ 11603 static void 11604 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) 11605 { 11606 struct lpfc_cq_event *cq_event, *next_cq_event; 11607 11608 list_for_each_entry_safe(cq_event, next_cq_event, 11609 &phba->sli4_hba.sp_cqe_event_pool, list) { 11610 list_del(&cq_event->list); 11611 kfree(cq_event); 11612 } 11613 } 11614 11615 /** 11616 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11617 * @phba: pointer to lpfc hba data structure. 11618 * 11619 * This routine is the lock free version of the API invoked to allocate a 11620 * completion-queue event from the free pool. 11621 * 11622 * Return: Pointer to the newly allocated completion-queue event if successful 11623 * NULL otherwise. 11624 **/ 11625 struct lpfc_cq_event * 11626 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11627 { 11628 struct lpfc_cq_event *cq_event = NULL; 11629 11630 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, 11631 struct lpfc_cq_event, list); 11632 return cq_event; 11633 } 11634 11635 /** 11636 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11637 * @phba: pointer to lpfc hba data structure. 11638 * 11639 * This routine is the lock version of the API invoked to allocate a 11640 * completion-queue event from the free pool. 11641 * 11642 * Return: Pointer to the newly allocated completion-queue event if successful 11643 * NULL otherwise. 11644 **/ 11645 struct lpfc_cq_event * 11646 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11647 { 11648 struct lpfc_cq_event *cq_event; 11649 unsigned long iflags; 11650 11651 spin_lock_irqsave(&phba->hbalock, iflags); 11652 cq_event = __lpfc_sli4_cq_event_alloc(phba); 11653 spin_unlock_irqrestore(&phba->hbalock, iflags); 11654 return cq_event; 11655 } 11656 11657 /** 11658 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11659 * @phba: pointer to lpfc hba data structure. 11660 * @cq_event: pointer to the completion queue event to be freed. 11661 * 11662 * This routine is the lock free version of the API invoked to release a 11663 * completion-queue event back into the free pool. 11664 **/ 11665 void 11666 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11667 struct lpfc_cq_event *cq_event) 11668 { 11669 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); 11670 } 11671 11672 /** 11673 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11674 * @phba: pointer to lpfc hba data structure. 11675 * @cq_event: pointer to the completion queue event to be freed. 11676 * 11677 * This routine is the lock version of the API invoked to release a 11678 * completion-queue event back into the free pool. 11679 **/ 11680 void 11681 lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11682 struct lpfc_cq_event *cq_event) 11683 { 11684 unsigned long iflags; 11685 spin_lock_irqsave(&phba->hbalock, iflags); 11686 __lpfc_sli4_cq_event_release(phba, cq_event); 11687 spin_unlock_irqrestore(&phba->hbalock, iflags); 11688 } 11689 11690 /** 11691 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool 11692 * @phba: pointer to lpfc hba data structure. 11693 * 11694 * This routine is to free all the pending completion-queue events to the 11695 * back into the free pool for device reset. 11696 **/ 11697 static void 11698 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) 11699 { 11700 LIST_HEAD(cq_event_list); 11701 struct lpfc_cq_event *cq_event; 11702 unsigned long iflags; 11703 11704 /* Retrieve all the pending WCQEs from pending WCQE lists */ 11705 11706 /* Pending ELS XRI abort events */ 11707 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11708 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, 11709 &cq_event_list); 11710 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11711 11712 /* Pending asynnc events */ 11713 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 11714 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, 11715 &cq_event_list); 11716 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 11717 11718 while (!list_empty(&cq_event_list)) { 11719 list_remove_head(&cq_event_list, cq_event, 11720 struct lpfc_cq_event, list); 11721 lpfc_sli4_cq_event_release(phba, cq_event); 11722 } 11723 } 11724 11725 /** 11726 * lpfc_pci_function_reset - Reset pci function. 11727 * @phba: pointer to lpfc hba data structure. 11728 * 11729 * This routine is invoked to request a PCI function reset. It will destroys 11730 * all resources assigned to the PCI function which originates this request. 11731 * 11732 * Return codes 11733 * 0 - successful 11734 * -ENOMEM - No available memory 11735 * -EIO - The mailbox failed to complete successfully. 11736 **/ 11737 int 11738 lpfc_pci_function_reset(struct lpfc_hba *phba) 11739 { 11740 LPFC_MBOXQ_t *mboxq; 11741 uint32_t rc = 0, if_type; 11742 uint32_t shdr_status, shdr_add_status; 11743 uint32_t rdy_chk; 11744 uint32_t port_reset = 0; 11745 union lpfc_sli4_cfg_shdr *shdr; 11746 struct lpfc_register reg_data; 11747 uint16_t devid; 11748 11749 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11750 switch (if_type) { 11751 case LPFC_SLI_INTF_IF_TYPE_0: 11752 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 11753 GFP_KERNEL); 11754 if (!mboxq) { 11755 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11756 "0494 Unable to allocate memory for " 11757 "issuing SLI_FUNCTION_RESET mailbox " 11758 "command\n"); 11759 return -ENOMEM; 11760 } 11761 11762 /* Setup PCI function reset mailbox-ioctl command */ 11763 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11764 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, 11765 LPFC_SLI4_MBX_EMBED); 11766 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11767 shdr = (union lpfc_sli4_cfg_shdr *) 11768 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11769 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11770 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 11771 &shdr->response); 11772 mempool_free(mboxq, phba->mbox_mem_pool); 11773 if (shdr_status || shdr_add_status || rc) { 11774 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11775 "0495 SLI_FUNCTION_RESET mailbox " 11776 "failed with status x%x add_status x%x," 11777 " mbx status x%x\n", 11778 shdr_status, shdr_add_status, rc); 11779 rc = -ENXIO; 11780 } 11781 break; 11782 case LPFC_SLI_INTF_IF_TYPE_2: 11783 case LPFC_SLI_INTF_IF_TYPE_6: 11784 wait: 11785 /* 11786 * Poll the Port Status Register and wait for RDY for 11787 * up to 30 seconds. If the port doesn't respond, treat 11788 * it as an error. 11789 */ 11790 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { 11791 if (lpfc_readl(phba->sli4_hba.u.if_type2. 11792 STATUSregaddr, ®_data.word0)) { 11793 rc = -ENODEV; 11794 goto out; 11795 } 11796 if (bf_get(lpfc_sliport_status_rdy, ®_data)) 11797 break; 11798 msleep(20); 11799 } 11800 11801 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { 11802 phba->work_status[0] = readl( 11803 phba->sli4_hba.u.if_type2.ERR1regaddr); 11804 phba->work_status[1] = readl( 11805 phba->sli4_hba.u.if_type2.ERR2regaddr); 11806 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11807 "2890 Port not ready, port status reg " 11808 "0x%x error 1=0x%x, error 2=0x%x\n", 11809 reg_data.word0, 11810 phba->work_status[0], 11811 phba->work_status[1]); 11812 rc = -ENODEV; 11813 goto out; 11814 } 11815 11816 if (bf_get(lpfc_sliport_status_pldv, ®_data)) 11817 lpfc_pldv_detect = true; 11818 11819 if (!port_reset) { 11820 /* 11821 * Reset the port now 11822 */ 11823 reg_data.word0 = 0; 11824 bf_set(lpfc_sliport_ctrl_end, ®_data, 11825 LPFC_SLIPORT_LITTLE_ENDIAN); 11826 bf_set(lpfc_sliport_ctrl_ip, ®_data, 11827 LPFC_SLIPORT_INIT_PORT); 11828 writel(reg_data.word0, phba->sli4_hba.u.if_type2. 11829 CTRLregaddr); 11830 /* flush */ 11831 pci_read_config_word(phba->pcidev, 11832 PCI_DEVICE_ID, &devid); 11833 11834 port_reset = 1; 11835 msleep(20); 11836 goto wait; 11837 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { 11838 rc = -ENODEV; 11839 goto out; 11840 } 11841 break; 11842 11843 case LPFC_SLI_INTF_IF_TYPE_1: 11844 default: 11845 break; 11846 } 11847 11848 out: 11849 /* Catch the not-ready port failure after a port reset. */ 11850 if (rc) { 11851 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11852 "3317 HBA not functional: IP Reset Failed " 11853 "try: echo fw_reset > board_mode\n"); 11854 rc = -ENODEV; 11855 } 11856 11857 return rc; 11858 } 11859 11860 /** 11861 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. 11862 * @phba: pointer to lpfc hba data structure. 11863 * 11864 * This routine is invoked to set up the PCI device memory space for device 11865 * with SLI-4 interface spec. 11866 * 11867 * Return codes 11868 * 0 - successful 11869 * other values - error 11870 **/ 11871 static int 11872 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) 11873 { 11874 struct pci_dev *pdev = phba->pcidev; 11875 unsigned long bar0map_len, bar1map_len, bar2map_len; 11876 int error; 11877 uint32_t if_type; 11878 11879 if (!pdev) 11880 return -ENODEV; 11881 11882 /* Set the device DMA mask size */ 11883 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11884 if (error) 11885 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 11886 if (error) 11887 return error; 11888 11889 /* 11890 * The BARs and register set definitions and offset locations are 11891 * dependent on the if_type. 11892 */ 11893 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, 11894 &phba->sli4_hba.sli_intf.word0)) { 11895 return -ENODEV; 11896 } 11897 11898 /* There is no SLI3 failback for SLI4 devices. */ 11899 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != 11900 LPFC_SLI_INTF_VALID) { 11901 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11902 "2894 SLI_INTF reg contents invalid " 11903 "sli_intf reg 0x%x\n", 11904 phba->sli4_hba.sli_intf.word0); 11905 return -ENODEV; 11906 } 11907 11908 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11909 /* 11910 * Get the bus address of SLI4 device Bar regions and the 11911 * number of bytes required by each mapping. The mapping of the 11912 * particular PCI BARs regions is dependent on the type of 11913 * SLI4 device. 11914 */ 11915 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { 11916 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); 11917 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); 11918 11919 /* 11920 * Map SLI4 PCI Config Space Register base to a kernel virtual 11921 * addr 11922 */ 11923 phba->sli4_hba.conf_regs_memmap_p = 11924 ioremap(phba->pci_bar0_map, bar0map_len); 11925 if (!phba->sli4_hba.conf_regs_memmap_p) { 11926 dev_printk(KERN_ERR, &pdev->dev, 11927 "ioremap failed for SLI4 PCI config " 11928 "registers.\n"); 11929 return -ENODEV; 11930 } 11931 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; 11932 /* Set up BAR0 PCI config space register memory map */ 11933 lpfc_sli4_bar0_register_memmap(phba, if_type); 11934 } else { 11935 phba->pci_bar0_map = pci_resource_start(pdev, 1); 11936 bar0map_len = pci_resource_len(pdev, 1); 11937 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 11938 dev_printk(KERN_ERR, &pdev->dev, 11939 "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); 11940 return -ENODEV; 11941 } 11942 phba->sli4_hba.conf_regs_memmap_p = 11943 ioremap(phba->pci_bar0_map, bar0map_len); 11944 if (!phba->sli4_hba.conf_regs_memmap_p) { 11945 dev_printk(KERN_ERR, &pdev->dev, 11946 "ioremap failed for SLI4 PCI config " 11947 "registers.\n"); 11948 return -ENODEV; 11949 } 11950 lpfc_sli4_bar0_register_memmap(phba, if_type); 11951 } 11952 11953 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11954 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { 11955 /* 11956 * Map SLI4 if type 0 HBA Control Register base to a 11957 * kernel virtual address and setup the registers. 11958 */ 11959 phba->pci_bar1_map = pci_resource_start(pdev, 11960 PCI_64BIT_BAR2); 11961 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11962 phba->sli4_hba.ctrl_regs_memmap_p = 11963 ioremap(phba->pci_bar1_map, 11964 bar1map_len); 11965 if (!phba->sli4_hba.ctrl_regs_memmap_p) { 11966 dev_err(&pdev->dev, 11967 "ioremap failed for SLI4 HBA " 11968 "control registers.\n"); 11969 error = -ENOMEM; 11970 goto out_iounmap_conf; 11971 } 11972 phba->pci_bar2_memmap_p = 11973 phba->sli4_hba.ctrl_regs_memmap_p; 11974 lpfc_sli4_bar1_register_memmap(phba, if_type); 11975 } else { 11976 error = -ENOMEM; 11977 goto out_iounmap_conf; 11978 } 11979 } 11980 11981 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && 11982 (pci_resource_start(pdev, PCI_64BIT_BAR2))) { 11983 /* 11984 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel 11985 * virtual address and setup the registers. 11986 */ 11987 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); 11988 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11989 phba->sli4_hba.drbl_regs_memmap_p = 11990 ioremap(phba->pci_bar1_map, bar1map_len); 11991 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11992 dev_err(&pdev->dev, 11993 "ioremap failed for SLI4 HBA doorbell registers.\n"); 11994 error = -ENOMEM; 11995 goto out_iounmap_conf; 11996 } 11997 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; 11998 lpfc_sli4_bar1_register_memmap(phba, if_type); 11999 } 12000 12001 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 12002 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { 12003 /* 12004 * Map SLI4 if type 0 HBA Doorbell Register base to 12005 * a kernel virtual address and setup the registers. 12006 */ 12007 phba->pci_bar2_map = pci_resource_start(pdev, 12008 PCI_64BIT_BAR4); 12009 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 12010 phba->sli4_hba.drbl_regs_memmap_p = 12011 ioremap(phba->pci_bar2_map, 12012 bar2map_len); 12013 if (!phba->sli4_hba.drbl_regs_memmap_p) { 12014 dev_err(&pdev->dev, 12015 "ioremap failed for SLI4 HBA" 12016 " doorbell registers.\n"); 12017 error = -ENOMEM; 12018 goto out_iounmap_ctrl; 12019 } 12020 phba->pci_bar4_memmap_p = 12021 phba->sli4_hba.drbl_regs_memmap_p; 12022 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); 12023 if (error) 12024 goto out_iounmap_all; 12025 } else { 12026 error = -ENOMEM; 12027 goto out_iounmap_ctrl; 12028 } 12029 } 12030 12031 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && 12032 pci_resource_start(pdev, PCI_64BIT_BAR4)) { 12033 /* 12034 * Map SLI4 if type 6 HBA DPP Register base to a kernel 12035 * virtual address and setup the registers. 12036 */ 12037 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); 12038 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 12039 phba->sli4_hba.dpp_regs_memmap_p = 12040 ioremap(phba->pci_bar2_map, bar2map_len); 12041 if (!phba->sli4_hba.dpp_regs_memmap_p) { 12042 dev_err(&pdev->dev, 12043 "ioremap failed for SLI4 HBA dpp registers.\n"); 12044 error = -ENOMEM; 12045 goto out_iounmap_all; 12046 } 12047 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; 12048 } 12049 12050 /* Set up the EQ/CQ register handeling functions now */ 12051 switch (if_type) { 12052 case LPFC_SLI_INTF_IF_TYPE_0: 12053 case LPFC_SLI_INTF_IF_TYPE_2: 12054 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; 12055 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; 12056 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; 12057 break; 12058 case LPFC_SLI_INTF_IF_TYPE_6: 12059 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; 12060 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; 12061 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; 12062 break; 12063 default: 12064 break; 12065 } 12066 12067 return 0; 12068 12069 out_iounmap_all: 12070 if (phba->sli4_hba.drbl_regs_memmap_p) 12071 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12072 out_iounmap_ctrl: 12073 if (phba->sli4_hba.ctrl_regs_memmap_p) 12074 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12075 out_iounmap_conf: 12076 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12077 12078 return error; 12079 } 12080 12081 /** 12082 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. 12083 * @phba: pointer to lpfc hba data structure. 12084 * 12085 * This routine is invoked to unset the PCI device memory space for device 12086 * with SLI-4 interface spec. 12087 **/ 12088 static void 12089 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) 12090 { 12091 uint32_t if_type; 12092 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 12093 12094 switch (if_type) { 12095 case LPFC_SLI_INTF_IF_TYPE_0: 12096 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12097 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12098 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12099 break; 12100 case LPFC_SLI_INTF_IF_TYPE_2: 12101 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12102 break; 12103 case LPFC_SLI_INTF_IF_TYPE_6: 12104 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12105 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12106 if (phba->sli4_hba.dpp_regs_memmap_p) 12107 iounmap(phba->sli4_hba.dpp_regs_memmap_p); 12108 break; 12109 case LPFC_SLI_INTF_IF_TYPE_1: 12110 default: 12111 dev_printk(KERN_ERR, &phba->pcidev->dev, 12112 "FATAL - unsupported SLI4 interface type - %d\n", 12113 if_type); 12114 break; 12115 } 12116 } 12117 12118 /** 12119 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device 12120 * @phba: pointer to lpfc hba data structure. 12121 * 12122 * This routine is invoked to enable the MSI-X interrupt vectors to device 12123 * with SLI-3 interface specs. 12124 * 12125 * Return codes 12126 * 0 - successful 12127 * other values - error 12128 **/ 12129 static int 12130 lpfc_sli_enable_msix(struct lpfc_hba *phba) 12131 { 12132 int rc; 12133 LPFC_MBOXQ_t *pmb; 12134 12135 /* Set up MSI-X multi-message vectors */ 12136 rc = pci_alloc_irq_vectors(phba->pcidev, 12137 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); 12138 if (rc < 0) { 12139 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12140 "0420 PCI enable MSI-X failed (%d)\n", rc); 12141 goto vec_fail_out; 12142 } 12143 12144 /* 12145 * Assign MSI-X vectors to interrupt handlers 12146 */ 12147 12148 /* vector-0 is associated to slow-path handler */ 12149 rc = request_irq(pci_irq_vector(phba->pcidev, 0), 12150 &lpfc_sli_sp_intr_handler, 0, 12151 LPFC_SP_DRIVER_HANDLER_NAME, phba); 12152 if (rc) { 12153 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12154 "0421 MSI-X slow-path request_irq failed " 12155 "(%d)\n", rc); 12156 goto msi_fail_out; 12157 } 12158 12159 /* vector-1 is associated to fast-path handler */ 12160 rc = request_irq(pci_irq_vector(phba->pcidev, 1), 12161 &lpfc_sli_fp_intr_handler, 0, 12162 LPFC_FP_DRIVER_HANDLER_NAME, phba); 12163 12164 if (rc) { 12165 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12166 "0429 MSI-X fast-path request_irq failed " 12167 "(%d)\n", rc); 12168 goto irq_fail_out; 12169 } 12170 12171 /* 12172 * Configure HBA MSI-X attention conditions to messages 12173 */ 12174 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 12175 12176 if (!pmb) { 12177 rc = -ENOMEM; 12178 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 12179 "0474 Unable to allocate memory for issuing " 12180 "MBOX_CONFIG_MSI command\n"); 12181 goto mem_fail_out; 12182 } 12183 rc = lpfc_config_msi(phba, pmb); 12184 if (rc) 12185 goto mbx_fail_out; 12186 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 12187 if (rc != MBX_SUCCESS) { 12188 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, 12189 "0351 Config MSI mailbox command failed, " 12190 "mbxCmd x%x, mbxStatus x%x\n", 12191 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); 12192 goto mbx_fail_out; 12193 } 12194 12195 /* Free memory allocated for mailbox command */ 12196 mempool_free(pmb, phba->mbox_mem_pool); 12197 return rc; 12198 12199 mbx_fail_out: 12200 /* Free memory allocated for mailbox command */ 12201 mempool_free(pmb, phba->mbox_mem_pool); 12202 12203 mem_fail_out: 12204 /* free the irq already requested */ 12205 free_irq(pci_irq_vector(phba->pcidev, 1), phba); 12206 12207 irq_fail_out: 12208 /* free the irq already requested */ 12209 free_irq(pci_irq_vector(phba->pcidev, 0), phba); 12210 12211 msi_fail_out: 12212 /* Unconfigure MSI-X capability structure */ 12213 pci_free_irq_vectors(phba->pcidev); 12214 12215 vec_fail_out: 12216 return rc; 12217 } 12218 12219 /** 12220 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. 12221 * @phba: pointer to lpfc hba data structure. 12222 * 12223 * This routine is invoked to enable the MSI interrupt mode to device with 12224 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to 12225 * enable the MSI vector. The device driver is responsible for calling the 12226 * request_irq() to register MSI vector with a interrupt the handler, which 12227 * is done in this function. 12228 * 12229 * Return codes 12230 * 0 - successful 12231 * other values - error 12232 */ 12233 static int 12234 lpfc_sli_enable_msi(struct lpfc_hba *phba) 12235 { 12236 int rc; 12237 12238 rc = pci_enable_msi(phba->pcidev); 12239 if (!rc) 12240 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12241 "0012 PCI enable MSI mode success.\n"); 12242 else { 12243 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12244 "0471 PCI enable MSI mode failed (%d)\n", rc); 12245 return rc; 12246 } 12247 12248 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12249 0, LPFC_DRIVER_NAME, phba); 12250 if (rc) { 12251 pci_disable_msi(phba->pcidev); 12252 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12253 "0478 MSI request_irq failed (%d)\n", rc); 12254 } 12255 return rc; 12256 } 12257 12258 /** 12259 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. 12260 * @phba: pointer to lpfc hba data structure. 12261 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 12262 * 12263 * This routine is invoked to enable device interrupt and associate driver's 12264 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface 12265 * spec. Depends on the interrupt mode configured to the driver, the driver 12266 * will try to fallback from the configured interrupt mode to an interrupt 12267 * mode which is supported by the platform, kernel, and device in the order 12268 * of: 12269 * MSI-X -> MSI -> IRQ. 12270 * 12271 * Return codes 12272 * 0 - successful 12273 * other values - error 12274 **/ 12275 static uint32_t 12276 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 12277 { 12278 uint32_t intr_mode = LPFC_INTR_ERROR; 12279 int retval; 12280 12281 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ 12282 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); 12283 if (retval) 12284 return intr_mode; 12285 phba->hba_flag &= ~HBA_NEEDS_CFG_PORT; 12286 12287 if (cfg_mode == 2) { 12288 /* Now, try to enable MSI-X interrupt mode */ 12289 retval = lpfc_sli_enable_msix(phba); 12290 if (!retval) { 12291 /* Indicate initialization to MSI-X mode */ 12292 phba->intr_type = MSIX; 12293 intr_mode = 2; 12294 } 12295 } 12296 12297 /* Fallback to MSI if MSI-X initialization failed */ 12298 if (cfg_mode >= 1 && phba->intr_type == NONE) { 12299 retval = lpfc_sli_enable_msi(phba); 12300 if (!retval) { 12301 /* Indicate initialization to MSI mode */ 12302 phba->intr_type = MSI; 12303 intr_mode = 1; 12304 } 12305 } 12306 12307 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 12308 if (phba->intr_type == NONE) { 12309 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12310 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 12311 if (!retval) { 12312 /* Indicate initialization to INTx mode */ 12313 phba->intr_type = INTx; 12314 intr_mode = 0; 12315 } 12316 } 12317 return intr_mode; 12318 } 12319 12320 /** 12321 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. 12322 * @phba: pointer to lpfc hba data structure. 12323 * 12324 * This routine is invoked to disable device interrupt and disassociate the 12325 * driver's interrupt handler(s) from interrupt vector(s) to device with 12326 * SLI-3 interface spec. Depending on the interrupt mode, the driver will 12327 * release the interrupt vector(s) for the message signaled interrupt. 12328 **/ 12329 static void 12330 lpfc_sli_disable_intr(struct lpfc_hba *phba) 12331 { 12332 int nr_irqs, i; 12333 12334 if (phba->intr_type == MSIX) 12335 nr_irqs = LPFC_MSIX_VECTORS; 12336 else 12337 nr_irqs = 1; 12338 12339 for (i = 0; i < nr_irqs; i++) 12340 free_irq(pci_irq_vector(phba->pcidev, i), phba); 12341 pci_free_irq_vectors(phba->pcidev); 12342 12343 /* Reset interrupt management states */ 12344 phba->intr_type = NONE; 12345 phba->sli.slistat.sli_intr = 0; 12346 } 12347 12348 /** 12349 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue 12350 * @phba: pointer to lpfc hba data structure. 12351 * @id: EQ vector index or Hardware Queue index 12352 * @match: LPFC_FIND_BY_EQ = match by EQ 12353 * LPFC_FIND_BY_HDWQ = match by Hardware Queue 12354 * Return the CPU that matches the selection criteria 12355 */ 12356 static uint16_t 12357 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) 12358 { 12359 struct lpfc_vector_map_info *cpup; 12360 int cpu; 12361 12362 /* Loop through all CPUs */ 12363 for_each_present_cpu(cpu) { 12364 cpup = &phba->sli4_hba.cpu_map[cpu]; 12365 12366 /* If we are matching by EQ, there may be multiple CPUs using 12367 * using the same vector, so select the one with 12368 * LPFC_CPU_FIRST_IRQ set. 12369 */ 12370 if ((match == LPFC_FIND_BY_EQ) && 12371 (cpup->flag & LPFC_CPU_FIRST_IRQ) && 12372 (cpup->eq == id)) 12373 return cpu; 12374 12375 /* If matching by HDWQ, select the first CPU that matches */ 12376 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) 12377 return cpu; 12378 } 12379 return 0; 12380 } 12381 12382 #ifdef CONFIG_X86 12383 /** 12384 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded 12385 * @phba: pointer to lpfc hba data structure. 12386 * @cpu: CPU map index 12387 * @phys_id: CPU package physical id 12388 * @core_id: CPU core id 12389 */ 12390 static int 12391 lpfc_find_hyper(struct lpfc_hba *phba, int cpu, 12392 uint16_t phys_id, uint16_t core_id) 12393 { 12394 struct lpfc_vector_map_info *cpup; 12395 int idx; 12396 12397 for_each_present_cpu(idx) { 12398 cpup = &phba->sli4_hba.cpu_map[idx]; 12399 /* Does the cpup match the one we are looking for */ 12400 if ((cpup->phys_id == phys_id) && 12401 (cpup->core_id == core_id) && 12402 (cpu != idx)) 12403 return 1; 12404 } 12405 return 0; 12406 } 12407 #endif 12408 12409 /* 12410 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure 12411 * @phba: pointer to lpfc hba data structure. 12412 * @eqidx: index for eq and irq vector 12413 * @flag: flags to set for vector_map structure 12414 * @cpu: cpu used to index vector_map structure 12415 * 12416 * The routine assigns eq info into vector_map structure 12417 */ 12418 static inline void 12419 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, 12420 unsigned int cpu) 12421 { 12422 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; 12423 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); 12424 12425 cpup->eq = eqidx; 12426 cpup->flag |= flag; 12427 12428 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12429 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", 12430 cpu, eqhdl->irq, cpup->eq, cpup->flag); 12431 } 12432 12433 /** 12434 * lpfc_cpu_map_array_init - Initialize cpu_map structure 12435 * @phba: pointer to lpfc hba data structure. 12436 * 12437 * The routine initializes the cpu_map array structure 12438 */ 12439 static void 12440 lpfc_cpu_map_array_init(struct lpfc_hba *phba) 12441 { 12442 struct lpfc_vector_map_info *cpup; 12443 struct lpfc_eq_intr_info *eqi; 12444 int cpu; 12445 12446 for_each_possible_cpu(cpu) { 12447 cpup = &phba->sli4_hba.cpu_map[cpu]; 12448 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; 12449 cpup->core_id = LPFC_VECTOR_MAP_EMPTY; 12450 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; 12451 cpup->eq = LPFC_VECTOR_MAP_EMPTY; 12452 cpup->flag = 0; 12453 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); 12454 INIT_LIST_HEAD(&eqi->list); 12455 eqi->icnt = 0; 12456 } 12457 } 12458 12459 /** 12460 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure 12461 * @phba: pointer to lpfc hba data structure. 12462 * 12463 * The routine initializes the hba_eq_hdl array structure 12464 */ 12465 static void 12466 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) 12467 { 12468 struct lpfc_hba_eq_hdl *eqhdl; 12469 int i; 12470 12471 for (i = 0; i < phba->cfg_irq_chann; i++) { 12472 eqhdl = lpfc_get_eq_hdl(i); 12473 eqhdl->irq = LPFC_IRQ_EMPTY; 12474 eqhdl->phba = phba; 12475 } 12476 } 12477 12478 /** 12479 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings 12480 * @phba: pointer to lpfc hba data structure. 12481 * @vectors: number of msix vectors allocated. 12482 * 12483 * The routine will figure out the CPU affinity assignment for every 12484 * MSI-X vector allocated for the HBA. 12485 * In addition, the CPU to IO channel mapping will be calculated 12486 * and the phba->sli4_hba.cpu_map array will reflect this. 12487 */ 12488 static void 12489 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) 12490 { 12491 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; 12492 int max_phys_id, min_phys_id; 12493 int max_core_id, min_core_id; 12494 struct lpfc_vector_map_info *cpup; 12495 struct lpfc_vector_map_info *new_cpup; 12496 #ifdef CONFIG_X86 12497 struct cpuinfo_x86 *cpuinfo; 12498 #endif 12499 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12500 struct lpfc_hdwq_stat *c_stat; 12501 #endif 12502 12503 max_phys_id = 0; 12504 min_phys_id = LPFC_VECTOR_MAP_EMPTY; 12505 max_core_id = 0; 12506 min_core_id = LPFC_VECTOR_MAP_EMPTY; 12507 12508 /* Update CPU map with physical id and core id of each CPU */ 12509 for_each_present_cpu(cpu) { 12510 cpup = &phba->sli4_hba.cpu_map[cpu]; 12511 #ifdef CONFIG_X86 12512 cpuinfo = &cpu_data(cpu); 12513 cpup->phys_id = cpuinfo->phys_proc_id; 12514 cpup->core_id = cpuinfo->cpu_core_id; 12515 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) 12516 cpup->flag |= LPFC_CPU_MAP_HYPER; 12517 #else 12518 /* No distinction between CPUs for other platforms */ 12519 cpup->phys_id = 0; 12520 cpup->core_id = cpu; 12521 #endif 12522 12523 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12524 "3328 CPU %d physid %d coreid %d flag x%x\n", 12525 cpu, cpup->phys_id, cpup->core_id, cpup->flag); 12526 12527 if (cpup->phys_id > max_phys_id) 12528 max_phys_id = cpup->phys_id; 12529 if (cpup->phys_id < min_phys_id) 12530 min_phys_id = cpup->phys_id; 12531 12532 if (cpup->core_id > max_core_id) 12533 max_core_id = cpup->core_id; 12534 if (cpup->core_id < min_core_id) 12535 min_core_id = cpup->core_id; 12536 } 12537 12538 /* After looking at each irq vector assigned to this pcidev, its 12539 * possible to see that not ALL CPUs have been accounted for. 12540 * Next we will set any unassigned (unaffinitized) cpu map 12541 * entries to a IRQ on the same phys_id. 12542 */ 12543 first_cpu = cpumask_first(cpu_present_mask); 12544 start_cpu = first_cpu; 12545 12546 for_each_present_cpu(cpu) { 12547 cpup = &phba->sli4_hba.cpu_map[cpu]; 12548 12549 /* Is this CPU entry unassigned */ 12550 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12551 /* Mark CPU as IRQ not assigned by the kernel */ 12552 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12553 12554 /* If so, find a new_cpup that is on the SAME 12555 * phys_id as cpup. start_cpu will start where we 12556 * left off so all unassigned entries don't get assgined 12557 * the IRQ of the first entry. 12558 */ 12559 new_cpu = start_cpu; 12560 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12561 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12562 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12563 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && 12564 (new_cpup->phys_id == cpup->phys_id)) 12565 goto found_same; 12566 new_cpu = cpumask_next( 12567 new_cpu, cpu_present_mask); 12568 if (new_cpu == nr_cpumask_bits) 12569 new_cpu = first_cpu; 12570 } 12571 /* At this point, we leave the CPU as unassigned */ 12572 continue; 12573 found_same: 12574 /* We found a matching phys_id, so copy the IRQ info */ 12575 cpup->eq = new_cpup->eq; 12576 12577 /* Bump start_cpu to the next slot to minmize the 12578 * chance of having multiple unassigned CPU entries 12579 * selecting the same IRQ. 12580 */ 12581 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12582 if (start_cpu == nr_cpumask_bits) 12583 start_cpu = first_cpu; 12584 12585 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12586 "3337 Set Affinity: CPU %d " 12587 "eq %d from peer cpu %d same " 12588 "phys_id (%d)\n", 12589 cpu, cpup->eq, new_cpu, 12590 cpup->phys_id); 12591 } 12592 } 12593 12594 /* Set any unassigned cpu map entries to a IRQ on any phys_id */ 12595 start_cpu = first_cpu; 12596 12597 for_each_present_cpu(cpu) { 12598 cpup = &phba->sli4_hba.cpu_map[cpu]; 12599 12600 /* Is this entry unassigned */ 12601 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12602 /* Mark it as IRQ not assigned by the kernel */ 12603 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12604 12605 /* If so, find a new_cpup thats on ANY phys_id 12606 * as the cpup. start_cpu will start where we 12607 * left off so all unassigned entries don't get 12608 * assigned the IRQ of the first entry. 12609 */ 12610 new_cpu = start_cpu; 12611 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12612 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12613 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12614 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) 12615 goto found_any; 12616 new_cpu = cpumask_next( 12617 new_cpu, cpu_present_mask); 12618 if (new_cpu == nr_cpumask_bits) 12619 new_cpu = first_cpu; 12620 } 12621 /* We should never leave an entry unassigned */ 12622 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 12623 "3339 Set Affinity: CPU %d " 12624 "eq %d UNASSIGNED\n", 12625 cpup->hdwq, cpup->eq); 12626 continue; 12627 found_any: 12628 /* We found an available entry, copy the IRQ info */ 12629 cpup->eq = new_cpup->eq; 12630 12631 /* Bump start_cpu to the next slot to minmize the 12632 * chance of having multiple unassigned CPU entries 12633 * selecting the same IRQ. 12634 */ 12635 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12636 if (start_cpu == nr_cpumask_bits) 12637 start_cpu = first_cpu; 12638 12639 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12640 "3338 Set Affinity: CPU %d " 12641 "eq %d from peer cpu %d (%d/%d)\n", 12642 cpu, cpup->eq, new_cpu, 12643 new_cpup->phys_id, new_cpup->core_id); 12644 } 12645 } 12646 12647 /* Assign hdwq indices that are unique across all cpus in the map 12648 * that are also FIRST_CPUs. 12649 */ 12650 idx = 0; 12651 for_each_present_cpu(cpu) { 12652 cpup = &phba->sli4_hba.cpu_map[cpu]; 12653 12654 /* Only FIRST IRQs get a hdwq index assignment. */ 12655 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12656 continue; 12657 12658 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ 12659 cpup->hdwq = idx; 12660 idx++; 12661 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12662 "3333 Set Affinity: CPU %d (phys %d core %d): " 12663 "hdwq %d eq %d flg x%x\n", 12664 cpu, cpup->phys_id, cpup->core_id, 12665 cpup->hdwq, cpup->eq, cpup->flag); 12666 } 12667 /* Associate a hdwq with each cpu_map entry 12668 * This will be 1 to 1 - hdwq to cpu, unless there are less 12669 * hardware queues then CPUs. For that case we will just round-robin 12670 * the available hardware queues as they get assigned to CPUs. 12671 * The next_idx is the idx from the FIRST_CPU loop above to account 12672 * for irq_chann < hdwq. The idx is used for round-robin assignments 12673 * and needs to start at 0. 12674 */ 12675 next_idx = idx; 12676 start_cpu = 0; 12677 idx = 0; 12678 for_each_present_cpu(cpu) { 12679 cpup = &phba->sli4_hba.cpu_map[cpu]; 12680 12681 /* FIRST cpus are already mapped. */ 12682 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 12683 continue; 12684 12685 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq 12686 * of the unassigned cpus to the next idx so that all 12687 * hdw queues are fully utilized. 12688 */ 12689 if (next_idx < phba->cfg_hdw_queue) { 12690 cpup->hdwq = next_idx; 12691 next_idx++; 12692 continue; 12693 } 12694 12695 /* Not a First CPU and all hdw_queues are used. Reuse a 12696 * Hardware Queue for another CPU, so be smart about it 12697 * and pick one that has its IRQ/EQ mapped to the same phys_id 12698 * (CPU package) and core_id. 12699 */ 12700 new_cpu = start_cpu; 12701 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12702 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12703 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12704 new_cpup->phys_id == cpup->phys_id && 12705 new_cpup->core_id == cpup->core_id) { 12706 goto found_hdwq; 12707 } 12708 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12709 if (new_cpu == nr_cpumask_bits) 12710 new_cpu = first_cpu; 12711 } 12712 12713 /* If we can't match both phys_id and core_id, 12714 * settle for just a phys_id match. 12715 */ 12716 new_cpu = start_cpu; 12717 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12718 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12719 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12720 new_cpup->phys_id == cpup->phys_id) 12721 goto found_hdwq; 12722 12723 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12724 if (new_cpu == nr_cpumask_bits) 12725 new_cpu = first_cpu; 12726 } 12727 12728 /* Otherwise just round robin on cfg_hdw_queue */ 12729 cpup->hdwq = idx % phba->cfg_hdw_queue; 12730 idx++; 12731 goto logit; 12732 found_hdwq: 12733 /* We found an available entry, copy the IRQ info */ 12734 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12735 if (start_cpu == nr_cpumask_bits) 12736 start_cpu = first_cpu; 12737 cpup->hdwq = new_cpup->hdwq; 12738 logit: 12739 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12740 "3335 Set Affinity: CPU %d (phys %d core %d): " 12741 "hdwq %d eq %d flg x%x\n", 12742 cpu, cpup->phys_id, cpup->core_id, 12743 cpup->hdwq, cpup->eq, cpup->flag); 12744 } 12745 12746 /* 12747 * Initialize the cpu_map slots for not-present cpus in case 12748 * a cpu is hot-added. Perform a simple hdwq round robin assignment. 12749 */ 12750 idx = 0; 12751 for_each_possible_cpu(cpu) { 12752 cpup = &phba->sli4_hba.cpu_map[cpu]; 12753 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12754 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); 12755 c_stat->hdwq_no = cpup->hdwq; 12756 #endif 12757 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) 12758 continue; 12759 12760 cpup->hdwq = idx++ % phba->cfg_hdw_queue; 12761 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12762 c_stat->hdwq_no = cpup->hdwq; 12763 #endif 12764 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12765 "3340 Set Affinity: not present " 12766 "CPU %d hdwq %d\n", 12767 cpu, cpup->hdwq); 12768 } 12769 12770 /* The cpu_map array will be used later during initialization 12771 * when EQ / CQ / WQs are allocated and configured. 12772 */ 12773 return; 12774 } 12775 12776 /** 12777 * lpfc_cpuhp_get_eq 12778 * 12779 * @phba: pointer to lpfc hba data structure. 12780 * @cpu: cpu going offline 12781 * @eqlist: eq list to append to 12782 */ 12783 static int 12784 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, 12785 struct list_head *eqlist) 12786 { 12787 const struct cpumask *maskp; 12788 struct lpfc_queue *eq; 12789 struct cpumask *tmp; 12790 u16 idx; 12791 12792 tmp = kzalloc(cpumask_size(), GFP_KERNEL); 12793 if (!tmp) 12794 return -ENOMEM; 12795 12796 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12797 maskp = pci_irq_get_affinity(phba->pcidev, idx); 12798 if (!maskp) 12799 continue; 12800 /* 12801 * if irq is not affinitized to the cpu going 12802 * then we don't need to poll the eq attached 12803 * to it. 12804 */ 12805 if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) 12806 continue; 12807 /* get the cpus that are online and are affini- 12808 * tized to this irq vector. If the count is 12809 * more than 1 then cpuhp is not going to shut- 12810 * down this vector. Since this cpu has not 12811 * gone offline yet, we need >1. 12812 */ 12813 cpumask_and(tmp, maskp, cpu_online_mask); 12814 if (cpumask_weight(tmp) > 1) 12815 continue; 12816 12817 /* Now that we have an irq to shutdown, get the eq 12818 * mapped to this irq. Note: multiple hdwq's in 12819 * the software can share an eq, but eventually 12820 * only eq will be mapped to this vector 12821 */ 12822 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 12823 list_add(&eq->_poll_list, eqlist); 12824 } 12825 kfree(tmp); 12826 return 0; 12827 } 12828 12829 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) 12830 { 12831 if (phba->sli_rev != LPFC_SLI_REV4) 12832 return; 12833 12834 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, 12835 &phba->cpuhp); 12836 /* 12837 * unregistering the instance doesn't stop the polling 12838 * timer. Wait for the poll timer to retire. 12839 */ 12840 synchronize_rcu(); 12841 del_timer_sync(&phba->cpuhp_poll_timer); 12842 } 12843 12844 static void lpfc_cpuhp_remove(struct lpfc_hba *phba) 12845 { 12846 if (phba->pport && (phba->pport->fc_flag & FC_OFFLINE_MODE)) 12847 return; 12848 12849 __lpfc_cpuhp_remove(phba); 12850 } 12851 12852 static void lpfc_cpuhp_add(struct lpfc_hba *phba) 12853 { 12854 if (phba->sli_rev != LPFC_SLI_REV4) 12855 return; 12856 12857 rcu_read_lock(); 12858 12859 if (!list_empty(&phba->poll_list)) 12860 mod_timer(&phba->cpuhp_poll_timer, 12861 jiffies + msecs_to_jiffies(LPFC_POLL_HB)); 12862 12863 rcu_read_unlock(); 12864 12865 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, 12866 &phba->cpuhp); 12867 } 12868 12869 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) 12870 { 12871 if (phba->pport->load_flag & FC_UNLOADING) { 12872 *retval = -EAGAIN; 12873 return true; 12874 } 12875 12876 if (phba->sli_rev != LPFC_SLI_REV4) { 12877 *retval = 0; 12878 return true; 12879 } 12880 12881 /* proceed with the hotplug */ 12882 return false; 12883 } 12884 12885 /** 12886 * lpfc_irq_set_aff - set IRQ affinity 12887 * @eqhdl: EQ handle 12888 * @cpu: cpu to set affinity 12889 * 12890 **/ 12891 static inline void 12892 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) 12893 { 12894 cpumask_clear(&eqhdl->aff_mask); 12895 cpumask_set_cpu(cpu, &eqhdl->aff_mask); 12896 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12897 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask); 12898 } 12899 12900 /** 12901 * lpfc_irq_clear_aff - clear IRQ affinity 12902 * @eqhdl: EQ handle 12903 * 12904 **/ 12905 static inline void 12906 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) 12907 { 12908 cpumask_clear(&eqhdl->aff_mask); 12909 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12910 } 12911 12912 /** 12913 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event 12914 * @phba: pointer to HBA context object. 12915 * @cpu: cpu going offline/online 12916 * @offline: true, cpu is going offline. false, cpu is coming online. 12917 * 12918 * If cpu is going offline, we'll try our best effort to find the next 12919 * online cpu on the phba's original_mask and migrate all offlining IRQ 12920 * affinities. 12921 * 12922 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. 12923 * 12924 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on 12925 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. 12926 * 12927 **/ 12928 static void 12929 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) 12930 { 12931 struct lpfc_vector_map_info *cpup; 12932 struct cpumask *aff_mask; 12933 unsigned int cpu_select, cpu_next, idx; 12934 const struct cpumask *orig_mask; 12935 12936 if (phba->irq_chann_mode == NORMAL_MODE) 12937 return; 12938 12939 orig_mask = &phba->sli4_hba.irq_aff_mask; 12940 12941 if (!cpumask_test_cpu(cpu, orig_mask)) 12942 return; 12943 12944 cpup = &phba->sli4_hba.cpu_map[cpu]; 12945 12946 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12947 return; 12948 12949 if (offline) { 12950 /* Find next online CPU on original mask */ 12951 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true); 12952 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); 12953 12954 /* Found a valid CPU */ 12955 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { 12956 /* Go through each eqhdl and ensure offlining 12957 * cpu aff_mask is migrated 12958 */ 12959 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12960 aff_mask = lpfc_get_aff_mask(idx); 12961 12962 /* Migrate affinity */ 12963 if (cpumask_test_cpu(cpu, aff_mask)) 12964 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), 12965 cpu_select); 12966 } 12967 } else { 12968 /* Rely on irqbalance if no online CPUs left on NUMA */ 12969 for (idx = 0; idx < phba->cfg_irq_chann; idx++) 12970 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); 12971 } 12972 } else { 12973 /* Migrate affinity back to this CPU */ 12974 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); 12975 } 12976 } 12977 12978 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) 12979 { 12980 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12981 struct lpfc_queue *eq, *next; 12982 LIST_HEAD(eqlist); 12983 int retval; 12984 12985 if (!phba) { 12986 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12987 return 0; 12988 } 12989 12990 if (__lpfc_cpuhp_checks(phba, &retval)) 12991 return retval; 12992 12993 lpfc_irq_rebalance(phba, cpu, true); 12994 12995 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); 12996 if (retval) 12997 return retval; 12998 12999 /* start polling on these eq's */ 13000 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { 13001 list_del_init(&eq->_poll_list); 13002 lpfc_sli4_start_polling(eq); 13003 } 13004 13005 return 0; 13006 } 13007 13008 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) 13009 { 13010 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 13011 struct lpfc_queue *eq, *next; 13012 unsigned int n; 13013 int retval; 13014 13015 if (!phba) { 13016 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 13017 return 0; 13018 } 13019 13020 if (__lpfc_cpuhp_checks(phba, &retval)) 13021 return retval; 13022 13023 lpfc_irq_rebalance(phba, cpu, false); 13024 13025 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { 13026 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); 13027 if (n == cpu) 13028 lpfc_sli4_stop_polling(eq); 13029 } 13030 13031 return 0; 13032 } 13033 13034 /** 13035 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device 13036 * @phba: pointer to lpfc hba data structure. 13037 * 13038 * This routine is invoked to enable the MSI-X interrupt vectors to device 13039 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them 13040 * to cpus on the system. 13041 * 13042 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for 13043 * the number of cpus on the same numa node as this adapter. The vectors are 13044 * allocated without requesting OS affinity mapping. A vector will be 13045 * allocated and assigned to each online and offline cpu. If the cpu is 13046 * online, then affinity will be set to that cpu. If the cpu is offline, then 13047 * affinity will be set to the nearest peer cpu within the numa node that is 13048 * online. If there are no online cpus within the numa node, affinity is not 13049 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping 13050 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is 13051 * configured. 13052 * 13053 * If numa mode is not enabled and there is more than 1 vector allocated, then 13054 * the driver relies on the managed irq interface where the OS assigns vector to 13055 * cpu affinity. The driver will then use that affinity mapping to setup its 13056 * cpu mapping table. 13057 * 13058 * Return codes 13059 * 0 - successful 13060 * other values - error 13061 **/ 13062 static int 13063 lpfc_sli4_enable_msix(struct lpfc_hba *phba) 13064 { 13065 int vectors, rc, index; 13066 char *name; 13067 const struct cpumask *aff_mask = NULL; 13068 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; 13069 struct lpfc_vector_map_info *cpup; 13070 struct lpfc_hba_eq_hdl *eqhdl; 13071 const struct cpumask *maskp; 13072 unsigned int flags = PCI_IRQ_MSIX; 13073 13074 /* Set up MSI-X multi-message vectors */ 13075 vectors = phba->cfg_irq_chann; 13076 13077 if (phba->irq_chann_mode != NORMAL_MODE) 13078 aff_mask = &phba->sli4_hba.irq_aff_mask; 13079 13080 if (aff_mask) { 13081 cpu_cnt = cpumask_weight(aff_mask); 13082 vectors = min(phba->cfg_irq_chann, cpu_cnt); 13083 13084 /* cpu: iterates over aff_mask including offline or online 13085 * cpu_select: iterates over online aff_mask to set affinity 13086 */ 13087 cpu = cpumask_first(aff_mask); 13088 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13089 } else { 13090 flags |= PCI_IRQ_AFFINITY; 13091 } 13092 13093 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); 13094 if (rc < 0) { 13095 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13096 "0484 PCI enable MSI-X failed (%d)\n", rc); 13097 goto vec_fail_out; 13098 } 13099 vectors = rc; 13100 13101 /* Assign MSI-X vectors to interrupt handlers */ 13102 for (index = 0; index < vectors; index++) { 13103 eqhdl = lpfc_get_eq_hdl(index); 13104 name = eqhdl->handler_name; 13105 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); 13106 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, 13107 LPFC_DRIVER_HANDLER_NAME"%d", index); 13108 13109 eqhdl->idx = index; 13110 rc = pci_irq_vector(phba->pcidev, index); 13111 if (rc < 0) { 13112 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13113 "0489 MSI-X fast-path (%d) " 13114 "pci_irq_vec failed (%d)\n", index, rc); 13115 goto cfg_fail_out; 13116 } 13117 eqhdl->irq = rc; 13118 13119 rc = request_irq(eqhdl->irq, &lpfc_sli4_hba_intr_handler, 0, 13120 name, eqhdl); 13121 if (rc) { 13122 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13123 "0486 MSI-X fast-path (%d) " 13124 "request_irq failed (%d)\n", index, rc); 13125 goto cfg_fail_out; 13126 } 13127 13128 if (aff_mask) { 13129 /* If found a neighboring online cpu, set affinity */ 13130 if (cpu_select < nr_cpu_ids) 13131 lpfc_irq_set_aff(eqhdl, cpu_select); 13132 13133 /* Assign EQ to cpu_map */ 13134 lpfc_assign_eq_map_info(phba, index, 13135 LPFC_CPU_FIRST_IRQ, 13136 cpu); 13137 13138 /* Iterate to next offline or online cpu in aff_mask */ 13139 cpu = cpumask_next(cpu, aff_mask); 13140 13141 /* Find next online cpu in aff_mask to set affinity */ 13142 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13143 } else if (vectors == 1) { 13144 cpu = cpumask_first(cpu_present_mask); 13145 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, 13146 cpu); 13147 } else { 13148 maskp = pci_irq_get_affinity(phba->pcidev, index); 13149 13150 /* Loop through all CPUs associated with vector index */ 13151 for_each_cpu_and(cpu, maskp, cpu_present_mask) { 13152 cpup = &phba->sli4_hba.cpu_map[cpu]; 13153 13154 /* If this is the first CPU thats assigned to 13155 * this vector, set LPFC_CPU_FIRST_IRQ. 13156 * 13157 * With certain platforms its possible that irq 13158 * vectors are affinitized to all the cpu's. 13159 * This can result in each cpu_map.eq to be set 13160 * to the last vector, resulting in overwrite 13161 * of all the previous cpu_map.eq. Ensure that 13162 * each vector receives a place in cpu_map. 13163 * Later call to lpfc_cpu_affinity_check will 13164 * ensure we are nicely balanced out. 13165 */ 13166 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) 13167 continue; 13168 lpfc_assign_eq_map_info(phba, index, 13169 LPFC_CPU_FIRST_IRQ, 13170 cpu); 13171 break; 13172 } 13173 } 13174 } 13175 13176 if (vectors != phba->cfg_irq_chann) { 13177 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13178 "3238 Reducing IO channels to match number of " 13179 "MSI-X vectors, requested %d got %d\n", 13180 phba->cfg_irq_chann, vectors); 13181 if (phba->cfg_irq_chann > vectors) 13182 phba->cfg_irq_chann = vectors; 13183 } 13184 13185 return rc; 13186 13187 cfg_fail_out: 13188 /* free the irq already requested */ 13189 for (--index; index >= 0; index--) { 13190 eqhdl = lpfc_get_eq_hdl(index); 13191 lpfc_irq_clear_aff(eqhdl); 13192 free_irq(eqhdl->irq, eqhdl); 13193 } 13194 13195 /* Unconfigure MSI-X capability structure */ 13196 pci_free_irq_vectors(phba->pcidev); 13197 13198 vec_fail_out: 13199 return rc; 13200 } 13201 13202 /** 13203 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device 13204 * @phba: pointer to lpfc hba data structure. 13205 * 13206 * This routine is invoked to enable the MSI interrupt mode to device with 13207 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is 13208 * called to enable the MSI vector. The device driver is responsible for 13209 * calling the request_irq() to register MSI vector with a interrupt the 13210 * handler, which is done in this function. 13211 * 13212 * Return codes 13213 * 0 - successful 13214 * other values - error 13215 **/ 13216 static int 13217 lpfc_sli4_enable_msi(struct lpfc_hba *phba) 13218 { 13219 int rc, index; 13220 unsigned int cpu; 13221 struct lpfc_hba_eq_hdl *eqhdl; 13222 13223 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, 13224 PCI_IRQ_MSI | PCI_IRQ_AFFINITY); 13225 if (rc > 0) 13226 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13227 "0487 PCI enable MSI mode success.\n"); 13228 else { 13229 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13230 "0488 PCI enable MSI mode failed (%d)\n", rc); 13231 return rc ? rc : -1; 13232 } 13233 13234 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13235 0, LPFC_DRIVER_NAME, phba); 13236 if (rc) { 13237 pci_free_irq_vectors(phba->pcidev); 13238 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13239 "0490 MSI request_irq failed (%d)\n", rc); 13240 return rc; 13241 } 13242 13243 eqhdl = lpfc_get_eq_hdl(0); 13244 rc = pci_irq_vector(phba->pcidev, 0); 13245 if (rc < 0) { 13246 pci_free_irq_vectors(phba->pcidev); 13247 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13248 "0496 MSI pci_irq_vec failed (%d)\n", rc); 13249 return rc; 13250 } 13251 eqhdl->irq = rc; 13252 13253 cpu = cpumask_first(cpu_present_mask); 13254 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); 13255 13256 for (index = 0; index < phba->cfg_irq_chann; index++) { 13257 eqhdl = lpfc_get_eq_hdl(index); 13258 eqhdl->idx = index; 13259 } 13260 13261 return 0; 13262 } 13263 13264 /** 13265 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device 13266 * @phba: pointer to lpfc hba data structure. 13267 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 13268 * 13269 * This routine is invoked to enable device interrupt and associate driver's 13270 * interrupt handler(s) to interrupt vector(s) to device with SLI-4 13271 * interface spec. Depends on the interrupt mode configured to the driver, 13272 * the driver will try to fallback from the configured interrupt mode to an 13273 * interrupt mode which is supported by the platform, kernel, and device in 13274 * the order of: 13275 * MSI-X -> MSI -> IRQ. 13276 * 13277 * Return codes 13278 * Interrupt mode (2, 1, 0) - successful 13279 * LPFC_INTR_ERROR - error 13280 **/ 13281 static uint32_t 13282 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 13283 { 13284 uint32_t intr_mode = LPFC_INTR_ERROR; 13285 int retval, idx; 13286 13287 if (cfg_mode == 2) { 13288 /* Preparation before conf_msi mbox cmd */ 13289 retval = 0; 13290 if (!retval) { 13291 /* Now, try to enable MSI-X interrupt mode */ 13292 retval = lpfc_sli4_enable_msix(phba); 13293 if (!retval) { 13294 /* Indicate initialization to MSI-X mode */ 13295 phba->intr_type = MSIX; 13296 intr_mode = 2; 13297 } 13298 } 13299 } 13300 13301 /* Fallback to MSI if MSI-X initialization failed */ 13302 if (cfg_mode >= 1 && phba->intr_type == NONE) { 13303 retval = lpfc_sli4_enable_msi(phba); 13304 if (!retval) { 13305 /* Indicate initialization to MSI mode */ 13306 phba->intr_type = MSI; 13307 intr_mode = 1; 13308 } 13309 } 13310 13311 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 13312 if (phba->intr_type == NONE) { 13313 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13314 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 13315 if (!retval) { 13316 struct lpfc_hba_eq_hdl *eqhdl; 13317 unsigned int cpu; 13318 13319 /* Indicate initialization to INTx mode */ 13320 phba->intr_type = INTx; 13321 intr_mode = 0; 13322 13323 eqhdl = lpfc_get_eq_hdl(0); 13324 retval = pci_irq_vector(phba->pcidev, 0); 13325 if (retval < 0) { 13326 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13327 "0502 INTR pci_irq_vec failed (%d)\n", 13328 retval); 13329 return LPFC_INTR_ERROR; 13330 } 13331 eqhdl->irq = retval; 13332 13333 cpu = cpumask_first(cpu_present_mask); 13334 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, 13335 cpu); 13336 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 13337 eqhdl = lpfc_get_eq_hdl(idx); 13338 eqhdl->idx = idx; 13339 } 13340 } 13341 } 13342 return intr_mode; 13343 } 13344 13345 /** 13346 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device 13347 * @phba: pointer to lpfc hba data structure. 13348 * 13349 * This routine is invoked to disable device interrupt and disassociate 13350 * the driver's interrupt handler(s) from interrupt vector(s) to device 13351 * with SLI-4 interface spec. Depending on the interrupt mode, the driver 13352 * will release the interrupt vector(s) for the message signaled interrupt. 13353 **/ 13354 static void 13355 lpfc_sli4_disable_intr(struct lpfc_hba *phba) 13356 { 13357 /* Disable the currently initialized interrupt mode */ 13358 if (phba->intr_type == MSIX) { 13359 int index; 13360 struct lpfc_hba_eq_hdl *eqhdl; 13361 13362 /* Free up MSI-X multi-message vectors */ 13363 for (index = 0; index < phba->cfg_irq_chann; index++) { 13364 eqhdl = lpfc_get_eq_hdl(index); 13365 lpfc_irq_clear_aff(eqhdl); 13366 free_irq(eqhdl->irq, eqhdl); 13367 } 13368 } else { 13369 free_irq(phba->pcidev->irq, phba); 13370 } 13371 13372 pci_free_irq_vectors(phba->pcidev); 13373 13374 /* Reset interrupt management states */ 13375 phba->intr_type = NONE; 13376 phba->sli.slistat.sli_intr = 0; 13377 } 13378 13379 /** 13380 * lpfc_unset_hba - Unset SLI3 hba device initialization 13381 * @phba: pointer to lpfc hba data structure. 13382 * 13383 * This routine is invoked to unset the HBA device initialization steps to 13384 * a device with SLI-3 interface spec. 13385 **/ 13386 static void 13387 lpfc_unset_hba(struct lpfc_hba *phba) 13388 { 13389 struct lpfc_vport *vport = phba->pport; 13390 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 13391 13392 spin_lock_irq(shost->host_lock); 13393 vport->load_flag |= FC_UNLOADING; 13394 spin_unlock_irq(shost->host_lock); 13395 13396 kfree(phba->vpi_bmask); 13397 kfree(phba->vpi_ids); 13398 13399 lpfc_stop_hba_timers(phba); 13400 13401 phba->pport->work_port_events = 0; 13402 13403 lpfc_sli_hba_down(phba); 13404 13405 lpfc_sli_brdrestart(phba); 13406 13407 lpfc_sli_disable_intr(phba); 13408 13409 return; 13410 } 13411 13412 /** 13413 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy 13414 * @phba: Pointer to HBA context object. 13415 * 13416 * This function is called in the SLI4 code path to wait for completion 13417 * of device's XRIs exchange busy. It will check the XRI exchange busy 13418 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after 13419 * that, it will check the XRI exchange busy on outstanding FCP and ELS 13420 * I/Os every 30 seconds, log error message, and wait forever. Only when 13421 * all XRI exchange busy complete, the driver unload shall proceed with 13422 * invoking the function reset ioctl mailbox command to the CNA and the 13423 * the rest of the driver unload resource release. 13424 **/ 13425 static void 13426 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) 13427 { 13428 struct lpfc_sli4_hdw_queue *qp; 13429 int idx, ccnt; 13430 int wait_time = 0; 13431 int io_xri_cmpl = 1; 13432 int nvmet_xri_cmpl = 1; 13433 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13434 13435 /* Driver just aborted IOs during the hba_unset process. Pause 13436 * here to give the HBA time to complete the IO and get entries 13437 * into the abts lists. 13438 */ 13439 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); 13440 13441 /* Wait for NVME pending IO to flush back to transport. */ 13442 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13443 lpfc_nvme_wait_for_io_drain(phba); 13444 13445 ccnt = 0; 13446 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13447 qp = &phba->sli4_hba.hdwq[idx]; 13448 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); 13449 if (!io_xri_cmpl) /* if list is NOT empty */ 13450 ccnt++; 13451 } 13452 if (ccnt) 13453 io_xri_cmpl = 0; 13454 13455 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13456 nvmet_xri_cmpl = 13457 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13458 } 13459 13460 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { 13461 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { 13462 if (!nvmet_xri_cmpl) 13463 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13464 "6424 NVMET XRI exchange busy " 13465 "wait time: %d seconds.\n", 13466 wait_time/1000); 13467 if (!io_xri_cmpl) 13468 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13469 "6100 IO XRI exchange busy " 13470 "wait time: %d seconds.\n", 13471 wait_time/1000); 13472 if (!els_xri_cmpl) 13473 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13474 "2878 ELS XRI exchange busy " 13475 "wait time: %d seconds.\n", 13476 wait_time/1000); 13477 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); 13478 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; 13479 } else { 13480 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); 13481 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; 13482 } 13483 13484 ccnt = 0; 13485 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13486 qp = &phba->sli4_hba.hdwq[idx]; 13487 io_xri_cmpl = list_empty( 13488 &qp->lpfc_abts_io_buf_list); 13489 if (!io_xri_cmpl) /* if list is NOT empty */ 13490 ccnt++; 13491 } 13492 if (ccnt) 13493 io_xri_cmpl = 0; 13494 13495 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13496 nvmet_xri_cmpl = list_empty( 13497 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13498 } 13499 els_xri_cmpl = 13500 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13501 13502 } 13503 } 13504 13505 /** 13506 * lpfc_sli4_hba_unset - Unset the fcoe hba 13507 * @phba: Pointer to HBA context object. 13508 * 13509 * This function is called in the SLI4 code path to reset the HBA's FCoE 13510 * function. The caller is not required to hold any lock. This routine 13511 * issues PCI function reset mailbox command to reset the FCoE function. 13512 * At the end of the function, it calls lpfc_hba_down_post function to 13513 * free any pending commands. 13514 **/ 13515 static void 13516 lpfc_sli4_hba_unset(struct lpfc_hba *phba) 13517 { 13518 int wait_cnt = 0; 13519 LPFC_MBOXQ_t *mboxq; 13520 struct pci_dev *pdev = phba->pcidev; 13521 13522 lpfc_stop_hba_timers(phba); 13523 hrtimer_cancel(&phba->cmf_timer); 13524 13525 if (phba->pport) 13526 phba->sli4_hba.intr_enable = 0; 13527 13528 /* 13529 * Gracefully wait out the potential current outstanding asynchronous 13530 * mailbox command. 13531 */ 13532 13533 /* First, block any pending async mailbox command from posted */ 13534 spin_lock_irq(&phba->hbalock); 13535 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; 13536 spin_unlock_irq(&phba->hbalock); 13537 /* Now, trying to wait it out if we can */ 13538 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13539 msleep(10); 13540 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) 13541 break; 13542 } 13543 /* Forcefully release the outstanding mailbox command if timed out */ 13544 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13545 spin_lock_irq(&phba->hbalock); 13546 mboxq = phba->sli.mbox_active; 13547 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 13548 __lpfc_mbox_cmpl_put(phba, mboxq); 13549 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 13550 phba->sli.mbox_active = NULL; 13551 spin_unlock_irq(&phba->hbalock); 13552 } 13553 13554 /* Abort all iocbs associated with the hba */ 13555 lpfc_sli_hba_iocb_abort(phba); 13556 13557 if (!pci_channel_offline(phba->pcidev)) 13558 /* Wait for completion of device XRI exchange busy */ 13559 lpfc_sli4_xri_exchange_busy_wait(phba); 13560 13561 /* per-phba callback de-registration for hotplug event */ 13562 if (phba->pport) 13563 lpfc_cpuhp_remove(phba); 13564 13565 /* Disable PCI subsystem interrupt */ 13566 lpfc_sli4_disable_intr(phba); 13567 13568 /* Disable SR-IOV if enabled */ 13569 if (phba->cfg_sriov_nr_virtfn) 13570 pci_disable_sriov(pdev); 13571 13572 /* Stop kthread signal shall trigger work_done one more time */ 13573 kthread_stop(phba->worker_thread); 13574 13575 /* Disable FW logging to host memory */ 13576 lpfc_ras_stop_fwlog(phba); 13577 13578 /* Reset SLI4 HBA FCoE function */ 13579 lpfc_pci_function_reset(phba); 13580 13581 /* release all queue allocated resources. */ 13582 lpfc_sli4_queue_destroy(phba); 13583 13584 /* Free RAS DMA memory */ 13585 if (phba->ras_fwlog.ras_enabled) 13586 lpfc_sli4_ras_dma_free(phba); 13587 13588 /* Stop the SLI4 device port */ 13589 if (phba->pport) 13590 phba->pport->work_port_events = 0; 13591 } 13592 13593 static uint32_t 13594 lpfc_cgn_crc32(uint32_t crc, u8 byte) 13595 { 13596 uint32_t msb = 0; 13597 uint32_t bit; 13598 13599 for (bit = 0; bit < 8; bit++) { 13600 msb = (crc >> 31) & 1; 13601 crc <<= 1; 13602 13603 if (msb ^ (byte & 1)) { 13604 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER; 13605 crc |= 1; 13606 } 13607 byte >>= 1; 13608 } 13609 return crc; 13610 } 13611 13612 static uint32_t 13613 lpfc_cgn_reverse_bits(uint32_t wd) 13614 { 13615 uint32_t result = 0; 13616 uint32_t i; 13617 13618 for (i = 0; i < 32; i++) { 13619 result <<= 1; 13620 result |= (1 & (wd >> i)); 13621 } 13622 return result; 13623 } 13624 13625 /* 13626 * The routine corresponds with the algorithm the HBA firmware 13627 * uses to validate the data integrity. 13628 */ 13629 uint32_t 13630 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc) 13631 { 13632 uint32_t i; 13633 uint32_t result; 13634 uint8_t *data = (uint8_t *)ptr; 13635 13636 for (i = 0; i < byteLen; ++i) 13637 crc = lpfc_cgn_crc32(crc, data[i]); 13638 13639 result = ~lpfc_cgn_reverse_bits(crc); 13640 return result; 13641 } 13642 13643 void 13644 lpfc_init_congestion_buf(struct lpfc_hba *phba) 13645 { 13646 struct lpfc_cgn_info *cp; 13647 struct timespec64 cmpl_time; 13648 struct tm broken; 13649 uint16_t size; 13650 uint32_t crc; 13651 13652 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13653 "6235 INIT Congestion Buffer %p\n", phba->cgn_i); 13654 13655 if (!phba->cgn_i) 13656 return; 13657 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13658 13659 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 13660 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 13661 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 13662 atomic_set(&phba->cgn_sync_warn_cnt, 0); 13663 13664 atomic_set(&phba->cgn_driver_evt_cnt, 0); 13665 atomic_set(&phba->cgn_latency_evt_cnt, 0); 13666 atomic64_set(&phba->cgn_latency_evt, 0); 13667 phba->cgn_evt_minute = 0; 13668 phba->hba_flag &= ~HBA_CGN_DAY_WRAP; 13669 13670 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat)); 13671 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ); 13672 cp->cgn_info_version = LPFC_CGN_INFO_V3; 13673 13674 /* cgn parameters */ 13675 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 13676 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 13677 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 13678 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 13679 13680 ktime_get_real_ts64(&cmpl_time); 13681 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13682 13683 cp->cgn_info_month = broken.tm_mon + 1; 13684 cp->cgn_info_day = broken.tm_mday; 13685 cp->cgn_info_year = broken.tm_year - 100; /* relative to 2000 */ 13686 cp->cgn_info_hour = broken.tm_hour; 13687 cp->cgn_info_minute = broken.tm_min; 13688 cp->cgn_info_second = broken.tm_sec; 13689 13690 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13691 "2643 CGNInfo Init: Start Time " 13692 "%d/%d/%d %d:%d:%d\n", 13693 cp->cgn_info_day, cp->cgn_info_month, 13694 cp->cgn_info_year, cp->cgn_info_hour, 13695 cp->cgn_info_minute, cp->cgn_info_second); 13696 13697 /* Fill in default LUN qdepth */ 13698 if (phba->pport) { 13699 size = (uint16_t)(phba->pport->cfg_lun_queue_depth); 13700 cp->cgn_lunq = cpu_to_le16(size); 13701 } 13702 13703 /* last used Index initialized to 0xff already */ 13704 13705 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13706 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13707 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13708 cp->cgn_info_crc = cpu_to_le32(crc); 13709 13710 phba->cgn_evt_timestamp = jiffies + 13711 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 13712 } 13713 13714 void 13715 lpfc_init_congestion_stat(struct lpfc_hba *phba) 13716 { 13717 struct lpfc_cgn_info *cp; 13718 struct timespec64 cmpl_time; 13719 struct tm broken; 13720 uint32_t crc; 13721 13722 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13723 "6236 INIT Congestion Stat %p\n", phba->cgn_i); 13724 13725 if (!phba->cgn_i) 13726 return; 13727 13728 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13729 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat)); 13730 13731 ktime_get_real_ts64(&cmpl_time); 13732 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13733 13734 cp->cgn_stat_month = broken.tm_mon + 1; 13735 cp->cgn_stat_day = broken.tm_mday; 13736 cp->cgn_stat_year = broken.tm_year - 100; /* relative to 2000 */ 13737 cp->cgn_stat_hour = broken.tm_hour; 13738 cp->cgn_stat_minute = broken.tm_min; 13739 13740 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13741 "2647 CGNstat Init: Start Time " 13742 "%d/%d/%d %d:%d\n", 13743 cp->cgn_stat_day, cp->cgn_stat_month, 13744 cp->cgn_stat_year, cp->cgn_stat_hour, 13745 cp->cgn_stat_minute); 13746 13747 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13748 cp->cgn_info_crc = cpu_to_le32(crc); 13749 } 13750 13751 /** 13752 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA 13753 * @phba: Pointer to hba context object. 13754 * @reg: flag to determine register or unregister. 13755 */ 13756 static int 13757 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg) 13758 { 13759 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf; 13760 union lpfc_sli4_cfg_shdr *shdr; 13761 uint32_t shdr_status, shdr_add_status; 13762 LPFC_MBOXQ_t *mboxq; 13763 int length, rc; 13764 13765 if (!phba->cgn_i) 13766 return -ENXIO; 13767 13768 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 13769 if (!mboxq) { 13770 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, 13771 "2641 REG_CONGESTION_BUF mbox allocation fail: " 13772 "HBA state x%x reg %d\n", 13773 phba->pport->port_state, reg); 13774 return -ENOMEM; 13775 } 13776 13777 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) - 13778 sizeof(struct lpfc_sli4_cfg_mhdr)); 13779 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13780 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length, 13781 LPFC_SLI4_MBX_EMBED); 13782 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf; 13783 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1); 13784 if (reg > 0) 13785 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1); 13786 else 13787 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0); 13788 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info); 13789 reg_congestion_buf->addr_lo = 13790 putPaddrLow(phba->cgn_i->phys); 13791 reg_congestion_buf->addr_hi = 13792 putPaddrHigh(phba->cgn_i->phys); 13793 13794 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13795 shdr = (union lpfc_sli4_cfg_shdr *) 13796 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 13797 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 13798 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 13799 &shdr->response); 13800 mempool_free(mboxq, phba->mbox_mem_pool); 13801 if (shdr_status || shdr_add_status || rc) { 13802 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13803 "2642 REG_CONGESTION_BUF mailbox " 13804 "failed with status x%x add_status x%x," 13805 " mbx status x%x reg %d\n", 13806 shdr_status, shdr_add_status, rc, reg); 13807 return -ENXIO; 13808 } 13809 return 0; 13810 } 13811 13812 int 13813 lpfc_unreg_congestion_buf(struct lpfc_hba *phba) 13814 { 13815 lpfc_cmf_stop(phba); 13816 return __lpfc_reg_congestion_buf(phba, 0); 13817 } 13818 13819 int 13820 lpfc_reg_congestion_buf(struct lpfc_hba *phba) 13821 { 13822 return __lpfc_reg_congestion_buf(phba, 1); 13823 } 13824 13825 /** 13826 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. 13827 * @phba: Pointer to HBA context object. 13828 * @mboxq: Pointer to the mailboxq memory for the mailbox command response. 13829 * 13830 * This function is called in the SLI4 code path to read the port's 13831 * sli4 capabilities. 13832 * 13833 * This function may be be called from any context that can block-wait 13834 * for the completion. The expectation is that this routine is called 13835 * typically from probe_one or from the online routine. 13836 **/ 13837 int 13838 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) 13839 { 13840 int rc; 13841 struct lpfc_mqe *mqe = &mboxq->u.mqe; 13842 struct lpfc_pc_sli4_params *sli4_params; 13843 uint32_t mbox_tmo; 13844 int length; 13845 bool exp_wqcq_pages = true; 13846 struct lpfc_sli4_parameters *mbx_sli4_parameters; 13847 13848 /* 13849 * By default, the driver assumes the SLI4 port requires RPI 13850 * header postings. The SLI4_PARAM response will correct this 13851 * assumption. 13852 */ 13853 phba->sli4_hba.rpi_hdrs_in_use = 1; 13854 13855 /* Read the port's SLI4 Config Parameters */ 13856 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 13857 sizeof(struct lpfc_sli4_cfg_mhdr)); 13858 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13859 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 13860 length, LPFC_SLI4_MBX_EMBED); 13861 if (!phba->sli4_hba.intr_enable) 13862 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13863 else { 13864 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); 13865 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); 13866 } 13867 if (unlikely(rc)) 13868 return rc; 13869 sli4_params = &phba->sli4_hba.pc_sli4_params; 13870 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 13871 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); 13872 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); 13873 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); 13874 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, 13875 mbx_sli4_parameters); 13876 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, 13877 mbx_sli4_parameters); 13878 if (bf_get(cfg_phwq, mbx_sli4_parameters)) 13879 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; 13880 else 13881 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; 13882 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; 13883 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope, 13884 mbx_sli4_parameters); 13885 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); 13886 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); 13887 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); 13888 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); 13889 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); 13890 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); 13891 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); 13892 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); 13893 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); 13894 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); 13895 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, 13896 mbx_sli4_parameters); 13897 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); 13898 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, 13899 mbx_sli4_parameters); 13900 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); 13901 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); 13902 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); 13903 13904 /* Check for Extended Pre-Registered SGL support */ 13905 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); 13906 13907 /* Check for firmware nvme support */ 13908 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && 13909 bf_get(cfg_xib, mbx_sli4_parameters)); 13910 13911 if (rc) { 13912 /* Save this to indicate the Firmware supports NVME */ 13913 sli4_params->nvme = 1; 13914 13915 /* Firmware NVME support, check driver FC4 NVME support */ 13916 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { 13917 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13918 "6133 Disabling NVME support: " 13919 "FC4 type not supported: x%x\n", 13920 phba->cfg_enable_fc4_type); 13921 goto fcponly; 13922 } 13923 } else { 13924 /* No firmware NVME support, check driver FC4 NVME support */ 13925 sli4_params->nvme = 0; 13926 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, 13928 "6101 Disabling NVME support: Not " 13929 "supported by firmware (%d %d) x%x\n", 13930 bf_get(cfg_nvme, mbx_sli4_parameters), 13931 bf_get(cfg_xib, mbx_sli4_parameters), 13932 phba->cfg_enable_fc4_type); 13933 fcponly: 13934 phba->nvmet_support = 0; 13935 phba->cfg_nvmet_mrq = 0; 13936 phba->cfg_nvme_seg_cnt = 0; 13937 13938 /* If no FC4 type support, move to just SCSI support */ 13939 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 13940 return -ENODEV; 13941 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; 13942 } 13943 } 13944 13945 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 13946 * accommodate 512K and 1M IOs in a single nvme buf. 13947 */ 13948 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13949 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 13950 13951 /* Enable embedded Payload BDE if support is indicated */ 13952 if (bf_get(cfg_pbde, mbx_sli4_parameters)) 13953 phba->cfg_enable_pbde = 1; 13954 else 13955 phba->cfg_enable_pbde = 0; 13956 13957 /* 13958 * To support Suppress Response feature we must satisfy 3 conditions. 13959 * lpfc_suppress_rsp module parameter must be set (default). 13960 * In SLI4-Parameters Descriptor: 13961 * Extended Inline Buffers (XIB) must be supported. 13962 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported 13963 * (double negative). 13964 */ 13965 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && 13966 !(bf_get(cfg_nosr, mbx_sli4_parameters))) 13967 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; 13968 else 13969 phba->cfg_suppress_rsp = 0; 13970 13971 if (bf_get(cfg_eqdr, mbx_sli4_parameters)) 13972 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; 13973 13974 /* Make sure that sge_supp_len can be handled by the driver */ 13975 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) 13976 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; 13977 13978 rc = dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len); 13979 if (unlikely(rc)) { 13980 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13981 "6400 Can't set dma maximum segment size\n"); 13982 return rc; 13983 } 13984 13985 /* 13986 * Check whether the adapter supports an embedded copy of the 13987 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order 13988 * to use this option, 128-byte WQEs must be used. 13989 */ 13990 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) 13991 phba->fcp_embed_io = 1; 13992 else 13993 phba->fcp_embed_io = 0; 13994 13995 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13996 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", 13997 bf_get(cfg_xib, mbx_sli4_parameters), 13998 phba->cfg_enable_pbde, 13999 phba->fcp_embed_io, sli4_params->nvme, 14000 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); 14001 14002 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 14003 LPFC_SLI_INTF_IF_TYPE_2) && 14004 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 14005 LPFC_SLI_INTF_FAMILY_LNCR_A0)) 14006 exp_wqcq_pages = false; 14007 14008 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && 14009 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && 14010 exp_wqcq_pages && 14011 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) 14012 phba->enab_exp_wqcq_pages = 1; 14013 else 14014 phba->enab_exp_wqcq_pages = 0; 14015 /* 14016 * Check if the SLI port supports MDS Diagnostics 14017 */ 14018 if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) 14019 phba->mds_diags_support = 1; 14020 else 14021 phba->mds_diags_support = 0; 14022 14023 /* 14024 * Check if the SLI port supports NSLER 14025 */ 14026 if (bf_get(cfg_nsler, mbx_sli4_parameters)) 14027 phba->nsler = 1; 14028 else 14029 phba->nsler = 0; 14030 14031 return 0; 14032 } 14033 14034 /** 14035 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 14036 * @pdev: pointer to PCI device 14037 * @pid: pointer to PCI device identifier 14038 * 14039 * This routine is to be called to attach a device with SLI-3 interface spec 14040 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14041 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14042 * information of the device and driver to see if the driver state that it can 14043 * support this kind of device. If the match is successful, the driver core 14044 * invokes this routine. If this routine determines it can claim the HBA, it 14045 * does all the initialization that it needs to do to handle the HBA properly. 14046 * 14047 * Return code 14048 * 0 - driver can claim the device 14049 * negative value - driver can not claim the device 14050 **/ 14051 static int 14052 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) 14053 { 14054 struct lpfc_hba *phba; 14055 struct lpfc_vport *vport = NULL; 14056 struct Scsi_Host *shost = NULL; 14057 int error; 14058 uint32_t cfg_mode, intr_mode; 14059 14060 /* Allocate memory for HBA structure */ 14061 phba = lpfc_hba_alloc(pdev); 14062 if (!phba) 14063 return -ENOMEM; 14064 14065 /* Perform generic PCI device enabling operation */ 14066 error = lpfc_enable_pci_dev(phba); 14067 if (error) 14068 goto out_free_phba; 14069 14070 /* Set up SLI API function jump table for PCI-device group-0 HBAs */ 14071 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); 14072 if (error) 14073 goto out_disable_pci_dev; 14074 14075 /* Set up SLI-3 specific device PCI memory space */ 14076 error = lpfc_sli_pci_mem_setup(phba); 14077 if (error) { 14078 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14079 "1402 Failed to set up pci memory space.\n"); 14080 goto out_disable_pci_dev; 14081 } 14082 14083 /* Set up SLI-3 specific device driver resources */ 14084 error = lpfc_sli_driver_resource_setup(phba); 14085 if (error) { 14086 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14087 "1404 Failed to set up driver resource.\n"); 14088 goto out_unset_pci_mem_s3; 14089 } 14090 14091 /* Initialize and populate the iocb list per host */ 14092 14093 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); 14094 if (error) { 14095 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14096 "1405 Failed to initialize iocb list.\n"); 14097 goto out_unset_driver_resource_s3; 14098 } 14099 14100 /* Set up common device driver resources */ 14101 error = lpfc_setup_driver_resource_phase2(phba); 14102 if (error) { 14103 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14104 "1406 Failed to set up driver resource.\n"); 14105 goto out_free_iocb_list; 14106 } 14107 14108 /* Get the default values for Model Name and Description */ 14109 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14110 14111 /* Create SCSI host to the physical port */ 14112 error = lpfc_create_shost(phba); 14113 if (error) { 14114 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14115 "1407 Failed to create scsi host.\n"); 14116 goto out_unset_driver_resource; 14117 } 14118 14119 /* Configure sysfs attributes */ 14120 vport = phba->pport; 14121 error = lpfc_alloc_sysfs_attr(vport); 14122 if (error) { 14123 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14124 "1476 Failed to allocate sysfs attr\n"); 14125 goto out_destroy_shost; 14126 } 14127 14128 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14129 /* Now, trying to enable interrupt and bring up the device */ 14130 cfg_mode = phba->cfg_use_msi; 14131 while (true) { 14132 /* Put device to a known state before enabling interrupt */ 14133 lpfc_stop_port(phba); 14134 /* Configure and enable interrupt */ 14135 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); 14136 if (intr_mode == LPFC_INTR_ERROR) { 14137 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14138 "0431 Failed to enable interrupt.\n"); 14139 error = -ENODEV; 14140 goto out_free_sysfs_attr; 14141 } 14142 /* SLI-3 HBA setup */ 14143 if (lpfc_sli_hba_setup(phba)) { 14144 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14145 "1477 Failed to set up hba\n"); 14146 error = -ENODEV; 14147 goto out_remove_device; 14148 } 14149 14150 /* Wait 50ms for the interrupts of previous mailbox commands */ 14151 msleep(50); 14152 /* Check active interrupts on message signaled interrupts */ 14153 if (intr_mode == 0 || 14154 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { 14155 /* Log the current active interrupt mode */ 14156 phba->intr_mode = intr_mode; 14157 lpfc_log_intr_mode(phba, intr_mode); 14158 break; 14159 } else { 14160 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14161 "0447 Configure interrupt mode (%d) " 14162 "failed active interrupt test.\n", 14163 intr_mode); 14164 /* Disable the current interrupt mode */ 14165 lpfc_sli_disable_intr(phba); 14166 /* Try next level of interrupt mode */ 14167 cfg_mode = --intr_mode; 14168 } 14169 } 14170 14171 /* Perform post initialization setup */ 14172 lpfc_post_init_setup(phba); 14173 14174 /* Check if there are static vports to be created. */ 14175 lpfc_create_static_vport(phba); 14176 14177 return 0; 14178 14179 out_remove_device: 14180 lpfc_unset_hba(phba); 14181 out_free_sysfs_attr: 14182 lpfc_free_sysfs_attr(vport); 14183 out_destroy_shost: 14184 lpfc_destroy_shost(phba); 14185 out_unset_driver_resource: 14186 lpfc_unset_driver_resource_phase2(phba); 14187 out_free_iocb_list: 14188 lpfc_free_iocb_list(phba); 14189 out_unset_driver_resource_s3: 14190 lpfc_sli_driver_resource_unset(phba); 14191 out_unset_pci_mem_s3: 14192 lpfc_sli_pci_mem_unset(phba); 14193 out_disable_pci_dev: 14194 lpfc_disable_pci_dev(phba); 14195 if (shost) 14196 scsi_host_put(shost); 14197 out_free_phba: 14198 lpfc_hba_free(phba); 14199 return error; 14200 } 14201 14202 /** 14203 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. 14204 * @pdev: pointer to PCI device 14205 * 14206 * This routine is to be called to disattach a device with SLI-3 interface 14207 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14208 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14209 * device to be removed from the PCI subsystem properly. 14210 **/ 14211 static void 14212 lpfc_pci_remove_one_s3(struct pci_dev *pdev) 14213 { 14214 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14215 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14216 struct lpfc_vport **vports; 14217 struct lpfc_hba *phba = vport->phba; 14218 int i; 14219 14220 spin_lock_irq(&phba->hbalock); 14221 vport->load_flag |= FC_UNLOADING; 14222 spin_unlock_irq(&phba->hbalock); 14223 14224 lpfc_free_sysfs_attr(vport); 14225 14226 /* Release all the vports against this physical port */ 14227 vports = lpfc_create_vport_work_array(phba); 14228 if (vports != NULL) 14229 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 14230 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 14231 continue; 14232 fc_vport_terminate(vports[i]->fc_vport); 14233 } 14234 lpfc_destroy_vport_work_array(phba, vports); 14235 14236 /* Remove FC host with the physical port */ 14237 fc_remove_host(shost); 14238 scsi_remove_host(shost); 14239 14240 /* Clean up all nodes, mailboxes and IOs. */ 14241 lpfc_cleanup(vport); 14242 14243 /* 14244 * Bring down the SLI Layer. This step disable all interrupts, 14245 * clears the rings, discards all mailbox commands, and resets 14246 * the HBA. 14247 */ 14248 14249 /* HBA interrupt will be disabled after this call */ 14250 lpfc_sli_hba_down(phba); 14251 /* Stop kthread signal shall trigger work_done one more time */ 14252 kthread_stop(phba->worker_thread); 14253 /* Final cleanup of txcmplq and reset the HBA */ 14254 lpfc_sli_brdrestart(phba); 14255 14256 kfree(phba->vpi_bmask); 14257 kfree(phba->vpi_ids); 14258 14259 lpfc_stop_hba_timers(phba); 14260 spin_lock_irq(&phba->port_list_lock); 14261 list_del_init(&vport->listentry); 14262 spin_unlock_irq(&phba->port_list_lock); 14263 14264 lpfc_debugfs_terminate(vport); 14265 14266 /* Disable SR-IOV if enabled */ 14267 if (phba->cfg_sriov_nr_virtfn) 14268 pci_disable_sriov(pdev); 14269 14270 /* Disable interrupt */ 14271 lpfc_sli_disable_intr(phba); 14272 14273 scsi_host_put(shost); 14274 14275 /* 14276 * Call scsi_free before mem_free since scsi bufs are released to their 14277 * corresponding pools here. 14278 */ 14279 lpfc_scsi_free(phba); 14280 lpfc_free_iocb_list(phba); 14281 14282 lpfc_mem_free_all(phba); 14283 14284 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 14285 phba->hbqslimp.virt, phba->hbqslimp.phys); 14286 14287 /* Free resources associated with SLI2 interface */ 14288 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 14289 phba->slim2p.virt, phba->slim2p.phys); 14290 14291 /* unmap adapter SLIM and Control Registers */ 14292 iounmap(phba->ctrl_regs_memmap_p); 14293 iounmap(phba->slim_memmap_p); 14294 14295 lpfc_hba_free(phba); 14296 14297 pci_release_mem_regions(pdev); 14298 pci_disable_device(pdev); 14299 } 14300 14301 /** 14302 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt 14303 * @dev_d: pointer to device 14304 * 14305 * This routine is to be called from the kernel's PCI subsystem to support 14306 * system Power Management (PM) to device with SLI-3 interface spec. When 14307 * PM invokes this method, it quiesces the device by stopping the driver's 14308 * worker thread for the device, turning off device's interrupt and DMA, 14309 * and bring the device offline. Note that as the driver implements the 14310 * minimum PM requirements to a power-aware driver's PM support for the 14311 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 14312 * to the suspend() method call will be treated as SUSPEND and the driver will 14313 * fully reinitialize its device during resume() method call, the driver will 14314 * set device to PCI_D3hot state in PCI config space instead of setting it 14315 * according to the @msg provided by the PM. 14316 * 14317 * Return code 14318 * 0 - driver suspended the device 14319 * Error otherwise 14320 **/ 14321 static int __maybe_unused 14322 lpfc_pci_suspend_one_s3(struct device *dev_d) 14323 { 14324 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14325 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14326 14327 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14328 "0473 PCI device Power Management suspend.\n"); 14329 14330 /* Bring down the device */ 14331 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14332 lpfc_offline(phba); 14333 kthread_stop(phba->worker_thread); 14334 14335 /* Disable interrupt from device */ 14336 lpfc_sli_disable_intr(phba); 14337 14338 return 0; 14339 } 14340 14341 /** 14342 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt 14343 * @dev_d: pointer to device 14344 * 14345 * This routine is to be called from the kernel's PCI subsystem to support 14346 * system Power Management (PM) to device with SLI-3 interface spec. When PM 14347 * invokes this method, it restores the device's PCI config space state and 14348 * fully reinitializes the device and brings it online. Note that as the 14349 * driver implements the minimum PM requirements to a power-aware driver's 14350 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, 14351 * FREEZE) to the suspend() method call will be treated as SUSPEND and the 14352 * driver will fully reinitialize its device during resume() method call, 14353 * the device will be set to PCI_D0 directly in PCI config space before 14354 * restoring the state. 14355 * 14356 * Return code 14357 * 0 - driver suspended the device 14358 * Error otherwise 14359 **/ 14360 static int __maybe_unused 14361 lpfc_pci_resume_one_s3(struct device *dev_d) 14362 { 14363 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14364 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14365 uint32_t intr_mode; 14366 int error; 14367 14368 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14369 "0452 PCI device Power Management resume.\n"); 14370 14371 /* Startup the kernel thread for this host adapter. */ 14372 phba->worker_thread = kthread_run(lpfc_do_work, phba, 14373 "lpfc_worker_%d", phba->brd_no); 14374 if (IS_ERR(phba->worker_thread)) { 14375 error = PTR_ERR(phba->worker_thread); 14376 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14377 "0434 PM resume failed to start worker " 14378 "thread: error=x%x.\n", error); 14379 return error; 14380 } 14381 14382 /* Init cpu_map array */ 14383 lpfc_cpu_map_array_init(phba); 14384 /* Init hba_eq_hdl array */ 14385 lpfc_hba_eq_hdl_array_init(phba); 14386 /* Configure and enable interrupt */ 14387 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14388 if (intr_mode == LPFC_INTR_ERROR) { 14389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14390 "0430 PM resume Failed to enable interrupt\n"); 14391 return -EIO; 14392 } else 14393 phba->intr_mode = intr_mode; 14394 14395 /* Restart HBA and bring it online */ 14396 lpfc_sli_brdrestart(phba); 14397 lpfc_online(phba); 14398 14399 /* Log the current active interrupt mode */ 14400 lpfc_log_intr_mode(phba, phba->intr_mode); 14401 14402 return 0; 14403 } 14404 14405 /** 14406 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover 14407 * @phba: pointer to lpfc hba data structure. 14408 * 14409 * This routine is called to prepare the SLI3 device for PCI slot recover. It 14410 * aborts all the outstanding SCSI I/Os to the pci device. 14411 **/ 14412 static void 14413 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) 14414 { 14415 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14416 "2723 PCI channel I/O abort preparing for recovery\n"); 14417 14418 /* 14419 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 14420 * and let the SCSI mid-layer to retry them to recover. 14421 */ 14422 lpfc_sli_abort_fcp_rings(phba); 14423 } 14424 14425 /** 14426 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset 14427 * @phba: pointer to lpfc hba data structure. 14428 * 14429 * This routine is called to prepare the SLI3 device for PCI slot reset. It 14430 * disables the device interrupt and pci device, and aborts the internal FCP 14431 * pending I/Os. 14432 **/ 14433 static void 14434 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) 14435 { 14436 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14437 "2710 PCI channel disable preparing for reset\n"); 14438 14439 /* Block any management I/Os to the device */ 14440 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 14441 14442 /* Block all SCSI devices' I/Os on the host */ 14443 lpfc_scsi_dev_block(phba); 14444 14445 /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 14446 lpfc_sli_flush_io_rings(phba); 14447 14448 /* stop all timers */ 14449 lpfc_stop_hba_timers(phba); 14450 14451 /* Disable interrupt and pci device */ 14452 lpfc_sli_disable_intr(phba); 14453 pci_disable_device(phba->pcidev); 14454 } 14455 14456 /** 14457 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable 14458 * @phba: pointer to lpfc hba data structure. 14459 * 14460 * This routine is called to prepare the SLI3 device for PCI slot permanently 14461 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 14462 * pending I/Os. 14463 **/ 14464 static void 14465 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) 14466 { 14467 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14468 "2711 PCI channel permanent disable for failure\n"); 14469 /* Block all SCSI devices' I/Os on the host */ 14470 lpfc_scsi_dev_block(phba); 14471 lpfc_sli4_prep_dev_for_reset(phba); 14472 14473 /* stop all timers */ 14474 lpfc_stop_hba_timers(phba); 14475 14476 /* Clean up all driver's outstanding SCSI I/Os */ 14477 lpfc_sli_flush_io_rings(phba); 14478 } 14479 14480 /** 14481 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error 14482 * @pdev: pointer to PCI device. 14483 * @state: the current PCI connection state. 14484 * 14485 * This routine is called from the PCI subsystem for I/O error handling to 14486 * device with SLI-3 interface spec. This function is called by the PCI 14487 * subsystem after a PCI bus error affecting this device has been detected. 14488 * When this function is invoked, it will need to stop all the I/Os and 14489 * interrupt(s) to the device. Once that is done, it will return 14490 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery 14491 * as desired. 14492 * 14493 * Return codes 14494 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link 14495 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 14496 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14497 **/ 14498 static pci_ers_result_t 14499 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) 14500 { 14501 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14502 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14503 14504 switch (state) { 14505 case pci_channel_io_normal: 14506 /* Non-fatal error, prepare for recovery */ 14507 lpfc_sli_prep_dev_for_recover(phba); 14508 return PCI_ERS_RESULT_CAN_RECOVER; 14509 case pci_channel_io_frozen: 14510 /* Fatal error, prepare for slot reset */ 14511 lpfc_sli_prep_dev_for_reset(phba); 14512 return PCI_ERS_RESULT_NEED_RESET; 14513 case pci_channel_io_perm_failure: 14514 /* Permanent failure, prepare for device down */ 14515 lpfc_sli_prep_dev_for_perm_failure(phba); 14516 return PCI_ERS_RESULT_DISCONNECT; 14517 default: 14518 /* Unknown state, prepare and request slot reset */ 14519 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14520 "0472 Unknown PCI error state: x%x\n", state); 14521 lpfc_sli_prep_dev_for_reset(phba); 14522 return PCI_ERS_RESULT_NEED_RESET; 14523 } 14524 } 14525 14526 /** 14527 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. 14528 * @pdev: pointer to PCI device. 14529 * 14530 * This routine is called from the PCI subsystem for error handling to 14531 * device with SLI-3 interface spec. This is called after PCI bus has been 14532 * reset to restart the PCI card from scratch, as if from a cold-boot. 14533 * During the PCI subsystem error recovery, after driver returns 14534 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 14535 * recovery and then call this routine before calling the .resume method 14536 * to recover the device. This function will initialize the HBA device, 14537 * enable the interrupt, but it will just put the HBA to offline state 14538 * without passing any I/O traffic. 14539 * 14540 * Return codes 14541 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 14542 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14543 */ 14544 static pci_ers_result_t 14545 lpfc_io_slot_reset_s3(struct pci_dev *pdev) 14546 { 14547 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14548 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14549 struct lpfc_sli *psli = &phba->sli; 14550 uint32_t intr_mode; 14551 14552 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 14553 if (pci_enable_device_mem(pdev)) { 14554 printk(KERN_ERR "lpfc: Cannot re-enable " 14555 "PCI device after reset.\n"); 14556 return PCI_ERS_RESULT_DISCONNECT; 14557 } 14558 14559 pci_restore_state(pdev); 14560 14561 /* 14562 * As the new kernel behavior of pci_restore_state() API call clears 14563 * device saved_state flag, need to save the restored state again. 14564 */ 14565 pci_save_state(pdev); 14566 14567 if (pdev->is_busmaster) 14568 pci_set_master(pdev); 14569 14570 spin_lock_irq(&phba->hbalock); 14571 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 14572 spin_unlock_irq(&phba->hbalock); 14573 14574 /* Configure and enable interrupt */ 14575 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14576 if (intr_mode == LPFC_INTR_ERROR) { 14577 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14578 "0427 Cannot re-enable interrupt after " 14579 "slot reset.\n"); 14580 return PCI_ERS_RESULT_DISCONNECT; 14581 } else 14582 phba->intr_mode = intr_mode; 14583 14584 /* Take device offline, it will perform cleanup */ 14585 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14586 lpfc_offline(phba); 14587 lpfc_sli_brdrestart(phba); 14588 14589 /* Log the current active interrupt mode */ 14590 lpfc_log_intr_mode(phba, phba->intr_mode); 14591 14592 return PCI_ERS_RESULT_RECOVERED; 14593 } 14594 14595 /** 14596 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. 14597 * @pdev: pointer to PCI device 14598 * 14599 * This routine is called from the PCI subsystem for error handling to device 14600 * with SLI-3 interface spec. It is called when kernel error recovery tells 14601 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 14602 * error recovery. After this call, traffic can start to flow from this device 14603 * again. 14604 */ 14605 static void 14606 lpfc_io_resume_s3(struct pci_dev *pdev) 14607 { 14608 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14609 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14610 14611 /* Bring device online, it will be no-op for non-fatal error resume */ 14612 lpfc_online(phba); 14613 } 14614 14615 /** 14616 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve 14617 * @phba: pointer to lpfc hba data structure. 14618 * 14619 * returns the number of ELS/CT IOCBs to reserve 14620 **/ 14621 int 14622 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) 14623 { 14624 int max_xri = phba->sli4_hba.max_cfg_param.max_xri; 14625 14626 if (phba->sli_rev == LPFC_SLI_REV4) { 14627 if (max_xri <= 100) 14628 return 10; 14629 else if (max_xri <= 256) 14630 return 25; 14631 else if (max_xri <= 512) 14632 return 50; 14633 else if (max_xri <= 1024) 14634 return 100; 14635 else if (max_xri <= 1536) 14636 return 150; 14637 else if (max_xri <= 2048) 14638 return 200; 14639 else 14640 return 250; 14641 } else 14642 return 0; 14643 } 14644 14645 /** 14646 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve 14647 * @phba: pointer to lpfc hba data structure. 14648 * 14649 * returns the number of ELS/CT + NVMET IOCBs to reserve 14650 **/ 14651 int 14652 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) 14653 { 14654 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); 14655 14656 if (phba->nvmet_support) 14657 max_xri += LPFC_NVMET_BUF_POST; 14658 return max_xri; 14659 } 14660 14661 14662 static int 14663 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, 14664 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, 14665 const struct firmware *fw) 14666 { 14667 int rc; 14668 u8 sli_family; 14669 14670 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); 14671 /* Three cases: (1) FW was not supported on the detected adapter. 14672 * (2) FW update has been locked out administratively. 14673 * (3) Some other error during FW update. 14674 * In each case, an unmaskable message is written to the console 14675 * for admin diagnosis. 14676 */ 14677 if (offset == ADD_STATUS_FW_NOT_SUPPORTED || 14678 (sli_family == LPFC_SLI_INTF_FAMILY_G6 && 14679 magic_number != MAGIC_NUMBER_G6) || 14680 (sli_family == LPFC_SLI_INTF_FAMILY_G7 && 14681 magic_number != MAGIC_NUMBER_G7) || 14682 (sli_family == LPFC_SLI_INTF_FAMILY_G7P && 14683 magic_number != MAGIC_NUMBER_G7P)) { 14684 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14685 "3030 This firmware version is not supported on" 14686 " this HBA model. Device:%x Magic:%x Type:%x " 14687 "ID:%x Size %d %zd\n", 14688 phba->pcidev->device, magic_number, ftype, fid, 14689 fsize, fw->size); 14690 rc = -EINVAL; 14691 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { 14692 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14693 "3021 Firmware downloads have been prohibited " 14694 "by a system configuration setting on " 14695 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14696 "%zd\n", 14697 phba->pcidev->device, magic_number, ftype, fid, 14698 fsize, fw->size); 14699 rc = -EACCES; 14700 } else { 14701 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14702 "3022 FW Download failed. Add Status x%x " 14703 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14704 "%zd\n", 14705 offset, phba->pcidev->device, magic_number, 14706 ftype, fid, fsize, fw->size); 14707 rc = -EIO; 14708 } 14709 return rc; 14710 } 14711 14712 /** 14713 * lpfc_write_firmware - attempt to write a firmware image to the port 14714 * @fw: pointer to firmware image returned from request_firmware. 14715 * @context: pointer to firmware image returned from request_firmware. 14716 * 14717 **/ 14718 static void 14719 lpfc_write_firmware(const struct firmware *fw, void *context) 14720 { 14721 struct lpfc_hba *phba = (struct lpfc_hba *)context; 14722 char fwrev[FW_REV_STR_SIZE]; 14723 struct lpfc_grp_hdr *image; 14724 struct list_head dma_buffer_list; 14725 int i, rc = 0; 14726 struct lpfc_dmabuf *dmabuf, *next; 14727 uint32_t offset = 0, temp_offset = 0; 14728 uint32_t magic_number, ftype, fid, fsize; 14729 14730 /* It can be null in no-wait mode, sanity check */ 14731 if (!fw) { 14732 rc = -ENXIO; 14733 goto out; 14734 } 14735 image = (struct lpfc_grp_hdr *)fw->data; 14736 14737 magic_number = be32_to_cpu(image->magic_number); 14738 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); 14739 fid = bf_get_be32(lpfc_grp_hdr_id, image); 14740 fsize = be32_to_cpu(image->size); 14741 14742 INIT_LIST_HEAD(&dma_buffer_list); 14743 lpfc_decode_firmware_rev(phba, fwrev, 1); 14744 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { 14745 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14746 "3023 Updating Firmware, Current Version:%s " 14747 "New Version:%s\n", 14748 fwrev, image->revision); 14749 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { 14750 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), 14751 GFP_KERNEL); 14752 if (!dmabuf) { 14753 rc = -ENOMEM; 14754 goto release_out; 14755 } 14756 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 14757 SLI4_PAGE_SIZE, 14758 &dmabuf->phys, 14759 GFP_KERNEL); 14760 if (!dmabuf->virt) { 14761 kfree(dmabuf); 14762 rc = -ENOMEM; 14763 goto release_out; 14764 } 14765 list_add_tail(&dmabuf->list, &dma_buffer_list); 14766 } 14767 while (offset < fw->size) { 14768 temp_offset = offset; 14769 list_for_each_entry(dmabuf, &dma_buffer_list, list) { 14770 if (temp_offset + SLI4_PAGE_SIZE > fw->size) { 14771 memcpy(dmabuf->virt, 14772 fw->data + temp_offset, 14773 fw->size - temp_offset); 14774 temp_offset = fw->size; 14775 break; 14776 } 14777 memcpy(dmabuf->virt, fw->data + temp_offset, 14778 SLI4_PAGE_SIZE); 14779 temp_offset += SLI4_PAGE_SIZE; 14780 } 14781 rc = lpfc_wr_object(phba, &dma_buffer_list, 14782 (fw->size - offset), &offset); 14783 if (rc) { 14784 rc = lpfc_log_write_firmware_error(phba, offset, 14785 magic_number, 14786 ftype, 14787 fid, 14788 fsize, 14789 fw); 14790 goto release_out; 14791 } 14792 } 14793 rc = offset; 14794 } else 14795 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14796 "3029 Skipped Firmware update, Current " 14797 "Version:%s New Version:%s\n", 14798 fwrev, image->revision); 14799 14800 release_out: 14801 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { 14802 list_del(&dmabuf->list); 14803 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, 14804 dmabuf->virt, dmabuf->phys); 14805 kfree(dmabuf); 14806 } 14807 release_firmware(fw); 14808 out: 14809 if (rc < 0) 14810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14811 "3062 Firmware update error, status %d.\n", rc); 14812 else 14813 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14814 "3024 Firmware update success: size %d.\n", rc); 14815 } 14816 14817 /** 14818 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade 14819 * @phba: pointer to lpfc hba data structure. 14820 * @fw_upgrade: which firmware to update. 14821 * 14822 * This routine is called to perform Linux generic firmware upgrade on device 14823 * that supports such feature. 14824 **/ 14825 int 14826 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) 14827 { 14828 uint8_t file_name[ELX_MODEL_NAME_SIZE]; 14829 int ret; 14830 const struct firmware *fw; 14831 14832 /* Only supported on SLI4 interface type 2 for now */ 14833 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 14834 LPFC_SLI_INTF_IF_TYPE_2) 14835 return -EPERM; 14836 14837 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); 14838 14839 if (fw_upgrade == INT_FW_UPGRADE) { 14840 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 14841 file_name, &phba->pcidev->dev, 14842 GFP_KERNEL, (void *)phba, 14843 lpfc_write_firmware); 14844 } else if (fw_upgrade == RUN_FW_UPGRADE) { 14845 ret = request_firmware(&fw, file_name, &phba->pcidev->dev); 14846 if (!ret) 14847 lpfc_write_firmware(fw, (void *)phba); 14848 } else { 14849 ret = -EINVAL; 14850 } 14851 14852 return ret; 14853 } 14854 14855 /** 14856 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys 14857 * @pdev: pointer to PCI device 14858 * @pid: pointer to PCI device identifier 14859 * 14860 * This routine is called from the kernel's PCI subsystem to device with 14861 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14862 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14863 * information of the device and driver to see if the driver state that it 14864 * can support this kind of device. If the match is successful, the driver 14865 * core invokes this routine. If this routine determines it can claim the HBA, 14866 * it does all the initialization that it needs to do to handle the HBA 14867 * properly. 14868 * 14869 * Return code 14870 * 0 - driver can claim the device 14871 * negative value - driver can not claim the device 14872 **/ 14873 static int 14874 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) 14875 { 14876 struct lpfc_hba *phba; 14877 struct lpfc_vport *vport = NULL; 14878 struct Scsi_Host *shost = NULL; 14879 int error; 14880 uint32_t cfg_mode, intr_mode; 14881 14882 /* Allocate memory for HBA structure */ 14883 phba = lpfc_hba_alloc(pdev); 14884 if (!phba) 14885 return -ENOMEM; 14886 14887 INIT_LIST_HEAD(&phba->poll_list); 14888 14889 /* Perform generic PCI device enabling operation */ 14890 error = lpfc_enable_pci_dev(phba); 14891 if (error) 14892 goto out_free_phba; 14893 14894 /* Set up SLI API function jump table for PCI-device group-1 HBAs */ 14895 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); 14896 if (error) 14897 goto out_disable_pci_dev; 14898 14899 /* Set up SLI-4 specific device PCI memory space */ 14900 error = lpfc_sli4_pci_mem_setup(phba); 14901 if (error) { 14902 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14903 "1410 Failed to set up pci memory space.\n"); 14904 goto out_disable_pci_dev; 14905 } 14906 14907 /* Set up SLI-4 Specific device driver resources */ 14908 error = lpfc_sli4_driver_resource_setup(phba); 14909 if (error) { 14910 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14911 "1412 Failed to set up driver resource.\n"); 14912 goto out_unset_pci_mem_s4; 14913 } 14914 14915 INIT_LIST_HEAD(&phba->active_rrq_list); 14916 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); 14917 14918 /* Set up common device driver resources */ 14919 error = lpfc_setup_driver_resource_phase2(phba); 14920 if (error) { 14921 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14922 "1414 Failed to set up driver resource.\n"); 14923 goto out_unset_driver_resource_s4; 14924 } 14925 14926 /* Get the default values for Model Name and Description */ 14927 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14928 14929 /* Now, trying to enable interrupt and bring up the device */ 14930 cfg_mode = phba->cfg_use_msi; 14931 14932 /* Put device to a known state before enabling interrupt */ 14933 phba->pport = NULL; 14934 lpfc_stop_port(phba); 14935 14936 /* Init cpu_map array */ 14937 lpfc_cpu_map_array_init(phba); 14938 14939 /* Init hba_eq_hdl array */ 14940 lpfc_hba_eq_hdl_array_init(phba); 14941 14942 /* Configure and enable interrupt */ 14943 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); 14944 if (intr_mode == LPFC_INTR_ERROR) { 14945 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14946 "0426 Failed to enable interrupt.\n"); 14947 error = -ENODEV; 14948 goto out_unset_driver_resource; 14949 } 14950 /* Default to single EQ for non-MSI-X */ 14951 if (phba->intr_type != MSIX) { 14952 phba->cfg_irq_chann = 1; 14953 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14954 if (phba->nvmet_support) 14955 phba->cfg_nvmet_mrq = 1; 14956 } 14957 } 14958 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 14959 14960 /* Create SCSI host to the physical port */ 14961 error = lpfc_create_shost(phba); 14962 if (error) { 14963 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14964 "1415 Failed to create scsi host.\n"); 14965 goto out_disable_intr; 14966 } 14967 vport = phba->pport; 14968 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14969 14970 /* Configure sysfs attributes */ 14971 error = lpfc_alloc_sysfs_attr(vport); 14972 if (error) { 14973 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14974 "1416 Failed to allocate sysfs attr\n"); 14975 goto out_destroy_shost; 14976 } 14977 14978 /* Set up SLI-4 HBA */ 14979 if (lpfc_sli4_hba_setup(phba)) { 14980 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14981 "1421 Failed to set up hba\n"); 14982 error = -ENODEV; 14983 goto out_free_sysfs_attr; 14984 } 14985 14986 /* Log the current active interrupt mode */ 14987 phba->intr_mode = intr_mode; 14988 lpfc_log_intr_mode(phba, intr_mode); 14989 14990 /* Perform post initialization setup */ 14991 lpfc_post_init_setup(phba); 14992 14993 /* NVME support in FW earlier in the driver load corrects the 14994 * FC4 type making a check for nvme_support unnecessary. 14995 */ 14996 if (phba->nvmet_support == 0) { 14997 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14998 /* Create NVME binding with nvme_fc_transport. This 14999 * ensures the vport is initialized. If the localport 15000 * create fails, it should not unload the driver to 15001 * support field issues. 15002 */ 15003 error = lpfc_nvme_create_localport(vport); 15004 if (error) { 15005 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15006 "6004 NVME registration " 15007 "failed, error x%x\n", 15008 error); 15009 } 15010 } 15011 } 15012 15013 /* check for firmware upgrade or downgrade */ 15014 if (phba->cfg_request_firmware_upgrade) 15015 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); 15016 15017 /* Check if there are static vports to be created. */ 15018 lpfc_create_static_vport(phba); 15019 15020 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); 15021 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); 15022 15023 return 0; 15024 15025 out_free_sysfs_attr: 15026 lpfc_free_sysfs_attr(vport); 15027 out_destroy_shost: 15028 lpfc_destroy_shost(phba); 15029 out_disable_intr: 15030 lpfc_sli4_disable_intr(phba); 15031 out_unset_driver_resource: 15032 lpfc_unset_driver_resource_phase2(phba); 15033 out_unset_driver_resource_s4: 15034 lpfc_sli4_driver_resource_unset(phba); 15035 out_unset_pci_mem_s4: 15036 lpfc_sli4_pci_mem_unset(phba); 15037 out_disable_pci_dev: 15038 lpfc_disable_pci_dev(phba); 15039 if (shost) 15040 scsi_host_put(shost); 15041 out_free_phba: 15042 lpfc_hba_free(phba); 15043 return error; 15044 } 15045 15046 /** 15047 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem 15048 * @pdev: pointer to PCI device 15049 * 15050 * This routine is called from the kernel's PCI subsystem to device with 15051 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 15052 * removed from PCI bus, it performs all the necessary cleanup for the HBA 15053 * device to be removed from the PCI subsystem properly. 15054 **/ 15055 static void 15056 lpfc_pci_remove_one_s4(struct pci_dev *pdev) 15057 { 15058 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15059 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 15060 struct lpfc_vport **vports; 15061 struct lpfc_hba *phba = vport->phba; 15062 int i; 15063 15064 /* Mark the device unloading flag */ 15065 spin_lock_irq(&phba->hbalock); 15066 vport->load_flag |= FC_UNLOADING; 15067 spin_unlock_irq(&phba->hbalock); 15068 if (phba->cgn_i) 15069 lpfc_unreg_congestion_buf(phba); 15070 15071 lpfc_free_sysfs_attr(vport); 15072 15073 /* Release all the vports against this physical port */ 15074 vports = lpfc_create_vport_work_array(phba); 15075 if (vports != NULL) 15076 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 15077 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 15078 continue; 15079 fc_vport_terminate(vports[i]->fc_vport); 15080 } 15081 lpfc_destroy_vport_work_array(phba, vports); 15082 15083 /* Remove FC host with the physical port */ 15084 fc_remove_host(shost); 15085 scsi_remove_host(shost); 15086 15087 /* Perform ndlp cleanup on the physical port. The nvme and nvmet 15088 * localports are destroyed after to cleanup all transport memory. 15089 */ 15090 lpfc_cleanup(vport); 15091 lpfc_nvmet_destroy_targetport(phba); 15092 lpfc_nvme_destroy_localport(vport); 15093 15094 /* De-allocate multi-XRI pools */ 15095 if (phba->cfg_xri_rebalancing) 15096 lpfc_destroy_multixri_pools(phba); 15097 15098 /* 15099 * Bring down the SLI Layer. This step disables all interrupts, 15100 * clears the rings, discards all mailbox commands, and resets 15101 * the HBA FCoE function. 15102 */ 15103 lpfc_debugfs_terminate(vport); 15104 15105 lpfc_stop_hba_timers(phba); 15106 spin_lock_irq(&phba->port_list_lock); 15107 list_del_init(&vport->listentry); 15108 spin_unlock_irq(&phba->port_list_lock); 15109 15110 /* Perform scsi free before driver resource_unset since scsi 15111 * buffers are released to their corresponding pools here. 15112 */ 15113 lpfc_io_free(phba); 15114 lpfc_free_iocb_list(phba); 15115 lpfc_sli4_hba_unset(phba); 15116 15117 lpfc_unset_driver_resource_phase2(phba); 15118 lpfc_sli4_driver_resource_unset(phba); 15119 15120 /* Unmap adapter Control and Doorbell registers */ 15121 lpfc_sli4_pci_mem_unset(phba); 15122 15123 /* Release PCI resources and disable device's PCI function */ 15124 scsi_host_put(shost); 15125 lpfc_disable_pci_dev(phba); 15126 15127 /* Finally, free the driver's device data structure */ 15128 lpfc_hba_free(phba); 15129 15130 return; 15131 } 15132 15133 /** 15134 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt 15135 * @dev_d: pointer to device 15136 * 15137 * This routine is called from the kernel's PCI subsystem to support system 15138 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes 15139 * this method, it quiesces the device by stopping the driver's worker 15140 * thread for the device, turning off device's interrupt and DMA, and bring 15141 * the device offline. Note that as the driver implements the minimum PM 15142 * requirements to a power-aware driver's PM support for suspend/resume -- all 15143 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() 15144 * method call will be treated as SUSPEND and the driver will fully 15145 * reinitialize its device during resume() method call, the driver will set 15146 * device to PCI_D3hot state in PCI config space instead of setting it 15147 * according to the @msg provided by the PM. 15148 * 15149 * Return code 15150 * 0 - driver suspended the device 15151 * Error otherwise 15152 **/ 15153 static int __maybe_unused 15154 lpfc_pci_suspend_one_s4(struct device *dev_d) 15155 { 15156 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15157 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15158 15159 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15160 "2843 PCI device Power Management suspend.\n"); 15161 15162 /* Bring down the device */ 15163 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 15164 lpfc_offline(phba); 15165 kthread_stop(phba->worker_thread); 15166 15167 /* Disable interrupt from device */ 15168 lpfc_sli4_disable_intr(phba); 15169 lpfc_sli4_queue_destroy(phba); 15170 15171 return 0; 15172 } 15173 15174 /** 15175 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt 15176 * @dev_d: pointer to device 15177 * 15178 * This routine is called from the kernel's PCI subsystem to support system 15179 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes 15180 * this method, it restores the device's PCI config space state and fully 15181 * reinitializes the device and brings it online. Note that as the driver 15182 * implements the minimum PM requirements to a power-aware driver's PM for 15183 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 15184 * to the suspend() method call will be treated as SUSPEND and the driver 15185 * will fully reinitialize its device during resume() method call, the device 15186 * will be set to PCI_D0 directly in PCI config space before restoring the 15187 * state. 15188 * 15189 * Return code 15190 * 0 - driver suspended the device 15191 * Error otherwise 15192 **/ 15193 static int __maybe_unused 15194 lpfc_pci_resume_one_s4(struct device *dev_d) 15195 { 15196 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15197 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15198 uint32_t intr_mode; 15199 int error; 15200 15201 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15202 "0292 PCI device Power Management resume.\n"); 15203 15204 /* Startup the kernel thread for this host adapter. */ 15205 phba->worker_thread = kthread_run(lpfc_do_work, phba, 15206 "lpfc_worker_%d", phba->brd_no); 15207 if (IS_ERR(phba->worker_thread)) { 15208 error = PTR_ERR(phba->worker_thread); 15209 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15210 "0293 PM resume failed to start worker " 15211 "thread: error=x%x.\n", error); 15212 return error; 15213 } 15214 15215 /* Configure and enable interrupt */ 15216 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15217 if (intr_mode == LPFC_INTR_ERROR) { 15218 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15219 "0294 PM resume Failed to enable interrupt\n"); 15220 return -EIO; 15221 } else 15222 phba->intr_mode = intr_mode; 15223 15224 /* Restart HBA and bring it online */ 15225 lpfc_sli_brdrestart(phba); 15226 lpfc_online(phba); 15227 15228 /* Log the current active interrupt mode */ 15229 lpfc_log_intr_mode(phba, phba->intr_mode); 15230 15231 return 0; 15232 } 15233 15234 /** 15235 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover 15236 * @phba: pointer to lpfc hba data structure. 15237 * 15238 * This routine is called to prepare the SLI4 device for PCI slot recover. It 15239 * aborts all the outstanding SCSI I/Os to the pci device. 15240 **/ 15241 static void 15242 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) 15243 { 15244 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15245 "2828 PCI channel I/O abort preparing for recovery\n"); 15246 /* 15247 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 15248 * and let the SCSI mid-layer to retry them to recover. 15249 */ 15250 lpfc_sli_abort_fcp_rings(phba); 15251 } 15252 15253 /** 15254 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset 15255 * @phba: pointer to lpfc hba data structure. 15256 * 15257 * This routine is called to prepare the SLI4 device for PCI slot reset. It 15258 * disables the device interrupt and pci device, and aborts the internal FCP 15259 * pending I/Os. 15260 **/ 15261 static void 15262 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) 15263 { 15264 int offline = pci_channel_offline(phba->pcidev); 15265 15266 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15267 "2826 PCI channel disable preparing for reset offline" 15268 " %d\n", offline); 15269 15270 /* Block any management I/Os to the device */ 15271 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); 15272 15273 15274 /* HBA_PCI_ERR was set in io_error_detect */ 15275 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 15276 /* Flush all driver's outstanding I/Os as we are to reset */ 15277 lpfc_sli_flush_io_rings(phba); 15278 lpfc_offline(phba); 15279 15280 /* stop all timers */ 15281 lpfc_stop_hba_timers(phba); 15282 15283 lpfc_sli4_queue_destroy(phba); 15284 /* Disable interrupt and pci device */ 15285 lpfc_sli4_disable_intr(phba); 15286 pci_disable_device(phba->pcidev); 15287 } 15288 15289 /** 15290 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable 15291 * @phba: pointer to lpfc hba data structure. 15292 * 15293 * This routine is called to prepare the SLI4 device for PCI slot permanently 15294 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 15295 * pending I/Os. 15296 **/ 15297 static void 15298 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) 15299 { 15300 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15301 "2827 PCI channel permanent disable for failure\n"); 15302 15303 /* Block all SCSI devices' I/Os on the host */ 15304 lpfc_scsi_dev_block(phba); 15305 15306 /* stop all timers */ 15307 lpfc_stop_hba_timers(phba); 15308 15309 /* Clean up all driver's outstanding I/Os */ 15310 lpfc_sli_flush_io_rings(phba); 15311 } 15312 15313 /** 15314 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device 15315 * @pdev: pointer to PCI device. 15316 * @state: the current PCI connection state. 15317 * 15318 * This routine is called from the PCI subsystem for error handling to device 15319 * with SLI-4 interface spec. This function is called by the PCI subsystem 15320 * after a PCI bus error affecting this device has been detected. When this 15321 * function is invoked, it will need to stop all the I/Os and interrupt(s) 15322 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET 15323 * for the PCI subsystem to perform proper recovery as desired. 15324 * 15325 * Return codes 15326 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15327 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15328 **/ 15329 static pci_ers_result_t 15330 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) 15331 { 15332 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15333 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15334 bool hba_pci_err; 15335 15336 switch (state) { 15337 case pci_channel_io_normal: 15338 /* Non-fatal error, prepare for recovery */ 15339 lpfc_sli4_prep_dev_for_recover(phba); 15340 return PCI_ERS_RESULT_CAN_RECOVER; 15341 case pci_channel_io_frozen: 15342 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15343 /* Fatal error, prepare for slot reset */ 15344 if (!hba_pci_err) 15345 lpfc_sli4_prep_dev_for_reset(phba); 15346 else 15347 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15348 "2832 Already handling PCI error " 15349 "state: x%x\n", state); 15350 return PCI_ERS_RESULT_NEED_RESET; 15351 case pci_channel_io_perm_failure: 15352 set_bit(HBA_PCI_ERR, &phba->bit_flags); 15353 /* Permanent failure, prepare for device down */ 15354 lpfc_sli4_prep_dev_for_perm_failure(phba); 15355 return PCI_ERS_RESULT_DISCONNECT; 15356 default: 15357 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15358 if (!hba_pci_err) 15359 lpfc_sli4_prep_dev_for_reset(phba); 15360 /* Unknown state, prepare and request slot reset */ 15361 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15362 "2825 Unknown PCI error state: x%x\n", state); 15363 lpfc_sli4_prep_dev_for_reset(phba); 15364 return PCI_ERS_RESULT_NEED_RESET; 15365 } 15366 } 15367 15368 /** 15369 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch 15370 * @pdev: pointer to PCI device. 15371 * 15372 * This routine is called from the PCI subsystem for error handling to device 15373 * with SLI-4 interface spec. It is called after PCI bus has been reset to 15374 * restart the PCI card from scratch, as if from a cold-boot. During the 15375 * PCI subsystem error recovery, after the driver returns 15376 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 15377 * recovery and then call this routine before calling the .resume method to 15378 * recover the device. This function will initialize the HBA device, enable 15379 * the interrupt, but it will just put the HBA to offline state without 15380 * passing any I/O traffic. 15381 * 15382 * Return codes 15383 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15384 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15385 */ 15386 static pci_ers_result_t 15387 lpfc_io_slot_reset_s4(struct pci_dev *pdev) 15388 { 15389 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15390 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15391 struct lpfc_sli *psli = &phba->sli; 15392 uint32_t intr_mode; 15393 bool hba_pci_err; 15394 15395 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 15396 if (pci_enable_device_mem(pdev)) { 15397 printk(KERN_ERR "lpfc: Cannot re-enable " 15398 "PCI device after reset.\n"); 15399 return PCI_ERS_RESULT_DISCONNECT; 15400 } 15401 15402 pci_restore_state(pdev); 15403 15404 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags); 15405 if (!hba_pci_err) 15406 dev_info(&pdev->dev, 15407 "hba_pci_err was not set, recovering slot reset.\n"); 15408 /* 15409 * As the new kernel behavior of pci_restore_state() API call clears 15410 * device saved_state flag, need to save the restored state again. 15411 */ 15412 pci_save_state(pdev); 15413 15414 if (pdev->is_busmaster) 15415 pci_set_master(pdev); 15416 15417 spin_lock_irq(&phba->hbalock); 15418 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 15419 spin_unlock_irq(&phba->hbalock); 15420 15421 /* Init cpu_map array */ 15422 lpfc_cpu_map_array_init(phba); 15423 /* Configure and enable interrupt */ 15424 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15425 if (intr_mode == LPFC_INTR_ERROR) { 15426 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15427 "2824 Cannot re-enable interrupt after " 15428 "slot reset.\n"); 15429 return PCI_ERS_RESULT_DISCONNECT; 15430 } else 15431 phba->intr_mode = intr_mode; 15432 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 15433 15434 /* Log the current active interrupt mode */ 15435 lpfc_log_intr_mode(phba, phba->intr_mode); 15436 15437 return PCI_ERS_RESULT_RECOVERED; 15438 } 15439 15440 /** 15441 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device 15442 * @pdev: pointer to PCI device 15443 * 15444 * This routine is called from the PCI subsystem for error handling to device 15445 * with SLI-4 interface spec. It is called when kernel error recovery tells 15446 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 15447 * error recovery. After this call, traffic can start to flow from this device 15448 * again. 15449 **/ 15450 static void 15451 lpfc_io_resume_s4(struct pci_dev *pdev) 15452 { 15453 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15454 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15455 15456 /* 15457 * In case of slot reset, as function reset is performed through 15458 * mailbox command which needs DMA to be enabled, this operation 15459 * has to be moved to the io resume phase. Taking device offline 15460 * will perform the necessary cleanup. 15461 */ 15462 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { 15463 /* Perform device reset */ 15464 lpfc_sli_brdrestart(phba); 15465 /* Bring the device back online */ 15466 lpfc_online(phba); 15467 } 15468 } 15469 15470 /** 15471 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem 15472 * @pdev: pointer to PCI device 15473 * @pid: pointer to PCI device identifier 15474 * 15475 * This routine is to be registered to the kernel's PCI subsystem. When an 15476 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks 15477 * at PCI device-specific information of the device and driver to see if the 15478 * driver state that it can support this kind of device. If the match is 15479 * successful, the driver core invokes this routine. This routine dispatches 15480 * the action to the proper SLI-3 or SLI-4 device probing routine, which will 15481 * do all the initialization that it needs to do to handle the HBA device 15482 * properly. 15483 * 15484 * Return code 15485 * 0 - driver can claim the device 15486 * negative value - driver can not claim the device 15487 **/ 15488 static int 15489 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 15490 { 15491 int rc; 15492 struct lpfc_sli_intf intf; 15493 15494 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) 15495 return -ENODEV; 15496 15497 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 15498 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) 15499 rc = lpfc_pci_probe_one_s4(pdev, pid); 15500 else 15501 rc = lpfc_pci_probe_one_s3(pdev, pid); 15502 15503 return rc; 15504 } 15505 15506 /** 15507 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem 15508 * @pdev: pointer to PCI device 15509 * 15510 * This routine is to be registered to the kernel's PCI subsystem. When an 15511 * Emulex HBA is removed from PCI bus, the driver core invokes this routine. 15512 * This routine dispatches the action to the proper SLI-3 or SLI-4 device 15513 * remove routine, which will perform all the necessary cleanup for the 15514 * device to be removed from the PCI subsystem properly. 15515 **/ 15516 static void 15517 lpfc_pci_remove_one(struct pci_dev *pdev) 15518 { 15519 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15520 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15521 15522 switch (phba->pci_dev_grp) { 15523 case LPFC_PCI_DEV_LP: 15524 lpfc_pci_remove_one_s3(pdev); 15525 break; 15526 case LPFC_PCI_DEV_OC: 15527 lpfc_pci_remove_one_s4(pdev); 15528 break; 15529 default: 15530 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15531 "1424 Invalid PCI device group: 0x%x\n", 15532 phba->pci_dev_grp); 15533 break; 15534 } 15535 return; 15536 } 15537 15538 /** 15539 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management 15540 * @dev: pointer to device 15541 * 15542 * This routine is to be registered to the kernel's PCI subsystem to support 15543 * system Power Management (PM). When PM invokes this method, it dispatches 15544 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will 15545 * suspend the device. 15546 * 15547 * Return code 15548 * 0 - driver suspended the device 15549 * Error otherwise 15550 **/ 15551 static int __maybe_unused 15552 lpfc_pci_suspend_one(struct device *dev) 15553 { 15554 struct Scsi_Host *shost = dev_get_drvdata(dev); 15555 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15556 int rc = -ENODEV; 15557 15558 switch (phba->pci_dev_grp) { 15559 case LPFC_PCI_DEV_LP: 15560 rc = lpfc_pci_suspend_one_s3(dev); 15561 break; 15562 case LPFC_PCI_DEV_OC: 15563 rc = lpfc_pci_suspend_one_s4(dev); 15564 break; 15565 default: 15566 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15567 "1425 Invalid PCI device group: 0x%x\n", 15568 phba->pci_dev_grp); 15569 break; 15570 } 15571 return rc; 15572 } 15573 15574 /** 15575 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management 15576 * @dev: pointer to device 15577 * 15578 * This routine is to be registered to the kernel's PCI subsystem to support 15579 * system Power Management (PM). When PM invokes this method, it dispatches 15580 * the action to the proper SLI-3 or SLI-4 device resume routine, which will 15581 * resume the device. 15582 * 15583 * Return code 15584 * 0 - driver suspended the device 15585 * Error otherwise 15586 **/ 15587 static int __maybe_unused 15588 lpfc_pci_resume_one(struct device *dev) 15589 { 15590 struct Scsi_Host *shost = dev_get_drvdata(dev); 15591 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15592 int rc = -ENODEV; 15593 15594 switch (phba->pci_dev_grp) { 15595 case LPFC_PCI_DEV_LP: 15596 rc = lpfc_pci_resume_one_s3(dev); 15597 break; 15598 case LPFC_PCI_DEV_OC: 15599 rc = lpfc_pci_resume_one_s4(dev); 15600 break; 15601 default: 15602 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15603 "1426 Invalid PCI device group: 0x%x\n", 15604 phba->pci_dev_grp); 15605 break; 15606 } 15607 return rc; 15608 } 15609 15610 /** 15611 * lpfc_io_error_detected - lpfc method for handling PCI I/O error 15612 * @pdev: pointer to PCI device. 15613 * @state: the current PCI connection state. 15614 * 15615 * This routine is registered to the PCI subsystem for error handling. This 15616 * function is called by the PCI subsystem after a PCI bus error affecting 15617 * this device has been detected. When this routine is invoked, it dispatches 15618 * the action to the proper SLI-3 or SLI-4 device error detected handling 15619 * routine, which will perform the proper error detected operation. 15620 * 15621 * Return codes 15622 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15623 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15624 **/ 15625 static pci_ers_result_t 15626 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 15627 { 15628 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15629 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15630 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15631 15632 if (phba->link_state == LPFC_HBA_ERROR && 15633 phba->hba_flag & HBA_IOQ_FLUSH) 15634 return PCI_ERS_RESULT_NEED_RESET; 15635 15636 switch (phba->pci_dev_grp) { 15637 case LPFC_PCI_DEV_LP: 15638 rc = lpfc_io_error_detected_s3(pdev, state); 15639 break; 15640 case LPFC_PCI_DEV_OC: 15641 rc = lpfc_io_error_detected_s4(pdev, state); 15642 break; 15643 default: 15644 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15645 "1427 Invalid PCI device group: 0x%x\n", 15646 phba->pci_dev_grp); 15647 break; 15648 } 15649 return rc; 15650 } 15651 15652 /** 15653 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch 15654 * @pdev: pointer to PCI device. 15655 * 15656 * This routine is registered to the PCI subsystem for error handling. This 15657 * function is called after PCI bus has been reset to restart the PCI card 15658 * from scratch, as if from a cold-boot. When this routine is invoked, it 15659 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling 15660 * routine, which will perform the proper device reset. 15661 * 15662 * Return codes 15663 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15664 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15665 **/ 15666 static pci_ers_result_t 15667 lpfc_io_slot_reset(struct pci_dev *pdev) 15668 { 15669 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15670 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15671 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15672 15673 switch (phba->pci_dev_grp) { 15674 case LPFC_PCI_DEV_LP: 15675 rc = lpfc_io_slot_reset_s3(pdev); 15676 break; 15677 case LPFC_PCI_DEV_OC: 15678 rc = lpfc_io_slot_reset_s4(pdev); 15679 break; 15680 default: 15681 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15682 "1428 Invalid PCI device group: 0x%x\n", 15683 phba->pci_dev_grp); 15684 break; 15685 } 15686 return rc; 15687 } 15688 15689 /** 15690 * lpfc_io_resume - lpfc method for resuming PCI I/O operation 15691 * @pdev: pointer to PCI device 15692 * 15693 * This routine is registered to the PCI subsystem for error handling. It 15694 * is called when kernel error recovery tells the lpfc driver that it is 15695 * OK to resume normal PCI operation after PCI bus error recovery. When 15696 * this routine is invoked, it dispatches the action to the proper SLI-3 15697 * or SLI-4 device io_resume routine, which will resume the device operation. 15698 **/ 15699 static void 15700 lpfc_io_resume(struct pci_dev *pdev) 15701 { 15702 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15703 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15704 15705 switch (phba->pci_dev_grp) { 15706 case LPFC_PCI_DEV_LP: 15707 lpfc_io_resume_s3(pdev); 15708 break; 15709 case LPFC_PCI_DEV_OC: 15710 lpfc_io_resume_s4(pdev); 15711 break; 15712 default: 15713 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15714 "1429 Invalid PCI device group: 0x%x\n", 15715 phba->pci_dev_grp); 15716 break; 15717 } 15718 return; 15719 } 15720 15721 /** 15722 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter 15723 * @phba: pointer to lpfc hba data structure. 15724 * 15725 * This routine checks to see if OAS is supported for this adapter. If 15726 * supported, the configure Flash Optimized Fabric flag is set. Otherwise, 15727 * the enable oas flag is cleared and the pool created for OAS device data 15728 * is destroyed. 15729 * 15730 **/ 15731 static void 15732 lpfc_sli4_oas_verify(struct lpfc_hba *phba) 15733 { 15734 15735 if (!phba->cfg_EnableXLane) 15736 return; 15737 15738 if (phba->sli4_hba.pc_sli4_params.oas_supported) { 15739 phba->cfg_fof = 1; 15740 } else { 15741 phba->cfg_fof = 0; 15742 mempool_destroy(phba->device_data_mem_pool); 15743 phba->device_data_mem_pool = NULL; 15744 } 15745 15746 return; 15747 } 15748 15749 /** 15750 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter 15751 * @phba: pointer to lpfc hba data structure. 15752 * 15753 * This routine checks to see if RAS is supported by the adapter. Check the 15754 * function through which RAS support enablement is to be done. 15755 **/ 15756 void 15757 lpfc_sli4_ras_init(struct lpfc_hba *phba) 15758 { 15759 /* if ASIC_GEN_NUM >= 0xC) */ 15760 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 15761 LPFC_SLI_INTF_IF_TYPE_6) || 15762 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 15763 LPFC_SLI_INTF_FAMILY_G6)) { 15764 phba->ras_fwlog.ras_hwsupport = true; 15765 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && 15766 phba->cfg_ras_fwlog_buffsize) 15767 phba->ras_fwlog.ras_enabled = true; 15768 else 15769 phba->ras_fwlog.ras_enabled = false; 15770 } else { 15771 phba->ras_fwlog.ras_hwsupport = false; 15772 } 15773 } 15774 15775 15776 MODULE_DEVICE_TABLE(pci, lpfc_id_table); 15777 15778 static const struct pci_error_handlers lpfc_err_handler = { 15779 .error_detected = lpfc_io_error_detected, 15780 .slot_reset = lpfc_io_slot_reset, 15781 .resume = lpfc_io_resume, 15782 }; 15783 15784 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, 15785 lpfc_pci_suspend_one, 15786 lpfc_pci_resume_one); 15787 15788 static struct pci_driver lpfc_driver = { 15789 .name = LPFC_DRIVER_NAME, 15790 .id_table = lpfc_id_table, 15791 .probe = lpfc_pci_probe_one, 15792 .remove = lpfc_pci_remove_one, 15793 .shutdown = lpfc_pci_remove_one, 15794 .driver.pm = &lpfc_pci_pm_ops_one, 15795 .err_handler = &lpfc_err_handler, 15796 }; 15797 15798 static const struct file_operations lpfc_mgmt_fop = { 15799 .owner = THIS_MODULE, 15800 }; 15801 15802 static struct miscdevice lpfc_mgmt_dev = { 15803 .minor = MISC_DYNAMIC_MINOR, 15804 .name = "lpfcmgmt", 15805 .fops = &lpfc_mgmt_fop, 15806 }; 15807 15808 /** 15809 * lpfc_init - lpfc module initialization routine 15810 * 15811 * This routine is to be invoked when the lpfc module is loaded into the 15812 * kernel. The special kernel macro module_init() is used to indicate the 15813 * role of this routine to the kernel as lpfc module entry point. 15814 * 15815 * Return codes 15816 * 0 - successful 15817 * -ENOMEM - FC attach transport failed 15818 * all others - failed 15819 */ 15820 static int __init 15821 lpfc_init(void) 15822 { 15823 int error = 0; 15824 15825 pr_info(LPFC_MODULE_DESC "\n"); 15826 pr_info(LPFC_COPYRIGHT "\n"); 15827 15828 error = misc_register(&lpfc_mgmt_dev); 15829 if (error) 15830 printk(KERN_ERR "Could not register lpfcmgmt device, " 15831 "misc_register returned with status %d", error); 15832 15833 error = -ENOMEM; 15834 lpfc_transport_functions.vport_create = lpfc_vport_create; 15835 lpfc_transport_functions.vport_delete = lpfc_vport_delete; 15836 lpfc_transport_template = 15837 fc_attach_transport(&lpfc_transport_functions); 15838 if (lpfc_transport_template == NULL) 15839 goto unregister; 15840 lpfc_vport_transport_template = 15841 fc_attach_transport(&lpfc_vport_transport_functions); 15842 if (lpfc_vport_transport_template == NULL) { 15843 fc_release_transport(lpfc_transport_template); 15844 goto unregister; 15845 } 15846 lpfc_wqe_cmd_template(); 15847 lpfc_nvmet_cmd_template(); 15848 15849 /* Initialize in case vector mapping is needed */ 15850 lpfc_present_cpu = num_present_cpus(); 15851 15852 lpfc_pldv_detect = false; 15853 15854 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, 15855 "lpfc/sli4:online", 15856 lpfc_cpu_online, lpfc_cpu_offline); 15857 if (error < 0) 15858 goto cpuhp_failure; 15859 lpfc_cpuhp_state = error; 15860 15861 error = pci_register_driver(&lpfc_driver); 15862 if (error) 15863 goto unwind; 15864 15865 return error; 15866 15867 unwind: 15868 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15869 cpuhp_failure: 15870 fc_release_transport(lpfc_transport_template); 15871 fc_release_transport(lpfc_vport_transport_template); 15872 unregister: 15873 misc_deregister(&lpfc_mgmt_dev); 15874 15875 return error; 15876 } 15877 15878 void lpfc_dmp_dbg(struct lpfc_hba *phba) 15879 { 15880 unsigned int start_idx; 15881 unsigned int dbg_cnt; 15882 unsigned int temp_idx; 15883 int i; 15884 int j = 0; 15885 unsigned long rem_nsec; 15886 15887 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) 15888 return; 15889 15890 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; 15891 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); 15892 if (!dbg_cnt) 15893 goto out; 15894 temp_idx = start_idx; 15895 if (dbg_cnt >= DBG_LOG_SZ) { 15896 dbg_cnt = DBG_LOG_SZ; 15897 temp_idx -= 1; 15898 } else { 15899 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { 15900 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; 15901 } else { 15902 if (start_idx < dbg_cnt) 15903 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); 15904 else 15905 start_idx -= dbg_cnt; 15906 } 15907 } 15908 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", 15909 start_idx, temp_idx, dbg_cnt); 15910 15911 for (i = 0; i < dbg_cnt; i++) { 15912 if ((start_idx + i) < DBG_LOG_SZ) 15913 temp_idx = (start_idx + i) % DBG_LOG_SZ; 15914 else 15915 temp_idx = j++; 15916 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); 15917 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", 15918 temp_idx, 15919 (unsigned long)phba->dbg_log[temp_idx].t_ns, 15920 rem_nsec / 1000, 15921 phba->dbg_log[temp_idx].log); 15922 } 15923 out: 15924 atomic_set(&phba->dbg_log_cnt, 0); 15925 atomic_set(&phba->dbg_log_dmping, 0); 15926 } 15927 15928 __printf(2, 3) 15929 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) 15930 { 15931 unsigned int idx; 15932 va_list args; 15933 int dbg_dmping = atomic_read(&phba->dbg_log_dmping); 15934 struct va_format vaf; 15935 15936 15937 va_start(args, fmt); 15938 if (unlikely(dbg_dmping)) { 15939 vaf.fmt = fmt; 15940 vaf.va = &args; 15941 dev_info(&phba->pcidev->dev, "%pV", &vaf); 15942 va_end(args); 15943 return; 15944 } 15945 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % 15946 DBG_LOG_SZ; 15947 15948 atomic_inc(&phba->dbg_log_cnt); 15949 15950 vscnprintf(phba->dbg_log[idx].log, 15951 sizeof(phba->dbg_log[idx].log), fmt, args); 15952 va_end(args); 15953 15954 phba->dbg_log[idx].t_ns = local_clock(); 15955 } 15956 15957 /** 15958 * lpfc_exit - lpfc module removal routine 15959 * 15960 * This routine is invoked when the lpfc module is removed from the kernel. 15961 * The special kernel macro module_exit() is used to indicate the role of 15962 * this routine to the kernel as lpfc module exit point. 15963 */ 15964 static void __exit 15965 lpfc_exit(void) 15966 { 15967 misc_deregister(&lpfc_mgmt_dev); 15968 pci_unregister_driver(&lpfc_driver); 15969 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15970 fc_release_transport(lpfc_transport_template); 15971 fc_release_transport(lpfc_vport_transport_template); 15972 idr_destroy(&lpfc_hba_index); 15973 } 15974 15975 module_init(lpfc_init); 15976 module_exit(lpfc_exit); 15977 MODULE_LICENSE("GPL"); 15978 MODULE_DESCRIPTION(LPFC_MODULE_DESC); 15979 MODULE_AUTHOR("Broadcom"); 15980 MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 15981