1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <linux/blkdev.h> 25 #include <linux/delay.h> 26 #include <linux/dma-mapping.h> 27 #include <linux/idr.h> 28 #include <linux/interrupt.h> 29 #include <linux/module.h> 30 #include <linux/kthread.h> 31 #include <linux/pci.h> 32 #include <linux/spinlock.h> 33 #include <linux/sched/clock.h> 34 #include <linux/ctype.h> 35 #include <linux/slab.h> 36 #include <linux/firmware.h> 37 #include <linux/miscdevice.h> 38 #include <linux/percpu.h> 39 #include <linux/irq.h> 40 #include <linux/bitops.h> 41 #include <linux/crash_dump.h> 42 #include <linux/cpu.h> 43 #include <linux/cpuhotplug.h> 44 45 #include <scsi/scsi.h> 46 #include <scsi/scsi_device.h> 47 #include <scsi/scsi_host.h> 48 #include <scsi/scsi_transport_fc.h> 49 #include <scsi/scsi_tcq.h> 50 #include <scsi/fc/fc_fs.h> 51 52 #include "lpfc_hw4.h" 53 #include "lpfc_hw.h" 54 #include "lpfc_sli.h" 55 #include "lpfc_sli4.h" 56 #include "lpfc_nl.h" 57 #include "lpfc_disc.h" 58 #include "lpfc.h" 59 #include "lpfc_scsi.h" 60 #include "lpfc_nvme.h" 61 #include "lpfc_logmsg.h" 62 #include "lpfc_crtn.h" 63 #include "lpfc_vport.h" 64 #include "lpfc_version.h" 65 #include "lpfc_ids.h" 66 67 static enum cpuhp_state lpfc_cpuhp_state; 68 /* Used when mapping IRQ vectors in a driver centric manner */ 69 static uint32_t lpfc_present_cpu; 70 static bool lpfc_pldv_detect; 71 72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); 73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba); 74 static void lpfc_cpuhp_add(struct lpfc_hba *phba); 75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 76 static int lpfc_post_rcv_buf(struct lpfc_hba *); 77 static int lpfc_sli4_queue_verify(struct lpfc_hba *); 78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); 79 static int lpfc_setup_endian_order(struct lpfc_hba *); 80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); 81 static void lpfc_free_els_sgl_list(struct lpfc_hba *); 82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); 83 static void lpfc_init_sgl_list(struct lpfc_hba *); 84 static int lpfc_init_active_sgl_array(struct lpfc_hba *); 85 static void lpfc_free_active_sgl(struct lpfc_hba *); 86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); 87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); 88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); 89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); 90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); 91 static void lpfc_sli4_disable_intr(struct lpfc_hba *); 92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); 93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); 94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); 95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); 96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *); 97 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba); 98 99 static struct scsi_transport_template *lpfc_transport_template = NULL; 100 static struct scsi_transport_template *lpfc_vport_transport_template = NULL; 101 static DEFINE_IDR(lpfc_hba_index); 102 #define LPFC_NVMET_BUF_POST 254 103 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport); 104 105 /** 106 * lpfc_config_port_prep - Perform lpfc initialization prior to config port 107 * @phba: pointer to lpfc hba data structure. 108 * 109 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT 110 * mailbox command. It retrieves the revision information from the HBA and 111 * collects the Vital Product Data (VPD) about the HBA for preparing the 112 * configuration of the HBA. 113 * 114 * Return codes: 115 * 0 - success. 116 * -ERESTART - requests the SLI layer to reset the HBA and try again. 117 * Any other value - indicates an error. 118 **/ 119 int 120 lpfc_config_port_prep(struct lpfc_hba *phba) 121 { 122 lpfc_vpd_t *vp = &phba->vpd; 123 int i = 0, rc; 124 LPFC_MBOXQ_t *pmb; 125 MAILBOX_t *mb; 126 char *lpfc_vpd_data = NULL; 127 uint16_t offset = 0; 128 static char licensed[56] = 129 "key unlock for use with gnu public licensed code only\0"; 130 static int init_key = 1; 131 132 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 133 if (!pmb) { 134 phba->link_state = LPFC_HBA_ERROR; 135 return -ENOMEM; 136 } 137 138 mb = &pmb->u.mb; 139 phba->link_state = LPFC_INIT_MBX_CMDS; 140 141 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 142 if (init_key) { 143 uint32_t *ptext = (uint32_t *) licensed; 144 145 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 146 *ptext = cpu_to_be32(*ptext); 147 init_key = 0; 148 } 149 150 lpfc_read_nv(phba, pmb); 151 memset((char*)mb->un.varRDnvp.rsvd3, 0, 152 sizeof (mb->un.varRDnvp.rsvd3)); 153 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 154 sizeof (licensed)); 155 156 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 157 158 if (rc != MBX_SUCCESS) { 159 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 160 "0324 Config Port initialization " 161 "error, mbxCmd x%x READ_NVPARM, " 162 "mbxStatus x%x\n", 163 mb->mbxCommand, mb->mbxStatus); 164 mempool_free(pmb, phba->mbox_mem_pool); 165 return -ERESTART; 166 } 167 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 168 sizeof(phba->wwnn)); 169 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, 170 sizeof(phba->wwpn)); 171 } 172 173 /* 174 * Clear all option bits except LPFC_SLI3_BG_ENABLED, 175 * which was already set in lpfc_get_cfgparam() 176 */ 177 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; 178 179 /* Setup and issue mailbox READ REV command */ 180 lpfc_read_rev(phba, pmb); 181 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 182 if (rc != MBX_SUCCESS) { 183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 184 "0439 Adapter failed to init, mbxCmd x%x " 185 "READ_REV, mbxStatus x%x\n", 186 mb->mbxCommand, mb->mbxStatus); 187 mempool_free( pmb, phba->mbox_mem_pool); 188 return -ERESTART; 189 } 190 191 192 /* 193 * The value of rr must be 1 since the driver set the cv field to 1. 194 * This setting requires the FW to set all revision fields. 195 */ 196 if (mb->un.varRdRev.rr == 0) { 197 vp->rev.rBit = 0; 198 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 199 "0440 Adapter failed to init, READ_REV has " 200 "missing revision information.\n"); 201 mempool_free(pmb, phba->mbox_mem_pool); 202 return -ERESTART; 203 } 204 205 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { 206 mempool_free(pmb, phba->mbox_mem_pool); 207 return -EINVAL; 208 } 209 210 /* Save information as VPD data */ 211 vp->rev.rBit = 1; 212 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); 213 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 214 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 215 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 216 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 217 vp->rev.biuRev = mb->un.varRdRev.biuRev; 218 vp->rev.smRev = mb->un.varRdRev.smRev; 219 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 220 vp->rev.endecRev = mb->un.varRdRev.endecRev; 221 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 222 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 223 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 224 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 225 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 226 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 227 228 /* If the sli feature level is less then 9, we must 229 * tear down all RPIs and VPIs on link down if NPIV 230 * is enabled. 231 */ 232 if (vp->rev.feaLevelHigh < 9) 233 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; 234 235 if (lpfc_is_LC_HBA(phba->pcidev->device)) 236 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 237 sizeof (phba->RandomData)); 238 239 /* Get adapter VPD information */ 240 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 241 if (!lpfc_vpd_data) 242 goto out_free_mbox; 243 do { 244 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); 245 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 246 247 if (rc != MBX_SUCCESS) { 248 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 249 "0441 VPD not present on adapter, " 250 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 251 mb->mbxCommand, mb->mbxStatus); 252 mb->un.varDmp.word_cnt = 0; 253 } 254 /* dump mem may return a zero when finished or we got a 255 * mailbox error, either way we are done. 256 */ 257 if (mb->un.varDmp.word_cnt == 0) 258 break; 259 260 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) 261 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; 262 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, 263 lpfc_vpd_data + offset, 264 mb->un.varDmp.word_cnt); 265 offset += mb->un.varDmp.word_cnt; 266 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); 267 268 lpfc_parse_vpd(phba, lpfc_vpd_data, offset); 269 270 kfree(lpfc_vpd_data); 271 out_free_mbox: 272 mempool_free(pmb, phba->mbox_mem_pool); 273 return 0; 274 } 275 276 /** 277 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd 278 * @phba: pointer to lpfc hba data structure. 279 * @pmboxq: pointer to the driver internal queue element for mailbox command. 280 * 281 * This is the completion handler for driver's configuring asynchronous event 282 * mailbox command to the device. If the mailbox command returns successfully, 283 * it will set internal async event support flag to 1; otherwise, it will 284 * set internal async event support flag to 0. 285 **/ 286 static void 287 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 288 { 289 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) 290 phba->temp_sensor_support = 1; 291 else 292 phba->temp_sensor_support = 0; 293 mempool_free(pmboxq, phba->mbox_mem_pool); 294 return; 295 } 296 297 /** 298 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler 299 * @phba: pointer to lpfc hba data structure. 300 * @pmboxq: pointer to the driver internal queue element for mailbox command. 301 * 302 * This is the completion handler for dump mailbox command for getting 303 * wake up parameters. When this command complete, the response contain 304 * Option rom version of the HBA. This function translate the version number 305 * into a human readable string and store it in OptionROMVersion. 306 **/ 307 static void 308 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) 309 { 310 struct prog_id *prg; 311 uint32_t prog_id_word; 312 char dist = ' '; 313 /* character array used for decoding dist type. */ 314 char dist_char[] = "nabx"; 315 316 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { 317 mempool_free(pmboxq, phba->mbox_mem_pool); 318 return; 319 } 320 321 prg = (struct prog_id *) &prog_id_word; 322 323 /* word 7 contain option rom version */ 324 prog_id_word = pmboxq->u.mb.un.varWords[7]; 325 326 /* Decode the Option rom version word to a readable string */ 327 dist = dist_char[prg->dist]; 328 329 if ((prg->dist == 3) && (prg->num == 0)) 330 snprintf(phba->OptionROMVersion, 32, "%d.%d%d", 331 prg->ver, prg->rev, prg->lev); 332 else 333 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", 334 prg->ver, prg->rev, prg->lev, 335 dist, prg->num); 336 mempool_free(pmboxq, phba->mbox_mem_pool); 337 return; 338 } 339 340 /** 341 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, 342 * @vport: pointer to lpfc vport data structure. 343 * 344 * 345 * Return codes 346 * None. 347 **/ 348 void 349 lpfc_update_vport_wwn(struct lpfc_vport *vport) 350 { 351 struct lpfc_hba *phba = vport->phba; 352 353 /* 354 * If the name is empty or there exists a soft name 355 * then copy the service params name, otherwise use the fc name 356 */ 357 if (vport->fc_nodename.u.wwn[0] == 0) 358 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, 359 sizeof(struct lpfc_name)); 360 else 361 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, 362 sizeof(struct lpfc_name)); 363 364 /* 365 * If the port name has changed, then set the Param changes flag 366 * to unreg the login 367 */ 368 if (vport->fc_portname.u.wwn[0] != 0 && 369 memcmp(&vport->fc_portname, &vport->fc_sparam.portName, 370 sizeof(struct lpfc_name))) { 371 vport->vport_flag |= FAWWPN_PARAM_CHG; 372 373 if (phba->sli_rev == LPFC_SLI_REV4 && 374 vport->port_type == LPFC_PHYSICAL_PORT && 375 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) { 376 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG)) 377 phba->sli4_hba.fawwpn_flag &= 378 ~LPFC_FAWWPN_FABRIC; 379 lpfc_printf_log(phba, KERN_INFO, 380 LOG_SLI | LOG_DISCOVERY | LOG_ELS, 381 "2701 FA-PWWN change WWPN from %llx to " 382 "%llx: vflag x%x fawwpn_flag x%x\n", 383 wwn_to_u64(vport->fc_portname.u.wwn), 384 wwn_to_u64 385 (vport->fc_sparam.portName.u.wwn), 386 vport->vport_flag, 387 phba->sli4_hba.fawwpn_flag); 388 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 389 sizeof(struct lpfc_name)); 390 } 391 } 392 393 if (vport->fc_portname.u.wwn[0] == 0) 394 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 395 sizeof(struct lpfc_name)); 396 else 397 memcpy(&vport->fc_sparam.portName, &vport->fc_portname, 398 sizeof(struct lpfc_name)); 399 } 400 401 /** 402 * lpfc_config_port_post - Perform lpfc initialization after config port 403 * @phba: pointer to lpfc hba data structure. 404 * 405 * This routine will do LPFC initialization after the CONFIG_PORT mailbox 406 * command call. It performs all internal resource and state setups on the 407 * port: post IOCB buffers, enable appropriate host interrupt attentions, 408 * ELS ring timers, etc. 409 * 410 * Return codes 411 * 0 - success. 412 * Any other value - error. 413 **/ 414 int 415 lpfc_config_port_post(struct lpfc_hba *phba) 416 { 417 struct lpfc_vport *vport = phba->pport; 418 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 419 LPFC_MBOXQ_t *pmb; 420 MAILBOX_t *mb; 421 struct lpfc_dmabuf *mp; 422 struct lpfc_sli *psli = &phba->sli; 423 uint32_t status, timeout; 424 int i, j; 425 int rc; 426 427 spin_lock_irq(&phba->hbalock); 428 /* 429 * If the Config port completed correctly the HBA is not 430 * over heated any more. 431 */ 432 if (phba->over_temp_state == HBA_OVER_TEMP) 433 phba->over_temp_state = HBA_NORMAL_TEMP; 434 spin_unlock_irq(&phba->hbalock); 435 436 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 437 if (!pmb) { 438 phba->link_state = LPFC_HBA_ERROR; 439 return -ENOMEM; 440 } 441 mb = &pmb->u.mb; 442 443 /* Get login parameters for NID. */ 444 rc = lpfc_read_sparam(phba, pmb, 0); 445 if (rc) { 446 mempool_free(pmb, phba->mbox_mem_pool); 447 return -ENOMEM; 448 } 449 450 pmb->vport = vport; 451 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 452 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 453 "0448 Adapter failed init, mbxCmd x%x " 454 "READ_SPARM mbxStatus x%x\n", 455 mb->mbxCommand, mb->mbxStatus); 456 phba->link_state = LPFC_HBA_ERROR; 457 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 458 return -EIO; 459 } 460 461 mp = (struct lpfc_dmabuf *)pmb->ctx_buf; 462 463 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no 464 * longer needed. Prevent unintended ctx_buf access as the mbox is 465 * reused. 466 */ 467 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); 468 lpfc_mbuf_free(phba, mp->virt, mp->phys); 469 kfree(mp); 470 pmb->ctx_buf = NULL; 471 lpfc_update_vport_wwn(vport); 472 473 /* Update the fc_host data structures with new wwn. */ 474 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 475 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 476 fc_host_max_npiv_vports(shost) = phba->max_vpi; 477 478 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 479 /* This should be consolidated into parse_vpd ? - mr */ 480 if (phba->SerialNumber[0] == 0) { 481 uint8_t *outptr; 482 483 outptr = &vport->fc_nodename.u.s.IEEE[0]; 484 for (i = 0; i < 12; i++) { 485 status = *outptr++; 486 j = ((status & 0xf0) >> 4); 487 if (j <= 9) 488 phba->SerialNumber[i] = 489 (char)((uint8_t) 0x30 + (uint8_t) j); 490 else 491 phba->SerialNumber[i] = 492 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 493 i++; 494 j = (status & 0xf); 495 if (j <= 9) 496 phba->SerialNumber[i] = 497 (char)((uint8_t) 0x30 + (uint8_t) j); 498 else 499 phba->SerialNumber[i] = 500 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 501 } 502 } 503 504 lpfc_read_config(phba, pmb); 505 pmb->vport = vport; 506 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 508 "0453 Adapter failed to init, mbxCmd x%x " 509 "READ_CONFIG, mbxStatus x%x\n", 510 mb->mbxCommand, mb->mbxStatus); 511 phba->link_state = LPFC_HBA_ERROR; 512 mempool_free( pmb, phba->mbox_mem_pool); 513 return -EIO; 514 } 515 516 /* Check if the port is disabled */ 517 lpfc_sli_read_link_ste(phba); 518 519 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 520 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { 521 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 522 "3359 HBA queue depth changed from %d to %d\n", 523 phba->cfg_hba_queue_depth, 524 mb->un.varRdConfig.max_xri); 525 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; 526 } 527 528 phba->lmt = mb->un.varRdConfig.lmt; 529 530 /* Get the default values for Model Name and Description */ 531 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 532 533 phba->link_state = LPFC_LINK_DOWN; 534 535 /* Only process IOCBs on ELS ring till hba_state is READY */ 536 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) 537 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; 538 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) 539 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; 540 541 /* Post receive buffers for desired rings */ 542 if (phba->sli_rev != 3) 543 lpfc_post_rcv_buf(phba); 544 545 /* 546 * Configure HBA MSI-X attention conditions to messages if MSI-X mode 547 */ 548 if (phba->intr_type == MSIX) { 549 rc = lpfc_config_msi(phba, pmb); 550 if (rc) { 551 mempool_free(pmb, phba->mbox_mem_pool); 552 return -EIO; 553 } 554 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 555 if (rc != MBX_SUCCESS) { 556 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 557 "0352 Config MSI mailbox command " 558 "failed, mbxCmd x%x, mbxStatus x%x\n", 559 pmb->u.mb.mbxCommand, 560 pmb->u.mb.mbxStatus); 561 mempool_free(pmb, phba->mbox_mem_pool); 562 return -EIO; 563 } 564 } 565 566 spin_lock_irq(&phba->hbalock); 567 /* Initialize ERATT handling flag */ 568 phba->hba_flag &= ~HBA_ERATT_HANDLED; 569 570 /* Enable appropriate host interrupts */ 571 if (lpfc_readl(phba->HCregaddr, &status)) { 572 spin_unlock_irq(&phba->hbalock); 573 return -EIO; 574 } 575 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 576 if (psli->num_rings > 0) 577 status |= HC_R0INT_ENA; 578 if (psli->num_rings > 1) 579 status |= HC_R1INT_ENA; 580 if (psli->num_rings > 2) 581 status |= HC_R2INT_ENA; 582 if (psli->num_rings > 3) 583 status |= HC_R3INT_ENA; 584 585 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 586 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 587 status &= ~(HC_R0INT_ENA); 588 589 writel(status, phba->HCregaddr); 590 readl(phba->HCregaddr); /* flush */ 591 spin_unlock_irq(&phba->hbalock); 592 593 /* Set up ring-0 (ELS) timer */ 594 timeout = phba->fc_ratov * 2; 595 mod_timer(&vport->els_tmofunc, 596 jiffies + msecs_to_jiffies(1000 * timeout)); 597 /* Set up heart beat (HB) timer */ 598 mod_timer(&phba->hb_tmofunc, 599 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 600 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 601 phba->last_completion_time = jiffies; 602 /* Set up error attention (ERATT) polling timer */ 603 mod_timer(&phba->eratt_poll, 604 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); 605 606 if (phba->hba_flag & LINK_DISABLED) { 607 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 608 "2598 Adapter Link is disabled.\n"); 609 lpfc_down_link(phba, pmb); 610 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 611 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 612 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 613 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 614 "2599 Adapter failed to issue DOWN_LINK" 615 " mbox command rc 0x%x\n", rc); 616 617 mempool_free(pmb, phba->mbox_mem_pool); 618 return -EIO; 619 } 620 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { 621 mempool_free(pmb, phba->mbox_mem_pool); 622 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); 623 if (rc) 624 return rc; 625 } 626 /* MBOX buffer will be freed in mbox compl */ 627 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 628 if (!pmb) { 629 phba->link_state = LPFC_HBA_ERROR; 630 return -ENOMEM; 631 } 632 633 lpfc_config_async(phba, pmb, LPFC_ELS_RING); 634 pmb->mbox_cmpl = lpfc_config_async_cmpl; 635 pmb->vport = phba->pport; 636 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 637 638 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 639 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 640 "0456 Adapter failed to issue " 641 "ASYNCEVT_ENABLE mbox status x%x\n", 642 rc); 643 mempool_free(pmb, phba->mbox_mem_pool); 644 } 645 646 /* Get Option rom version */ 647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 648 if (!pmb) { 649 phba->link_state = LPFC_HBA_ERROR; 650 return -ENOMEM; 651 } 652 653 lpfc_dump_wakeup_param(phba, pmb); 654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; 655 pmb->vport = phba->pport; 656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 657 658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 659 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 660 "0435 Adapter failed " 661 "to get Option ROM version status x%x\n", rc); 662 mempool_free(pmb, phba->mbox_mem_pool); 663 } 664 665 return 0; 666 } 667 668 /** 669 * lpfc_sli4_refresh_params - update driver copy of params. 670 * @phba: Pointer to HBA context object. 671 * 672 * This is called to refresh driver copy of dynamic fields from the 673 * common_get_sli4_parameters descriptor. 674 **/ 675 int 676 lpfc_sli4_refresh_params(struct lpfc_hba *phba) 677 { 678 LPFC_MBOXQ_t *mboxq; 679 struct lpfc_mqe *mqe; 680 struct lpfc_sli4_parameters *mbx_sli4_parameters; 681 int length, rc; 682 683 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 684 if (!mboxq) 685 return -ENOMEM; 686 687 mqe = &mboxq->u.mqe; 688 /* Read the port's SLI4 Config Parameters */ 689 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 690 sizeof(struct lpfc_sli4_cfg_mhdr)); 691 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 692 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 693 length, LPFC_SLI4_MBX_EMBED); 694 695 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 696 if (unlikely(rc)) { 697 mempool_free(mboxq, phba->mbox_mem_pool); 698 return rc; 699 } 700 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 701 phba->sli4_hba.pc_sli4_params.mi_cap = 702 bf_get(cfg_mi_ver, mbx_sli4_parameters); 703 704 /* Are we forcing MI off via module parameter? */ 705 if (phba->cfg_enable_mi) 706 phba->sli4_hba.pc_sli4_params.mi_ver = 707 bf_get(cfg_mi_ver, mbx_sli4_parameters); 708 else 709 phba->sli4_hba.pc_sli4_params.mi_ver = 0; 710 711 phba->sli4_hba.pc_sli4_params.cmf = 712 bf_get(cfg_cmf, mbx_sli4_parameters); 713 phba->sli4_hba.pc_sli4_params.pls = 714 bf_get(cfg_pvl, mbx_sli4_parameters); 715 716 mempool_free(mboxq, phba->mbox_mem_pool); 717 return rc; 718 } 719 720 /** 721 * lpfc_hba_init_link - Initialize the FC link 722 * @phba: pointer to lpfc hba data structure. 723 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 724 * 725 * This routine will issue the INIT_LINK mailbox command call. 726 * It is available to other drivers through the lpfc_hba data 727 * structure for use as a delayed link up mechanism with the 728 * module parameter lpfc_suppress_link_up. 729 * 730 * Return code 731 * 0 - success 732 * Any other value - error 733 **/ 734 static int 735 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) 736 { 737 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); 738 } 739 740 /** 741 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology 742 * @phba: pointer to lpfc hba data structure. 743 * @fc_topology: desired fc topology. 744 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 745 * 746 * This routine will issue the INIT_LINK mailbox command call. 747 * It is available to other drivers through the lpfc_hba data 748 * structure for use as a delayed link up mechanism with the 749 * module parameter lpfc_suppress_link_up. 750 * 751 * Return code 752 * 0 - success 753 * Any other value - error 754 **/ 755 int 756 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, 757 uint32_t flag) 758 { 759 struct lpfc_vport *vport = phba->pport; 760 LPFC_MBOXQ_t *pmb; 761 MAILBOX_t *mb; 762 int rc; 763 764 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 765 if (!pmb) { 766 phba->link_state = LPFC_HBA_ERROR; 767 return -ENOMEM; 768 } 769 mb = &pmb->u.mb; 770 pmb->vport = vport; 771 772 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || 773 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && 774 !(phba->lmt & LMT_1Gb)) || 775 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && 776 !(phba->lmt & LMT_2Gb)) || 777 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && 778 !(phba->lmt & LMT_4Gb)) || 779 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && 780 !(phba->lmt & LMT_8Gb)) || 781 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && 782 !(phba->lmt & LMT_10Gb)) || 783 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && 784 !(phba->lmt & LMT_16Gb)) || 785 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && 786 !(phba->lmt & LMT_32Gb)) || 787 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && 788 !(phba->lmt & LMT_64Gb))) { 789 /* Reset link speed to auto */ 790 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 791 "1302 Invalid speed for this board:%d " 792 "Reset link speed to auto.\n", 793 phba->cfg_link_speed); 794 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; 795 } 796 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); 797 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 798 if (phba->sli_rev < LPFC_SLI_REV4) 799 lpfc_set_loopback_flag(phba); 800 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 801 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 802 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 803 "0498 Adapter failed to init, mbxCmd x%x " 804 "INIT_LINK, mbxStatus x%x\n", 805 mb->mbxCommand, mb->mbxStatus); 806 if (phba->sli_rev <= LPFC_SLI_REV3) { 807 /* Clear all interrupt enable conditions */ 808 writel(0, phba->HCregaddr); 809 readl(phba->HCregaddr); /* flush */ 810 /* Clear all pending interrupts */ 811 writel(0xffffffff, phba->HAregaddr); 812 readl(phba->HAregaddr); /* flush */ 813 } 814 phba->link_state = LPFC_HBA_ERROR; 815 if (rc != MBX_BUSY || flag == MBX_POLL) 816 mempool_free(pmb, phba->mbox_mem_pool); 817 return -EIO; 818 } 819 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; 820 if (flag == MBX_POLL) 821 mempool_free(pmb, phba->mbox_mem_pool); 822 823 return 0; 824 } 825 826 /** 827 * lpfc_hba_down_link - this routine downs the FC link 828 * @phba: pointer to lpfc hba data structure. 829 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 830 * 831 * This routine will issue the DOWN_LINK mailbox command call. 832 * It is available to other drivers through the lpfc_hba data 833 * structure for use to stop the link. 834 * 835 * Return code 836 * 0 - success 837 * Any other value - error 838 **/ 839 static int 840 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) 841 { 842 LPFC_MBOXQ_t *pmb; 843 int rc; 844 845 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 846 if (!pmb) { 847 phba->link_state = LPFC_HBA_ERROR; 848 return -ENOMEM; 849 } 850 851 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 852 "0491 Adapter Link is disabled.\n"); 853 lpfc_down_link(phba, pmb); 854 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 855 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 856 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 857 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 858 "2522 Adapter failed to issue DOWN_LINK" 859 " mbox command rc 0x%x\n", rc); 860 861 mempool_free(pmb, phba->mbox_mem_pool); 862 return -EIO; 863 } 864 if (flag == MBX_POLL) 865 mempool_free(pmb, phba->mbox_mem_pool); 866 867 return 0; 868 } 869 870 /** 871 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset 872 * @phba: pointer to lpfc HBA data structure. 873 * 874 * This routine will do LPFC uninitialization before the HBA is reset when 875 * bringing down the SLI Layer. 876 * 877 * Return codes 878 * 0 - success. 879 * Any other value - error. 880 **/ 881 int 882 lpfc_hba_down_prep(struct lpfc_hba *phba) 883 { 884 struct lpfc_vport **vports; 885 int i; 886 887 if (phba->sli_rev <= LPFC_SLI_REV3) { 888 /* Disable interrupts */ 889 writel(0, phba->HCregaddr); 890 readl(phba->HCregaddr); /* flush */ 891 } 892 893 if (phba->pport->load_flag & FC_UNLOADING) 894 lpfc_cleanup_discovery_resources(phba->pport); 895 else { 896 vports = lpfc_create_vport_work_array(phba); 897 if (vports != NULL) 898 for (i = 0; i <= phba->max_vports && 899 vports[i] != NULL; i++) 900 lpfc_cleanup_discovery_resources(vports[i]); 901 lpfc_destroy_vport_work_array(phba, vports); 902 } 903 return 0; 904 } 905 906 /** 907 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free 908 * rspiocb which got deferred 909 * 910 * @phba: pointer to lpfc HBA data structure. 911 * 912 * This routine will cleanup completed slow path events after HBA is reset 913 * when bringing down the SLI Layer. 914 * 915 * 916 * Return codes 917 * void. 918 **/ 919 static void 920 lpfc_sli4_free_sp_events(struct lpfc_hba *phba) 921 { 922 struct lpfc_iocbq *rspiocbq; 923 struct hbq_dmabuf *dmabuf; 924 struct lpfc_cq_event *cq_event; 925 926 spin_lock_irq(&phba->hbalock); 927 phba->hba_flag &= ~HBA_SP_QUEUE_EVT; 928 spin_unlock_irq(&phba->hbalock); 929 930 while (!list_empty(&phba->sli4_hba.sp_queue_event)) { 931 /* Get the response iocb from the head of work queue */ 932 spin_lock_irq(&phba->hbalock); 933 list_remove_head(&phba->sli4_hba.sp_queue_event, 934 cq_event, struct lpfc_cq_event, list); 935 spin_unlock_irq(&phba->hbalock); 936 937 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { 938 case CQE_CODE_COMPL_WQE: 939 rspiocbq = container_of(cq_event, struct lpfc_iocbq, 940 cq_event); 941 lpfc_sli_release_iocbq(phba, rspiocbq); 942 break; 943 case CQE_CODE_RECEIVE: 944 case CQE_CODE_RECEIVE_V1: 945 dmabuf = container_of(cq_event, struct hbq_dmabuf, 946 cq_event); 947 lpfc_in_buf_free(phba, &dmabuf->dbuf); 948 } 949 } 950 } 951 952 /** 953 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset 954 * @phba: pointer to lpfc HBA data structure. 955 * 956 * This routine will cleanup posted ELS buffers after the HBA is reset 957 * when bringing down the SLI Layer. 958 * 959 * 960 * Return codes 961 * void. 962 **/ 963 static void 964 lpfc_hba_free_post_buf(struct lpfc_hba *phba) 965 { 966 struct lpfc_sli *psli = &phba->sli; 967 struct lpfc_sli_ring *pring; 968 struct lpfc_dmabuf *mp, *next_mp; 969 LIST_HEAD(buflist); 970 int count; 971 972 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) 973 lpfc_sli_hbqbuf_free_all(phba); 974 else { 975 /* Cleanup preposted buffers on the ELS ring */ 976 pring = &psli->sli3_ring[LPFC_ELS_RING]; 977 spin_lock_irq(&phba->hbalock); 978 list_splice_init(&pring->postbufq, &buflist); 979 spin_unlock_irq(&phba->hbalock); 980 981 count = 0; 982 list_for_each_entry_safe(mp, next_mp, &buflist, list) { 983 list_del(&mp->list); 984 count++; 985 lpfc_mbuf_free(phba, mp->virt, mp->phys); 986 kfree(mp); 987 } 988 989 spin_lock_irq(&phba->hbalock); 990 pring->postbufq_cnt -= count; 991 spin_unlock_irq(&phba->hbalock); 992 } 993 } 994 995 /** 996 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset 997 * @phba: pointer to lpfc HBA data structure. 998 * 999 * This routine will cleanup the txcmplq after the HBA is reset when bringing 1000 * down the SLI Layer. 1001 * 1002 * Return codes 1003 * void 1004 **/ 1005 static void 1006 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) 1007 { 1008 struct lpfc_sli *psli = &phba->sli; 1009 struct lpfc_queue *qp = NULL; 1010 struct lpfc_sli_ring *pring; 1011 LIST_HEAD(completions); 1012 int i; 1013 struct lpfc_iocbq *piocb, *next_iocb; 1014 1015 if (phba->sli_rev != LPFC_SLI_REV4) { 1016 for (i = 0; i < psli->num_rings; i++) { 1017 pring = &psli->sli3_ring[i]; 1018 spin_lock_irq(&phba->hbalock); 1019 /* At this point in time the HBA is either reset or DOA 1020 * Nothing should be on txcmplq as it will 1021 * NEVER complete. 1022 */ 1023 list_splice_init(&pring->txcmplq, &completions); 1024 pring->txcmplq_cnt = 0; 1025 spin_unlock_irq(&phba->hbalock); 1026 1027 lpfc_sli_abort_iocb_ring(phba, pring); 1028 } 1029 /* Cancel all the IOCBs from the completions list */ 1030 lpfc_sli_cancel_iocbs(phba, &completions, 1031 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1032 return; 1033 } 1034 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { 1035 pring = qp->pring; 1036 if (!pring) 1037 continue; 1038 spin_lock_irq(&pring->ring_lock); 1039 list_for_each_entry_safe(piocb, next_iocb, 1040 &pring->txcmplq, list) 1041 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ; 1042 list_splice_init(&pring->txcmplq, &completions); 1043 pring->txcmplq_cnt = 0; 1044 spin_unlock_irq(&pring->ring_lock); 1045 lpfc_sli_abort_iocb_ring(phba, pring); 1046 } 1047 /* Cancel all the IOCBs from the completions list */ 1048 lpfc_sli_cancel_iocbs(phba, &completions, 1049 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1050 } 1051 1052 /** 1053 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset 1054 * @phba: pointer to lpfc HBA data structure. 1055 * 1056 * This routine will do uninitialization after the HBA is reset when bring 1057 * down the SLI Layer. 1058 * 1059 * Return codes 1060 * 0 - success. 1061 * Any other value - error. 1062 **/ 1063 static int 1064 lpfc_hba_down_post_s3(struct lpfc_hba *phba) 1065 { 1066 lpfc_hba_free_post_buf(phba); 1067 lpfc_hba_clean_txcmplq(phba); 1068 return 0; 1069 } 1070 1071 /** 1072 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset 1073 * @phba: pointer to lpfc HBA data structure. 1074 * 1075 * This routine will do uninitialization after the HBA is reset when bring 1076 * down the SLI Layer. 1077 * 1078 * Return codes 1079 * 0 - success. 1080 * Any other value - error. 1081 **/ 1082 static int 1083 lpfc_hba_down_post_s4(struct lpfc_hba *phba) 1084 { 1085 struct lpfc_io_buf *psb, *psb_next; 1086 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; 1087 struct lpfc_sli4_hdw_queue *qp; 1088 LIST_HEAD(aborts); 1089 LIST_HEAD(nvme_aborts); 1090 LIST_HEAD(nvmet_aborts); 1091 struct lpfc_sglq *sglq_entry = NULL; 1092 int cnt, idx; 1093 1094 1095 lpfc_sli_hbqbuf_free_all(phba); 1096 lpfc_hba_clean_txcmplq(phba); 1097 1098 /* At this point in time the HBA is either reset or DOA. Either 1099 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be 1100 * on the lpfc_els_sgl_list so that it can either be freed if the 1101 * driver is unloading or reposted if the driver is restarting 1102 * the port. 1103 */ 1104 1105 /* sgl_list_lock required because worker thread uses this 1106 * list. 1107 */ 1108 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 1109 list_for_each_entry(sglq_entry, 1110 &phba->sli4_hba.lpfc_abts_els_sgl_list, list) 1111 sglq_entry->state = SGL_FREED; 1112 1113 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, 1114 &phba->sli4_hba.lpfc_els_sgl_list); 1115 1116 1117 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 1118 1119 /* abts_xxxx_buf_list_lock required because worker thread uses this 1120 * list. 1121 */ 1122 spin_lock_irq(&phba->hbalock); 1123 cnt = 0; 1124 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 1125 qp = &phba->sli4_hba.hdwq[idx]; 1126 1127 spin_lock(&qp->abts_io_buf_list_lock); 1128 list_splice_init(&qp->lpfc_abts_io_buf_list, 1129 &aborts); 1130 1131 list_for_each_entry_safe(psb, psb_next, &aborts, list) { 1132 psb->pCmd = NULL; 1133 psb->status = IOSTAT_SUCCESS; 1134 cnt++; 1135 } 1136 spin_lock(&qp->io_buf_list_put_lock); 1137 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); 1138 qp->put_io_bufs += qp->abts_scsi_io_bufs; 1139 qp->put_io_bufs += qp->abts_nvme_io_bufs; 1140 qp->abts_scsi_io_bufs = 0; 1141 qp->abts_nvme_io_bufs = 0; 1142 spin_unlock(&qp->io_buf_list_put_lock); 1143 spin_unlock(&qp->abts_io_buf_list_lock); 1144 } 1145 spin_unlock_irq(&phba->hbalock); 1146 1147 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 1148 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1149 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, 1150 &nvmet_aborts); 1151 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1152 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { 1153 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); 1154 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); 1155 } 1156 } 1157 1158 lpfc_sli4_free_sp_events(phba); 1159 return cnt; 1160 } 1161 1162 /** 1163 * lpfc_hba_down_post - Wrapper func for hba down post routine 1164 * @phba: pointer to lpfc HBA data structure. 1165 * 1166 * This routine wraps the actual SLI3 or SLI4 routine for performing 1167 * uninitialization after the HBA is reset when bring down the SLI Layer. 1168 * 1169 * Return codes 1170 * 0 - success. 1171 * Any other value - error. 1172 **/ 1173 int 1174 lpfc_hba_down_post(struct lpfc_hba *phba) 1175 { 1176 return (*phba->lpfc_hba_down_post)(phba); 1177 } 1178 1179 /** 1180 * lpfc_hb_timeout - The HBA-timer timeout handler 1181 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1182 * 1183 * This is the HBA-timer timeout handler registered to the lpfc driver. When 1184 * this timer fires, a HBA timeout event shall be posted to the lpfc driver 1185 * work-port-events bitmap and the worker thread is notified. This timeout 1186 * event will be used by the worker thread to invoke the actual timeout 1187 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will 1188 * be performed in the timeout handler and the HBA timeout event bit shall 1189 * be cleared by the worker thread after it has taken the event bitmap out. 1190 **/ 1191 static void 1192 lpfc_hb_timeout(struct timer_list *t) 1193 { 1194 struct lpfc_hba *phba; 1195 uint32_t tmo_posted; 1196 unsigned long iflag; 1197 1198 phba = from_timer(phba, t, hb_tmofunc); 1199 1200 /* Check for heart beat timeout conditions */ 1201 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1202 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; 1203 if (!tmo_posted) 1204 phba->pport->work_port_events |= WORKER_HB_TMO; 1205 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1206 1207 /* Tell the worker thread there is work to do */ 1208 if (!tmo_posted) 1209 lpfc_worker_wake_up(phba); 1210 return; 1211 } 1212 1213 /** 1214 * lpfc_rrq_timeout - The RRQ-timer timeout handler 1215 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1216 * 1217 * This is the RRQ-timer timeout handler registered to the lpfc driver. When 1218 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver 1219 * work-port-events bitmap and the worker thread is notified. This timeout 1220 * event will be used by the worker thread to invoke the actual timeout 1221 * handler routine, lpfc_rrq_handler. Any periodical operations will 1222 * be performed in the timeout handler and the RRQ timeout event bit shall 1223 * be cleared by the worker thread after it has taken the event bitmap out. 1224 **/ 1225 static void 1226 lpfc_rrq_timeout(struct timer_list *t) 1227 { 1228 struct lpfc_hba *phba; 1229 unsigned long iflag; 1230 1231 phba = from_timer(phba, t, rrq_tmr); 1232 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1233 if (!(phba->pport->load_flag & FC_UNLOADING)) 1234 phba->hba_flag |= HBA_RRQ_ACTIVE; 1235 else 1236 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 1237 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1238 1239 if (!(phba->pport->load_flag & FC_UNLOADING)) 1240 lpfc_worker_wake_up(phba); 1241 } 1242 1243 /** 1244 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function 1245 * @phba: pointer to lpfc hba data structure. 1246 * @pmboxq: pointer to the driver internal queue element for mailbox command. 1247 * 1248 * This is the callback function to the lpfc heart-beat mailbox command. 1249 * If configured, the lpfc driver issues the heart-beat mailbox command to 1250 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the 1251 * heart-beat mailbox command is issued, the driver shall set up heart-beat 1252 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks 1253 * heart-beat outstanding state. Once the mailbox command comes back and 1254 * no error conditions detected, the heart-beat mailbox command timer is 1255 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding 1256 * state is cleared for the next heart-beat. If the timer expired with the 1257 * heart-beat outstanding state set, the driver will put the HBA offline. 1258 **/ 1259 static void 1260 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 1261 { 1262 unsigned long drvr_flag; 1263 1264 spin_lock_irqsave(&phba->hbalock, drvr_flag); 1265 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 1266 spin_unlock_irqrestore(&phba->hbalock, drvr_flag); 1267 1268 /* Check and reset heart-beat timer if necessary */ 1269 mempool_free(pmboxq, phba->mbox_mem_pool); 1270 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && 1271 !(phba->link_state == LPFC_HBA_ERROR) && 1272 !(phba->pport->load_flag & FC_UNLOADING)) 1273 mod_timer(&phba->hb_tmofunc, 1274 jiffies + 1275 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 1276 return; 1277 } 1278 1279 /* 1280 * lpfc_idle_stat_delay_work - idle_stat tracking 1281 * 1282 * This routine tracks per-eq idle_stat and determines polling decisions. 1283 * 1284 * Return codes: 1285 * None 1286 **/ 1287 static void 1288 lpfc_idle_stat_delay_work(struct work_struct *work) 1289 { 1290 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1291 struct lpfc_hba, 1292 idle_stat_delay_work); 1293 struct lpfc_queue *eq; 1294 struct lpfc_sli4_hdw_queue *hdwq; 1295 struct lpfc_idle_stat *idle_stat; 1296 u32 i, idle_percent; 1297 u64 wall, wall_idle, diff_wall, diff_idle, busy_time; 1298 1299 if (phba->pport->load_flag & FC_UNLOADING) 1300 return; 1301 1302 if (phba->link_state == LPFC_HBA_ERROR || 1303 phba->pport->fc_flag & FC_OFFLINE_MODE || 1304 phba->cmf_active_mode != LPFC_CFG_OFF) 1305 goto requeue; 1306 1307 for_each_present_cpu(i) { 1308 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; 1309 eq = hdwq->hba_eq; 1310 1311 /* Skip if we've already handled this eq's primary CPU */ 1312 if (eq->chann != i) 1313 continue; 1314 1315 idle_stat = &phba->sli4_hba.idle_stat[i]; 1316 1317 /* get_cpu_idle_time returns values as running counters. Thus, 1318 * to know the amount for this period, the prior counter values 1319 * need to be subtracted from the current counter values. 1320 * From there, the idle time stat can be calculated as a 1321 * percentage of 100 - the sum of the other consumption times. 1322 */ 1323 wall_idle = get_cpu_idle_time(i, &wall, 1); 1324 diff_idle = wall_idle - idle_stat->prev_idle; 1325 diff_wall = wall - idle_stat->prev_wall; 1326 1327 if (diff_wall <= diff_idle) 1328 busy_time = 0; 1329 else 1330 busy_time = diff_wall - diff_idle; 1331 1332 idle_percent = div64_u64(100 * busy_time, diff_wall); 1333 idle_percent = 100 - idle_percent; 1334 1335 if (idle_percent < 15) 1336 eq->poll_mode = LPFC_QUEUE_WORK; 1337 else 1338 eq->poll_mode = LPFC_THREADED_IRQ; 1339 1340 idle_stat->prev_idle = wall_idle; 1341 idle_stat->prev_wall = wall; 1342 } 1343 1344 requeue: 1345 schedule_delayed_work(&phba->idle_stat_delay_work, 1346 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); 1347 } 1348 1349 static void 1350 lpfc_hb_eq_delay_work(struct work_struct *work) 1351 { 1352 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1353 struct lpfc_hba, eq_delay_work); 1354 struct lpfc_eq_intr_info *eqi, *eqi_new; 1355 struct lpfc_queue *eq, *eq_next; 1356 unsigned char *ena_delay = NULL; 1357 uint32_t usdelay; 1358 int i; 1359 1360 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) 1361 return; 1362 1363 if (phba->link_state == LPFC_HBA_ERROR || 1364 phba->pport->fc_flag & FC_OFFLINE_MODE) 1365 goto requeue; 1366 1367 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), 1368 GFP_KERNEL); 1369 if (!ena_delay) 1370 goto requeue; 1371 1372 for (i = 0; i < phba->cfg_irq_chann; i++) { 1373 /* Get the EQ corresponding to the IRQ vector */ 1374 eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1375 if (!eq) 1376 continue; 1377 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { 1378 eq->q_flag &= ~HBA_EQ_DELAY_CHK; 1379 ena_delay[eq->last_cpu] = 1; 1380 } 1381 } 1382 1383 for_each_present_cpu(i) { 1384 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); 1385 if (ena_delay[i]) { 1386 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; 1387 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) 1388 usdelay = LPFC_MAX_AUTO_EQ_DELAY; 1389 } else { 1390 usdelay = 0; 1391 } 1392 1393 eqi->icnt = 0; 1394 1395 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { 1396 if (unlikely(eq->last_cpu != i)) { 1397 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, 1398 eq->last_cpu); 1399 list_move_tail(&eq->cpu_list, &eqi_new->list); 1400 continue; 1401 } 1402 if (usdelay != eq->q_mode) 1403 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, 1404 usdelay); 1405 } 1406 } 1407 1408 kfree(ena_delay); 1409 1410 requeue: 1411 queue_delayed_work(phba->wq, &phba->eq_delay_work, 1412 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); 1413 } 1414 1415 /** 1416 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution 1417 * @phba: pointer to lpfc hba data structure. 1418 * 1419 * For each heartbeat, this routine does some heuristic methods to adjust 1420 * XRI distribution. The goal is to fully utilize free XRIs. 1421 **/ 1422 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) 1423 { 1424 u32 i; 1425 u32 hwq_count; 1426 1427 hwq_count = phba->cfg_hdw_queue; 1428 for (i = 0; i < hwq_count; i++) { 1429 /* Adjust XRIs in private pool */ 1430 lpfc_adjust_pvt_pool_count(phba, i); 1431 1432 /* Adjust high watermark */ 1433 lpfc_adjust_high_watermark(phba, i); 1434 1435 #ifdef LPFC_MXP_STAT 1436 /* Snapshot pbl, pvt and busy count */ 1437 lpfc_snapshot_mxp(phba, i); 1438 #endif 1439 } 1440 } 1441 1442 /** 1443 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command 1444 * @phba: pointer to lpfc hba data structure. 1445 * 1446 * If a HB mbox is not already in progrees, this routine will allocate 1447 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command, 1448 * and issue it. The HBA_HBEAT_INP flag means the command is in progress. 1449 **/ 1450 int 1451 lpfc_issue_hb_mbox(struct lpfc_hba *phba) 1452 { 1453 LPFC_MBOXQ_t *pmboxq; 1454 int retval; 1455 1456 /* Is a Heartbeat mbox already in progress */ 1457 if (phba->hba_flag & HBA_HBEAT_INP) 1458 return 0; 1459 1460 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 1461 if (!pmboxq) 1462 return -ENOMEM; 1463 1464 lpfc_heart_beat(phba, pmboxq); 1465 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; 1466 pmboxq->vport = phba->pport; 1467 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); 1468 1469 if (retval != MBX_BUSY && retval != MBX_SUCCESS) { 1470 mempool_free(pmboxq, phba->mbox_mem_pool); 1471 return -ENXIO; 1472 } 1473 phba->hba_flag |= HBA_HBEAT_INP; 1474 1475 return 0; 1476 } 1477 1478 /** 1479 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command 1480 * @phba: pointer to lpfc hba data structure. 1481 * 1482 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO 1483 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless 1484 * of the value of lpfc_enable_hba_heartbeat. 1485 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always 1486 * try to issue a MBX_HEARTBEAT mbox command. 1487 **/ 1488 void 1489 lpfc_issue_hb_tmo(struct lpfc_hba *phba) 1490 { 1491 if (phba->cfg_enable_hba_heartbeat) 1492 return; 1493 phba->hba_flag |= HBA_HBEAT_TMO; 1494 } 1495 1496 /** 1497 * lpfc_hb_timeout_handler - The HBA-timer timeout handler 1498 * @phba: pointer to lpfc hba data structure. 1499 * 1500 * This is the actual HBA-timer timeout handler to be invoked by the worker 1501 * thread whenever the HBA timer fired and HBA-timeout event posted. This 1502 * handler performs any periodic operations needed for the device. If such 1503 * periodic event has already been attended to either in the interrupt handler 1504 * or by processing slow-ring or fast-ring events within the HBA-timer 1505 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets 1506 * the timer for the next timeout period. If lpfc heart-beat mailbox command 1507 * is configured and there is no heart-beat mailbox command outstanding, a 1508 * heart-beat mailbox is issued and timer set properly. Otherwise, if there 1509 * has been a heart-beat mailbox command outstanding, the HBA shall be put 1510 * to offline. 1511 **/ 1512 void 1513 lpfc_hb_timeout_handler(struct lpfc_hba *phba) 1514 { 1515 struct lpfc_vport **vports; 1516 struct lpfc_dmabuf *buf_ptr; 1517 int retval = 0; 1518 int i, tmo; 1519 struct lpfc_sli *psli = &phba->sli; 1520 LIST_HEAD(completions); 1521 1522 if (phba->cfg_xri_rebalancing) { 1523 /* Multi-XRI pools handler */ 1524 lpfc_hb_mxp_handler(phba); 1525 } 1526 1527 vports = lpfc_create_vport_work_array(phba); 1528 if (vports != NULL) 1529 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 1530 lpfc_rcv_seq_check_edtov(vports[i]); 1531 lpfc_fdmi_change_check(vports[i]); 1532 } 1533 lpfc_destroy_vport_work_array(phba, vports); 1534 1535 if ((phba->link_state == LPFC_HBA_ERROR) || 1536 (phba->pport->load_flag & FC_UNLOADING) || 1537 (phba->pport->fc_flag & FC_OFFLINE_MODE)) 1538 return; 1539 1540 if (phba->elsbuf_cnt && 1541 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { 1542 spin_lock_irq(&phba->hbalock); 1543 list_splice_init(&phba->elsbuf, &completions); 1544 phba->elsbuf_cnt = 0; 1545 phba->elsbuf_prev_cnt = 0; 1546 spin_unlock_irq(&phba->hbalock); 1547 1548 while (!list_empty(&completions)) { 1549 list_remove_head(&completions, buf_ptr, 1550 struct lpfc_dmabuf, list); 1551 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 1552 kfree(buf_ptr); 1553 } 1554 } 1555 phba->elsbuf_prev_cnt = phba->elsbuf_cnt; 1556 1557 /* If there is no heart beat outstanding, issue a heartbeat command */ 1558 if (phba->cfg_enable_hba_heartbeat) { 1559 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */ 1560 spin_lock_irq(&phba->pport->work_port_lock); 1561 if (time_after(phba->last_completion_time + 1562 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), 1563 jiffies)) { 1564 spin_unlock_irq(&phba->pport->work_port_lock); 1565 if (phba->hba_flag & HBA_HBEAT_INP) 1566 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1567 else 1568 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1569 goto out; 1570 } 1571 spin_unlock_irq(&phba->pport->work_port_lock); 1572 1573 /* Check if a MBX_HEARTBEAT is already in progress */ 1574 if (phba->hba_flag & HBA_HBEAT_INP) { 1575 /* 1576 * If heart beat timeout called with HBA_HBEAT_INP set 1577 * we need to give the hb mailbox cmd a chance to 1578 * complete or TMO. 1579 */ 1580 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 1581 "0459 Adapter heartbeat still outstanding: " 1582 "last compl time was %d ms.\n", 1583 jiffies_to_msecs(jiffies 1584 - phba->last_completion_time)); 1585 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1586 } else { 1587 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && 1588 (list_empty(&psli->mboxq))) { 1589 1590 retval = lpfc_issue_hb_mbox(phba); 1591 if (retval) { 1592 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1593 goto out; 1594 } 1595 phba->skipped_hb = 0; 1596 } else if (time_before_eq(phba->last_completion_time, 1597 phba->skipped_hb)) { 1598 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 1599 "2857 Last completion time not " 1600 " updated in %d ms\n", 1601 jiffies_to_msecs(jiffies 1602 - phba->last_completion_time)); 1603 } else 1604 phba->skipped_hb = jiffies; 1605 1606 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1607 goto out; 1608 } 1609 } else { 1610 /* Check to see if we want to force a MBX_HEARTBEAT */ 1611 if (phba->hba_flag & HBA_HBEAT_TMO) { 1612 retval = lpfc_issue_hb_mbox(phba); 1613 if (retval) 1614 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1615 else 1616 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1617 goto out; 1618 } 1619 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1620 } 1621 out: 1622 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo)); 1623 } 1624 1625 /** 1626 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention 1627 * @phba: pointer to lpfc hba data structure. 1628 * 1629 * This routine is called to bring the HBA offline when HBA hardware error 1630 * other than Port Error 6 has been detected. 1631 **/ 1632 static void 1633 lpfc_offline_eratt(struct lpfc_hba *phba) 1634 { 1635 struct lpfc_sli *psli = &phba->sli; 1636 1637 spin_lock_irq(&phba->hbalock); 1638 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1639 spin_unlock_irq(&phba->hbalock); 1640 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1641 1642 lpfc_offline(phba); 1643 lpfc_reset_barrier(phba); 1644 spin_lock_irq(&phba->hbalock); 1645 lpfc_sli_brdreset(phba); 1646 spin_unlock_irq(&phba->hbalock); 1647 lpfc_hba_down_post(phba); 1648 lpfc_sli_brdready(phba, HS_MBRDY); 1649 lpfc_unblock_mgmt_io(phba); 1650 phba->link_state = LPFC_HBA_ERROR; 1651 return; 1652 } 1653 1654 /** 1655 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention 1656 * @phba: pointer to lpfc hba data structure. 1657 * 1658 * This routine is called to bring a SLI4 HBA offline when HBA hardware error 1659 * other than Port Error 6 has been detected. 1660 **/ 1661 void 1662 lpfc_sli4_offline_eratt(struct lpfc_hba *phba) 1663 { 1664 spin_lock_irq(&phba->hbalock); 1665 if (phba->link_state == LPFC_HBA_ERROR && 1666 test_bit(HBA_PCI_ERR, &phba->bit_flags)) { 1667 spin_unlock_irq(&phba->hbalock); 1668 return; 1669 } 1670 phba->link_state = LPFC_HBA_ERROR; 1671 spin_unlock_irq(&phba->hbalock); 1672 1673 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1674 lpfc_sli_flush_io_rings(phba); 1675 lpfc_offline(phba); 1676 lpfc_hba_down_post(phba); 1677 lpfc_unblock_mgmt_io(phba); 1678 } 1679 1680 /** 1681 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler 1682 * @phba: pointer to lpfc hba data structure. 1683 * 1684 * This routine is invoked to handle the deferred HBA hardware error 1685 * conditions. This type of error is indicated by HBA by setting ER1 1686 * and another ER bit in the host status register. The driver will 1687 * wait until the ER1 bit clears before handling the error condition. 1688 **/ 1689 static void 1690 lpfc_handle_deferred_eratt(struct lpfc_hba *phba) 1691 { 1692 uint32_t old_host_status = phba->work_hs; 1693 struct lpfc_sli *psli = &phba->sli; 1694 1695 /* If the pci channel is offline, ignore possible errors, 1696 * since we cannot communicate with the pci card anyway. 1697 */ 1698 if (pci_channel_offline(phba->pcidev)) { 1699 spin_lock_irq(&phba->hbalock); 1700 phba->hba_flag &= ~DEFER_ERATT; 1701 spin_unlock_irq(&phba->hbalock); 1702 return; 1703 } 1704 1705 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1706 "0479 Deferred Adapter Hardware Error " 1707 "Data: x%x x%x x%x\n", 1708 phba->work_hs, phba->work_status[0], 1709 phba->work_status[1]); 1710 1711 spin_lock_irq(&phba->hbalock); 1712 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1713 spin_unlock_irq(&phba->hbalock); 1714 1715 1716 /* 1717 * Firmware stops when it triggred erratt. That could cause the I/Os 1718 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the 1719 * SCSI layer retry it after re-establishing link. 1720 */ 1721 lpfc_sli_abort_fcp_rings(phba); 1722 1723 /* 1724 * There was a firmware error. Take the hba offline and then 1725 * attempt to restart it. 1726 */ 1727 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 1728 lpfc_offline(phba); 1729 1730 /* Wait for the ER1 bit to clear.*/ 1731 while (phba->work_hs & HS_FFER1) { 1732 msleep(100); 1733 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { 1734 phba->work_hs = UNPLUG_ERR ; 1735 break; 1736 } 1737 /* If driver is unloading let the worker thread continue */ 1738 if (phba->pport->load_flag & FC_UNLOADING) { 1739 phba->work_hs = 0; 1740 break; 1741 } 1742 } 1743 1744 /* 1745 * This is to ptrotect against a race condition in which 1746 * first write to the host attention register clear the 1747 * host status register. 1748 */ 1749 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) 1750 phba->work_hs = old_host_status & ~HS_FFER1; 1751 1752 spin_lock_irq(&phba->hbalock); 1753 phba->hba_flag &= ~DEFER_ERATT; 1754 spin_unlock_irq(&phba->hbalock); 1755 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); 1756 phba->work_status[1] = readl(phba->MBslimaddr + 0xac); 1757 } 1758 1759 static void 1760 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) 1761 { 1762 struct lpfc_board_event_header board_event; 1763 struct Scsi_Host *shost; 1764 1765 board_event.event_type = FC_REG_BOARD_EVENT; 1766 board_event.subcategory = LPFC_EVENT_PORTINTERR; 1767 shost = lpfc_shost_from_vport(phba->pport); 1768 fc_host_post_vendor_event(shost, fc_get_event_number(), 1769 sizeof(board_event), 1770 (char *) &board_event, 1771 LPFC_NL_VENDOR_ID); 1772 } 1773 1774 /** 1775 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler 1776 * @phba: pointer to lpfc hba data structure. 1777 * 1778 * This routine is invoked to handle the following HBA hardware error 1779 * conditions: 1780 * 1 - HBA error attention interrupt 1781 * 2 - DMA ring index out of range 1782 * 3 - Mailbox command came back as unknown 1783 **/ 1784 static void 1785 lpfc_handle_eratt_s3(struct lpfc_hba *phba) 1786 { 1787 struct lpfc_vport *vport = phba->pport; 1788 struct lpfc_sli *psli = &phba->sli; 1789 uint32_t event_data; 1790 unsigned long temperature; 1791 struct temp_event temp_event_data; 1792 struct Scsi_Host *shost; 1793 1794 /* If the pci channel is offline, ignore possible errors, 1795 * since we cannot communicate with the pci card anyway. 1796 */ 1797 if (pci_channel_offline(phba->pcidev)) { 1798 spin_lock_irq(&phba->hbalock); 1799 phba->hba_flag &= ~DEFER_ERATT; 1800 spin_unlock_irq(&phba->hbalock); 1801 return; 1802 } 1803 1804 /* If resets are disabled then leave the HBA alone and return */ 1805 if (!phba->cfg_enable_hba_reset) 1806 return; 1807 1808 /* Send an internal error event to mgmt application */ 1809 lpfc_board_errevt_to_mgmt(phba); 1810 1811 if (phba->hba_flag & DEFER_ERATT) 1812 lpfc_handle_deferred_eratt(phba); 1813 1814 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { 1815 if (phba->work_hs & HS_FFER6) 1816 /* Re-establishing Link */ 1817 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1818 "1301 Re-establishing Link " 1819 "Data: x%x x%x x%x\n", 1820 phba->work_hs, phba->work_status[0], 1821 phba->work_status[1]); 1822 if (phba->work_hs & HS_FFER8) 1823 /* Device Zeroization */ 1824 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1825 "2861 Host Authentication device " 1826 "zeroization Data:x%x x%x x%x\n", 1827 phba->work_hs, phba->work_status[0], 1828 phba->work_status[1]); 1829 1830 spin_lock_irq(&phba->hbalock); 1831 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1832 spin_unlock_irq(&phba->hbalock); 1833 1834 /* 1835 * Firmware stops when it triggled erratt with HS_FFER6. 1836 * That could cause the I/Os dropped by the firmware. 1837 * Error iocb (I/O) on txcmplq and let the SCSI layer 1838 * retry it after re-establishing link. 1839 */ 1840 lpfc_sli_abort_fcp_rings(phba); 1841 1842 /* 1843 * There was a firmware error. Take the hba offline and then 1844 * attempt to restart it. 1845 */ 1846 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1847 lpfc_offline(phba); 1848 lpfc_sli_brdrestart(phba); 1849 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 1850 lpfc_unblock_mgmt_io(phba); 1851 return; 1852 } 1853 lpfc_unblock_mgmt_io(phba); 1854 } else if (phba->work_hs & HS_CRIT_TEMP) { 1855 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); 1856 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 1857 temp_event_data.event_code = LPFC_CRIT_TEMP; 1858 temp_event_data.data = (uint32_t)temperature; 1859 1860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1861 "0406 Adapter maximum temperature exceeded " 1862 "(%ld), taking this port offline " 1863 "Data: x%x x%x x%x\n", 1864 temperature, phba->work_hs, 1865 phba->work_status[0], phba->work_status[1]); 1866 1867 shost = lpfc_shost_from_vport(phba->pport); 1868 fc_host_post_vendor_event(shost, fc_get_event_number(), 1869 sizeof(temp_event_data), 1870 (char *) &temp_event_data, 1871 SCSI_NL_VID_TYPE_PCI 1872 | PCI_VENDOR_ID_EMULEX); 1873 1874 spin_lock_irq(&phba->hbalock); 1875 phba->over_temp_state = HBA_OVER_TEMP; 1876 spin_unlock_irq(&phba->hbalock); 1877 lpfc_offline_eratt(phba); 1878 1879 } else { 1880 /* The if clause above forces this code path when the status 1881 * failure is a value other than FFER6. Do not call the offline 1882 * twice. This is the adapter hardware error path. 1883 */ 1884 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1885 "0457 Adapter Hardware Error " 1886 "Data: x%x x%x x%x\n", 1887 phba->work_hs, 1888 phba->work_status[0], phba->work_status[1]); 1889 1890 event_data = FC_REG_DUMP_EVENT; 1891 shost = lpfc_shost_from_vport(vport); 1892 fc_host_post_vendor_event(shost, fc_get_event_number(), 1893 sizeof(event_data), (char *) &event_data, 1894 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 1895 1896 lpfc_offline_eratt(phba); 1897 } 1898 return; 1899 } 1900 1901 /** 1902 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg 1903 * @phba: pointer to lpfc hba data structure. 1904 * @mbx_action: flag for mailbox shutdown action. 1905 * @en_rn_msg: send reset/port recovery message. 1906 * This routine is invoked to perform an SLI4 port PCI function reset in 1907 * response to port status register polling attention. It waits for port 1908 * status register (ERR, RDY, RN) bits before proceeding with function reset. 1909 * During this process, interrupt vectors are freed and later requested 1910 * for handling possible port resource change. 1911 **/ 1912 static int 1913 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, 1914 bool en_rn_msg) 1915 { 1916 int rc; 1917 uint32_t intr_mode; 1918 LPFC_MBOXQ_t *mboxq; 1919 1920 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 1921 LPFC_SLI_INTF_IF_TYPE_2) { 1922 /* 1923 * On error status condition, driver need to wait for port 1924 * ready before performing reset. 1925 */ 1926 rc = lpfc_sli4_pdev_status_reg_wait(phba); 1927 if (rc) 1928 return rc; 1929 } 1930 1931 /* need reset: attempt for port recovery */ 1932 if (en_rn_msg) 1933 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1934 "2887 Reset Needed: Attempting Port " 1935 "Recovery...\n"); 1936 1937 /* If we are no wait, the HBA has been reset and is not 1938 * functional, thus we should clear 1939 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags. 1940 */ 1941 if (mbx_action == LPFC_MBX_NO_WAIT) { 1942 spin_lock_irq(&phba->hbalock); 1943 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; 1944 if (phba->sli.mbox_active) { 1945 mboxq = phba->sli.mbox_active; 1946 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 1947 __lpfc_mbox_cmpl_put(phba, mboxq); 1948 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1949 phba->sli.mbox_active = NULL; 1950 } 1951 spin_unlock_irq(&phba->hbalock); 1952 } 1953 1954 lpfc_offline_prep(phba, mbx_action); 1955 lpfc_sli_flush_io_rings(phba); 1956 lpfc_offline(phba); 1957 /* release interrupt for possible resource change */ 1958 lpfc_sli4_disable_intr(phba); 1959 rc = lpfc_sli_brdrestart(phba); 1960 if (rc) { 1961 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1962 "6309 Failed to restart board\n"); 1963 return rc; 1964 } 1965 /* request and enable interrupt */ 1966 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 1967 if (intr_mode == LPFC_INTR_ERROR) { 1968 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1969 "3175 Failed to enable interrupt\n"); 1970 return -EIO; 1971 } 1972 phba->intr_mode = intr_mode; 1973 rc = lpfc_online(phba); 1974 if (rc == 0) 1975 lpfc_unblock_mgmt_io(phba); 1976 1977 return rc; 1978 } 1979 1980 /** 1981 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler 1982 * @phba: pointer to lpfc hba data structure. 1983 * 1984 * This routine is invoked to handle the SLI4 HBA hardware error attention 1985 * conditions. 1986 **/ 1987 static void 1988 lpfc_handle_eratt_s4(struct lpfc_hba *phba) 1989 { 1990 struct lpfc_vport *vport = phba->pport; 1991 uint32_t event_data; 1992 struct Scsi_Host *shost; 1993 uint32_t if_type; 1994 struct lpfc_register portstat_reg = {0}; 1995 uint32_t reg_err1, reg_err2; 1996 uint32_t uerrlo_reg, uemasklo_reg; 1997 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; 1998 bool en_rn_msg = true; 1999 struct temp_event temp_event_data; 2000 struct lpfc_register portsmphr_reg; 2001 int rc, i; 2002 2003 /* If the pci channel is offline, ignore possible errors, since 2004 * we cannot communicate with the pci card anyway. 2005 */ 2006 if (pci_channel_offline(phba->pcidev)) { 2007 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2008 "3166 pci channel is offline\n"); 2009 lpfc_sli_flush_io_rings(phba); 2010 return; 2011 } 2012 2013 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 2014 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 2015 switch (if_type) { 2016 case LPFC_SLI_INTF_IF_TYPE_0: 2017 pci_rd_rc1 = lpfc_readl( 2018 phba->sli4_hba.u.if_type0.UERRLOregaddr, 2019 &uerrlo_reg); 2020 pci_rd_rc2 = lpfc_readl( 2021 phba->sli4_hba.u.if_type0.UEMASKLOregaddr, 2022 &uemasklo_reg); 2023 /* consider PCI bus read error as pci_channel_offline */ 2024 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) 2025 return; 2026 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { 2027 lpfc_sli4_offline_eratt(phba); 2028 return; 2029 } 2030 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2031 "7623 Checking UE recoverable"); 2032 2033 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { 2034 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2035 &portsmphr_reg.word0)) 2036 continue; 2037 2038 smphr_port_status = bf_get(lpfc_port_smphr_port_status, 2039 &portsmphr_reg); 2040 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2041 LPFC_PORT_SEM_UE_RECOVERABLE) 2042 break; 2043 /*Sleep for 1Sec, before checking SEMAPHORE */ 2044 msleep(1000); 2045 } 2046 2047 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2048 "4827 smphr_port_status x%x : Waited %dSec", 2049 smphr_port_status, i); 2050 2051 /* Recoverable UE, reset the HBA device */ 2052 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2053 LPFC_PORT_SEM_UE_RECOVERABLE) { 2054 for (i = 0; i < 20; i++) { 2055 msleep(1000); 2056 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2057 &portsmphr_reg.word0) && 2058 (LPFC_POST_STAGE_PORT_READY == 2059 bf_get(lpfc_port_smphr_port_status, 2060 &portsmphr_reg))) { 2061 rc = lpfc_sli4_port_sta_fn_reset(phba, 2062 LPFC_MBX_NO_WAIT, en_rn_msg); 2063 if (rc == 0) 2064 return; 2065 lpfc_printf_log(phba, KERN_ERR, 2066 LOG_TRACE_EVENT, 2067 "4215 Failed to recover UE"); 2068 break; 2069 } 2070 } 2071 } 2072 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2073 "7624 Firmware not ready: Failing UE recovery," 2074 " waited %dSec", i); 2075 phba->link_state = LPFC_HBA_ERROR; 2076 break; 2077 2078 case LPFC_SLI_INTF_IF_TYPE_2: 2079 case LPFC_SLI_INTF_IF_TYPE_6: 2080 pci_rd_rc1 = lpfc_readl( 2081 phba->sli4_hba.u.if_type2.STATUSregaddr, 2082 &portstat_reg.word0); 2083 /* consider PCI bus read error as pci_channel_offline */ 2084 if (pci_rd_rc1 == -EIO) { 2085 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2086 "3151 PCI bus read access failure: x%x\n", 2087 readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); 2088 lpfc_sli4_offline_eratt(phba); 2089 return; 2090 } 2091 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); 2092 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); 2093 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { 2094 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2095 "2889 Port Overtemperature event, " 2096 "taking port offline Data: x%x x%x\n", 2097 reg_err1, reg_err2); 2098 2099 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 2100 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 2101 temp_event_data.event_code = LPFC_CRIT_TEMP; 2102 temp_event_data.data = 0xFFFFFFFF; 2103 2104 shost = lpfc_shost_from_vport(phba->pport); 2105 fc_host_post_vendor_event(shost, fc_get_event_number(), 2106 sizeof(temp_event_data), 2107 (char *)&temp_event_data, 2108 SCSI_NL_VID_TYPE_PCI 2109 | PCI_VENDOR_ID_EMULEX); 2110 2111 spin_lock_irq(&phba->hbalock); 2112 phba->over_temp_state = HBA_OVER_TEMP; 2113 spin_unlock_irq(&phba->hbalock); 2114 lpfc_sli4_offline_eratt(phba); 2115 return; 2116 } 2117 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2118 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { 2119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2120 "3143 Port Down: Firmware Update " 2121 "Detected\n"); 2122 en_rn_msg = false; 2123 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2124 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2125 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2126 "3144 Port Down: Debug Dump\n"); 2127 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2128 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) 2129 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2130 "3145 Port Down: Provisioning\n"); 2131 2132 /* If resets are disabled then leave the HBA alone and return */ 2133 if (!phba->cfg_enable_hba_reset) 2134 return; 2135 2136 /* Check port status register for function reset */ 2137 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, 2138 en_rn_msg); 2139 if (rc == 0) { 2140 /* don't report event on forced debug dump */ 2141 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2142 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2143 return; 2144 else 2145 break; 2146 } 2147 /* fall through for not able to recover */ 2148 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2149 "3152 Unrecoverable error\n"); 2150 lpfc_sli4_offline_eratt(phba); 2151 break; 2152 case LPFC_SLI_INTF_IF_TYPE_1: 2153 default: 2154 break; 2155 } 2156 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 2157 "3123 Report dump event to upper layer\n"); 2158 /* Send an internal error event to mgmt application */ 2159 lpfc_board_errevt_to_mgmt(phba); 2160 2161 event_data = FC_REG_DUMP_EVENT; 2162 shost = lpfc_shost_from_vport(vport); 2163 fc_host_post_vendor_event(shost, fc_get_event_number(), 2164 sizeof(event_data), (char *) &event_data, 2165 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 2166 } 2167 2168 /** 2169 * lpfc_handle_eratt - Wrapper func for handling hba error attention 2170 * @phba: pointer to lpfc HBA data structure. 2171 * 2172 * This routine wraps the actual SLI3 or SLI4 hba error attention handling 2173 * routine from the API jump table function pointer from the lpfc_hba struct. 2174 * 2175 * Return codes 2176 * 0 - success. 2177 * Any other value - error. 2178 **/ 2179 void 2180 lpfc_handle_eratt(struct lpfc_hba *phba) 2181 { 2182 (*phba->lpfc_handle_eratt)(phba); 2183 } 2184 2185 /** 2186 * lpfc_handle_latt - The HBA link event handler 2187 * @phba: pointer to lpfc hba data structure. 2188 * 2189 * This routine is invoked from the worker thread to handle a HBA host 2190 * attention link event. SLI3 only. 2191 **/ 2192 void 2193 lpfc_handle_latt(struct lpfc_hba *phba) 2194 { 2195 struct lpfc_vport *vport = phba->pport; 2196 struct lpfc_sli *psli = &phba->sli; 2197 LPFC_MBOXQ_t *pmb; 2198 volatile uint32_t control; 2199 int rc = 0; 2200 2201 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 2202 if (!pmb) { 2203 rc = 1; 2204 goto lpfc_handle_latt_err_exit; 2205 } 2206 2207 rc = lpfc_mbox_rsrc_prep(phba, pmb); 2208 if (rc) { 2209 rc = 2; 2210 mempool_free(pmb, phba->mbox_mem_pool); 2211 goto lpfc_handle_latt_err_exit; 2212 } 2213 2214 /* Cleanup any outstanding ELS commands */ 2215 lpfc_els_flush_all_cmd(phba); 2216 psli->slistat.link_event++; 2217 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 2218 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 2219 pmb->vport = vport; 2220 /* Block ELS IOCBs until we have processed this mbox command */ 2221 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; 2222 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); 2223 if (rc == MBX_NOT_FINISHED) { 2224 rc = 4; 2225 goto lpfc_handle_latt_free_mbuf; 2226 } 2227 2228 /* Clear Link Attention in HA REG */ 2229 spin_lock_irq(&phba->hbalock); 2230 writel(HA_LATT, phba->HAregaddr); 2231 readl(phba->HAregaddr); /* flush */ 2232 spin_unlock_irq(&phba->hbalock); 2233 2234 return; 2235 2236 lpfc_handle_latt_free_mbuf: 2237 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; 2238 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 2239 lpfc_handle_latt_err_exit: 2240 /* Enable Link attention interrupts */ 2241 spin_lock_irq(&phba->hbalock); 2242 psli->sli_flag |= LPFC_PROCESS_LA; 2243 control = readl(phba->HCregaddr); 2244 control |= HC_LAINT_ENA; 2245 writel(control, phba->HCregaddr); 2246 readl(phba->HCregaddr); /* flush */ 2247 2248 /* Clear Link Attention in HA REG */ 2249 writel(HA_LATT, phba->HAregaddr); 2250 readl(phba->HAregaddr); /* flush */ 2251 spin_unlock_irq(&phba->hbalock); 2252 lpfc_linkdown(phba); 2253 phba->link_state = LPFC_HBA_ERROR; 2254 2255 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2256 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); 2257 2258 return; 2259 } 2260 2261 static void 2262 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex) 2263 { 2264 int i, j; 2265 2266 while (length > 0) { 2267 /* Look for Serial Number */ 2268 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) { 2269 *pindex += 2; 2270 i = vpd[*pindex]; 2271 *pindex += 1; 2272 j = 0; 2273 length -= (3+i); 2274 while (i--) { 2275 phba->SerialNumber[j++] = vpd[(*pindex)++]; 2276 if (j == 31) 2277 break; 2278 } 2279 phba->SerialNumber[j] = 0; 2280 continue; 2281 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) { 2282 phba->vpd_flag |= VPD_MODEL_DESC; 2283 *pindex += 2; 2284 i = vpd[*pindex]; 2285 *pindex += 1; 2286 j = 0; 2287 length -= (3+i); 2288 while (i--) { 2289 phba->ModelDesc[j++] = vpd[(*pindex)++]; 2290 if (j == 255) 2291 break; 2292 } 2293 phba->ModelDesc[j] = 0; 2294 continue; 2295 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) { 2296 phba->vpd_flag |= VPD_MODEL_NAME; 2297 *pindex += 2; 2298 i = vpd[*pindex]; 2299 *pindex += 1; 2300 j = 0; 2301 length -= (3+i); 2302 while (i--) { 2303 phba->ModelName[j++] = vpd[(*pindex)++]; 2304 if (j == 79) 2305 break; 2306 } 2307 phba->ModelName[j] = 0; 2308 continue; 2309 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) { 2310 phba->vpd_flag |= VPD_PROGRAM_TYPE; 2311 *pindex += 2; 2312 i = vpd[*pindex]; 2313 *pindex += 1; 2314 j = 0; 2315 length -= (3+i); 2316 while (i--) { 2317 phba->ProgramType[j++] = vpd[(*pindex)++]; 2318 if (j == 255) 2319 break; 2320 } 2321 phba->ProgramType[j] = 0; 2322 continue; 2323 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) { 2324 phba->vpd_flag |= VPD_PORT; 2325 *pindex += 2; 2326 i = vpd[*pindex]; 2327 *pindex += 1; 2328 j = 0; 2329 length -= (3 + i); 2330 while (i--) { 2331 if ((phba->sli_rev == LPFC_SLI_REV4) && 2332 (phba->sli4_hba.pport_name_sta == 2333 LPFC_SLI4_PPNAME_GET)) { 2334 j++; 2335 (*pindex)++; 2336 } else 2337 phba->Port[j++] = vpd[(*pindex)++]; 2338 if (j == 19) 2339 break; 2340 } 2341 if ((phba->sli_rev != LPFC_SLI_REV4) || 2342 (phba->sli4_hba.pport_name_sta == 2343 LPFC_SLI4_PPNAME_NON)) 2344 phba->Port[j] = 0; 2345 continue; 2346 } else { 2347 *pindex += 2; 2348 i = vpd[*pindex]; 2349 *pindex += 1; 2350 *pindex += i; 2351 length -= (3 + i); 2352 } 2353 } 2354 } 2355 2356 /** 2357 * lpfc_parse_vpd - Parse VPD (Vital Product Data) 2358 * @phba: pointer to lpfc hba data structure. 2359 * @vpd: pointer to the vital product data. 2360 * @len: length of the vital product data in bytes. 2361 * 2362 * This routine parses the Vital Product Data (VPD). The VPD is treated as 2363 * an array of characters. In this routine, the ModelName, ProgramType, and 2364 * ModelDesc, etc. fields of the phba data structure will be populated. 2365 * 2366 * Return codes 2367 * 0 - pointer to the VPD passed in is NULL 2368 * 1 - success 2369 **/ 2370 int 2371 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) 2372 { 2373 uint8_t lenlo, lenhi; 2374 int Length; 2375 int i; 2376 int finished = 0; 2377 int index = 0; 2378 2379 if (!vpd) 2380 return 0; 2381 2382 /* Vital Product */ 2383 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 2384 "0455 Vital Product Data: x%x x%x x%x x%x\n", 2385 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 2386 (uint32_t) vpd[3]); 2387 while (!finished && (index < (len - 4))) { 2388 switch (vpd[index]) { 2389 case 0x82: 2390 case 0x91: 2391 index += 1; 2392 lenlo = vpd[index]; 2393 index += 1; 2394 lenhi = vpd[index]; 2395 index += 1; 2396 i = ((((unsigned short)lenhi) << 8) + lenlo); 2397 index += i; 2398 break; 2399 case 0x90: 2400 index += 1; 2401 lenlo = vpd[index]; 2402 index += 1; 2403 lenhi = vpd[index]; 2404 index += 1; 2405 Length = ((((unsigned short)lenhi) << 8) + lenlo); 2406 if (Length > len - index) 2407 Length = len - index; 2408 2409 lpfc_fill_vpd(phba, vpd, Length, &index); 2410 finished = 0; 2411 break; 2412 case 0x78: 2413 finished = 1; 2414 break; 2415 default: 2416 index ++; 2417 break; 2418 } 2419 } 2420 2421 return(1); 2422 } 2423 2424 /** 2425 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description 2426 * @phba: pointer to lpfc hba data structure. 2427 * @mdp: pointer to the data structure to hold the derived model name. 2428 * @descp: pointer to the data structure to hold the derived description. 2429 * 2430 * This routine retrieves HBA's description based on its registered PCI device 2431 * ID. The @descp passed into this function points to an array of 256 chars. It 2432 * shall be returned with the model name, maximum speed, and the host bus type. 2433 * The @mdp passed into this function points to an array of 80 chars. When the 2434 * function returns, the @mdp will be filled with the model name. 2435 **/ 2436 static void 2437 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2438 { 2439 uint16_t sub_dev_id = phba->pcidev->subsystem_device; 2440 char *model = "<Unknown>"; 2441 int tbolt = 0; 2442 2443 switch (sub_dev_id) { 2444 case PCI_DEVICE_ID_CLRY_161E: 2445 model = "161E"; 2446 break; 2447 case PCI_DEVICE_ID_CLRY_162E: 2448 model = "162E"; 2449 break; 2450 case PCI_DEVICE_ID_CLRY_164E: 2451 model = "164E"; 2452 break; 2453 case PCI_DEVICE_ID_CLRY_161P: 2454 model = "161P"; 2455 break; 2456 case PCI_DEVICE_ID_CLRY_162P: 2457 model = "162P"; 2458 break; 2459 case PCI_DEVICE_ID_CLRY_164P: 2460 model = "164P"; 2461 break; 2462 case PCI_DEVICE_ID_CLRY_321E: 2463 model = "321E"; 2464 break; 2465 case PCI_DEVICE_ID_CLRY_322E: 2466 model = "322E"; 2467 break; 2468 case PCI_DEVICE_ID_CLRY_324E: 2469 model = "324E"; 2470 break; 2471 case PCI_DEVICE_ID_CLRY_321P: 2472 model = "321P"; 2473 break; 2474 case PCI_DEVICE_ID_CLRY_322P: 2475 model = "322P"; 2476 break; 2477 case PCI_DEVICE_ID_CLRY_324P: 2478 model = "324P"; 2479 break; 2480 case PCI_DEVICE_ID_TLFC_2XX2: 2481 model = "2XX2"; 2482 tbolt = 1; 2483 break; 2484 case PCI_DEVICE_ID_TLFC_3162: 2485 model = "3162"; 2486 tbolt = 1; 2487 break; 2488 case PCI_DEVICE_ID_TLFC_3322: 2489 model = "3322"; 2490 tbolt = 1; 2491 break; 2492 default: 2493 model = "Unknown"; 2494 break; 2495 } 2496 2497 if (mdp && mdp[0] == '\0') 2498 snprintf(mdp, 79, "%s", model); 2499 2500 if (descp && descp[0] == '\0') 2501 snprintf(descp, 255, 2502 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s", 2503 (tbolt) ? "ThunderLink FC " : "Celerity FC-", 2504 model, 2505 phba->Port); 2506 } 2507 2508 /** 2509 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description 2510 * @phba: pointer to lpfc hba data structure. 2511 * @mdp: pointer to the data structure to hold the derived model name. 2512 * @descp: pointer to the data structure to hold the derived description. 2513 * 2514 * This routine retrieves HBA's description based on its registered PCI device 2515 * ID. The @descp passed into this function points to an array of 256 chars. It 2516 * shall be returned with the model name, maximum speed, and the host bus type. 2517 * The @mdp passed into this function points to an array of 80 chars. When the 2518 * function returns, the @mdp will be filled with the model name. 2519 **/ 2520 static void 2521 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2522 { 2523 lpfc_vpd_t *vp; 2524 uint16_t dev_id = phba->pcidev->device; 2525 int max_speed; 2526 int GE = 0; 2527 int oneConnect = 0; /* default is not a oneConnect */ 2528 struct { 2529 char *name; 2530 char *bus; 2531 char *function; 2532 } m = {"<Unknown>", "", ""}; 2533 2534 if (mdp && mdp[0] != '\0' 2535 && descp && descp[0] != '\0') 2536 return; 2537 2538 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) { 2539 lpfc_get_atto_model_desc(phba, mdp, descp); 2540 return; 2541 } 2542 2543 if (phba->lmt & LMT_64Gb) 2544 max_speed = 64; 2545 else if (phba->lmt & LMT_32Gb) 2546 max_speed = 32; 2547 else if (phba->lmt & LMT_16Gb) 2548 max_speed = 16; 2549 else if (phba->lmt & LMT_10Gb) 2550 max_speed = 10; 2551 else if (phba->lmt & LMT_8Gb) 2552 max_speed = 8; 2553 else if (phba->lmt & LMT_4Gb) 2554 max_speed = 4; 2555 else if (phba->lmt & LMT_2Gb) 2556 max_speed = 2; 2557 else if (phba->lmt & LMT_1Gb) 2558 max_speed = 1; 2559 else 2560 max_speed = 0; 2561 2562 vp = &phba->vpd; 2563 2564 switch (dev_id) { 2565 case PCI_DEVICE_ID_FIREFLY: 2566 m = (typeof(m)){"LP6000", "PCI", 2567 "Obsolete, Unsupported Fibre Channel Adapter"}; 2568 break; 2569 case PCI_DEVICE_ID_SUPERFLY: 2570 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 2571 m = (typeof(m)){"LP7000", "PCI", ""}; 2572 else 2573 m = (typeof(m)){"LP7000E", "PCI", ""}; 2574 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2575 break; 2576 case PCI_DEVICE_ID_DRAGONFLY: 2577 m = (typeof(m)){"LP8000", "PCI", 2578 "Obsolete, Unsupported Fibre Channel Adapter"}; 2579 break; 2580 case PCI_DEVICE_ID_CENTAUR: 2581 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 2582 m = (typeof(m)){"LP9002", "PCI", ""}; 2583 else 2584 m = (typeof(m)){"LP9000", "PCI", ""}; 2585 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2586 break; 2587 case PCI_DEVICE_ID_RFLY: 2588 m = (typeof(m)){"LP952", "PCI", 2589 "Obsolete, Unsupported Fibre Channel Adapter"}; 2590 break; 2591 case PCI_DEVICE_ID_PEGASUS: 2592 m = (typeof(m)){"LP9802", "PCI-X", 2593 "Obsolete, Unsupported Fibre Channel Adapter"}; 2594 break; 2595 case PCI_DEVICE_ID_THOR: 2596 m = (typeof(m)){"LP10000", "PCI-X", 2597 "Obsolete, Unsupported Fibre Channel Adapter"}; 2598 break; 2599 case PCI_DEVICE_ID_VIPER: 2600 m = (typeof(m)){"LPX1000", "PCI-X", 2601 "Obsolete, Unsupported Fibre Channel Adapter"}; 2602 break; 2603 case PCI_DEVICE_ID_PFLY: 2604 m = (typeof(m)){"LP982", "PCI-X", 2605 "Obsolete, Unsupported Fibre Channel Adapter"}; 2606 break; 2607 case PCI_DEVICE_ID_TFLY: 2608 m = (typeof(m)){"LP1050", "PCI-X", 2609 "Obsolete, Unsupported Fibre Channel Adapter"}; 2610 break; 2611 case PCI_DEVICE_ID_HELIOS: 2612 m = (typeof(m)){"LP11000", "PCI-X2", 2613 "Obsolete, Unsupported Fibre Channel Adapter"}; 2614 break; 2615 case PCI_DEVICE_ID_HELIOS_SCSP: 2616 m = (typeof(m)){"LP11000-SP", "PCI-X2", 2617 "Obsolete, Unsupported Fibre Channel Adapter"}; 2618 break; 2619 case PCI_DEVICE_ID_HELIOS_DCSP: 2620 m = (typeof(m)){"LP11002-SP", "PCI-X2", 2621 "Obsolete, Unsupported Fibre Channel Adapter"}; 2622 break; 2623 case PCI_DEVICE_ID_NEPTUNE: 2624 m = (typeof(m)){"LPe1000", "PCIe", 2625 "Obsolete, Unsupported Fibre Channel Adapter"}; 2626 break; 2627 case PCI_DEVICE_ID_NEPTUNE_SCSP: 2628 m = (typeof(m)){"LPe1000-SP", "PCIe", 2629 "Obsolete, Unsupported Fibre Channel Adapter"}; 2630 break; 2631 case PCI_DEVICE_ID_NEPTUNE_DCSP: 2632 m = (typeof(m)){"LPe1002-SP", "PCIe", 2633 "Obsolete, Unsupported Fibre Channel Adapter"}; 2634 break; 2635 case PCI_DEVICE_ID_BMID: 2636 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; 2637 break; 2638 case PCI_DEVICE_ID_BSMB: 2639 m = (typeof(m)){"LP111", "PCI-X2", 2640 "Obsolete, Unsupported Fibre Channel Adapter"}; 2641 break; 2642 case PCI_DEVICE_ID_ZEPHYR: 2643 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2644 break; 2645 case PCI_DEVICE_ID_ZEPHYR_SCSP: 2646 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2647 break; 2648 case PCI_DEVICE_ID_ZEPHYR_DCSP: 2649 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; 2650 GE = 1; 2651 break; 2652 case PCI_DEVICE_ID_ZMID: 2653 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; 2654 break; 2655 case PCI_DEVICE_ID_ZSMB: 2656 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; 2657 break; 2658 case PCI_DEVICE_ID_LP101: 2659 m = (typeof(m)){"LP101", "PCI-X", 2660 "Obsolete, Unsupported Fibre Channel Adapter"}; 2661 break; 2662 case PCI_DEVICE_ID_LP10000S: 2663 m = (typeof(m)){"LP10000-S", "PCI", 2664 "Obsolete, Unsupported Fibre Channel Adapter"}; 2665 break; 2666 case PCI_DEVICE_ID_LP11000S: 2667 m = (typeof(m)){"LP11000-S", "PCI-X2", 2668 "Obsolete, Unsupported Fibre Channel Adapter"}; 2669 break; 2670 case PCI_DEVICE_ID_LPE11000S: 2671 m = (typeof(m)){"LPe11000-S", "PCIe", 2672 "Obsolete, Unsupported Fibre Channel Adapter"}; 2673 break; 2674 case PCI_DEVICE_ID_SAT: 2675 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; 2676 break; 2677 case PCI_DEVICE_ID_SAT_MID: 2678 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; 2679 break; 2680 case PCI_DEVICE_ID_SAT_SMB: 2681 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; 2682 break; 2683 case PCI_DEVICE_ID_SAT_DCSP: 2684 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; 2685 break; 2686 case PCI_DEVICE_ID_SAT_SCSP: 2687 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; 2688 break; 2689 case PCI_DEVICE_ID_SAT_S: 2690 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; 2691 break; 2692 case PCI_DEVICE_ID_PROTEUS_VF: 2693 m = (typeof(m)){"LPev12000", "PCIe IOV", 2694 "Obsolete, Unsupported Fibre Channel Adapter"}; 2695 break; 2696 case PCI_DEVICE_ID_PROTEUS_PF: 2697 m = (typeof(m)){"LPev12000", "PCIe IOV", 2698 "Obsolete, Unsupported Fibre Channel Adapter"}; 2699 break; 2700 case PCI_DEVICE_ID_PROTEUS_S: 2701 m = (typeof(m)){"LPemv12002-S", "PCIe IOV", 2702 "Obsolete, Unsupported Fibre Channel Adapter"}; 2703 break; 2704 case PCI_DEVICE_ID_TIGERSHARK: 2705 oneConnect = 1; 2706 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; 2707 break; 2708 case PCI_DEVICE_ID_TOMCAT: 2709 oneConnect = 1; 2710 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; 2711 break; 2712 case PCI_DEVICE_ID_FALCON: 2713 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", 2714 "EmulexSecure Fibre"}; 2715 break; 2716 case PCI_DEVICE_ID_BALIUS: 2717 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", 2718 "Obsolete, Unsupported Fibre Channel Adapter"}; 2719 break; 2720 case PCI_DEVICE_ID_LANCER_FC: 2721 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; 2722 break; 2723 case PCI_DEVICE_ID_LANCER_FC_VF: 2724 m = (typeof(m)){"LPe16000", "PCIe", 2725 "Obsolete, Unsupported Fibre Channel Adapter"}; 2726 break; 2727 case PCI_DEVICE_ID_LANCER_FCOE: 2728 oneConnect = 1; 2729 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; 2730 break; 2731 case PCI_DEVICE_ID_LANCER_FCOE_VF: 2732 oneConnect = 1; 2733 m = (typeof(m)){"OCe15100", "PCIe", 2734 "Obsolete, Unsupported FCoE"}; 2735 break; 2736 case PCI_DEVICE_ID_LANCER_G6_FC: 2737 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; 2738 break; 2739 case PCI_DEVICE_ID_LANCER_G7_FC: 2740 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; 2741 break; 2742 case PCI_DEVICE_ID_LANCER_G7P_FC: 2743 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"}; 2744 break; 2745 case PCI_DEVICE_ID_SKYHAWK: 2746 case PCI_DEVICE_ID_SKYHAWK_VF: 2747 oneConnect = 1; 2748 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; 2749 break; 2750 default: 2751 m = (typeof(m)){"Unknown", "", ""}; 2752 break; 2753 } 2754 2755 if (mdp && mdp[0] == '\0') 2756 snprintf(mdp, 79,"%s", m.name); 2757 /* 2758 * oneConnect hba requires special processing, they are all initiators 2759 * and we put the port number on the end 2760 */ 2761 if (descp && descp[0] == '\0') { 2762 if (oneConnect) 2763 snprintf(descp, 255, 2764 "Emulex OneConnect %s, %s Initiator %s", 2765 m.name, m.function, 2766 phba->Port); 2767 else if (max_speed == 0) 2768 snprintf(descp, 255, 2769 "Emulex %s %s %s", 2770 m.name, m.bus, m.function); 2771 else 2772 snprintf(descp, 255, 2773 "Emulex %s %d%s %s %s", 2774 m.name, max_speed, (GE) ? "GE" : "Gb", 2775 m.bus, m.function); 2776 } 2777 } 2778 2779 /** 2780 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring 2781 * @phba: pointer to lpfc hba data structure. 2782 * @pring: pointer to a IOCB ring. 2783 * @cnt: the number of IOCBs to be posted to the IOCB ring. 2784 * 2785 * This routine posts a given number of IOCBs with the associated DMA buffer 2786 * descriptors specified by the cnt argument to the given IOCB ring. 2787 * 2788 * Return codes 2789 * The number of IOCBs NOT able to be posted to the IOCB ring. 2790 **/ 2791 int 2792 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) 2793 { 2794 IOCB_t *icmd; 2795 struct lpfc_iocbq *iocb; 2796 struct lpfc_dmabuf *mp1, *mp2; 2797 2798 cnt += pring->missbufcnt; 2799 2800 /* While there are buffers to post */ 2801 while (cnt > 0) { 2802 /* Allocate buffer for command iocb */ 2803 iocb = lpfc_sli_get_iocbq(phba); 2804 if (iocb == NULL) { 2805 pring->missbufcnt = cnt; 2806 return cnt; 2807 } 2808 icmd = &iocb->iocb; 2809 2810 /* 2 buffers can be posted per command */ 2811 /* Allocate buffer to post */ 2812 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2813 if (mp1) 2814 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); 2815 if (!mp1 || !mp1->virt) { 2816 kfree(mp1); 2817 lpfc_sli_release_iocbq(phba, iocb); 2818 pring->missbufcnt = cnt; 2819 return cnt; 2820 } 2821 2822 INIT_LIST_HEAD(&mp1->list); 2823 /* Allocate buffer to post */ 2824 if (cnt > 1) { 2825 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2826 if (mp2) 2827 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 2828 &mp2->phys); 2829 if (!mp2 || !mp2->virt) { 2830 kfree(mp2); 2831 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2832 kfree(mp1); 2833 lpfc_sli_release_iocbq(phba, iocb); 2834 pring->missbufcnt = cnt; 2835 return cnt; 2836 } 2837 2838 INIT_LIST_HEAD(&mp2->list); 2839 } else { 2840 mp2 = NULL; 2841 } 2842 2843 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 2844 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 2845 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 2846 icmd->ulpBdeCount = 1; 2847 cnt--; 2848 if (mp2) { 2849 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 2850 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 2851 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 2852 cnt--; 2853 icmd->ulpBdeCount = 2; 2854 } 2855 2856 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 2857 icmd->ulpLe = 1; 2858 2859 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == 2860 IOCB_ERROR) { 2861 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2862 kfree(mp1); 2863 cnt++; 2864 if (mp2) { 2865 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 2866 kfree(mp2); 2867 cnt++; 2868 } 2869 lpfc_sli_release_iocbq(phba, iocb); 2870 pring->missbufcnt = cnt; 2871 return cnt; 2872 } 2873 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 2874 if (mp2) 2875 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 2876 } 2877 pring->missbufcnt = 0; 2878 return 0; 2879 } 2880 2881 /** 2882 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring 2883 * @phba: pointer to lpfc hba data structure. 2884 * 2885 * This routine posts initial receive IOCB buffers to the ELS ring. The 2886 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is 2887 * set to 64 IOCBs. SLI3 only. 2888 * 2889 * Return codes 2890 * 0 - success (currently always success) 2891 **/ 2892 static int 2893 lpfc_post_rcv_buf(struct lpfc_hba *phba) 2894 { 2895 struct lpfc_sli *psli = &phba->sli; 2896 2897 /* Ring 0, ELS / CT buffers */ 2898 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); 2899 /* Ring 2 - FCP no buffers needed */ 2900 2901 return 0; 2902 } 2903 2904 #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 2905 2906 /** 2907 * lpfc_sha_init - Set up initial array of hash table entries 2908 * @HashResultPointer: pointer to an array as hash table. 2909 * 2910 * This routine sets up the initial values to the array of hash table entries 2911 * for the LC HBAs. 2912 **/ 2913 static void 2914 lpfc_sha_init(uint32_t * HashResultPointer) 2915 { 2916 HashResultPointer[0] = 0x67452301; 2917 HashResultPointer[1] = 0xEFCDAB89; 2918 HashResultPointer[2] = 0x98BADCFE; 2919 HashResultPointer[3] = 0x10325476; 2920 HashResultPointer[4] = 0xC3D2E1F0; 2921 } 2922 2923 /** 2924 * lpfc_sha_iterate - Iterate initial hash table with the working hash table 2925 * @HashResultPointer: pointer to an initial/result hash table. 2926 * @HashWorkingPointer: pointer to an working hash table. 2927 * 2928 * This routine iterates an initial hash table pointed by @HashResultPointer 2929 * with the values from the working hash table pointeed by @HashWorkingPointer. 2930 * The results are putting back to the initial hash table, returned through 2931 * the @HashResultPointer as the result hash table. 2932 **/ 2933 static void 2934 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 2935 { 2936 int t; 2937 uint32_t TEMP; 2938 uint32_t A, B, C, D, E; 2939 t = 16; 2940 do { 2941 HashWorkingPointer[t] = 2942 S(1, 2943 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 2944 8] ^ 2945 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 2946 } while (++t <= 79); 2947 t = 0; 2948 A = HashResultPointer[0]; 2949 B = HashResultPointer[1]; 2950 C = HashResultPointer[2]; 2951 D = HashResultPointer[3]; 2952 E = HashResultPointer[4]; 2953 2954 do { 2955 if (t < 20) { 2956 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 2957 } else if (t < 40) { 2958 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 2959 } else if (t < 60) { 2960 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 2961 } else { 2962 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 2963 } 2964 TEMP += S(5, A) + E + HashWorkingPointer[t]; 2965 E = D; 2966 D = C; 2967 C = S(30, B); 2968 B = A; 2969 A = TEMP; 2970 } while (++t <= 79); 2971 2972 HashResultPointer[0] += A; 2973 HashResultPointer[1] += B; 2974 HashResultPointer[2] += C; 2975 HashResultPointer[3] += D; 2976 HashResultPointer[4] += E; 2977 2978 } 2979 2980 /** 2981 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA 2982 * @RandomChallenge: pointer to the entry of host challenge random number array. 2983 * @HashWorking: pointer to the entry of the working hash array. 2984 * 2985 * This routine calculates the working hash array referred by @HashWorking 2986 * from the challenge random numbers associated with the host, referred by 2987 * @RandomChallenge. The result is put into the entry of the working hash 2988 * array and returned by reference through @HashWorking. 2989 **/ 2990 static void 2991 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 2992 { 2993 *HashWorking = (*RandomChallenge ^ *HashWorking); 2994 } 2995 2996 /** 2997 * lpfc_hba_init - Perform special handling for LC HBA initialization 2998 * @phba: pointer to lpfc hba data structure. 2999 * @hbainit: pointer to an array of unsigned 32-bit integers. 3000 * 3001 * This routine performs the special handling for LC HBA initialization. 3002 **/ 3003 void 3004 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 3005 { 3006 int t; 3007 uint32_t *HashWorking; 3008 uint32_t *pwwnn = (uint32_t *) phba->wwnn; 3009 3010 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); 3011 if (!HashWorking) 3012 return; 3013 3014 HashWorking[0] = HashWorking[78] = *pwwnn++; 3015 HashWorking[1] = HashWorking[79] = *pwwnn; 3016 3017 for (t = 0; t < 7; t++) 3018 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 3019 3020 lpfc_sha_init(hbainit); 3021 lpfc_sha_iterate(hbainit, HashWorking); 3022 kfree(HashWorking); 3023 } 3024 3025 /** 3026 * lpfc_cleanup - Performs vport cleanups before deleting a vport 3027 * @vport: pointer to a virtual N_Port data structure. 3028 * 3029 * This routine performs the necessary cleanups before deleting the @vport. 3030 * It invokes the discovery state machine to perform necessary state 3031 * transitions and to release the ndlps associated with the @vport. Note, 3032 * the physical port is treated as @vport 0. 3033 **/ 3034 void 3035 lpfc_cleanup(struct lpfc_vport *vport) 3036 { 3037 struct lpfc_hba *phba = vport->phba; 3038 struct lpfc_nodelist *ndlp, *next_ndlp; 3039 int i = 0; 3040 3041 if (phba->link_state > LPFC_LINK_DOWN) 3042 lpfc_port_link_failure(vport); 3043 3044 /* Clean up VMID resources */ 3045 if (lpfc_is_vmid_enabled(phba)) 3046 lpfc_vmid_vport_cleanup(vport); 3047 3048 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 3049 if (vport->port_type != LPFC_PHYSICAL_PORT && 3050 ndlp->nlp_DID == Fabric_DID) { 3051 /* Just free up ndlp with Fabric_DID for vports */ 3052 lpfc_nlp_put(ndlp); 3053 continue; 3054 } 3055 3056 if (ndlp->nlp_DID == Fabric_Cntl_DID && 3057 ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 3058 lpfc_nlp_put(ndlp); 3059 continue; 3060 } 3061 3062 /* Fabric Ports not in UNMAPPED state are cleaned up in the 3063 * DEVICE_RM event. 3064 */ 3065 if (ndlp->nlp_type & NLP_FABRIC && 3066 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) 3067 lpfc_disc_state_machine(vport, ndlp, NULL, 3068 NLP_EVT_DEVICE_RECOVERY); 3069 3070 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) 3071 lpfc_disc_state_machine(vport, ndlp, NULL, 3072 NLP_EVT_DEVICE_RM); 3073 } 3074 3075 /* This is a special case flush to return all 3076 * IOs before entering this loop. There are 3077 * two points in the code where a flush is 3078 * avoided if the FC_UNLOADING flag is set. 3079 * one is in the multipool destroy, 3080 * (this prevents a crash) and the other is 3081 * in the nvme abort handler, ( also prevents 3082 * a crash). Both of these exceptions are 3083 * cases where the slot is still accessible. 3084 * The flush here is only when the pci slot 3085 * is offline. 3086 */ 3087 if (vport->load_flag & FC_UNLOADING && 3088 pci_channel_offline(phba->pcidev)) 3089 lpfc_sli_flush_io_rings(vport->phba); 3090 3091 /* At this point, ALL ndlp's should be gone 3092 * because of the previous NLP_EVT_DEVICE_RM. 3093 * Lets wait for this to happen, if needed. 3094 */ 3095 while (!list_empty(&vport->fc_nodes)) { 3096 if (i++ > 3000) { 3097 lpfc_printf_vlog(vport, KERN_ERR, 3098 LOG_TRACE_EVENT, 3099 "0233 Nodelist not empty\n"); 3100 list_for_each_entry_safe(ndlp, next_ndlp, 3101 &vport->fc_nodes, nlp_listp) { 3102 lpfc_printf_vlog(ndlp->vport, KERN_ERR, 3103 LOG_DISCOVERY, 3104 "0282 did:x%x ndlp:x%px " 3105 "refcnt:%d xflags x%x nflag x%x\n", 3106 ndlp->nlp_DID, (void *)ndlp, 3107 kref_read(&ndlp->kref), 3108 ndlp->fc4_xpt_flags, 3109 ndlp->nlp_flag); 3110 } 3111 break; 3112 } 3113 3114 /* Wait for any activity on ndlps to settle */ 3115 msleep(10); 3116 } 3117 lpfc_cleanup_vports_rrqs(vport, NULL); 3118 } 3119 3120 /** 3121 * lpfc_stop_vport_timers - Stop all the timers associated with a vport 3122 * @vport: pointer to a virtual N_Port data structure. 3123 * 3124 * This routine stops all the timers associated with a @vport. This function 3125 * is invoked before disabling or deleting a @vport. Note that the physical 3126 * port is treated as @vport 0. 3127 **/ 3128 void 3129 lpfc_stop_vport_timers(struct lpfc_vport *vport) 3130 { 3131 del_timer_sync(&vport->els_tmofunc); 3132 del_timer_sync(&vport->delayed_disc_tmo); 3133 lpfc_can_disctmo(vport); 3134 return; 3135 } 3136 3137 /** 3138 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3139 * @phba: pointer to lpfc hba data structure. 3140 * 3141 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The 3142 * caller of this routine should already hold the host lock. 3143 **/ 3144 void 3145 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3146 { 3147 /* Clear pending FCF rediscovery wait flag */ 3148 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 3149 3150 /* Now, try to stop the timer */ 3151 del_timer(&phba->fcf.redisc_wait); 3152 } 3153 3154 /** 3155 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3156 * @phba: pointer to lpfc hba data structure. 3157 * 3158 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It 3159 * checks whether the FCF rediscovery wait timer is pending with the host 3160 * lock held before proceeding with disabling the timer and clearing the 3161 * wait timer pendig flag. 3162 **/ 3163 void 3164 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3165 { 3166 spin_lock_irq(&phba->hbalock); 3167 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 3168 /* FCF rediscovery timer already fired or stopped */ 3169 spin_unlock_irq(&phba->hbalock); 3170 return; 3171 } 3172 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3173 /* Clear failover in progress flags */ 3174 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); 3175 spin_unlock_irq(&phba->hbalock); 3176 } 3177 3178 /** 3179 * lpfc_cmf_stop - Stop CMF processing 3180 * @phba: pointer to lpfc hba data structure. 3181 * 3182 * This is called when the link goes down or if CMF mode is turned OFF. 3183 * It is also called when going offline or unloaded just before the 3184 * congestion info buffer is unregistered. 3185 **/ 3186 void 3187 lpfc_cmf_stop(struct lpfc_hba *phba) 3188 { 3189 int cpu; 3190 struct lpfc_cgn_stat *cgs; 3191 3192 /* We only do something if CMF is enabled */ 3193 if (!phba->sli4_hba.pc_sli4_params.cmf) 3194 return; 3195 3196 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3197 "6221 Stop CMF / Cancel Timer\n"); 3198 3199 /* Cancel the CMF timer */ 3200 hrtimer_cancel(&phba->cmf_timer); 3201 3202 /* Zero CMF counters */ 3203 atomic_set(&phba->cmf_busy, 0); 3204 for_each_present_cpu(cpu) { 3205 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3206 atomic64_set(&cgs->total_bytes, 0); 3207 atomic64_set(&cgs->rcv_bytes, 0); 3208 atomic_set(&cgs->rx_io_cnt, 0); 3209 atomic64_set(&cgs->rx_latency, 0); 3210 } 3211 atomic_set(&phba->cmf_bw_wait, 0); 3212 3213 /* Resume any blocked IO - Queue unblock on workqueue */ 3214 queue_work(phba->wq, &phba->unblock_request_work); 3215 } 3216 3217 static inline uint64_t 3218 lpfc_get_max_line_rate(struct lpfc_hba *phba) 3219 { 3220 uint64_t rate = lpfc_sli_port_speed_get(phba); 3221 3222 return ((((unsigned long)rate) * 1024 * 1024) / 10); 3223 } 3224 3225 void 3226 lpfc_cmf_signal_init(struct lpfc_hba *phba) 3227 { 3228 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3229 "6223 Signal CMF init\n"); 3230 3231 /* Use the new fc_linkspeed to recalculate */ 3232 phba->cmf_interval_rate = LPFC_CMF_INTERVAL; 3233 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba); 3234 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 3235 phba->cmf_interval_rate, 1000); 3236 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; 3237 3238 /* This is a signal to firmware to sync up CMF BW with link speed */ 3239 lpfc_issue_cmf_sync_wqe(phba, 0, 0); 3240 } 3241 3242 /** 3243 * lpfc_cmf_start - Start CMF processing 3244 * @phba: pointer to lpfc hba data structure. 3245 * 3246 * This is called when the link comes up or if CMF mode is turned OFF 3247 * to Monitor or Managed. 3248 **/ 3249 void 3250 lpfc_cmf_start(struct lpfc_hba *phba) 3251 { 3252 struct lpfc_cgn_stat *cgs; 3253 int cpu; 3254 3255 /* We only do something if CMF is enabled */ 3256 if (!phba->sli4_hba.pc_sli4_params.cmf || 3257 phba->cmf_active_mode == LPFC_CFG_OFF) 3258 return; 3259 3260 /* Reinitialize congestion buffer info */ 3261 lpfc_init_congestion_buf(phba); 3262 3263 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 3264 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 3265 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 3266 atomic_set(&phba->cgn_sync_warn_cnt, 0); 3267 3268 atomic_set(&phba->cmf_busy, 0); 3269 for_each_present_cpu(cpu) { 3270 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3271 atomic64_set(&cgs->total_bytes, 0); 3272 atomic64_set(&cgs->rcv_bytes, 0); 3273 atomic_set(&cgs->rx_io_cnt, 0); 3274 atomic64_set(&cgs->rx_latency, 0); 3275 } 3276 phba->cmf_latency.tv_sec = 0; 3277 phba->cmf_latency.tv_nsec = 0; 3278 3279 lpfc_cmf_signal_init(phba); 3280 3281 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3282 "6222 Start CMF / Timer\n"); 3283 3284 phba->cmf_timer_cnt = 0; 3285 hrtimer_start(&phba->cmf_timer, 3286 ktime_set(0, LPFC_CMF_INTERVAL * 1000000), 3287 HRTIMER_MODE_REL); 3288 /* Setup for latency check in IO cmpl routines */ 3289 ktime_get_real_ts64(&phba->cmf_latency); 3290 3291 atomic_set(&phba->cmf_bw_wait, 0); 3292 atomic_set(&phba->cmf_stop_io, 0); 3293 } 3294 3295 /** 3296 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA 3297 * @phba: pointer to lpfc hba data structure. 3298 * 3299 * This routine stops all the timers associated with a HBA. This function is 3300 * invoked before either putting a HBA offline or unloading the driver. 3301 **/ 3302 void 3303 lpfc_stop_hba_timers(struct lpfc_hba *phba) 3304 { 3305 if (phba->pport) 3306 lpfc_stop_vport_timers(phba->pport); 3307 cancel_delayed_work_sync(&phba->eq_delay_work); 3308 cancel_delayed_work_sync(&phba->idle_stat_delay_work); 3309 del_timer_sync(&phba->sli.mbox_tmo); 3310 del_timer_sync(&phba->fabric_block_timer); 3311 del_timer_sync(&phba->eratt_poll); 3312 del_timer_sync(&phba->hb_tmofunc); 3313 if (phba->sli_rev == LPFC_SLI_REV4) { 3314 del_timer_sync(&phba->rrq_tmr); 3315 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 3316 } 3317 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 3318 3319 switch (phba->pci_dev_grp) { 3320 case LPFC_PCI_DEV_LP: 3321 /* Stop any LightPulse device specific driver timers */ 3322 del_timer_sync(&phba->fcp_poll_timer); 3323 break; 3324 case LPFC_PCI_DEV_OC: 3325 /* Stop any OneConnect device specific driver timers */ 3326 lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3327 break; 3328 default: 3329 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3330 "0297 Invalid device group (x%x)\n", 3331 phba->pci_dev_grp); 3332 break; 3333 } 3334 return; 3335 } 3336 3337 /** 3338 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked 3339 * @phba: pointer to lpfc hba data structure. 3340 * @mbx_action: flag for mailbox no wait action. 3341 * 3342 * This routine marks a HBA's management interface as blocked. Once the HBA's 3343 * management interface is marked as blocked, all the user space access to 3344 * the HBA, whether they are from sysfs interface or libdfc interface will 3345 * all be blocked. The HBA is set to block the management interface when the 3346 * driver prepares the HBA interface for online or offline. 3347 **/ 3348 static void 3349 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) 3350 { 3351 unsigned long iflag; 3352 uint8_t actcmd = MBX_HEARTBEAT; 3353 unsigned long timeout; 3354 3355 spin_lock_irqsave(&phba->hbalock, iflag); 3356 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; 3357 spin_unlock_irqrestore(&phba->hbalock, iflag); 3358 if (mbx_action == LPFC_MBX_NO_WAIT) 3359 return; 3360 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; 3361 spin_lock_irqsave(&phba->hbalock, iflag); 3362 if (phba->sli.mbox_active) { 3363 actcmd = phba->sli.mbox_active->u.mb.mbxCommand; 3364 /* Determine how long we might wait for the active mailbox 3365 * command to be gracefully completed by firmware. 3366 */ 3367 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, 3368 phba->sli.mbox_active) * 1000) + jiffies; 3369 } 3370 spin_unlock_irqrestore(&phba->hbalock, iflag); 3371 3372 /* Wait for the outstnading mailbox command to complete */ 3373 while (phba->sli.mbox_active) { 3374 /* Check active mailbox complete status every 2ms */ 3375 msleep(2); 3376 if (time_after(jiffies, timeout)) { 3377 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3378 "2813 Mgmt IO is Blocked %x " 3379 "- mbox cmd %x still active\n", 3380 phba->sli.sli_flag, actcmd); 3381 break; 3382 } 3383 } 3384 } 3385 3386 /** 3387 * lpfc_sli4_node_prep - Assign RPIs for active nodes. 3388 * @phba: pointer to lpfc hba data structure. 3389 * 3390 * Allocate RPIs for all active remote nodes. This is needed whenever 3391 * an SLI4 adapter is reset and the driver is not unloading. Its purpose 3392 * is to fixup the temporary rpi assignments. 3393 **/ 3394 void 3395 lpfc_sli4_node_prep(struct lpfc_hba *phba) 3396 { 3397 struct lpfc_nodelist *ndlp, *next_ndlp; 3398 struct lpfc_vport **vports; 3399 int i, rpi; 3400 3401 if (phba->sli_rev != LPFC_SLI_REV4) 3402 return; 3403 3404 vports = lpfc_create_vport_work_array(phba); 3405 if (vports == NULL) 3406 return; 3407 3408 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3409 if (vports[i]->load_flag & FC_UNLOADING) 3410 continue; 3411 3412 list_for_each_entry_safe(ndlp, next_ndlp, 3413 &vports[i]->fc_nodes, 3414 nlp_listp) { 3415 rpi = lpfc_sli4_alloc_rpi(phba); 3416 if (rpi == LPFC_RPI_ALLOC_ERROR) { 3417 /* TODO print log? */ 3418 continue; 3419 } 3420 ndlp->nlp_rpi = rpi; 3421 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 3422 LOG_NODE | LOG_DISCOVERY, 3423 "0009 Assign RPI x%x to ndlp x%px " 3424 "DID:x%06x flg:x%x\n", 3425 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, 3426 ndlp->nlp_flag); 3427 } 3428 } 3429 lpfc_destroy_vport_work_array(phba, vports); 3430 } 3431 3432 /** 3433 * lpfc_create_expedite_pool - create expedite pool 3434 * @phba: pointer to lpfc hba data structure. 3435 * 3436 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 3437 * to expedite pool. Mark them as expedite. 3438 **/ 3439 static void lpfc_create_expedite_pool(struct lpfc_hba *phba) 3440 { 3441 struct lpfc_sli4_hdw_queue *qp; 3442 struct lpfc_io_buf *lpfc_ncmd; 3443 struct lpfc_io_buf *lpfc_ncmd_next; 3444 struct lpfc_epd_pool *epd_pool; 3445 unsigned long iflag; 3446 3447 epd_pool = &phba->epd_pool; 3448 qp = &phba->sli4_hba.hdwq[0]; 3449 3450 spin_lock_init(&epd_pool->lock); 3451 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3452 spin_lock(&epd_pool->lock); 3453 INIT_LIST_HEAD(&epd_pool->list); 3454 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3455 &qp->lpfc_io_buf_list_put, list) { 3456 list_move_tail(&lpfc_ncmd->list, &epd_pool->list); 3457 lpfc_ncmd->expedite = true; 3458 qp->put_io_bufs--; 3459 epd_pool->count++; 3460 if (epd_pool->count >= XRI_BATCH) 3461 break; 3462 } 3463 spin_unlock(&epd_pool->lock); 3464 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3465 } 3466 3467 /** 3468 * lpfc_destroy_expedite_pool - destroy expedite pool 3469 * @phba: pointer to lpfc hba data structure. 3470 * 3471 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put 3472 * of HWQ 0. Clear the mark. 3473 **/ 3474 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) 3475 { 3476 struct lpfc_sli4_hdw_queue *qp; 3477 struct lpfc_io_buf *lpfc_ncmd; 3478 struct lpfc_io_buf *lpfc_ncmd_next; 3479 struct lpfc_epd_pool *epd_pool; 3480 unsigned long iflag; 3481 3482 epd_pool = &phba->epd_pool; 3483 qp = &phba->sli4_hba.hdwq[0]; 3484 3485 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3486 spin_lock(&epd_pool->lock); 3487 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3488 &epd_pool->list, list) { 3489 list_move_tail(&lpfc_ncmd->list, 3490 &qp->lpfc_io_buf_list_put); 3491 lpfc_ncmd->flags = false; 3492 qp->put_io_bufs++; 3493 epd_pool->count--; 3494 } 3495 spin_unlock(&epd_pool->lock); 3496 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3497 } 3498 3499 /** 3500 * lpfc_create_multixri_pools - create multi-XRI pools 3501 * @phba: pointer to lpfc hba data structure. 3502 * 3503 * This routine initialize public, private per HWQ. Then, move XRIs from 3504 * lpfc_io_buf_list_put to public pool. High and low watermark are also 3505 * Initialized. 3506 **/ 3507 void lpfc_create_multixri_pools(struct lpfc_hba *phba) 3508 { 3509 u32 i, j; 3510 u32 hwq_count; 3511 u32 count_per_hwq; 3512 struct lpfc_io_buf *lpfc_ncmd; 3513 struct lpfc_io_buf *lpfc_ncmd_next; 3514 unsigned long iflag; 3515 struct lpfc_sli4_hdw_queue *qp; 3516 struct lpfc_multixri_pool *multixri_pool; 3517 struct lpfc_pbl_pool *pbl_pool; 3518 struct lpfc_pvt_pool *pvt_pool; 3519 3520 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3521 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", 3522 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, 3523 phba->sli4_hba.io_xri_cnt); 3524 3525 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3526 lpfc_create_expedite_pool(phba); 3527 3528 hwq_count = phba->cfg_hdw_queue; 3529 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; 3530 3531 for (i = 0; i < hwq_count; i++) { 3532 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); 3533 3534 if (!multixri_pool) { 3535 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3536 "1238 Failed to allocate memory for " 3537 "multixri_pool\n"); 3538 3539 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3540 lpfc_destroy_expedite_pool(phba); 3541 3542 j = 0; 3543 while (j < i) { 3544 qp = &phba->sli4_hba.hdwq[j]; 3545 kfree(qp->p_multixri_pool); 3546 j++; 3547 } 3548 phba->cfg_xri_rebalancing = 0; 3549 return; 3550 } 3551 3552 qp = &phba->sli4_hba.hdwq[i]; 3553 qp->p_multixri_pool = multixri_pool; 3554 3555 multixri_pool->xri_limit = count_per_hwq; 3556 multixri_pool->rrb_next_hwqid = i; 3557 3558 /* Deal with public free xri pool */ 3559 pbl_pool = &multixri_pool->pbl_pool; 3560 spin_lock_init(&pbl_pool->lock); 3561 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3562 spin_lock(&pbl_pool->lock); 3563 INIT_LIST_HEAD(&pbl_pool->list); 3564 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3565 &qp->lpfc_io_buf_list_put, list) { 3566 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); 3567 qp->put_io_bufs--; 3568 pbl_pool->count++; 3569 } 3570 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3571 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", 3572 pbl_pool->count, i); 3573 spin_unlock(&pbl_pool->lock); 3574 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3575 3576 /* Deal with private free xri pool */ 3577 pvt_pool = &multixri_pool->pvt_pool; 3578 pvt_pool->high_watermark = multixri_pool->xri_limit / 2; 3579 pvt_pool->low_watermark = XRI_BATCH; 3580 spin_lock_init(&pvt_pool->lock); 3581 spin_lock_irqsave(&pvt_pool->lock, iflag); 3582 INIT_LIST_HEAD(&pvt_pool->list); 3583 pvt_pool->count = 0; 3584 spin_unlock_irqrestore(&pvt_pool->lock, iflag); 3585 } 3586 } 3587 3588 /** 3589 * lpfc_destroy_multixri_pools - destroy multi-XRI pools 3590 * @phba: pointer to lpfc hba data structure. 3591 * 3592 * This routine returns XRIs from public/private to lpfc_io_buf_list_put. 3593 **/ 3594 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) 3595 { 3596 u32 i; 3597 u32 hwq_count; 3598 struct lpfc_io_buf *lpfc_ncmd; 3599 struct lpfc_io_buf *lpfc_ncmd_next; 3600 unsigned long iflag; 3601 struct lpfc_sli4_hdw_queue *qp; 3602 struct lpfc_multixri_pool *multixri_pool; 3603 struct lpfc_pbl_pool *pbl_pool; 3604 struct lpfc_pvt_pool *pvt_pool; 3605 3606 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3607 lpfc_destroy_expedite_pool(phba); 3608 3609 if (!(phba->pport->load_flag & FC_UNLOADING)) 3610 lpfc_sli_flush_io_rings(phba); 3611 3612 hwq_count = phba->cfg_hdw_queue; 3613 3614 for (i = 0; i < hwq_count; i++) { 3615 qp = &phba->sli4_hba.hdwq[i]; 3616 multixri_pool = qp->p_multixri_pool; 3617 if (!multixri_pool) 3618 continue; 3619 3620 qp->p_multixri_pool = NULL; 3621 3622 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3623 3624 /* Deal with public free xri pool */ 3625 pbl_pool = &multixri_pool->pbl_pool; 3626 spin_lock(&pbl_pool->lock); 3627 3628 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3629 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", 3630 pbl_pool->count, i); 3631 3632 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3633 &pbl_pool->list, list) { 3634 list_move_tail(&lpfc_ncmd->list, 3635 &qp->lpfc_io_buf_list_put); 3636 qp->put_io_bufs++; 3637 pbl_pool->count--; 3638 } 3639 3640 INIT_LIST_HEAD(&pbl_pool->list); 3641 pbl_pool->count = 0; 3642 3643 spin_unlock(&pbl_pool->lock); 3644 3645 /* Deal with private free xri pool */ 3646 pvt_pool = &multixri_pool->pvt_pool; 3647 spin_lock(&pvt_pool->lock); 3648 3649 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3650 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", 3651 pvt_pool->count, i); 3652 3653 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3654 &pvt_pool->list, list) { 3655 list_move_tail(&lpfc_ncmd->list, 3656 &qp->lpfc_io_buf_list_put); 3657 qp->put_io_bufs++; 3658 pvt_pool->count--; 3659 } 3660 3661 INIT_LIST_HEAD(&pvt_pool->list); 3662 pvt_pool->count = 0; 3663 3664 spin_unlock(&pvt_pool->lock); 3665 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3666 3667 kfree(multixri_pool); 3668 } 3669 } 3670 3671 /** 3672 * lpfc_online - Initialize and bring a HBA online 3673 * @phba: pointer to lpfc hba data structure. 3674 * 3675 * This routine initializes the HBA and brings a HBA online. During this 3676 * process, the management interface is blocked to prevent user space access 3677 * to the HBA interfering with the driver initialization. 3678 * 3679 * Return codes 3680 * 0 - successful 3681 * 1 - failed 3682 **/ 3683 int 3684 lpfc_online(struct lpfc_hba *phba) 3685 { 3686 struct lpfc_vport *vport; 3687 struct lpfc_vport **vports; 3688 int i, error = 0; 3689 bool vpis_cleared = false; 3690 3691 if (!phba) 3692 return 0; 3693 vport = phba->pport; 3694 3695 if (!(vport->fc_flag & FC_OFFLINE_MODE)) 3696 return 0; 3697 3698 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3699 "0458 Bring Adapter online\n"); 3700 3701 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 3702 3703 if (phba->sli_rev == LPFC_SLI_REV4) { 3704 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ 3705 lpfc_unblock_mgmt_io(phba); 3706 return 1; 3707 } 3708 spin_lock_irq(&phba->hbalock); 3709 if (!phba->sli4_hba.max_cfg_param.vpi_used) 3710 vpis_cleared = true; 3711 spin_unlock_irq(&phba->hbalock); 3712 3713 /* Reestablish the local initiator port. 3714 * The offline process destroyed the previous lport. 3715 */ 3716 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && 3717 !phba->nvmet_support) { 3718 error = lpfc_nvme_create_localport(phba->pport); 3719 if (error) 3720 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3721 "6132 NVME restore reg failed " 3722 "on nvmei error x%x\n", error); 3723 } 3724 } else { 3725 lpfc_sli_queue_init(phba); 3726 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ 3727 lpfc_unblock_mgmt_io(phba); 3728 return 1; 3729 } 3730 } 3731 3732 vports = lpfc_create_vport_work_array(phba); 3733 if (vports != NULL) { 3734 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3735 struct Scsi_Host *shost; 3736 shost = lpfc_shost_from_vport(vports[i]); 3737 spin_lock_irq(shost->host_lock); 3738 vports[i]->fc_flag &= ~FC_OFFLINE_MODE; 3739 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) 3740 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3741 if (phba->sli_rev == LPFC_SLI_REV4) { 3742 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 3743 if ((vpis_cleared) && 3744 (vports[i]->port_type != 3745 LPFC_PHYSICAL_PORT)) 3746 vports[i]->vpi = 0; 3747 } 3748 spin_unlock_irq(shost->host_lock); 3749 } 3750 } 3751 lpfc_destroy_vport_work_array(phba, vports); 3752 3753 if (phba->cfg_xri_rebalancing) 3754 lpfc_create_multixri_pools(phba); 3755 3756 lpfc_cpuhp_add(phba); 3757 3758 lpfc_unblock_mgmt_io(phba); 3759 return 0; 3760 } 3761 3762 /** 3763 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked 3764 * @phba: pointer to lpfc hba data structure. 3765 * 3766 * This routine marks a HBA's management interface as not blocked. Once the 3767 * HBA's management interface is marked as not blocked, all the user space 3768 * access to the HBA, whether they are from sysfs interface or libdfc 3769 * interface will be allowed. The HBA is set to block the management interface 3770 * when the driver prepares the HBA interface for online or offline and then 3771 * set to unblock the management interface afterwards. 3772 **/ 3773 void 3774 lpfc_unblock_mgmt_io(struct lpfc_hba * phba) 3775 { 3776 unsigned long iflag; 3777 3778 spin_lock_irqsave(&phba->hbalock, iflag); 3779 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; 3780 spin_unlock_irqrestore(&phba->hbalock, iflag); 3781 } 3782 3783 /** 3784 * lpfc_offline_prep - Prepare a HBA to be brought offline 3785 * @phba: pointer to lpfc hba data structure. 3786 * @mbx_action: flag for mailbox shutdown action. 3787 * 3788 * This routine is invoked to prepare a HBA to be brought offline. It performs 3789 * unregistration login to all the nodes on all vports and flushes the mailbox 3790 * queue to make it ready to be brought offline. 3791 **/ 3792 void 3793 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) 3794 { 3795 struct lpfc_vport *vport = phba->pport; 3796 struct lpfc_nodelist *ndlp, *next_ndlp; 3797 struct lpfc_vport **vports; 3798 struct Scsi_Host *shost; 3799 int i; 3800 int offline; 3801 bool hba_pci_err; 3802 3803 if (vport->fc_flag & FC_OFFLINE_MODE) 3804 return; 3805 3806 lpfc_block_mgmt_io(phba, mbx_action); 3807 3808 lpfc_linkdown(phba); 3809 3810 offline = pci_channel_offline(phba->pcidev); 3811 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags); 3812 3813 /* Issue an unreg_login to all nodes on all vports */ 3814 vports = lpfc_create_vport_work_array(phba); 3815 if (vports != NULL) { 3816 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3817 if (vports[i]->load_flag & FC_UNLOADING) 3818 continue; 3819 shost = lpfc_shost_from_vport(vports[i]); 3820 spin_lock_irq(shost->host_lock); 3821 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 3822 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3823 vports[i]->fc_flag &= ~FC_VFI_REGISTERED; 3824 spin_unlock_irq(shost->host_lock); 3825 3826 shost = lpfc_shost_from_vport(vports[i]); 3827 list_for_each_entry_safe(ndlp, next_ndlp, 3828 &vports[i]->fc_nodes, 3829 nlp_listp) { 3830 3831 spin_lock_irq(&ndlp->lock); 3832 ndlp->nlp_flag &= ~NLP_NPR_ADISC; 3833 spin_unlock_irq(&ndlp->lock); 3834 3835 if (offline || hba_pci_err) { 3836 spin_lock_irq(&ndlp->lock); 3837 ndlp->nlp_flag &= ~(NLP_UNREG_INP | 3838 NLP_RPI_REGISTERED); 3839 spin_unlock_irq(&ndlp->lock); 3840 if (phba->sli_rev == LPFC_SLI_REV4) 3841 lpfc_sli_rpi_release(vports[i], 3842 ndlp); 3843 } else { 3844 lpfc_unreg_rpi(vports[i], ndlp); 3845 } 3846 /* 3847 * Whenever an SLI4 port goes offline, free the 3848 * RPI. Get a new RPI when the adapter port 3849 * comes back online. 3850 */ 3851 if (phba->sli_rev == LPFC_SLI_REV4) { 3852 lpfc_printf_vlog(vports[i], KERN_INFO, 3853 LOG_NODE | LOG_DISCOVERY, 3854 "0011 Free RPI x%x on " 3855 "ndlp: x%px did x%x\n", 3856 ndlp->nlp_rpi, ndlp, 3857 ndlp->nlp_DID); 3858 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); 3859 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; 3860 } 3861 3862 if (ndlp->nlp_type & NLP_FABRIC) { 3863 lpfc_disc_state_machine(vports[i], ndlp, 3864 NULL, NLP_EVT_DEVICE_RECOVERY); 3865 3866 /* Don't remove the node unless the node 3867 * has been unregistered with the 3868 * transport, and we're not in recovery 3869 * before dev_loss_tmo triggered. 3870 * Otherwise, let dev_loss take care of 3871 * the node. 3872 */ 3873 if (!(ndlp->save_flags & 3874 NLP_IN_RECOV_POST_DEV_LOSS) && 3875 !(ndlp->fc4_xpt_flags & 3876 (NVME_XPT_REGD | SCSI_XPT_REGD))) 3877 lpfc_disc_state_machine 3878 (vports[i], ndlp, 3879 NULL, 3880 NLP_EVT_DEVICE_RM); 3881 } 3882 } 3883 } 3884 } 3885 lpfc_destroy_vport_work_array(phba, vports); 3886 3887 lpfc_sli_mbox_sys_shutdown(phba, mbx_action); 3888 3889 if (phba->wq) 3890 flush_workqueue(phba->wq); 3891 } 3892 3893 /** 3894 * lpfc_offline - Bring a HBA offline 3895 * @phba: pointer to lpfc hba data structure. 3896 * 3897 * This routine actually brings a HBA offline. It stops all the timers 3898 * associated with the HBA, brings down the SLI layer, and eventually 3899 * marks the HBA as in offline state for the upper layer protocol. 3900 **/ 3901 void 3902 lpfc_offline(struct lpfc_hba *phba) 3903 { 3904 struct Scsi_Host *shost; 3905 struct lpfc_vport **vports; 3906 int i; 3907 3908 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3909 return; 3910 3911 /* stop port and all timers associated with this hba */ 3912 lpfc_stop_port(phba); 3913 3914 /* Tear down the local and target port registrations. The 3915 * nvme transports need to cleanup. 3916 */ 3917 lpfc_nvmet_destroy_targetport(phba); 3918 lpfc_nvme_destroy_localport(phba->pport); 3919 3920 vports = lpfc_create_vport_work_array(phba); 3921 if (vports != NULL) 3922 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 3923 lpfc_stop_vport_timers(vports[i]); 3924 lpfc_destroy_vport_work_array(phba, vports); 3925 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3926 "0460 Bring Adapter offline\n"); 3927 /* Bring down the SLI Layer and cleanup. The HBA is offline 3928 now. */ 3929 lpfc_sli_hba_down(phba); 3930 spin_lock_irq(&phba->hbalock); 3931 phba->work_ha = 0; 3932 spin_unlock_irq(&phba->hbalock); 3933 vports = lpfc_create_vport_work_array(phba); 3934 if (vports != NULL) 3935 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3936 shost = lpfc_shost_from_vport(vports[i]); 3937 spin_lock_irq(shost->host_lock); 3938 vports[i]->work_port_events = 0; 3939 vports[i]->fc_flag |= FC_OFFLINE_MODE; 3940 spin_unlock_irq(shost->host_lock); 3941 } 3942 lpfc_destroy_vport_work_array(phba, vports); 3943 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled 3944 * in hba_unset 3945 */ 3946 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3947 __lpfc_cpuhp_remove(phba); 3948 3949 if (phba->cfg_xri_rebalancing) 3950 lpfc_destroy_multixri_pools(phba); 3951 } 3952 3953 /** 3954 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists 3955 * @phba: pointer to lpfc hba data structure. 3956 * 3957 * This routine is to free all the SCSI buffers and IOCBs from the driver 3958 * list back to kernel. It is called from lpfc_pci_remove_one to free 3959 * the internal resources before the device is removed from the system. 3960 **/ 3961 static void 3962 lpfc_scsi_free(struct lpfc_hba *phba) 3963 { 3964 struct lpfc_io_buf *sb, *sb_next; 3965 3966 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 3967 return; 3968 3969 spin_lock_irq(&phba->hbalock); 3970 3971 /* Release all the lpfc_scsi_bufs maintained by this host. */ 3972 3973 spin_lock(&phba->scsi_buf_list_put_lock); 3974 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, 3975 list) { 3976 list_del(&sb->list); 3977 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3978 sb->dma_handle); 3979 kfree(sb); 3980 phba->total_scsi_bufs--; 3981 } 3982 spin_unlock(&phba->scsi_buf_list_put_lock); 3983 3984 spin_lock(&phba->scsi_buf_list_get_lock); 3985 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, 3986 list) { 3987 list_del(&sb->list); 3988 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3989 sb->dma_handle); 3990 kfree(sb); 3991 phba->total_scsi_bufs--; 3992 } 3993 spin_unlock(&phba->scsi_buf_list_get_lock); 3994 spin_unlock_irq(&phba->hbalock); 3995 } 3996 3997 /** 3998 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists 3999 * @phba: pointer to lpfc hba data structure. 4000 * 4001 * This routine is to free all the IO buffers and IOCBs from the driver 4002 * list back to kernel. It is called from lpfc_pci_remove_one to free 4003 * the internal resources before the device is removed from the system. 4004 **/ 4005 void 4006 lpfc_io_free(struct lpfc_hba *phba) 4007 { 4008 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; 4009 struct lpfc_sli4_hdw_queue *qp; 4010 int idx; 4011 4012 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4013 qp = &phba->sli4_hba.hdwq[idx]; 4014 /* Release all the lpfc_nvme_bufs maintained by this host. */ 4015 spin_lock(&qp->io_buf_list_put_lock); 4016 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4017 &qp->lpfc_io_buf_list_put, 4018 list) { 4019 list_del(&lpfc_ncmd->list); 4020 qp->put_io_bufs--; 4021 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4022 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4023 if (phba->cfg_xpsgl && !phba->nvmet_support) 4024 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4025 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4026 kfree(lpfc_ncmd); 4027 qp->total_io_bufs--; 4028 } 4029 spin_unlock(&qp->io_buf_list_put_lock); 4030 4031 spin_lock(&qp->io_buf_list_get_lock); 4032 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4033 &qp->lpfc_io_buf_list_get, 4034 list) { 4035 list_del(&lpfc_ncmd->list); 4036 qp->get_io_bufs--; 4037 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4038 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4039 if (phba->cfg_xpsgl && !phba->nvmet_support) 4040 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4041 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4042 kfree(lpfc_ncmd); 4043 qp->total_io_bufs--; 4044 } 4045 spin_unlock(&qp->io_buf_list_get_lock); 4046 } 4047 } 4048 4049 /** 4050 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping 4051 * @phba: pointer to lpfc hba data structure. 4052 * 4053 * This routine first calculates the sizes of the current els and allocated 4054 * scsi sgl lists, and then goes through all sgls to updates the physical 4055 * XRIs assigned due to port function reset. During port initialization, the 4056 * current els and allocated scsi sgl lists are 0s. 4057 * 4058 * Return codes 4059 * 0 - successful (for now, it always returns 0) 4060 **/ 4061 int 4062 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) 4063 { 4064 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4065 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4066 LIST_HEAD(els_sgl_list); 4067 int rc; 4068 4069 /* 4070 * update on pci function's els xri-sgl list 4071 */ 4072 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4073 4074 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { 4075 /* els xri-sgl expanded */ 4076 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; 4077 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4078 "3157 ELS xri-sgl count increased from " 4079 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4080 els_xri_cnt); 4081 /* allocate the additional els sgls */ 4082 for (i = 0; i < xri_cnt; i++) { 4083 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4084 GFP_KERNEL); 4085 if (sglq_entry == NULL) { 4086 lpfc_printf_log(phba, KERN_ERR, 4087 LOG_TRACE_EVENT, 4088 "2562 Failure to allocate an " 4089 "ELS sgl entry:%d\n", i); 4090 rc = -ENOMEM; 4091 goto out_free_mem; 4092 } 4093 sglq_entry->buff_type = GEN_BUFF_TYPE; 4094 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, 4095 &sglq_entry->phys); 4096 if (sglq_entry->virt == NULL) { 4097 kfree(sglq_entry); 4098 lpfc_printf_log(phba, KERN_ERR, 4099 LOG_TRACE_EVENT, 4100 "2563 Failure to allocate an " 4101 "ELS mbuf:%d\n", i); 4102 rc = -ENOMEM; 4103 goto out_free_mem; 4104 } 4105 sglq_entry->sgl = sglq_entry->virt; 4106 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); 4107 sglq_entry->state = SGL_FREED; 4108 list_add_tail(&sglq_entry->list, &els_sgl_list); 4109 } 4110 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4111 list_splice_init(&els_sgl_list, 4112 &phba->sli4_hba.lpfc_els_sgl_list); 4113 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4114 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { 4115 /* els xri-sgl shrinked */ 4116 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; 4117 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4118 "3158 ELS xri-sgl count decreased from " 4119 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4120 els_xri_cnt); 4121 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4122 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, 4123 &els_sgl_list); 4124 /* release extra els sgls from list */ 4125 for (i = 0; i < xri_cnt; i++) { 4126 list_remove_head(&els_sgl_list, 4127 sglq_entry, struct lpfc_sglq, list); 4128 if (sglq_entry) { 4129 __lpfc_mbuf_free(phba, sglq_entry->virt, 4130 sglq_entry->phys); 4131 kfree(sglq_entry); 4132 } 4133 } 4134 list_splice_init(&els_sgl_list, 4135 &phba->sli4_hba.lpfc_els_sgl_list); 4136 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4137 } else 4138 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4139 "3163 ELS xri-sgl count unchanged: %d\n", 4140 els_xri_cnt); 4141 phba->sli4_hba.els_xri_cnt = els_xri_cnt; 4142 4143 /* update xris to els sgls on the list */ 4144 sglq_entry = NULL; 4145 sglq_entry_next = NULL; 4146 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4147 &phba->sli4_hba.lpfc_els_sgl_list, list) { 4148 lxri = lpfc_sli4_next_xritag(phba); 4149 if (lxri == NO_XRI) { 4150 lpfc_printf_log(phba, KERN_ERR, 4151 LOG_TRACE_EVENT, 4152 "2400 Failed to allocate xri for " 4153 "ELS sgl\n"); 4154 rc = -ENOMEM; 4155 goto out_free_mem; 4156 } 4157 sglq_entry->sli4_lxritag = lxri; 4158 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4159 } 4160 return 0; 4161 4162 out_free_mem: 4163 lpfc_free_els_sgl_list(phba); 4164 return rc; 4165 } 4166 4167 /** 4168 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping 4169 * @phba: pointer to lpfc hba data structure. 4170 * 4171 * This routine first calculates the sizes of the current els and allocated 4172 * scsi sgl lists, and then goes through all sgls to updates the physical 4173 * XRIs assigned due to port function reset. During port initialization, the 4174 * current els and allocated scsi sgl lists are 0s. 4175 * 4176 * Return codes 4177 * 0 - successful (for now, it always returns 0) 4178 **/ 4179 int 4180 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) 4181 { 4182 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4183 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4184 uint16_t nvmet_xri_cnt; 4185 LIST_HEAD(nvmet_sgl_list); 4186 int rc; 4187 4188 /* 4189 * update on pci function's nvmet xri-sgl list 4190 */ 4191 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4192 4193 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ 4194 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4195 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { 4196 /* els xri-sgl expanded */ 4197 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; 4198 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4199 "6302 NVMET xri-sgl cnt grew from %d to %d\n", 4200 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); 4201 /* allocate the additional nvmet sgls */ 4202 for (i = 0; i < xri_cnt; i++) { 4203 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4204 GFP_KERNEL); 4205 if (sglq_entry == NULL) { 4206 lpfc_printf_log(phba, KERN_ERR, 4207 LOG_TRACE_EVENT, 4208 "6303 Failure to allocate an " 4209 "NVMET sgl entry:%d\n", i); 4210 rc = -ENOMEM; 4211 goto out_free_mem; 4212 } 4213 sglq_entry->buff_type = NVMET_BUFF_TYPE; 4214 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, 4215 &sglq_entry->phys); 4216 if (sglq_entry->virt == NULL) { 4217 kfree(sglq_entry); 4218 lpfc_printf_log(phba, KERN_ERR, 4219 LOG_TRACE_EVENT, 4220 "6304 Failure to allocate an " 4221 "NVMET buf:%d\n", i); 4222 rc = -ENOMEM; 4223 goto out_free_mem; 4224 } 4225 sglq_entry->sgl = sglq_entry->virt; 4226 memset(sglq_entry->sgl, 0, 4227 phba->cfg_sg_dma_buf_size); 4228 sglq_entry->state = SGL_FREED; 4229 list_add_tail(&sglq_entry->list, &nvmet_sgl_list); 4230 } 4231 spin_lock_irq(&phba->hbalock); 4232 spin_lock(&phba->sli4_hba.sgl_list_lock); 4233 list_splice_init(&nvmet_sgl_list, 4234 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4235 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4236 spin_unlock_irq(&phba->hbalock); 4237 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { 4238 /* nvmet xri-sgl shrunk */ 4239 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; 4240 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4241 "6305 NVMET xri-sgl count decreased from " 4242 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, 4243 nvmet_xri_cnt); 4244 spin_lock_irq(&phba->hbalock); 4245 spin_lock(&phba->sli4_hba.sgl_list_lock); 4246 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, 4247 &nvmet_sgl_list); 4248 /* release extra nvmet sgls from list */ 4249 for (i = 0; i < xri_cnt; i++) { 4250 list_remove_head(&nvmet_sgl_list, 4251 sglq_entry, struct lpfc_sglq, list); 4252 if (sglq_entry) { 4253 lpfc_nvmet_buf_free(phba, sglq_entry->virt, 4254 sglq_entry->phys); 4255 kfree(sglq_entry); 4256 } 4257 } 4258 list_splice_init(&nvmet_sgl_list, 4259 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4260 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4261 spin_unlock_irq(&phba->hbalock); 4262 } else 4263 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4264 "6306 NVMET xri-sgl count unchanged: %d\n", 4265 nvmet_xri_cnt); 4266 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; 4267 4268 /* update xris to nvmet sgls on the list */ 4269 sglq_entry = NULL; 4270 sglq_entry_next = NULL; 4271 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4272 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { 4273 lxri = lpfc_sli4_next_xritag(phba); 4274 if (lxri == NO_XRI) { 4275 lpfc_printf_log(phba, KERN_ERR, 4276 LOG_TRACE_EVENT, 4277 "6307 Failed to allocate xri for " 4278 "NVMET sgl\n"); 4279 rc = -ENOMEM; 4280 goto out_free_mem; 4281 } 4282 sglq_entry->sli4_lxritag = lxri; 4283 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4284 } 4285 return 0; 4286 4287 out_free_mem: 4288 lpfc_free_nvmet_sgl_list(phba); 4289 return rc; 4290 } 4291 4292 int 4293 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) 4294 { 4295 LIST_HEAD(blist); 4296 struct lpfc_sli4_hdw_queue *qp; 4297 struct lpfc_io_buf *lpfc_cmd; 4298 struct lpfc_io_buf *iobufp, *prev_iobufp; 4299 int idx, cnt, xri, inserted; 4300 4301 cnt = 0; 4302 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4303 qp = &phba->sli4_hba.hdwq[idx]; 4304 spin_lock_irq(&qp->io_buf_list_get_lock); 4305 spin_lock(&qp->io_buf_list_put_lock); 4306 4307 /* Take everything off the get and put lists */ 4308 list_splice_init(&qp->lpfc_io_buf_list_get, &blist); 4309 list_splice(&qp->lpfc_io_buf_list_put, &blist); 4310 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 4311 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 4312 cnt += qp->get_io_bufs + qp->put_io_bufs; 4313 qp->get_io_bufs = 0; 4314 qp->put_io_bufs = 0; 4315 qp->total_io_bufs = 0; 4316 spin_unlock(&qp->io_buf_list_put_lock); 4317 spin_unlock_irq(&qp->io_buf_list_get_lock); 4318 } 4319 4320 /* 4321 * Take IO buffers off blist and put on cbuf sorted by XRI. 4322 * This is because POST_SGL takes a sequential range of XRIs 4323 * to post to the firmware. 4324 */ 4325 for (idx = 0; idx < cnt; idx++) { 4326 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); 4327 if (!lpfc_cmd) 4328 return cnt; 4329 if (idx == 0) { 4330 list_add_tail(&lpfc_cmd->list, cbuf); 4331 continue; 4332 } 4333 xri = lpfc_cmd->cur_iocbq.sli4_xritag; 4334 inserted = 0; 4335 prev_iobufp = NULL; 4336 list_for_each_entry(iobufp, cbuf, list) { 4337 if (xri < iobufp->cur_iocbq.sli4_xritag) { 4338 if (prev_iobufp) 4339 list_add(&lpfc_cmd->list, 4340 &prev_iobufp->list); 4341 else 4342 list_add(&lpfc_cmd->list, cbuf); 4343 inserted = 1; 4344 break; 4345 } 4346 prev_iobufp = iobufp; 4347 } 4348 if (!inserted) 4349 list_add_tail(&lpfc_cmd->list, cbuf); 4350 } 4351 return cnt; 4352 } 4353 4354 int 4355 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) 4356 { 4357 struct lpfc_sli4_hdw_queue *qp; 4358 struct lpfc_io_buf *lpfc_cmd; 4359 int idx, cnt; 4360 unsigned long iflags; 4361 4362 qp = phba->sli4_hba.hdwq; 4363 cnt = 0; 4364 while (!list_empty(cbuf)) { 4365 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4366 list_remove_head(cbuf, lpfc_cmd, 4367 struct lpfc_io_buf, list); 4368 if (!lpfc_cmd) 4369 return cnt; 4370 cnt++; 4371 qp = &phba->sli4_hba.hdwq[idx]; 4372 lpfc_cmd->hdwq_no = idx; 4373 lpfc_cmd->hdwq = qp; 4374 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL; 4375 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags); 4376 list_add_tail(&lpfc_cmd->list, 4377 &qp->lpfc_io_buf_list_put); 4378 qp->put_io_bufs++; 4379 qp->total_io_bufs++; 4380 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, 4381 iflags); 4382 } 4383 } 4384 return cnt; 4385 } 4386 4387 /** 4388 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping 4389 * @phba: pointer to lpfc hba data structure. 4390 * 4391 * This routine first calculates the sizes of the current els and allocated 4392 * scsi sgl lists, and then goes through all sgls to updates the physical 4393 * XRIs assigned due to port function reset. During port initialization, the 4394 * current els and allocated scsi sgl lists are 0s. 4395 * 4396 * Return codes 4397 * 0 - successful (for now, it always returns 0) 4398 **/ 4399 int 4400 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) 4401 { 4402 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; 4403 uint16_t i, lxri, els_xri_cnt; 4404 uint16_t io_xri_cnt, io_xri_max; 4405 LIST_HEAD(io_sgl_list); 4406 int rc, cnt; 4407 4408 /* 4409 * update on pci function's allocated nvme xri-sgl list 4410 */ 4411 4412 /* maximum number of xris available for nvme buffers */ 4413 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4414 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4415 phba->sli4_hba.io_xri_max = io_xri_max; 4416 4417 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4418 "6074 Current allocated XRI sgl count:%d, " 4419 "maximum XRI count:%d els_xri_cnt:%d\n\n", 4420 phba->sli4_hba.io_xri_cnt, 4421 phba->sli4_hba.io_xri_max, 4422 els_xri_cnt); 4423 4424 cnt = lpfc_io_buf_flush(phba, &io_sgl_list); 4425 4426 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { 4427 /* max nvme xri shrunk below the allocated nvme buffers */ 4428 io_xri_cnt = phba->sli4_hba.io_xri_cnt - 4429 phba->sli4_hba.io_xri_max; 4430 /* release the extra allocated nvme buffers */ 4431 for (i = 0; i < io_xri_cnt; i++) { 4432 list_remove_head(&io_sgl_list, lpfc_ncmd, 4433 struct lpfc_io_buf, list); 4434 if (lpfc_ncmd) { 4435 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4436 lpfc_ncmd->data, 4437 lpfc_ncmd->dma_handle); 4438 kfree(lpfc_ncmd); 4439 } 4440 } 4441 phba->sli4_hba.io_xri_cnt -= io_xri_cnt; 4442 } 4443 4444 /* update xris associated to remaining allocated nvme buffers */ 4445 lpfc_ncmd = NULL; 4446 lpfc_ncmd_next = NULL; 4447 phba->sli4_hba.io_xri_cnt = cnt; 4448 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4449 &io_sgl_list, list) { 4450 lxri = lpfc_sli4_next_xritag(phba); 4451 if (lxri == NO_XRI) { 4452 lpfc_printf_log(phba, KERN_ERR, 4453 LOG_TRACE_EVENT, 4454 "6075 Failed to allocate xri for " 4455 "nvme buffer\n"); 4456 rc = -ENOMEM; 4457 goto out_free_mem; 4458 } 4459 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; 4460 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4461 } 4462 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); 4463 return 0; 4464 4465 out_free_mem: 4466 lpfc_io_free(phba); 4467 return rc; 4468 } 4469 4470 /** 4471 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec 4472 * @phba: Pointer to lpfc hba data structure. 4473 * @num_to_alloc: The requested number of buffers to allocate. 4474 * 4475 * This routine allocates nvme buffers for device with SLI-4 interface spec, 4476 * the nvme buffer contains all the necessary information needed to initiate 4477 * an I/O. After allocating up to @num_to_allocate IO buffers and put 4478 * them on a list, it post them to the port by using SGL block post. 4479 * 4480 * Return codes: 4481 * int - number of IO buffers that were allocated and posted. 4482 * 0 = failure, less than num_to_alloc is a partial failure. 4483 **/ 4484 int 4485 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) 4486 { 4487 struct lpfc_io_buf *lpfc_ncmd; 4488 struct lpfc_iocbq *pwqeq; 4489 uint16_t iotag, lxri = 0; 4490 int bcnt, num_posted; 4491 LIST_HEAD(prep_nblist); 4492 LIST_HEAD(post_nblist); 4493 LIST_HEAD(nvme_nblist); 4494 4495 phba->sli4_hba.io_xri_cnt = 0; 4496 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { 4497 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); 4498 if (!lpfc_ncmd) 4499 break; 4500 /* 4501 * Get memory from the pci pool to map the virt space to 4502 * pci bus space for an I/O. The DMA buffer includes the 4503 * number of SGE's necessary to support the sg_tablesize. 4504 */ 4505 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, 4506 GFP_KERNEL, 4507 &lpfc_ncmd->dma_handle); 4508 if (!lpfc_ncmd->data) { 4509 kfree(lpfc_ncmd); 4510 break; 4511 } 4512 4513 if (phba->cfg_xpsgl && !phba->nvmet_support) { 4514 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); 4515 } else { 4516 /* 4517 * 4K Page alignment is CRITICAL to BlockGuard, double 4518 * check to be sure. 4519 */ 4520 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4521 (((unsigned long)(lpfc_ncmd->data) & 4522 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4523 lpfc_printf_log(phba, KERN_ERR, 4524 LOG_TRACE_EVENT, 4525 "3369 Memory alignment err: " 4526 "addr=%lx\n", 4527 (unsigned long)lpfc_ncmd->data); 4528 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4529 lpfc_ncmd->data, 4530 lpfc_ncmd->dma_handle); 4531 kfree(lpfc_ncmd); 4532 break; 4533 } 4534 } 4535 4536 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); 4537 4538 lxri = lpfc_sli4_next_xritag(phba); 4539 if (lxri == NO_XRI) { 4540 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4541 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4542 kfree(lpfc_ncmd); 4543 break; 4544 } 4545 pwqeq = &lpfc_ncmd->cur_iocbq; 4546 4547 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ 4548 iotag = lpfc_sli_next_iotag(phba, pwqeq); 4549 if (iotag == 0) { 4550 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4551 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4552 kfree(lpfc_ncmd); 4553 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4554 "6121 Failed to allocate IOTAG for" 4555 " XRI:0x%x\n", lxri); 4556 lpfc_sli4_free_xri(phba, lxri); 4557 break; 4558 } 4559 pwqeq->sli4_lxritag = lxri; 4560 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4561 4562 /* Initialize local short-hand pointers. */ 4563 lpfc_ncmd->dma_sgl = lpfc_ncmd->data; 4564 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; 4565 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd; 4566 spin_lock_init(&lpfc_ncmd->buf_lock); 4567 4568 /* add the nvme buffer to a post list */ 4569 list_add_tail(&lpfc_ncmd->list, &post_nblist); 4570 phba->sli4_hba.io_xri_cnt++; 4571 } 4572 lpfc_printf_log(phba, KERN_INFO, LOG_NVME, 4573 "6114 Allocate %d out of %d requested new NVME " 4574 "buffers of size x%zu bytes\n", bcnt, num_to_alloc, 4575 sizeof(*lpfc_ncmd)); 4576 4577 4578 /* post the list of nvme buffer sgls to port if available */ 4579 if (!list_empty(&post_nblist)) 4580 num_posted = lpfc_sli4_post_io_sgl_list( 4581 phba, &post_nblist, bcnt); 4582 else 4583 num_posted = 0; 4584 4585 return num_posted; 4586 } 4587 4588 static uint64_t 4589 lpfc_get_wwpn(struct lpfc_hba *phba) 4590 { 4591 uint64_t wwn; 4592 int rc; 4593 LPFC_MBOXQ_t *mboxq; 4594 MAILBOX_t *mb; 4595 4596 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 4597 GFP_KERNEL); 4598 if (!mboxq) 4599 return (uint64_t)-1; 4600 4601 /* First get WWN of HBA instance */ 4602 lpfc_read_nv(phba, mboxq); 4603 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 4604 if (rc != MBX_SUCCESS) { 4605 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4606 "6019 Mailbox failed , mbxCmd x%x " 4607 "READ_NV, mbxStatus x%x\n", 4608 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 4609 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 4610 mempool_free(mboxq, phba->mbox_mem_pool); 4611 return (uint64_t) -1; 4612 } 4613 mb = &mboxq->u.mb; 4614 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); 4615 /* wwn is WWPN of HBA instance */ 4616 mempool_free(mboxq, phba->mbox_mem_pool); 4617 if (phba->sli_rev == LPFC_SLI_REV4) 4618 return be64_to_cpu(wwn); 4619 else 4620 return rol64(wwn, 32); 4621 } 4622 4623 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba) 4624 { 4625 if (phba->sli_rev == LPFC_SLI_REV4) 4626 if (phba->cfg_xpsgl && !phba->nvmet_support) 4627 return LPFC_MAX_SG_TABLESIZE; 4628 else 4629 return phba->cfg_scsi_seg_cnt; 4630 else 4631 return phba->cfg_sg_seg_cnt; 4632 } 4633 4634 /** 4635 * lpfc_vmid_res_alloc - Allocates resources for VMID 4636 * @phba: pointer to lpfc hba data structure. 4637 * @vport: pointer to vport data structure 4638 * 4639 * This routine allocated the resources needed for the VMID. 4640 * 4641 * Return codes 4642 * 0 on Success 4643 * Non-0 on Failure 4644 */ 4645 static int 4646 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport) 4647 { 4648 /* VMID feature is supported only on SLI4 */ 4649 if (phba->sli_rev == LPFC_SLI_REV3) { 4650 phba->cfg_vmid_app_header = 0; 4651 phba->cfg_vmid_priority_tagging = 0; 4652 } 4653 4654 if (lpfc_is_vmid_enabled(phba)) { 4655 vport->vmid = 4656 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid), 4657 GFP_KERNEL); 4658 if (!vport->vmid) 4659 return -ENOMEM; 4660 4661 rwlock_init(&vport->vmid_lock); 4662 4663 /* Set the VMID parameters for the vport */ 4664 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging; 4665 vport->vmid_inactivity_timeout = 4666 phba->cfg_vmid_inactivity_timeout; 4667 vport->max_vmid = phba->cfg_max_vmid; 4668 vport->cur_vmid_cnt = 0; 4669 4670 vport->vmid_priority_range = bitmap_zalloc 4671 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL); 4672 4673 if (!vport->vmid_priority_range) { 4674 kfree(vport->vmid); 4675 return -ENOMEM; 4676 } 4677 4678 hash_init(vport->hash_table); 4679 } 4680 return 0; 4681 } 4682 4683 /** 4684 * lpfc_create_port - Create an FC port 4685 * @phba: pointer to lpfc hba data structure. 4686 * @instance: a unique integer ID to this FC port. 4687 * @dev: pointer to the device data structure. 4688 * 4689 * This routine creates a FC port for the upper layer protocol. The FC port 4690 * can be created on top of either a physical port or a virtual port provided 4691 * by the HBA. This routine also allocates a SCSI host data structure (shost) 4692 * and associates the FC port created before adding the shost into the SCSI 4693 * layer. 4694 * 4695 * Return codes 4696 * @vport - pointer to the virtual N_Port data structure. 4697 * NULL - port create failed. 4698 **/ 4699 struct lpfc_vport * 4700 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) 4701 { 4702 struct lpfc_vport *vport; 4703 struct Scsi_Host *shost = NULL; 4704 struct scsi_host_template *template; 4705 int error = 0; 4706 int i; 4707 uint64_t wwn; 4708 bool use_no_reset_hba = false; 4709 int rc; 4710 4711 if (lpfc_no_hba_reset_cnt) { 4712 if (phba->sli_rev < LPFC_SLI_REV4 && 4713 dev == &phba->pcidev->dev) { 4714 /* Reset the port first */ 4715 lpfc_sli_brdrestart(phba); 4716 rc = lpfc_sli_chipset_init(phba); 4717 if (rc) 4718 return NULL; 4719 } 4720 wwn = lpfc_get_wwpn(phba); 4721 } 4722 4723 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { 4724 if (wwn == lpfc_no_hba_reset[i]) { 4725 lpfc_printf_log(phba, KERN_ERR, 4726 LOG_TRACE_EVENT, 4727 "6020 Setting use_no_reset port=%llx\n", 4728 wwn); 4729 use_no_reset_hba = true; 4730 break; 4731 } 4732 } 4733 4734 /* Seed template for SCSI host registration */ 4735 if (dev == &phba->pcidev->dev) { 4736 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 4737 /* Seed physical port template */ 4738 template = &lpfc_template; 4739 4740 if (use_no_reset_hba) 4741 /* template is for a no reset SCSI Host */ 4742 template->eh_host_reset_handler = NULL; 4743 4744 /* Seed updated value of sg_tablesize */ 4745 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4746 } else { 4747 /* NVMET is for physical port only */ 4748 template = &lpfc_template_nvme; 4749 } 4750 } else { 4751 /* Seed vport template */ 4752 template = &lpfc_vport_template; 4753 4754 /* Seed updated value of sg_tablesize */ 4755 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4756 } 4757 4758 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); 4759 if (!shost) 4760 goto out; 4761 4762 vport = (struct lpfc_vport *) shost->hostdata; 4763 vport->phba = phba; 4764 vport->load_flag |= FC_LOADING; 4765 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 4766 vport->fc_rscn_flush = 0; 4767 lpfc_get_vport_cfgparam(vport); 4768 4769 /* Adjust value in vport */ 4770 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; 4771 4772 shost->unique_id = instance; 4773 shost->max_id = LPFC_MAX_TARGET; 4774 shost->max_lun = vport->cfg_max_luns; 4775 shost->this_id = -1; 4776 shost->max_cmd_len = 16; 4777 4778 if (phba->sli_rev == LPFC_SLI_REV4) { 4779 if (!phba->cfg_fcp_mq_threshold || 4780 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) 4781 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; 4782 4783 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), 4784 phba->cfg_fcp_mq_threshold); 4785 4786 shost->dma_boundary = 4787 phba->sli4_hba.pc_sli4_params.sge_supp_len-1; 4788 } else 4789 /* SLI-3 has a limited number of hardware queues (3), 4790 * thus there is only one for FCP processing. 4791 */ 4792 shost->nr_hw_queues = 1; 4793 4794 /* 4795 * Set initial can_queue value since 0 is no longer supported and 4796 * scsi_add_host will fail. This will be adjusted later based on the 4797 * max xri value determined in hba setup. 4798 */ 4799 shost->can_queue = phba->cfg_hba_queue_depth - 10; 4800 if (dev != &phba->pcidev->dev) { 4801 shost->transportt = lpfc_vport_transport_template; 4802 vport->port_type = LPFC_NPIV_PORT; 4803 } else { 4804 shost->transportt = lpfc_transport_template; 4805 vport->port_type = LPFC_PHYSICAL_PORT; 4806 } 4807 4808 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 4809 "9081 CreatePort TMPLATE type %x TBLsize %d " 4810 "SEGcnt %d/%d\n", 4811 vport->port_type, shost->sg_tablesize, 4812 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); 4813 4814 /* Allocate the resources for VMID */ 4815 rc = lpfc_vmid_res_alloc(phba, vport); 4816 4817 if (rc) 4818 goto out_put_shost; 4819 4820 /* Initialize all internally managed lists. */ 4821 INIT_LIST_HEAD(&vport->fc_nodes); 4822 INIT_LIST_HEAD(&vport->rcv_buffer_list); 4823 spin_lock_init(&vport->work_port_lock); 4824 4825 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); 4826 4827 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); 4828 4829 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); 4830 4831 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) 4832 lpfc_setup_bg(phba, shost); 4833 4834 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); 4835 if (error) 4836 goto out_free_vmid; 4837 4838 spin_lock_irq(&phba->port_list_lock); 4839 list_add_tail(&vport->listentry, &phba->port_list); 4840 spin_unlock_irq(&phba->port_list_lock); 4841 return vport; 4842 4843 out_free_vmid: 4844 kfree(vport->vmid); 4845 bitmap_free(vport->vmid_priority_range); 4846 out_put_shost: 4847 scsi_host_put(shost); 4848 out: 4849 return NULL; 4850 } 4851 4852 /** 4853 * destroy_port - destroy an FC port 4854 * @vport: pointer to an lpfc virtual N_Port data structure. 4855 * 4856 * This routine destroys a FC port from the upper layer protocol. All the 4857 * resources associated with the port are released. 4858 **/ 4859 void 4860 destroy_port(struct lpfc_vport *vport) 4861 { 4862 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 4863 struct lpfc_hba *phba = vport->phba; 4864 4865 lpfc_debugfs_terminate(vport); 4866 fc_remove_host(shost); 4867 scsi_remove_host(shost); 4868 4869 spin_lock_irq(&phba->port_list_lock); 4870 list_del_init(&vport->listentry); 4871 spin_unlock_irq(&phba->port_list_lock); 4872 4873 lpfc_cleanup(vport); 4874 return; 4875 } 4876 4877 /** 4878 * lpfc_get_instance - Get a unique integer ID 4879 * 4880 * This routine allocates a unique integer ID from lpfc_hba_index pool. It 4881 * uses the kernel idr facility to perform the task. 4882 * 4883 * Return codes: 4884 * instance - a unique integer ID allocated as the new instance. 4885 * -1 - lpfc get instance failed. 4886 **/ 4887 int 4888 lpfc_get_instance(void) 4889 { 4890 int ret; 4891 4892 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); 4893 return ret < 0 ? -1 : ret; 4894 } 4895 4896 /** 4897 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done 4898 * @shost: pointer to SCSI host data structure. 4899 * @time: elapsed time of the scan in jiffies. 4900 * 4901 * This routine is called by the SCSI layer with a SCSI host to determine 4902 * whether the scan host is finished. 4903 * 4904 * Note: there is no scan_start function as adapter initialization will have 4905 * asynchronously kicked off the link initialization. 4906 * 4907 * Return codes 4908 * 0 - SCSI host scan is not over yet. 4909 * 1 - SCSI host scan is over. 4910 **/ 4911 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) 4912 { 4913 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4914 struct lpfc_hba *phba = vport->phba; 4915 int stat = 0; 4916 4917 spin_lock_irq(shost->host_lock); 4918 4919 if (vport->load_flag & FC_UNLOADING) { 4920 stat = 1; 4921 goto finished; 4922 } 4923 if (time >= msecs_to_jiffies(30 * 1000)) { 4924 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4925 "0461 Scanning longer than 30 " 4926 "seconds. Continuing initialization\n"); 4927 stat = 1; 4928 goto finished; 4929 } 4930 if (time >= msecs_to_jiffies(15 * 1000) && 4931 phba->link_state <= LPFC_LINK_DOWN) { 4932 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4933 "0465 Link down longer than 15 " 4934 "seconds. Continuing initialization\n"); 4935 stat = 1; 4936 goto finished; 4937 } 4938 4939 if (vport->port_state != LPFC_VPORT_READY) 4940 goto finished; 4941 if (vport->num_disc_nodes || vport->fc_prli_sent) 4942 goto finished; 4943 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) 4944 goto finished; 4945 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) 4946 goto finished; 4947 4948 stat = 1; 4949 4950 finished: 4951 spin_unlock_irq(shost->host_lock); 4952 return stat; 4953 } 4954 4955 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) 4956 { 4957 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; 4958 struct lpfc_hba *phba = vport->phba; 4959 4960 fc_host_supported_speeds(shost) = 0; 4961 /* 4962 * Avoid reporting supported link speed for FCoE as it can't be 4963 * controlled via FCoE. 4964 */ 4965 if (phba->hba_flag & HBA_FCOE_MODE) 4966 return; 4967 4968 if (phba->lmt & LMT_256Gb) 4969 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT; 4970 if (phba->lmt & LMT_128Gb) 4971 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; 4972 if (phba->lmt & LMT_64Gb) 4973 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; 4974 if (phba->lmt & LMT_32Gb) 4975 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; 4976 if (phba->lmt & LMT_16Gb) 4977 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; 4978 if (phba->lmt & LMT_10Gb) 4979 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; 4980 if (phba->lmt & LMT_8Gb) 4981 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; 4982 if (phba->lmt & LMT_4Gb) 4983 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; 4984 if (phba->lmt & LMT_2Gb) 4985 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; 4986 if (phba->lmt & LMT_1Gb) 4987 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; 4988 } 4989 4990 /** 4991 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port 4992 * @shost: pointer to SCSI host data structure. 4993 * 4994 * This routine initializes a given SCSI host attributes on a FC port. The 4995 * SCSI host can be either on top of a physical port or a virtual port. 4996 **/ 4997 void lpfc_host_attrib_init(struct Scsi_Host *shost) 4998 { 4999 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 5000 struct lpfc_hba *phba = vport->phba; 5001 /* 5002 * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). 5003 */ 5004 5005 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 5006 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 5007 fc_host_supported_classes(shost) = FC_COS_CLASS3; 5008 5009 memset(fc_host_supported_fc4s(shost), 0, 5010 sizeof(fc_host_supported_fc4s(shost))); 5011 fc_host_supported_fc4s(shost)[2] = 1; 5012 fc_host_supported_fc4s(shost)[7] = 1; 5013 5014 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), 5015 sizeof fc_host_symbolic_name(shost)); 5016 5017 lpfc_host_supported_speeds_set(shost); 5018 5019 fc_host_maxframe_size(shost) = 5020 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 5021 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; 5022 5023 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; 5024 5025 /* This value is also unchanging */ 5026 memset(fc_host_active_fc4s(shost), 0, 5027 sizeof(fc_host_active_fc4s(shost))); 5028 fc_host_active_fc4s(shost)[2] = 1; 5029 fc_host_active_fc4s(shost)[7] = 1; 5030 5031 fc_host_max_npiv_vports(shost) = phba->max_vpi; 5032 spin_lock_irq(shost->host_lock); 5033 vport->load_flag &= ~FC_LOADING; 5034 spin_unlock_irq(shost->host_lock); 5035 } 5036 5037 /** 5038 * lpfc_stop_port_s3 - Stop SLI3 device port 5039 * @phba: pointer to lpfc hba data structure. 5040 * 5041 * This routine is invoked to stop an SLI3 device port, it stops the device 5042 * from generating interrupts and stops the device driver's timers for the 5043 * device. 5044 **/ 5045 static void 5046 lpfc_stop_port_s3(struct lpfc_hba *phba) 5047 { 5048 /* Clear all interrupt enable conditions */ 5049 writel(0, phba->HCregaddr); 5050 readl(phba->HCregaddr); /* flush */ 5051 /* Clear all pending interrupts */ 5052 writel(0xffffffff, phba->HAregaddr); 5053 readl(phba->HAregaddr); /* flush */ 5054 5055 /* Reset some HBA SLI setup states */ 5056 lpfc_stop_hba_timers(phba); 5057 phba->pport->work_port_events = 0; 5058 } 5059 5060 /** 5061 * lpfc_stop_port_s4 - Stop SLI4 device port 5062 * @phba: pointer to lpfc hba data structure. 5063 * 5064 * This routine is invoked to stop an SLI4 device port, it stops the device 5065 * from generating interrupts and stops the device driver's timers for the 5066 * device. 5067 **/ 5068 static void 5069 lpfc_stop_port_s4(struct lpfc_hba *phba) 5070 { 5071 /* Reset some HBA SLI4 setup states */ 5072 lpfc_stop_hba_timers(phba); 5073 if (phba->pport) 5074 phba->pport->work_port_events = 0; 5075 phba->sli4_hba.intr_enable = 0; 5076 } 5077 5078 /** 5079 * lpfc_stop_port - Wrapper function for stopping hba port 5080 * @phba: Pointer to HBA context object. 5081 * 5082 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from 5083 * the API jump table function pointer from the lpfc_hba struct. 5084 **/ 5085 void 5086 lpfc_stop_port(struct lpfc_hba *phba) 5087 { 5088 phba->lpfc_stop_port(phba); 5089 5090 if (phba->wq) 5091 flush_workqueue(phba->wq); 5092 } 5093 5094 /** 5095 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer 5096 * @phba: Pointer to hba for which this call is being executed. 5097 * 5098 * This routine starts the timer waiting for the FCF rediscovery to complete. 5099 **/ 5100 void 5101 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) 5102 { 5103 unsigned long fcf_redisc_wait_tmo = 5104 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); 5105 /* Start fcf rediscovery wait period timer */ 5106 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); 5107 spin_lock_irq(&phba->hbalock); 5108 /* Allow action to new fcf asynchronous event */ 5109 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); 5110 /* Mark the FCF rediscovery pending state */ 5111 phba->fcf.fcf_flag |= FCF_REDISC_PEND; 5112 spin_unlock_irq(&phba->hbalock); 5113 } 5114 5115 /** 5116 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout 5117 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5118 * 5119 * This routine is invoked when waiting for FCF table rediscover has been 5120 * timed out. If new FCF record(s) has (have) been discovered during the 5121 * wait period, a new FCF event shall be added to the FCOE async event 5122 * list, and then worker thread shall be waked up for processing from the 5123 * worker thread context. 5124 **/ 5125 static void 5126 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) 5127 { 5128 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); 5129 5130 /* Don't send FCF rediscovery event if timer cancelled */ 5131 spin_lock_irq(&phba->hbalock); 5132 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 5133 spin_unlock_irq(&phba->hbalock); 5134 return; 5135 } 5136 /* Clear FCF rediscovery timer pending flag */ 5137 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 5138 /* FCF rediscovery event to worker thread */ 5139 phba->fcf.fcf_flag |= FCF_REDISC_EVT; 5140 spin_unlock_irq(&phba->hbalock); 5141 lpfc_printf_log(phba, KERN_INFO, LOG_FIP, 5142 "2776 FCF rediscover quiescent timer expired\n"); 5143 /* wake up worker thread */ 5144 lpfc_worker_wake_up(phba); 5145 } 5146 5147 /** 5148 * lpfc_vmid_poll - VMID timeout detection 5149 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5150 * 5151 * This routine is invoked when there is no I/O on by a VM for the specified 5152 * amount of time. When this situation is detected, the VMID has to be 5153 * deregistered from the switch and all the local resources freed. The VMID 5154 * will be reassigned to the VM once the I/O begins. 5155 **/ 5156 static void 5157 lpfc_vmid_poll(struct timer_list *t) 5158 { 5159 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll); 5160 u32 wake_up = 0; 5161 5162 /* check if there is a need to issue QFPA */ 5163 if (phba->pport->vmid_priority_tagging) { 5164 wake_up = 1; 5165 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA; 5166 } 5167 5168 /* Is the vmid inactivity timer enabled */ 5169 if (phba->pport->vmid_inactivity_timeout || 5170 phba->pport->load_flag & FC_DEREGISTER_ALL_APP_ID) { 5171 wake_up = 1; 5172 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID; 5173 } 5174 5175 if (wake_up) 5176 lpfc_worker_wake_up(phba); 5177 5178 /* restart the timer for the next iteration */ 5179 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 * 5180 LPFC_VMID_TIMER)); 5181 } 5182 5183 /** 5184 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code 5185 * @phba: pointer to lpfc hba data structure. 5186 * @acqe_link: pointer to the async link completion queue entry. 5187 * 5188 * This routine is to parse the SLI4 link-attention link fault code. 5189 **/ 5190 static void 5191 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, 5192 struct lpfc_acqe_link *acqe_link) 5193 { 5194 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) { 5195 case LPFC_FC_LA_TYPE_LINK_DOWN: 5196 case LPFC_FC_LA_TYPE_TRUNKING_EVENT: 5197 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 5198 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 5199 break; 5200 default: 5201 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5202 case LPFC_ASYNC_LINK_FAULT_NONE: 5203 case LPFC_ASYNC_LINK_FAULT_LOCAL: 5204 case LPFC_ASYNC_LINK_FAULT_REMOTE: 5205 case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5206 break; 5207 default: 5208 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5209 "0398 Unknown link fault code: x%x\n", 5210 bf_get(lpfc_acqe_link_fault, acqe_link)); 5211 break; 5212 } 5213 break; 5214 } 5215 } 5216 5217 /** 5218 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type 5219 * @phba: pointer to lpfc hba data structure. 5220 * @acqe_link: pointer to the async link completion queue entry. 5221 * 5222 * This routine is to parse the SLI4 link attention type and translate it 5223 * into the base driver's link attention type coding. 5224 * 5225 * Return: Link attention type in terms of base driver's coding. 5226 **/ 5227 static uint8_t 5228 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, 5229 struct lpfc_acqe_link *acqe_link) 5230 { 5231 uint8_t att_type; 5232 5233 switch (bf_get(lpfc_acqe_link_status, acqe_link)) { 5234 case LPFC_ASYNC_LINK_STATUS_DOWN: 5235 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: 5236 att_type = LPFC_ATT_LINK_DOWN; 5237 break; 5238 case LPFC_ASYNC_LINK_STATUS_UP: 5239 /* Ignore physical link up events - wait for logical link up */ 5240 att_type = LPFC_ATT_RESERVED; 5241 break; 5242 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: 5243 att_type = LPFC_ATT_LINK_UP; 5244 break; 5245 default: 5246 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5247 "0399 Invalid link attention type: x%x\n", 5248 bf_get(lpfc_acqe_link_status, acqe_link)); 5249 att_type = LPFC_ATT_RESERVED; 5250 break; 5251 } 5252 return att_type; 5253 } 5254 5255 /** 5256 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed 5257 * @phba: pointer to lpfc hba data structure. 5258 * 5259 * This routine is to get an SLI3 FC port's link speed in Mbps. 5260 * 5261 * Return: link speed in terms of Mbps. 5262 **/ 5263 uint32_t 5264 lpfc_sli_port_speed_get(struct lpfc_hba *phba) 5265 { 5266 uint32_t link_speed; 5267 5268 if (!lpfc_is_link_up(phba)) 5269 return 0; 5270 5271 if (phba->sli_rev <= LPFC_SLI_REV3) { 5272 switch (phba->fc_linkspeed) { 5273 case LPFC_LINK_SPEED_1GHZ: 5274 link_speed = 1000; 5275 break; 5276 case LPFC_LINK_SPEED_2GHZ: 5277 link_speed = 2000; 5278 break; 5279 case LPFC_LINK_SPEED_4GHZ: 5280 link_speed = 4000; 5281 break; 5282 case LPFC_LINK_SPEED_8GHZ: 5283 link_speed = 8000; 5284 break; 5285 case LPFC_LINK_SPEED_10GHZ: 5286 link_speed = 10000; 5287 break; 5288 case LPFC_LINK_SPEED_16GHZ: 5289 link_speed = 16000; 5290 break; 5291 default: 5292 link_speed = 0; 5293 } 5294 } else { 5295 if (phba->sli4_hba.link_state.logical_speed) 5296 link_speed = 5297 phba->sli4_hba.link_state.logical_speed; 5298 else 5299 link_speed = phba->sli4_hba.link_state.speed; 5300 } 5301 return link_speed; 5302 } 5303 5304 /** 5305 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed 5306 * @phba: pointer to lpfc hba data structure. 5307 * @evt_code: asynchronous event code. 5308 * @speed_code: asynchronous event link speed code. 5309 * 5310 * This routine is to parse the giving SLI4 async event link speed code into 5311 * value of Mbps for the link speed. 5312 * 5313 * Return: link speed in terms of Mbps. 5314 **/ 5315 static uint32_t 5316 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, 5317 uint8_t speed_code) 5318 { 5319 uint32_t port_speed; 5320 5321 switch (evt_code) { 5322 case LPFC_TRAILER_CODE_LINK: 5323 switch (speed_code) { 5324 case LPFC_ASYNC_LINK_SPEED_ZERO: 5325 port_speed = 0; 5326 break; 5327 case LPFC_ASYNC_LINK_SPEED_10MBPS: 5328 port_speed = 10; 5329 break; 5330 case LPFC_ASYNC_LINK_SPEED_100MBPS: 5331 port_speed = 100; 5332 break; 5333 case LPFC_ASYNC_LINK_SPEED_1GBPS: 5334 port_speed = 1000; 5335 break; 5336 case LPFC_ASYNC_LINK_SPEED_10GBPS: 5337 port_speed = 10000; 5338 break; 5339 case LPFC_ASYNC_LINK_SPEED_20GBPS: 5340 port_speed = 20000; 5341 break; 5342 case LPFC_ASYNC_LINK_SPEED_25GBPS: 5343 port_speed = 25000; 5344 break; 5345 case LPFC_ASYNC_LINK_SPEED_40GBPS: 5346 port_speed = 40000; 5347 break; 5348 case LPFC_ASYNC_LINK_SPEED_100GBPS: 5349 port_speed = 100000; 5350 break; 5351 default: 5352 port_speed = 0; 5353 } 5354 break; 5355 case LPFC_TRAILER_CODE_FC: 5356 switch (speed_code) { 5357 case LPFC_FC_LA_SPEED_UNKNOWN: 5358 port_speed = 0; 5359 break; 5360 case LPFC_FC_LA_SPEED_1G: 5361 port_speed = 1000; 5362 break; 5363 case LPFC_FC_LA_SPEED_2G: 5364 port_speed = 2000; 5365 break; 5366 case LPFC_FC_LA_SPEED_4G: 5367 port_speed = 4000; 5368 break; 5369 case LPFC_FC_LA_SPEED_8G: 5370 port_speed = 8000; 5371 break; 5372 case LPFC_FC_LA_SPEED_10G: 5373 port_speed = 10000; 5374 break; 5375 case LPFC_FC_LA_SPEED_16G: 5376 port_speed = 16000; 5377 break; 5378 case LPFC_FC_LA_SPEED_32G: 5379 port_speed = 32000; 5380 break; 5381 case LPFC_FC_LA_SPEED_64G: 5382 port_speed = 64000; 5383 break; 5384 case LPFC_FC_LA_SPEED_128G: 5385 port_speed = 128000; 5386 break; 5387 case LPFC_FC_LA_SPEED_256G: 5388 port_speed = 256000; 5389 break; 5390 default: 5391 port_speed = 0; 5392 } 5393 break; 5394 default: 5395 port_speed = 0; 5396 } 5397 return port_speed; 5398 } 5399 5400 /** 5401 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event 5402 * @phba: pointer to lpfc hba data structure. 5403 * @acqe_link: pointer to the async link completion queue entry. 5404 * 5405 * This routine is to handle the SLI4 asynchronous FCoE link event. 5406 **/ 5407 static void 5408 lpfc_sli4_async_link_evt(struct lpfc_hba *phba, 5409 struct lpfc_acqe_link *acqe_link) 5410 { 5411 LPFC_MBOXQ_t *pmb; 5412 MAILBOX_t *mb; 5413 struct lpfc_mbx_read_top *la; 5414 uint8_t att_type; 5415 int rc; 5416 5417 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); 5418 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) 5419 return; 5420 phba->fcoe_eventtag = acqe_link->event_tag; 5421 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 5422 if (!pmb) { 5423 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5424 "0395 The mboxq allocation failed\n"); 5425 return; 5426 } 5427 5428 rc = lpfc_mbox_rsrc_prep(phba, pmb); 5429 if (rc) { 5430 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5431 "0396 mailbox allocation failed\n"); 5432 goto out_free_pmb; 5433 } 5434 5435 /* Cleanup any outstanding ELS commands */ 5436 lpfc_els_flush_all_cmd(phba); 5437 5438 /* Block ELS IOCBs until we have done process link event */ 5439 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 5440 5441 /* Update link event statistics */ 5442 phba->sli.slistat.link_event++; 5443 5444 /* Create lpfc_handle_latt mailbox command from link ACQE */ 5445 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 5446 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 5447 pmb->vport = phba->pport; 5448 5449 /* Keep the link status for extra SLI4 state machine reference */ 5450 phba->sli4_hba.link_state.speed = 5451 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, 5452 bf_get(lpfc_acqe_link_speed, acqe_link)); 5453 phba->sli4_hba.link_state.duplex = 5454 bf_get(lpfc_acqe_link_duplex, acqe_link); 5455 phba->sli4_hba.link_state.status = 5456 bf_get(lpfc_acqe_link_status, acqe_link); 5457 phba->sli4_hba.link_state.type = 5458 bf_get(lpfc_acqe_link_type, acqe_link); 5459 phba->sli4_hba.link_state.number = 5460 bf_get(lpfc_acqe_link_number, acqe_link); 5461 phba->sli4_hba.link_state.fault = 5462 bf_get(lpfc_acqe_link_fault, acqe_link); 5463 phba->sli4_hba.link_state.logical_speed = 5464 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; 5465 5466 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 5467 "2900 Async FC/FCoE Link event - Speed:%dGBit " 5468 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " 5469 "Logical speed:%dMbps Fault:%d\n", 5470 phba->sli4_hba.link_state.speed, 5471 phba->sli4_hba.link_state.topology, 5472 phba->sli4_hba.link_state.status, 5473 phba->sli4_hba.link_state.type, 5474 phba->sli4_hba.link_state.number, 5475 phba->sli4_hba.link_state.logical_speed, 5476 phba->sli4_hba.link_state.fault); 5477 /* 5478 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch 5479 * topology info. Note: Optional for non FC-AL ports. 5480 */ 5481 if (!(phba->hba_flag & HBA_FCOE_MODE)) { 5482 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 5483 if (rc == MBX_NOT_FINISHED) 5484 goto out_free_pmb; 5485 return; 5486 } 5487 /* 5488 * For FCoE Mode: fill in all the topology information we need and call 5489 * the READ_TOPOLOGY completion routine to continue without actually 5490 * sending the READ_TOPOLOGY mailbox command to the port. 5491 */ 5492 /* Initialize completion status */ 5493 mb = &pmb->u.mb; 5494 mb->mbxStatus = MBX_SUCCESS; 5495 5496 /* Parse port fault information field */ 5497 lpfc_sli4_parse_latt_fault(phba, acqe_link); 5498 5499 /* Parse and translate link attention fields */ 5500 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; 5501 la->eventTag = acqe_link->event_tag; 5502 bf_set(lpfc_mbx_read_top_att_type, la, att_type); 5503 bf_set(lpfc_mbx_read_top_link_spd, la, 5504 (bf_get(lpfc_acqe_link_speed, acqe_link))); 5505 5506 /* Fake the following irrelevant fields */ 5507 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); 5508 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); 5509 bf_set(lpfc_mbx_read_top_il, la, 0); 5510 bf_set(lpfc_mbx_read_top_pb, la, 0); 5511 bf_set(lpfc_mbx_read_top_fa, la, 0); 5512 bf_set(lpfc_mbx_read_top_mm, la, 0); 5513 5514 /* Invoke the lpfc_handle_latt mailbox command callback function */ 5515 lpfc_mbx_cmpl_read_topology(phba, pmb); 5516 5517 return; 5518 5519 out_free_pmb: 5520 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 5521 } 5522 5523 /** 5524 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read 5525 * topology. 5526 * @phba: pointer to lpfc hba data structure. 5527 * @speed_code: asynchronous event link speed code. 5528 * 5529 * This routine is to parse the giving SLI4 async event link speed code into 5530 * value of Read topology link speed. 5531 * 5532 * Return: link speed in terms of Read topology. 5533 **/ 5534 static uint8_t 5535 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) 5536 { 5537 uint8_t port_speed; 5538 5539 switch (speed_code) { 5540 case LPFC_FC_LA_SPEED_1G: 5541 port_speed = LPFC_LINK_SPEED_1GHZ; 5542 break; 5543 case LPFC_FC_LA_SPEED_2G: 5544 port_speed = LPFC_LINK_SPEED_2GHZ; 5545 break; 5546 case LPFC_FC_LA_SPEED_4G: 5547 port_speed = LPFC_LINK_SPEED_4GHZ; 5548 break; 5549 case LPFC_FC_LA_SPEED_8G: 5550 port_speed = LPFC_LINK_SPEED_8GHZ; 5551 break; 5552 case LPFC_FC_LA_SPEED_16G: 5553 port_speed = LPFC_LINK_SPEED_16GHZ; 5554 break; 5555 case LPFC_FC_LA_SPEED_32G: 5556 port_speed = LPFC_LINK_SPEED_32GHZ; 5557 break; 5558 case LPFC_FC_LA_SPEED_64G: 5559 port_speed = LPFC_LINK_SPEED_64GHZ; 5560 break; 5561 case LPFC_FC_LA_SPEED_128G: 5562 port_speed = LPFC_LINK_SPEED_128GHZ; 5563 break; 5564 case LPFC_FC_LA_SPEED_256G: 5565 port_speed = LPFC_LINK_SPEED_256GHZ; 5566 break; 5567 default: 5568 port_speed = 0; 5569 break; 5570 } 5571 5572 return port_speed; 5573 } 5574 5575 void 5576 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba) 5577 { 5578 if (!phba->rx_monitor) { 5579 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5580 "4411 Rx Monitor Info is empty.\n"); 5581 } else { 5582 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0, 5583 LPFC_MAX_RXMONITOR_DUMP); 5584 } 5585 } 5586 5587 /** 5588 * lpfc_cgn_update_stat - Save data into congestion stats buffer 5589 * @phba: pointer to lpfc hba data structure. 5590 * @dtag: FPIN descriptor received 5591 * 5592 * Increment the FPIN received counter/time when it happens. 5593 */ 5594 void 5595 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag) 5596 { 5597 struct lpfc_cgn_info *cp; 5598 struct tm broken; 5599 struct timespec64 cur_time; 5600 u32 cnt; 5601 u32 value; 5602 5603 /* Make sure we have a congestion info buffer */ 5604 if (!phba->cgn_i) 5605 return; 5606 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5607 ktime_get_real_ts64(&cur_time); 5608 time64_to_tm(cur_time.tv_sec, 0, &broken); 5609 5610 /* Update congestion statistics */ 5611 switch (dtag) { 5612 case ELS_DTAG_LNK_INTEGRITY: 5613 cnt = le32_to_cpu(cp->link_integ_notification); 5614 cnt++; 5615 cp->link_integ_notification = cpu_to_le32(cnt); 5616 5617 cp->cgn_stat_lnk_month = broken.tm_mon + 1; 5618 cp->cgn_stat_lnk_day = broken.tm_mday; 5619 cp->cgn_stat_lnk_year = broken.tm_year - 100; 5620 cp->cgn_stat_lnk_hour = broken.tm_hour; 5621 cp->cgn_stat_lnk_min = broken.tm_min; 5622 cp->cgn_stat_lnk_sec = broken.tm_sec; 5623 break; 5624 case ELS_DTAG_DELIVERY: 5625 cnt = le32_to_cpu(cp->delivery_notification); 5626 cnt++; 5627 cp->delivery_notification = cpu_to_le32(cnt); 5628 5629 cp->cgn_stat_del_month = broken.tm_mon + 1; 5630 cp->cgn_stat_del_day = broken.tm_mday; 5631 cp->cgn_stat_del_year = broken.tm_year - 100; 5632 cp->cgn_stat_del_hour = broken.tm_hour; 5633 cp->cgn_stat_del_min = broken.tm_min; 5634 cp->cgn_stat_del_sec = broken.tm_sec; 5635 break; 5636 case ELS_DTAG_PEER_CONGEST: 5637 cnt = le32_to_cpu(cp->cgn_peer_notification); 5638 cnt++; 5639 cp->cgn_peer_notification = cpu_to_le32(cnt); 5640 5641 cp->cgn_stat_peer_month = broken.tm_mon + 1; 5642 cp->cgn_stat_peer_day = broken.tm_mday; 5643 cp->cgn_stat_peer_year = broken.tm_year - 100; 5644 cp->cgn_stat_peer_hour = broken.tm_hour; 5645 cp->cgn_stat_peer_min = broken.tm_min; 5646 cp->cgn_stat_peer_sec = broken.tm_sec; 5647 break; 5648 case ELS_DTAG_CONGESTION: 5649 cnt = le32_to_cpu(cp->cgn_notification); 5650 cnt++; 5651 cp->cgn_notification = cpu_to_le32(cnt); 5652 5653 cp->cgn_stat_cgn_month = broken.tm_mon + 1; 5654 cp->cgn_stat_cgn_day = broken.tm_mday; 5655 cp->cgn_stat_cgn_year = broken.tm_year - 100; 5656 cp->cgn_stat_cgn_hour = broken.tm_hour; 5657 cp->cgn_stat_cgn_min = broken.tm_min; 5658 cp->cgn_stat_cgn_sec = broken.tm_sec; 5659 } 5660 if (phba->cgn_fpin_frequency && 5661 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5662 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5663 cp->cgn_stat_npm = value; 5664 } 5665 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5666 LPFC_CGN_CRC32_SEED); 5667 cp->cgn_info_crc = cpu_to_le32(value); 5668 } 5669 5670 /** 5671 * lpfc_cgn_save_evt_cnt - Save data into registered congestion buffer 5672 * @phba: pointer to lpfc hba data structure. 5673 * 5674 * Save the congestion event data every minute. 5675 * On the hour collapse all the minute data into hour data. Every day 5676 * collapse all the hour data into daily data. Separate driver 5677 * and fabrc congestion event counters that will be saved out 5678 * to the registered congestion buffer every minute. 5679 */ 5680 static void 5681 lpfc_cgn_save_evt_cnt(struct lpfc_hba *phba) 5682 { 5683 struct lpfc_cgn_info *cp; 5684 struct tm broken; 5685 struct timespec64 cur_time; 5686 uint32_t i, index; 5687 uint16_t value, mvalue; 5688 uint64_t bps; 5689 uint32_t mbps; 5690 uint32_t dvalue, wvalue, lvalue, avalue; 5691 uint64_t latsum; 5692 __le16 *ptr; 5693 __le32 *lptr; 5694 __le16 *mptr; 5695 5696 /* Make sure we have a congestion info buffer */ 5697 if (!phba->cgn_i) 5698 return; 5699 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5700 5701 if (time_before(jiffies, phba->cgn_evt_timestamp)) 5702 return; 5703 phba->cgn_evt_timestamp = jiffies + 5704 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 5705 phba->cgn_evt_minute++; 5706 5707 /* We should get to this point in the routine on 1 minute intervals */ 5708 5709 ktime_get_real_ts64(&cur_time); 5710 time64_to_tm(cur_time.tv_sec, 0, &broken); 5711 5712 if (phba->cgn_fpin_frequency && 5713 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5714 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5715 cp->cgn_stat_npm = value; 5716 } 5717 5718 /* Read and clear the latency counters for this minute */ 5719 lvalue = atomic_read(&phba->cgn_latency_evt_cnt); 5720 latsum = atomic64_read(&phba->cgn_latency_evt); 5721 atomic_set(&phba->cgn_latency_evt_cnt, 0); 5722 atomic64_set(&phba->cgn_latency_evt, 0); 5723 5724 /* We need to store MB/sec bandwidth in the congestion information. 5725 * block_cnt is count of 512 byte blocks for the entire minute, 5726 * bps will get bytes per sec before finally converting to MB/sec. 5727 */ 5728 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512; 5729 phba->rx_block_cnt = 0; 5730 mvalue = bps / (1024 * 1024); /* convert to MB/sec */ 5731 5732 /* Every minute */ 5733 /* cgn parameters */ 5734 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 5735 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 5736 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 5737 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 5738 5739 /* Fill in default LUN qdepth */ 5740 value = (uint16_t)(phba->pport->cfg_lun_queue_depth); 5741 cp->cgn_lunq = cpu_to_le16(value); 5742 5743 /* Record congestion buffer info - every minute 5744 * cgn_driver_evt_cnt (Driver events) 5745 * cgn_fabric_warn_cnt (Congestion Warnings) 5746 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency) 5747 * cgn_fabric_alarm_cnt (Congestion Alarms) 5748 */ 5749 index = ++cp->cgn_index_minute; 5750 if (cp->cgn_index_minute == LPFC_MIN_HOUR) { 5751 cp->cgn_index_minute = 0; 5752 index = 0; 5753 } 5754 5755 /* Get the number of driver events in this sample and reset counter */ 5756 dvalue = atomic_read(&phba->cgn_driver_evt_cnt); 5757 atomic_set(&phba->cgn_driver_evt_cnt, 0); 5758 5759 /* Get the number of warning events - FPIN and Signal for this minute */ 5760 wvalue = 0; 5761 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) || 5762 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 5763 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5764 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt); 5765 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 5766 5767 /* Get the number of alarm events - FPIN and Signal for this minute */ 5768 avalue = 0; 5769 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) || 5770 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5771 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt); 5772 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 5773 5774 /* Collect the driver, warning, alarm and latency counts for this 5775 * minute into the driver congestion buffer. 5776 */ 5777 ptr = &cp->cgn_drvr_min[index]; 5778 value = (uint16_t)dvalue; 5779 *ptr = cpu_to_le16(value); 5780 5781 ptr = &cp->cgn_warn_min[index]; 5782 value = (uint16_t)wvalue; 5783 *ptr = cpu_to_le16(value); 5784 5785 ptr = &cp->cgn_alarm_min[index]; 5786 value = (uint16_t)avalue; 5787 *ptr = cpu_to_le16(value); 5788 5789 lptr = &cp->cgn_latency_min[index]; 5790 if (lvalue) { 5791 lvalue = (uint32_t)div_u64(latsum, lvalue); 5792 *lptr = cpu_to_le32(lvalue); 5793 } else { 5794 *lptr = 0; 5795 } 5796 5797 /* Collect the bandwidth value into the driver's congesion buffer. */ 5798 mptr = &cp->cgn_bw_min[index]; 5799 *mptr = cpu_to_le16(mvalue); 5800 5801 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5802 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n", 5803 index, dvalue, wvalue, *lptr, mvalue, avalue); 5804 5805 /* Every hour */ 5806 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) { 5807 /* Record congestion buffer info - every hour 5808 * Collapse all minutes into an hour 5809 */ 5810 index = ++cp->cgn_index_hour; 5811 if (cp->cgn_index_hour == LPFC_HOUR_DAY) { 5812 cp->cgn_index_hour = 0; 5813 index = 0; 5814 } 5815 5816 dvalue = 0; 5817 wvalue = 0; 5818 lvalue = 0; 5819 avalue = 0; 5820 mvalue = 0; 5821 mbps = 0; 5822 for (i = 0; i < LPFC_MIN_HOUR; i++) { 5823 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]); 5824 wvalue += le16_to_cpu(cp->cgn_warn_min[i]); 5825 lvalue += le32_to_cpu(cp->cgn_latency_min[i]); 5826 mbps += le16_to_cpu(cp->cgn_bw_min[i]); 5827 avalue += le16_to_cpu(cp->cgn_alarm_min[i]); 5828 } 5829 if (lvalue) /* Avg of latency averages */ 5830 lvalue /= LPFC_MIN_HOUR; 5831 if (mbps) /* Avg of Bandwidth averages */ 5832 mvalue = mbps / LPFC_MIN_HOUR; 5833 5834 lptr = &cp->cgn_drvr_hr[index]; 5835 *lptr = cpu_to_le32(dvalue); 5836 lptr = &cp->cgn_warn_hr[index]; 5837 *lptr = cpu_to_le32(wvalue); 5838 lptr = &cp->cgn_latency_hr[index]; 5839 *lptr = cpu_to_le32(lvalue); 5840 mptr = &cp->cgn_bw_hr[index]; 5841 *mptr = cpu_to_le16(mvalue); 5842 lptr = &cp->cgn_alarm_hr[index]; 5843 *lptr = cpu_to_le32(avalue); 5844 5845 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5846 "2419 Congestion Info - hour " 5847 "(%d): %d %d %d %d %d\n", 5848 index, dvalue, wvalue, lvalue, mvalue, avalue); 5849 } 5850 5851 /* Every day */ 5852 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) { 5853 /* Record congestion buffer info - every hour 5854 * Collapse all hours into a day. Rotate days 5855 * after LPFC_MAX_CGN_DAYS. 5856 */ 5857 index = ++cp->cgn_index_day; 5858 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) { 5859 cp->cgn_index_day = 0; 5860 index = 0; 5861 } 5862 5863 /* Anytime we overwrite daily index 0, after we wrap, 5864 * we will be overwriting the oldest day, so we must 5865 * update the congestion data start time for that day. 5866 * That start time should have previously been saved after 5867 * we wrote the last days worth of data. 5868 */ 5869 if ((phba->hba_flag & HBA_CGN_DAY_WRAP) && index == 0) { 5870 time64_to_tm(phba->cgn_daily_ts.tv_sec, 0, &broken); 5871 5872 cp->cgn_info_month = broken.tm_mon + 1; 5873 cp->cgn_info_day = broken.tm_mday; 5874 cp->cgn_info_year = broken.tm_year - 100; 5875 cp->cgn_info_hour = broken.tm_hour; 5876 cp->cgn_info_minute = broken.tm_min; 5877 cp->cgn_info_second = broken.tm_sec; 5878 5879 lpfc_printf_log 5880 (phba, KERN_INFO, LOG_CGN_MGMT, 5881 "2646 CGNInfo idx0 Start Time: " 5882 "%d/%d/%d %d:%d:%d\n", 5883 cp->cgn_info_day, cp->cgn_info_month, 5884 cp->cgn_info_year, cp->cgn_info_hour, 5885 cp->cgn_info_minute, cp->cgn_info_second); 5886 } 5887 5888 dvalue = 0; 5889 wvalue = 0; 5890 lvalue = 0; 5891 mvalue = 0; 5892 mbps = 0; 5893 avalue = 0; 5894 for (i = 0; i < LPFC_HOUR_DAY; i++) { 5895 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]); 5896 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]); 5897 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]); 5898 mbps += le16_to_cpu(cp->cgn_bw_hr[i]); 5899 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]); 5900 } 5901 if (lvalue) /* Avg of latency averages */ 5902 lvalue /= LPFC_HOUR_DAY; 5903 if (mbps) /* Avg of Bandwidth averages */ 5904 mvalue = mbps / LPFC_HOUR_DAY; 5905 5906 lptr = &cp->cgn_drvr_day[index]; 5907 *lptr = cpu_to_le32(dvalue); 5908 lptr = &cp->cgn_warn_day[index]; 5909 *lptr = cpu_to_le32(wvalue); 5910 lptr = &cp->cgn_latency_day[index]; 5911 *lptr = cpu_to_le32(lvalue); 5912 mptr = &cp->cgn_bw_day[index]; 5913 *mptr = cpu_to_le16(mvalue); 5914 lptr = &cp->cgn_alarm_day[index]; 5915 *lptr = cpu_to_le32(avalue); 5916 5917 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5918 "2420 Congestion Info - daily (%d): " 5919 "%d %d %d %d %d\n", 5920 index, dvalue, wvalue, lvalue, mvalue, avalue); 5921 5922 /* We just wrote LPFC_MAX_CGN_DAYS of data, 5923 * so we are wrapped on any data after this. 5924 * Save this as the start time for the next day. 5925 */ 5926 if (index == (LPFC_MAX_CGN_DAYS - 1)) { 5927 phba->hba_flag |= HBA_CGN_DAY_WRAP; 5928 ktime_get_real_ts64(&phba->cgn_daily_ts); 5929 } 5930 } 5931 5932 /* Use the frequency found in the last rcv'ed FPIN */ 5933 value = phba->cgn_fpin_frequency; 5934 cp->cgn_warn_freq = cpu_to_le16(value); 5935 cp->cgn_alarm_freq = cpu_to_le16(value); 5936 5937 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5938 LPFC_CGN_CRC32_SEED); 5939 cp->cgn_info_crc = cpu_to_le32(lvalue); 5940 } 5941 5942 /** 5943 * lpfc_calc_cmf_latency - latency from start of rxate timer interval 5944 * @phba: The Hba for which this call is being executed. 5945 * 5946 * The routine calculates the latency from the beginning of the CMF timer 5947 * interval to the current point in time. It is called from IO completion 5948 * when we exceed our Bandwidth limitation for the time interval. 5949 */ 5950 uint32_t 5951 lpfc_calc_cmf_latency(struct lpfc_hba *phba) 5952 { 5953 struct timespec64 cmpl_time; 5954 uint32_t msec = 0; 5955 5956 ktime_get_real_ts64(&cmpl_time); 5957 5958 /* This routine works on a ms granularity so sec and usec are 5959 * converted accordingly. 5960 */ 5961 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) { 5962 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / 5963 NSEC_PER_MSEC; 5964 } else { 5965 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) { 5966 msec = (cmpl_time.tv_sec - 5967 phba->cmf_latency.tv_sec) * MSEC_PER_SEC; 5968 msec += ((cmpl_time.tv_nsec - 5969 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC); 5970 } else { 5971 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec - 5972 1) * MSEC_PER_SEC; 5973 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) + 5974 cmpl_time.tv_nsec) / NSEC_PER_MSEC); 5975 } 5976 } 5977 return msec; 5978 } 5979 5980 /** 5981 * lpfc_cmf_timer - This is the timer function for one congestion 5982 * rate interval. 5983 * @timer: Pointer to the high resolution timer that expired 5984 */ 5985 static enum hrtimer_restart 5986 lpfc_cmf_timer(struct hrtimer *timer) 5987 { 5988 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba, 5989 cmf_timer); 5990 struct rx_info_entry entry; 5991 uint32_t io_cnt; 5992 uint32_t busy, max_read; 5993 uint64_t total, rcv, lat, mbpi, extra, cnt; 5994 int timer_interval = LPFC_CMF_INTERVAL; 5995 uint32_t ms; 5996 struct lpfc_cgn_stat *cgs; 5997 int cpu; 5998 5999 /* Only restart the timer if congestion mgmt is on */ 6000 if (phba->cmf_active_mode == LPFC_CFG_OFF || 6001 !phba->cmf_latency.tv_sec) { 6002 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 6003 "6224 CMF timer exit: %d %lld\n", 6004 phba->cmf_active_mode, 6005 (uint64_t)phba->cmf_latency.tv_sec); 6006 return HRTIMER_NORESTART; 6007 } 6008 6009 /* If pport is not ready yet, just exit and wait for 6010 * the next timer cycle to hit. 6011 */ 6012 if (!phba->pport) 6013 goto skip; 6014 6015 /* Do not block SCSI IO while in the timer routine since 6016 * total_bytes will be cleared 6017 */ 6018 atomic_set(&phba->cmf_stop_io, 1); 6019 6020 /* First we need to calculate the actual ms between 6021 * the last timer interrupt and this one. We ask for 6022 * LPFC_CMF_INTERVAL, however the actual time may 6023 * vary depending on system overhead. 6024 */ 6025 ms = lpfc_calc_cmf_latency(phba); 6026 6027 6028 /* Immediately after we calculate the time since the last 6029 * timer interrupt, set the start time for the next 6030 * interrupt 6031 */ 6032 ktime_get_real_ts64(&phba->cmf_latency); 6033 6034 phba->cmf_link_byte_count = 6035 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000); 6036 6037 /* Collect all the stats from the prior timer interval */ 6038 total = 0; 6039 io_cnt = 0; 6040 lat = 0; 6041 rcv = 0; 6042 for_each_present_cpu(cpu) { 6043 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 6044 total += atomic64_xchg(&cgs->total_bytes, 0); 6045 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0); 6046 lat += atomic64_xchg(&cgs->rx_latency, 0); 6047 rcv += atomic64_xchg(&cgs->rcv_bytes, 0); 6048 } 6049 6050 /* Before we issue another CMF_SYNC_WQE, retrieve the BW 6051 * returned from the last CMF_SYNC_WQE issued, from 6052 * cmf_last_sync_bw. This will be the target BW for 6053 * this next timer interval. 6054 */ 6055 if (phba->cmf_active_mode == LPFC_CFG_MANAGED && 6056 phba->link_state != LPFC_LINK_DOWN && 6057 phba->hba_flag & HBA_SETUP) { 6058 mbpi = phba->cmf_last_sync_bw; 6059 phba->cmf_last_sync_bw = 0; 6060 extra = 0; 6061 6062 /* Calculate any extra bytes needed to account for the 6063 * timer accuracy. If we are less than LPFC_CMF_INTERVAL 6064 * calculate the adjustment needed for total to reflect 6065 * a full LPFC_CMF_INTERVAL. 6066 */ 6067 if (ms && ms < LPFC_CMF_INTERVAL) { 6068 cnt = div_u64(total, ms); /* bytes per ms */ 6069 cnt *= LPFC_CMF_INTERVAL; /* what total should be */ 6070 6071 /* If the timeout is scheduled to be shorter, 6072 * this value may skew the data, so cap it at mbpi. 6073 */ 6074 if ((phba->hba_flag & HBA_SHORT_CMF) && cnt > mbpi) 6075 cnt = mbpi; 6076 6077 extra = cnt - total; 6078 } 6079 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra); 6080 } else { 6081 /* For Monitor mode or link down we want mbpi 6082 * to be the full link speed 6083 */ 6084 mbpi = phba->cmf_link_byte_count; 6085 extra = 0; 6086 } 6087 phba->cmf_timer_cnt++; 6088 6089 if (io_cnt) { 6090 /* Update congestion info buffer latency in us */ 6091 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt); 6092 atomic64_add(lat, &phba->cgn_latency_evt); 6093 } 6094 busy = atomic_xchg(&phba->cmf_busy, 0); 6095 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0); 6096 6097 /* Calculate MBPI for the next timer interval */ 6098 if (mbpi) { 6099 if (mbpi > phba->cmf_link_byte_count || 6100 phba->cmf_active_mode == LPFC_CFG_MONITOR) 6101 mbpi = phba->cmf_link_byte_count; 6102 6103 /* Change max_bytes_per_interval to what the prior 6104 * CMF_SYNC_WQE cmpl indicated. 6105 */ 6106 if (mbpi != phba->cmf_max_bytes_per_interval) 6107 phba->cmf_max_bytes_per_interval = mbpi; 6108 } 6109 6110 /* Save rxmonitor information for debug */ 6111 if (phba->rx_monitor) { 6112 entry.total_bytes = total; 6113 entry.cmf_bytes = total + extra; 6114 entry.rcv_bytes = rcv; 6115 entry.cmf_busy = busy; 6116 entry.cmf_info = phba->cmf_active_info; 6117 if (io_cnt) { 6118 entry.avg_io_latency = div_u64(lat, io_cnt); 6119 entry.avg_io_size = div_u64(rcv, io_cnt); 6120 } else { 6121 entry.avg_io_latency = 0; 6122 entry.avg_io_size = 0; 6123 } 6124 entry.max_read_cnt = max_read; 6125 entry.io_cnt = io_cnt; 6126 entry.max_bytes_per_interval = mbpi; 6127 if (phba->cmf_active_mode == LPFC_CFG_MANAGED) 6128 entry.timer_utilization = phba->cmf_last_ts; 6129 else 6130 entry.timer_utilization = ms; 6131 entry.timer_interval = ms; 6132 phba->cmf_last_ts = 0; 6133 6134 lpfc_rx_monitor_record(phba->rx_monitor, &entry); 6135 } 6136 6137 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) { 6138 /* If Monitor mode, check if we are oversubscribed 6139 * against the full line rate. 6140 */ 6141 if (mbpi && total > mbpi) 6142 atomic_inc(&phba->cgn_driver_evt_cnt); 6143 } 6144 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ 6145 6146 /* Each minute save Fabric and Driver congestion information */ 6147 lpfc_cgn_save_evt_cnt(phba); 6148 6149 phba->hba_flag &= ~HBA_SHORT_CMF; 6150 6151 /* Since we need to call lpfc_cgn_save_evt_cnt every minute, on the 6152 * minute, adjust our next timer interval, if needed, to ensure a 6153 * 1 minute granularity when we get the next timer interrupt. 6154 */ 6155 if (time_after(jiffies + msecs_to_jiffies(LPFC_CMF_INTERVAL), 6156 phba->cgn_evt_timestamp)) { 6157 timer_interval = jiffies_to_msecs(phba->cgn_evt_timestamp - 6158 jiffies); 6159 if (timer_interval <= 0) 6160 timer_interval = LPFC_CMF_INTERVAL; 6161 else 6162 phba->hba_flag |= HBA_SHORT_CMF; 6163 6164 /* If we adjust timer_interval, max_bytes_per_interval 6165 * needs to be adjusted as well. 6166 */ 6167 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 6168 timer_interval, 1000); 6169 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) 6170 phba->cmf_max_bytes_per_interval = 6171 phba->cmf_link_byte_count; 6172 } 6173 6174 /* Since total_bytes has already been zero'ed, its okay to unblock 6175 * after max_bytes_per_interval is setup. 6176 */ 6177 if (atomic_xchg(&phba->cmf_bw_wait, 0)) 6178 queue_work(phba->wq, &phba->unblock_request_work); 6179 6180 /* SCSI IO is now unblocked */ 6181 atomic_set(&phba->cmf_stop_io, 0); 6182 6183 skip: 6184 hrtimer_forward_now(timer, 6185 ktime_set(0, timer_interval * NSEC_PER_MSEC)); 6186 return HRTIMER_RESTART; 6187 } 6188 6189 #define trunk_link_status(__idx)\ 6190 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6191 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ 6192 "Link up" : "Link down") : "NA" 6193 /* Did port __idx reported an error */ 6194 #define trunk_port_fault(__idx)\ 6195 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6196 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" 6197 6198 static void 6199 lpfc_update_trunk_link_status(struct lpfc_hba *phba, 6200 struct lpfc_acqe_fc_la *acqe_fc) 6201 { 6202 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); 6203 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); 6204 u8 cnt = 0; 6205 6206 phba->sli4_hba.link_state.speed = 6207 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6208 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6209 6210 phba->sli4_hba.link_state.logical_speed = 6211 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6212 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ 6213 phba->fc_linkspeed = 6214 lpfc_async_link_speed_to_read_top( 6215 phba, 6216 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6217 6218 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { 6219 phba->trunk_link.link0.state = 6220 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) 6221 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6222 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; 6223 cnt++; 6224 } 6225 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { 6226 phba->trunk_link.link1.state = 6227 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) 6228 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6229 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; 6230 cnt++; 6231 } 6232 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { 6233 phba->trunk_link.link2.state = 6234 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) 6235 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6236 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; 6237 cnt++; 6238 } 6239 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { 6240 phba->trunk_link.link3.state = 6241 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) 6242 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6243 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; 6244 cnt++; 6245 } 6246 6247 if (cnt) 6248 phba->trunk_link.phy_lnk_speed = 6249 phba->sli4_hba.link_state.logical_speed / (cnt * 1000); 6250 else 6251 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN; 6252 6253 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6254 "2910 Async FC Trunking Event - Speed:%d\n" 6255 "\tLogical speed:%d " 6256 "port0: %s port1: %s port2: %s port3: %s\n", 6257 phba->sli4_hba.link_state.speed, 6258 phba->sli4_hba.link_state.logical_speed, 6259 trunk_link_status(0), trunk_link_status(1), 6260 trunk_link_status(2), trunk_link_status(3)); 6261 6262 if (phba->cmf_active_mode != LPFC_CFG_OFF) 6263 lpfc_cmf_signal_init(phba); 6264 6265 if (port_fault) 6266 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6267 "3202 trunk error:0x%x (%s) seen on port0:%s " 6268 /* 6269 * SLI-4: We have only 0xA error codes 6270 * defined as of now. print an appropriate 6271 * message in case driver needs to be updated. 6272 */ 6273 "port1:%s port2:%s port3:%s\n", err, err > 0xA ? 6274 "UNDEFINED. update driver." : trunk_errmsg[err], 6275 trunk_port_fault(0), trunk_port_fault(1), 6276 trunk_port_fault(2), trunk_port_fault(3)); 6277 } 6278 6279 6280 /** 6281 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event 6282 * @phba: pointer to lpfc hba data structure. 6283 * @acqe_fc: pointer to the async fc completion queue entry. 6284 * 6285 * This routine is to handle the SLI4 asynchronous FC event. It will simply log 6286 * that the event was received and then issue a read_topology mailbox command so 6287 * that the rest of the driver will treat it the same as SLI3. 6288 **/ 6289 static void 6290 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) 6291 { 6292 LPFC_MBOXQ_t *pmb; 6293 MAILBOX_t *mb; 6294 struct lpfc_mbx_read_top *la; 6295 char *log_level; 6296 int rc; 6297 6298 if (bf_get(lpfc_trailer_type, acqe_fc) != 6299 LPFC_FC_LA_EVENT_TYPE_FC_LINK) { 6300 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6301 "2895 Non FC link Event detected.(%d)\n", 6302 bf_get(lpfc_trailer_type, acqe_fc)); 6303 return; 6304 } 6305 6306 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6307 LPFC_FC_LA_TYPE_TRUNKING_EVENT) { 6308 lpfc_update_trunk_link_status(phba, acqe_fc); 6309 return; 6310 } 6311 6312 /* Keep the link status for extra SLI4 state machine reference */ 6313 phba->sli4_hba.link_state.speed = 6314 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6315 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6316 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; 6317 phba->sli4_hba.link_state.topology = 6318 bf_get(lpfc_acqe_fc_la_topology, acqe_fc); 6319 phba->sli4_hba.link_state.status = 6320 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); 6321 phba->sli4_hba.link_state.type = 6322 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); 6323 phba->sli4_hba.link_state.number = 6324 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); 6325 phba->sli4_hba.link_state.fault = 6326 bf_get(lpfc_acqe_link_fault, acqe_fc); 6327 phba->sli4_hba.link_state.link_status = 6328 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc); 6329 6330 /* 6331 * Only select attention types need logical speed modification to what 6332 * was previously set. 6333 */ 6334 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP && 6335 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6336 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6337 LPFC_FC_LA_TYPE_LINK_DOWN) 6338 phba->sli4_hba.link_state.logical_speed = 0; 6339 else if (!phba->sli4_hba.conf_trunk) 6340 phba->sli4_hba.link_state.logical_speed = 6341 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6342 } 6343 6344 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6345 "2896 Async FC event - Speed:%dGBaud Topology:x%x " 6346 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" 6347 "%dMbps Fault:x%x Link Status:x%x\n", 6348 phba->sli4_hba.link_state.speed, 6349 phba->sli4_hba.link_state.topology, 6350 phba->sli4_hba.link_state.status, 6351 phba->sli4_hba.link_state.type, 6352 phba->sli4_hba.link_state.number, 6353 phba->sli4_hba.link_state.logical_speed, 6354 phba->sli4_hba.link_state.fault, 6355 phba->sli4_hba.link_state.link_status); 6356 6357 /* 6358 * The following attention types are informational only, providing 6359 * further details about link status. Overwrite the value of 6360 * link_state.status appropriately. No further action is required. 6361 */ 6362 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6363 switch (phba->sli4_hba.link_state.status) { 6364 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 6365 log_level = KERN_WARNING; 6366 phba->sli4_hba.link_state.status = 6367 LPFC_FC_LA_TYPE_LINK_DOWN; 6368 break; 6369 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 6370 /* 6371 * During bb credit recovery establishment, receiving 6372 * this attention type is normal. Link Up attention 6373 * type is expected to occur before this informational 6374 * attention type so keep the Link Up status. 6375 */ 6376 log_level = KERN_INFO; 6377 phba->sli4_hba.link_state.status = 6378 LPFC_FC_LA_TYPE_LINK_UP; 6379 break; 6380 default: 6381 log_level = KERN_INFO; 6382 break; 6383 } 6384 lpfc_log_msg(phba, log_level, LOG_SLI, 6385 "2992 Async FC event - Informational Link " 6386 "Attention Type x%x\n", 6387 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc)); 6388 return; 6389 } 6390 6391 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6392 if (!pmb) { 6393 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6394 "2897 The mboxq allocation failed\n"); 6395 return; 6396 } 6397 rc = lpfc_mbox_rsrc_prep(phba, pmb); 6398 if (rc) { 6399 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6400 "2898 The mboxq prep failed\n"); 6401 goto out_free_pmb; 6402 } 6403 6404 /* Cleanup any outstanding ELS commands */ 6405 lpfc_els_flush_all_cmd(phba); 6406 6407 /* Block ELS IOCBs until we have done process link event */ 6408 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 6409 6410 /* Update link event statistics */ 6411 phba->sli.slistat.link_event++; 6412 6413 /* Create lpfc_handle_latt mailbox command from link ACQE */ 6414 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 6415 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 6416 pmb->vport = phba->pport; 6417 6418 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { 6419 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); 6420 6421 switch (phba->sli4_hba.link_state.status) { 6422 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: 6423 phba->link_flag |= LS_MDS_LINK_DOWN; 6424 break; 6425 case LPFC_FC_LA_TYPE_MDS_LOOPBACK: 6426 phba->link_flag |= LS_MDS_LOOPBACK; 6427 break; 6428 default: 6429 break; 6430 } 6431 6432 /* Initialize completion status */ 6433 mb = &pmb->u.mb; 6434 mb->mbxStatus = MBX_SUCCESS; 6435 6436 /* Parse port fault information field */ 6437 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); 6438 6439 /* Parse and translate link attention fields */ 6440 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; 6441 la->eventTag = acqe_fc->event_tag; 6442 6443 if (phba->sli4_hba.link_state.status == 6444 LPFC_FC_LA_TYPE_UNEXP_WWPN) { 6445 bf_set(lpfc_mbx_read_top_att_type, la, 6446 LPFC_FC_LA_TYPE_UNEXP_WWPN); 6447 } else { 6448 bf_set(lpfc_mbx_read_top_att_type, la, 6449 LPFC_FC_LA_TYPE_LINK_DOWN); 6450 } 6451 /* Invoke the mailbox command callback function */ 6452 lpfc_mbx_cmpl_read_topology(phba, pmb); 6453 6454 return; 6455 } 6456 6457 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 6458 if (rc == MBX_NOT_FINISHED) 6459 goto out_free_pmb; 6460 return; 6461 6462 out_free_pmb: 6463 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 6464 } 6465 6466 /** 6467 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event 6468 * @phba: pointer to lpfc hba data structure. 6469 * @acqe_sli: pointer to the async SLI completion queue entry. 6470 * 6471 * This routine is to handle the SLI4 asynchronous SLI events. 6472 **/ 6473 static void 6474 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) 6475 { 6476 char port_name; 6477 char message[128]; 6478 uint8_t status; 6479 uint8_t evt_type; 6480 uint8_t operational = 0; 6481 struct temp_event temp_event_data; 6482 struct lpfc_acqe_misconfigured_event *misconfigured; 6483 struct lpfc_acqe_cgn_signal *cgn_signal; 6484 struct Scsi_Host *shost; 6485 struct lpfc_vport **vports; 6486 int rc, i, cnt; 6487 6488 evt_type = bf_get(lpfc_trailer_type, acqe_sli); 6489 6490 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6491 "2901 Async SLI event - Type:%d, Event Data: x%08x " 6492 "x%08x x%08x x%08x\n", evt_type, 6493 acqe_sli->event_data1, acqe_sli->event_data2, 6494 acqe_sli->event_data3, acqe_sli->trailer); 6495 6496 port_name = phba->Port[0]; 6497 if (port_name == 0x00) 6498 port_name = '?'; /* get port name is empty */ 6499 6500 switch (evt_type) { 6501 case LPFC_SLI_EVENT_TYPE_OVER_TEMP: 6502 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6503 temp_event_data.event_code = LPFC_THRESHOLD_TEMP; 6504 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6505 6506 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6507 "3190 Over Temperature:%d Celsius- Port Name %c\n", 6508 acqe_sli->event_data1, port_name); 6509 6510 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 6511 shost = lpfc_shost_from_vport(phba->pport); 6512 fc_host_post_vendor_event(shost, fc_get_event_number(), 6513 sizeof(temp_event_data), 6514 (char *)&temp_event_data, 6515 SCSI_NL_VID_TYPE_PCI 6516 | PCI_VENDOR_ID_EMULEX); 6517 break; 6518 case LPFC_SLI_EVENT_TYPE_NORM_TEMP: 6519 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6520 temp_event_data.event_code = LPFC_NORMAL_TEMP; 6521 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6522 6523 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT, 6524 "3191 Normal Temperature:%d Celsius - Port Name %c\n", 6525 acqe_sli->event_data1, port_name); 6526 6527 shost = lpfc_shost_from_vport(phba->pport); 6528 fc_host_post_vendor_event(shost, fc_get_event_number(), 6529 sizeof(temp_event_data), 6530 (char *)&temp_event_data, 6531 SCSI_NL_VID_TYPE_PCI 6532 | PCI_VENDOR_ID_EMULEX); 6533 break; 6534 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: 6535 misconfigured = (struct lpfc_acqe_misconfigured_event *) 6536 &acqe_sli->event_data1; 6537 6538 /* fetch the status for this port */ 6539 switch (phba->sli4_hba.lnk_info.lnk_no) { 6540 case LPFC_LINK_NUMBER_0: 6541 status = bf_get(lpfc_sli_misconfigured_port0_state, 6542 &misconfigured->theEvent); 6543 operational = bf_get(lpfc_sli_misconfigured_port0_op, 6544 &misconfigured->theEvent); 6545 break; 6546 case LPFC_LINK_NUMBER_1: 6547 status = bf_get(lpfc_sli_misconfigured_port1_state, 6548 &misconfigured->theEvent); 6549 operational = bf_get(lpfc_sli_misconfigured_port1_op, 6550 &misconfigured->theEvent); 6551 break; 6552 case LPFC_LINK_NUMBER_2: 6553 status = bf_get(lpfc_sli_misconfigured_port2_state, 6554 &misconfigured->theEvent); 6555 operational = bf_get(lpfc_sli_misconfigured_port2_op, 6556 &misconfigured->theEvent); 6557 break; 6558 case LPFC_LINK_NUMBER_3: 6559 status = bf_get(lpfc_sli_misconfigured_port3_state, 6560 &misconfigured->theEvent); 6561 operational = bf_get(lpfc_sli_misconfigured_port3_op, 6562 &misconfigured->theEvent); 6563 break; 6564 default: 6565 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6566 "3296 " 6567 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " 6568 "event: Invalid link %d", 6569 phba->sli4_hba.lnk_info.lnk_no); 6570 return; 6571 } 6572 6573 /* Skip if optic state unchanged */ 6574 if (phba->sli4_hba.lnk_info.optic_state == status) 6575 return; 6576 6577 switch (status) { 6578 case LPFC_SLI_EVENT_STATUS_VALID: 6579 sprintf(message, "Physical Link is functional"); 6580 break; 6581 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: 6582 sprintf(message, "Optics faulted/incorrectly " 6583 "installed/not installed - Reseat optics, " 6584 "if issue not resolved, replace."); 6585 break; 6586 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: 6587 sprintf(message, 6588 "Optics of two types installed - Remove one " 6589 "optic or install matching pair of optics."); 6590 break; 6591 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: 6592 sprintf(message, "Incompatible optics - Replace with " 6593 "compatible optics for card to function."); 6594 break; 6595 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: 6596 sprintf(message, "Unqualified optics - Replace with " 6597 "Avago optics for Warranty and Technical " 6598 "Support - Link is%s operational", 6599 (operational) ? " not" : ""); 6600 break; 6601 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: 6602 sprintf(message, "Uncertified optics - Replace with " 6603 "Avago-certified optics to enable link " 6604 "operation - Link is%s operational", 6605 (operational) ? " not" : ""); 6606 break; 6607 default: 6608 /* firmware is reporting a status we don't know about */ 6609 sprintf(message, "Unknown event status x%02x", status); 6610 break; 6611 } 6612 6613 /* Issue READ_CONFIG mbox command to refresh supported speeds */ 6614 rc = lpfc_sli4_read_config(phba); 6615 if (rc) { 6616 phba->lmt = 0; 6617 lpfc_printf_log(phba, KERN_ERR, 6618 LOG_TRACE_EVENT, 6619 "3194 Unable to retrieve supported " 6620 "speeds, rc = 0x%x\n", rc); 6621 } 6622 rc = lpfc_sli4_refresh_params(phba); 6623 if (rc) { 6624 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6625 "3174 Unable to update pls support, " 6626 "rc x%x\n", rc); 6627 } 6628 vports = lpfc_create_vport_work_array(phba); 6629 if (vports != NULL) { 6630 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6631 i++) { 6632 shost = lpfc_shost_from_vport(vports[i]); 6633 lpfc_host_supported_speeds_set(shost); 6634 } 6635 } 6636 lpfc_destroy_vport_work_array(phba, vports); 6637 6638 phba->sli4_hba.lnk_info.optic_state = status; 6639 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6640 "3176 Port Name %c %s\n", port_name, message); 6641 break; 6642 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: 6643 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6644 "3192 Remote DPort Test Initiated - " 6645 "Event Data1:x%08x Event Data2: x%08x\n", 6646 acqe_sli->event_data1, acqe_sli->event_data2); 6647 break; 6648 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG: 6649 /* Call FW to obtain active parms */ 6650 lpfc_sli4_cgn_parm_chg_evt(phba); 6651 break; 6652 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: 6653 /* Misconfigured WWN. Reports that the SLI Port is configured 6654 * to use FA-WWN, but the attached device doesn’t support it. 6655 * Event Data1 - N.A, Event Data2 - N.A 6656 * This event only happens on the physical port. 6657 */ 6658 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY, 6659 "2699 Misconfigured FA-PWWN - Attached device " 6660 "does not support FA-PWWN\n"); 6661 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; 6662 memset(phba->pport->fc_portname.u.wwn, 0, 6663 sizeof(struct lpfc_name)); 6664 break; 6665 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: 6666 /* EEPROM failure. No driver action is required */ 6667 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6668 "2518 EEPROM failure - " 6669 "Event Data1: x%08x Event Data2: x%08x\n", 6670 acqe_sli->event_data1, acqe_sli->event_data2); 6671 break; 6672 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL: 6673 if (phba->cmf_active_mode == LPFC_CFG_OFF) 6674 break; 6675 cgn_signal = (struct lpfc_acqe_cgn_signal *) 6676 &acqe_sli->event_data1; 6677 phba->cgn_acqe_cnt++; 6678 6679 cnt = bf_get(lpfc_warn_acqe, cgn_signal); 6680 atomic64_add(cnt, &phba->cgn_acqe_stat.warn); 6681 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm); 6682 6683 /* no threshold for CMF, even 1 signal will trigger an event */ 6684 6685 /* Alarm overrides warning, so check that first */ 6686 if (cgn_signal->alarm_cnt) { 6687 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6688 /* Keep track of alarm cnt for CMF_SYNC_WQE */ 6689 atomic_add(cgn_signal->alarm_cnt, 6690 &phba->cgn_sync_alarm_cnt); 6691 } 6692 } else if (cnt) { 6693 /* signal action needs to be taken */ 6694 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 6695 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6696 /* Keep track of warning cnt for CMF_SYNC_WQE */ 6697 atomic_add(cnt, &phba->cgn_sync_warn_cnt); 6698 } 6699 } 6700 break; 6701 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL: 6702 /* May be accompanied by a temperature event */ 6703 lpfc_printf_log(phba, KERN_INFO, 6704 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT, 6705 "2902 Remote Degrade Signaling: x%08x x%08x " 6706 "x%08x\n", 6707 acqe_sli->event_data1, acqe_sli->event_data2, 6708 acqe_sli->event_data3); 6709 break; 6710 default: 6711 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6712 "3193 Unrecognized SLI event, type: 0x%x", 6713 evt_type); 6714 break; 6715 } 6716 } 6717 6718 /** 6719 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport 6720 * @vport: pointer to vport data structure. 6721 * 6722 * This routine is to perform Clear Virtual Link (CVL) on a vport in 6723 * response to a CVL event. 6724 * 6725 * Return the pointer to the ndlp with the vport if successful, otherwise 6726 * return NULL. 6727 **/ 6728 static struct lpfc_nodelist * 6729 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) 6730 { 6731 struct lpfc_nodelist *ndlp; 6732 struct Scsi_Host *shost; 6733 struct lpfc_hba *phba; 6734 6735 if (!vport) 6736 return NULL; 6737 phba = vport->phba; 6738 if (!phba) 6739 return NULL; 6740 ndlp = lpfc_findnode_did(vport, Fabric_DID); 6741 if (!ndlp) { 6742 /* Cannot find existing Fabric ndlp, so allocate a new one */ 6743 ndlp = lpfc_nlp_init(vport, Fabric_DID); 6744 if (!ndlp) 6745 return NULL; 6746 /* Set the node type */ 6747 ndlp->nlp_type |= NLP_FABRIC; 6748 /* Put ndlp onto node list */ 6749 lpfc_enqueue_node(vport, ndlp); 6750 } 6751 if ((phba->pport->port_state < LPFC_FLOGI) && 6752 (phba->pport->port_state != LPFC_VPORT_FAILED)) 6753 return NULL; 6754 /* If virtual link is not yet instantiated ignore CVL */ 6755 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) 6756 && (vport->port_state != LPFC_VPORT_FAILED)) 6757 return NULL; 6758 shost = lpfc_shost_from_vport(vport); 6759 if (!shost) 6760 return NULL; 6761 lpfc_linkdown_port(vport); 6762 lpfc_cleanup_pending_mbox(vport); 6763 spin_lock_irq(shost->host_lock); 6764 vport->fc_flag |= FC_VPORT_CVL_RCVD; 6765 spin_unlock_irq(shost->host_lock); 6766 6767 return ndlp; 6768 } 6769 6770 /** 6771 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports 6772 * @phba: pointer to lpfc hba data structure. 6773 * 6774 * This routine is to perform Clear Virtual Link (CVL) on all vports in 6775 * response to a FCF dead event. 6776 **/ 6777 static void 6778 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) 6779 { 6780 struct lpfc_vport **vports; 6781 int i; 6782 6783 vports = lpfc_create_vport_work_array(phba); 6784 if (vports) 6785 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 6786 lpfc_sli4_perform_vport_cvl(vports[i]); 6787 lpfc_destroy_vport_work_array(phba, vports); 6788 } 6789 6790 /** 6791 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event 6792 * @phba: pointer to lpfc hba data structure. 6793 * @acqe_fip: pointer to the async fcoe completion queue entry. 6794 * 6795 * This routine is to handle the SLI4 asynchronous fcoe event. 6796 **/ 6797 static void 6798 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, 6799 struct lpfc_acqe_fip *acqe_fip) 6800 { 6801 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); 6802 int rc; 6803 struct lpfc_vport *vport; 6804 struct lpfc_nodelist *ndlp; 6805 int active_vlink_present; 6806 struct lpfc_vport **vports; 6807 int i; 6808 6809 phba->fc_eventTag = acqe_fip->event_tag; 6810 phba->fcoe_eventtag = acqe_fip->event_tag; 6811 switch (event_type) { 6812 case LPFC_FIP_EVENT_TYPE_NEW_FCF: 6813 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: 6814 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) 6815 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6816 "2546 New FCF event, evt_tag:x%x, " 6817 "index:x%x\n", 6818 acqe_fip->event_tag, 6819 acqe_fip->index); 6820 else 6821 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | 6822 LOG_DISCOVERY, 6823 "2788 FCF param modified event, " 6824 "evt_tag:x%x, index:x%x\n", 6825 acqe_fip->event_tag, 6826 acqe_fip->index); 6827 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6828 /* 6829 * During period of FCF discovery, read the FCF 6830 * table record indexed by the event to update 6831 * FCF roundrobin failover eligible FCF bmask. 6832 */ 6833 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6834 LOG_DISCOVERY, 6835 "2779 Read FCF (x%x) for updating " 6836 "roundrobin FCF failover bmask\n", 6837 acqe_fip->index); 6838 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); 6839 } 6840 6841 /* If the FCF discovery is in progress, do nothing. */ 6842 spin_lock_irq(&phba->hbalock); 6843 if (phba->hba_flag & FCF_TS_INPROG) { 6844 spin_unlock_irq(&phba->hbalock); 6845 break; 6846 } 6847 /* If fast FCF failover rescan event is pending, do nothing */ 6848 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { 6849 spin_unlock_irq(&phba->hbalock); 6850 break; 6851 } 6852 6853 /* If the FCF has been in discovered state, do nothing. */ 6854 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { 6855 spin_unlock_irq(&phba->hbalock); 6856 break; 6857 } 6858 spin_unlock_irq(&phba->hbalock); 6859 6860 /* Otherwise, scan the entire FCF table and re-discover SAN */ 6861 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6862 "2770 Start FCF table scan per async FCF " 6863 "event, evt_tag:x%x, index:x%x\n", 6864 acqe_fip->event_tag, acqe_fip->index); 6865 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 6866 LPFC_FCOE_FCF_GET_FIRST); 6867 if (rc) 6868 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6869 "2547 Issue FCF scan read FCF mailbox " 6870 "command failed (x%x)\n", rc); 6871 break; 6872 6873 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: 6874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6875 "2548 FCF Table full count 0x%x tag 0x%x\n", 6876 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), 6877 acqe_fip->event_tag); 6878 break; 6879 6880 case LPFC_FIP_EVENT_TYPE_FCF_DEAD: 6881 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6882 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6883 "2549 FCF (x%x) disconnected from network, " 6884 "tag:x%x\n", acqe_fip->index, 6885 acqe_fip->event_tag); 6886 /* 6887 * If we are in the middle of FCF failover process, clear 6888 * the corresponding FCF bit in the roundrobin bitmap. 6889 */ 6890 spin_lock_irq(&phba->hbalock); 6891 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && 6892 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { 6893 spin_unlock_irq(&phba->hbalock); 6894 /* Update FLOGI FCF failover eligible FCF bmask */ 6895 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); 6896 break; 6897 } 6898 spin_unlock_irq(&phba->hbalock); 6899 6900 /* If the event is not for currently used fcf do nothing */ 6901 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) 6902 break; 6903 6904 /* 6905 * Otherwise, request the port to rediscover the entire FCF 6906 * table for a fast recovery from case that the current FCF 6907 * is no longer valid as we are not in the middle of FCF 6908 * failover process already. 6909 */ 6910 spin_lock_irq(&phba->hbalock); 6911 /* Mark the fast failover process in progress */ 6912 phba->fcf.fcf_flag |= FCF_DEAD_DISC; 6913 spin_unlock_irq(&phba->hbalock); 6914 6915 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6916 "2771 Start FCF fast failover process due to " 6917 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " 6918 "\n", acqe_fip->event_tag, acqe_fip->index); 6919 rc = lpfc_sli4_redisc_fcf_table(phba); 6920 if (rc) { 6921 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6922 LOG_TRACE_EVENT, 6923 "2772 Issue FCF rediscover mailbox " 6924 "command failed, fail through to FCF " 6925 "dead event\n"); 6926 spin_lock_irq(&phba->hbalock); 6927 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; 6928 spin_unlock_irq(&phba->hbalock); 6929 /* 6930 * Last resort will fail over by treating this 6931 * as a link down to FCF registration. 6932 */ 6933 lpfc_sli4_fcf_dead_failthrough(phba); 6934 } else { 6935 /* Reset FCF roundrobin bmask for new discovery */ 6936 lpfc_sli4_clear_fcf_rr_bmask(phba); 6937 /* 6938 * Handling fast FCF failover to a DEAD FCF event is 6939 * considered equalivant to receiving CVL to all vports. 6940 */ 6941 lpfc_sli4_perform_all_vport_cvl(phba); 6942 } 6943 break; 6944 case LPFC_FIP_EVENT_TYPE_CVL: 6945 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6946 lpfc_printf_log(phba, KERN_ERR, 6947 LOG_TRACE_EVENT, 6948 "2718 Clear Virtual Link Received for VPI 0x%x" 6949 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); 6950 6951 vport = lpfc_find_vport_by_vpid(phba, 6952 acqe_fip->index); 6953 ndlp = lpfc_sli4_perform_vport_cvl(vport); 6954 if (!ndlp) 6955 break; 6956 active_vlink_present = 0; 6957 6958 vports = lpfc_create_vport_work_array(phba); 6959 if (vports) { 6960 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6961 i++) { 6962 if ((!(vports[i]->fc_flag & 6963 FC_VPORT_CVL_RCVD)) && 6964 (vports[i]->port_state > LPFC_FDISC)) { 6965 active_vlink_present = 1; 6966 break; 6967 } 6968 } 6969 lpfc_destroy_vport_work_array(phba, vports); 6970 } 6971 6972 /* 6973 * Don't re-instantiate if vport is marked for deletion. 6974 * If we are here first then vport_delete is going to wait 6975 * for discovery to complete. 6976 */ 6977 if (!(vport->load_flag & FC_UNLOADING) && 6978 active_vlink_present) { 6979 /* 6980 * If there are other active VLinks present, 6981 * re-instantiate the Vlink using FDISC. 6982 */ 6983 mod_timer(&ndlp->nlp_delayfunc, 6984 jiffies + msecs_to_jiffies(1000)); 6985 spin_lock_irq(&ndlp->lock); 6986 ndlp->nlp_flag |= NLP_DELAY_TMO; 6987 spin_unlock_irq(&ndlp->lock); 6988 ndlp->nlp_last_elscmd = ELS_CMD_FDISC; 6989 vport->port_state = LPFC_FDISC; 6990 } else { 6991 /* 6992 * Otherwise, we request port to rediscover 6993 * the entire FCF table for a fast recovery 6994 * from possible case that the current FCF 6995 * is no longer valid if we are not already 6996 * in the FCF failover process. 6997 */ 6998 spin_lock_irq(&phba->hbalock); 6999 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 7000 spin_unlock_irq(&phba->hbalock); 7001 break; 7002 } 7003 /* Mark the fast failover process in progress */ 7004 phba->fcf.fcf_flag |= FCF_ACVL_DISC; 7005 spin_unlock_irq(&phba->hbalock); 7006 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 7007 LOG_DISCOVERY, 7008 "2773 Start FCF failover per CVL, " 7009 "evt_tag:x%x\n", acqe_fip->event_tag); 7010 rc = lpfc_sli4_redisc_fcf_table(phba); 7011 if (rc) { 7012 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 7013 LOG_TRACE_EVENT, 7014 "2774 Issue FCF rediscover " 7015 "mailbox command failed, " 7016 "through to CVL event\n"); 7017 spin_lock_irq(&phba->hbalock); 7018 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; 7019 spin_unlock_irq(&phba->hbalock); 7020 /* 7021 * Last resort will be re-try on the 7022 * the current registered FCF entry. 7023 */ 7024 lpfc_retry_pport_discovery(phba); 7025 } else 7026 /* 7027 * Reset FCF roundrobin bmask for new 7028 * discovery. 7029 */ 7030 lpfc_sli4_clear_fcf_rr_bmask(phba); 7031 } 7032 break; 7033 default: 7034 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7035 "0288 Unknown FCoE event type 0x%x event tag " 7036 "0x%x\n", event_type, acqe_fip->event_tag); 7037 break; 7038 } 7039 } 7040 7041 /** 7042 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event 7043 * @phba: pointer to lpfc hba data structure. 7044 * @acqe_dcbx: pointer to the async dcbx completion queue entry. 7045 * 7046 * This routine is to handle the SLI4 asynchronous dcbx event. 7047 **/ 7048 static void 7049 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, 7050 struct lpfc_acqe_dcbx *acqe_dcbx) 7051 { 7052 phba->fc_eventTag = acqe_dcbx->event_tag; 7053 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7054 "0290 The SLI4 DCBX asynchronous event is not " 7055 "handled yet\n"); 7056 } 7057 7058 /** 7059 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event 7060 * @phba: pointer to lpfc hba data structure. 7061 * @acqe_grp5: pointer to the async grp5 completion queue entry. 7062 * 7063 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event 7064 * is an asynchronous notified of a logical link speed change. The Port 7065 * reports the logical link speed in units of 10Mbps. 7066 **/ 7067 static void 7068 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, 7069 struct lpfc_acqe_grp5 *acqe_grp5) 7070 { 7071 uint16_t prev_ll_spd; 7072 7073 phba->fc_eventTag = acqe_grp5->event_tag; 7074 phba->fcoe_eventtag = acqe_grp5->event_tag; 7075 prev_ll_spd = phba->sli4_hba.link_state.logical_speed; 7076 phba->sli4_hba.link_state.logical_speed = 7077 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; 7078 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 7079 "2789 GRP5 Async Event: Updating logical link speed " 7080 "from %dMbps to %dMbps\n", prev_ll_spd, 7081 phba->sli4_hba.link_state.logical_speed); 7082 } 7083 7084 /** 7085 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event 7086 * @phba: pointer to lpfc hba data structure. 7087 * 7088 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event 7089 * is an asynchronous notification of a request to reset CM stats. 7090 **/ 7091 static void 7092 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba) 7093 { 7094 if (!phba->cgn_i) 7095 return; 7096 lpfc_init_congestion_stat(phba); 7097 } 7098 7099 /** 7100 * lpfc_cgn_params_val - Validate FW congestion parameters. 7101 * @phba: pointer to lpfc hba data structure. 7102 * @p_cfg_param: pointer to FW provided congestion parameters. 7103 * 7104 * This routine validates the congestion parameters passed 7105 * by the FW to the driver via an ACQE event. 7106 **/ 7107 static void 7108 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param) 7109 { 7110 spin_lock_irq(&phba->hbalock); 7111 7112 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF, 7113 LPFC_CFG_MONITOR)) { 7114 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT, 7115 "6225 CMF mode param out of range: %d\n", 7116 p_cfg_param->cgn_param_mode); 7117 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF; 7118 } 7119 7120 spin_unlock_irq(&phba->hbalock); 7121 } 7122 7123 static const char * const lpfc_cmf_mode_to_str[] = { 7124 "OFF", 7125 "MANAGED", 7126 "MONITOR", 7127 }; 7128 7129 /** 7130 * lpfc_cgn_params_parse - Process a FW cong parm change event 7131 * @phba: pointer to lpfc hba data structure. 7132 * @p_cgn_param: pointer to a data buffer with the FW cong params. 7133 * @len: the size of pdata in bytes. 7134 * 7135 * This routine validates the congestion management buffer signature 7136 * from the FW, validates the contents and makes corrections for 7137 * valid, in-range values. If the signature magic is correct and 7138 * after parameter validation, the contents are copied to the driver's 7139 * @phba structure. If the magic is incorrect, an error message is 7140 * logged. 7141 **/ 7142 static void 7143 lpfc_cgn_params_parse(struct lpfc_hba *phba, 7144 struct lpfc_cgn_param *p_cgn_param, uint32_t len) 7145 { 7146 struct lpfc_cgn_info *cp; 7147 uint32_t crc, oldmode; 7148 char acr_string[4] = {0}; 7149 7150 /* Make sure the FW has encoded the correct magic number to 7151 * validate the congestion parameter in FW memory. 7152 */ 7153 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) { 7154 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7155 "4668 FW cgn parm buffer data: " 7156 "magic 0x%x version %d mode %d " 7157 "level0 %d level1 %d " 7158 "level2 %d byte13 %d " 7159 "byte14 %d byte15 %d " 7160 "byte11 %d byte12 %d activeMode %d\n", 7161 p_cgn_param->cgn_param_magic, 7162 p_cgn_param->cgn_param_version, 7163 p_cgn_param->cgn_param_mode, 7164 p_cgn_param->cgn_param_level0, 7165 p_cgn_param->cgn_param_level1, 7166 p_cgn_param->cgn_param_level2, 7167 p_cgn_param->byte13, 7168 p_cgn_param->byte14, 7169 p_cgn_param->byte15, 7170 p_cgn_param->byte11, 7171 p_cgn_param->byte12, 7172 phba->cmf_active_mode); 7173 7174 oldmode = phba->cmf_active_mode; 7175 7176 /* Any parameters out of range are corrected to defaults 7177 * by this routine. No need to fail. 7178 */ 7179 lpfc_cgn_params_val(phba, p_cgn_param); 7180 7181 /* Parameters are verified, move them into driver storage */ 7182 spin_lock_irq(&phba->hbalock); 7183 memcpy(&phba->cgn_p, p_cgn_param, 7184 sizeof(struct lpfc_cgn_param)); 7185 7186 /* Update parameters in congestion info buffer now */ 7187 if (phba->cgn_i) { 7188 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 7189 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 7190 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 7191 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 7192 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 7193 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 7194 LPFC_CGN_CRC32_SEED); 7195 cp->cgn_info_crc = cpu_to_le32(crc); 7196 } 7197 spin_unlock_irq(&phba->hbalock); 7198 7199 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode; 7200 7201 switch (oldmode) { 7202 case LPFC_CFG_OFF: 7203 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) { 7204 /* Turning CMF on */ 7205 lpfc_cmf_start(phba); 7206 7207 if (phba->link_state >= LPFC_LINK_UP) { 7208 phba->cgn_reg_fpin = 7209 phba->cgn_init_reg_fpin; 7210 phba->cgn_reg_signal = 7211 phba->cgn_init_reg_signal; 7212 lpfc_issue_els_edc(phba->pport, 0); 7213 } 7214 } 7215 break; 7216 case LPFC_CFG_MANAGED: 7217 switch (phba->cgn_p.cgn_param_mode) { 7218 case LPFC_CFG_OFF: 7219 /* Turning CMF off */ 7220 lpfc_cmf_stop(phba); 7221 if (phba->link_state >= LPFC_LINK_UP) 7222 lpfc_issue_els_edc(phba->pport, 0); 7223 break; 7224 case LPFC_CFG_MONITOR: 7225 phba->cmf_max_bytes_per_interval = 7226 phba->cmf_link_byte_count; 7227 7228 /* Resume blocked IO - unblock on workqueue */ 7229 queue_work(phba->wq, 7230 &phba->unblock_request_work); 7231 break; 7232 } 7233 break; 7234 case LPFC_CFG_MONITOR: 7235 switch (phba->cgn_p.cgn_param_mode) { 7236 case LPFC_CFG_OFF: 7237 /* Turning CMF off */ 7238 lpfc_cmf_stop(phba); 7239 if (phba->link_state >= LPFC_LINK_UP) 7240 lpfc_issue_els_edc(phba->pport, 0); 7241 break; 7242 case LPFC_CFG_MANAGED: 7243 lpfc_cmf_signal_init(phba); 7244 break; 7245 } 7246 break; 7247 } 7248 if (oldmode != LPFC_CFG_OFF || 7249 oldmode != phba->cgn_p.cgn_param_mode) { 7250 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED) 7251 scnprintf(acr_string, sizeof(acr_string), "%u", 7252 phba->cgn_p.cgn_param_level0); 7253 else 7254 scnprintf(acr_string, sizeof(acr_string), "NA"); 7255 7256 dev_info(&phba->pcidev->dev, "%d: " 7257 "4663 CMF: Mode %s acr %s\n", 7258 phba->brd_no, 7259 lpfc_cmf_mode_to_str 7260 [phba->cgn_p.cgn_param_mode], 7261 acr_string); 7262 } 7263 } else { 7264 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7265 "4669 FW cgn parm buf wrong magic 0x%x " 7266 "version %d\n", p_cgn_param->cgn_param_magic, 7267 p_cgn_param->cgn_param_version); 7268 } 7269 } 7270 7271 /** 7272 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters. 7273 * @phba: pointer to lpfc hba data structure. 7274 * 7275 * This routine issues a read_object mailbox command to 7276 * get the congestion management parameters from the FW 7277 * parses it and updates the driver maintained values. 7278 * 7279 * Returns 7280 * 0 if the object was empty 7281 * -Eval if an error was encountered 7282 * Count if bytes were read from object 7283 **/ 7284 int 7285 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba) 7286 { 7287 int ret = 0; 7288 struct lpfc_cgn_param *p_cgn_param = NULL; 7289 u32 *pdata = NULL; 7290 u32 len = 0; 7291 7292 /* Find out if the FW has a new set of congestion parameters. */ 7293 len = sizeof(struct lpfc_cgn_param); 7294 pdata = kzalloc(len, GFP_KERNEL); 7295 if (!pdata) 7296 return -ENOMEM; 7297 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME, 7298 pdata, len); 7299 7300 /* 0 means no data. A negative means error. A positive means 7301 * bytes were copied. 7302 */ 7303 if (!ret) { 7304 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7305 "4670 CGN RD OBJ returns no data\n"); 7306 goto rd_obj_err; 7307 } else if (ret < 0) { 7308 /* Some error. Just exit and return it to the caller.*/ 7309 goto rd_obj_err; 7310 } 7311 7312 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7313 "6234 READ CGN PARAMS Successful %d\n", len); 7314 7315 /* Parse data pointer over len and update the phba congestion 7316 * parameters with values passed back. The receive rate values 7317 * may have been altered in FW, but take no action here. 7318 */ 7319 p_cgn_param = (struct lpfc_cgn_param *)pdata; 7320 lpfc_cgn_params_parse(phba, p_cgn_param, len); 7321 7322 rd_obj_err: 7323 kfree(pdata); 7324 return ret; 7325 } 7326 7327 /** 7328 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event 7329 * @phba: pointer to lpfc hba data structure. 7330 * 7331 * The FW generated Async ACQE SLI event calls this routine when 7332 * the event type is an SLI Internal Port Event and the Event Code 7333 * indicates a change to the FW maintained congestion parameters. 7334 * 7335 * This routine executes a Read_Object mailbox call to obtain the 7336 * current congestion parameters maintained in FW and corrects 7337 * the driver's active congestion parameters. 7338 * 7339 * The acqe event is not passed because there is no further data 7340 * required. 7341 * 7342 * Returns nonzero error if event processing encountered an error. 7343 * Zero otherwise for success. 7344 **/ 7345 static int 7346 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba) 7347 { 7348 int ret = 0; 7349 7350 if (!phba->sli4_hba.pc_sli4_params.cmf) { 7351 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7352 "4664 Cgn Evt when E2E off. Drop event\n"); 7353 return -EACCES; 7354 } 7355 7356 /* If the event is claiming an empty object, it's ok. A write 7357 * could have cleared it. Only error is a negative return 7358 * status. 7359 */ 7360 ret = lpfc_sli4_cgn_params_read(phba); 7361 if (ret < 0) { 7362 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7363 "4667 Error reading Cgn Params (%d)\n", 7364 ret); 7365 } else if (!ret) { 7366 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7367 "4673 CGN Event empty object.\n"); 7368 } 7369 return ret; 7370 } 7371 7372 /** 7373 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event 7374 * @phba: pointer to lpfc hba data structure. 7375 * 7376 * This routine is invoked by the worker thread to process all the pending 7377 * SLI4 asynchronous events. 7378 **/ 7379 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) 7380 { 7381 struct lpfc_cq_event *cq_event; 7382 unsigned long iflags; 7383 7384 /* First, declare the async event has been handled */ 7385 spin_lock_irqsave(&phba->hbalock, iflags); 7386 phba->hba_flag &= ~ASYNC_EVENT; 7387 spin_unlock_irqrestore(&phba->hbalock, iflags); 7388 7389 /* Now, handle all the async events */ 7390 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7391 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { 7392 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, 7393 cq_event, struct lpfc_cq_event, list); 7394 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, 7395 iflags); 7396 7397 /* Process the asynchronous event */ 7398 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { 7399 case LPFC_TRAILER_CODE_LINK: 7400 lpfc_sli4_async_link_evt(phba, 7401 &cq_event->cqe.acqe_link); 7402 break; 7403 case LPFC_TRAILER_CODE_FCOE: 7404 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); 7405 break; 7406 case LPFC_TRAILER_CODE_DCBX: 7407 lpfc_sli4_async_dcbx_evt(phba, 7408 &cq_event->cqe.acqe_dcbx); 7409 break; 7410 case LPFC_TRAILER_CODE_GRP5: 7411 lpfc_sli4_async_grp5_evt(phba, 7412 &cq_event->cqe.acqe_grp5); 7413 break; 7414 case LPFC_TRAILER_CODE_FC: 7415 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); 7416 break; 7417 case LPFC_TRAILER_CODE_SLI: 7418 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); 7419 break; 7420 case LPFC_TRAILER_CODE_CMSTAT: 7421 lpfc_sli4_async_cmstat_evt(phba); 7422 break; 7423 default: 7424 lpfc_printf_log(phba, KERN_ERR, 7425 LOG_TRACE_EVENT, 7426 "1804 Invalid asynchronous event code: " 7427 "x%x\n", bf_get(lpfc_trailer_code, 7428 &cq_event->cqe.mcqe_cmpl)); 7429 break; 7430 } 7431 7432 /* Free the completion event processed to the free pool */ 7433 lpfc_sli4_cq_event_release(phba, cq_event); 7434 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7435 } 7436 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 7437 } 7438 7439 /** 7440 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event 7441 * @phba: pointer to lpfc hba data structure. 7442 * 7443 * This routine is invoked by the worker thread to process FCF table 7444 * rediscovery pending completion event. 7445 **/ 7446 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) 7447 { 7448 int rc; 7449 7450 spin_lock_irq(&phba->hbalock); 7451 /* Clear FCF rediscovery timeout event */ 7452 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; 7453 /* Clear driver fast failover FCF record flag */ 7454 phba->fcf.failover_rec.flag = 0; 7455 /* Set state for FCF fast failover */ 7456 phba->fcf.fcf_flag |= FCF_REDISC_FOV; 7457 spin_unlock_irq(&phba->hbalock); 7458 7459 /* Scan FCF table from the first entry to re-discover SAN */ 7460 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 7461 "2777 Start post-quiescent FCF table scan\n"); 7462 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); 7463 if (rc) 7464 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7465 "2747 Issue FCF scan read FCF mailbox " 7466 "command failed 0x%x\n", rc); 7467 } 7468 7469 /** 7470 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table 7471 * @phba: pointer to lpfc hba data structure. 7472 * @dev_grp: The HBA PCI-Device group number. 7473 * 7474 * This routine is invoked to set up the per HBA PCI-Device group function 7475 * API jump table entries. 7476 * 7477 * Return: 0 if success, otherwise -ENODEV 7478 **/ 7479 int 7480 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 7481 { 7482 int rc; 7483 7484 /* Set up lpfc PCI-device group */ 7485 phba->pci_dev_grp = dev_grp; 7486 7487 /* The LPFC_PCI_DEV_OC uses SLI4 */ 7488 if (dev_grp == LPFC_PCI_DEV_OC) 7489 phba->sli_rev = LPFC_SLI_REV4; 7490 7491 /* Set up device INIT API function jump table */ 7492 rc = lpfc_init_api_table_setup(phba, dev_grp); 7493 if (rc) 7494 return -ENODEV; 7495 /* Set up SCSI API function jump table */ 7496 rc = lpfc_scsi_api_table_setup(phba, dev_grp); 7497 if (rc) 7498 return -ENODEV; 7499 /* Set up SLI API function jump table */ 7500 rc = lpfc_sli_api_table_setup(phba, dev_grp); 7501 if (rc) 7502 return -ENODEV; 7503 /* Set up MBOX API function jump table */ 7504 rc = lpfc_mbox_api_table_setup(phba, dev_grp); 7505 if (rc) 7506 return -ENODEV; 7507 7508 return 0; 7509 } 7510 7511 /** 7512 * lpfc_log_intr_mode - Log the active interrupt mode 7513 * @phba: pointer to lpfc hba data structure. 7514 * @intr_mode: active interrupt mode adopted. 7515 * 7516 * This routine it invoked to log the currently used active interrupt mode 7517 * to the device. 7518 **/ 7519 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) 7520 { 7521 switch (intr_mode) { 7522 case 0: 7523 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7524 "0470 Enable INTx interrupt mode.\n"); 7525 break; 7526 case 1: 7527 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7528 "0481 Enabled MSI interrupt mode.\n"); 7529 break; 7530 case 2: 7531 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7532 "0480 Enabled MSI-X interrupt mode.\n"); 7533 break; 7534 default: 7535 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7536 "0482 Illegal interrupt mode.\n"); 7537 break; 7538 } 7539 return; 7540 } 7541 7542 /** 7543 * lpfc_enable_pci_dev - Enable a generic PCI device. 7544 * @phba: pointer to lpfc hba data structure. 7545 * 7546 * This routine is invoked to enable the PCI device that is common to all 7547 * PCI devices. 7548 * 7549 * Return codes 7550 * 0 - successful 7551 * other values - error 7552 **/ 7553 static int 7554 lpfc_enable_pci_dev(struct lpfc_hba *phba) 7555 { 7556 struct pci_dev *pdev; 7557 7558 /* Obtain PCI device reference */ 7559 if (!phba->pcidev) 7560 goto out_error; 7561 else 7562 pdev = phba->pcidev; 7563 /* Enable PCI device */ 7564 if (pci_enable_device_mem(pdev)) 7565 goto out_error; 7566 /* Request PCI resource for the device */ 7567 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) 7568 goto out_disable_device; 7569 /* Set up device as PCI master and save state for EEH */ 7570 pci_set_master(pdev); 7571 pci_try_set_mwi(pdev); 7572 pci_save_state(pdev); 7573 7574 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ 7575 if (pci_is_pcie(pdev)) 7576 pdev->needs_freset = 1; 7577 7578 return 0; 7579 7580 out_disable_device: 7581 pci_disable_device(pdev); 7582 out_error: 7583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7584 "1401 Failed to enable pci device\n"); 7585 return -ENODEV; 7586 } 7587 7588 /** 7589 * lpfc_disable_pci_dev - Disable a generic PCI device. 7590 * @phba: pointer to lpfc hba data structure. 7591 * 7592 * This routine is invoked to disable the PCI device that is common to all 7593 * PCI devices. 7594 **/ 7595 static void 7596 lpfc_disable_pci_dev(struct lpfc_hba *phba) 7597 { 7598 struct pci_dev *pdev; 7599 7600 /* Obtain PCI device reference */ 7601 if (!phba->pcidev) 7602 return; 7603 else 7604 pdev = phba->pcidev; 7605 /* Release PCI resource and disable PCI device */ 7606 pci_release_mem_regions(pdev); 7607 pci_disable_device(pdev); 7608 7609 return; 7610 } 7611 7612 /** 7613 * lpfc_reset_hba - Reset a hba 7614 * @phba: pointer to lpfc hba data structure. 7615 * 7616 * This routine is invoked to reset a hba device. It brings the HBA 7617 * offline, performs a board restart, and then brings the board back 7618 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up 7619 * on outstanding mailbox commands. 7620 **/ 7621 void 7622 lpfc_reset_hba(struct lpfc_hba *phba) 7623 { 7624 /* If resets are disabled then set error state and return. */ 7625 if (!phba->cfg_enable_hba_reset) { 7626 phba->link_state = LPFC_HBA_ERROR; 7627 return; 7628 } 7629 7630 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */ 7631 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) { 7632 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 7633 } else { 7634 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 7635 lpfc_sli_flush_io_rings(phba); 7636 } 7637 lpfc_offline(phba); 7638 lpfc_sli_brdrestart(phba); 7639 lpfc_online(phba); 7640 lpfc_unblock_mgmt_io(phba); 7641 } 7642 7643 /** 7644 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions 7645 * @phba: pointer to lpfc hba data structure. 7646 * 7647 * This function enables the PCI SR-IOV virtual functions to a physical 7648 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7649 * enable the number of virtual functions to the physical function. As 7650 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7651 * API call does not considered as an error condition for most of the device. 7652 **/ 7653 uint16_t 7654 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) 7655 { 7656 struct pci_dev *pdev = phba->pcidev; 7657 uint16_t nr_virtfn; 7658 int pos; 7659 7660 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 7661 if (pos == 0) 7662 return 0; 7663 7664 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); 7665 return nr_virtfn; 7666 } 7667 7668 /** 7669 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions 7670 * @phba: pointer to lpfc hba data structure. 7671 * @nr_vfn: number of virtual functions to be enabled. 7672 * 7673 * This function enables the PCI SR-IOV virtual functions to a physical 7674 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7675 * enable the number of virtual functions to the physical function. As 7676 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7677 * API call does not considered as an error condition for most of the device. 7678 **/ 7679 int 7680 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) 7681 { 7682 struct pci_dev *pdev = phba->pcidev; 7683 uint16_t max_nr_vfn; 7684 int rc; 7685 7686 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); 7687 if (nr_vfn > max_nr_vfn) { 7688 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7689 "3057 Requested vfs (%d) greater than " 7690 "supported vfs (%d)", nr_vfn, max_nr_vfn); 7691 return -EINVAL; 7692 } 7693 7694 rc = pci_enable_sriov(pdev, nr_vfn); 7695 if (rc) { 7696 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7697 "2806 Failed to enable sriov on this device " 7698 "with vfn number nr_vf:%d, rc:%d\n", 7699 nr_vfn, rc); 7700 } else 7701 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7702 "2807 Successful enable sriov on this device " 7703 "with vfn number nr_vf:%d\n", nr_vfn); 7704 return rc; 7705 } 7706 7707 static void 7708 lpfc_unblock_requests_work(struct work_struct *work) 7709 { 7710 struct lpfc_hba *phba = container_of(work, struct lpfc_hba, 7711 unblock_request_work); 7712 7713 lpfc_unblock_requests(phba); 7714 } 7715 7716 /** 7717 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. 7718 * @phba: pointer to lpfc hba data structure. 7719 * 7720 * This routine is invoked to set up the driver internal resources before the 7721 * device specific resource setup to support the HBA device it attached to. 7722 * 7723 * Return codes 7724 * 0 - successful 7725 * other values - error 7726 **/ 7727 static int 7728 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) 7729 { 7730 struct lpfc_sli *psli = &phba->sli; 7731 7732 /* 7733 * Driver resources common to all SLI revisions 7734 */ 7735 atomic_set(&phba->fast_event_count, 0); 7736 atomic_set(&phba->dbg_log_idx, 0); 7737 atomic_set(&phba->dbg_log_cnt, 0); 7738 atomic_set(&phba->dbg_log_dmping, 0); 7739 spin_lock_init(&phba->hbalock); 7740 7741 /* Initialize port_list spinlock */ 7742 spin_lock_init(&phba->port_list_lock); 7743 INIT_LIST_HEAD(&phba->port_list); 7744 7745 INIT_LIST_HEAD(&phba->work_list); 7746 7747 /* Initialize the wait queue head for the kernel thread */ 7748 init_waitqueue_head(&phba->work_waitq); 7749 7750 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7751 "1403 Protocols supported %s %s %s\n", 7752 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? 7753 "SCSI" : " "), 7754 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? 7755 "NVME" : " "), 7756 (phba->nvmet_support ? "NVMET" : " ")); 7757 7758 /* Initialize the IO buffer list used by driver for SLI3 SCSI */ 7759 spin_lock_init(&phba->scsi_buf_list_get_lock); 7760 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); 7761 spin_lock_init(&phba->scsi_buf_list_put_lock); 7762 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); 7763 7764 /* Initialize the fabric iocb list */ 7765 INIT_LIST_HEAD(&phba->fabric_iocb_list); 7766 7767 /* Initialize list to save ELS buffers */ 7768 INIT_LIST_HEAD(&phba->elsbuf); 7769 7770 /* Initialize FCF connection rec list */ 7771 INIT_LIST_HEAD(&phba->fcf_conn_rec_list); 7772 7773 /* Initialize OAS configuration list */ 7774 spin_lock_init(&phba->devicelock); 7775 INIT_LIST_HEAD(&phba->luns); 7776 7777 /* MBOX heartbeat timer */ 7778 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); 7779 /* Fabric block timer */ 7780 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); 7781 /* EA polling mode timer */ 7782 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); 7783 /* Heartbeat timer */ 7784 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); 7785 7786 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); 7787 7788 INIT_DELAYED_WORK(&phba->idle_stat_delay_work, 7789 lpfc_idle_stat_delay_work); 7790 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work); 7791 return 0; 7792 } 7793 7794 /** 7795 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev 7796 * @phba: pointer to lpfc hba data structure. 7797 * 7798 * This routine is invoked to set up the driver internal resources specific to 7799 * support the SLI-3 HBA device it attached to. 7800 * 7801 * Return codes 7802 * 0 - successful 7803 * other values - error 7804 **/ 7805 static int 7806 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) 7807 { 7808 int rc, entry_sz; 7809 7810 /* 7811 * Initialize timers used by driver 7812 */ 7813 7814 /* FCP polling mode timer */ 7815 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); 7816 7817 /* Host attention work mask setup */ 7818 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); 7819 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 7820 7821 /* Get all the module params for configuring this host */ 7822 lpfc_get_cfgparam(phba); 7823 /* Set up phase-1 common device driver resources */ 7824 7825 rc = lpfc_setup_driver_resource_phase1(phba); 7826 if (rc) 7827 return -ENODEV; 7828 7829 if (!phba->sli.sli3_ring) 7830 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, 7831 sizeof(struct lpfc_sli_ring), 7832 GFP_KERNEL); 7833 if (!phba->sli.sli3_ring) 7834 return -ENOMEM; 7835 7836 /* 7837 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size 7838 * used to create the sg_dma_buf_pool must be dynamically calculated. 7839 */ 7840 7841 if (phba->sli_rev == LPFC_SLI_REV4) 7842 entry_sz = sizeof(struct sli4_sge); 7843 else 7844 entry_sz = sizeof(struct ulp_bde64); 7845 7846 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ 7847 if (phba->cfg_enable_bg) { 7848 /* 7849 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, 7850 * the FCP rsp, and a BDE for each. Sice we have no control 7851 * over how many protection data segments the SCSI Layer 7852 * will hand us (ie: there could be one for every block 7853 * in the IO), we just allocate enough BDEs to accomidate 7854 * our max amount and we need to limit lpfc_sg_seg_cnt to 7855 * minimize the risk of running out. 7856 */ 7857 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7858 sizeof(struct fcp_rsp) + 7859 (LPFC_MAX_SG_SEG_CNT * entry_sz); 7860 7861 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) 7862 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; 7863 7864 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ 7865 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; 7866 } else { 7867 /* 7868 * The scsi_buf for a regular I/O will hold the FCP cmnd, 7869 * the FCP rsp, a BDE for each, and a BDE for up to 7870 * cfg_sg_seg_cnt data segments. 7871 */ 7872 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7873 sizeof(struct fcp_rsp) + 7874 ((phba->cfg_sg_seg_cnt + 2) * entry_sz); 7875 7876 /* Total BDEs in BPL for scsi_sg_list */ 7877 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; 7878 } 7879 7880 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 7881 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", 7882 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 7883 phba->cfg_total_seg_cnt); 7884 7885 phba->max_vpi = LPFC_MAX_VPI; 7886 /* This will be set to correct value after config_port mbox */ 7887 phba->max_vports = 0; 7888 7889 /* 7890 * Initialize the SLI Layer to run with lpfc HBAs. 7891 */ 7892 lpfc_sli_setup(phba); 7893 lpfc_sli_queue_init(phba); 7894 7895 /* Allocate device driver memory */ 7896 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) 7897 return -ENOMEM; 7898 7899 phba->lpfc_sg_dma_buf_pool = 7900 dma_pool_create("lpfc_sg_dma_buf_pool", 7901 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 7902 BPL_ALIGN_SZ, 0); 7903 7904 if (!phba->lpfc_sg_dma_buf_pool) 7905 goto fail_free_mem; 7906 7907 phba->lpfc_cmd_rsp_buf_pool = 7908 dma_pool_create("lpfc_cmd_rsp_buf_pool", 7909 &phba->pcidev->dev, 7910 sizeof(struct fcp_cmnd) + 7911 sizeof(struct fcp_rsp), 7912 BPL_ALIGN_SZ, 0); 7913 7914 if (!phba->lpfc_cmd_rsp_buf_pool) 7915 goto fail_free_dma_buf_pool; 7916 7917 /* 7918 * Enable sr-iov virtual functions if supported and configured 7919 * through the module parameter. 7920 */ 7921 if (phba->cfg_sriov_nr_virtfn > 0) { 7922 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 7923 phba->cfg_sriov_nr_virtfn); 7924 if (rc) { 7925 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7926 "2808 Requested number of SR-IOV " 7927 "virtual functions (%d) is not " 7928 "supported\n", 7929 phba->cfg_sriov_nr_virtfn); 7930 phba->cfg_sriov_nr_virtfn = 0; 7931 } 7932 } 7933 7934 return 0; 7935 7936 fail_free_dma_buf_pool: 7937 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 7938 phba->lpfc_sg_dma_buf_pool = NULL; 7939 fail_free_mem: 7940 lpfc_mem_free(phba); 7941 return -ENOMEM; 7942 } 7943 7944 /** 7945 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev 7946 * @phba: pointer to lpfc hba data structure. 7947 * 7948 * This routine is invoked to unset the driver internal resources set up 7949 * specific for supporting the SLI-3 HBA device it attached to. 7950 **/ 7951 static void 7952 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) 7953 { 7954 /* Free device driver memory allocated */ 7955 lpfc_mem_free_all(phba); 7956 7957 return; 7958 } 7959 7960 /** 7961 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev 7962 * @phba: pointer to lpfc hba data structure. 7963 * 7964 * This routine is invoked to set up the driver internal resources specific to 7965 * support the SLI-4 HBA device it attached to. 7966 * 7967 * Return codes 7968 * 0 - successful 7969 * other values - error 7970 **/ 7971 static int 7972 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 7973 { 7974 LPFC_MBOXQ_t *mboxq; 7975 MAILBOX_t *mb; 7976 int rc, i, max_buf_size; 7977 int longs; 7978 int extra; 7979 uint64_t wwn; 7980 u32 if_type; 7981 u32 if_fam; 7982 7983 phba->sli4_hba.num_present_cpu = lpfc_present_cpu; 7984 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; 7985 phba->sli4_hba.curr_disp_cpu = 0; 7986 7987 /* Get all the module params for configuring this host */ 7988 lpfc_get_cfgparam(phba); 7989 7990 /* Set up phase-1 common device driver resources */ 7991 rc = lpfc_setup_driver_resource_phase1(phba); 7992 if (rc) 7993 return -ENODEV; 7994 7995 /* Before proceed, wait for POST done and device ready */ 7996 rc = lpfc_sli4_post_status_check(phba); 7997 if (rc) 7998 return -ENODEV; 7999 8000 /* Allocate all driver workqueues here */ 8001 8002 /* The lpfc_wq workqueue for deferred irq use */ 8003 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 8004 if (!phba->wq) 8005 return -ENOMEM; 8006 8007 /* 8008 * Initialize timers used by driver 8009 */ 8010 8011 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); 8012 8013 /* FCF rediscover timer */ 8014 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); 8015 8016 /* CMF congestion timer */ 8017 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 8018 phba->cmf_timer.function = lpfc_cmf_timer; 8019 8020 /* 8021 * Control structure for handling external multi-buffer mailbox 8022 * command pass-through. 8023 */ 8024 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, 8025 sizeof(struct lpfc_mbox_ext_buf_ctx)); 8026 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); 8027 8028 phba->max_vpi = LPFC_MAX_VPI; 8029 8030 /* This will be set to correct value after the read_config mbox */ 8031 phba->max_vports = 0; 8032 8033 /* Program the default value of vlan_id and fc_map */ 8034 phba->valid_vlan = 0; 8035 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; 8036 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; 8037 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; 8038 8039 /* 8040 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands 8041 * we will associate a new ring, for each EQ/CQ/WQ tuple. 8042 * The WQ create will allocate the ring. 8043 */ 8044 8045 /* Initialize buffer queue management fields */ 8046 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); 8047 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; 8048 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; 8049 8050 /* for VMID idle timeout if VMID is enabled */ 8051 if (lpfc_is_vmid_enabled(phba)) 8052 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0); 8053 8054 /* 8055 * Initialize the SLI Layer to run with lpfc SLI4 HBAs. 8056 */ 8057 /* Initialize the Abort buffer list used by driver */ 8058 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); 8059 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); 8060 8061 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8062 /* Initialize the Abort nvme buffer list used by driver */ 8063 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); 8064 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8065 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); 8066 spin_lock_init(&phba->sli4_hba.t_active_list_lock); 8067 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); 8068 } 8069 8070 /* This abort list used by worker thread */ 8071 spin_lock_init(&phba->sli4_hba.sgl_list_lock); 8072 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); 8073 spin_lock_init(&phba->sli4_hba.asynce_list_lock); 8074 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); 8075 8076 /* 8077 * Initialize driver internal slow-path work queues 8078 */ 8079 8080 /* Driver internel slow-path CQ Event pool */ 8081 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); 8082 /* Response IOCB work queue list */ 8083 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); 8084 /* Asynchronous event CQ Event work queue list */ 8085 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); 8086 /* Slow-path XRI aborted CQ Event work queue list */ 8087 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); 8088 /* Receive queue CQ Event work queue list */ 8089 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); 8090 8091 /* Initialize extent block lists. */ 8092 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); 8093 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); 8094 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); 8095 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); 8096 8097 /* Initialize mboxq lists. If the early init routines fail 8098 * these lists need to be correctly initialized. 8099 */ 8100 INIT_LIST_HEAD(&phba->sli.mboxq); 8101 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); 8102 8103 /* initialize optic_state to 0xFF */ 8104 phba->sli4_hba.lnk_info.optic_state = 0xff; 8105 8106 /* Allocate device driver memory */ 8107 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); 8108 if (rc) 8109 goto out_destroy_workqueue; 8110 8111 /* IF Type 2 ports get initialized now. */ 8112 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 8113 LPFC_SLI_INTF_IF_TYPE_2) { 8114 rc = lpfc_pci_function_reset(phba); 8115 if (unlikely(rc)) { 8116 rc = -ENODEV; 8117 goto out_free_mem; 8118 } 8119 phba->temp_sensor_support = 1; 8120 } 8121 8122 /* Create the bootstrap mailbox command */ 8123 rc = lpfc_create_bootstrap_mbox(phba); 8124 if (unlikely(rc)) 8125 goto out_free_mem; 8126 8127 /* Set up the host's endian order with the device. */ 8128 rc = lpfc_setup_endian_order(phba); 8129 if (unlikely(rc)) 8130 goto out_free_bsmbx; 8131 8132 /* Set up the hba's configuration parameters. */ 8133 rc = lpfc_sli4_read_config(phba); 8134 if (unlikely(rc)) 8135 goto out_free_bsmbx; 8136 8137 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) { 8138 /* Right now the link is down, if FA-PWWN is configured the 8139 * firmware will try FLOGI before the driver gets a link up. 8140 * If it fails, the driver should get a MISCONFIGURED async 8141 * event which will clear this flag. The only notification 8142 * the driver gets is if it fails, if it succeeds there is no 8143 * notification given. Assume success. 8144 */ 8145 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC; 8146 } 8147 8148 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); 8149 if (unlikely(rc)) 8150 goto out_free_bsmbx; 8151 8152 /* IF Type 0 ports get initialized now. */ 8153 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 8154 LPFC_SLI_INTF_IF_TYPE_0) { 8155 rc = lpfc_pci_function_reset(phba); 8156 if (unlikely(rc)) 8157 goto out_free_bsmbx; 8158 } 8159 8160 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 8161 GFP_KERNEL); 8162 if (!mboxq) { 8163 rc = -ENOMEM; 8164 goto out_free_bsmbx; 8165 } 8166 8167 /* Check for NVMET being configured */ 8168 phba->nvmet_support = 0; 8169 if (lpfc_enable_nvmet_cnt) { 8170 8171 /* First get WWN of HBA instance */ 8172 lpfc_read_nv(phba, mboxq); 8173 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 8174 if (rc != MBX_SUCCESS) { 8175 lpfc_printf_log(phba, KERN_ERR, 8176 LOG_TRACE_EVENT, 8177 "6016 Mailbox failed , mbxCmd x%x " 8178 "READ_NV, mbxStatus x%x\n", 8179 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 8180 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 8181 mempool_free(mboxq, phba->mbox_mem_pool); 8182 rc = -EIO; 8183 goto out_free_bsmbx; 8184 } 8185 mb = &mboxq->u.mb; 8186 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, 8187 sizeof(uint64_t)); 8188 wwn = cpu_to_be64(wwn); 8189 phba->sli4_hba.wwnn.u.name = wwn; 8190 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, 8191 sizeof(uint64_t)); 8192 /* wwn is WWPN of HBA instance */ 8193 wwn = cpu_to_be64(wwn); 8194 phba->sli4_hba.wwpn.u.name = wwn; 8195 8196 /* Check to see if it matches any module parameter */ 8197 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { 8198 if (wwn == lpfc_enable_nvmet[i]) { 8199 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) 8200 if (lpfc_nvmet_mem_alloc(phba)) 8201 break; 8202 8203 phba->nvmet_support = 1; /* a match */ 8204 8205 lpfc_printf_log(phba, KERN_ERR, 8206 LOG_TRACE_EVENT, 8207 "6017 NVME Target %016llx\n", 8208 wwn); 8209 #else 8210 lpfc_printf_log(phba, KERN_ERR, 8211 LOG_TRACE_EVENT, 8212 "6021 Can't enable NVME Target." 8213 " NVME_TARGET_FC infrastructure" 8214 " is not in kernel\n"); 8215 #endif 8216 /* Not supported for NVMET */ 8217 phba->cfg_xri_rebalancing = 0; 8218 if (phba->irq_chann_mode == NHT_MODE) { 8219 phba->cfg_irq_chann = 8220 phba->sli4_hba.num_present_cpu; 8221 phba->cfg_hdw_queue = 8222 phba->sli4_hba.num_present_cpu; 8223 phba->irq_chann_mode = NORMAL_MODE; 8224 } 8225 break; 8226 } 8227 } 8228 } 8229 8230 lpfc_nvme_mod_param_dep(phba); 8231 8232 /* 8233 * Get sli4 parameters that override parameters from Port capabilities. 8234 * If this call fails, it isn't critical unless the SLI4 parameters come 8235 * back in conflict. 8236 */ 8237 rc = lpfc_get_sli4_parameters(phba, mboxq); 8238 if (rc) { 8239 if_type = bf_get(lpfc_sli_intf_if_type, 8240 &phba->sli4_hba.sli_intf); 8241 if_fam = bf_get(lpfc_sli_intf_sli_family, 8242 &phba->sli4_hba.sli_intf); 8243 if (phba->sli4_hba.extents_in_use && 8244 phba->sli4_hba.rpi_hdrs_in_use) { 8245 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8246 "2999 Unsupported SLI4 Parameters " 8247 "Extents and RPI headers enabled.\n"); 8248 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8249 if_fam == LPFC_SLI_INTF_FAMILY_BE2) { 8250 mempool_free(mboxq, phba->mbox_mem_pool); 8251 rc = -EIO; 8252 goto out_free_bsmbx; 8253 } 8254 } 8255 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8256 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { 8257 mempool_free(mboxq, phba->mbox_mem_pool); 8258 rc = -EIO; 8259 goto out_free_bsmbx; 8260 } 8261 } 8262 8263 /* 8264 * 1 for cmd, 1 for rsp, NVME adds an extra one 8265 * for boundary conditions in its max_sgl_segment template. 8266 */ 8267 extra = 2; 8268 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 8269 extra++; 8270 8271 /* 8272 * It doesn't matter what family our adapter is in, we are 8273 * limited to 2 Pages, 512 SGEs, for our SGL. 8274 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 8275 */ 8276 max_buf_size = (2 * SLI4_PAGE_SIZE); 8277 8278 /* 8279 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 8280 * used to create the sg_dma_buf_pool must be calculated. 8281 */ 8282 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 8283 /* Both cfg_enable_bg and cfg_external_dif code paths */ 8284 8285 /* 8286 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 8287 * the FCP rsp, and a SGE. Sice we have no control 8288 * over how many protection segments the SCSI Layer 8289 * will hand us (ie: there could be one for every block 8290 * in the IO), just allocate enough SGEs to accomidate 8291 * our max amount and we need to limit lpfc_sg_seg_cnt 8292 * to minimize the risk of running out. 8293 */ 8294 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8295 sizeof(struct fcp_rsp) + max_buf_size; 8296 8297 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 8298 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 8299 8300 /* 8301 * If supporting DIF, reduce the seg count for scsi to 8302 * allow room for the DIF sges. 8303 */ 8304 if (phba->cfg_enable_bg && 8305 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 8306 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 8307 else 8308 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8309 8310 } else { 8311 /* 8312 * The scsi_buf for a regular I/O holds the FCP cmnd, 8313 * the FCP rsp, a SGE for each, and a SGE for up to 8314 * cfg_sg_seg_cnt data segments. 8315 */ 8316 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8317 sizeof(struct fcp_rsp) + 8318 ((phba->cfg_sg_seg_cnt + extra) * 8319 sizeof(struct sli4_sge)); 8320 8321 /* Total SGEs for scsi_sg_list */ 8322 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 8323 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8324 8325 /* 8326 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 8327 * need to post 1 page for the SGL. 8328 */ 8329 } 8330 8331 if (phba->cfg_xpsgl && !phba->nvmet_support) 8332 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; 8333 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 8334 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 8335 else 8336 phba->cfg_sg_dma_buf_size = 8337 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 8338 8339 phba->border_sge_num = phba->cfg_sg_dma_buf_size / 8340 sizeof(struct sli4_sge); 8341 8342 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 8343 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8344 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 8345 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 8346 "6300 Reducing NVME sg segment " 8347 "cnt to %d\n", 8348 LPFC_MAX_NVME_SEG_CNT); 8349 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 8350 } else 8351 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 8352 } 8353 8354 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 8355 "9087 sg_seg_cnt:%d dmabuf_size:%d " 8356 "total:%d scsi:%d nvme:%d\n", 8357 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 8358 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 8359 phba->cfg_nvme_seg_cnt); 8360 8361 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 8362 i = phba->cfg_sg_dma_buf_size; 8363 else 8364 i = SLI4_PAGE_SIZE; 8365 8366 phba->lpfc_sg_dma_buf_pool = 8367 dma_pool_create("lpfc_sg_dma_buf_pool", 8368 &phba->pcidev->dev, 8369 phba->cfg_sg_dma_buf_size, 8370 i, 0); 8371 if (!phba->lpfc_sg_dma_buf_pool) { 8372 rc = -ENOMEM; 8373 goto out_free_bsmbx; 8374 } 8375 8376 phba->lpfc_cmd_rsp_buf_pool = 8377 dma_pool_create("lpfc_cmd_rsp_buf_pool", 8378 &phba->pcidev->dev, 8379 sizeof(struct fcp_cmnd) + 8380 sizeof(struct fcp_rsp), 8381 i, 0); 8382 if (!phba->lpfc_cmd_rsp_buf_pool) { 8383 rc = -ENOMEM; 8384 goto out_free_sg_dma_buf; 8385 } 8386 8387 mempool_free(mboxq, phba->mbox_mem_pool); 8388 8389 /* Verify OAS is supported */ 8390 lpfc_sli4_oas_verify(phba); 8391 8392 /* Verify RAS support on adapter */ 8393 lpfc_sli4_ras_init(phba); 8394 8395 /* Verify all the SLI4 queues */ 8396 rc = lpfc_sli4_queue_verify(phba); 8397 if (rc) 8398 goto out_free_cmd_rsp_buf; 8399 8400 /* Create driver internal CQE event pool */ 8401 rc = lpfc_sli4_cq_event_pool_create(phba); 8402 if (rc) 8403 goto out_free_cmd_rsp_buf; 8404 8405 /* Initialize sgl lists per host */ 8406 lpfc_init_sgl_list(phba); 8407 8408 /* Allocate and initialize active sgl array */ 8409 rc = lpfc_init_active_sgl_array(phba); 8410 if (rc) { 8411 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8412 "1430 Failed to initialize sgl list.\n"); 8413 goto out_destroy_cq_event_pool; 8414 } 8415 rc = lpfc_sli4_init_rpi_hdrs(phba); 8416 if (rc) { 8417 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8418 "1432 Failed to initialize rpi headers.\n"); 8419 goto out_free_active_sgl; 8420 } 8421 8422 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ 8423 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; 8424 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), 8425 GFP_KERNEL); 8426 if (!phba->fcf.fcf_rr_bmask) { 8427 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8428 "2759 Failed allocate memory for FCF round " 8429 "robin failover bmask\n"); 8430 rc = -ENOMEM; 8431 goto out_remove_rpi_hdrs; 8432 } 8433 8434 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, 8435 sizeof(struct lpfc_hba_eq_hdl), 8436 GFP_KERNEL); 8437 if (!phba->sli4_hba.hba_eq_hdl) { 8438 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8439 "2572 Failed allocate memory for " 8440 "fast-path per-EQ handle array\n"); 8441 rc = -ENOMEM; 8442 goto out_free_fcf_rr_bmask; 8443 } 8444 8445 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, 8446 sizeof(struct lpfc_vector_map_info), 8447 GFP_KERNEL); 8448 if (!phba->sli4_hba.cpu_map) { 8449 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8450 "3327 Failed allocate memory for msi-x " 8451 "interrupt vector mapping\n"); 8452 rc = -ENOMEM; 8453 goto out_free_hba_eq_hdl; 8454 } 8455 8456 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); 8457 if (!phba->sli4_hba.eq_info) { 8458 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8459 "3321 Failed allocation for per_cpu stats\n"); 8460 rc = -ENOMEM; 8461 goto out_free_hba_cpu_map; 8462 } 8463 8464 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, 8465 sizeof(*phba->sli4_hba.idle_stat), 8466 GFP_KERNEL); 8467 if (!phba->sli4_hba.idle_stat) { 8468 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8469 "3390 Failed allocation for idle_stat\n"); 8470 rc = -ENOMEM; 8471 goto out_free_hba_eq_info; 8472 } 8473 8474 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8475 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); 8476 if (!phba->sli4_hba.c_stat) { 8477 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8478 "3332 Failed allocating per cpu hdwq stats\n"); 8479 rc = -ENOMEM; 8480 goto out_free_hba_idle_stat; 8481 } 8482 #endif 8483 8484 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat); 8485 if (!phba->cmf_stat) { 8486 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8487 "3331 Failed allocating per cpu cgn stats\n"); 8488 rc = -ENOMEM; 8489 goto out_free_hba_hdwq_info; 8490 } 8491 8492 /* 8493 * Enable sr-iov virtual functions if supported and configured 8494 * through the module parameter. 8495 */ 8496 if (phba->cfg_sriov_nr_virtfn > 0) { 8497 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 8498 phba->cfg_sriov_nr_virtfn); 8499 if (rc) { 8500 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 8501 "3020 Requested number of SR-IOV " 8502 "virtual functions (%d) is not " 8503 "supported\n", 8504 phba->cfg_sriov_nr_virtfn); 8505 phba->cfg_sriov_nr_virtfn = 0; 8506 } 8507 } 8508 8509 return 0; 8510 8511 out_free_hba_hdwq_info: 8512 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8513 free_percpu(phba->sli4_hba.c_stat); 8514 out_free_hba_idle_stat: 8515 #endif 8516 kfree(phba->sli4_hba.idle_stat); 8517 out_free_hba_eq_info: 8518 free_percpu(phba->sli4_hba.eq_info); 8519 out_free_hba_cpu_map: 8520 kfree(phba->sli4_hba.cpu_map); 8521 out_free_hba_eq_hdl: 8522 kfree(phba->sli4_hba.hba_eq_hdl); 8523 out_free_fcf_rr_bmask: 8524 kfree(phba->fcf.fcf_rr_bmask); 8525 out_remove_rpi_hdrs: 8526 lpfc_sli4_remove_rpi_hdrs(phba); 8527 out_free_active_sgl: 8528 lpfc_free_active_sgl(phba); 8529 out_destroy_cq_event_pool: 8530 lpfc_sli4_cq_event_pool_destroy(phba); 8531 out_free_cmd_rsp_buf: 8532 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 8533 phba->lpfc_cmd_rsp_buf_pool = NULL; 8534 out_free_sg_dma_buf: 8535 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 8536 phba->lpfc_sg_dma_buf_pool = NULL; 8537 out_free_bsmbx: 8538 lpfc_destroy_bootstrap_mbox(phba); 8539 out_free_mem: 8540 lpfc_mem_free(phba); 8541 out_destroy_workqueue: 8542 destroy_workqueue(phba->wq); 8543 phba->wq = NULL; 8544 return rc; 8545 } 8546 8547 /** 8548 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev 8549 * @phba: pointer to lpfc hba data structure. 8550 * 8551 * This routine is invoked to unset the driver internal resources set up 8552 * specific for supporting the SLI-4 HBA device it attached to. 8553 **/ 8554 static void 8555 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) 8556 { 8557 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; 8558 8559 free_percpu(phba->sli4_hba.eq_info); 8560 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8561 free_percpu(phba->sli4_hba.c_stat); 8562 #endif 8563 free_percpu(phba->cmf_stat); 8564 kfree(phba->sli4_hba.idle_stat); 8565 8566 /* Free memory allocated for msi-x interrupt vector to CPU mapping */ 8567 kfree(phba->sli4_hba.cpu_map); 8568 phba->sli4_hba.num_possible_cpu = 0; 8569 phba->sli4_hba.num_present_cpu = 0; 8570 phba->sli4_hba.curr_disp_cpu = 0; 8571 cpumask_clear(&phba->sli4_hba.irq_aff_mask); 8572 8573 /* Free memory allocated for fast-path work queue handles */ 8574 kfree(phba->sli4_hba.hba_eq_hdl); 8575 8576 /* Free the allocated rpi headers. */ 8577 lpfc_sli4_remove_rpi_hdrs(phba); 8578 lpfc_sli4_remove_rpis(phba); 8579 8580 /* Free eligible FCF index bmask */ 8581 kfree(phba->fcf.fcf_rr_bmask); 8582 8583 /* Free the ELS sgl list */ 8584 lpfc_free_active_sgl(phba); 8585 lpfc_free_els_sgl_list(phba); 8586 lpfc_free_nvmet_sgl_list(phba); 8587 8588 /* Free the completion queue EQ event pool */ 8589 lpfc_sli4_cq_event_release_all(phba); 8590 lpfc_sli4_cq_event_pool_destroy(phba); 8591 8592 /* Release resource identifiers. */ 8593 lpfc_sli4_dealloc_resource_identifiers(phba); 8594 8595 /* Free the bsmbx region. */ 8596 lpfc_destroy_bootstrap_mbox(phba); 8597 8598 /* Free the SLI Layer memory with SLI4 HBAs */ 8599 lpfc_mem_free_all(phba); 8600 8601 /* Free the current connect table */ 8602 list_for_each_entry_safe(conn_entry, next_conn_entry, 8603 &phba->fcf_conn_rec_list, list) { 8604 list_del_init(&conn_entry->list); 8605 kfree(conn_entry); 8606 } 8607 8608 return; 8609 } 8610 8611 /** 8612 * lpfc_init_api_table_setup - Set up init api function jump table 8613 * @phba: The hba struct for which this call is being executed. 8614 * @dev_grp: The HBA PCI-Device group number. 8615 * 8616 * This routine sets up the device INIT interface API function jump table 8617 * in @phba struct. 8618 * 8619 * Returns: 0 - success, -ENODEV - failure. 8620 **/ 8621 int 8622 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 8623 { 8624 phba->lpfc_hba_init_link = lpfc_hba_init_link; 8625 phba->lpfc_hba_down_link = lpfc_hba_down_link; 8626 phba->lpfc_selective_reset = lpfc_selective_reset; 8627 switch (dev_grp) { 8628 case LPFC_PCI_DEV_LP: 8629 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; 8630 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; 8631 phba->lpfc_stop_port = lpfc_stop_port_s3; 8632 break; 8633 case LPFC_PCI_DEV_OC: 8634 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; 8635 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; 8636 phba->lpfc_stop_port = lpfc_stop_port_s4; 8637 break; 8638 default: 8639 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8640 "1431 Invalid HBA PCI-device group: 0x%x\n", 8641 dev_grp); 8642 return -ENODEV; 8643 } 8644 return 0; 8645 } 8646 8647 /** 8648 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. 8649 * @phba: pointer to lpfc hba data structure. 8650 * 8651 * This routine is invoked to set up the driver internal resources after the 8652 * device specific resource setup to support the HBA device it attached to. 8653 * 8654 * Return codes 8655 * 0 - successful 8656 * other values - error 8657 **/ 8658 static int 8659 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) 8660 { 8661 int error; 8662 8663 /* Startup the kernel thread for this host adapter. */ 8664 phba->worker_thread = kthread_run(lpfc_do_work, phba, 8665 "lpfc_worker_%d", phba->brd_no); 8666 if (IS_ERR(phba->worker_thread)) { 8667 error = PTR_ERR(phba->worker_thread); 8668 return error; 8669 } 8670 8671 return 0; 8672 } 8673 8674 /** 8675 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. 8676 * @phba: pointer to lpfc hba data structure. 8677 * 8678 * This routine is invoked to unset the driver internal resources set up after 8679 * the device specific resource setup for supporting the HBA device it 8680 * attached to. 8681 **/ 8682 static void 8683 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) 8684 { 8685 if (phba->wq) { 8686 destroy_workqueue(phba->wq); 8687 phba->wq = NULL; 8688 } 8689 8690 /* Stop kernel worker thread */ 8691 if (phba->worker_thread) 8692 kthread_stop(phba->worker_thread); 8693 } 8694 8695 /** 8696 * lpfc_free_iocb_list - Free iocb list. 8697 * @phba: pointer to lpfc hba data structure. 8698 * 8699 * This routine is invoked to free the driver's IOCB list and memory. 8700 **/ 8701 void 8702 lpfc_free_iocb_list(struct lpfc_hba *phba) 8703 { 8704 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 8705 8706 spin_lock_irq(&phba->hbalock); 8707 list_for_each_entry_safe(iocbq_entry, iocbq_next, 8708 &phba->lpfc_iocb_list, list) { 8709 list_del(&iocbq_entry->list); 8710 kfree(iocbq_entry); 8711 phba->total_iocbq_bufs--; 8712 } 8713 spin_unlock_irq(&phba->hbalock); 8714 8715 return; 8716 } 8717 8718 /** 8719 * lpfc_init_iocb_list - Allocate and initialize iocb list. 8720 * @phba: pointer to lpfc hba data structure. 8721 * @iocb_count: number of requested iocbs 8722 * 8723 * This routine is invoked to allocate and initizlize the driver's IOCB 8724 * list and set up the IOCB tag array accordingly. 8725 * 8726 * Return codes 8727 * 0 - successful 8728 * other values - error 8729 **/ 8730 int 8731 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) 8732 { 8733 struct lpfc_iocbq *iocbq_entry = NULL; 8734 uint16_t iotag; 8735 int i; 8736 8737 /* Initialize and populate the iocb list per host. */ 8738 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 8739 for (i = 0; i < iocb_count; i++) { 8740 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 8741 if (iocbq_entry == NULL) { 8742 printk(KERN_ERR "%s: only allocated %d iocbs of " 8743 "expected %d count. Unloading driver.\n", 8744 __func__, i, iocb_count); 8745 goto out_free_iocbq; 8746 } 8747 8748 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 8749 if (iotag == 0) { 8750 kfree(iocbq_entry); 8751 printk(KERN_ERR "%s: failed to allocate IOTAG. " 8752 "Unloading driver.\n", __func__); 8753 goto out_free_iocbq; 8754 } 8755 iocbq_entry->sli4_lxritag = NO_XRI; 8756 iocbq_entry->sli4_xritag = NO_XRI; 8757 8758 spin_lock_irq(&phba->hbalock); 8759 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 8760 phba->total_iocbq_bufs++; 8761 spin_unlock_irq(&phba->hbalock); 8762 } 8763 8764 return 0; 8765 8766 out_free_iocbq: 8767 lpfc_free_iocb_list(phba); 8768 8769 return -ENOMEM; 8770 } 8771 8772 /** 8773 * lpfc_free_sgl_list - Free a given sgl list. 8774 * @phba: pointer to lpfc hba data structure. 8775 * @sglq_list: pointer to the head of sgl list. 8776 * 8777 * This routine is invoked to free a give sgl list and memory. 8778 **/ 8779 void 8780 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) 8781 { 8782 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8783 8784 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { 8785 list_del(&sglq_entry->list); 8786 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); 8787 kfree(sglq_entry); 8788 } 8789 } 8790 8791 /** 8792 * lpfc_free_els_sgl_list - Free els sgl list. 8793 * @phba: pointer to lpfc hba data structure. 8794 * 8795 * This routine is invoked to free the driver's els sgl list and memory. 8796 **/ 8797 static void 8798 lpfc_free_els_sgl_list(struct lpfc_hba *phba) 8799 { 8800 LIST_HEAD(sglq_list); 8801 8802 /* Retrieve all els sgls from driver list */ 8803 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 8804 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); 8805 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 8806 8807 /* Now free the sgl list */ 8808 lpfc_free_sgl_list(phba, &sglq_list); 8809 } 8810 8811 /** 8812 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. 8813 * @phba: pointer to lpfc hba data structure. 8814 * 8815 * This routine is invoked to free the driver's nvmet sgl list and memory. 8816 **/ 8817 static void 8818 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) 8819 { 8820 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8821 LIST_HEAD(sglq_list); 8822 8823 /* Retrieve all nvmet sgls from driver list */ 8824 spin_lock_irq(&phba->hbalock); 8825 spin_lock(&phba->sli4_hba.sgl_list_lock); 8826 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); 8827 spin_unlock(&phba->sli4_hba.sgl_list_lock); 8828 spin_unlock_irq(&phba->hbalock); 8829 8830 /* Now free the sgl list */ 8831 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { 8832 list_del(&sglq_entry->list); 8833 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); 8834 kfree(sglq_entry); 8835 } 8836 8837 /* Update the nvmet_xri_cnt to reflect no current sgls. 8838 * The next initialization cycle sets the count and allocates 8839 * the sgls over again. 8840 */ 8841 phba->sli4_hba.nvmet_xri_cnt = 0; 8842 } 8843 8844 /** 8845 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. 8846 * @phba: pointer to lpfc hba data structure. 8847 * 8848 * This routine is invoked to allocate the driver's active sgl memory. 8849 * This array will hold the sglq_entry's for active IOs. 8850 **/ 8851 static int 8852 lpfc_init_active_sgl_array(struct lpfc_hba *phba) 8853 { 8854 int size; 8855 size = sizeof(struct lpfc_sglq *); 8856 size *= phba->sli4_hba.max_cfg_param.max_xri; 8857 8858 phba->sli4_hba.lpfc_sglq_active_list = 8859 kzalloc(size, GFP_KERNEL); 8860 if (!phba->sli4_hba.lpfc_sglq_active_list) 8861 return -ENOMEM; 8862 return 0; 8863 } 8864 8865 /** 8866 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. 8867 * @phba: pointer to lpfc hba data structure. 8868 * 8869 * This routine is invoked to walk through the array of active sglq entries 8870 * and free all of the resources. 8871 * This is just a place holder for now. 8872 **/ 8873 static void 8874 lpfc_free_active_sgl(struct lpfc_hba *phba) 8875 { 8876 kfree(phba->sli4_hba.lpfc_sglq_active_list); 8877 } 8878 8879 /** 8880 * lpfc_init_sgl_list - Allocate and initialize sgl list. 8881 * @phba: pointer to lpfc hba data structure. 8882 * 8883 * This routine is invoked to allocate and initizlize the driver's sgl 8884 * list and set up the sgl xritag tag array accordingly. 8885 * 8886 **/ 8887 static void 8888 lpfc_init_sgl_list(struct lpfc_hba *phba) 8889 { 8890 /* Initialize and populate the sglq list per host/VF. */ 8891 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); 8892 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); 8893 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); 8894 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8895 8896 /* els xri-sgl book keeping */ 8897 phba->sli4_hba.els_xri_cnt = 0; 8898 8899 /* nvme xri-buffer book keeping */ 8900 phba->sli4_hba.io_xri_cnt = 0; 8901 } 8902 8903 /** 8904 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port 8905 * @phba: pointer to lpfc hba data structure. 8906 * 8907 * This routine is invoked to post rpi header templates to the 8908 * port for those SLI4 ports that do not support extents. This routine 8909 * posts a PAGE_SIZE memory region to the port to hold up to 8910 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine 8911 * and should be called only when interrupts are disabled. 8912 * 8913 * Return codes 8914 * 0 - successful 8915 * -ERROR - otherwise. 8916 **/ 8917 int 8918 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) 8919 { 8920 int rc = 0; 8921 struct lpfc_rpi_hdr *rpi_hdr; 8922 8923 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); 8924 if (!phba->sli4_hba.rpi_hdrs_in_use) 8925 return rc; 8926 if (phba->sli4_hba.extents_in_use) 8927 return -EIO; 8928 8929 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); 8930 if (!rpi_hdr) { 8931 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8932 "0391 Error during rpi post operation\n"); 8933 lpfc_sli4_remove_rpis(phba); 8934 rc = -ENODEV; 8935 } 8936 8937 return rc; 8938 } 8939 8940 /** 8941 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region 8942 * @phba: pointer to lpfc hba data structure. 8943 * 8944 * This routine is invoked to allocate a single 4KB memory region to 8945 * support rpis and stores them in the phba. This single region 8946 * provides support for up to 64 rpis. The region is used globally 8947 * by the device. 8948 * 8949 * Returns: 8950 * A valid rpi hdr on success. 8951 * A NULL pointer on any failure. 8952 **/ 8953 struct lpfc_rpi_hdr * 8954 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) 8955 { 8956 uint16_t rpi_limit, curr_rpi_range; 8957 struct lpfc_dmabuf *dmabuf; 8958 struct lpfc_rpi_hdr *rpi_hdr; 8959 8960 /* 8961 * If the SLI4 port supports extents, posting the rpi header isn't 8962 * required. Set the expected maximum count and let the actual value 8963 * get set when extents are fully allocated. 8964 */ 8965 if (!phba->sli4_hba.rpi_hdrs_in_use) 8966 return NULL; 8967 if (phba->sli4_hba.extents_in_use) 8968 return NULL; 8969 8970 /* The limit on the logical index is just the max_rpi count. */ 8971 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; 8972 8973 spin_lock_irq(&phba->hbalock); 8974 /* 8975 * Establish the starting RPI in this header block. The starting 8976 * rpi is normalized to a zero base because the physical rpi is 8977 * port based. 8978 */ 8979 curr_rpi_range = phba->sli4_hba.next_rpi; 8980 spin_unlock_irq(&phba->hbalock); 8981 8982 /* Reached full RPI range */ 8983 if (curr_rpi_range == rpi_limit) 8984 return NULL; 8985 8986 /* 8987 * First allocate the protocol header region for the port. The 8988 * port expects a 4KB DMA-mapped memory region that is 4K aligned. 8989 */ 8990 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 8991 if (!dmabuf) 8992 return NULL; 8993 8994 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 8995 LPFC_HDR_TEMPLATE_SIZE, 8996 &dmabuf->phys, GFP_KERNEL); 8997 if (!dmabuf->virt) { 8998 rpi_hdr = NULL; 8999 goto err_free_dmabuf; 9000 } 9001 9002 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { 9003 rpi_hdr = NULL; 9004 goto err_free_coherent; 9005 } 9006 9007 /* Save the rpi header data for cleanup later. */ 9008 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); 9009 if (!rpi_hdr) 9010 goto err_free_coherent; 9011 9012 rpi_hdr->dmabuf = dmabuf; 9013 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; 9014 rpi_hdr->page_count = 1; 9015 spin_lock_irq(&phba->hbalock); 9016 9017 /* The rpi_hdr stores the logical index only. */ 9018 rpi_hdr->start_rpi = curr_rpi_range; 9019 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; 9020 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); 9021 9022 spin_unlock_irq(&phba->hbalock); 9023 return rpi_hdr; 9024 9025 err_free_coherent: 9026 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, 9027 dmabuf->virt, dmabuf->phys); 9028 err_free_dmabuf: 9029 kfree(dmabuf); 9030 return NULL; 9031 } 9032 9033 /** 9034 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions 9035 * @phba: pointer to lpfc hba data structure. 9036 * 9037 * This routine is invoked to remove all memory resources allocated 9038 * to support rpis for SLI4 ports not supporting extents. This routine 9039 * presumes the caller has released all rpis consumed by fabric or port 9040 * logins and is prepared to have the header pages removed. 9041 **/ 9042 void 9043 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) 9044 { 9045 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; 9046 9047 if (!phba->sli4_hba.rpi_hdrs_in_use) 9048 goto exit; 9049 9050 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, 9051 &phba->sli4_hba.lpfc_rpi_hdr_list, list) { 9052 list_del(&rpi_hdr->list); 9053 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, 9054 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); 9055 kfree(rpi_hdr->dmabuf); 9056 kfree(rpi_hdr); 9057 } 9058 exit: 9059 /* There are no rpis available to the port now. */ 9060 phba->sli4_hba.next_rpi = 0; 9061 } 9062 9063 /** 9064 * lpfc_hba_alloc - Allocate driver hba data structure for a device. 9065 * @pdev: pointer to pci device data structure. 9066 * 9067 * This routine is invoked to allocate the driver hba data structure for an 9068 * HBA device. If the allocation is successful, the phba reference to the 9069 * PCI device data structure is set. 9070 * 9071 * Return codes 9072 * pointer to @phba - successful 9073 * NULL - error 9074 **/ 9075 static struct lpfc_hba * 9076 lpfc_hba_alloc(struct pci_dev *pdev) 9077 { 9078 struct lpfc_hba *phba; 9079 9080 /* Allocate memory for HBA structure */ 9081 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); 9082 if (!phba) { 9083 dev_err(&pdev->dev, "failed to allocate hba struct\n"); 9084 return NULL; 9085 } 9086 9087 /* Set reference to PCI device in HBA structure */ 9088 phba->pcidev = pdev; 9089 9090 /* Assign an unused board number */ 9091 phba->brd_no = lpfc_get_instance(); 9092 if (phba->brd_no < 0) { 9093 kfree(phba); 9094 return NULL; 9095 } 9096 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; 9097 9098 spin_lock_init(&phba->ct_ev_lock); 9099 INIT_LIST_HEAD(&phba->ct_ev_waiters); 9100 9101 return phba; 9102 } 9103 9104 /** 9105 * lpfc_hba_free - Free driver hba data structure with a device. 9106 * @phba: pointer to lpfc hba data structure. 9107 * 9108 * This routine is invoked to free the driver hba data structure with an 9109 * HBA device. 9110 **/ 9111 static void 9112 lpfc_hba_free(struct lpfc_hba *phba) 9113 { 9114 if (phba->sli_rev == LPFC_SLI_REV4) 9115 kfree(phba->sli4_hba.hdwq); 9116 9117 /* Release the driver assigned board number */ 9118 idr_remove(&lpfc_hba_index, phba->brd_no); 9119 9120 /* Free memory allocated with sli3 rings */ 9121 kfree(phba->sli.sli3_ring); 9122 phba->sli.sli3_ring = NULL; 9123 9124 kfree(phba); 9125 return; 9126 } 9127 9128 /** 9129 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes 9130 * @vport: pointer to lpfc vport data structure. 9131 * 9132 * This routine is will setup initial FDMI attribute masks for 9133 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt 9134 * to get these attributes first before falling back, the attribute 9135 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1 9136 **/ 9137 void 9138 lpfc_setup_fdmi_mask(struct lpfc_vport *vport) 9139 { 9140 struct lpfc_hba *phba = vport->phba; 9141 9142 vport->load_flag |= FC_ALLOW_FDMI; 9143 if (phba->cfg_enable_SmartSAN || 9144 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) { 9145 /* Setup appropriate attribute masks */ 9146 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; 9147 if (phba->cfg_enable_SmartSAN) 9148 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; 9149 else 9150 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; 9151 } 9152 9153 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY, 9154 "6077 Setup FDMI mask: hba x%x port x%x\n", 9155 vport->fdmi_hba_mask, vport->fdmi_port_mask); 9156 } 9157 9158 /** 9159 * lpfc_create_shost - Create hba physical port with associated scsi host. 9160 * @phba: pointer to lpfc hba data structure. 9161 * 9162 * This routine is invoked to create HBA physical port and associate a SCSI 9163 * host with it. 9164 * 9165 * Return codes 9166 * 0 - successful 9167 * other values - error 9168 **/ 9169 static int 9170 lpfc_create_shost(struct lpfc_hba *phba) 9171 { 9172 struct lpfc_vport *vport; 9173 struct Scsi_Host *shost; 9174 9175 /* Initialize HBA FC structure */ 9176 phba->fc_edtov = FF_DEF_EDTOV; 9177 phba->fc_ratov = FF_DEF_RATOV; 9178 phba->fc_altov = FF_DEF_ALTOV; 9179 phba->fc_arbtov = FF_DEF_ARBTOV; 9180 9181 atomic_set(&phba->sdev_cnt, 0); 9182 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); 9183 if (!vport) 9184 return -ENODEV; 9185 9186 shost = lpfc_shost_from_vport(vport); 9187 phba->pport = vport; 9188 9189 if (phba->nvmet_support) { 9190 /* Only 1 vport (pport) will support NVME target */ 9191 phba->targetport = NULL; 9192 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; 9193 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, 9194 "6076 NVME Target Found\n"); 9195 } 9196 9197 lpfc_debugfs_initialize(vport); 9198 /* Put reference to SCSI host to driver's device private data */ 9199 pci_set_drvdata(phba->pcidev, shost); 9200 9201 lpfc_setup_fdmi_mask(vport); 9202 9203 /* 9204 * At this point we are fully registered with PSA. In addition, 9205 * any initial discovery should be completed. 9206 */ 9207 return 0; 9208 } 9209 9210 /** 9211 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. 9212 * @phba: pointer to lpfc hba data structure. 9213 * 9214 * This routine is invoked to destroy HBA physical port and the associated 9215 * SCSI host. 9216 **/ 9217 static void 9218 lpfc_destroy_shost(struct lpfc_hba *phba) 9219 { 9220 struct lpfc_vport *vport = phba->pport; 9221 9222 /* Destroy physical port that associated with the SCSI host */ 9223 destroy_port(vport); 9224 9225 return; 9226 } 9227 9228 /** 9229 * lpfc_setup_bg - Setup Block guard structures and debug areas. 9230 * @phba: pointer to lpfc hba data structure. 9231 * @shost: the shost to be used to detect Block guard settings. 9232 * 9233 * This routine sets up the local Block guard protocol settings for @shost. 9234 * This routine also allocates memory for debugging bg buffers. 9235 **/ 9236 static void 9237 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) 9238 { 9239 uint32_t old_mask; 9240 uint32_t old_guard; 9241 9242 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9243 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9244 "1478 Registering BlockGuard with the " 9245 "SCSI layer\n"); 9246 9247 old_mask = phba->cfg_prot_mask; 9248 old_guard = phba->cfg_prot_guard; 9249 9250 /* Only allow supported values */ 9251 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | 9252 SHOST_DIX_TYPE0_PROTECTION | 9253 SHOST_DIX_TYPE1_PROTECTION); 9254 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | 9255 SHOST_DIX_GUARD_CRC); 9256 9257 /* DIF Type 1 protection for profiles AST1/C1 is end to end */ 9258 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) 9259 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; 9260 9261 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9262 if ((old_mask != phba->cfg_prot_mask) || 9263 (old_guard != phba->cfg_prot_guard)) 9264 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9265 "1475 Registering BlockGuard with the " 9266 "SCSI layer: mask %d guard %d\n", 9267 phba->cfg_prot_mask, 9268 phba->cfg_prot_guard); 9269 9270 scsi_host_set_prot(shost, phba->cfg_prot_mask); 9271 scsi_host_set_guard(shost, phba->cfg_prot_guard); 9272 } else 9273 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9274 "1479 Not Registering BlockGuard with the SCSI " 9275 "layer, Bad protection parameters: %d %d\n", 9276 old_mask, old_guard); 9277 } 9278 } 9279 9280 /** 9281 * lpfc_post_init_setup - Perform necessary device post initialization setup. 9282 * @phba: pointer to lpfc hba data structure. 9283 * 9284 * This routine is invoked to perform all the necessary post initialization 9285 * setup for the device. 9286 **/ 9287 static void 9288 lpfc_post_init_setup(struct lpfc_hba *phba) 9289 { 9290 struct Scsi_Host *shost; 9291 struct lpfc_adapter_event_header adapter_event; 9292 9293 /* Get the default values for Model Name and Description */ 9294 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 9295 9296 /* 9297 * hba setup may have changed the hba_queue_depth so we need to 9298 * adjust the value of can_queue. 9299 */ 9300 shost = pci_get_drvdata(phba->pcidev); 9301 shost->can_queue = phba->cfg_hba_queue_depth - 10; 9302 9303 lpfc_host_attrib_init(shost); 9304 9305 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 9306 spin_lock_irq(shost->host_lock); 9307 lpfc_poll_start_timer(phba); 9308 spin_unlock_irq(shost->host_lock); 9309 } 9310 9311 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9312 "0428 Perform SCSI scan\n"); 9313 /* Send board arrival event to upper layer */ 9314 adapter_event.event_type = FC_REG_ADAPTER_EVENT; 9315 adapter_event.subcategory = LPFC_EVENT_ARRIVAL; 9316 fc_host_post_vendor_event(shost, fc_get_event_number(), 9317 sizeof(adapter_event), 9318 (char *) &adapter_event, 9319 LPFC_NL_VENDOR_ID); 9320 return; 9321 } 9322 9323 /** 9324 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. 9325 * @phba: pointer to lpfc hba data structure. 9326 * 9327 * This routine is invoked to set up the PCI device memory space for device 9328 * with SLI-3 interface spec. 9329 * 9330 * Return codes 9331 * 0 - successful 9332 * other values - error 9333 **/ 9334 static int 9335 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) 9336 { 9337 struct pci_dev *pdev = phba->pcidev; 9338 unsigned long bar0map_len, bar2map_len; 9339 int i, hbq_count; 9340 void *ptr; 9341 int error; 9342 9343 if (!pdev) 9344 return -ENODEV; 9345 9346 /* Set the device DMA mask size */ 9347 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9348 if (error) 9349 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9350 if (error) 9351 return error; 9352 error = -ENODEV; 9353 9354 /* Get the bus address of Bar0 and Bar2 and the number of bytes 9355 * required by each mapping. 9356 */ 9357 phba->pci_bar0_map = pci_resource_start(pdev, 0); 9358 bar0map_len = pci_resource_len(pdev, 0); 9359 9360 phba->pci_bar2_map = pci_resource_start(pdev, 2); 9361 bar2map_len = pci_resource_len(pdev, 2); 9362 9363 /* Map HBA SLIM to a kernel virtual address. */ 9364 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 9365 if (!phba->slim_memmap_p) { 9366 dev_printk(KERN_ERR, &pdev->dev, 9367 "ioremap failed for SLIM memory.\n"); 9368 goto out; 9369 } 9370 9371 /* Map HBA Control Registers to a kernel virtual address. */ 9372 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 9373 if (!phba->ctrl_regs_memmap_p) { 9374 dev_printk(KERN_ERR, &pdev->dev, 9375 "ioremap failed for HBA control registers.\n"); 9376 goto out_iounmap_slim; 9377 } 9378 9379 /* Allocate memory for SLI-2 structures */ 9380 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9381 &phba->slim2p.phys, GFP_KERNEL); 9382 if (!phba->slim2p.virt) 9383 goto out_iounmap; 9384 9385 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); 9386 phba->mbox_ext = (phba->slim2p.virt + 9387 offsetof(struct lpfc_sli2_slim, mbx_ext_words)); 9388 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); 9389 phba->IOCBs = (phba->slim2p.virt + 9390 offsetof(struct lpfc_sli2_slim, IOCBs)); 9391 9392 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, 9393 lpfc_sli_hbq_size(), 9394 &phba->hbqslimp.phys, 9395 GFP_KERNEL); 9396 if (!phba->hbqslimp.virt) 9397 goto out_free_slim; 9398 9399 hbq_count = lpfc_sli_hbq_count(); 9400 ptr = phba->hbqslimp.virt; 9401 for (i = 0; i < hbq_count; ++i) { 9402 phba->hbqs[i].hbq_virt = ptr; 9403 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); 9404 ptr += (lpfc_hbq_defs[i]->entry_count * 9405 sizeof(struct lpfc_hbq_entry)); 9406 } 9407 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; 9408 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; 9409 9410 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); 9411 9412 phba->MBslimaddr = phba->slim_memmap_p; 9413 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 9414 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 9415 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 9416 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 9417 9418 return 0; 9419 9420 out_free_slim: 9421 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9422 phba->slim2p.virt, phba->slim2p.phys); 9423 out_iounmap: 9424 iounmap(phba->ctrl_regs_memmap_p); 9425 out_iounmap_slim: 9426 iounmap(phba->slim_memmap_p); 9427 out: 9428 return error; 9429 } 9430 9431 /** 9432 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. 9433 * @phba: pointer to lpfc hba data structure. 9434 * 9435 * This routine is invoked to unset the PCI device memory space for device 9436 * with SLI-3 interface spec. 9437 **/ 9438 static void 9439 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) 9440 { 9441 struct pci_dev *pdev; 9442 9443 /* Obtain PCI device reference */ 9444 if (!phba->pcidev) 9445 return; 9446 else 9447 pdev = phba->pcidev; 9448 9449 /* Free coherent DMA memory allocated */ 9450 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 9451 phba->hbqslimp.virt, phba->hbqslimp.phys); 9452 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9453 phba->slim2p.virt, phba->slim2p.phys); 9454 9455 /* I/O memory unmap */ 9456 iounmap(phba->ctrl_regs_memmap_p); 9457 iounmap(phba->slim_memmap_p); 9458 9459 return; 9460 } 9461 9462 /** 9463 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status 9464 * @phba: pointer to lpfc hba data structure. 9465 * 9466 * This routine is invoked to wait for SLI4 device Power On Self Test (POST) 9467 * done and check status. 9468 * 9469 * Return 0 if successful, otherwise -ENODEV. 9470 **/ 9471 int 9472 lpfc_sli4_post_status_check(struct lpfc_hba *phba) 9473 { 9474 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; 9475 struct lpfc_register reg_data; 9476 int i, port_error = 0; 9477 uint32_t if_type; 9478 9479 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 9480 memset(®_data, 0, sizeof(reg_data)); 9481 if (!phba->sli4_hba.PSMPHRregaddr) 9482 return -ENODEV; 9483 9484 /* Wait up to 30 seconds for the SLI Port POST done and ready */ 9485 for (i = 0; i < 3000; i++) { 9486 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 9487 &portsmphr_reg.word0) || 9488 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { 9489 /* Port has a fatal POST error, break out */ 9490 port_error = -ENODEV; 9491 break; 9492 } 9493 if (LPFC_POST_STAGE_PORT_READY == 9494 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) 9495 break; 9496 msleep(10); 9497 } 9498 9499 /* 9500 * If there was a port error during POST, then don't proceed with 9501 * other register reads as the data may not be valid. Just exit. 9502 */ 9503 if (port_error) { 9504 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9505 "1408 Port Failed POST - portsmphr=0x%x, " 9506 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " 9507 "scr2=x%x, hscratch=x%x, pstatus=x%x\n", 9508 portsmphr_reg.word0, 9509 bf_get(lpfc_port_smphr_perr, &portsmphr_reg), 9510 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), 9511 bf_get(lpfc_port_smphr_nip, &portsmphr_reg), 9512 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), 9513 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), 9514 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), 9515 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), 9516 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); 9517 } else { 9518 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9519 "2534 Device Info: SLIFamily=0x%x, " 9520 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " 9521 "SLIHint_2=0x%x, FT=0x%x\n", 9522 bf_get(lpfc_sli_intf_sli_family, 9523 &phba->sli4_hba.sli_intf), 9524 bf_get(lpfc_sli_intf_slirev, 9525 &phba->sli4_hba.sli_intf), 9526 bf_get(lpfc_sli_intf_if_type, 9527 &phba->sli4_hba.sli_intf), 9528 bf_get(lpfc_sli_intf_sli_hint1, 9529 &phba->sli4_hba.sli_intf), 9530 bf_get(lpfc_sli_intf_sli_hint2, 9531 &phba->sli4_hba.sli_intf), 9532 bf_get(lpfc_sli_intf_func_type, 9533 &phba->sli4_hba.sli_intf)); 9534 /* 9535 * Check for other Port errors during the initialization 9536 * process. Fail the load if the port did not come up 9537 * correctly. 9538 */ 9539 if_type = bf_get(lpfc_sli_intf_if_type, 9540 &phba->sli4_hba.sli_intf); 9541 switch (if_type) { 9542 case LPFC_SLI_INTF_IF_TYPE_0: 9543 phba->sli4_hba.ue_mask_lo = 9544 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); 9545 phba->sli4_hba.ue_mask_hi = 9546 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); 9547 uerrlo_reg.word0 = 9548 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); 9549 uerrhi_reg.word0 = 9550 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); 9551 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || 9552 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { 9553 lpfc_printf_log(phba, KERN_ERR, 9554 LOG_TRACE_EVENT, 9555 "1422 Unrecoverable Error " 9556 "Detected during POST " 9557 "uerr_lo_reg=0x%x, " 9558 "uerr_hi_reg=0x%x, " 9559 "ue_mask_lo_reg=0x%x, " 9560 "ue_mask_hi_reg=0x%x\n", 9561 uerrlo_reg.word0, 9562 uerrhi_reg.word0, 9563 phba->sli4_hba.ue_mask_lo, 9564 phba->sli4_hba.ue_mask_hi); 9565 port_error = -ENODEV; 9566 } 9567 break; 9568 case LPFC_SLI_INTF_IF_TYPE_2: 9569 case LPFC_SLI_INTF_IF_TYPE_6: 9570 /* Final checks. The port status should be clean. */ 9571 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, 9572 ®_data.word0) || 9573 lpfc_sli4_unrecoverable_port(®_data)) { 9574 phba->work_status[0] = 9575 readl(phba->sli4_hba.u.if_type2. 9576 ERR1regaddr); 9577 phba->work_status[1] = 9578 readl(phba->sli4_hba.u.if_type2. 9579 ERR2regaddr); 9580 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9581 "2888 Unrecoverable port error " 9582 "following POST: port status reg " 9583 "0x%x, port_smphr reg 0x%x, " 9584 "error 1=0x%x, error 2=0x%x\n", 9585 reg_data.word0, 9586 portsmphr_reg.word0, 9587 phba->work_status[0], 9588 phba->work_status[1]); 9589 port_error = -ENODEV; 9590 break; 9591 } 9592 9593 if (lpfc_pldv_detect && 9594 bf_get(lpfc_sli_intf_sli_family, 9595 &phba->sli4_hba.sli_intf) == 9596 LPFC_SLI_INTF_FAMILY_G6) 9597 pci_write_config_byte(phba->pcidev, 9598 LPFC_SLI_INTF, CFG_PLD); 9599 break; 9600 case LPFC_SLI_INTF_IF_TYPE_1: 9601 default: 9602 break; 9603 } 9604 } 9605 return port_error; 9606 } 9607 9608 /** 9609 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. 9610 * @phba: pointer to lpfc hba data structure. 9611 * @if_type: The SLI4 interface type getting configured. 9612 * 9613 * This routine is invoked to set up SLI4 BAR0 PCI config space register 9614 * memory map. 9615 **/ 9616 static void 9617 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9618 { 9619 switch (if_type) { 9620 case LPFC_SLI_INTF_IF_TYPE_0: 9621 phba->sli4_hba.u.if_type0.UERRLOregaddr = 9622 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; 9623 phba->sli4_hba.u.if_type0.UERRHIregaddr = 9624 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; 9625 phba->sli4_hba.u.if_type0.UEMASKLOregaddr = 9626 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; 9627 phba->sli4_hba.u.if_type0.UEMASKHIregaddr = 9628 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; 9629 phba->sli4_hba.SLIINTFregaddr = 9630 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9631 break; 9632 case LPFC_SLI_INTF_IF_TYPE_2: 9633 phba->sli4_hba.u.if_type2.EQDregaddr = 9634 phba->sli4_hba.conf_regs_memmap_p + 9635 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9636 phba->sli4_hba.u.if_type2.ERR1regaddr = 9637 phba->sli4_hba.conf_regs_memmap_p + 9638 LPFC_CTL_PORT_ER1_OFFSET; 9639 phba->sli4_hba.u.if_type2.ERR2regaddr = 9640 phba->sli4_hba.conf_regs_memmap_p + 9641 LPFC_CTL_PORT_ER2_OFFSET; 9642 phba->sli4_hba.u.if_type2.CTRLregaddr = 9643 phba->sli4_hba.conf_regs_memmap_p + 9644 LPFC_CTL_PORT_CTL_OFFSET; 9645 phba->sli4_hba.u.if_type2.STATUSregaddr = 9646 phba->sli4_hba.conf_regs_memmap_p + 9647 LPFC_CTL_PORT_STA_OFFSET; 9648 phba->sli4_hba.SLIINTFregaddr = 9649 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9650 phba->sli4_hba.PSMPHRregaddr = 9651 phba->sli4_hba.conf_regs_memmap_p + 9652 LPFC_CTL_PORT_SEM_OFFSET; 9653 phba->sli4_hba.RQDBregaddr = 9654 phba->sli4_hba.conf_regs_memmap_p + 9655 LPFC_ULP0_RQ_DOORBELL; 9656 phba->sli4_hba.WQDBregaddr = 9657 phba->sli4_hba.conf_regs_memmap_p + 9658 LPFC_ULP0_WQ_DOORBELL; 9659 phba->sli4_hba.CQDBregaddr = 9660 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; 9661 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9662 phba->sli4_hba.MQDBregaddr = 9663 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; 9664 phba->sli4_hba.BMBXregaddr = 9665 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9666 break; 9667 case LPFC_SLI_INTF_IF_TYPE_6: 9668 phba->sli4_hba.u.if_type2.EQDregaddr = 9669 phba->sli4_hba.conf_regs_memmap_p + 9670 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9671 phba->sli4_hba.u.if_type2.ERR1regaddr = 9672 phba->sli4_hba.conf_regs_memmap_p + 9673 LPFC_CTL_PORT_ER1_OFFSET; 9674 phba->sli4_hba.u.if_type2.ERR2regaddr = 9675 phba->sli4_hba.conf_regs_memmap_p + 9676 LPFC_CTL_PORT_ER2_OFFSET; 9677 phba->sli4_hba.u.if_type2.CTRLregaddr = 9678 phba->sli4_hba.conf_regs_memmap_p + 9679 LPFC_CTL_PORT_CTL_OFFSET; 9680 phba->sli4_hba.u.if_type2.STATUSregaddr = 9681 phba->sli4_hba.conf_regs_memmap_p + 9682 LPFC_CTL_PORT_STA_OFFSET; 9683 phba->sli4_hba.PSMPHRregaddr = 9684 phba->sli4_hba.conf_regs_memmap_p + 9685 LPFC_CTL_PORT_SEM_OFFSET; 9686 phba->sli4_hba.BMBXregaddr = 9687 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9688 break; 9689 case LPFC_SLI_INTF_IF_TYPE_1: 9690 default: 9691 dev_printk(KERN_ERR, &phba->pcidev->dev, 9692 "FATAL - unsupported SLI4 interface type - %d\n", 9693 if_type); 9694 break; 9695 } 9696 } 9697 9698 /** 9699 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. 9700 * @phba: pointer to lpfc hba data structure. 9701 * @if_type: sli if type to operate on. 9702 * 9703 * This routine is invoked to set up SLI4 BAR1 register memory map. 9704 **/ 9705 static void 9706 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9707 { 9708 switch (if_type) { 9709 case LPFC_SLI_INTF_IF_TYPE_0: 9710 phba->sli4_hba.PSMPHRregaddr = 9711 phba->sli4_hba.ctrl_regs_memmap_p + 9712 LPFC_SLIPORT_IF0_SMPHR; 9713 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9714 LPFC_HST_ISR0; 9715 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9716 LPFC_HST_IMR0; 9717 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9718 LPFC_HST_ISCR0; 9719 break; 9720 case LPFC_SLI_INTF_IF_TYPE_6: 9721 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9722 LPFC_IF6_RQ_DOORBELL; 9723 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9724 LPFC_IF6_WQ_DOORBELL; 9725 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9726 LPFC_IF6_CQ_DOORBELL; 9727 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9728 LPFC_IF6_EQ_DOORBELL; 9729 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9730 LPFC_IF6_MQ_DOORBELL; 9731 break; 9732 case LPFC_SLI_INTF_IF_TYPE_2: 9733 case LPFC_SLI_INTF_IF_TYPE_1: 9734 default: 9735 dev_err(&phba->pcidev->dev, 9736 "FATAL - unsupported SLI4 interface type - %d\n", 9737 if_type); 9738 break; 9739 } 9740 } 9741 9742 /** 9743 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. 9744 * @phba: pointer to lpfc hba data structure. 9745 * @vf: virtual function number 9746 * 9747 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map 9748 * based on the given viftual function number, @vf. 9749 * 9750 * Return 0 if successful, otherwise -ENODEV. 9751 **/ 9752 static int 9753 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) 9754 { 9755 if (vf > LPFC_VIR_FUNC_MAX) 9756 return -ENODEV; 9757 9758 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9759 vf * LPFC_VFR_PAGE_SIZE + 9760 LPFC_ULP0_RQ_DOORBELL); 9761 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9762 vf * LPFC_VFR_PAGE_SIZE + 9763 LPFC_ULP0_WQ_DOORBELL); 9764 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9765 vf * LPFC_VFR_PAGE_SIZE + 9766 LPFC_EQCQ_DOORBELL); 9767 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9768 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9769 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); 9770 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9771 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); 9772 return 0; 9773 } 9774 9775 /** 9776 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox 9777 * @phba: pointer to lpfc hba data structure. 9778 * 9779 * This routine is invoked to create the bootstrap mailbox 9780 * region consistent with the SLI-4 interface spec. This 9781 * routine allocates all memory necessary to communicate 9782 * mailbox commands to the port and sets up all alignment 9783 * needs. No locks are expected to be held when calling 9784 * this routine. 9785 * 9786 * Return codes 9787 * 0 - successful 9788 * -ENOMEM - could not allocated memory. 9789 **/ 9790 static int 9791 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) 9792 { 9793 uint32_t bmbx_size; 9794 struct lpfc_dmabuf *dmabuf; 9795 struct dma_address *dma_address; 9796 uint32_t pa_addr; 9797 uint64_t phys_addr; 9798 9799 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 9800 if (!dmabuf) 9801 return -ENOMEM; 9802 9803 /* 9804 * The bootstrap mailbox region is comprised of 2 parts 9805 * plus an alignment restriction of 16 bytes. 9806 */ 9807 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); 9808 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, 9809 &dmabuf->phys, GFP_KERNEL); 9810 if (!dmabuf->virt) { 9811 kfree(dmabuf); 9812 return -ENOMEM; 9813 } 9814 9815 /* 9816 * Initialize the bootstrap mailbox pointers now so that the register 9817 * operations are simple later. The mailbox dma address is required 9818 * to be 16-byte aligned. Also align the virtual memory as each 9819 * maibox is copied into the bmbx mailbox region before issuing the 9820 * command to the port. 9821 */ 9822 phba->sli4_hba.bmbx.dmabuf = dmabuf; 9823 phba->sli4_hba.bmbx.bmbx_size = bmbx_size; 9824 9825 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, 9826 LPFC_ALIGN_16_BYTE); 9827 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, 9828 LPFC_ALIGN_16_BYTE); 9829 9830 /* 9831 * Set the high and low physical addresses now. The SLI4 alignment 9832 * requirement is 16 bytes and the mailbox is posted to the port 9833 * as two 30-bit addresses. The other data is a bit marking whether 9834 * the 30-bit address is the high or low address. 9835 * Upcast bmbx aphys to 64bits so shift instruction compiles 9836 * clean on 32 bit machines. 9837 */ 9838 dma_address = &phba->sli4_hba.bmbx.dma_address; 9839 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; 9840 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); 9841 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | 9842 LPFC_BMBX_BIT1_ADDR_HI); 9843 9844 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); 9845 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | 9846 LPFC_BMBX_BIT1_ADDR_LO); 9847 return 0; 9848 } 9849 9850 /** 9851 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources 9852 * @phba: pointer to lpfc hba data structure. 9853 * 9854 * This routine is invoked to teardown the bootstrap mailbox 9855 * region and release all host resources. This routine requires 9856 * the caller to ensure all mailbox commands recovered, no 9857 * additional mailbox comands are sent, and interrupts are disabled 9858 * before calling this routine. 9859 * 9860 **/ 9861 static void 9862 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) 9863 { 9864 dma_free_coherent(&phba->pcidev->dev, 9865 phba->sli4_hba.bmbx.bmbx_size, 9866 phba->sli4_hba.bmbx.dmabuf->virt, 9867 phba->sli4_hba.bmbx.dmabuf->phys); 9868 9869 kfree(phba->sli4_hba.bmbx.dmabuf); 9870 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); 9871 } 9872 9873 static const char * const lpfc_topo_to_str[] = { 9874 "Loop then P2P", 9875 "Loopback", 9876 "P2P Only", 9877 "Unsupported", 9878 "Loop Only", 9879 "Unsupported", 9880 "P2P then Loop", 9881 }; 9882 9883 #define LINK_FLAGS_DEF 0x0 9884 #define LINK_FLAGS_P2P 0x1 9885 #define LINK_FLAGS_LOOP 0x2 9886 /** 9887 * lpfc_map_topology - Map the topology read from READ_CONFIG 9888 * @phba: pointer to lpfc hba data structure. 9889 * @rd_config: pointer to read config data 9890 * 9891 * This routine is invoked to map the topology values as read 9892 * from the read config mailbox command. If the persistent 9893 * topology feature is supported, the firmware will provide the 9894 * saved topology information to be used in INIT_LINK 9895 **/ 9896 static void 9897 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) 9898 { 9899 u8 ptv, tf, pt; 9900 9901 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); 9902 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); 9903 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); 9904 9905 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9906 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", 9907 ptv, tf, pt); 9908 if (!ptv) { 9909 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9910 "2019 FW does not support persistent topology " 9911 "Using driver parameter defined value [%s]", 9912 lpfc_topo_to_str[phba->cfg_topology]); 9913 return; 9914 } 9915 /* FW supports persistent topology - override module parameter value */ 9916 phba->hba_flag |= HBA_PERSISTENT_TOPO; 9917 9918 /* if ASIC_GEN_NUM >= 0xC) */ 9919 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 9920 LPFC_SLI_INTF_IF_TYPE_6) || 9921 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 9922 LPFC_SLI_INTF_FAMILY_G6)) { 9923 if (!tf) { 9924 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) 9925 ? FLAGS_TOPOLOGY_MODE_LOOP 9926 : FLAGS_TOPOLOGY_MODE_PT_PT); 9927 } else { 9928 phba->hba_flag &= ~HBA_PERSISTENT_TOPO; 9929 } 9930 } else { /* G5 */ 9931 if (tf) { 9932 /* If topology failover set - pt is '0' or '1' */ 9933 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : 9934 FLAGS_TOPOLOGY_MODE_LOOP_PT); 9935 } else { 9936 phba->cfg_topology = ((pt == LINK_FLAGS_P2P) 9937 ? FLAGS_TOPOLOGY_MODE_PT_PT 9938 : FLAGS_TOPOLOGY_MODE_LOOP); 9939 } 9940 } 9941 if (phba->hba_flag & HBA_PERSISTENT_TOPO) { 9942 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9943 "2020 Using persistent topology value [%s]", 9944 lpfc_topo_to_str[phba->cfg_topology]); 9945 } else { 9946 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9947 "2021 Invalid topology values from FW " 9948 "Using driver parameter defined value [%s]", 9949 lpfc_topo_to_str[phba->cfg_topology]); 9950 } 9951 } 9952 9953 /** 9954 * lpfc_sli4_read_config - Get the config parameters. 9955 * @phba: pointer to lpfc hba data structure. 9956 * 9957 * This routine is invoked to read the configuration parameters from the HBA. 9958 * The configuration parameters are used to set the base and maximum values 9959 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource 9960 * allocation for the port. 9961 * 9962 * Return codes 9963 * 0 - successful 9964 * -ENOMEM - No available memory 9965 * -EIO - The mailbox failed to complete successfully. 9966 **/ 9967 int 9968 lpfc_sli4_read_config(struct lpfc_hba *phba) 9969 { 9970 LPFC_MBOXQ_t *pmb; 9971 struct lpfc_mbx_read_config *rd_config; 9972 union lpfc_sli4_cfg_shdr *shdr; 9973 uint32_t shdr_status, shdr_add_status; 9974 struct lpfc_mbx_get_func_cfg *get_func_cfg; 9975 struct lpfc_rsrc_desc_fcfcoe *desc; 9976 char *pdesc_0; 9977 uint16_t forced_link_speed; 9978 uint32_t if_type, qmin, fawwpn; 9979 int length, i, rc = 0, rc2; 9980 9981 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 9982 if (!pmb) { 9983 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9984 "2011 Unable to allocate memory for issuing " 9985 "SLI_CONFIG_SPECIAL mailbox command\n"); 9986 return -ENOMEM; 9987 } 9988 9989 lpfc_read_config(phba, pmb); 9990 9991 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 9992 if (rc != MBX_SUCCESS) { 9993 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9994 "2012 Mailbox failed , mbxCmd x%x " 9995 "READ_CONFIG, mbxStatus x%x\n", 9996 bf_get(lpfc_mqe_command, &pmb->u.mqe), 9997 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 9998 rc = -EIO; 9999 } else { 10000 rd_config = &pmb->u.mqe.un.rd_config; 10001 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { 10002 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; 10003 phba->sli4_hba.lnk_info.lnk_tp = 10004 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); 10005 phba->sli4_hba.lnk_info.lnk_no = 10006 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); 10007 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10008 "3081 lnk_type:%d, lnk_numb:%d\n", 10009 phba->sli4_hba.lnk_info.lnk_tp, 10010 phba->sli4_hba.lnk_info.lnk_no); 10011 } else 10012 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 10013 "3082 Mailbox (x%x) returned ldv:x0\n", 10014 bf_get(lpfc_mqe_command, &pmb->u.mqe)); 10015 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { 10016 phba->bbcredit_support = 1; 10017 phba->sli4_hba.bbscn_params.word0 = rd_config->word8; 10018 } 10019 10020 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config); 10021 10022 if (fawwpn) { 10023 lpfc_printf_log(phba, KERN_INFO, 10024 LOG_INIT | LOG_DISCOVERY, 10025 "2702 READ_CONFIG: FA-PWWN is " 10026 "configured on\n"); 10027 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG; 10028 } else { 10029 /* Clear FW configured flag, preserve driver flag */ 10030 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG; 10031 } 10032 10033 phba->sli4_hba.conf_trunk = 10034 bf_get(lpfc_mbx_rd_conf_trunk, rd_config); 10035 phba->sli4_hba.extents_in_use = 10036 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); 10037 10038 phba->sli4_hba.max_cfg_param.max_xri = 10039 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); 10040 /* Reduce resource usage in kdump environment */ 10041 if (is_kdump_kernel() && 10042 phba->sli4_hba.max_cfg_param.max_xri > 512) 10043 phba->sli4_hba.max_cfg_param.max_xri = 512; 10044 phba->sli4_hba.max_cfg_param.xri_base = 10045 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); 10046 phba->sli4_hba.max_cfg_param.max_vpi = 10047 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); 10048 /* Limit the max we support */ 10049 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) 10050 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; 10051 phba->sli4_hba.max_cfg_param.vpi_base = 10052 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); 10053 phba->sli4_hba.max_cfg_param.max_rpi = 10054 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); 10055 phba->sli4_hba.max_cfg_param.rpi_base = 10056 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); 10057 phba->sli4_hba.max_cfg_param.max_vfi = 10058 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); 10059 phba->sli4_hba.max_cfg_param.vfi_base = 10060 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); 10061 phba->sli4_hba.max_cfg_param.max_fcfi = 10062 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); 10063 phba->sli4_hba.max_cfg_param.max_eq = 10064 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); 10065 phba->sli4_hba.max_cfg_param.max_rq = 10066 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); 10067 phba->sli4_hba.max_cfg_param.max_wq = 10068 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); 10069 phba->sli4_hba.max_cfg_param.max_cq = 10070 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); 10071 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); 10072 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; 10073 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; 10074 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; 10075 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? 10076 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; 10077 phba->max_vports = phba->max_vpi; 10078 10079 /* Next decide on FPIN or Signal E2E CGN support 10080 * For congestion alarms and warnings valid combination are: 10081 * 1. FPIN alarms / FPIN warnings 10082 * 2. Signal alarms / Signal warnings 10083 * 3. FPIN alarms / Signal warnings 10084 * 4. Signal alarms / FPIN warnings 10085 * 10086 * Initialize the adapter frequency to 100 mSecs 10087 */ 10088 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10089 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; 10090 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency; 10091 10092 if (lpfc_use_cgn_signal) { 10093 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) { 10094 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY; 10095 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN; 10096 } 10097 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) { 10098 /* MUST support both alarm and warning 10099 * because EDC does not support alarm alone. 10100 */ 10101 if (phba->cgn_reg_signal != 10102 EDC_CG_SIG_WARN_ONLY) { 10103 /* Must support both or none */ 10104 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10105 phba->cgn_reg_signal = 10106 EDC_CG_SIG_NOTSUPPORTED; 10107 } else { 10108 phba->cgn_reg_signal = 10109 EDC_CG_SIG_WARN_ALARM; 10110 phba->cgn_reg_fpin = 10111 LPFC_CGN_FPIN_NONE; 10112 } 10113 } 10114 } 10115 10116 /* Set the congestion initial signal and fpin values. */ 10117 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin; 10118 phba->cgn_init_reg_signal = phba->cgn_reg_signal; 10119 10120 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 10121 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n", 10122 phba->cgn_reg_signal, phba->cgn_reg_fpin); 10123 10124 lpfc_map_topology(phba, rd_config); 10125 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10126 "2003 cfg params Extents? %d " 10127 "XRI(B:%d M:%d), " 10128 "VPI(B:%d M:%d) " 10129 "VFI(B:%d M:%d) " 10130 "RPI(B:%d M:%d) " 10131 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", 10132 phba->sli4_hba.extents_in_use, 10133 phba->sli4_hba.max_cfg_param.xri_base, 10134 phba->sli4_hba.max_cfg_param.max_xri, 10135 phba->sli4_hba.max_cfg_param.vpi_base, 10136 phba->sli4_hba.max_cfg_param.max_vpi, 10137 phba->sli4_hba.max_cfg_param.vfi_base, 10138 phba->sli4_hba.max_cfg_param.max_vfi, 10139 phba->sli4_hba.max_cfg_param.rpi_base, 10140 phba->sli4_hba.max_cfg_param.max_rpi, 10141 phba->sli4_hba.max_cfg_param.max_fcfi, 10142 phba->sli4_hba.max_cfg_param.max_eq, 10143 phba->sli4_hba.max_cfg_param.max_cq, 10144 phba->sli4_hba.max_cfg_param.max_wq, 10145 phba->sli4_hba.max_cfg_param.max_rq, 10146 phba->lmt); 10147 10148 /* 10149 * Calculate queue resources based on how 10150 * many WQ/CQ/EQs are available. 10151 */ 10152 qmin = phba->sli4_hba.max_cfg_param.max_wq; 10153 if (phba->sli4_hba.max_cfg_param.max_cq < qmin) 10154 qmin = phba->sli4_hba.max_cfg_param.max_cq; 10155 /* 10156 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and 10157 * the remainder can be used for NVME / FCP. 10158 */ 10159 qmin -= 4; 10160 if (phba->sli4_hba.max_cfg_param.max_eq < qmin) 10161 qmin = phba->sli4_hba.max_cfg_param.max_eq; 10162 10163 /* Check to see if there is enough for default cfg */ 10164 if ((phba->cfg_irq_chann > qmin) || 10165 (phba->cfg_hdw_queue > qmin)) { 10166 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10167 "2005 Reducing Queues - " 10168 "FW resource limitation: " 10169 "WQ %d CQ %d EQ %d: min %d: " 10170 "IRQ %d HDWQ %d\n", 10171 phba->sli4_hba.max_cfg_param.max_wq, 10172 phba->sli4_hba.max_cfg_param.max_cq, 10173 phba->sli4_hba.max_cfg_param.max_eq, 10174 qmin, phba->cfg_irq_chann, 10175 phba->cfg_hdw_queue); 10176 10177 if (phba->cfg_irq_chann > qmin) 10178 phba->cfg_irq_chann = qmin; 10179 if (phba->cfg_hdw_queue > qmin) 10180 phba->cfg_hdw_queue = qmin; 10181 } 10182 } 10183 10184 if (rc) 10185 goto read_cfg_out; 10186 10187 /* Update link speed if forced link speed is supported */ 10188 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10189 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 10190 forced_link_speed = 10191 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); 10192 if (forced_link_speed) { 10193 phba->hba_flag |= HBA_FORCED_LINK_SPEED; 10194 10195 switch (forced_link_speed) { 10196 case LINK_SPEED_1G: 10197 phba->cfg_link_speed = 10198 LPFC_USER_LINK_SPEED_1G; 10199 break; 10200 case LINK_SPEED_2G: 10201 phba->cfg_link_speed = 10202 LPFC_USER_LINK_SPEED_2G; 10203 break; 10204 case LINK_SPEED_4G: 10205 phba->cfg_link_speed = 10206 LPFC_USER_LINK_SPEED_4G; 10207 break; 10208 case LINK_SPEED_8G: 10209 phba->cfg_link_speed = 10210 LPFC_USER_LINK_SPEED_8G; 10211 break; 10212 case LINK_SPEED_10G: 10213 phba->cfg_link_speed = 10214 LPFC_USER_LINK_SPEED_10G; 10215 break; 10216 case LINK_SPEED_16G: 10217 phba->cfg_link_speed = 10218 LPFC_USER_LINK_SPEED_16G; 10219 break; 10220 case LINK_SPEED_32G: 10221 phba->cfg_link_speed = 10222 LPFC_USER_LINK_SPEED_32G; 10223 break; 10224 case LINK_SPEED_64G: 10225 phba->cfg_link_speed = 10226 LPFC_USER_LINK_SPEED_64G; 10227 break; 10228 case 0xffff: 10229 phba->cfg_link_speed = 10230 LPFC_USER_LINK_SPEED_AUTO; 10231 break; 10232 default: 10233 lpfc_printf_log(phba, KERN_ERR, 10234 LOG_TRACE_EVENT, 10235 "0047 Unrecognized link " 10236 "speed : %d\n", 10237 forced_link_speed); 10238 phba->cfg_link_speed = 10239 LPFC_USER_LINK_SPEED_AUTO; 10240 } 10241 } 10242 } 10243 10244 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 10245 length = phba->sli4_hba.max_cfg_param.max_xri - 10246 lpfc_sli4_get_els_iocb_cnt(phba); 10247 if (phba->cfg_hba_queue_depth > length) { 10248 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 10249 "3361 HBA queue depth changed from %d to %d\n", 10250 phba->cfg_hba_queue_depth, length); 10251 phba->cfg_hba_queue_depth = length; 10252 } 10253 10254 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 10255 LPFC_SLI_INTF_IF_TYPE_2) 10256 goto read_cfg_out; 10257 10258 /* get the pf# and vf# for SLI4 if_type 2 port */ 10259 length = (sizeof(struct lpfc_mbx_get_func_cfg) - 10260 sizeof(struct lpfc_sli4_cfg_mhdr)); 10261 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, 10262 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, 10263 length, LPFC_SLI4_MBX_EMBED); 10264 10265 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 10266 shdr = (union lpfc_sli4_cfg_shdr *) 10267 &pmb->u.mqe.un.sli4_config.header.cfg_shdr; 10268 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 10269 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 10270 if (rc2 || shdr_status || shdr_add_status) { 10271 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10272 "3026 Mailbox failed , mbxCmd x%x " 10273 "GET_FUNCTION_CONFIG, mbxStatus x%x\n", 10274 bf_get(lpfc_mqe_command, &pmb->u.mqe), 10275 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 10276 goto read_cfg_out; 10277 } 10278 10279 /* search for fc_fcoe resrouce descriptor */ 10280 get_func_cfg = &pmb->u.mqe.un.get_func_cfg; 10281 10282 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; 10283 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; 10284 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); 10285 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) 10286 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; 10287 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) 10288 goto read_cfg_out; 10289 10290 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { 10291 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); 10292 if (LPFC_RSRC_DESC_TYPE_FCFCOE == 10293 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { 10294 phba->sli4_hba.iov.pf_number = 10295 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); 10296 phba->sli4_hba.iov.vf_number = 10297 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); 10298 break; 10299 } 10300 } 10301 10302 if (i < LPFC_RSRC_DESC_MAX_NUM) 10303 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10304 "3027 GET_FUNCTION_CONFIG: pf_number:%d, " 10305 "vf_number:%d\n", phba->sli4_hba.iov.pf_number, 10306 phba->sli4_hba.iov.vf_number); 10307 else 10308 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10309 "3028 GET_FUNCTION_CONFIG: failed to find " 10310 "Resource Descriptor:x%x\n", 10311 LPFC_RSRC_DESC_TYPE_FCFCOE); 10312 10313 read_cfg_out: 10314 mempool_free(pmb, phba->mbox_mem_pool); 10315 return rc; 10316 } 10317 10318 /** 10319 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. 10320 * @phba: pointer to lpfc hba data structure. 10321 * 10322 * This routine is invoked to setup the port-side endian order when 10323 * the port if_type is 0. This routine has no function for other 10324 * if_types. 10325 * 10326 * Return codes 10327 * 0 - successful 10328 * -ENOMEM - No available memory 10329 * -EIO - The mailbox failed to complete successfully. 10330 **/ 10331 static int 10332 lpfc_setup_endian_order(struct lpfc_hba *phba) 10333 { 10334 LPFC_MBOXQ_t *mboxq; 10335 uint32_t if_type, rc = 0; 10336 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, 10337 HOST_ENDIAN_HIGH_WORD1}; 10338 10339 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10340 switch (if_type) { 10341 case LPFC_SLI_INTF_IF_TYPE_0: 10342 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 10343 GFP_KERNEL); 10344 if (!mboxq) { 10345 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10346 "0492 Unable to allocate memory for " 10347 "issuing SLI_CONFIG_SPECIAL mailbox " 10348 "command\n"); 10349 return -ENOMEM; 10350 } 10351 10352 /* 10353 * The SLI4_CONFIG_SPECIAL mailbox command requires the first 10354 * two words to contain special data values and no other data. 10355 */ 10356 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); 10357 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); 10358 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 10359 if (rc != MBX_SUCCESS) { 10360 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10361 "0493 SLI_CONFIG_SPECIAL mailbox " 10362 "failed with status x%x\n", 10363 rc); 10364 rc = -EIO; 10365 } 10366 mempool_free(mboxq, phba->mbox_mem_pool); 10367 break; 10368 case LPFC_SLI_INTF_IF_TYPE_6: 10369 case LPFC_SLI_INTF_IF_TYPE_2: 10370 case LPFC_SLI_INTF_IF_TYPE_1: 10371 default: 10372 break; 10373 } 10374 return rc; 10375 } 10376 10377 /** 10378 * lpfc_sli4_queue_verify - Verify and update EQ counts 10379 * @phba: pointer to lpfc hba data structure. 10380 * 10381 * This routine is invoked to check the user settable queue counts for EQs. 10382 * After this routine is called the counts will be set to valid values that 10383 * adhere to the constraints of the system's interrupt vectors and the port's 10384 * queue resources. 10385 * 10386 * Return codes 10387 * 0 - successful 10388 * -ENOMEM - No available memory 10389 **/ 10390 static int 10391 lpfc_sli4_queue_verify(struct lpfc_hba *phba) 10392 { 10393 /* 10394 * Sanity check for configured queue parameters against the run-time 10395 * device parameters 10396 */ 10397 10398 if (phba->nvmet_support) { 10399 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) 10400 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; 10401 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) 10402 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; 10403 } 10404 10405 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10406 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", 10407 phba->cfg_hdw_queue, phba->cfg_irq_chann, 10408 phba->cfg_nvmet_mrq); 10409 10410 /* Get EQ depth from module parameter, fake the default for now */ 10411 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10412 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10413 10414 /* Get CQ depth from module parameter, fake the default for now */ 10415 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10416 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10417 return 0; 10418 } 10419 10420 static int 10421 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) 10422 { 10423 struct lpfc_queue *qdesc; 10424 u32 wqesize; 10425 int cpu; 10426 10427 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); 10428 /* Create Fast Path IO CQs */ 10429 if (phba->enab_exp_wqcq_pages) 10430 /* Increase the CQ size when WQEs contain an embedded cdb */ 10431 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10432 phba->sli4_hba.cq_esize, 10433 LPFC_CQE_EXP_COUNT, cpu); 10434 10435 else 10436 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10437 phba->sli4_hba.cq_esize, 10438 phba->sli4_hba.cq_ecount, cpu); 10439 if (!qdesc) { 10440 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10441 "0499 Failed allocate fast-path IO CQ (%d)\n", 10442 idx); 10443 return 1; 10444 } 10445 qdesc->qe_valid = 1; 10446 qdesc->hdwq = idx; 10447 qdesc->chann = cpu; 10448 phba->sli4_hba.hdwq[idx].io_cq = qdesc; 10449 10450 /* Create Fast Path IO WQs */ 10451 if (phba->enab_exp_wqcq_pages) { 10452 /* Increase the WQ size when WQEs contain an embedded cdb */ 10453 wqesize = (phba->fcp_embed_io) ? 10454 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; 10455 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10456 wqesize, 10457 LPFC_WQE_EXP_COUNT, cpu); 10458 } else 10459 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10460 phba->sli4_hba.wq_esize, 10461 phba->sli4_hba.wq_ecount, cpu); 10462 10463 if (!qdesc) { 10464 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10465 "0503 Failed allocate fast-path IO WQ (%d)\n", 10466 idx); 10467 return 1; 10468 } 10469 qdesc->hdwq = idx; 10470 qdesc->chann = cpu; 10471 phba->sli4_hba.hdwq[idx].io_wq = qdesc; 10472 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10473 return 0; 10474 } 10475 10476 /** 10477 * lpfc_sli4_queue_create - Create all the SLI4 queues 10478 * @phba: pointer to lpfc hba data structure. 10479 * 10480 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA 10481 * operation. For each SLI4 queue type, the parameters such as queue entry 10482 * count (queue depth) shall be taken from the module parameter. For now, 10483 * we just use some constant number as place holder. 10484 * 10485 * Return codes 10486 * 0 - successful 10487 * -ENOMEM - No availble memory 10488 * -EIO - The mailbox failed to complete successfully. 10489 **/ 10490 int 10491 lpfc_sli4_queue_create(struct lpfc_hba *phba) 10492 { 10493 struct lpfc_queue *qdesc; 10494 int idx, cpu, eqcpu; 10495 struct lpfc_sli4_hdw_queue *qp; 10496 struct lpfc_vector_map_info *cpup; 10497 struct lpfc_vector_map_info *eqcpup; 10498 struct lpfc_eq_intr_info *eqi; 10499 10500 /* 10501 * Create HBA Record arrays. 10502 * Both NVME and FCP will share that same vectors / EQs 10503 */ 10504 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; 10505 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; 10506 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; 10507 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; 10508 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; 10509 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; 10510 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10511 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10512 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10513 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10514 10515 if (!phba->sli4_hba.hdwq) { 10516 phba->sli4_hba.hdwq = kcalloc( 10517 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), 10518 GFP_KERNEL); 10519 if (!phba->sli4_hba.hdwq) { 10520 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10521 "6427 Failed allocate memory for " 10522 "fast-path Hardware Queue array\n"); 10523 goto out_error; 10524 } 10525 /* Prepare hardware queues to take IO buffers */ 10526 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10527 qp = &phba->sli4_hba.hdwq[idx]; 10528 spin_lock_init(&qp->io_buf_list_get_lock); 10529 spin_lock_init(&qp->io_buf_list_put_lock); 10530 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 10531 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 10532 qp->get_io_bufs = 0; 10533 qp->put_io_bufs = 0; 10534 qp->total_io_bufs = 0; 10535 spin_lock_init(&qp->abts_io_buf_list_lock); 10536 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); 10537 qp->abts_scsi_io_bufs = 0; 10538 qp->abts_nvme_io_bufs = 0; 10539 INIT_LIST_HEAD(&qp->sgl_list); 10540 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); 10541 spin_lock_init(&qp->hdwq_lock); 10542 } 10543 } 10544 10545 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10546 if (phba->nvmet_support) { 10547 phba->sli4_hba.nvmet_cqset = kcalloc( 10548 phba->cfg_nvmet_mrq, 10549 sizeof(struct lpfc_queue *), 10550 GFP_KERNEL); 10551 if (!phba->sli4_hba.nvmet_cqset) { 10552 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10553 "3121 Fail allocate memory for " 10554 "fast-path CQ set array\n"); 10555 goto out_error; 10556 } 10557 phba->sli4_hba.nvmet_mrq_hdr = kcalloc( 10558 phba->cfg_nvmet_mrq, 10559 sizeof(struct lpfc_queue *), 10560 GFP_KERNEL); 10561 if (!phba->sli4_hba.nvmet_mrq_hdr) { 10562 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10563 "3122 Fail allocate memory for " 10564 "fast-path RQ set hdr array\n"); 10565 goto out_error; 10566 } 10567 phba->sli4_hba.nvmet_mrq_data = kcalloc( 10568 phba->cfg_nvmet_mrq, 10569 sizeof(struct lpfc_queue *), 10570 GFP_KERNEL); 10571 if (!phba->sli4_hba.nvmet_mrq_data) { 10572 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10573 "3124 Fail allocate memory for " 10574 "fast-path RQ set data array\n"); 10575 goto out_error; 10576 } 10577 } 10578 } 10579 10580 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10581 10582 /* Create HBA Event Queues (EQs) */ 10583 for_each_present_cpu(cpu) { 10584 /* We only want to create 1 EQ per vector, even though 10585 * multiple CPUs might be using that vector. so only 10586 * selects the CPUs that are LPFC_CPU_FIRST_IRQ. 10587 */ 10588 cpup = &phba->sli4_hba.cpu_map[cpu]; 10589 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 10590 continue; 10591 10592 /* Get a ptr to the Hardware Queue associated with this CPU */ 10593 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10594 10595 /* Allocate an EQ */ 10596 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10597 phba->sli4_hba.eq_esize, 10598 phba->sli4_hba.eq_ecount, cpu); 10599 if (!qdesc) { 10600 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10601 "0497 Failed allocate EQ (%d)\n", 10602 cpup->hdwq); 10603 goto out_error; 10604 } 10605 qdesc->qe_valid = 1; 10606 qdesc->hdwq = cpup->hdwq; 10607 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ 10608 qdesc->last_cpu = qdesc->chann; 10609 10610 /* Save the allocated EQ in the Hardware Queue */ 10611 qp->hba_eq = qdesc; 10612 10613 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); 10614 list_add(&qdesc->cpu_list, &eqi->list); 10615 } 10616 10617 /* Now we need to populate the other Hardware Queues, that share 10618 * an IRQ vector, with the associated EQ ptr. 10619 */ 10620 for_each_present_cpu(cpu) { 10621 cpup = &phba->sli4_hba.cpu_map[cpu]; 10622 10623 /* Check for EQ already allocated in previous loop */ 10624 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 10625 continue; 10626 10627 /* Check for multiple CPUs per hdwq */ 10628 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10629 if (qp->hba_eq) 10630 continue; 10631 10632 /* We need to share an EQ for this hdwq */ 10633 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); 10634 eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; 10635 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; 10636 } 10637 10638 /* Allocate IO Path SLI4 CQ/WQs */ 10639 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10640 if (lpfc_alloc_io_wq_cq(phba, idx)) 10641 goto out_error; 10642 } 10643 10644 if (phba->nvmet_support) { 10645 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10646 cpu = lpfc_find_cpu_handle(phba, idx, 10647 LPFC_FIND_BY_HDWQ); 10648 qdesc = lpfc_sli4_queue_alloc(phba, 10649 LPFC_DEFAULT_PAGE_SIZE, 10650 phba->sli4_hba.cq_esize, 10651 phba->sli4_hba.cq_ecount, 10652 cpu); 10653 if (!qdesc) { 10654 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10655 "3142 Failed allocate NVME " 10656 "CQ Set (%d)\n", idx); 10657 goto out_error; 10658 } 10659 qdesc->qe_valid = 1; 10660 qdesc->hdwq = idx; 10661 qdesc->chann = cpu; 10662 phba->sli4_hba.nvmet_cqset[idx] = qdesc; 10663 } 10664 } 10665 10666 /* 10667 * Create Slow Path Completion Queues (CQs) 10668 */ 10669 10670 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); 10671 /* Create slow-path Mailbox Command Complete Queue */ 10672 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10673 phba->sli4_hba.cq_esize, 10674 phba->sli4_hba.cq_ecount, cpu); 10675 if (!qdesc) { 10676 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10677 "0500 Failed allocate slow-path mailbox CQ\n"); 10678 goto out_error; 10679 } 10680 qdesc->qe_valid = 1; 10681 phba->sli4_hba.mbx_cq = qdesc; 10682 10683 /* Create slow-path ELS Complete Queue */ 10684 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10685 phba->sli4_hba.cq_esize, 10686 phba->sli4_hba.cq_ecount, cpu); 10687 if (!qdesc) { 10688 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10689 "0501 Failed allocate slow-path ELS CQ\n"); 10690 goto out_error; 10691 } 10692 qdesc->qe_valid = 1; 10693 qdesc->chann = cpu; 10694 phba->sli4_hba.els_cq = qdesc; 10695 10696 10697 /* 10698 * Create Slow Path Work Queues (WQs) 10699 */ 10700 10701 /* Create Mailbox Command Queue */ 10702 10703 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10704 phba->sli4_hba.mq_esize, 10705 phba->sli4_hba.mq_ecount, cpu); 10706 if (!qdesc) { 10707 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10708 "0505 Failed allocate slow-path MQ\n"); 10709 goto out_error; 10710 } 10711 qdesc->chann = cpu; 10712 phba->sli4_hba.mbx_wq = qdesc; 10713 10714 /* 10715 * Create ELS Work Queues 10716 */ 10717 10718 /* Create slow-path ELS Work Queue */ 10719 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10720 phba->sli4_hba.wq_esize, 10721 phba->sli4_hba.wq_ecount, cpu); 10722 if (!qdesc) { 10723 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10724 "0504 Failed allocate slow-path ELS WQ\n"); 10725 goto out_error; 10726 } 10727 qdesc->chann = cpu; 10728 phba->sli4_hba.els_wq = qdesc; 10729 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10730 10731 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10732 /* Create NVME LS Complete Queue */ 10733 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10734 phba->sli4_hba.cq_esize, 10735 phba->sli4_hba.cq_ecount, cpu); 10736 if (!qdesc) { 10737 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10738 "6079 Failed allocate NVME LS CQ\n"); 10739 goto out_error; 10740 } 10741 qdesc->chann = cpu; 10742 qdesc->qe_valid = 1; 10743 phba->sli4_hba.nvmels_cq = qdesc; 10744 10745 /* Create NVME LS Work Queue */ 10746 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10747 phba->sli4_hba.wq_esize, 10748 phba->sli4_hba.wq_ecount, cpu); 10749 if (!qdesc) { 10750 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10751 "6080 Failed allocate NVME LS WQ\n"); 10752 goto out_error; 10753 } 10754 qdesc->chann = cpu; 10755 phba->sli4_hba.nvmels_wq = qdesc; 10756 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10757 } 10758 10759 /* 10760 * Create Receive Queue (RQ) 10761 */ 10762 10763 /* Create Receive Queue for header */ 10764 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10765 phba->sli4_hba.rq_esize, 10766 phba->sli4_hba.rq_ecount, cpu); 10767 if (!qdesc) { 10768 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10769 "0506 Failed allocate receive HRQ\n"); 10770 goto out_error; 10771 } 10772 phba->sli4_hba.hdr_rq = qdesc; 10773 10774 /* Create Receive Queue for data */ 10775 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10776 phba->sli4_hba.rq_esize, 10777 phba->sli4_hba.rq_ecount, cpu); 10778 if (!qdesc) { 10779 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10780 "0507 Failed allocate receive DRQ\n"); 10781 goto out_error; 10782 } 10783 phba->sli4_hba.dat_rq = qdesc; 10784 10785 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && 10786 phba->nvmet_support) { 10787 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10788 cpu = lpfc_find_cpu_handle(phba, idx, 10789 LPFC_FIND_BY_HDWQ); 10790 /* Create NVMET Receive Queue for header */ 10791 qdesc = lpfc_sli4_queue_alloc(phba, 10792 LPFC_DEFAULT_PAGE_SIZE, 10793 phba->sli4_hba.rq_esize, 10794 LPFC_NVMET_RQE_DEF_COUNT, 10795 cpu); 10796 if (!qdesc) { 10797 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10798 "3146 Failed allocate " 10799 "receive HRQ\n"); 10800 goto out_error; 10801 } 10802 qdesc->hdwq = idx; 10803 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; 10804 10805 /* Only needed for header of RQ pair */ 10806 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), 10807 GFP_KERNEL, 10808 cpu_to_node(cpu)); 10809 if (qdesc->rqbp == NULL) { 10810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10811 "6131 Failed allocate " 10812 "Header RQBP\n"); 10813 goto out_error; 10814 } 10815 10816 /* Put list in known state in case driver load fails. */ 10817 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); 10818 10819 /* Create NVMET Receive Queue for data */ 10820 qdesc = lpfc_sli4_queue_alloc(phba, 10821 LPFC_DEFAULT_PAGE_SIZE, 10822 phba->sli4_hba.rq_esize, 10823 LPFC_NVMET_RQE_DEF_COUNT, 10824 cpu); 10825 if (!qdesc) { 10826 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10827 "3156 Failed allocate " 10828 "receive DRQ\n"); 10829 goto out_error; 10830 } 10831 qdesc->hdwq = idx; 10832 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; 10833 } 10834 } 10835 10836 /* Clear NVME stats */ 10837 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10838 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10839 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, 10840 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); 10841 } 10842 } 10843 10844 /* Clear SCSI stats */ 10845 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 10846 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10847 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, 10848 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); 10849 } 10850 } 10851 10852 return 0; 10853 10854 out_error: 10855 lpfc_sli4_queue_destroy(phba); 10856 return -ENOMEM; 10857 } 10858 10859 static inline void 10860 __lpfc_sli4_release_queue(struct lpfc_queue **qp) 10861 { 10862 if (*qp != NULL) { 10863 lpfc_sli4_queue_free(*qp); 10864 *qp = NULL; 10865 } 10866 } 10867 10868 static inline void 10869 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) 10870 { 10871 int idx; 10872 10873 if (*qs == NULL) 10874 return; 10875 10876 for (idx = 0; idx < max; idx++) 10877 __lpfc_sli4_release_queue(&(*qs)[idx]); 10878 10879 kfree(*qs); 10880 *qs = NULL; 10881 } 10882 10883 static inline void 10884 lpfc_sli4_release_hdwq(struct lpfc_hba *phba) 10885 { 10886 struct lpfc_sli4_hdw_queue *hdwq; 10887 struct lpfc_queue *eq; 10888 uint32_t idx; 10889 10890 hdwq = phba->sli4_hba.hdwq; 10891 10892 /* Loop thru all Hardware Queues */ 10893 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10894 /* Free the CQ/WQ corresponding to the Hardware Queue */ 10895 lpfc_sli4_queue_free(hdwq[idx].io_cq); 10896 lpfc_sli4_queue_free(hdwq[idx].io_wq); 10897 hdwq[idx].hba_eq = NULL; 10898 hdwq[idx].io_cq = NULL; 10899 hdwq[idx].io_wq = NULL; 10900 if (phba->cfg_xpsgl && !phba->nvmet_support) 10901 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); 10902 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); 10903 } 10904 /* Loop thru all IRQ vectors */ 10905 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 10906 /* Free the EQ corresponding to the IRQ vector */ 10907 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 10908 lpfc_sli4_queue_free(eq); 10909 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; 10910 } 10911 } 10912 10913 /** 10914 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues 10915 * @phba: pointer to lpfc hba data structure. 10916 * 10917 * This routine is invoked to release all the SLI4 queues with the FCoE HBA 10918 * operation. 10919 * 10920 * Return codes 10921 * 0 - successful 10922 * -ENOMEM - No available memory 10923 * -EIO - The mailbox failed to complete successfully. 10924 **/ 10925 void 10926 lpfc_sli4_queue_destroy(struct lpfc_hba *phba) 10927 { 10928 /* 10929 * Set FREE_INIT before beginning to free the queues. 10930 * Wait until the users of queues to acknowledge to 10931 * release queues by clearing FREE_WAIT. 10932 */ 10933 spin_lock_irq(&phba->hbalock); 10934 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; 10935 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { 10936 spin_unlock_irq(&phba->hbalock); 10937 msleep(20); 10938 spin_lock_irq(&phba->hbalock); 10939 } 10940 spin_unlock_irq(&phba->hbalock); 10941 10942 lpfc_sli4_cleanup_poll_list(phba); 10943 10944 /* Release HBA eqs */ 10945 if (phba->sli4_hba.hdwq) 10946 lpfc_sli4_release_hdwq(phba); 10947 10948 if (phba->nvmet_support) { 10949 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, 10950 phba->cfg_nvmet_mrq); 10951 10952 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, 10953 phba->cfg_nvmet_mrq); 10954 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, 10955 phba->cfg_nvmet_mrq); 10956 } 10957 10958 /* Release mailbox command work queue */ 10959 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); 10960 10961 /* Release ELS work queue */ 10962 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); 10963 10964 /* Release ELS work queue */ 10965 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); 10966 10967 /* Release unsolicited receive queue */ 10968 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); 10969 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); 10970 10971 /* Release ELS complete queue */ 10972 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); 10973 10974 /* Release NVME LS complete queue */ 10975 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); 10976 10977 /* Release mailbox command complete queue */ 10978 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); 10979 10980 /* Everything on this list has been freed */ 10981 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10982 10983 /* Done with freeing the queues */ 10984 spin_lock_irq(&phba->hbalock); 10985 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; 10986 spin_unlock_irq(&phba->hbalock); 10987 } 10988 10989 int 10990 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) 10991 { 10992 struct lpfc_rqb *rqbp; 10993 struct lpfc_dmabuf *h_buf; 10994 struct rqb_dmabuf *rqb_buffer; 10995 10996 rqbp = rq->rqbp; 10997 while (!list_empty(&rqbp->rqb_buffer_list)) { 10998 list_remove_head(&rqbp->rqb_buffer_list, h_buf, 10999 struct lpfc_dmabuf, list); 11000 11001 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); 11002 (rqbp->rqb_free_buffer)(phba, rqb_buffer); 11003 rqbp->buffer_count--; 11004 } 11005 return 1; 11006 } 11007 11008 static int 11009 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, 11010 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, 11011 int qidx, uint32_t qtype) 11012 { 11013 struct lpfc_sli_ring *pring; 11014 int rc; 11015 11016 if (!eq || !cq || !wq) { 11017 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11018 "6085 Fast-path %s (%d) not allocated\n", 11019 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); 11020 return -ENOMEM; 11021 } 11022 11023 /* create the Cq first */ 11024 rc = lpfc_cq_create(phba, cq, eq, 11025 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); 11026 if (rc) { 11027 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11028 "6086 Failed setup of CQ (%d), rc = 0x%x\n", 11029 qidx, (uint32_t)rc); 11030 return rc; 11031 } 11032 11033 if (qtype != LPFC_MBOX) { 11034 /* Setup cq_map for fast lookup */ 11035 if (cq_map) 11036 *cq_map = cq->queue_id; 11037 11038 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11039 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", 11040 qidx, cq->queue_id, qidx, eq->queue_id); 11041 11042 /* create the wq */ 11043 rc = lpfc_wq_create(phba, wq, cq, qtype); 11044 if (rc) { 11045 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11046 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", 11047 qidx, (uint32_t)rc); 11048 /* no need to tear down cq - caller will do so */ 11049 return rc; 11050 } 11051 11052 /* Bind this CQ/WQ to the NVME ring */ 11053 pring = wq->pring; 11054 pring->sli.sli4.wqp = (void *)wq; 11055 cq->pring = pring; 11056 11057 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11058 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", 11059 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); 11060 } else { 11061 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); 11062 if (rc) { 11063 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11064 "0539 Failed setup of slow-path MQ: " 11065 "rc = 0x%x\n", rc); 11066 /* no need to tear down cq - caller will do so */ 11067 return rc; 11068 } 11069 11070 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11071 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", 11072 phba->sli4_hba.mbx_wq->queue_id, 11073 phba->sli4_hba.mbx_cq->queue_id); 11074 } 11075 11076 return 0; 11077 } 11078 11079 /** 11080 * lpfc_setup_cq_lookup - Setup the CQ lookup table 11081 * @phba: pointer to lpfc hba data structure. 11082 * 11083 * This routine will populate the cq_lookup table by all 11084 * available CQ queue_id's. 11085 **/ 11086 static void 11087 lpfc_setup_cq_lookup(struct lpfc_hba *phba) 11088 { 11089 struct lpfc_queue *eq, *childq; 11090 int qidx; 11091 11092 memset(phba->sli4_hba.cq_lookup, 0, 11093 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); 11094 /* Loop thru all IRQ vectors */ 11095 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11096 /* Get the EQ corresponding to the IRQ vector */ 11097 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11098 if (!eq) 11099 continue; 11100 /* Loop through all CQs associated with that EQ */ 11101 list_for_each_entry(childq, &eq->child_list, list) { 11102 if (childq->queue_id > phba->sli4_hba.cq_max) 11103 continue; 11104 if (childq->subtype == LPFC_IO) 11105 phba->sli4_hba.cq_lookup[childq->queue_id] = 11106 childq; 11107 } 11108 } 11109 } 11110 11111 /** 11112 * lpfc_sli4_queue_setup - Set up all the SLI4 queues 11113 * @phba: pointer to lpfc hba data structure. 11114 * 11115 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA 11116 * operation. 11117 * 11118 * Return codes 11119 * 0 - successful 11120 * -ENOMEM - No available memory 11121 * -EIO - The mailbox failed to complete successfully. 11122 **/ 11123 int 11124 lpfc_sli4_queue_setup(struct lpfc_hba *phba) 11125 { 11126 uint32_t shdr_status, shdr_add_status; 11127 union lpfc_sli4_cfg_shdr *shdr; 11128 struct lpfc_vector_map_info *cpup; 11129 struct lpfc_sli4_hdw_queue *qp; 11130 LPFC_MBOXQ_t *mboxq; 11131 int qidx, cpu; 11132 uint32_t length, usdelay; 11133 int rc = -ENOMEM; 11134 11135 /* Check for dual-ULP support */ 11136 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 11137 if (!mboxq) { 11138 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11139 "3249 Unable to allocate memory for " 11140 "QUERY_FW_CFG mailbox command\n"); 11141 return -ENOMEM; 11142 } 11143 length = (sizeof(struct lpfc_mbx_query_fw_config) - 11144 sizeof(struct lpfc_sli4_cfg_mhdr)); 11145 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11146 LPFC_MBOX_OPCODE_QUERY_FW_CFG, 11147 length, LPFC_SLI4_MBX_EMBED); 11148 11149 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11150 11151 shdr = (union lpfc_sli4_cfg_shdr *) 11152 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11153 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11154 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 11155 if (shdr_status || shdr_add_status || rc) { 11156 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11157 "3250 QUERY_FW_CFG mailbox failed with status " 11158 "x%x add_status x%x, mbx status x%x\n", 11159 shdr_status, shdr_add_status, rc); 11160 mempool_free(mboxq, phba->mbox_mem_pool); 11161 rc = -ENXIO; 11162 goto out_error; 11163 } 11164 11165 phba->sli4_hba.fw_func_mode = 11166 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; 11167 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; 11168 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; 11169 phba->sli4_hba.physical_port = 11170 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; 11171 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11172 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " 11173 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, 11174 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); 11175 11176 mempool_free(mboxq, phba->mbox_mem_pool); 11177 11178 /* 11179 * Set up HBA Event Queues (EQs) 11180 */ 11181 qp = phba->sli4_hba.hdwq; 11182 11183 /* Set up HBA event queue */ 11184 if (!qp) { 11185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11186 "3147 Fast-path EQs not allocated\n"); 11187 rc = -ENOMEM; 11188 goto out_error; 11189 } 11190 11191 /* Loop thru all IRQ vectors */ 11192 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11193 /* Create HBA Event Queues (EQs) in order */ 11194 for_each_present_cpu(cpu) { 11195 cpup = &phba->sli4_hba.cpu_map[cpu]; 11196 11197 /* Look for the CPU thats using that vector with 11198 * LPFC_CPU_FIRST_IRQ set. 11199 */ 11200 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 11201 continue; 11202 if (qidx != cpup->eq) 11203 continue; 11204 11205 /* Create an EQ for that vector */ 11206 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, 11207 phba->cfg_fcp_imax); 11208 if (rc) { 11209 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11210 "0523 Failed setup of fast-path" 11211 " EQ (%d), rc = 0x%x\n", 11212 cpup->eq, (uint32_t)rc); 11213 goto out_destroy; 11214 } 11215 11216 /* Save the EQ for that vector in the hba_eq_hdl */ 11217 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = 11218 qp[cpup->hdwq].hba_eq; 11219 11220 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11221 "2584 HBA EQ setup: queue[%d]-id=%d\n", 11222 cpup->eq, 11223 qp[cpup->hdwq].hba_eq->queue_id); 11224 } 11225 } 11226 11227 /* Loop thru all Hardware Queues */ 11228 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11229 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); 11230 cpup = &phba->sli4_hba.cpu_map[cpu]; 11231 11232 /* Create the CQ/WQ corresponding to the Hardware Queue */ 11233 rc = lpfc_create_wq_cq(phba, 11234 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 11235 qp[qidx].io_cq, 11236 qp[qidx].io_wq, 11237 &phba->sli4_hba.hdwq[qidx].io_cq_map, 11238 qidx, 11239 LPFC_IO); 11240 if (rc) { 11241 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11242 "0535 Failed to setup fastpath " 11243 "IO WQ/CQ (%d), rc = 0x%x\n", 11244 qidx, (uint32_t)rc); 11245 goto out_destroy; 11246 } 11247 } 11248 11249 /* 11250 * Set up Slow Path Complete Queues (CQs) 11251 */ 11252 11253 /* Set up slow-path MBOX CQ/MQ */ 11254 11255 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { 11256 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11257 "0528 %s not allocated\n", 11258 phba->sli4_hba.mbx_cq ? 11259 "Mailbox WQ" : "Mailbox CQ"); 11260 rc = -ENOMEM; 11261 goto out_destroy; 11262 } 11263 11264 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11265 phba->sli4_hba.mbx_cq, 11266 phba->sli4_hba.mbx_wq, 11267 NULL, 0, LPFC_MBOX); 11268 if (rc) { 11269 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11270 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", 11271 (uint32_t)rc); 11272 goto out_destroy; 11273 } 11274 if (phba->nvmet_support) { 11275 if (!phba->sli4_hba.nvmet_cqset) { 11276 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11277 "3165 Fast-path NVME CQ Set " 11278 "array not allocated\n"); 11279 rc = -ENOMEM; 11280 goto out_destroy; 11281 } 11282 if (phba->cfg_nvmet_mrq > 1) { 11283 rc = lpfc_cq_create_set(phba, 11284 phba->sli4_hba.nvmet_cqset, 11285 qp, 11286 LPFC_WCQ, LPFC_NVMET); 11287 if (rc) { 11288 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11289 "3164 Failed setup of NVME CQ " 11290 "Set, rc = 0x%x\n", 11291 (uint32_t)rc); 11292 goto out_destroy; 11293 } 11294 } else { 11295 /* Set up NVMET Receive Complete Queue */ 11296 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], 11297 qp[0].hba_eq, 11298 LPFC_WCQ, LPFC_NVMET); 11299 if (rc) { 11300 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11301 "6089 Failed setup NVMET CQ: " 11302 "rc = 0x%x\n", (uint32_t)rc); 11303 goto out_destroy; 11304 } 11305 phba->sli4_hba.nvmet_cqset[0]->chann = 0; 11306 11307 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11308 "6090 NVMET CQ setup: cq-id=%d, " 11309 "parent eq-id=%d\n", 11310 phba->sli4_hba.nvmet_cqset[0]->queue_id, 11311 qp[0].hba_eq->queue_id); 11312 } 11313 } 11314 11315 /* Set up slow-path ELS WQ/CQ */ 11316 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { 11317 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11318 "0530 ELS %s not allocated\n", 11319 phba->sli4_hba.els_cq ? "WQ" : "CQ"); 11320 rc = -ENOMEM; 11321 goto out_destroy; 11322 } 11323 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11324 phba->sli4_hba.els_cq, 11325 phba->sli4_hba.els_wq, 11326 NULL, 0, LPFC_ELS); 11327 if (rc) { 11328 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11329 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", 11330 (uint32_t)rc); 11331 goto out_destroy; 11332 } 11333 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11334 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", 11335 phba->sli4_hba.els_wq->queue_id, 11336 phba->sli4_hba.els_cq->queue_id); 11337 11338 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11339 /* Set up NVME LS Complete Queue */ 11340 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { 11341 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11342 "6091 LS %s not allocated\n", 11343 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); 11344 rc = -ENOMEM; 11345 goto out_destroy; 11346 } 11347 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11348 phba->sli4_hba.nvmels_cq, 11349 phba->sli4_hba.nvmels_wq, 11350 NULL, 0, LPFC_NVME_LS); 11351 if (rc) { 11352 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11353 "0526 Failed setup of NVVME LS WQ/CQ: " 11354 "rc = 0x%x\n", (uint32_t)rc); 11355 goto out_destroy; 11356 } 11357 11358 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11359 "6096 ELS WQ setup: wq-id=%d, " 11360 "parent cq-id=%d\n", 11361 phba->sli4_hba.nvmels_wq->queue_id, 11362 phba->sli4_hba.nvmels_cq->queue_id); 11363 } 11364 11365 /* 11366 * Create NVMET Receive Queue (RQ) 11367 */ 11368 if (phba->nvmet_support) { 11369 if ((!phba->sli4_hba.nvmet_cqset) || 11370 (!phba->sli4_hba.nvmet_mrq_hdr) || 11371 (!phba->sli4_hba.nvmet_mrq_data)) { 11372 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11373 "6130 MRQ CQ Queues not " 11374 "allocated\n"); 11375 rc = -ENOMEM; 11376 goto out_destroy; 11377 } 11378 if (phba->cfg_nvmet_mrq > 1) { 11379 rc = lpfc_mrq_create(phba, 11380 phba->sli4_hba.nvmet_mrq_hdr, 11381 phba->sli4_hba.nvmet_mrq_data, 11382 phba->sli4_hba.nvmet_cqset, 11383 LPFC_NVMET); 11384 if (rc) { 11385 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11386 "6098 Failed setup of NVMET " 11387 "MRQ: rc = 0x%x\n", 11388 (uint32_t)rc); 11389 goto out_destroy; 11390 } 11391 11392 } else { 11393 rc = lpfc_rq_create(phba, 11394 phba->sli4_hba.nvmet_mrq_hdr[0], 11395 phba->sli4_hba.nvmet_mrq_data[0], 11396 phba->sli4_hba.nvmet_cqset[0], 11397 LPFC_NVMET); 11398 if (rc) { 11399 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11400 "6057 Failed setup of NVMET " 11401 "Receive Queue: rc = 0x%x\n", 11402 (uint32_t)rc); 11403 goto out_destroy; 11404 } 11405 11406 lpfc_printf_log( 11407 phba, KERN_INFO, LOG_INIT, 11408 "6099 NVMET RQ setup: hdr-rq-id=%d, " 11409 "dat-rq-id=%d parent cq-id=%d\n", 11410 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, 11411 phba->sli4_hba.nvmet_mrq_data[0]->queue_id, 11412 phba->sli4_hba.nvmet_cqset[0]->queue_id); 11413 11414 } 11415 } 11416 11417 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { 11418 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11419 "0540 Receive Queue not allocated\n"); 11420 rc = -ENOMEM; 11421 goto out_destroy; 11422 } 11423 11424 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, 11425 phba->sli4_hba.els_cq, LPFC_USOL); 11426 if (rc) { 11427 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11428 "0541 Failed setup of Receive Queue: " 11429 "rc = 0x%x\n", (uint32_t)rc); 11430 goto out_destroy; 11431 } 11432 11433 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11434 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " 11435 "parent cq-id=%d\n", 11436 phba->sli4_hba.hdr_rq->queue_id, 11437 phba->sli4_hba.dat_rq->queue_id, 11438 phba->sli4_hba.els_cq->queue_id); 11439 11440 if (phba->cfg_fcp_imax) 11441 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; 11442 else 11443 usdelay = 0; 11444 11445 for (qidx = 0; qidx < phba->cfg_irq_chann; 11446 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) 11447 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, 11448 usdelay); 11449 11450 if (phba->sli4_hba.cq_max) { 11451 kfree(phba->sli4_hba.cq_lookup); 11452 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), 11453 sizeof(struct lpfc_queue *), GFP_KERNEL); 11454 if (!phba->sli4_hba.cq_lookup) { 11455 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11456 "0549 Failed setup of CQ Lookup table: " 11457 "size 0x%x\n", phba->sli4_hba.cq_max); 11458 rc = -ENOMEM; 11459 goto out_destroy; 11460 } 11461 lpfc_setup_cq_lookup(phba); 11462 } 11463 return 0; 11464 11465 out_destroy: 11466 lpfc_sli4_queue_unset(phba); 11467 out_error: 11468 return rc; 11469 } 11470 11471 /** 11472 * lpfc_sli4_queue_unset - Unset all the SLI4 queues 11473 * @phba: pointer to lpfc hba data structure. 11474 * 11475 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA 11476 * operation. 11477 * 11478 * Return codes 11479 * 0 - successful 11480 * -ENOMEM - No available memory 11481 * -EIO - The mailbox failed to complete successfully. 11482 **/ 11483 void 11484 lpfc_sli4_queue_unset(struct lpfc_hba *phba) 11485 { 11486 struct lpfc_sli4_hdw_queue *qp; 11487 struct lpfc_queue *eq; 11488 int qidx; 11489 11490 /* Unset mailbox command work queue */ 11491 if (phba->sli4_hba.mbx_wq) 11492 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); 11493 11494 /* Unset NVME LS work queue */ 11495 if (phba->sli4_hba.nvmels_wq) 11496 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); 11497 11498 /* Unset ELS work queue */ 11499 if (phba->sli4_hba.els_wq) 11500 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); 11501 11502 /* Unset unsolicited receive queue */ 11503 if (phba->sli4_hba.hdr_rq) 11504 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, 11505 phba->sli4_hba.dat_rq); 11506 11507 /* Unset mailbox command complete queue */ 11508 if (phba->sli4_hba.mbx_cq) 11509 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); 11510 11511 /* Unset ELS complete queue */ 11512 if (phba->sli4_hba.els_cq) 11513 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); 11514 11515 /* Unset NVME LS complete queue */ 11516 if (phba->sli4_hba.nvmels_cq) 11517 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); 11518 11519 if (phba->nvmet_support) { 11520 /* Unset NVMET MRQ queue */ 11521 if (phba->sli4_hba.nvmet_mrq_hdr) { 11522 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11523 lpfc_rq_destroy( 11524 phba, 11525 phba->sli4_hba.nvmet_mrq_hdr[qidx], 11526 phba->sli4_hba.nvmet_mrq_data[qidx]); 11527 } 11528 11529 /* Unset NVMET CQ Set complete queue */ 11530 if (phba->sli4_hba.nvmet_cqset) { 11531 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11532 lpfc_cq_destroy( 11533 phba, phba->sli4_hba.nvmet_cqset[qidx]); 11534 } 11535 } 11536 11537 /* Unset fast-path SLI4 queues */ 11538 if (phba->sli4_hba.hdwq) { 11539 /* Loop thru all Hardware Queues */ 11540 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11541 /* Destroy the CQ/WQ corresponding to Hardware Queue */ 11542 qp = &phba->sli4_hba.hdwq[qidx]; 11543 lpfc_wq_destroy(phba, qp->io_wq); 11544 lpfc_cq_destroy(phba, qp->io_cq); 11545 } 11546 /* Loop thru all IRQ vectors */ 11547 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11548 /* Destroy the EQ corresponding to the IRQ vector */ 11549 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11550 lpfc_eq_destroy(phba, eq); 11551 } 11552 } 11553 11554 kfree(phba->sli4_hba.cq_lookup); 11555 phba->sli4_hba.cq_lookup = NULL; 11556 phba->sli4_hba.cq_max = 0; 11557 } 11558 11559 /** 11560 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool 11561 * @phba: pointer to lpfc hba data structure. 11562 * 11563 * This routine is invoked to allocate and set up a pool of completion queue 11564 * events. The body of the completion queue event is a completion queue entry 11565 * CQE. For now, this pool is used for the interrupt service routine to queue 11566 * the following HBA completion queue events for the worker thread to process: 11567 * - Mailbox asynchronous events 11568 * - Receive queue completion unsolicited events 11569 * Later, this can be used for all the slow-path events. 11570 * 11571 * Return codes 11572 * 0 - successful 11573 * -ENOMEM - No available memory 11574 **/ 11575 static int 11576 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) 11577 { 11578 struct lpfc_cq_event *cq_event; 11579 int i; 11580 11581 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { 11582 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); 11583 if (!cq_event) 11584 goto out_pool_create_fail; 11585 list_add_tail(&cq_event->list, 11586 &phba->sli4_hba.sp_cqe_event_pool); 11587 } 11588 return 0; 11589 11590 out_pool_create_fail: 11591 lpfc_sli4_cq_event_pool_destroy(phba); 11592 return -ENOMEM; 11593 } 11594 11595 /** 11596 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool 11597 * @phba: pointer to lpfc hba data structure. 11598 * 11599 * This routine is invoked to free the pool of completion queue events at 11600 * driver unload time. Note that, it is the responsibility of the driver 11601 * cleanup routine to free all the outstanding completion-queue events 11602 * allocated from this pool back into the pool before invoking this routine 11603 * to destroy the pool. 11604 **/ 11605 static void 11606 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) 11607 { 11608 struct lpfc_cq_event *cq_event, *next_cq_event; 11609 11610 list_for_each_entry_safe(cq_event, next_cq_event, 11611 &phba->sli4_hba.sp_cqe_event_pool, list) { 11612 list_del(&cq_event->list); 11613 kfree(cq_event); 11614 } 11615 } 11616 11617 /** 11618 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11619 * @phba: pointer to lpfc hba data structure. 11620 * 11621 * This routine is the lock free version of the API invoked to allocate a 11622 * completion-queue event from the free pool. 11623 * 11624 * Return: Pointer to the newly allocated completion-queue event if successful 11625 * NULL otherwise. 11626 **/ 11627 struct lpfc_cq_event * 11628 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11629 { 11630 struct lpfc_cq_event *cq_event = NULL; 11631 11632 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, 11633 struct lpfc_cq_event, list); 11634 return cq_event; 11635 } 11636 11637 /** 11638 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11639 * @phba: pointer to lpfc hba data structure. 11640 * 11641 * This routine is the lock version of the API invoked to allocate a 11642 * completion-queue event from the free pool. 11643 * 11644 * Return: Pointer to the newly allocated completion-queue event if successful 11645 * NULL otherwise. 11646 **/ 11647 struct lpfc_cq_event * 11648 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11649 { 11650 struct lpfc_cq_event *cq_event; 11651 unsigned long iflags; 11652 11653 spin_lock_irqsave(&phba->hbalock, iflags); 11654 cq_event = __lpfc_sli4_cq_event_alloc(phba); 11655 spin_unlock_irqrestore(&phba->hbalock, iflags); 11656 return cq_event; 11657 } 11658 11659 /** 11660 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11661 * @phba: pointer to lpfc hba data structure. 11662 * @cq_event: pointer to the completion queue event to be freed. 11663 * 11664 * This routine is the lock free version of the API invoked to release a 11665 * completion-queue event back into the free pool. 11666 **/ 11667 void 11668 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11669 struct lpfc_cq_event *cq_event) 11670 { 11671 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); 11672 } 11673 11674 /** 11675 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11676 * @phba: pointer to lpfc hba data structure. 11677 * @cq_event: pointer to the completion queue event to be freed. 11678 * 11679 * This routine is the lock version of the API invoked to release a 11680 * completion-queue event back into the free pool. 11681 **/ 11682 void 11683 lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11684 struct lpfc_cq_event *cq_event) 11685 { 11686 unsigned long iflags; 11687 spin_lock_irqsave(&phba->hbalock, iflags); 11688 __lpfc_sli4_cq_event_release(phba, cq_event); 11689 spin_unlock_irqrestore(&phba->hbalock, iflags); 11690 } 11691 11692 /** 11693 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool 11694 * @phba: pointer to lpfc hba data structure. 11695 * 11696 * This routine is to free all the pending completion-queue events to the 11697 * back into the free pool for device reset. 11698 **/ 11699 static void 11700 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) 11701 { 11702 LIST_HEAD(cq_event_list); 11703 struct lpfc_cq_event *cq_event; 11704 unsigned long iflags; 11705 11706 /* Retrieve all the pending WCQEs from pending WCQE lists */ 11707 11708 /* Pending ELS XRI abort events */ 11709 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11710 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, 11711 &cq_event_list); 11712 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11713 11714 /* Pending asynnc events */ 11715 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 11716 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, 11717 &cq_event_list); 11718 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 11719 11720 while (!list_empty(&cq_event_list)) { 11721 list_remove_head(&cq_event_list, cq_event, 11722 struct lpfc_cq_event, list); 11723 lpfc_sli4_cq_event_release(phba, cq_event); 11724 } 11725 } 11726 11727 /** 11728 * lpfc_pci_function_reset - Reset pci function. 11729 * @phba: pointer to lpfc hba data structure. 11730 * 11731 * This routine is invoked to request a PCI function reset. It will destroys 11732 * all resources assigned to the PCI function which originates this request. 11733 * 11734 * Return codes 11735 * 0 - successful 11736 * -ENOMEM - No available memory 11737 * -EIO - The mailbox failed to complete successfully. 11738 **/ 11739 int 11740 lpfc_pci_function_reset(struct lpfc_hba *phba) 11741 { 11742 LPFC_MBOXQ_t *mboxq; 11743 uint32_t rc = 0, if_type; 11744 uint32_t shdr_status, shdr_add_status; 11745 uint32_t rdy_chk; 11746 uint32_t port_reset = 0; 11747 union lpfc_sli4_cfg_shdr *shdr; 11748 struct lpfc_register reg_data; 11749 uint16_t devid; 11750 11751 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11752 switch (if_type) { 11753 case LPFC_SLI_INTF_IF_TYPE_0: 11754 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 11755 GFP_KERNEL); 11756 if (!mboxq) { 11757 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11758 "0494 Unable to allocate memory for " 11759 "issuing SLI_FUNCTION_RESET mailbox " 11760 "command\n"); 11761 return -ENOMEM; 11762 } 11763 11764 /* Setup PCI function reset mailbox-ioctl command */ 11765 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11766 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, 11767 LPFC_SLI4_MBX_EMBED); 11768 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11769 shdr = (union lpfc_sli4_cfg_shdr *) 11770 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11771 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11772 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 11773 &shdr->response); 11774 mempool_free(mboxq, phba->mbox_mem_pool); 11775 if (shdr_status || shdr_add_status || rc) { 11776 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11777 "0495 SLI_FUNCTION_RESET mailbox " 11778 "failed with status x%x add_status x%x," 11779 " mbx status x%x\n", 11780 shdr_status, shdr_add_status, rc); 11781 rc = -ENXIO; 11782 } 11783 break; 11784 case LPFC_SLI_INTF_IF_TYPE_2: 11785 case LPFC_SLI_INTF_IF_TYPE_6: 11786 wait: 11787 /* 11788 * Poll the Port Status Register and wait for RDY for 11789 * up to 30 seconds. If the port doesn't respond, treat 11790 * it as an error. 11791 */ 11792 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { 11793 if (lpfc_readl(phba->sli4_hba.u.if_type2. 11794 STATUSregaddr, ®_data.word0)) { 11795 rc = -ENODEV; 11796 goto out; 11797 } 11798 if (bf_get(lpfc_sliport_status_rdy, ®_data)) 11799 break; 11800 msleep(20); 11801 } 11802 11803 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { 11804 phba->work_status[0] = readl( 11805 phba->sli4_hba.u.if_type2.ERR1regaddr); 11806 phba->work_status[1] = readl( 11807 phba->sli4_hba.u.if_type2.ERR2regaddr); 11808 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11809 "2890 Port not ready, port status reg " 11810 "0x%x error 1=0x%x, error 2=0x%x\n", 11811 reg_data.word0, 11812 phba->work_status[0], 11813 phba->work_status[1]); 11814 rc = -ENODEV; 11815 goto out; 11816 } 11817 11818 if (bf_get(lpfc_sliport_status_pldv, ®_data)) 11819 lpfc_pldv_detect = true; 11820 11821 if (!port_reset) { 11822 /* 11823 * Reset the port now 11824 */ 11825 reg_data.word0 = 0; 11826 bf_set(lpfc_sliport_ctrl_end, ®_data, 11827 LPFC_SLIPORT_LITTLE_ENDIAN); 11828 bf_set(lpfc_sliport_ctrl_ip, ®_data, 11829 LPFC_SLIPORT_INIT_PORT); 11830 writel(reg_data.word0, phba->sli4_hba.u.if_type2. 11831 CTRLregaddr); 11832 /* flush */ 11833 pci_read_config_word(phba->pcidev, 11834 PCI_DEVICE_ID, &devid); 11835 11836 port_reset = 1; 11837 msleep(20); 11838 goto wait; 11839 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { 11840 rc = -ENODEV; 11841 goto out; 11842 } 11843 break; 11844 11845 case LPFC_SLI_INTF_IF_TYPE_1: 11846 default: 11847 break; 11848 } 11849 11850 out: 11851 /* Catch the not-ready port failure after a port reset. */ 11852 if (rc) { 11853 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11854 "3317 HBA not functional: IP Reset Failed " 11855 "try: echo fw_reset > board_mode\n"); 11856 rc = -ENODEV; 11857 } 11858 11859 return rc; 11860 } 11861 11862 /** 11863 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. 11864 * @phba: pointer to lpfc hba data structure. 11865 * 11866 * This routine is invoked to set up the PCI device memory space for device 11867 * with SLI-4 interface spec. 11868 * 11869 * Return codes 11870 * 0 - successful 11871 * other values - error 11872 **/ 11873 static int 11874 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) 11875 { 11876 struct pci_dev *pdev = phba->pcidev; 11877 unsigned long bar0map_len, bar1map_len, bar2map_len; 11878 int error; 11879 uint32_t if_type; 11880 11881 if (!pdev) 11882 return -ENODEV; 11883 11884 /* Set the device DMA mask size */ 11885 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11886 if (error) 11887 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 11888 if (error) 11889 return error; 11890 11891 /* 11892 * The BARs and register set definitions and offset locations are 11893 * dependent on the if_type. 11894 */ 11895 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, 11896 &phba->sli4_hba.sli_intf.word0)) { 11897 return -ENODEV; 11898 } 11899 11900 /* There is no SLI3 failback for SLI4 devices. */ 11901 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != 11902 LPFC_SLI_INTF_VALID) { 11903 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11904 "2894 SLI_INTF reg contents invalid " 11905 "sli_intf reg 0x%x\n", 11906 phba->sli4_hba.sli_intf.word0); 11907 return -ENODEV; 11908 } 11909 11910 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11911 /* 11912 * Get the bus address of SLI4 device Bar regions and the 11913 * number of bytes required by each mapping. The mapping of the 11914 * particular PCI BARs regions is dependent on the type of 11915 * SLI4 device. 11916 */ 11917 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { 11918 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); 11919 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); 11920 11921 /* 11922 * Map SLI4 PCI Config Space Register base to a kernel virtual 11923 * addr 11924 */ 11925 phba->sli4_hba.conf_regs_memmap_p = 11926 ioremap(phba->pci_bar0_map, bar0map_len); 11927 if (!phba->sli4_hba.conf_regs_memmap_p) { 11928 dev_printk(KERN_ERR, &pdev->dev, 11929 "ioremap failed for SLI4 PCI config " 11930 "registers.\n"); 11931 return -ENODEV; 11932 } 11933 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; 11934 /* Set up BAR0 PCI config space register memory map */ 11935 lpfc_sli4_bar0_register_memmap(phba, if_type); 11936 } else { 11937 phba->pci_bar0_map = pci_resource_start(pdev, 1); 11938 bar0map_len = pci_resource_len(pdev, 1); 11939 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 11940 dev_printk(KERN_ERR, &pdev->dev, 11941 "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); 11942 return -ENODEV; 11943 } 11944 phba->sli4_hba.conf_regs_memmap_p = 11945 ioremap(phba->pci_bar0_map, bar0map_len); 11946 if (!phba->sli4_hba.conf_regs_memmap_p) { 11947 dev_printk(KERN_ERR, &pdev->dev, 11948 "ioremap failed for SLI4 PCI config " 11949 "registers.\n"); 11950 return -ENODEV; 11951 } 11952 lpfc_sli4_bar0_register_memmap(phba, if_type); 11953 } 11954 11955 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11956 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { 11957 /* 11958 * Map SLI4 if type 0 HBA Control Register base to a 11959 * kernel virtual address and setup the registers. 11960 */ 11961 phba->pci_bar1_map = pci_resource_start(pdev, 11962 PCI_64BIT_BAR2); 11963 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11964 phba->sli4_hba.ctrl_regs_memmap_p = 11965 ioremap(phba->pci_bar1_map, 11966 bar1map_len); 11967 if (!phba->sli4_hba.ctrl_regs_memmap_p) { 11968 dev_err(&pdev->dev, 11969 "ioremap failed for SLI4 HBA " 11970 "control registers.\n"); 11971 error = -ENOMEM; 11972 goto out_iounmap_conf; 11973 } 11974 phba->pci_bar2_memmap_p = 11975 phba->sli4_hba.ctrl_regs_memmap_p; 11976 lpfc_sli4_bar1_register_memmap(phba, if_type); 11977 } else { 11978 error = -ENOMEM; 11979 goto out_iounmap_conf; 11980 } 11981 } 11982 11983 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && 11984 (pci_resource_start(pdev, PCI_64BIT_BAR2))) { 11985 /* 11986 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel 11987 * virtual address and setup the registers. 11988 */ 11989 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); 11990 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11991 phba->sli4_hba.drbl_regs_memmap_p = 11992 ioremap(phba->pci_bar1_map, bar1map_len); 11993 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11994 dev_err(&pdev->dev, 11995 "ioremap failed for SLI4 HBA doorbell registers.\n"); 11996 error = -ENOMEM; 11997 goto out_iounmap_conf; 11998 } 11999 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; 12000 lpfc_sli4_bar1_register_memmap(phba, if_type); 12001 } 12002 12003 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 12004 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { 12005 /* 12006 * Map SLI4 if type 0 HBA Doorbell Register base to 12007 * a kernel virtual address and setup the registers. 12008 */ 12009 phba->pci_bar2_map = pci_resource_start(pdev, 12010 PCI_64BIT_BAR4); 12011 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 12012 phba->sli4_hba.drbl_regs_memmap_p = 12013 ioremap(phba->pci_bar2_map, 12014 bar2map_len); 12015 if (!phba->sli4_hba.drbl_regs_memmap_p) { 12016 dev_err(&pdev->dev, 12017 "ioremap failed for SLI4 HBA" 12018 " doorbell registers.\n"); 12019 error = -ENOMEM; 12020 goto out_iounmap_ctrl; 12021 } 12022 phba->pci_bar4_memmap_p = 12023 phba->sli4_hba.drbl_regs_memmap_p; 12024 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); 12025 if (error) 12026 goto out_iounmap_all; 12027 } else { 12028 error = -ENOMEM; 12029 goto out_iounmap_ctrl; 12030 } 12031 } 12032 12033 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && 12034 pci_resource_start(pdev, PCI_64BIT_BAR4)) { 12035 /* 12036 * Map SLI4 if type 6 HBA DPP Register base to a kernel 12037 * virtual address and setup the registers. 12038 */ 12039 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); 12040 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 12041 phba->sli4_hba.dpp_regs_memmap_p = 12042 ioremap(phba->pci_bar2_map, bar2map_len); 12043 if (!phba->sli4_hba.dpp_regs_memmap_p) { 12044 dev_err(&pdev->dev, 12045 "ioremap failed for SLI4 HBA dpp registers.\n"); 12046 error = -ENOMEM; 12047 goto out_iounmap_all; 12048 } 12049 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; 12050 } 12051 12052 /* Set up the EQ/CQ register handeling functions now */ 12053 switch (if_type) { 12054 case LPFC_SLI_INTF_IF_TYPE_0: 12055 case LPFC_SLI_INTF_IF_TYPE_2: 12056 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; 12057 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; 12058 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; 12059 break; 12060 case LPFC_SLI_INTF_IF_TYPE_6: 12061 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; 12062 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; 12063 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; 12064 break; 12065 default: 12066 break; 12067 } 12068 12069 return 0; 12070 12071 out_iounmap_all: 12072 if (phba->sli4_hba.drbl_regs_memmap_p) 12073 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12074 out_iounmap_ctrl: 12075 if (phba->sli4_hba.ctrl_regs_memmap_p) 12076 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12077 out_iounmap_conf: 12078 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12079 12080 return error; 12081 } 12082 12083 /** 12084 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. 12085 * @phba: pointer to lpfc hba data structure. 12086 * 12087 * This routine is invoked to unset the PCI device memory space for device 12088 * with SLI-4 interface spec. 12089 **/ 12090 static void 12091 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) 12092 { 12093 uint32_t if_type; 12094 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 12095 12096 switch (if_type) { 12097 case LPFC_SLI_INTF_IF_TYPE_0: 12098 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12099 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12100 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12101 break; 12102 case LPFC_SLI_INTF_IF_TYPE_2: 12103 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12104 break; 12105 case LPFC_SLI_INTF_IF_TYPE_6: 12106 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12107 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12108 if (phba->sli4_hba.dpp_regs_memmap_p) 12109 iounmap(phba->sli4_hba.dpp_regs_memmap_p); 12110 break; 12111 case LPFC_SLI_INTF_IF_TYPE_1: 12112 break; 12113 default: 12114 dev_printk(KERN_ERR, &phba->pcidev->dev, 12115 "FATAL - unsupported SLI4 interface type - %d\n", 12116 if_type); 12117 break; 12118 } 12119 } 12120 12121 /** 12122 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device 12123 * @phba: pointer to lpfc hba data structure. 12124 * 12125 * This routine is invoked to enable the MSI-X interrupt vectors to device 12126 * with SLI-3 interface specs. 12127 * 12128 * Return codes 12129 * 0 - successful 12130 * other values - error 12131 **/ 12132 static int 12133 lpfc_sli_enable_msix(struct lpfc_hba *phba) 12134 { 12135 int rc; 12136 LPFC_MBOXQ_t *pmb; 12137 12138 /* Set up MSI-X multi-message vectors */ 12139 rc = pci_alloc_irq_vectors(phba->pcidev, 12140 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); 12141 if (rc < 0) { 12142 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12143 "0420 PCI enable MSI-X failed (%d)\n", rc); 12144 goto vec_fail_out; 12145 } 12146 12147 /* 12148 * Assign MSI-X vectors to interrupt handlers 12149 */ 12150 12151 /* vector-0 is associated to slow-path handler */ 12152 rc = request_irq(pci_irq_vector(phba->pcidev, 0), 12153 &lpfc_sli_sp_intr_handler, 0, 12154 LPFC_SP_DRIVER_HANDLER_NAME, phba); 12155 if (rc) { 12156 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12157 "0421 MSI-X slow-path request_irq failed " 12158 "(%d)\n", rc); 12159 goto msi_fail_out; 12160 } 12161 12162 /* vector-1 is associated to fast-path handler */ 12163 rc = request_irq(pci_irq_vector(phba->pcidev, 1), 12164 &lpfc_sli_fp_intr_handler, 0, 12165 LPFC_FP_DRIVER_HANDLER_NAME, phba); 12166 12167 if (rc) { 12168 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12169 "0429 MSI-X fast-path request_irq failed " 12170 "(%d)\n", rc); 12171 goto irq_fail_out; 12172 } 12173 12174 /* 12175 * Configure HBA MSI-X attention conditions to messages 12176 */ 12177 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 12178 12179 if (!pmb) { 12180 rc = -ENOMEM; 12181 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 12182 "0474 Unable to allocate memory for issuing " 12183 "MBOX_CONFIG_MSI command\n"); 12184 goto mem_fail_out; 12185 } 12186 rc = lpfc_config_msi(phba, pmb); 12187 if (rc) 12188 goto mbx_fail_out; 12189 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 12190 if (rc != MBX_SUCCESS) { 12191 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, 12192 "0351 Config MSI mailbox command failed, " 12193 "mbxCmd x%x, mbxStatus x%x\n", 12194 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); 12195 goto mbx_fail_out; 12196 } 12197 12198 /* Free memory allocated for mailbox command */ 12199 mempool_free(pmb, phba->mbox_mem_pool); 12200 return rc; 12201 12202 mbx_fail_out: 12203 /* Free memory allocated for mailbox command */ 12204 mempool_free(pmb, phba->mbox_mem_pool); 12205 12206 mem_fail_out: 12207 /* free the irq already requested */ 12208 free_irq(pci_irq_vector(phba->pcidev, 1), phba); 12209 12210 irq_fail_out: 12211 /* free the irq already requested */ 12212 free_irq(pci_irq_vector(phba->pcidev, 0), phba); 12213 12214 msi_fail_out: 12215 /* Unconfigure MSI-X capability structure */ 12216 pci_free_irq_vectors(phba->pcidev); 12217 12218 vec_fail_out: 12219 return rc; 12220 } 12221 12222 /** 12223 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. 12224 * @phba: pointer to lpfc hba data structure. 12225 * 12226 * This routine is invoked to enable the MSI interrupt mode to device with 12227 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to 12228 * enable the MSI vector. The device driver is responsible for calling the 12229 * request_irq() to register MSI vector with a interrupt the handler, which 12230 * is done in this function. 12231 * 12232 * Return codes 12233 * 0 - successful 12234 * other values - error 12235 */ 12236 static int 12237 lpfc_sli_enable_msi(struct lpfc_hba *phba) 12238 { 12239 int rc; 12240 12241 rc = pci_enable_msi(phba->pcidev); 12242 if (!rc) 12243 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12244 "0012 PCI enable MSI mode success.\n"); 12245 else { 12246 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12247 "0471 PCI enable MSI mode failed (%d)\n", rc); 12248 return rc; 12249 } 12250 12251 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12252 0, LPFC_DRIVER_NAME, phba); 12253 if (rc) { 12254 pci_disable_msi(phba->pcidev); 12255 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12256 "0478 MSI request_irq failed (%d)\n", rc); 12257 } 12258 return rc; 12259 } 12260 12261 /** 12262 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. 12263 * @phba: pointer to lpfc hba data structure. 12264 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 12265 * 12266 * This routine is invoked to enable device interrupt and associate driver's 12267 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface 12268 * spec. Depends on the interrupt mode configured to the driver, the driver 12269 * will try to fallback from the configured interrupt mode to an interrupt 12270 * mode which is supported by the platform, kernel, and device in the order 12271 * of: 12272 * MSI-X -> MSI -> IRQ. 12273 * 12274 * Return codes 12275 * 0 - successful 12276 * other values - error 12277 **/ 12278 static uint32_t 12279 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 12280 { 12281 uint32_t intr_mode = LPFC_INTR_ERROR; 12282 int retval; 12283 12284 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ 12285 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); 12286 if (retval) 12287 return intr_mode; 12288 phba->hba_flag &= ~HBA_NEEDS_CFG_PORT; 12289 12290 if (cfg_mode == 2) { 12291 /* Now, try to enable MSI-X interrupt mode */ 12292 retval = lpfc_sli_enable_msix(phba); 12293 if (!retval) { 12294 /* Indicate initialization to MSI-X mode */ 12295 phba->intr_type = MSIX; 12296 intr_mode = 2; 12297 } 12298 } 12299 12300 /* Fallback to MSI if MSI-X initialization failed */ 12301 if (cfg_mode >= 1 && phba->intr_type == NONE) { 12302 retval = lpfc_sli_enable_msi(phba); 12303 if (!retval) { 12304 /* Indicate initialization to MSI mode */ 12305 phba->intr_type = MSI; 12306 intr_mode = 1; 12307 } 12308 } 12309 12310 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 12311 if (phba->intr_type == NONE) { 12312 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12313 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 12314 if (!retval) { 12315 /* Indicate initialization to INTx mode */ 12316 phba->intr_type = INTx; 12317 intr_mode = 0; 12318 } 12319 } 12320 return intr_mode; 12321 } 12322 12323 /** 12324 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. 12325 * @phba: pointer to lpfc hba data structure. 12326 * 12327 * This routine is invoked to disable device interrupt and disassociate the 12328 * driver's interrupt handler(s) from interrupt vector(s) to device with 12329 * SLI-3 interface spec. Depending on the interrupt mode, the driver will 12330 * release the interrupt vector(s) for the message signaled interrupt. 12331 **/ 12332 static void 12333 lpfc_sli_disable_intr(struct lpfc_hba *phba) 12334 { 12335 int nr_irqs, i; 12336 12337 if (phba->intr_type == MSIX) 12338 nr_irqs = LPFC_MSIX_VECTORS; 12339 else 12340 nr_irqs = 1; 12341 12342 for (i = 0; i < nr_irqs; i++) 12343 free_irq(pci_irq_vector(phba->pcidev, i), phba); 12344 pci_free_irq_vectors(phba->pcidev); 12345 12346 /* Reset interrupt management states */ 12347 phba->intr_type = NONE; 12348 phba->sli.slistat.sli_intr = 0; 12349 } 12350 12351 /** 12352 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue 12353 * @phba: pointer to lpfc hba data structure. 12354 * @id: EQ vector index or Hardware Queue index 12355 * @match: LPFC_FIND_BY_EQ = match by EQ 12356 * LPFC_FIND_BY_HDWQ = match by Hardware Queue 12357 * Return the CPU that matches the selection criteria 12358 */ 12359 static uint16_t 12360 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) 12361 { 12362 struct lpfc_vector_map_info *cpup; 12363 int cpu; 12364 12365 /* Loop through all CPUs */ 12366 for_each_present_cpu(cpu) { 12367 cpup = &phba->sli4_hba.cpu_map[cpu]; 12368 12369 /* If we are matching by EQ, there may be multiple CPUs using 12370 * using the same vector, so select the one with 12371 * LPFC_CPU_FIRST_IRQ set. 12372 */ 12373 if ((match == LPFC_FIND_BY_EQ) && 12374 (cpup->flag & LPFC_CPU_FIRST_IRQ) && 12375 (cpup->eq == id)) 12376 return cpu; 12377 12378 /* If matching by HDWQ, select the first CPU that matches */ 12379 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) 12380 return cpu; 12381 } 12382 return 0; 12383 } 12384 12385 #ifdef CONFIG_X86 12386 /** 12387 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded 12388 * @phba: pointer to lpfc hba data structure. 12389 * @cpu: CPU map index 12390 * @phys_id: CPU package physical id 12391 * @core_id: CPU core id 12392 */ 12393 static int 12394 lpfc_find_hyper(struct lpfc_hba *phba, int cpu, 12395 uint16_t phys_id, uint16_t core_id) 12396 { 12397 struct lpfc_vector_map_info *cpup; 12398 int idx; 12399 12400 for_each_present_cpu(idx) { 12401 cpup = &phba->sli4_hba.cpu_map[idx]; 12402 /* Does the cpup match the one we are looking for */ 12403 if ((cpup->phys_id == phys_id) && 12404 (cpup->core_id == core_id) && 12405 (cpu != idx)) 12406 return 1; 12407 } 12408 return 0; 12409 } 12410 #endif 12411 12412 /* 12413 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure 12414 * @phba: pointer to lpfc hba data structure. 12415 * @eqidx: index for eq and irq vector 12416 * @flag: flags to set for vector_map structure 12417 * @cpu: cpu used to index vector_map structure 12418 * 12419 * The routine assigns eq info into vector_map structure 12420 */ 12421 static inline void 12422 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, 12423 unsigned int cpu) 12424 { 12425 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; 12426 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); 12427 12428 cpup->eq = eqidx; 12429 cpup->flag |= flag; 12430 12431 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12432 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", 12433 cpu, eqhdl->irq, cpup->eq, cpup->flag); 12434 } 12435 12436 /** 12437 * lpfc_cpu_map_array_init - Initialize cpu_map structure 12438 * @phba: pointer to lpfc hba data structure. 12439 * 12440 * The routine initializes the cpu_map array structure 12441 */ 12442 static void 12443 lpfc_cpu_map_array_init(struct lpfc_hba *phba) 12444 { 12445 struct lpfc_vector_map_info *cpup; 12446 struct lpfc_eq_intr_info *eqi; 12447 int cpu; 12448 12449 for_each_possible_cpu(cpu) { 12450 cpup = &phba->sli4_hba.cpu_map[cpu]; 12451 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; 12452 cpup->core_id = LPFC_VECTOR_MAP_EMPTY; 12453 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; 12454 cpup->eq = LPFC_VECTOR_MAP_EMPTY; 12455 cpup->flag = 0; 12456 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); 12457 INIT_LIST_HEAD(&eqi->list); 12458 eqi->icnt = 0; 12459 } 12460 } 12461 12462 /** 12463 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure 12464 * @phba: pointer to lpfc hba data structure. 12465 * 12466 * The routine initializes the hba_eq_hdl array structure 12467 */ 12468 static void 12469 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) 12470 { 12471 struct lpfc_hba_eq_hdl *eqhdl; 12472 int i; 12473 12474 for (i = 0; i < phba->cfg_irq_chann; i++) { 12475 eqhdl = lpfc_get_eq_hdl(i); 12476 eqhdl->irq = LPFC_IRQ_EMPTY; 12477 eqhdl->phba = phba; 12478 } 12479 } 12480 12481 /** 12482 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings 12483 * @phba: pointer to lpfc hba data structure. 12484 * @vectors: number of msix vectors allocated. 12485 * 12486 * The routine will figure out the CPU affinity assignment for every 12487 * MSI-X vector allocated for the HBA. 12488 * In addition, the CPU to IO channel mapping will be calculated 12489 * and the phba->sli4_hba.cpu_map array will reflect this. 12490 */ 12491 static void 12492 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) 12493 { 12494 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; 12495 int max_phys_id, min_phys_id; 12496 int max_core_id, min_core_id; 12497 struct lpfc_vector_map_info *cpup; 12498 struct lpfc_vector_map_info *new_cpup; 12499 #ifdef CONFIG_X86 12500 struct cpuinfo_x86 *cpuinfo; 12501 #endif 12502 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12503 struct lpfc_hdwq_stat *c_stat; 12504 #endif 12505 12506 max_phys_id = 0; 12507 min_phys_id = LPFC_VECTOR_MAP_EMPTY; 12508 max_core_id = 0; 12509 min_core_id = LPFC_VECTOR_MAP_EMPTY; 12510 12511 /* Update CPU map with physical id and core id of each CPU */ 12512 for_each_present_cpu(cpu) { 12513 cpup = &phba->sli4_hba.cpu_map[cpu]; 12514 #ifdef CONFIG_X86 12515 cpuinfo = &cpu_data(cpu); 12516 cpup->phys_id = cpuinfo->phys_proc_id; 12517 cpup->core_id = cpuinfo->cpu_core_id; 12518 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) 12519 cpup->flag |= LPFC_CPU_MAP_HYPER; 12520 #else 12521 /* No distinction between CPUs for other platforms */ 12522 cpup->phys_id = 0; 12523 cpup->core_id = cpu; 12524 #endif 12525 12526 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12527 "3328 CPU %d physid %d coreid %d flag x%x\n", 12528 cpu, cpup->phys_id, cpup->core_id, cpup->flag); 12529 12530 if (cpup->phys_id > max_phys_id) 12531 max_phys_id = cpup->phys_id; 12532 if (cpup->phys_id < min_phys_id) 12533 min_phys_id = cpup->phys_id; 12534 12535 if (cpup->core_id > max_core_id) 12536 max_core_id = cpup->core_id; 12537 if (cpup->core_id < min_core_id) 12538 min_core_id = cpup->core_id; 12539 } 12540 12541 /* After looking at each irq vector assigned to this pcidev, its 12542 * possible to see that not ALL CPUs have been accounted for. 12543 * Next we will set any unassigned (unaffinitized) cpu map 12544 * entries to a IRQ on the same phys_id. 12545 */ 12546 first_cpu = cpumask_first(cpu_present_mask); 12547 start_cpu = first_cpu; 12548 12549 for_each_present_cpu(cpu) { 12550 cpup = &phba->sli4_hba.cpu_map[cpu]; 12551 12552 /* Is this CPU entry unassigned */ 12553 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12554 /* Mark CPU as IRQ not assigned by the kernel */ 12555 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12556 12557 /* If so, find a new_cpup that is on the SAME 12558 * phys_id as cpup. start_cpu will start where we 12559 * left off so all unassigned entries don't get assgined 12560 * the IRQ of the first entry. 12561 */ 12562 new_cpu = start_cpu; 12563 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12564 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12565 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12566 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && 12567 (new_cpup->phys_id == cpup->phys_id)) 12568 goto found_same; 12569 new_cpu = cpumask_next( 12570 new_cpu, cpu_present_mask); 12571 if (new_cpu >= nr_cpu_ids) 12572 new_cpu = first_cpu; 12573 } 12574 /* At this point, we leave the CPU as unassigned */ 12575 continue; 12576 found_same: 12577 /* We found a matching phys_id, so copy the IRQ info */ 12578 cpup->eq = new_cpup->eq; 12579 12580 /* Bump start_cpu to the next slot to minmize the 12581 * chance of having multiple unassigned CPU entries 12582 * selecting the same IRQ. 12583 */ 12584 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12585 if (start_cpu >= nr_cpu_ids) 12586 start_cpu = first_cpu; 12587 12588 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12589 "3337 Set Affinity: CPU %d " 12590 "eq %d from peer cpu %d same " 12591 "phys_id (%d)\n", 12592 cpu, cpup->eq, new_cpu, 12593 cpup->phys_id); 12594 } 12595 } 12596 12597 /* Set any unassigned cpu map entries to a IRQ on any phys_id */ 12598 start_cpu = first_cpu; 12599 12600 for_each_present_cpu(cpu) { 12601 cpup = &phba->sli4_hba.cpu_map[cpu]; 12602 12603 /* Is this entry unassigned */ 12604 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12605 /* Mark it as IRQ not assigned by the kernel */ 12606 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12607 12608 /* If so, find a new_cpup thats on ANY phys_id 12609 * as the cpup. start_cpu will start where we 12610 * left off so all unassigned entries don't get 12611 * assigned the IRQ of the first entry. 12612 */ 12613 new_cpu = start_cpu; 12614 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12615 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12616 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12617 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) 12618 goto found_any; 12619 new_cpu = cpumask_next( 12620 new_cpu, cpu_present_mask); 12621 if (new_cpu >= nr_cpu_ids) 12622 new_cpu = first_cpu; 12623 } 12624 /* We should never leave an entry unassigned */ 12625 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 12626 "3339 Set Affinity: CPU %d " 12627 "eq %d UNASSIGNED\n", 12628 cpup->hdwq, cpup->eq); 12629 continue; 12630 found_any: 12631 /* We found an available entry, copy the IRQ info */ 12632 cpup->eq = new_cpup->eq; 12633 12634 /* Bump start_cpu to the next slot to minmize the 12635 * chance of having multiple unassigned CPU entries 12636 * selecting the same IRQ. 12637 */ 12638 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12639 if (start_cpu >= nr_cpu_ids) 12640 start_cpu = first_cpu; 12641 12642 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12643 "3338 Set Affinity: CPU %d " 12644 "eq %d from peer cpu %d (%d/%d)\n", 12645 cpu, cpup->eq, new_cpu, 12646 new_cpup->phys_id, new_cpup->core_id); 12647 } 12648 } 12649 12650 /* Assign hdwq indices that are unique across all cpus in the map 12651 * that are also FIRST_CPUs. 12652 */ 12653 idx = 0; 12654 for_each_present_cpu(cpu) { 12655 cpup = &phba->sli4_hba.cpu_map[cpu]; 12656 12657 /* Only FIRST IRQs get a hdwq index assignment. */ 12658 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12659 continue; 12660 12661 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ 12662 cpup->hdwq = idx; 12663 idx++; 12664 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12665 "3333 Set Affinity: CPU %d (phys %d core %d): " 12666 "hdwq %d eq %d flg x%x\n", 12667 cpu, cpup->phys_id, cpup->core_id, 12668 cpup->hdwq, cpup->eq, cpup->flag); 12669 } 12670 /* Associate a hdwq with each cpu_map entry 12671 * This will be 1 to 1 - hdwq to cpu, unless there are less 12672 * hardware queues then CPUs. For that case we will just round-robin 12673 * the available hardware queues as they get assigned to CPUs. 12674 * The next_idx is the idx from the FIRST_CPU loop above to account 12675 * for irq_chann < hdwq. The idx is used for round-robin assignments 12676 * and needs to start at 0. 12677 */ 12678 next_idx = idx; 12679 start_cpu = 0; 12680 idx = 0; 12681 for_each_present_cpu(cpu) { 12682 cpup = &phba->sli4_hba.cpu_map[cpu]; 12683 12684 /* FIRST cpus are already mapped. */ 12685 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 12686 continue; 12687 12688 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq 12689 * of the unassigned cpus to the next idx so that all 12690 * hdw queues are fully utilized. 12691 */ 12692 if (next_idx < phba->cfg_hdw_queue) { 12693 cpup->hdwq = next_idx; 12694 next_idx++; 12695 continue; 12696 } 12697 12698 /* Not a First CPU and all hdw_queues are used. Reuse a 12699 * Hardware Queue for another CPU, so be smart about it 12700 * and pick one that has its IRQ/EQ mapped to the same phys_id 12701 * (CPU package) and core_id. 12702 */ 12703 new_cpu = start_cpu; 12704 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12705 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12706 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12707 new_cpup->phys_id == cpup->phys_id && 12708 new_cpup->core_id == cpup->core_id) { 12709 goto found_hdwq; 12710 } 12711 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12712 if (new_cpu >= nr_cpu_ids) 12713 new_cpu = first_cpu; 12714 } 12715 12716 /* If we can't match both phys_id and core_id, 12717 * settle for just a phys_id match. 12718 */ 12719 new_cpu = start_cpu; 12720 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12721 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12722 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12723 new_cpup->phys_id == cpup->phys_id) 12724 goto found_hdwq; 12725 12726 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12727 if (new_cpu >= nr_cpu_ids) 12728 new_cpu = first_cpu; 12729 } 12730 12731 /* Otherwise just round robin on cfg_hdw_queue */ 12732 cpup->hdwq = idx % phba->cfg_hdw_queue; 12733 idx++; 12734 goto logit; 12735 found_hdwq: 12736 /* We found an available entry, copy the IRQ info */ 12737 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12738 if (start_cpu >= nr_cpu_ids) 12739 start_cpu = first_cpu; 12740 cpup->hdwq = new_cpup->hdwq; 12741 logit: 12742 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12743 "3335 Set Affinity: CPU %d (phys %d core %d): " 12744 "hdwq %d eq %d flg x%x\n", 12745 cpu, cpup->phys_id, cpup->core_id, 12746 cpup->hdwq, cpup->eq, cpup->flag); 12747 } 12748 12749 /* 12750 * Initialize the cpu_map slots for not-present cpus in case 12751 * a cpu is hot-added. Perform a simple hdwq round robin assignment. 12752 */ 12753 idx = 0; 12754 for_each_possible_cpu(cpu) { 12755 cpup = &phba->sli4_hba.cpu_map[cpu]; 12756 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12757 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); 12758 c_stat->hdwq_no = cpup->hdwq; 12759 #endif 12760 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) 12761 continue; 12762 12763 cpup->hdwq = idx++ % phba->cfg_hdw_queue; 12764 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12765 c_stat->hdwq_no = cpup->hdwq; 12766 #endif 12767 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12768 "3340 Set Affinity: not present " 12769 "CPU %d hdwq %d\n", 12770 cpu, cpup->hdwq); 12771 } 12772 12773 /* The cpu_map array will be used later during initialization 12774 * when EQ / CQ / WQs are allocated and configured. 12775 */ 12776 return; 12777 } 12778 12779 /** 12780 * lpfc_cpuhp_get_eq 12781 * 12782 * @phba: pointer to lpfc hba data structure. 12783 * @cpu: cpu going offline 12784 * @eqlist: eq list to append to 12785 */ 12786 static int 12787 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, 12788 struct list_head *eqlist) 12789 { 12790 const struct cpumask *maskp; 12791 struct lpfc_queue *eq; 12792 struct cpumask *tmp; 12793 u16 idx; 12794 12795 tmp = kzalloc(cpumask_size(), GFP_KERNEL); 12796 if (!tmp) 12797 return -ENOMEM; 12798 12799 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12800 maskp = pci_irq_get_affinity(phba->pcidev, idx); 12801 if (!maskp) 12802 continue; 12803 /* 12804 * if irq is not affinitized to the cpu going 12805 * then we don't need to poll the eq attached 12806 * to it. 12807 */ 12808 if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) 12809 continue; 12810 /* get the cpus that are online and are affini- 12811 * tized to this irq vector. If the count is 12812 * more than 1 then cpuhp is not going to shut- 12813 * down this vector. Since this cpu has not 12814 * gone offline yet, we need >1. 12815 */ 12816 cpumask_and(tmp, maskp, cpu_online_mask); 12817 if (cpumask_weight(tmp) > 1) 12818 continue; 12819 12820 /* Now that we have an irq to shutdown, get the eq 12821 * mapped to this irq. Note: multiple hdwq's in 12822 * the software can share an eq, but eventually 12823 * only eq will be mapped to this vector 12824 */ 12825 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 12826 list_add(&eq->_poll_list, eqlist); 12827 } 12828 kfree(tmp); 12829 return 0; 12830 } 12831 12832 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) 12833 { 12834 if (phba->sli_rev != LPFC_SLI_REV4) 12835 return; 12836 12837 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, 12838 &phba->cpuhp); 12839 /* 12840 * unregistering the instance doesn't stop the polling 12841 * timer. Wait for the poll timer to retire. 12842 */ 12843 synchronize_rcu(); 12844 del_timer_sync(&phba->cpuhp_poll_timer); 12845 } 12846 12847 static void lpfc_cpuhp_remove(struct lpfc_hba *phba) 12848 { 12849 if (phba->pport && (phba->pport->fc_flag & FC_OFFLINE_MODE)) 12850 return; 12851 12852 __lpfc_cpuhp_remove(phba); 12853 } 12854 12855 static void lpfc_cpuhp_add(struct lpfc_hba *phba) 12856 { 12857 if (phba->sli_rev != LPFC_SLI_REV4) 12858 return; 12859 12860 rcu_read_lock(); 12861 12862 if (!list_empty(&phba->poll_list)) 12863 mod_timer(&phba->cpuhp_poll_timer, 12864 jiffies + msecs_to_jiffies(LPFC_POLL_HB)); 12865 12866 rcu_read_unlock(); 12867 12868 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, 12869 &phba->cpuhp); 12870 } 12871 12872 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) 12873 { 12874 if (phba->pport->load_flag & FC_UNLOADING) { 12875 *retval = -EAGAIN; 12876 return true; 12877 } 12878 12879 if (phba->sli_rev != LPFC_SLI_REV4) { 12880 *retval = 0; 12881 return true; 12882 } 12883 12884 /* proceed with the hotplug */ 12885 return false; 12886 } 12887 12888 /** 12889 * lpfc_irq_set_aff - set IRQ affinity 12890 * @eqhdl: EQ handle 12891 * @cpu: cpu to set affinity 12892 * 12893 **/ 12894 static inline void 12895 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) 12896 { 12897 cpumask_clear(&eqhdl->aff_mask); 12898 cpumask_set_cpu(cpu, &eqhdl->aff_mask); 12899 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12900 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask); 12901 } 12902 12903 /** 12904 * lpfc_irq_clear_aff - clear IRQ affinity 12905 * @eqhdl: EQ handle 12906 * 12907 **/ 12908 static inline void 12909 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) 12910 { 12911 cpumask_clear(&eqhdl->aff_mask); 12912 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12913 } 12914 12915 /** 12916 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event 12917 * @phba: pointer to HBA context object. 12918 * @cpu: cpu going offline/online 12919 * @offline: true, cpu is going offline. false, cpu is coming online. 12920 * 12921 * If cpu is going offline, we'll try our best effort to find the next 12922 * online cpu on the phba's original_mask and migrate all offlining IRQ 12923 * affinities. 12924 * 12925 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. 12926 * 12927 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on 12928 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. 12929 * 12930 **/ 12931 static void 12932 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) 12933 { 12934 struct lpfc_vector_map_info *cpup; 12935 struct cpumask *aff_mask; 12936 unsigned int cpu_select, cpu_next, idx; 12937 const struct cpumask *orig_mask; 12938 12939 if (phba->irq_chann_mode == NORMAL_MODE) 12940 return; 12941 12942 orig_mask = &phba->sli4_hba.irq_aff_mask; 12943 12944 if (!cpumask_test_cpu(cpu, orig_mask)) 12945 return; 12946 12947 cpup = &phba->sli4_hba.cpu_map[cpu]; 12948 12949 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12950 return; 12951 12952 if (offline) { 12953 /* Find next online CPU on original mask */ 12954 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true); 12955 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); 12956 12957 /* Found a valid CPU */ 12958 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { 12959 /* Go through each eqhdl and ensure offlining 12960 * cpu aff_mask is migrated 12961 */ 12962 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12963 aff_mask = lpfc_get_aff_mask(idx); 12964 12965 /* Migrate affinity */ 12966 if (cpumask_test_cpu(cpu, aff_mask)) 12967 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), 12968 cpu_select); 12969 } 12970 } else { 12971 /* Rely on irqbalance if no online CPUs left on NUMA */ 12972 for (idx = 0; idx < phba->cfg_irq_chann; idx++) 12973 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); 12974 } 12975 } else { 12976 /* Migrate affinity back to this CPU */ 12977 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); 12978 } 12979 } 12980 12981 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) 12982 { 12983 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12984 struct lpfc_queue *eq, *next; 12985 LIST_HEAD(eqlist); 12986 int retval; 12987 12988 if (!phba) { 12989 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12990 return 0; 12991 } 12992 12993 if (__lpfc_cpuhp_checks(phba, &retval)) 12994 return retval; 12995 12996 lpfc_irq_rebalance(phba, cpu, true); 12997 12998 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); 12999 if (retval) 13000 return retval; 13001 13002 /* start polling on these eq's */ 13003 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { 13004 list_del_init(&eq->_poll_list); 13005 lpfc_sli4_start_polling(eq); 13006 } 13007 13008 return 0; 13009 } 13010 13011 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) 13012 { 13013 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 13014 struct lpfc_queue *eq, *next; 13015 unsigned int n; 13016 int retval; 13017 13018 if (!phba) { 13019 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 13020 return 0; 13021 } 13022 13023 if (__lpfc_cpuhp_checks(phba, &retval)) 13024 return retval; 13025 13026 lpfc_irq_rebalance(phba, cpu, false); 13027 13028 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { 13029 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); 13030 if (n == cpu) 13031 lpfc_sli4_stop_polling(eq); 13032 } 13033 13034 return 0; 13035 } 13036 13037 /** 13038 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device 13039 * @phba: pointer to lpfc hba data structure. 13040 * 13041 * This routine is invoked to enable the MSI-X interrupt vectors to device 13042 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them 13043 * to cpus on the system. 13044 * 13045 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for 13046 * the number of cpus on the same numa node as this adapter. The vectors are 13047 * allocated without requesting OS affinity mapping. A vector will be 13048 * allocated and assigned to each online and offline cpu. If the cpu is 13049 * online, then affinity will be set to that cpu. If the cpu is offline, then 13050 * affinity will be set to the nearest peer cpu within the numa node that is 13051 * online. If there are no online cpus within the numa node, affinity is not 13052 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping 13053 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is 13054 * configured. 13055 * 13056 * If numa mode is not enabled and there is more than 1 vector allocated, then 13057 * the driver relies on the managed irq interface where the OS assigns vector to 13058 * cpu affinity. The driver will then use that affinity mapping to setup its 13059 * cpu mapping table. 13060 * 13061 * Return codes 13062 * 0 - successful 13063 * other values - error 13064 **/ 13065 static int 13066 lpfc_sli4_enable_msix(struct lpfc_hba *phba) 13067 { 13068 int vectors, rc, index; 13069 char *name; 13070 const struct cpumask *aff_mask = NULL; 13071 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; 13072 struct lpfc_vector_map_info *cpup; 13073 struct lpfc_hba_eq_hdl *eqhdl; 13074 const struct cpumask *maskp; 13075 unsigned int flags = PCI_IRQ_MSIX; 13076 13077 /* Set up MSI-X multi-message vectors */ 13078 vectors = phba->cfg_irq_chann; 13079 13080 if (phba->irq_chann_mode != NORMAL_MODE) 13081 aff_mask = &phba->sli4_hba.irq_aff_mask; 13082 13083 if (aff_mask) { 13084 cpu_cnt = cpumask_weight(aff_mask); 13085 vectors = min(phba->cfg_irq_chann, cpu_cnt); 13086 13087 /* cpu: iterates over aff_mask including offline or online 13088 * cpu_select: iterates over online aff_mask to set affinity 13089 */ 13090 cpu = cpumask_first(aff_mask); 13091 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13092 } else { 13093 flags |= PCI_IRQ_AFFINITY; 13094 } 13095 13096 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); 13097 if (rc < 0) { 13098 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13099 "0484 PCI enable MSI-X failed (%d)\n", rc); 13100 goto vec_fail_out; 13101 } 13102 vectors = rc; 13103 13104 /* Assign MSI-X vectors to interrupt handlers */ 13105 for (index = 0; index < vectors; index++) { 13106 eqhdl = lpfc_get_eq_hdl(index); 13107 name = eqhdl->handler_name; 13108 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); 13109 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, 13110 LPFC_DRIVER_HANDLER_NAME"%d", index); 13111 13112 eqhdl->idx = index; 13113 rc = pci_irq_vector(phba->pcidev, index); 13114 if (rc < 0) { 13115 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13116 "0489 MSI-X fast-path (%d) " 13117 "pci_irq_vec failed (%d)\n", index, rc); 13118 goto cfg_fail_out; 13119 } 13120 eqhdl->irq = rc; 13121 13122 rc = request_threaded_irq(eqhdl->irq, 13123 &lpfc_sli4_hba_intr_handler, 13124 &lpfc_sli4_hba_intr_handler_th, 13125 IRQF_ONESHOT, name, eqhdl); 13126 if (rc) { 13127 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13128 "0486 MSI-X fast-path (%d) " 13129 "request_irq failed (%d)\n", index, rc); 13130 goto cfg_fail_out; 13131 } 13132 13133 if (aff_mask) { 13134 /* If found a neighboring online cpu, set affinity */ 13135 if (cpu_select < nr_cpu_ids) 13136 lpfc_irq_set_aff(eqhdl, cpu_select); 13137 13138 /* Assign EQ to cpu_map */ 13139 lpfc_assign_eq_map_info(phba, index, 13140 LPFC_CPU_FIRST_IRQ, 13141 cpu); 13142 13143 /* Iterate to next offline or online cpu in aff_mask */ 13144 cpu = cpumask_next(cpu, aff_mask); 13145 13146 /* Find next online cpu in aff_mask to set affinity */ 13147 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13148 } else if (vectors == 1) { 13149 cpu = cpumask_first(cpu_present_mask); 13150 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, 13151 cpu); 13152 } else { 13153 maskp = pci_irq_get_affinity(phba->pcidev, index); 13154 13155 /* Loop through all CPUs associated with vector index */ 13156 for_each_cpu_and(cpu, maskp, cpu_present_mask) { 13157 cpup = &phba->sli4_hba.cpu_map[cpu]; 13158 13159 /* If this is the first CPU thats assigned to 13160 * this vector, set LPFC_CPU_FIRST_IRQ. 13161 * 13162 * With certain platforms its possible that irq 13163 * vectors are affinitized to all the cpu's. 13164 * This can result in each cpu_map.eq to be set 13165 * to the last vector, resulting in overwrite 13166 * of all the previous cpu_map.eq. Ensure that 13167 * each vector receives a place in cpu_map. 13168 * Later call to lpfc_cpu_affinity_check will 13169 * ensure we are nicely balanced out. 13170 */ 13171 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) 13172 continue; 13173 lpfc_assign_eq_map_info(phba, index, 13174 LPFC_CPU_FIRST_IRQ, 13175 cpu); 13176 break; 13177 } 13178 } 13179 } 13180 13181 if (vectors != phba->cfg_irq_chann) { 13182 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13183 "3238 Reducing IO channels to match number of " 13184 "MSI-X vectors, requested %d got %d\n", 13185 phba->cfg_irq_chann, vectors); 13186 if (phba->cfg_irq_chann > vectors) 13187 phba->cfg_irq_chann = vectors; 13188 } 13189 13190 return rc; 13191 13192 cfg_fail_out: 13193 /* free the irq already requested */ 13194 for (--index; index >= 0; index--) { 13195 eqhdl = lpfc_get_eq_hdl(index); 13196 lpfc_irq_clear_aff(eqhdl); 13197 free_irq(eqhdl->irq, eqhdl); 13198 } 13199 13200 /* Unconfigure MSI-X capability structure */ 13201 pci_free_irq_vectors(phba->pcidev); 13202 13203 vec_fail_out: 13204 return rc; 13205 } 13206 13207 /** 13208 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device 13209 * @phba: pointer to lpfc hba data structure. 13210 * 13211 * This routine is invoked to enable the MSI interrupt mode to device with 13212 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is 13213 * called to enable the MSI vector. The device driver is responsible for 13214 * calling the request_irq() to register MSI vector with a interrupt the 13215 * handler, which is done in this function. 13216 * 13217 * Return codes 13218 * 0 - successful 13219 * other values - error 13220 **/ 13221 static int 13222 lpfc_sli4_enable_msi(struct lpfc_hba *phba) 13223 { 13224 int rc, index; 13225 unsigned int cpu; 13226 struct lpfc_hba_eq_hdl *eqhdl; 13227 13228 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, 13229 PCI_IRQ_MSI | PCI_IRQ_AFFINITY); 13230 if (rc > 0) 13231 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13232 "0487 PCI enable MSI mode success.\n"); 13233 else { 13234 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13235 "0488 PCI enable MSI mode failed (%d)\n", rc); 13236 return rc ? rc : -1; 13237 } 13238 13239 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13240 0, LPFC_DRIVER_NAME, phba); 13241 if (rc) { 13242 pci_free_irq_vectors(phba->pcidev); 13243 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13244 "0490 MSI request_irq failed (%d)\n", rc); 13245 return rc; 13246 } 13247 13248 eqhdl = lpfc_get_eq_hdl(0); 13249 rc = pci_irq_vector(phba->pcidev, 0); 13250 if (rc < 0) { 13251 pci_free_irq_vectors(phba->pcidev); 13252 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13253 "0496 MSI pci_irq_vec failed (%d)\n", rc); 13254 return rc; 13255 } 13256 eqhdl->irq = rc; 13257 13258 cpu = cpumask_first(cpu_present_mask); 13259 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); 13260 13261 for (index = 0; index < phba->cfg_irq_chann; index++) { 13262 eqhdl = lpfc_get_eq_hdl(index); 13263 eqhdl->idx = index; 13264 } 13265 13266 return 0; 13267 } 13268 13269 /** 13270 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device 13271 * @phba: pointer to lpfc hba data structure. 13272 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 13273 * 13274 * This routine is invoked to enable device interrupt and associate driver's 13275 * interrupt handler(s) to interrupt vector(s) to device with SLI-4 13276 * interface spec. Depends on the interrupt mode configured to the driver, 13277 * the driver will try to fallback from the configured interrupt mode to an 13278 * interrupt mode which is supported by the platform, kernel, and device in 13279 * the order of: 13280 * MSI-X -> MSI -> IRQ. 13281 * 13282 * Return codes 13283 * Interrupt mode (2, 1, 0) - successful 13284 * LPFC_INTR_ERROR - error 13285 **/ 13286 static uint32_t 13287 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 13288 { 13289 uint32_t intr_mode = LPFC_INTR_ERROR; 13290 int retval, idx; 13291 13292 if (cfg_mode == 2) { 13293 /* Preparation before conf_msi mbox cmd */ 13294 retval = 0; 13295 if (!retval) { 13296 /* Now, try to enable MSI-X interrupt mode */ 13297 retval = lpfc_sli4_enable_msix(phba); 13298 if (!retval) { 13299 /* Indicate initialization to MSI-X mode */ 13300 phba->intr_type = MSIX; 13301 intr_mode = 2; 13302 } 13303 } 13304 } 13305 13306 /* Fallback to MSI if MSI-X initialization failed */ 13307 if (cfg_mode >= 1 && phba->intr_type == NONE) { 13308 retval = lpfc_sli4_enable_msi(phba); 13309 if (!retval) { 13310 /* Indicate initialization to MSI mode */ 13311 phba->intr_type = MSI; 13312 intr_mode = 1; 13313 } 13314 } 13315 13316 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 13317 if (phba->intr_type == NONE) { 13318 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13319 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 13320 if (!retval) { 13321 struct lpfc_hba_eq_hdl *eqhdl; 13322 unsigned int cpu; 13323 13324 /* Indicate initialization to INTx mode */ 13325 phba->intr_type = INTx; 13326 intr_mode = 0; 13327 13328 eqhdl = lpfc_get_eq_hdl(0); 13329 retval = pci_irq_vector(phba->pcidev, 0); 13330 if (retval < 0) { 13331 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13332 "0502 INTR pci_irq_vec failed (%d)\n", 13333 retval); 13334 return LPFC_INTR_ERROR; 13335 } 13336 eqhdl->irq = retval; 13337 13338 cpu = cpumask_first(cpu_present_mask); 13339 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, 13340 cpu); 13341 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 13342 eqhdl = lpfc_get_eq_hdl(idx); 13343 eqhdl->idx = idx; 13344 } 13345 } 13346 } 13347 return intr_mode; 13348 } 13349 13350 /** 13351 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device 13352 * @phba: pointer to lpfc hba data structure. 13353 * 13354 * This routine is invoked to disable device interrupt and disassociate 13355 * the driver's interrupt handler(s) from interrupt vector(s) to device 13356 * with SLI-4 interface spec. Depending on the interrupt mode, the driver 13357 * will release the interrupt vector(s) for the message signaled interrupt. 13358 **/ 13359 static void 13360 lpfc_sli4_disable_intr(struct lpfc_hba *phba) 13361 { 13362 /* Disable the currently initialized interrupt mode */ 13363 if (phba->intr_type == MSIX) { 13364 int index; 13365 struct lpfc_hba_eq_hdl *eqhdl; 13366 13367 /* Free up MSI-X multi-message vectors */ 13368 for (index = 0; index < phba->cfg_irq_chann; index++) { 13369 eqhdl = lpfc_get_eq_hdl(index); 13370 lpfc_irq_clear_aff(eqhdl); 13371 free_irq(eqhdl->irq, eqhdl); 13372 } 13373 } else { 13374 free_irq(phba->pcidev->irq, phba); 13375 } 13376 13377 pci_free_irq_vectors(phba->pcidev); 13378 13379 /* Reset interrupt management states */ 13380 phba->intr_type = NONE; 13381 phba->sli.slistat.sli_intr = 0; 13382 } 13383 13384 /** 13385 * lpfc_unset_hba - Unset SLI3 hba device initialization 13386 * @phba: pointer to lpfc hba data structure. 13387 * 13388 * This routine is invoked to unset the HBA device initialization steps to 13389 * a device with SLI-3 interface spec. 13390 **/ 13391 static void 13392 lpfc_unset_hba(struct lpfc_hba *phba) 13393 { 13394 struct lpfc_vport *vport = phba->pport; 13395 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 13396 13397 spin_lock_irq(shost->host_lock); 13398 vport->load_flag |= FC_UNLOADING; 13399 spin_unlock_irq(shost->host_lock); 13400 13401 kfree(phba->vpi_bmask); 13402 kfree(phba->vpi_ids); 13403 13404 lpfc_stop_hba_timers(phba); 13405 13406 phba->pport->work_port_events = 0; 13407 13408 lpfc_sli_hba_down(phba); 13409 13410 lpfc_sli_brdrestart(phba); 13411 13412 lpfc_sli_disable_intr(phba); 13413 13414 return; 13415 } 13416 13417 /** 13418 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy 13419 * @phba: Pointer to HBA context object. 13420 * 13421 * This function is called in the SLI4 code path to wait for completion 13422 * of device's XRIs exchange busy. It will check the XRI exchange busy 13423 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after 13424 * that, it will check the XRI exchange busy on outstanding FCP and ELS 13425 * I/Os every 30 seconds, log error message, and wait forever. Only when 13426 * all XRI exchange busy complete, the driver unload shall proceed with 13427 * invoking the function reset ioctl mailbox command to the CNA and the 13428 * the rest of the driver unload resource release. 13429 **/ 13430 static void 13431 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) 13432 { 13433 struct lpfc_sli4_hdw_queue *qp; 13434 int idx, ccnt; 13435 int wait_time = 0; 13436 int io_xri_cmpl = 1; 13437 int nvmet_xri_cmpl = 1; 13438 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13439 13440 /* Driver just aborted IOs during the hba_unset process. Pause 13441 * here to give the HBA time to complete the IO and get entries 13442 * into the abts lists. 13443 */ 13444 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); 13445 13446 /* Wait for NVME pending IO to flush back to transport. */ 13447 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13448 lpfc_nvme_wait_for_io_drain(phba); 13449 13450 ccnt = 0; 13451 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13452 qp = &phba->sli4_hba.hdwq[idx]; 13453 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); 13454 if (!io_xri_cmpl) /* if list is NOT empty */ 13455 ccnt++; 13456 } 13457 if (ccnt) 13458 io_xri_cmpl = 0; 13459 13460 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13461 nvmet_xri_cmpl = 13462 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13463 } 13464 13465 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { 13466 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { 13467 if (!nvmet_xri_cmpl) 13468 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13469 "6424 NVMET XRI exchange busy " 13470 "wait time: %d seconds.\n", 13471 wait_time/1000); 13472 if (!io_xri_cmpl) 13473 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13474 "6100 IO XRI exchange busy " 13475 "wait time: %d seconds.\n", 13476 wait_time/1000); 13477 if (!els_xri_cmpl) 13478 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13479 "2878 ELS XRI exchange busy " 13480 "wait time: %d seconds.\n", 13481 wait_time/1000); 13482 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); 13483 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; 13484 } else { 13485 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); 13486 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; 13487 } 13488 13489 ccnt = 0; 13490 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13491 qp = &phba->sli4_hba.hdwq[idx]; 13492 io_xri_cmpl = list_empty( 13493 &qp->lpfc_abts_io_buf_list); 13494 if (!io_xri_cmpl) /* if list is NOT empty */ 13495 ccnt++; 13496 } 13497 if (ccnt) 13498 io_xri_cmpl = 0; 13499 13500 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13501 nvmet_xri_cmpl = list_empty( 13502 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13503 } 13504 els_xri_cmpl = 13505 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13506 13507 } 13508 } 13509 13510 /** 13511 * lpfc_sli4_hba_unset - Unset the fcoe hba 13512 * @phba: Pointer to HBA context object. 13513 * 13514 * This function is called in the SLI4 code path to reset the HBA's FCoE 13515 * function. The caller is not required to hold any lock. This routine 13516 * issues PCI function reset mailbox command to reset the FCoE function. 13517 * At the end of the function, it calls lpfc_hba_down_post function to 13518 * free any pending commands. 13519 **/ 13520 static void 13521 lpfc_sli4_hba_unset(struct lpfc_hba *phba) 13522 { 13523 int wait_cnt = 0; 13524 LPFC_MBOXQ_t *mboxq; 13525 struct pci_dev *pdev = phba->pcidev; 13526 13527 lpfc_stop_hba_timers(phba); 13528 hrtimer_cancel(&phba->cmf_timer); 13529 13530 if (phba->pport) 13531 phba->sli4_hba.intr_enable = 0; 13532 13533 /* 13534 * Gracefully wait out the potential current outstanding asynchronous 13535 * mailbox command. 13536 */ 13537 13538 /* First, block any pending async mailbox command from posted */ 13539 spin_lock_irq(&phba->hbalock); 13540 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; 13541 spin_unlock_irq(&phba->hbalock); 13542 /* Now, trying to wait it out if we can */ 13543 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13544 msleep(10); 13545 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) 13546 break; 13547 } 13548 /* Forcefully release the outstanding mailbox command if timed out */ 13549 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13550 spin_lock_irq(&phba->hbalock); 13551 mboxq = phba->sli.mbox_active; 13552 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 13553 __lpfc_mbox_cmpl_put(phba, mboxq); 13554 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 13555 phba->sli.mbox_active = NULL; 13556 spin_unlock_irq(&phba->hbalock); 13557 } 13558 13559 /* Abort all iocbs associated with the hba */ 13560 lpfc_sli_hba_iocb_abort(phba); 13561 13562 if (!pci_channel_offline(phba->pcidev)) 13563 /* Wait for completion of device XRI exchange busy */ 13564 lpfc_sli4_xri_exchange_busy_wait(phba); 13565 13566 /* per-phba callback de-registration for hotplug event */ 13567 if (phba->pport) 13568 lpfc_cpuhp_remove(phba); 13569 13570 /* Disable PCI subsystem interrupt */ 13571 lpfc_sli4_disable_intr(phba); 13572 13573 /* Disable SR-IOV if enabled */ 13574 if (phba->cfg_sriov_nr_virtfn) 13575 pci_disable_sriov(pdev); 13576 13577 /* Stop kthread signal shall trigger work_done one more time */ 13578 kthread_stop(phba->worker_thread); 13579 13580 /* Disable FW logging to host memory */ 13581 lpfc_ras_stop_fwlog(phba); 13582 13583 /* Reset SLI4 HBA FCoE function */ 13584 lpfc_pci_function_reset(phba); 13585 13586 /* release all queue allocated resources. */ 13587 lpfc_sli4_queue_destroy(phba); 13588 13589 /* Free RAS DMA memory */ 13590 if (phba->ras_fwlog.ras_enabled) 13591 lpfc_sli4_ras_dma_free(phba); 13592 13593 /* Stop the SLI4 device port */ 13594 if (phba->pport) 13595 phba->pport->work_port_events = 0; 13596 } 13597 13598 static uint32_t 13599 lpfc_cgn_crc32(uint32_t crc, u8 byte) 13600 { 13601 uint32_t msb = 0; 13602 uint32_t bit; 13603 13604 for (bit = 0; bit < 8; bit++) { 13605 msb = (crc >> 31) & 1; 13606 crc <<= 1; 13607 13608 if (msb ^ (byte & 1)) { 13609 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER; 13610 crc |= 1; 13611 } 13612 byte >>= 1; 13613 } 13614 return crc; 13615 } 13616 13617 static uint32_t 13618 lpfc_cgn_reverse_bits(uint32_t wd) 13619 { 13620 uint32_t result = 0; 13621 uint32_t i; 13622 13623 for (i = 0; i < 32; i++) { 13624 result <<= 1; 13625 result |= (1 & (wd >> i)); 13626 } 13627 return result; 13628 } 13629 13630 /* 13631 * The routine corresponds with the algorithm the HBA firmware 13632 * uses to validate the data integrity. 13633 */ 13634 uint32_t 13635 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc) 13636 { 13637 uint32_t i; 13638 uint32_t result; 13639 uint8_t *data = (uint8_t *)ptr; 13640 13641 for (i = 0; i < byteLen; ++i) 13642 crc = lpfc_cgn_crc32(crc, data[i]); 13643 13644 result = ~lpfc_cgn_reverse_bits(crc); 13645 return result; 13646 } 13647 13648 void 13649 lpfc_init_congestion_buf(struct lpfc_hba *phba) 13650 { 13651 struct lpfc_cgn_info *cp; 13652 struct timespec64 cmpl_time; 13653 struct tm broken; 13654 uint16_t size; 13655 uint32_t crc; 13656 13657 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13658 "6235 INIT Congestion Buffer %p\n", phba->cgn_i); 13659 13660 if (!phba->cgn_i) 13661 return; 13662 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13663 13664 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 13665 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 13666 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 13667 atomic_set(&phba->cgn_sync_warn_cnt, 0); 13668 13669 atomic_set(&phba->cgn_driver_evt_cnt, 0); 13670 atomic_set(&phba->cgn_latency_evt_cnt, 0); 13671 atomic64_set(&phba->cgn_latency_evt, 0); 13672 phba->cgn_evt_minute = 0; 13673 phba->hba_flag &= ~HBA_CGN_DAY_WRAP; 13674 13675 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat)); 13676 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ); 13677 cp->cgn_info_version = LPFC_CGN_INFO_V3; 13678 13679 /* cgn parameters */ 13680 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 13681 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 13682 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 13683 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 13684 13685 ktime_get_real_ts64(&cmpl_time); 13686 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13687 13688 cp->cgn_info_month = broken.tm_mon + 1; 13689 cp->cgn_info_day = broken.tm_mday; 13690 cp->cgn_info_year = broken.tm_year - 100; /* relative to 2000 */ 13691 cp->cgn_info_hour = broken.tm_hour; 13692 cp->cgn_info_minute = broken.tm_min; 13693 cp->cgn_info_second = broken.tm_sec; 13694 13695 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13696 "2643 CGNInfo Init: Start Time " 13697 "%d/%d/%d %d:%d:%d\n", 13698 cp->cgn_info_day, cp->cgn_info_month, 13699 cp->cgn_info_year, cp->cgn_info_hour, 13700 cp->cgn_info_minute, cp->cgn_info_second); 13701 13702 /* Fill in default LUN qdepth */ 13703 if (phba->pport) { 13704 size = (uint16_t)(phba->pport->cfg_lun_queue_depth); 13705 cp->cgn_lunq = cpu_to_le16(size); 13706 } 13707 13708 /* last used Index initialized to 0xff already */ 13709 13710 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13711 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13712 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13713 cp->cgn_info_crc = cpu_to_le32(crc); 13714 13715 phba->cgn_evt_timestamp = jiffies + 13716 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 13717 } 13718 13719 void 13720 lpfc_init_congestion_stat(struct lpfc_hba *phba) 13721 { 13722 struct lpfc_cgn_info *cp; 13723 struct timespec64 cmpl_time; 13724 struct tm broken; 13725 uint32_t crc; 13726 13727 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13728 "6236 INIT Congestion Stat %p\n", phba->cgn_i); 13729 13730 if (!phba->cgn_i) 13731 return; 13732 13733 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13734 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat)); 13735 13736 ktime_get_real_ts64(&cmpl_time); 13737 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13738 13739 cp->cgn_stat_month = broken.tm_mon + 1; 13740 cp->cgn_stat_day = broken.tm_mday; 13741 cp->cgn_stat_year = broken.tm_year - 100; /* relative to 2000 */ 13742 cp->cgn_stat_hour = broken.tm_hour; 13743 cp->cgn_stat_minute = broken.tm_min; 13744 13745 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13746 "2647 CGNstat Init: Start Time " 13747 "%d/%d/%d %d:%d\n", 13748 cp->cgn_stat_day, cp->cgn_stat_month, 13749 cp->cgn_stat_year, cp->cgn_stat_hour, 13750 cp->cgn_stat_minute); 13751 13752 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13753 cp->cgn_info_crc = cpu_to_le32(crc); 13754 } 13755 13756 /** 13757 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA 13758 * @phba: Pointer to hba context object. 13759 * @reg: flag to determine register or unregister. 13760 */ 13761 static int 13762 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg) 13763 { 13764 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf; 13765 union lpfc_sli4_cfg_shdr *shdr; 13766 uint32_t shdr_status, shdr_add_status; 13767 LPFC_MBOXQ_t *mboxq; 13768 int length, rc; 13769 13770 if (!phba->cgn_i) 13771 return -ENXIO; 13772 13773 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 13774 if (!mboxq) { 13775 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, 13776 "2641 REG_CONGESTION_BUF mbox allocation fail: " 13777 "HBA state x%x reg %d\n", 13778 phba->pport->port_state, reg); 13779 return -ENOMEM; 13780 } 13781 13782 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) - 13783 sizeof(struct lpfc_sli4_cfg_mhdr)); 13784 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13785 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length, 13786 LPFC_SLI4_MBX_EMBED); 13787 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf; 13788 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1); 13789 if (reg > 0) 13790 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1); 13791 else 13792 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0); 13793 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info); 13794 reg_congestion_buf->addr_lo = 13795 putPaddrLow(phba->cgn_i->phys); 13796 reg_congestion_buf->addr_hi = 13797 putPaddrHigh(phba->cgn_i->phys); 13798 13799 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13800 shdr = (union lpfc_sli4_cfg_shdr *) 13801 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 13802 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 13803 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 13804 &shdr->response); 13805 mempool_free(mboxq, phba->mbox_mem_pool); 13806 if (shdr_status || shdr_add_status || rc) { 13807 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13808 "2642 REG_CONGESTION_BUF mailbox " 13809 "failed with status x%x add_status x%x," 13810 " mbx status x%x reg %d\n", 13811 shdr_status, shdr_add_status, rc, reg); 13812 return -ENXIO; 13813 } 13814 return 0; 13815 } 13816 13817 int 13818 lpfc_unreg_congestion_buf(struct lpfc_hba *phba) 13819 { 13820 lpfc_cmf_stop(phba); 13821 return __lpfc_reg_congestion_buf(phba, 0); 13822 } 13823 13824 int 13825 lpfc_reg_congestion_buf(struct lpfc_hba *phba) 13826 { 13827 return __lpfc_reg_congestion_buf(phba, 1); 13828 } 13829 13830 /** 13831 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. 13832 * @phba: Pointer to HBA context object. 13833 * @mboxq: Pointer to the mailboxq memory for the mailbox command response. 13834 * 13835 * This function is called in the SLI4 code path to read the port's 13836 * sli4 capabilities. 13837 * 13838 * This function may be be called from any context that can block-wait 13839 * for the completion. The expectation is that this routine is called 13840 * typically from probe_one or from the online routine. 13841 **/ 13842 int 13843 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) 13844 { 13845 int rc; 13846 struct lpfc_mqe *mqe = &mboxq->u.mqe; 13847 struct lpfc_pc_sli4_params *sli4_params; 13848 uint32_t mbox_tmo; 13849 int length; 13850 bool exp_wqcq_pages = true; 13851 struct lpfc_sli4_parameters *mbx_sli4_parameters; 13852 13853 /* 13854 * By default, the driver assumes the SLI4 port requires RPI 13855 * header postings. The SLI4_PARAM response will correct this 13856 * assumption. 13857 */ 13858 phba->sli4_hba.rpi_hdrs_in_use = 1; 13859 13860 /* Read the port's SLI4 Config Parameters */ 13861 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 13862 sizeof(struct lpfc_sli4_cfg_mhdr)); 13863 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13864 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 13865 length, LPFC_SLI4_MBX_EMBED); 13866 if (!phba->sli4_hba.intr_enable) 13867 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13868 else { 13869 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); 13870 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); 13871 } 13872 if (unlikely(rc)) 13873 return rc; 13874 sli4_params = &phba->sli4_hba.pc_sli4_params; 13875 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 13876 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); 13877 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); 13878 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); 13879 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, 13880 mbx_sli4_parameters); 13881 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, 13882 mbx_sli4_parameters); 13883 if (bf_get(cfg_phwq, mbx_sli4_parameters)) 13884 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; 13885 else 13886 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; 13887 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; 13888 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope, 13889 mbx_sli4_parameters); 13890 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); 13891 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); 13892 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); 13893 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); 13894 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); 13895 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); 13896 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); 13897 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); 13898 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); 13899 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); 13900 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, 13901 mbx_sli4_parameters); 13902 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); 13903 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, 13904 mbx_sli4_parameters); 13905 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); 13906 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); 13907 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); 13908 13909 /* Check for Extended Pre-Registered SGL support */ 13910 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); 13911 13912 /* Check for firmware nvme support */ 13913 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && 13914 bf_get(cfg_xib, mbx_sli4_parameters)); 13915 13916 if (rc) { 13917 /* Save this to indicate the Firmware supports NVME */ 13918 sli4_params->nvme = 1; 13919 13920 /* Firmware NVME support, check driver FC4 NVME support */ 13921 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { 13922 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13923 "6133 Disabling NVME support: " 13924 "FC4 type not supported: x%x\n", 13925 phba->cfg_enable_fc4_type); 13926 goto fcponly; 13927 } 13928 } else { 13929 /* No firmware NVME support, check driver FC4 NVME support */ 13930 sli4_params->nvme = 0; 13931 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13932 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, 13933 "6101 Disabling NVME support: Not " 13934 "supported by firmware (%d %d) x%x\n", 13935 bf_get(cfg_nvme, mbx_sli4_parameters), 13936 bf_get(cfg_xib, mbx_sli4_parameters), 13937 phba->cfg_enable_fc4_type); 13938 fcponly: 13939 phba->nvmet_support = 0; 13940 phba->cfg_nvmet_mrq = 0; 13941 phba->cfg_nvme_seg_cnt = 0; 13942 13943 /* If no FC4 type support, move to just SCSI support */ 13944 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 13945 return -ENODEV; 13946 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; 13947 } 13948 } 13949 13950 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 13951 * accommodate 512K and 1M IOs in a single nvme buf. 13952 */ 13953 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13954 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 13955 13956 /* Enable embedded Payload BDE if support is indicated */ 13957 if (bf_get(cfg_pbde, mbx_sli4_parameters)) 13958 phba->cfg_enable_pbde = 1; 13959 else 13960 phba->cfg_enable_pbde = 0; 13961 13962 /* 13963 * To support Suppress Response feature we must satisfy 3 conditions. 13964 * lpfc_suppress_rsp module parameter must be set (default). 13965 * In SLI4-Parameters Descriptor: 13966 * Extended Inline Buffers (XIB) must be supported. 13967 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported 13968 * (double negative). 13969 */ 13970 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && 13971 !(bf_get(cfg_nosr, mbx_sli4_parameters))) 13972 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; 13973 else 13974 phba->cfg_suppress_rsp = 0; 13975 13976 if (bf_get(cfg_eqdr, mbx_sli4_parameters)) 13977 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; 13978 13979 /* Make sure that sge_supp_len can be handled by the driver */ 13980 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) 13981 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; 13982 13983 rc = dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len); 13984 if (unlikely(rc)) { 13985 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13986 "6400 Can't set dma maximum segment size\n"); 13987 return rc; 13988 } 13989 13990 /* 13991 * Check whether the adapter supports an embedded copy of the 13992 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order 13993 * to use this option, 128-byte WQEs must be used. 13994 */ 13995 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) 13996 phba->fcp_embed_io = 1; 13997 else 13998 phba->fcp_embed_io = 0; 13999 14000 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 14001 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", 14002 bf_get(cfg_xib, mbx_sli4_parameters), 14003 phba->cfg_enable_pbde, 14004 phba->fcp_embed_io, sli4_params->nvme, 14005 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); 14006 14007 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 14008 LPFC_SLI_INTF_IF_TYPE_2) && 14009 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 14010 LPFC_SLI_INTF_FAMILY_LNCR_A0)) 14011 exp_wqcq_pages = false; 14012 14013 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && 14014 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && 14015 exp_wqcq_pages && 14016 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) 14017 phba->enab_exp_wqcq_pages = 1; 14018 else 14019 phba->enab_exp_wqcq_pages = 0; 14020 /* 14021 * Check if the SLI port supports MDS Diagnostics 14022 */ 14023 if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) 14024 phba->mds_diags_support = 1; 14025 else 14026 phba->mds_diags_support = 0; 14027 14028 /* 14029 * Check if the SLI port supports NSLER 14030 */ 14031 if (bf_get(cfg_nsler, mbx_sli4_parameters)) 14032 phba->nsler = 1; 14033 else 14034 phba->nsler = 0; 14035 14036 return 0; 14037 } 14038 14039 /** 14040 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 14041 * @pdev: pointer to PCI device 14042 * @pid: pointer to PCI device identifier 14043 * 14044 * This routine is to be called to attach a device with SLI-3 interface spec 14045 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14046 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14047 * information of the device and driver to see if the driver state that it can 14048 * support this kind of device. If the match is successful, the driver core 14049 * invokes this routine. If this routine determines it can claim the HBA, it 14050 * does all the initialization that it needs to do to handle the HBA properly. 14051 * 14052 * Return code 14053 * 0 - driver can claim the device 14054 * negative value - driver can not claim the device 14055 **/ 14056 static int 14057 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) 14058 { 14059 struct lpfc_hba *phba; 14060 struct lpfc_vport *vport = NULL; 14061 struct Scsi_Host *shost = NULL; 14062 int error; 14063 uint32_t cfg_mode, intr_mode; 14064 14065 /* Allocate memory for HBA structure */ 14066 phba = lpfc_hba_alloc(pdev); 14067 if (!phba) 14068 return -ENOMEM; 14069 14070 /* Perform generic PCI device enabling operation */ 14071 error = lpfc_enable_pci_dev(phba); 14072 if (error) 14073 goto out_free_phba; 14074 14075 /* Set up SLI API function jump table for PCI-device group-0 HBAs */ 14076 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); 14077 if (error) 14078 goto out_disable_pci_dev; 14079 14080 /* Set up SLI-3 specific device PCI memory space */ 14081 error = lpfc_sli_pci_mem_setup(phba); 14082 if (error) { 14083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14084 "1402 Failed to set up pci memory space.\n"); 14085 goto out_disable_pci_dev; 14086 } 14087 14088 /* Set up SLI-3 specific device driver resources */ 14089 error = lpfc_sli_driver_resource_setup(phba); 14090 if (error) { 14091 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14092 "1404 Failed to set up driver resource.\n"); 14093 goto out_unset_pci_mem_s3; 14094 } 14095 14096 /* Initialize and populate the iocb list per host */ 14097 14098 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); 14099 if (error) { 14100 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14101 "1405 Failed to initialize iocb list.\n"); 14102 goto out_unset_driver_resource_s3; 14103 } 14104 14105 /* Set up common device driver resources */ 14106 error = lpfc_setup_driver_resource_phase2(phba); 14107 if (error) { 14108 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14109 "1406 Failed to set up driver resource.\n"); 14110 goto out_free_iocb_list; 14111 } 14112 14113 /* Get the default values for Model Name and Description */ 14114 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14115 14116 /* Create SCSI host to the physical port */ 14117 error = lpfc_create_shost(phba); 14118 if (error) { 14119 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14120 "1407 Failed to create scsi host.\n"); 14121 goto out_unset_driver_resource; 14122 } 14123 14124 /* Configure sysfs attributes */ 14125 vport = phba->pport; 14126 error = lpfc_alloc_sysfs_attr(vport); 14127 if (error) { 14128 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14129 "1476 Failed to allocate sysfs attr\n"); 14130 goto out_destroy_shost; 14131 } 14132 14133 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14134 /* Now, trying to enable interrupt and bring up the device */ 14135 cfg_mode = phba->cfg_use_msi; 14136 while (true) { 14137 /* Put device to a known state before enabling interrupt */ 14138 lpfc_stop_port(phba); 14139 /* Configure and enable interrupt */ 14140 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); 14141 if (intr_mode == LPFC_INTR_ERROR) { 14142 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14143 "0431 Failed to enable interrupt.\n"); 14144 error = -ENODEV; 14145 goto out_free_sysfs_attr; 14146 } 14147 /* SLI-3 HBA setup */ 14148 if (lpfc_sli_hba_setup(phba)) { 14149 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14150 "1477 Failed to set up hba\n"); 14151 error = -ENODEV; 14152 goto out_remove_device; 14153 } 14154 14155 /* Wait 50ms for the interrupts of previous mailbox commands */ 14156 msleep(50); 14157 /* Check active interrupts on message signaled interrupts */ 14158 if (intr_mode == 0 || 14159 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { 14160 /* Log the current active interrupt mode */ 14161 phba->intr_mode = intr_mode; 14162 lpfc_log_intr_mode(phba, intr_mode); 14163 break; 14164 } else { 14165 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14166 "0447 Configure interrupt mode (%d) " 14167 "failed active interrupt test.\n", 14168 intr_mode); 14169 /* Disable the current interrupt mode */ 14170 lpfc_sli_disable_intr(phba); 14171 /* Try next level of interrupt mode */ 14172 cfg_mode = --intr_mode; 14173 } 14174 } 14175 14176 /* Perform post initialization setup */ 14177 lpfc_post_init_setup(phba); 14178 14179 /* Check if there are static vports to be created. */ 14180 lpfc_create_static_vport(phba); 14181 14182 return 0; 14183 14184 out_remove_device: 14185 lpfc_unset_hba(phba); 14186 out_free_sysfs_attr: 14187 lpfc_free_sysfs_attr(vport); 14188 out_destroy_shost: 14189 lpfc_destroy_shost(phba); 14190 out_unset_driver_resource: 14191 lpfc_unset_driver_resource_phase2(phba); 14192 out_free_iocb_list: 14193 lpfc_free_iocb_list(phba); 14194 out_unset_driver_resource_s3: 14195 lpfc_sli_driver_resource_unset(phba); 14196 out_unset_pci_mem_s3: 14197 lpfc_sli_pci_mem_unset(phba); 14198 out_disable_pci_dev: 14199 lpfc_disable_pci_dev(phba); 14200 if (shost) 14201 scsi_host_put(shost); 14202 out_free_phba: 14203 lpfc_hba_free(phba); 14204 return error; 14205 } 14206 14207 /** 14208 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. 14209 * @pdev: pointer to PCI device 14210 * 14211 * This routine is to be called to disattach a device with SLI-3 interface 14212 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14213 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14214 * device to be removed from the PCI subsystem properly. 14215 **/ 14216 static void 14217 lpfc_pci_remove_one_s3(struct pci_dev *pdev) 14218 { 14219 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14220 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14221 struct lpfc_vport **vports; 14222 struct lpfc_hba *phba = vport->phba; 14223 int i; 14224 14225 spin_lock_irq(&phba->hbalock); 14226 vport->load_flag |= FC_UNLOADING; 14227 spin_unlock_irq(&phba->hbalock); 14228 14229 lpfc_free_sysfs_attr(vport); 14230 14231 /* Release all the vports against this physical port */ 14232 vports = lpfc_create_vport_work_array(phba); 14233 if (vports != NULL) 14234 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 14235 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 14236 continue; 14237 fc_vport_terminate(vports[i]->fc_vport); 14238 } 14239 lpfc_destroy_vport_work_array(phba, vports); 14240 14241 /* Remove FC host with the physical port */ 14242 fc_remove_host(shost); 14243 scsi_remove_host(shost); 14244 14245 /* Clean up all nodes, mailboxes and IOs. */ 14246 lpfc_cleanup(vport); 14247 14248 /* 14249 * Bring down the SLI Layer. This step disable all interrupts, 14250 * clears the rings, discards all mailbox commands, and resets 14251 * the HBA. 14252 */ 14253 14254 /* HBA interrupt will be disabled after this call */ 14255 lpfc_sli_hba_down(phba); 14256 /* Stop kthread signal shall trigger work_done one more time */ 14257 kthread_stop(phba->worker_thread); 14258 /* Final cleanup of txcmplq and reset the HBA */ 14259 lpfc_sli_brdrestart(phba); 14260 14261 kfree(phba->vpi_bmask); 14262 kfree(phba->vpi_ids); 14263 14264 lpfc_stop_hba_timers(phba); 14265 spin_lock_irq(&phba->port_list_lock); 14266 list_del_init(&vport->listentry); 14267 spin_unlock_irq(&phba->port_list_lock); 14268 14269 lpfc_debugfs_terminate(vport); 14270 14271 /* Disable SR-IOV if enabled */ 14272 if (phba->cfg_sriov_nr_virtfn) 14273 pci_disable_sriov(pdev); 14274 14275 /* Disable interrupt */ 14276 lpfc_sli_disable_intr(phba); 14277 14278 scsi_host_put(shost); 14279 14280 /* 14281 * Call scsi_free before mem_free since scsi bufs are released to their 14282 * corresponding pools here. 14283 */ 14284 lpfc_scsi_free(phba); 14285 lpfc_free_iocb_list(phba); 14286 14287 lpfc_mem_free_all(phba); 14288 14289 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 14290 phba->hbqslimp.virt, phba->hbqslimp.phys); 14291 14292 /* Free resources associated with SLI2 interface */ 14293 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 14294 phba->slim2p.virt, phba->slim2p.phys); 14295 14296 /* unmap adapter SLIM and Control Registers */ 14297 iounmap(phba->ctrl_regs_memmap_p); 14298 iounmap(phba->slim_memmap_p); 14299 14300 lpfc_hba_free(phba); 14301 14302 pci_release_mem_regions(pdev); 14303 pci_disable_device(pdev); 14304 } 14305 14306 /** 14307 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt 14308 * @dev_d: pointer to device 14309 * 14310 * This routine is to be called from the kernel's PCI subsystem to support 14311 * system Power Management (PM) to device with SLI-3 interface spec. When 14312 * PM invokes this method, it quiesces the device by stopping the driver's 14313 * worker thread for the device, turning off device's interrupt and DMA, 14314 * and bring the device offline. Note that as the driver implements the 14315 * minimum PM requirements to a power-aware driver's PM support for the 14316 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 14317 * to the suspend() method call will be treated as SUSPEND and the driver will 14318 * fully reinitialize its device during resume() method call, the driver will 14319 * set device to PCI_D3hot state in PCI config space instead of setting it 14320 * according to the @msg provided by the PM. 14321 * 14322 * Return code 14323 * 0 - driver suspended the device 14324 * Error otherwise 14325 **/ 14326 static int __maybe_unused 14327 lpfc_pci_suspend_one_s3(struct device *dev_d) 14328 { 14329 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14330 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14331 14332 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14333 "0473 PCI device Power Management suspend.\n"); 14334 14335 /* Bring down the device */ 14336 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14337 lpfc_offline(phba); 14338 kthread_stop(phba->worker_thread); 14339 14340 /* Disable interrupt from device */ 14341 lpfc_sli_disable_intr(phba); 14342 14343 return 0; 14344 } 14345 14346 /** 14347 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt 14348 * @dev_d: pointer to device 14349 * 14350 * This routine is to be called from the kernel's PCI subsystem to support 14351 * system Power Management (PM) to device with SLI-3 interface spec. When PM 14352 * invokes this method, it restores the device's PCI config space state and 14353 * fully reinitializes the device and brings it online. Note that as the 14354 * driver implements the minimum PM requirements to a power-aware driver's 14355 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, 14356 * FREEZE) to the suspend() method call will be treated as SUSPEND and the 14357 * driver will fully reinitialize its device during resume() method call, 14358 * the device will be set to PCI_D0 directly in PCI config space before 14359 * restoring the state. 14360 * 14361 * Return code 14362 * 0 - driver suspended the device 14363 * Error otherwise 14364 **/ 14365 static int __maybe_unused 14366 lpfc_pci_resume_one_s3(struct device *dev_d) 14367 { 14368 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14369 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14370 uint32_t intr_mode; 14371 int error; 14372 14373 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14374 "0452 PCI device Power Management resume.\n"); 14375 14376 /* Startup the kernel thread for this host adapter. */ 14377 phba->worker_thread = kthread_run(lpfc_do_work, phba, 14378 "lpfc_worker_%d", phba->brd_no); 14379 if (IS_ERR(phba->worker_thread)) { 14380 error = PTR_ERR(phba->worker_thread); 14381 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14382 "0434 PM resume failed to start worker " 14383 "thread: error=x%x.\n", error); 14384 return error; 14385 } 14386 14387 /* Init cpu_map array */ 14388 lpfc_cpu_map_array_init(phba); 14389 /* Init hba_eq_hdl array */ 14390 lpfc_hba_eq_hdl_array_init(phba); 14391 /* Configure and enable interrupt */ 14392 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14393 if (intr_mode == LPFC_INTR_ERROR) { 14394 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14395 "0430 PM resume Failed to enable interrupt\n"); 14396 return -EIO; 14397 } else 14398 phba->intr_mode = intr_mode; 14399 14400 /* Restart HBA and bring it online */ 14401 lpfc_sli_brdrestart(phba); 14402 lpfc_online(phba); 14403 14404 /* Log the current active interrupt mode */ 14405 lpfc_log_intr_mode(phba, phba->intr_mode); 14406 14407 return 0; 14408 } 14409 14410 /** 14411 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover 14412 * @phba: pointer to lpfc hba data structure. 14413 * 14414 * This routine is called to prepare the SLI3 device for PCI slot recover. It 14415 * aborts all the outstanding SCSI I/Os to the pci device. 14416 **/ 14417 static void 14418 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) 14419 { 14420 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14421 "2723 PCI channel I/O abort preparing for recovery\n"); 14422 14423 /* 14424 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 14425 * and let the SCSI mid-layer to retry them to recover. 14426 */ 14427 lpfc_sli_abort_fcp_rings(phba); 14428 } 14429 14430 /** 14431 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset 14432 * @phba: pointer to lpfc hba data structure. 14433 * 14434 * This routine is called to prepare the SLI3 device for PCI slot reset. It 14435 * disables the device interrupt and pci device, and aborts the internal FCP 14436 * pending I/Os. 14437 **/ 14438 static void 14439 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) 14440 { 14441 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14442 "2710 PCI channel disable preparing for reset\n"); 14443 14444 /* Block any management I/Os to the device */ 14445 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 14446 14447 /* Block all SCSI devices' I/Os on the host */ 14448 lpfc_scsi_dev_block(phba); 14449 14450 /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 14451 lpfc_sli_flush_io_rings(phba); 14452 14453 /* stop all timers */ 14454 lpfc_stop_hba_timers(phba); 14455 14456 /* Disable interrupt and pci device */ 14457 lpfc_sli_disable_intr(phba); 14458 pci_disable_device(phba->pcidev); 14459 } 14460 14461 /** 14462 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable 14463 * @phba: pointer to lpfc hba data structure. 14464 * 14465 * This routine is called to prepare the SLI3 device for PCI slot permanently 14466 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 14467 * pending I/Os. 14468 **/ 14469 static void 14470 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) 14471 { 14472 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14473 "2711 PCI channel permanent disable for failure\n"); 14474 /* Block all SCSI devices' I/Os on the host */ 14475 lpfc_scsi_dev_block(phba); 14476 lpfc_sli4_prep_dev_for_reset(phba); 14477 14478 /* stop all timers */ 14479 lpfc_stop_hba_timers(phba); 14480 14481 /* Clean up all driver's outstanding SCSI I/Os */ 14482 lpfc_sli_flush_io_rings(phba); 14483 } 14484 14485 /** 14486 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error 14487 * @pdev: pointer to PCI device. 14488 * @state: the current PCI connection state. 14489 * 14490 * This routine is called from the PCI subsystem for I/O error handling to 14491 * device with SLI-3 interface spec. This function is called by the PCI 14492 * subsystem after a PCI bus error affecting this device has been detected. 14493 * When this function is invoked, it will need to stop all the I/Os and 14494 * interrupt(s) to the device. Once that is done, it will return 14495 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery 14496 * as desired. 14497 * 14498 * Return codes 14499 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link 14500 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 14501 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14502 **/ 14503 static pci_ers_result_t 14504 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) 14505 { 14506 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14507 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14508 14509 switch (state) { 14510 case pci_channel_io_normal: 14511 /* Non-fatal error, prepare for recovery */ 14512 lpfc_sli_prep_dev_for_recover(phba); 14513 return PCI_ERS_RESULT_CAN_RECOVER; 14514 case pci_channel_io_frozen: 14515 /* Fatal error, prepare for slot reset */ 14516 lpfc_sli_prep_dev_for_reset(phba); 14517 return PCI_ERS_RESULT_NEED_RESET; 14518 case pci_channel_io_perm_failure: 14519 /* Permanent failure, prepare for device down */ 14520 lpfc_sli_prep_dev_for_perm_failure(phba); 14521 return PCI_ERS_RESULT_DISCONNECT; 14522 default: 14523 /* Unknown state, prepare and request slot reset */ 14524 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14525 "0472 Unknown PCI error state: x%x\n", state); 14526 lpfc_sli_prep_dev_for_reset(phba); 14527 return PCI_ERS_RESULT_NEED_RESET; 14528 } 14529 } 14530 14531 /** 14532 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. 14533 * @pdev: pointer to PCI device. 14534 * 14535 * This routine is called from the PCI subsystem for error handling to 14536 * device with SLI-3 interface spec. This is called after PCI bus has been 14537 * reset to restart the PCI card from scratch, as if from a cold-boot. 14538 * During the PCI subsystem error recovery, after driver returns 14539 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 14540 * recovery and then call this routine before calling the .resume method 14541 * to recover the device. This function will initialize the HBA device, 14542 * enable the interrupt, but it will just put the HBA to offline state 14543 * without passing any I/O traffic. 14544 * 14545 * Return codes 14546 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 14547 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14548 */ 14549 static pci_ers_result_t 14550 lpfc_io_slot_reset_s3(struct pci_dev *pdev) 14551 { 14552 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14553 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14554 struct lpfc_sli *psli = &phba->sli; 14555 uint32_t intr_mode; 14556 14557 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 14558 if (pci_enable_device_mem(pdev)) { 14559 printk(KERN_ERR "lpfc: Cannot re-enable " 14560 "PCI device after reset.\n"); 14561 return PCI_ERS_RESULT_DISCONNECT; 14562 } 14563 14564 pci_restore_state(pdev); 14565 14566 /* 14567 * As the new kernel behavior of pci_restore_state() API call clears 14568 * device saved_state flag, need to save the restored state again. 14569 */ 14570 pci_save_state(pdev); 14571 14572 if (pdev->is_busmaster) 14573 pci_set_master(pdev); 14574 14575 spin_lock_irq(&phba->hbalock); 14576 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 14577 spin_unlock_irq(&phba->hbalock); 14578 14579 /* Configure and enable interrupt */ 14580 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14581 if (intr_mode == LPFC_INTR_ERROR) { 14582 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14583 "0427 Cannot re-enable interrupt after " 14584 "slot reset.\n"); 14585 return PCI_ERS_RESULT_DISCONNECT; 14586 } else 14587 phba->intr_mode = intr_mode; 14588 14589 /* Take device offline, it will perform cleanup */ 14590 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14591 lpfc_offline(phba); 14592 lpfc_sli_brdrestart(phba); 14593 14594 /* Log the current active interrupt mode */ 14595 lpfc_log_intr_mode(phba, phba->intr_mode); 14596 14597 return PCI_ERS_RESULT_RECOVERED; 14598 } 14599 14600 /** 14601 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. 14602 * @pdev: pointer to PCI device 14603 * 14604 * This routine is called from the PCI subsystem for error handling to device 14605 * with SLI-3 interface spec. It is called when kernel error recovery tells 14606 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 14607 * error recovery. After this call, traffic can start to flow from this device 14608 * again. 14609 */ 14610 static void 14611 lpfc_io_resume_s3(struct pci_dev *pdev) 14612 { 14613 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14614 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14615 14616 /* Bring device online, it will be no-op for non-fatal error resume */ 14617 lpfc_online(phba); 14618 } 14619 14620 /** 14621 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve 14622 * @phba: pointer to lpfc hba data structure. 14623 * 14624 * returns the number of ELS/CT IOCBs to reserve 14625 **/ 14626 int 14627 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) 14628 { 14629 int max_xri = phba->sli4_hba.max_cfg_param.max_xri; 14630 14631 if (phba->sli_rev == LPFC_SLI_REV4) { 14632 if (max_xri <= 100) 14633 return 10; 14634 else if (max_xri <= 256) 14635 return 25; 14636 else if (max_xri <= 512) 14637 return 50; 14638 else if (max_xri <= 1024) 14639 return 100; 14640 else if (max_xri <= 1536) 14641 return 150; 14642 else if (max_xri <= 2048) 14643 return 200; 14644 else 14645 return 250; 14646 } else 14647 return 0; 14648 } 14649 14650 /** 14651 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve 14652 * @phba: pointer to lpfc hba data structure. 14653 * 14654 * returns the number of ELS/CT + NVMET IOCBs to reserve 14655 **/ 14656 int 14657 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) 14658 { 14659 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); 14660 14661 if (phba->nvmet_support) 14662 max_xri += LPFC_NVMET_BUF_POST; 14663 return max_xri; 14664 } 14665 14666 14667 static int 14668 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, 14669 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, 14670 const struct firmware *fw) 14671 { 14672 int rc; 14673 u8 sli_family; 14674 14675 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); 14676 /* Three cases: (1) FW was not supported on the detected adapter. 14677 * (2) FW update has been locked out administratively. 14678 * (3) Some other error during FW update. 14679 * In each case, an unmaskable message is written to the console 14680 * for admin diagnosis. 14681 */ 14682 if (offset == ADD_STATUS_FW_NOT_SUPPORTED || 14683 (sli_family == LPFC_SLI_INTF_FAMILY_G6 && 14684 magic_number != MAGIC_NUMBER_G6) || 14685 (sli_family == LPFC_SLI_INTF_FAMILY_G7 && 14686 magic_number != MAGIC_NUMBER_G7) || 14687 (sli_family == LPFC_SLI_INTF_FAMILY_G7P && 14688 magic_number != MAGIC_NUMBER_G7P)) { 14689 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14690 "3030 This firmware version is not supported on" 14691 " this HBA model. Device:%x Magic:%x Type:%x " 14692 "ID:%x Size %d %zd\n", 14693 phba->pcidev->device, magic_number, ftype, fid, 14694 fsize, fw->size); 14695 rc = -EINVAL; 14696 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { 14697 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14698 "3021 Firmware downloads have been prohibited " 14699 "by a system configuration setting on " 14700 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14701 "%zd\n", 14702 phba->pcidev->device, magic_number, ftype, fid, 14703 fsize, fw->size); 14704 rc = -EACCES; 14705 } else { 14706 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14707 "3022 FW Download failed. Add Status x%x " 14708 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14709 "%zd\n", 14710 offset, phba->pcidev->device, magic_number, 14711 ftype, fid, fsize, fw->size); 14712 rc = -EIO; 14713 } 14714 return rc; 14715 } 14716 14717 /** 14718 * lpfc_write_firmware - attempt to write a firmware image to the port 14719 * @fw: pointer to firmware image returned from request_firmware. 14720 * @context: pointer to firmware image returned from request_firmware. 14721 * 14722 **/ 14723 static void 14724 lpfc_write_firmware(const struct firmware *fw, void *context) 14725 { 14726 struct lpfc_hba *phba = (struct lpfc_hba *)context; 14727 char fwrev[FW_REV_STR_SIZE]; 14728 struct lpfc_grp_hdr *image; 14729 struct list_head dma_buffer_list; 14730 int i, rc = 0; 14731 struct lpfc_dmabuf *dmabuf, *next; 14732 uint32_t offset = 0, temp_offset = 0; 14733 uint32_t magic_number, ftype, fid, fsize; 14734 14735 /* It can be null in no-wait mode, sanity check */ 14736 if (!fw) { 14737 rc = -ENXIO; 14738 goto out; 14739 } 14740 image = (struct lpfc_grp_hdr *)fw->data; 14741 14742 magic_number = be32_to_cpu(image->magic_number); 14743 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); 14744 fid = bf_get_be32(lpfc_grp_hdr_id, image); 14745 fsize = be32_to_cpu(image->size); 14746 14747 INIT_LIST_HEAD(&dma_buffer_list); 14748 lpfc_decode_firmware_rev(phba, fwrev, 1); 14749 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { 14750 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14751 "3023 Updating Firmware, Current Version:%s " 14752 "New Version:%s\n", 14753 fwrev, image->revision); 14754 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { 14755 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), 14756 GFP_KERNEL); 14757 if (!dmabuf) { 14758 rc = -ENOMEM; 14759 goto release_out; 14760 } 14761 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 14762 SLI4_PAGE_SIZE, 14763 &dmabuf->phys, 14764 GFP_KERNEL); 14765 if (!dmabuf->virt) { 14766 kfree(dmabuf); 14767 rc = -ENOMEM; 14768 goto release_out; 14769 } 14770 list_add_tail(&dmabuf->list, &dma_buffer_list); 14771 } 14772 while (offset < fw->size) { 14773 temp_offset = offset; 14774 list_for_each_entry(dmabuf, &dma_buffer_list, list) { 14775 if (temp_offset + SLI4_PAGE_SIZE > fw->size) { 14776 memcpy(dmabuf->virt, 14777 fw->data + temp_offset, 14778 fw->size - temp_offset); 14779 temp_offset = fw->size; 14780 break; 14781 } 14782 memcpy(dmabuf->virt, fw->data + temp_offset, 14783 SLI4_PAGE_SIZE); 14784 temp_offset += SLI4_PAGE_SIZE; 14785 } 14786 rc = lpfc_wr_object(phba, &dma_buffer_list, 14787 (fw->size - offset), &offset); 14788 if (rc) { 14789 rc = lpfc_log_write_firmware_error(phba, offset, 14790 magic_number, 14791 ftype, 14792 fid, 14793 fsize, 14794 fw); 14795 goto release_out; 14796 } 14797 } 14798 rc = offset; 14799 } else 14800 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14801 "3029 Skipped Firmware update, Current " 14802 "Version:%s New Version:%s\n", 14803 fwrev, image->revision); 14804 14805 release_out: 14806 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { 14807 list_del(&dmabuf->list); 14808 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, 14809 dmabuf->virt, dmabuf->phys); 14810 kfree(dmabuf); 14811 } 14812 release_firmware(fw); 14813 out: 14814 if (rc < 0) 14815 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14816 "3062 Firmware update error, status %d.\n", rc); 14817 else 14818 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14819 "3024 Firmware update success: size %d.\n", rc); 14820 } 14821 14822 /** 14823 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade 14824 * @phba: pointer to lpfc hba data structure. 14825 * @fw_upgrade: which firmware to update. 14826 * 14827 * This routine is called to perform Linux generic firmware upgrade on device 14828 * that supports such feature. 14829 **/ 14830 int 14831 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) 14832 { 14833 uint8_t file_name[ELX_MODEL_NAME_SIZE]; 14834 int ret; 14835 const struct firmware *fw; 14836 14837 /* Only supported on SLI4 interface type 2 for now */ 14838 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 14839 LPFC_SLI_INTF_IF_TYPE_2) 14840 return -EPERM; 14841 14842 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); 14843 14844 if (fw_upgrade == INT_FW_UPGRADE) { 14845 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 14846 file_name, &phba->pcidev->dev, 14847 GFP_KERNEL, (void *)phba, 14848 lpfc_write_firmware); 14849 } else if (fw_upgrade == RUN_FW_UPGRADE) { 14850 ret = request_firmware(&fw, file_name, &phba->pcidev->dev); 14851 if (!ret) 14852 lpfc_write_firmware(fw, (void *)phba); 14853 } else { 14854 ret = -EINVAL; 14855 } 14856 14857 return ret; 14858 } 14859 14860 /** 14861 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys 14862 * @pdev: pointer to PCI device 14863 * @pid: pointer to PCI device identifier 14864 * 14865 * This routine is called from the kernel's PCI subsystem to device with 14866 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14867 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14868 * information of the device and driver to see if the driver state that it 14869 * can support this kind of device. If the match is successful, the driver 14870 * core invokes this routine. If this routine determines it can claim the HBA, 14871 * it does all the initialization that it needs to do to handle the HBA 14872 * properly. 14873 * 14874 * Return code 14875 * 0 - driver can claim the device 14876 * negative value - driver can not claim the device 14877 **/ 14878 static int 14879 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) 14880 { 14881 struct lpfc_hba *phba; 14882 struct lpfc_vport *vport = NULL; 14883 struct Scsi_Host *shost = NULL; 14884 int error; 14885 uint32_t cfg_mode, intr_mode; 14886 14887 /* Allocate memory for HBA structure */ 14888 phba = lpfc_hba_alloc(pdev); 14889 if (!phba) 14890 return -ENOMEM; 14891 14892 INIT_LIST_HEAD(&phba->poll_list); 14893 14894 /* Perform generic PCI device enabling operation */ 14895 error = lpfc_enable_pci_dev(phba); 14896 if (error) 14897 goto out_free_phba; 14898 14899 /* Set up SLI API function jump table for PCI-device group-1 HBAs */ 14900 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); 14901 if (error) 14902 goto out_disable_pci_dev; 14903 14904 /* Set up SLI-4 specific device PCI memory space */ 14905 error = lpfc_sli4_pci_mem_setup(phba); 14906 if (error) { 14907 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14908 "1410 Failed to set up pci memory space.\n"); 14909 goto out_disable_pci_dev; 14910 } 14911 14912 /* Set up SLI-4 Specific device driver resources */ 14913 error = lpfc_sli4_driver_resource_setup(phba); 14914 if (error) { 14915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14916 "1412 Failed to set up driver resource.\n"); 14917 goto out_unset_pci_mem_s4; 14918 } 14919 14920 INIT_LIST_HEAD(&phba->active_rrq_list); 14921 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); 14922 14923 /* Set up common device driver resources */ 14924 error = lpfc_setup_driver_resource_phase2(phba); 14925 if (error) { 14926 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14927 "1414 Failed to set up driver resource.\n"); 14928 goto out_unset_driver_resource_s4; 14929 } 14930 14931 /* Get the default values for Model Name and Description */ 14932 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14933 14934 /* Now, trying to enable interrupt and bring up the device */ 14935 cfg_mode = phba->cfg_use_msi; 14936 14937 /* Put device to a known state before enabling interrupt */ 14938 phba->pport = NULL; 14939 lpfc_stop_port(phba); 14940 14941 /* Init cpu_map array */ 14942 lpfc_cpu_map_array_init(phba); 14943 14944 /* Init hba_eq_hdl array */ 14945 lpfc_hba_eq_hdl_array_init(phba); 14946 14947 /* Configure and enable interrupt */ 14948 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); 14949 if (intr_mode == LPFC_INTR_ERROR) { 14950 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14951 "0426 Failed to enable interrupt.\n"); 14952 error = -ENODEV; 14953 goto out_unset_driver_resource; 14954 } 14955 /* Default to single EQ for non-MSI-X */ 14956 if (phba->intr_type != MSIX) { 14957 phba->cfg_irq_chann = 1; 14958 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14959 if (phba->nvmet_support) 14960 phba->cfg_nvmet_mrq = 1; 14961 } 14962 } 14963 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 14964 14965 /* Create SCSI host to the physical port */ 14966 error = lpfc_create_shost(phba); 14967 if (error) { 14968 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14969 "1415 Failed to create scsi host.\n"); 14970 goto out_disable_intr; 14971 } 14972 vport = phba->pport; 14973 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14974 14975 /* Configure sysfs attributes */ 14976 error = lpfc_alloc_sysfs_attr(vport); 14977 if (error) { 14978 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14979 "1416 Failed to allocate sysfs attr\n"); 14980 goto out_destroy_shost; 14981 } 14982 14983 /* Set up SLI-4 HBA */ 14984 if (lpfc_sli4_hba_setup(phba)) { 14985 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14986 "1421 Failed to set up hba\n"); 14987 error = -ENODEV; 14988 goto out_free_sysfs_attr; 14989 } 14990 14991 /* Log the current active interrupt mode */ 14992 phba->intr_mode = intr_mode; 14993 lpfc_log_intr_mode(phba, intr_mode); 14994 14995 /* Perform post initialization setup */ 14996 lpfc_post_init_setup(phba); 14997 14998 /* NVME support in FW earlier in the driver load corrects the 14999 * FC4 type making a check for nvme_support unnecessary. 15000 */ 15001 if (phba->nvmet_support == 0) { 15002 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 15003 /* Create NVME binding with nvme_fc_transport. This 15004 * ensures the vport is initialized. If the localport 15005 * create fails, it should not unload the driver to 15006 * support field issues. 15007 */ 15008 error = lpfc_nvme_create_localport(vport); 15009 if (error) { 15010 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15011 "6004 NVME registration " 15012 "failed, error x%x\n", 15013 error); 15014 } 15015 } 15016 } 15017 15018 /* check for firmware upgrade or downgrade */ 15019 if (phba->cfg_request_firmware_upgrade) 15020 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); 15021 15022 /* Check if there are static vports to be created. */ 15023 lpfc_create_static_vport(phba); 15024 15025 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); 15026 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); 15027 15028 return 0; 15029 15030 out_free_sysfs_attr: 15031 lpfc_free_sysfs_attr(vport); 15032 out_destroy_shost: 15033 lpfc_destroy_shost(phba); 15034 out_disable_intr: 15035 lpfc_sli4_disable_intr(phba); 15036 out_unset_driver_resource: 15037 lpfc_unset_driver_resource_phase2(phba); 15038 out_unset_driver_resource_s4: 15039 lpfc_sli4_driver_resource_unset(phba); 15040 out_unset_pci_mem_s4: 15041 lpfc_sli4_pci_mem_unset(phba); 15042 out_disable_pci_dev: 15043 lpfc_disable_pci_dev(phba); 15044 if (shost) 15045 scsi_host_put(shost); 15046 out_free_phba: 15047 lpfc_hba_free(phba); 15048 return error; 15049 } 15050 15051 /** 15052 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem 15053 * @pdev: pointer to PCI device 15054 * 15055 * This routine is called from the kernel's PCI subsystem to device with 15056 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 15057 * removed from PCI bus, it performs all the necessary cleanup for the HBA 15058 * device to be removed from the PCI subsystem properly. 15059 **/ 15060 static void 15061 lpfc_pci_remove_one_s4(struct pci_dev *pdev) 15062 { 15063 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15064 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 15065 struct lpfc_vport **vports; 15066 struct lpfc_hba *phba = vport->phba; 15067 int i; 15068 15069 /* Mark the device unloading flag */ 15070 spin_lock_irq(&phba->hbalock); 15071 vport->load_flag |= FC_UNLOADING; 15072 spin_unlock_irq(&phba->hbalock); 15073 if (phba->cgn_i) 15074 lpfc_unreg_congestion_buf(phba); 15075 15076 lpfc_free_sysfs_attr(vport); 15077 15078 /* Release all the vports against this physical port */ 15079 vports = lpfc_create_vport_work_array(phba); 15080 if (vports != NULL) 15081 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 15082 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 15083 continue; 15084 fc_vport_terminate(vports[i]->fc_vport); 15085 } 15086 lpfc_destroy_vport_work_array(phba, vports); 15087 15088 /* Remove FC host with the physical port */ 15089 fc_remove_host(shost); 15090 scsi_remove_host(shost); 15091 15092 /* Perform ndlp cleanup on the physical port. The nvme and nvmet 15093 * localports are destroyed after to cleanup all transport memory. 15094 */ 15095 lpfc_cleanup(vport); 15096 lpfc_nvmet_destroy_targetport(phba); 15097 lpfc_nvme_destroy_localport(vport); 15098 15099 /* De-allocate multi-XRI pools */ 15100 if (phba->cfg_xri_rebalancing) 15101 lpfc_destroy_multixri_pools(phba); 15102 15103 /* 15104 * Bring down the SLI Layer. This step disables all interrupts, 15105 * clears the rings, discards all mailbox commands, and resets 15106 * the HBA FCoE function. 15107 */ 15108 lpfc_debugfs_terminate(vport); 15109 15110 lpfc_stop_hba_timers(phba); 15111 spin_lock_irq(&phba->port_list_lock); 15112 list_del_init(&vport->listentry); 15113 spin_unlock_irq(&phba->port_list_lock); 15114 15115 /* Perform scsi free before driver resource_unset since scsi 15116 * buffers are released to their corresponding pools here. 15117 */ 15118 lpfc_io_free(phba); 15119 lpfc_free_iocb_list(phba); 15120 lpfc_sli4_hba_unset(phba); 15121 15122 lpfc_unset_driver_resource_phase2(phba); 15123 lpfc_sli4_driver_resource_unset(phba); 15124 15125 /* Unmap adapter Control and Doorbell registers */ 15126 lpfc_sli4_pci_mem_unset(phba); 15127 15128 /* Release PCI resources and disable device's PCI function */ 15129 scsi_host_put(shost); 15130 lpfc_disable_pci_dev(phba); 15131 15132 /* Finally, free the driver's device data structure */ 15133 lpfc_hba_free(phba); 15134 15135 return; 15136 } 15137 15138 /** 15139 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt 15140 * @dev_d: pointer to device 15141 * 15142 * This routine is called from the kernel's PCI subsystem to support system 15143 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes 15144 * this method, it quiesces the device by stopping the driver's worker 15145 * thread for the device, turning off device's interrupt and DMA, and bring 15146 * the device offline. Note that as the driver implements the minimum PM 15147 * requirements to a power-aware driver's PM support for suspend/resume -- all 15148 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() 15149 * method call will be treated as SUSPEND and the driver will fully 15150 * reinitialize its device during resume() method call, the driver will set 15151 * device to PCI_D3hot state in PCI config space instead of setting it 15152 * according to the @msg provided by the PM. 15153 * 15154 * Return code 15155 * 0 - driver suspended the device 15156 * Error otherwise 15157 **/ 15158 static int __maybe_unused 15159 lpfc_pci_suspend_one_s4(struct device *dev_d) 15160 { 15161 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15162 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15163 15164 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15165 "2843 PCI device Power Management suspend.\n"); 15166 15167 /* Bring down the device */ 15168 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 15169 lpfc_offline(phba); 15170 kthread_stop(phba->worker_thread); 15171 15172 /* Disable interrupt from device */ 15173 lpfc_sli4_disable_intr(phba); 15174 lpfc_sli4_queue_destroy(phba); 15175 15176 return 0; 15177 } 15178 15179 /** 15180 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt 15181 * @dev_d: pointer to device 15182 * 15183 * This routine is called from the kernel's PCI subsystem to support system 15184 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes 15185 * this method, it restores the device's PCI config space state and fully 15186 * reinitializes the device and brings it online. Note that as the driver 15187 * implements the minimum PM requirements to a power-aware driver's PM for 15188 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 15189 * to the suspend() method call will be treated as SUSPEND and the driver 15190 * will fully reinitialize its device during resume() method call, the device 15191 * will be set to PCI_D0 directly in PCI config space before restoring the 15192 * state. 15193 * 15194 * Return code 15195 * 0 - driver suspended the device 15196 * Error otherwise 15197 **/ 15198 static int __maybe_unused 15199 lpfc_pci_resume_one_s4(struct device *dev_d) 15200 { 15201 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15202 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15203 uint32_t intr_mode; 15204 int error; 15205 15206 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15207 "0292 PCI device Power Management resume.\n"); 15208 15209 /* Startup the kernel thread for this host adapter. */ 15210 phba->worker_thread = kthread_run(lpfc_do_work, phba, 15211 "lpfc_worker_%d", phba->brd_no); 15212 if (IS_ERR(phba->worker_thread)) { 15213 error = PTR_ERR(phba->worker_thread); 15214 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15215 "0293 PM resume failed to start worker " 15216 "thread: error=x%x.\n", error); 15217 return error; 15218 } 15219 15220 /* Configure and enable interrupt */ 15221 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15222 if (intr_mode == LPFC_INTR_ERROR) { 15223 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15224 "0294 PM resume Failed to enable interrupt\n"); 15225 return -EIO; 15226 } else 15227 phba->intr_mode = intr_mode; 15228 15229 /* Restart HBA and bring it online */ 15230 lpfc_sli_brdrestart(phba); 15231 lpfc_online(phba); 15232 15233 /* Log the current active interrupt mode */ 15234 lpfc_log_intr_mode(phba, phba->intr_mode); 15235 15236 return 0; 15237 } 15238 15239 /** 15240 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover 15241 * @phba: pointer to lpfc hba data structure. 15242 * 15243 * This routine is called to prepare the SLI4 device for PCI slot recover. It 15244 * aborts all the outstanding SCSI I/Os to the pci device. 15245 **/ 15246 static void 15247 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) 15248 { 15249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15250 "2828 PCI channel I/O abort preparing for recovery\n"); 15251 /* 15252 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 15253 * and let the SCSI mid-layer to retry them to recover. 15254 */ 15255 lpfc_sli_abort_fcp_rings(phba); 15256 } 15257 15258 /** 15259 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset 15260 * @phba: pointer to lpfc hba data structure. 15261 * 15262 * This routine is called to prepare the SLI4 device for PCI slot reset. It 15263 * disables the device interrupt and pci device, and aborts the internal FCP 15264 * pending I/Os. 15265 **/ 15266 static void 15267 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) 15268 { 15269 int offline = pci_channel_offline(phba->pcidev); 15270 15271 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15272 "2826 PCI channel disable preparing for reset offline" 15273 " %d\n", offline); 15274 15275 /* Block any management I/Os to the device */ 15276 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); 15277 15278 15279 /* HBA_PCI_ERR was set in io_error_detect */ 15280 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 15281 /* Flush all driver's outstanding I/Os as we are to reset */ 15282 lpfc_sli_flush_io_rings(phba); 15283 lpfc_offline(phba); 15284 15285 /* stop all timers */ 15286 lpfc_stop_hba_timers(phba); 15287 15288 lpfc_sli4_queue_destroy(phba); 15289 /* Disable interrupt and pci device */ 15290 lpfc_sli4_disable_intr(phba); 15291 pci_disable_device(phba->pcidev); 15292 } 15293 15294 /** 15295 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable 15296 * @phba: pointer to lpfc hba data structure. 15297 * 15298 * This routine is called to prepare the SLI4 device for PCI slot permanently 15299 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 15300 * pending I/Os. 15301 **/ 15302 static void 15303 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) 15304 { 15305 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15306 "2827 PCI channel permanent disable for failure\n"); 15307 15308 /* Block all SCSI devices' I/Os on the host */ 15309 lpfc_scsi_dev_block(phba); 15310 15311 /* stop all timers */ 15312 lpfc_stop_hba_timers(phba); 15313 15314 /* Clean up all driver's outstanding I/Os */ 15315 lpfc_sli_flush_io_rings(phba); 15316 } 15317 15318 /** 15319 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device 15320 * @pdev: pointer to PCI device. 15321 * @state: the current PCI connection state. 15322 * 15323 * This routine is called from the PCI subsystem for error handling to device 15324 * with SLI-4 interface spec. This function is called by the PCI subsystem 15325 * after a PCI bus error affecting this device has been detected. When this 15326 * function is invoked, it will need to stop all the I/Os and interrupt(s) 15327 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET 15328 * for the PCI subsystem to perform proper recovery as desired. 15329 * 15330 * Return codes 15331 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15332 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15333 **/ 15334 static pci_ers_result_t 15335 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) 15336 { 15337 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15338 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15339 bool hba_pci_err; 15340 15341 switch (state) { 15342 case pci_channel_io_normal: 15343 /* Non-fatal error, prepare for recovery */ 15344 lpfc_sli4_prep_dev_for_recover(phba); 15345 return PCI_ERS_RESULT_CAN_RECOVER; 15346 case pci_channel_io_frozen: 15347 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15348 /* Fatal error, prepare for slot reset */ 15349 if (!hba_pci_err) 15350 lpfc_sli4_prep_dev_for_reset(phba); 15351 else 15352 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15353 "2832 Already handling PCI error " 15354 "state: x%x\n", state); 15355 return PCI_ERS_RESULT_NEED_RESET; 15356 case pci_channel_io_perm_failure: 15357 set_bit(HBA_PCI_ERR, &phba->bit_flags); 15358 /* Permanent failure, prepare for device down */ 15359 lpfc_sli4_prep_dev_for_perm_failure(phba); 15360 return PCI_ERS_RESULT_DISCONNECT; 15361 default: 15362 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15363 if (!hba_pci_err) 15364 lpfc_sli4_prep_dev_for_reset(phba); 15365 /* Unknown state, prepare and request slot reset */ 15366 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15367 "2825 Unknown PCI error state: x%x\n", state); 15368 lpfc_sli4_prep_dev_for_reset(phba); 15369 return PCI_ERS_RESULT_NEED_RESET; 15370 } 15371 } 15372 15373 /** 15374 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch 15375 * @pdev: pointer to PCI device. 15376 * 15377 * This routine is called from the PCI subsystem for error handling to device 15378 * with SLI-4 interface spec. It is called after PCI bus has been reset to 15379 * restart the PCI card from scratch, as if from a cold-boot. During the 15380 * PCI subsystem error recovery, after the driver returns 15381 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 15382 * recovery and then call this routine before calling the .resume method to 15383 * recover the device. This function will initialize the HBA device, enable 15384 * the interrupt, but it will just put the HBA to offline state without 15385 * passing any I/O traffic. 15386 * 15387 * Return codes 15388 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15389 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15390 */ 15391 static pci_ers_result_t 15392 lpfc_io_slot_reset_s4(struct pci_dev *pdev) 15393 { 15394 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15395 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15396 struct lpfc_sli *psli = &phba->sli; 15397 uint32_t intr_mode; 15398 bool hba_pci_err; 15399 15400 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 15401 if (pci_enable_device_mem(pdev)) { 15402 printk(KERN_ERR "lpfc: Cannot re-enable " 15403 "PCI device after reset.\n"); 15404 return PCI_ERS_RESULT_DISCONNECT; 15405 } 15406 15407 pci_restore_state(pdev); 15408 15409 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags); 15410 if (!hba_pci_err) 15411 dev_info(&pdev->dev, 15412 "hba_pci_err was not set, recovering slot reset.\n"); 15413 /* 15414 * As the new kernel behavior of pci_restore_state() API call clears 15415 * device saved_state flag, need to save the restored state again. 15416 */ 15417 pci_save_state(pdev); 15418 15419 if (pdev->is_busmaster) 15420 pci_set_master(pdev); 15421 15422 spin_lock_irq(&phba->hbalock); 15423 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 15424 spin_unlock_irq(&phba->hbalock); 15425 15426 /* Init cpu_map array */ 15427 lpfc_cpu_map_array_init(phba); 15428 /* Configure and enable interrupt */ 15429 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15430 if (intr_mode == LPFC_INTR_ERROR) { 15431 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15432 "2824 Cannot re-enable interrupt after " 15433 "slot reset.\n"); 15434 return PCI_ERS_RESULT_DISCONNECT; 15435 } else 15436 phba->intr_mode = intr_mode; 15437 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 15438 15439 /* Log the current active interrupt mode */ 15440 lpfc_log_intr_mode(phba, phba->intr_mode); 15441 15442 return PCI_ERS_RESULT_RECOVERED; 15443 } 15444 15445 /** 15446 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device 15447 * @pdev: pointer to PCI device 15448 * 15449 * This routine is called from the PCI subsystem for error handling to device 15450 * with SLI-4 interface spec. It is called when kernel error recovery tells 15451 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 15452 * error recovery. After this call, traffic can start to flow from this device 15453 * again. 15454 **/ 15455 static void 15456 lpfc_io_resume_s4(struct pci_dev *pdev) 15457 { 15458 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15459 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15460 15461 /* 15462 * In case of slot reset, as function reset is performed through 15463 * mailbox command which needs DMA to be enabled, this operation 15464 * has to be moved to the io resume phase. Taking device offline 15465 * will perform the necessary cleanup. 15466 */ 15467 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { 15468 /* Perform device reset */ 15469 lpfc_sli_brdrestart(phba); 15470 /* Bring the device back online */ 15471 lpfc_online(phba); 15472 } 15473 } 15474 15475 /** 15476 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem 15477 * @pdev: pointer to PCI device 15478 * @pid: pointer to PCI device identifier 15479 * 15480 * This routine is to be registered to the kernel's PCI subsystem. When an 15481 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks 15482 * at PCI device-specific information of the device and driver to see if the 15483 * driver state that it can support this kind of device. If the match is 15484 * successful, the driver core invokes this routine. This routine dispatches 15485 * the action to the proper SLI-3 or SLI-4 device probing routine, which will 15486 * do all the initialization that it needs to do to handle the HBA device 15487 * properly. 15488 * 15489 * Return code 15490 * 0 - driver can claim the device 15491 * negative value - driver can not claim the device 15492 **/ 15493 static int 15494 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 15495 { 15496 int rc; 15497 struct lpfc_sli_intf intf; 15498 15499 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) 15500 return -ENODEV; 15501 15502 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 15503 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) 15504 rc = lpfc_pci_probe_one_s4(pdev, pid); 15505 else 15506 rc = lpfc_pci_probe_one_s3(pdev, pid); 15507 15508 return rc; 15509 } 15510 15511 /** 15512 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem 15513 * @pdev: pointer to PCI device 15514 * 15515 * This routine is to be registered to the kernel's PCI subsystem. When an 15516 * Emulex HBA is removed from PCI bus, the driver core invokes this routine. 15517 * This routine dispatches the action to the proper SLI-3 or SLI-4 device 15518 * remove routine, which will perform all the necessary cleanup for the 15519 * device to be removed from the PCI subsystem properly. 15520 **/ 15521 static void 15522 lpfc_pci_remove_one(struct pci_dev *pdev) 15523 { 15524 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15525 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15526 15527 switch (phba->pci_dev_grp) { 15528 case LPFC_PCI_DEV_LP: 15529 lpfc_pci_remove_one_s3(pdev); 15530 break; 15531 case LPFC_PCI_DEV_OC: 15532 lpfc_pci_remove_one_s4(pdev); 15533 break; 15534 default: 15535 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15536 "1424 Invalid PCI device group: 0x%x\n", 15537 phba->pci_dev_grp); 15538 break; 15539 } 15540 return; 15541 } 15542 15543 /** 15544 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management 15545 * @dev: pointer to device 15546 * 15547 * This routine is to be registered to the kernel's PCI subsystem to support 15548 * system Power Management (PM). When PM invokes this method, it dispatches 15549 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will 15550 * suspend the device. 15551 * 15552 * Return code 15553 * 0 - driver suspended the device 15554 * Error otherwise 15555 **/ 15556 static int __maybe_unused 15557 lpfc_pci_suspend_one(struct device *dev) 15558 { 15559 struct Scsi_Host *shost = dev_get_drvdata(dev); 15560 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15561 int rc = -ENODEV; 15562 15563 switch (phba->pci_dev_grp) { 15564 case LPFC_PCI_DEV_LP: 15565 rc = lpfc_pci_suspend_one_s3(dev); 15566 break; 15567 case LPFC_PCI_DEV_OC: 15568 rc = lpfc_pci_suspend_one_s4(dev); 15569 break; 15570 default: 15571 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15572 "1425 Invalid PCI device group: 0x%x\n", 15573 phba->pci_dev_grp); 15574 break; 15575 } 15576 return rc; 15577 } 15578 15579 /** 15580 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management 15581 * @dev: pointer to device 15582 * 15583 * This routine is to be registered to the kernel's PCI subsystem to support 15584 * system Power Management (PM). When PM invokes this method, it dispatches 15585 * the action to the proper SLI-3 or SLI-4 device resume routine, which will 15586 * resume the device. 15587 * 15588 * Return code 15589 * 0 - driver suspended the device 15590 * Error otherwise 15591 **/ 15592 static int __maybe_unused 15593 lpfc_pci_resume_one(struct device *dev) 15594 { 15595 struct Scsi_Host *shost = dev_get_drvdata(dev); 15596 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15597 int rc = -ENODEV; 15598 15599 switch (phba->pci_dev_grp) { 15600 case LPFC_PCI_DEV_LP: 15601 rc = lpfc_pci_resume_one_s3(dev); 15602 break; 15603 case LPFC_PCI_DEV_OC: 15604 rc = lpfc_pci_resume_one_s4(dev); 15605 break; 15606 default: 15607 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15608 "1426 Invalid PCI device group: 0x%x\n", 15609 phba->pci_dev_grp); 15610 break; 15611 } 15612 return rc; 15613 } 15614 15615 /** 15616 * lpfc_io_error_detected - lpfc method for handling PCI I/O error 15617 * @pdev: pointer to PCI device. 15618 * @state: the current PCI connection state. 15619 * 15620 * This routine is registered to the PCI subsystem for error handling. This 15621 * function is called by the PCI subsystem after a PCI bus error affecting 15622 * this device has been detected. When this routine is invoked, it dispatches 15623 * the action to the proper SLI-3 or SLI-4 device error detected handling 15624 * routine, which will perform the proper error detected operation. 15625 * 15626 * Return codes 15627 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15628 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15629 **/ 15630 static pci_ers_result_t 15631 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 15632 { 15633 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15634 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15635 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15636 15637 if (phba->link_state == LPFC_HBA_ERROR && 15638 phba->hba_flag & HBA_IOQ_FLUSH) 15639 return PCI_ERS_RESULT_NEED_RESET; 15640 15641 switch (phba->pci_dev_grp) { 15642 case LPFC_PCI_DEV_LP: 15643 rc = lpfc_io_error_detected_s3(pdev, state); 15644 break; 15645 case LPFC_PCI_DEV_OC: 15646 rc = lpfc_io_error_detected_s4(pdev, state); 15647 break; 15648 default: 15649 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15650 "1427 Invalid PCI device group: 0x%x\n", 15651 phba->pci_dev_grp); 15652 break; 15653 } 15654 return rc; 15655 } 15656 15657 /** 15658 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch 15659 * @pdev: pointer to PCI device. 15660 * 15661 * This routine is registered to the PCI subsystem for error handling. This 15662 * function is called after PCI bus has been reset to restart the PCI card 15663 * from scratch, as if from a cold-boot. When this routine is invoked, it 15664 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling 15665 * routine, which will perform the proper device reset. 15666 * 15667 * Return codes 15668 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15669 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15670 **/ 15671 static pci_ers_result_t 15672 lpfc_io_slot_reset(struct pci_dev *pdev) 15673 { 15674 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15675 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15676 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15677 15678 switch (phba->pci_dev_grp) { 15679 case LPFC_PCI_DEV_LP: 15680 rc = lpfc_io_slot_reset_s3(pdev); 15681 break; 15682 case LPFC_PCI_DEV_OC: 15683 rc = lpfc_io_slot_reset_s4(pdev); 15684 break; 15685 default: 15686 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15687 "1428 Invalid PCI device group: 0x%x\n", 15688 phba->pci_dev_grp); 15689 break; 15690 } 15691 return rc; 15692 } 15693 15694 /** 15695 * lpfc_io_resume - lpfc method for resuming PCI I/O operation 15696 * @pdev: pointer to PCI device 15697 * 15698 * This routine is registered to the PCI subsystem for error handling. It 15699 * is called when kernel error recovery tells the lpfc driver that it is 15700 * OK to resume normal PCI operation after PCI bus error recovery. When 15701 * this routine is invoked, it dispatches the action to the proper SLI-3 15702 * or SLI-4 device io_resume routine, which will resume the device operation. 15703 **/ 15704 static void 15705 lpfc_io_resume(struct pci_dev *pdev) 15706 { 15707 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15708 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15709 15710 switch (phba->pci_dev_grp) { 15711 case LPFC_PCI_DEV_LP: 15712 lpfc_io_resume_s3(pdev); 15713 break; 15714 case LPFC_PCI_DEV_OC: 15715 lpfc_io_resume_s4(pdev); 15716 break; 15717 default: 15718 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15719 "1429 Invalid PCI device group: 0x%x\n", 15720 phba->pci_dev_grp); 15721 break; 15722 } 15723 return; 15724 } 15725 15726 /** 15727 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter 15728 * @phba: pointer to lpfc hba data structure. 15729 * 15730 * This routine checks to see if OAS is supported for this adapter. If 15731 * supported, the configure Flash Optimized Fabric flag is set. Otherwise, 15732 * the enable oas flag is cleared and the pool created for OAS device data 15733 * is destroyed. 15734 * 15735 **/ 15736 static void 15737 lpfc_sli4_oas_verify(struct lpfc_hba *phba) 15738 { 15739 15740 if (!phba->cfg_EnableXLane) 15741 return; 15742 15743 if (phba->sli4_hba.pc_sli4_params.oas_supported) { 15744 phba->cfg_fof = 1; 15745 } else { 15746 phba->cfg_fof = 0; 15747 mempool_destroy(phba->device_data_mem_pool); 15748 phba->device_data_mem_pool = NULL; 15749 } 15750 15751 return; 15752 } 15753 15754 /** 15755 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter 15756 * @phba: pointer to lpfc hba data structure. 15757 * 15758 * This routine checks to see if RAS is supported by the adapter. Check the 15759 * function through which RAS support enablement is to be done. 15760 **/ 15761 void 15762 lpfc_sli4_ras_init(struct lpfc_hba *phba) 15763 { 15764 /* if ASIC_GEN_NUM >= 0xC) */ 15765 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 15766 LPFC_SLI_INTF_IF_TYPE_6) || 15767 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 15768 LPFC_SLI_INTF_FAMILY_G6)) { 15769 phba->ras_fwlog.ras_hwsupport = true; 15770 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && 15771 phba->cfg_ras_fwlog_buffsize) 15772 phba->ras_fwlog.ras_enabled = true; 15773 else 15774 phba->ras_fwlog.ras_enabled = false; 15775 } else { 15776 phba->ras_fwlog.ras_hwsupport = false; 15777 } 15778 } 15779 15780 15781 MODULE_DEVICE_TABLE(pci, lpfc_id_table); 15782 15783 static const struct pci_error_handlers lpfc_err_handler = { 15784 .error_detected = lpfc_io_error_detected, 15785 .slot_reset = lpfc_io_slot_reset, 15786 .resume = lpfc_io_resume, 15787 }; 15788 15789 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, 15790 lpfc_pci_suspend_one, 15791 lpfc_pci_resume_one); 15792 15793 static struct pci_driver lpfc_driver = { 15794 .name = LPFC_DRIVER_NAME, 15795 .id_table = lpfc_id_table, 15796 .probe = lpfc_pci_probe_one, 15797 .remove = lpfc_pci_remove_one, 15798 .shutdown = lpfc_pci_remove_one, 15799 .driver.pm = &lpfc_pci_pm_ops_one, 15800 .err_handler = &lpfc_err_handler, 15801 }; 15802 15803 static const struct file_operations lpfc_mgmt_fop = { 15804 .owner = THIS_MODULE, 15805 }; 15806 15807 static struct miscdevice lpfc_mgmt_dev = { 15808 .minor = MISC_DYNAMIC_MINOR, 15809 .name = "lpfcmgmt", 15810 .fops = &lpfc_mgmt_fop, 15811 }; 15812 15813 /** 15814 * lpfc_init - lpfc module initialization routine 15815 * 15816 * This routine is to be invoked when the lpfc module is loaded into the 15817 * kernel. The special kernel macro module_init() is used to indicate the 15818 * role of this routine to the kernel as lpfc module entry point. 15819 * 15820 * Return codes 15821 * 0 - successful 15822 * -ENOMEM - FC attach transport failed 15823 * all others - failed 15824 */ 15825 static int __init 15826 lpfc_init(void) 15827 { 15828 int error = 0; 15829 15830 pr_info(LPFC_MODULE_DESC "\n"); 15831 pr_info(LPFC_COPYRIGHT "\n"); 15832 15833 error = misc_register(&lpfc_mgmt_dev); 15834 if (error) 15835 printk(KERN_ERR "Could not register lpfcmgmt device, " 15836 "misc_register returned with status %d", error); 15837 15838 error = -ENOMEM; 15839 lpfc_transport_functions.vport_create = lpfc_vport_create; 15840 lpfc_transport_functions.vport_delete = lpfc_vport_delete; 15841 lpfc_transport_template = 15842 fc_attach_transport(&lpfc_transport_functions); 15843 if (lpfc_transport_template == NULL) 15844 goto unregister; 15845 lpfc_vport_transport_template = 15846 fc_attach_transport(&lpfc_vport_transport_functions); 15847 if (lpfc_vport_transport_template == NULL) { 15848 fc_release_transport(lpfc_transport_template); 15849 goto unregister; 15850 } 15851 lpfc_wqe_cmd_template(); 15852 lpfc_nvmet_cmd_template(); 15853 15854 /* Initialize in case vector mapping is needed */ 15855 lpfc_present_cpu = num_present_cpus(); 15856 15857 lpfc_pldv_detect = false; 15858 15859 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, 15860 "lpfc/sli4:online", 15861 lpfc_cpu_online, lpfc_cpu_offline); 15862 if (error < 0) 15863 goto cpuhp_failure; 15864 lpfc_cpuhp_state = error; 15865 15866 error = pci_register_driver(&lpfc_driver); 15867 if (error) 15868 goto unwind; 15869 15870 return error; 15871 15872 unwind: 15873 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15874 cpuhp_failure: 15875 fc_release_transport(lpfc_transport_template); 15876 fc_release_transport(lpfc_vport_transport_template); 15877 unregister: 15878 misc_deregister(&lpfc_mgmt_dev); 15879 15880 return error; 15881 } 15882 15883 void lpfc_dmp_dbg(struct lpfc_hba *phba) 15884 { 15885 unsigned int start_idx; 15886 unsigned int dbg_cnt; 15887 unsigned int temp_idx; 15888 int i; 15889 int j = 0; 15890 unsigned long rem_nsec; 15891 15892 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) 15893 return; 15894 15895 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; 15896 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); 15897 if (!dbg_cnt) 15898 goto out; 15899 temp_idx = start_idx; 15900 if (dbg_cnt >= DBG_LOG_SZ) { 15901 dbg_cnt = DBG_LOG_SZ; 15902 temp_idx -= 1; 15903 } else { 15904 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { 15905 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; 15906 } else { 15907 if (start_idx < dbg_cnt) 15908 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); 15909 else 15910 start_idx -= dbg_cnt; 15911 } 15912 } 15913 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", 15914 start_idx, temp_idx, dbg_cnt); 15915 15916 for (i = 0; i < dbg_cnt; i++) { 15917 if ((start_idx + i) < DBG_LOG_SZ) 15918 temp_idx = (start_idx + i) % DBG_LOG_SZ; 15919 else 15920 temp_idx = j++; 15921 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); 15922 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", 15923 temp_idx, 15924 (unsigned long)phba->dbg_log[temp_idx].t_ns, 15925 rem_nsec / 1000, 15926 phba->dbg_log[temp_idx].log); 15927 } 15928 out: 15929 atomic_set(&phba->dbg_log_cnt, 0); 15930 atomic_set(&phba->dbg_log_dmping, 0); 15931 } 15932 15933 __printf(2, 3) 15934 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) 15935 { 15936 unsigned int idx; 15937 va_list args; 15938 int dbg_dmping = atomic_read(&phba->dbg_log_dmping); 15939 struct va_format vaf; 15940 15941 15942 va_start(args, fmt); 15943 if (unlikely(dbg_dmping)) { 15944 vaf.fmt = fmt; 15945 vaf.va = &args; 15946 dev_info(&phba->pcidev->dev, "%pV", &vaf); 15947 va_end(args); 15948 return; 15949 } 15950 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % 15951 DBG_LOG_SZ; 15952 15953 atomic_inc(&phba->dbg_log_cnt); 15954 15955 vscnprintf(phba->dbg_log[idx].log, 15956 sizeof(phba->dbg_log[idx].log), fmt, args); 15957 va_end(args); 15958 15959 phba->dbg_log[idx].t_ns = local_clock(); 15960 } 15961 15962 /** 15963 * lpfc_exit - lpfc module removal routine 15964 * 15965 * This routine is invoked when the lpfc module is removed from the kernel. 15966 * The special kernel macro module_exit() is used to indicate the role of 15967 * this routine to the kernel as lpfc module exit point. 15968 */ 15969 static void __exit 15970 lpfc_exit(void) 15971 { 15972 misc_deregister(&lpfc_mgmt_dev); 15973 pci_unregister_driver(&lpfc_driver); 15974 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15975 fc_release_transport(lpfc_transport_template); 15976 fc_release_transport(lpfc_vport_transport_template); 15977 idr_destroy(&lpfc_hba_index); 15978 } 15979 15980 module_init(lpfc_init); 15981 module_exit(lpfc_exit); 15982 MODULE_LICENSE("GPL"); 15983 MODULE_DESCRIPTION(LPFC_MODULE_DESC); 15984 MODULE_AUTHOR("Broadcom"); 15985 MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 15986