1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2010-2015 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * * 8 * This program is free software; you can redistribute it and/or * 9 * modify it under the terms of version 2 of the GNU General * 10 * Public License as published by the Free Software Foundation. * 11 * This program is distributed in the hope that it will be useful. * 12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 16 * TO BE LEGALLY INVALID. See the GNU General Public License for * 17 * more details, a copy of which can be found in the file COPYING * 18 * included with this package. * 19 *******************************************************************/ 20 /* bsg definitions 21 * No pointers to user data are allowed, all application buffers and sizes will 22 * derived through the bsg interface. 23 * 24 * These are the vendor unique structures passed in using the bsg 25 * FC_BSG_HST_VENDOR message code type. 26 */ 27 #define LPFC_BSG_VENDOR_SET_CT_EVENT 1 28 #define LPFC_BSG_VENDOR_GET_CT_EVENT 2 29 #define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3 30 #define LPFC_BSG_VENDOR_DIAG_MODE 4 31 #define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK 5 32 #define LPFC_BSG_VENDOR_GET_MGMT_REV 6 33 #define LPFC_BSG_VENDOR_MBOX 7 34 #define LPFC_BSG_VENDOR_MENLO_CMD 8 35 #define LPFC_BSG_VENDOR_MENLO_DATA 9 36 #define LPFC_BSG_VENDOR_DIAG_MODE_END 10 37 #define LPFC_BSG_VENDOR_LINK_DIAG_TEST 11 38 39 struct set_ct_event { 40 uint32_t command; 41 uint32_t type_mask; 42 uint32_t ev_req_id; 43 uint32_t ev_reg_id; 44 }; 45 46 struct get_ct_event { 47 uint32_t command; 48 uint32_t ev_reg_id; 49 uint32_t ev_req_id; 50 }; 51 52 struct get_ct_event_reply { 53 uint32_t immed_data; 54 uint32_t type; 55 }; 56 57 struct send_mgmt_resp { 58 uint32_t command; 59 uint32_t tag; 60 }; 61 62 63 #define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */ 64 #define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */ 65 66 struct diag_mode_set { 67 uint32_t command; 68 uint32_t type; 69 uint32_t timeout; 70 }; 71 72 struct sli4_link_diag { 73 uint32_t command; 74 uint32_t timeout; 75 uint32_t test_id; 76 uint32_t loops; 77 uint32_t test_version; 78 uint32_t error_action; 79 }; 80 81 struct diag_mode_test { 82 uint32_t command; 83 }; 84 85 struct diag_status { 86 uint32_t mbox_status; 87 uint32_t shdr_status; 88 uint32_t shdr_add_status; 89 }; 90 91 #define LPFC_WWNN_TYPE 0 92 #define LPFC_WWPN_TYPE 1 93 94 struct get_mgmt_rev { 95 uint32_t command; 96 }; 97 98 #define MANAGEMENT_MAJOR_REV 1 99 #define MANAGEMENT_MINOR_REV 1 100 101 /* the MgmtRevInfo structure */ 102 struct MgmtRevInfo { 103 uint32_t a_Major; 104 uint32_t a_Minor; 105 }; 106 107 struct get_mgmt_rev_reply { 108 struct MgmtRevInfo info; 109 }; 110 111 #define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */ 112 113 /* BSG mailbox request header */ 114 struct dfc_mbox_req { 115 uint32_t command; 116 uint32_t mbOffset; 117 uint32_t inExtWLen; 118 uint32_t outExtWLen; 119 uint32_t extMboxTag; 120 uint32_t extSeqNum; 121 }; 122 123 /* Used for menlo command or menlo data. The xri is only used for menlo data */ 124 struct menlo_command { 125 uint32_t cmd; 126 uint32_t xri; 127 }; 128 129 struct menlo_response { 130 uint32_t xri; /* return the xri of the iocb exchange */ 131 }; 132 133 /* 134 * macros and data structures for handling sli-config mailbox command 135 * pass-through support, this header file is shared between user and 136 * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h, 137 * with macro names prefixed with bsg_, as the macros defined in 138 * lpfc_hw4.h are not accessible from user space. 139 */ 140 141 /* Macros to deal with bit fields. Each bit field must have 3 #defines 142 * associated with it (_SHIFT, _MASK, and _WORD). 143 * EG. For a bit field that is in the 7th bit of the "field4" field of a 144 * structure and is 2 bits in size the following #defines must exist: 145 * struct temp { 146 * uint32_t field1; 147 * uint32_t field2; 148 * uint32_t field3; 149 * uint32_t field4; 150 * #define example_bit_field_SHIFT 7 151 * #define example_bit_field_MASK 0x03 152 * #define example_bit_field_WORD field4 153 * uint32_t field5; 154 * }; 155 * Then the macros below may be used to get or set the value of that field. 156 * EG. To get the value of the bit field from the above example: 157 * struct temp t1; 158 * value = bsg_bf_get(example_bit_field, &t1); 159 * And then to set that bit field: 160 * bsg_bf_set(example_bit_field, &t1, 2); 161 * Or clear that bit field: 162 * bsg_bf_set(example_bit_field, &t1, 0); 163 */ 164 #define bsg_bf_get_le32(name, ptr) \ 165 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK) 166 #define bsg_bf_get(name, ptr) \ 167 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK) 168 #define bsg_bf_set_le32(name, ptr, value) \ 169 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \ 170 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \ 171 ~(name##_MASK << name##_SHIFT))))) 172 #define bsg_bf_set(name, ptr, value) \ 173 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \ 174 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT)))) 175 176 /* 177 * The sli_config structure specified here is based on the following 178 * restriction: 179 * 180 * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without 181 * carrying HBD. 182 * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or 183 * without carrying HBDs. 184 */ 185 186 struct lpfc_sli_config_mse { 187 uint32_t pa_lo; 188 uint32_t pa_hi; 189 uint32_t buf_len; 190 #define lpfc_mbox_sli_config_mse_len_SHIFT 0 191 #define lpfc_mbox_sli_config_mse_len_MASK 0xffffff 192 #define lpfc_mbox_sli_config_mse_len_WORD buf_len 193 }; 194 195 struct lpfc_sli_config_hbd { 196 uint32_t buf_len; 197 #define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT 0 198 #define lpfc_mbox_sli_config_ecmn_hbd_len_MASK 0xffffff 199 #define lpfc_mbox_sli_config_ecmn_hbd_len_WORD buf_len 200 uint32_t pa_lo; 201 uint32_t pa_hi; 202 }; 203 204 struct lpfc_sli_config_hdr { 205 uint32_t word1; 206 #define lpfc_mbox_hdr_emb_SHIFT 0 207 #define lpfc_mbox_hdr_emb_MASK 0x00000001 208 #define lpfc_mbox_hdr_emb_WORD word1 209 #define lpfc_mbox_hdr_mse_cnt_SHIFT 3 210 #define lpfc_mbox_hdr_mse_cnt_MASK 0x0000001f 211 #define lpfc_mbox_hdr_mse_cnt_WORD word1 212 uint32_t payload_length; 213 uint32_t tag_lo; 214 uint32_t tag_hi; 215 uint32_t reserved5; 216 }; 217 218 struct lpfc_sli_config_emb0_subsys { 219 struct lpfc_sli_config_hdr sli_config_hdr; 220 #define LPFC_MBX_SLI_CONFIG_MAX_MSE 19 221 struct lpfc_sli_config_mse mse[LPFC_MBX_SLI_CONFIG_MAX_MSE]; 222 uint32_t padding; 223 uint32_t word64; 224 #define lpfc_emb0_subcmnd_opcode_SHIFT 0 225 #define lpfc_emb0_subcmnd_opcode_MASK 0xff 226 #define lpfc_emb0_subcmnd_opcode_WORD word64 227 #define lpfc_emb0_subcmnd_subsys_SHIFT 8 228 #define lpfc_emb0_subcmnd_subsys_MASK 0xff 229 #define lpfc_emb0_subcmnd_subsys_WORD word64 230 /* Subsystem FCOE (0x0C) OpCodes */ 231 #define SLI_CONFIG_SUBSYS_FCOE 0x0C 232 #define FCOE_OPCODE_READ_FCF 0x08 233 #define FCOE_OPCODE_ADD_FCF 0x09 234 #define FCOE_OPCODE_SET_DPORT_MODE 0x27 235 #define FCOE_OPCODE_GET_DPORT_RESULTS 0x28 236 }; 237 238 struct lpfc_sli_config_emb1_subsys { 239 struct lpfc_sli_config_hdr sli_config_hdr; 240 uint32_t word6; 241 #define lpfc_emb1_subcmnd_opcode_SHIFT 0 242 #define lpfc_emb1_subcmnd_opcode_MASK 0xff 243 #define lpfc_emb1_subcmnd_opcode_WORD word6 244 #define lpfc_emb1_subcmnd_subsys_SHIFT 8 245 #define lpfc_emb1_subcmnd_subsys_MASK 0xff 246 #define lpfc_emb1_subcmnd_subsys_WORD word6 247 /* Subsystem COMN (0x01) OpCodes */ 248 #define SLI_CONFIG_SUBSYS_COMN 0x01 249 #define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4 250 #define COMN_OPCODE_READ_OBJECT 0xAB 251 #define COMN_OPCODE_WRITE_OBJECT 0xAC 252 #define COMN_OPCODE_READ_OBJECT_LIST 0xAD 253 #define COMN_OPCODE_DELETE_OBJECT 0xAE 254 #define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES 0x79 255 #define COMN_OPCODE_GET_CNTL_ATTRIBUTES 0x20 256 uint32_t timeout; 257 uint32_t request_length; 258 uint32_t word9; 259 #define lpfc_subcmnd_version_SHIFT 0 260 #define lpfc_subcmnd_version_MASK 0xff 261 #define lpfc_subcmnd_version_WORD word9 262 uint32_t word10; 263 #define lpfc_subcmnd_ask_rd_len_SHIFT 0 264 #define lpfc_subcmnd_ask_rd_len_MASK 0xffffff 265 #define lpfc_subcmnd_ask_rd_len_WORD word10 266 uint32_t rd_offset; 267 uint32_t obj_name[26]; 268 uint32_t hbd_count; 269 #define LPFC_MBX_SLI_CONFIG_MAX_HBD 8 270 struct lpfc_sli_config_hbd hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD]; 271 }; 272 273 struct lpfc_sli_config_mbox { 274 uint32_t word0; 275 #define lpfc_mqe_status_SHIFT 16 276 #define lpfc_mqe_status_MASK 0x0000FFFF 277 #define lpfc_mqe_status_WORD word0 278 #define lpfc_mqe_command_SHIFT 8 279 #define lpfc_mqe_command_MASK 0x000000FF 280 #define lpfc_mqe_command_WORD word0 281 union { 282 struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys; 283 struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys; 284 } un; 285 }; 286 287 /* driver only */ 288 #define SLI_CONFIG_NOT_HANDLED 0 289 #define SLI_CONFIG_HANDLED 1 290