1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. * 6 * Copyright (C) 2010-2015 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 /* bsg definitions 23 * No pointers to user data are allowed, all application buffers and sizes will 24 * derived through the bsg interface. 25 * 26 * These are the vendor unique structures passed in using the bsg 27 * FC_BSG_HST_VENDOR message code type. 28 */ 29 #define LPFC_BSG_VENDOR_SET_CT_EVENT 1 30 #define LPFC_BSG_VENDOR_GET_CT_EVENT 2 31 #define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3 32 #define LPFC_BSG_VENDOR_DIAG_MODE 4 33 #define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK 5 34 #define LPFC_BSG_VENDOR_GET_MGMT_REV 6 35 #define LPFC_BSG_VENDOR_MBOX 7 36 #define LPFC_BSG_VENDOR_MENLO_CMD 8 37 #define LPFC_BSG_VENDOR_MENLO_DATA 9 38 #define LPFC_BSG_VENDOR_DIAG_MODE_END 10 39 #define LPFC_BSG_VENDOR_LINK_DIAG_TEST 11 40 #define LPFC_BSG_VENDOR_FORCED_LINK_SPEED 14 41 42 struct set_ct_event { 43 uint32_t command; 44 uint32_t type_mask; 45 uint32_t ev_req_id; 46 uint32_t ev_reg_id; 47 }; 48 49 struct get_ct_event { 50 uint32_t command; 51 uint32_t ev_reg_id; 52 uint32_t ev_req_id; 53 }; 54 55 struct get_ct_event_reply { 56 uint32_t immed_data; 57 uint32_t type; 58 }; 59 60 struct send_mgmt_resp { 61 uint32_t command; 62 uint32_t tag; 63 }; 64 65 66 #define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */ 67 #define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */ 68 69 struct diag_mode_set { 70 uint32_t command; 71 uint32_t type; 72 uint32_t timeout; 73 }; 74 75 struct sli4_link_diag { 76 uint32_t command; 77 uint32_t timeout; 78 uint32_t test_id; 79 uint32_t loops; 80 uint32_t test_version; 81 uint32_t error_action; 82 }; 83 84 struct diag_mode_test { 85 uint32_t command; 86 }; 87 88 struct diag_status { 89 uint32_t mbox_status; 90 uint32_t shdr_status; 91 uint32_t shdr_add_status; 92 }; 93 94 #define LPFC_WWNN_TYPE 0 95 #define LPFC_WWPN_TYPE 1 96 97 struct get_mgmt_rev { 98 uint32_t command; 99 }; 100 101 #define MANAGEMENT_MAJOR_REV 1 102 #define MANAGEMENT_MINOR_REV 1 103 104 /* the MgmtRevInfo structure */ 105 struct MgmtRevInfo { 106 uint32_t a_Major; 107 uint32_t a_Minor; 108 }; 109 110 struct get_mgmt_rev_reply { 111 struct MgmtRevInfo info; 112 }; 113 114 #define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */ 115 116 /* BSG mailbox request header */ 117 struct dfc_mbox_req { 118 uint32_t command; 119 uint32_t mbOffset; 120 uint32_t inExtWLen; 121 uint32_t outExtWLen; 122 uint32_t extMboxTag; 123 uint32_t extSeqNum; 124 }; 125 126 /* Used for menlo command or menlo data. The xri is only used for menlo data */ 127 struct menlo_command { 128 uint32_t cmd; 129 uint32_t xri; 130 }; 131 132 struct menlo_response { 133 uint32_t xri; /* return the xri of the iocb exchange */ 134 }; 135 136 /* 137 * macros and data structures for handling sli-config mailbox command 138 * pass-through support, this header file is shared between user and 139 * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h, 140 * with macro names prefixed with bsg_, as the macros defined in 141 * lpfc_hw4.h are not accessible from user space. 142 */ 143 144 /* Macros to deal with bit fields. Each bit field must have 3 #defines 145 * associated with it (_SHIFT, _MASK, and _WORD). 146 * EG. For a bit field that is in the 7th bit of the "field4" field of a 147 * structure and is 2 bits in size the following #defines must exist: 148 * struct temp { 149 * uint32_t field1; 150 * uint32_t field2; 151 * uint32_t field3; 152 * uint32_t field4; 153 * #define example_bit_field_SHIFT 7 154 * #define example_bit_field_MASK 0x03 155 * #define example_bit_field_WORD field4 156 * uint32_t field5; 157 * }; 158 * Then the macros below may be used to get or set the value of that field. 159 * EG. To get the value of the bit field from the above example: 160 * struct temp t1; 161 * value = bsg_bf_get(example_bit_field, &t1); 162 * And then to set that bit field: 163 * bsg_bf_set(example_bit_field, &t1, 2); 164 * Or clear that bit field: 165 * bsg_bf_set(example_bit_field, &t1, 0); 166 */ 167 #define bsg_bf_get_le32(name, ptr) \ 168 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK) 169 #define bsg_bf_get(name, ptr) \ 170 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK) 171 #define bsg_bf_set_le32(name, ptr, value) \ 172 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \ 173 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \ 174 ~(name##_MASK << name##_SHIFT))))) 175 #define bsg_bf_set(name, ptr, value) \ 176 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \ 177 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT)))) 178 179 /* 180 * The sli_config structure specified here is based on the following 181 * restriction: 182 * 183 * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without 184 * carrying HBD. 185 * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or 186 * without carrying HBDs. 187 */ 188 189 struct lpfc_sli_config_mse { 190 uint32_t pa_lo; 191 uint32_t pa_hi; 192 uint32_t buf_len; 193 #define lpfc_mbox_sli_config_mse_len_SHIFT 0 194 #define lpfc_mbox_sli_config_mse_len_MASK 0xffffff 195 #define lpfc_mbox_sli_config_mse_len_WORD buf_len 196 }; 197 198 struct lpfc_sli_config_hbd { 199 uint32_t buf_len; 200 #define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT 0 201 #define lpfc_mbox_sli_config_ecmn_hbd_len_MASK 0xffffff 202 #define lpfc_mbox_sli_config_ecmn_hbd_len_WORD buf_len 203 uint32_t pa_lo; 204 uint32_t pa_hi; 205 }; 206 207 struct lpfc_sli_config_hdr { 208 uint32_t word1; 209 #define lpfc_mbox_hdr_emb_SHIFT 0 210 #define lpfc_mbox_hdr_emb_MASK 0x00000001 211 #define lpfc_mbox_hdr_emb_WORD word1 212 #define lpfc_mbox_hdr_mse_cnt_SHIFT 3 213 #define lpfc_mbox_hdr_mse_cnt_MASK 0x0000001f 214 #define lpfc_mbox_hdr_mse_cnt_WORD word1 215 uint32_t payload_length; 216 uint32_t tag_lo; 217 uint32_t tag_hi; 218 uint32_t reserved5; 219 }; 220 221 struct lpfc_sli_config_emb0_subsys { 222 struct lpfc_sli_config_hdr sli_config_hdr; 223 #define LPFC_MBX_SLI_CONFIG_MAX_MSE 19 224 struct lpfc_sli_config_mse mse[LPFC_MBX_SLI_CONFIG_MAX_MSE]; 225 uint32_t padding; 226 uint32_t word64; 227 #define lpfc_emb0_subcmnd_opcode_SHIFT 0 228 #define lpfc_emb0_subcmnd_opcode_MASK 0xff 229 #define lpfc_emb0_subcmnd_opcode_WORD word64 230 #define lpfc_emb0_subcmnd_subsys_SHIFT 8 231 #define lpfc_emb0_subcmnd_subsys_MASK 0xff 232 #define lpfc_emb0_subcmnd_subsys_WORD word64 233 /* Subsystem FCOE (0x0C) OpCodes */ 234 #define SLI_CONFIG_SUBSYS_FCOE 0x0C 235 #define FCOE_OPCODE_READ_FCF 0x08 236 #define FCOE_OPCODE_ADD_FCF 0x09 237 #define FCOE_OPCODE_SET_DPORT_MODE 0x27 238 #define FCOE_OPCODE_GET_DPORT_RESULTS 0x28 239 }; 240 241 struct lpfc_sli_config_emb1_subsys { 242 struct lpfc_sli_config_hdr sli_config_hdr; 243 uint32_t word6; 244 #define lpfc_emb1_subcmnd_opcode_SHIFT 0 245 #define lpfc_emb1_subcmnd_opcode_MASK 0xff 246 #define lpfc_emb1_subcmnd_opcode_WORD word6 247 #define lpfc_emb1_subcmnd_subsys_SHIFT 8 248 #define lpfc_emb1_subcmnd_subsys_MASK 0xff 249 #define lpfc_emb1_subcmnd_subsys_WORD word6 250 /* Subsystem COMN (0x01) OpCodes */ 251 #define SLI_CONFIG_SUBSYS_COMN 0x01 252 #define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4 253 #define COMN_OPCODE_READ_OBJECT 0xAB 254 #define COMN_OPCODE_WRITE_OBJECT 0xAC 255 #define COMN_OPCODE_READ_OBJECT_LIST 0xAD 256 #define COMN_OPCODE_DELETE_OBJECT 0xAE 257 #define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES 0x79 258 #define COMN_OPCODE_GET_CNTL_ATTRIBUTES 0x20 259 uint32_t timeout; 260 uint32_t request_length; 261 uint32_t word9; 262 #define lpfc_subcmnd_version_SHIFT 0 263 #define lpfc_subcmnd_version_MASK 0xff 264 #define lpfc_subcmnd_version_WORD word9 265 uint32_t word10; 266 #define lpfc_subcmnd_ask_rd_len_SHIFT 0 267 #define lpfc_subcmnd_ask_rd_len_MASK 0xffffff 268 #define lpfc_subcmnd_ask_rd_len_WORD word10 269 uint32_t rd_offset; 270 uint32_t obj_name[26]; 271 uint32_t hbd_count; 272 #define LPFC_MBX_SLI_CONFIG_MAX_HBD 8 273 struct lpfc_sli_config_hbd hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD]; 274 }; 275 276 struct lpfc_sli_config_mbox { 277 uint32_t word0; 278 #define lpfc_mqe_status_SHIFT 16 279 #define lpfc_mqe_status_MASK 0x0000FFFF 280 #define lpfc_mqe_status_WORD word0 281 #define lpfc_mqe_command_SHIFT 8 282 #define lpfc_mqe_command_MASK 0x000000FF 283 #define lpfc_mqe_command_WORD word0 284 union { 285 struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys; 286 struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys; 287 } un; 288 }; 289 290 #define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED 0 291 #define LPFC_FORCED_LINK_SPEED_SUPPORTED 1 292 struct get_forced_link_speed_support { 293 uint32_t command; 294 }; 295 struct forced_link_speed_support_reply { 296 uint8_t supported; 297 }; 298 299 /* driver only */ 300 #define SLI_CONFIG_NOT_HANDLED 0 301 #define SLI_CONFIG_HANDLED 1 302