1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/ktime.h> 26 27 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 28 #define CONFIG_SCSI_LPFC_DEBUG_FS 29 #endif 30 31 struct lpfc_sli2_slim; 32 33 #define ELX_MODEL_NAME_SIZE 80 34 35 #define LPFC_PCI_DEV_LP 0x1 36 #define LPFC_PCI_DEV_OC 0x2 37 38 #define LPFC_SLI_REV2 2 39 #define LPFC_SLI_REV3 3 40 #define LPFC_SLI_REV4 4 41 42 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 43 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 44 requests */ 45 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 46 the NameServer before giving up. */ 47 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 48 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 49 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 50 cmnd for menlo needs nearly twice as for firmware 51 downloads using bsg */ 52 53 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 54 #define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */ 55 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 56 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 57 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 58 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 59 #define LPFC_MIN_NVME_SEG_CNT 254 60 61 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 62 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 63 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 64 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 65 #define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt 66 queue depth change in millisecs */ 67 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 68 #define LPFC_MIN_TGT_QDEPTH 10 69 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 70 71 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 72 collection. */ 73 /* 74 * Following time intervals are used of adjusting SCSI device 75 * queue depths when there are driver resource error or Firmware 76 * resource error. 77 */ 78 /* 1 Second */ 79 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 80 81 /* Number of exchanges reserved for discovery to complete */ 82 #define LPFC_DISC_IOCB_BUFF_COUNT 20 83 84 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 85 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 86 87 #define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */ 88 89 /* Error Attention event polling interval */ 90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 91 92 /* Define macros for 64 bit support */ 93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 95 #define getPaddr(high, low) ((dma_addr_t)( \ 96 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 97 /* Provide maximum configuration definitions. */ 98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 99 #define FC_MAX_ADPTMSG 64 100 101 #define MAX_HBAEVT 32 102 #define MAX_HBAS_NO_RESET 16 103 104 /* Number of MSI-X vectors the driver uses */ 105 #define LPFC_MSIX_VECTORS 2 106 107 /* lpfc wait event data ready flag */ 108 #define LPFC_DATA_READY 0 /* bit 0 */ 109 110 /* queue dump line buffer size */ 111 #define LPFC_LBUF_SZ 128 112 113 /* mailbox system shutdown options */ 114 #define LPFC_MBX_NO_WAIT 0 115 #define LPFC_MBX_WAIT 1 116 117 enum lpfc_polling_flags { 118 ENABLE_FCP_RING_POLLING = 0x1, 119 DISABLE_FCP_RING_INT = 0x2 120 }; 121 122 struct perf_prof { 123 uint16_t cmd_cpu[40]; 124 uint16_t rsp_cpu[40]; 125 uint16_t qh_cpu[40]; 126 uint16_t wqidx[40]; 127 }; 128 129 /* 130 * Provide for FC4 TYPE x28 - NVME. The 131 * bit mask for FCP and NVME is 0x8 identically 132 * because they are 32 bit positions distance. 133 */ 134 #define LPFC_FC4_TYPE_BITMASK 0x00000100 135 136 /* Provide DMA memory definitions the driver uses per port instance. */ 137 struct lpfc_dmabuf { 138 struct list_head list; 139 void *virt; /* virtual address ptr */ 140 dma_addr_t phys; /* mapped address */ 141 uint32_t buffer_tag; /* used for tagged queue ring */ 142 }; 143 144 struct lpfc_dma_pool { 145 struct lpfc_dmabuf *elements; 146 uint32_t max_count; 147 uint32_t current_count; 148 }; 149 150 struct hbq_dmabuf { 151 struct lpfc_dmabuf hbuf; 152 struct lpfc_dmabuf dbuf; 153 uint16_t total_size; 154 uint16_t bytes_recv; 155 uint32_t tag; 156 struct lpfc_cq_event cq_event; 157 unsigned long time_stamp; 158 void *context; 159 }; 160 161 struct rqb_dmabuf { 162 struct lpfc_dmabuf hbuf; 163 struct lpfc_dmabuf dbuf; 164 uint16_t total_size; 165 uint16_t bytes_recv; 166 void *context; 167 struct lpfc_iocbq *iocbq; 168 struct lpfc_sglq *sglq; 169 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 170 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 171 }; 172 173 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 174 #define MEM_PRI 0x100 175 176 177 /****************************************************************************/ 178 /* Device VPD save area */ 179 /****************************************************************************/ 180 typedef struct lpfc_vpd { 181 uint32_t status; /* vpd status value */ 182 uint32_t length; /* number of bytes actually returned */ 183 struct { 184 uint32_t rsvd1; /* Revision numbers */ 185 uint32_t biuRev; 186 uint32_t smRev; 187 uint32_t smFwRev; 188 uint32_t endecRev; 189 uint16_t rBit; 190 uint8_t fcphHigh; 191 uint8_t fcphLow; 192 uint8_t feaLevelHigh; 193 uint8_t feaLevelLow; 194 uint32_t postKernRev; 195 uint32_t opFwRev; 196 uint8_t opFwName[16]; 197 uint32_t sli1FwRev; 198 uint8_t sli1FwName[16]; 199 uint32_t sli2FwRev; 200 uint8_t sli2FwName[16]; 201 } rev; 202 struct { 203 #ifdef __BIG_ENDIAN_BITFIELD 204 uint32_t rsvd3 :19; /* Reserved */ 205 uint32_t cdss : 1; /* Configure Data Security SLI */ 206 uint32_t rsvd2 : 3; /* Reserved */ 207 uint32_t cbg : 1; /* Configure BlockGuard */ 208 uint32_t cmv : 1; /* Configure Max VPIs */ 209 uint32_t ccrp : 1; /* Config Command Ring Polling */ 210 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 211 uint32_t chbs : 1; /* Cofigure Host Backing store */ 212 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 213 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 214 uint32_t cmx : 1; /* Configure Max XRIs */ 215 uint32_t cmr : 1; /* Configure Max RPIs */ 216 #else /* __LITTLE_ENDIAN */ 217 uint32_t cmr : 1; /* Configure Max RPIs */ 218 uint32_t cmx : 1; /* Configure Max XRIs */ 219 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 220 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 221 uint32_t chbs : 1; /* Cofigure Host Backing store */ 222 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 223 uint32_t ccrp : 1; /* Config Command Ring Polling */ 224 uint32_t cmv : 1; /* Configure Max VPIs */ 225 uint32_t cbg : 1; /* Configure BlockGuard */ 226 uint32_t rsvd2 : 3; /* Reserved */ 227 uint32_t cdss : 1; /* Configure Data Security SLI */ 228 uint32_t rsvd3 :19; /* Reserved */ 229 #endif 230 } sli3Feat; 231 } lpfc_vpd_t; 232 233 struct lpfc_scsi_buf; 234 235 236 /* 237 * lpfc stat counters 238 */ 239 struct lpfc_stats { 240 /* Statistics for ELS commands */ 241 uint32_t elsLogiCol; 242 uint32_t elsRetryExceeded; 243 uint32_t elsXmitRetry; 244 uint32_t elsDelayRetry; 245 uint32_t elsRcvDrop; 246 uint32_t elsRcvFrame; 247 uint32_t elsRcvRSCN; 248 uint32_t elsRcvRNID; 249 uint32_t elsRcvFARP; 250 uint32_t elsRcvFARPR; 251 uint32_t elsRcvFLOGI; 252 uint32_t elsRcvPLOGI; 253 uint32_t elsRcvADISC; 254 uint32_t elsRcvPDISC; 255 uint32_t elsRcvFAN; 256 uint32_t elsRcvLOGO; 257 uint32_t elsRcvPRLO; 258 uint32_t elsRcvPRLI; 259 uint32_t elsRcvLIRR; 260 uint32_t elsRcvRLS; 261 uint32_t elsRcvRPS; 262 uint32_t elsRcvRPL; 263 uint32_t elsRcvRRQ; 264 uint32_t elsRcvRTV; 265 uint32_t elsRcvECHO; 266 uint32_t elsRcvLCB; 267 uint32_t elsRcvRDP; 268 uint32_t elsXmitFLOGI; 269 uint32_t elsXmitFDISC; 270 uint32_t elsXmitPLOGI; 271 uint32_t elsXmitPRLI; 272 uint32_t elsXmitADISC; 273 uint32_t elsXmitLOGO; 274 uint32_t elsXmitSCR; 275 uint32_t elsXmitRNID; 276 uint32_t elsXmitFARP; 277 uint32_t elsXmitFARPR; 278 uint32_t elsXmitACC; 279 uint32_t elsXmitLSRJT; 280 281 uint32_t frameRcvBcast; 282 uint32_t frameRcvMulti; 283 uint32_t strayXmitCmpl; 284 uint32_t frameXmitDelay; 285 uint32_t xriCmdCmpl; 286 uint32_t xriStatErr; 287 uint32_t LinkUp; 288 uint32_t LinkDown; 289 uint32_t LinkMultiEvent; 290 uint32_t NoRcvBuf; 291 uint32_t fcpCmd; 292 uint32_t fcpCmpl; 293 uint32_t fcpRspErr; 294 uint32_t fcpRemoteStop; 295 uint32_t fcpPortRjt; 296 uint32_t fcpPortBusy; 297 uint32_t fcpError; 298 uint32_t fcpLocalErr; 299 }; 300 301 struct lpfc_hba; 302 303 304 enum discovery_state { 305 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 306 LPFC_VPORT_FAILED = 1, /* vport has failed */ 307 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 308 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 309 LPFC_FDISC = 8, /* FDISC sent for vport */ 310 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 311 * configured */ 312 LPFC_NS_REG = 10, /* Register with NameServer */ 313 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 314 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 315 * device authentication / discovery */ 316 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 317 LPFC_VPORT_READY = 32, 318 }; 319 320 enum hba_state { 321 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 322 LPFC_WARM_START = 1, /* HBA state after selective reset */ 323 LPFC_INIT_START = 2, /* Initial state after board reset */ 324 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 325 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 326 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 327 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 328 * CLEAR_LA */ 329 LPFC_HBA_READY = 32, 330 LPFC_HBA_ERROR = -1 331 }; 332 333 struct lpfc_vport { 334 struct lpfc_hba *phba; 335 struct list_head listentry; 336 uint8_t port_type; 337 #define LPFC_PHYSICAL_PORT 1 338 #define LPFC_NPIV_PORT 2 339 #define LPFC_FABRIC_PORT 3 340 enum discovery_state port_state; 341 342 uint16_t vpi; 343 uint16_t vfi; 344 uint8_t vpi_state; 345 #define LPFC_VPI_REGISTERED 0x1 346 347 uint32_t fc_flag; /* FC flags */ 348 /* Several of these flags are HBA centric and should be moved to 349 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 350 */ 351 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 352 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 353 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 354 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 355 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 356 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 357 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 358 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 359 #define FC_FABRIC 0x100 /* We are fabric attached */ 360 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 361 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 362 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 363 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 364 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 365 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 366 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 367 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 368 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 369 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 370 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 371 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 372 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 373 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 374 375 uint32_t ct_flags; 376 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 377 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 378 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 379 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 380 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 381 382 struct list_head fc_nodes; 383 384 /* Keep counters for the number of entries in each list. */ 385 uint16_t fc_plogi_cnt; 386 uint16_t fc_adisc_cnt; 387 uint16_t fc_reglogin_cnt; 388 uint16_t fc_prli_cnt; 389 uint16_t fc_unmap_cnt; 390 uint16_t fc_map_cnt; 391 uint16_t fc_npr_cnt; 392 uint16_t fc_unused_cnt; 393 struct serv_parm fc_sparam; /* buffer for our service parameters */ 394 395 uint32_t fc_myDID; /* fibre channel S_ID */ 396 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 397 struct lpfc_name fabric_portname; 398 struct lpfc_name fabric_nodename; 399 400 int32_t stopped; /* HBA has not been restarted since last ERATT */ 401 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 402 403 uint32_t num_disc_nodes; /* in addition to hba_state */ 404 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 405 406 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 407 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 408 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 409 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 410 struct lpfc_name fc_nodename; /* fc nodename */ 411 struct lpfc_name fc_portname; /* fc portname */ 412 413 struct lpfc_work_evt disc_timeout_evt; 414 415 struct timer_list fc_disctmo; /* Discovery rescue timer */ 416 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 417 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 418 419 spinlock_t work_port_lock; 420 uint32_t work_port_events; /* Timeout to be handled */ 421 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 422 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 423 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 424 425 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 426 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 427 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 428 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 429 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 430 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 431 432 struct timer_list els_tmofunc; 433 struct timer_list delayed_disc_tmo; 434 435 int unreg_vpi_cmpl; 436 437 uint8_t load_flag; 438 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 439 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 440 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 441 /* Vport Config Parameters */ 442 uint32_t cfg_scan_down; 443 uint32_t cfg_lun_queue_depth; 444 uint32_t cfg_nodev_tmo; 445 uint32_t cfg_devloss_tmo; 446 uint32_t cfg_restrict_login; 447 uint32_t cfg_peer_port_login; 448 uint32_t cfg_fcp_class; 449 uint32_t cfg_use_adisc; 450 uint32_t cfg_discovery_threads; 451 uint32_t cfg_log_verbose; 452 uint32_t cfg_max_luns; 453 uint32_t cfg_enable_da_id; 454 uint32_t cfg_max_scsicmpl_time; 455 uint32_t cfg_tgt_queue_depth; 456 uint32_t cfg_first_burst_size; 457 uint32_t dev_loss_tmo_changed; 458 459 struct fc_vport *fc_vport; 460 461 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 462 struct dentry *debug_disc_trc; 463 struct dentry *debug_nodelist; 464 struct dentry *debug_nvmestat; 465 struct dentry *debug_nvmektime; 466 struct dentry *debug_cpucheck; 467 struct dentry *vport_debugfs_root; 468 struct lpfc_debugfs_trc *disc_trc; 469 atomic_t disc_trc_cnt; 470 #endif 471 uint8_t stat_data_enabled; 472 uint8_t stat_data_blocked; 473 struct list_head rcv_buffer_list; 474 unsigned long rcv_buffer_time_stamp; 475 uint32_t vport_flag; 476 #define STATIC_VPORT 1 477 478 uint16_t fdmi_num_disc; 479 uint32_t fdmi_hba_mask; 480 uint32_t fdmi_port_mask; 481 482 /* There is a single nvme instance per vport. */ 483 struct nvme_fc_local_port *localport; 484 uint8_t nvmei_support; /* driver supports NVME Initiator */ 485 uint32_t last_fcp_wqidx; 486 }; 487 488 struct hbq_s { 489 uint16_t entry_count; /* Current number of HBQ slots */ 490 uint16_t buffer_count; /* Current number of buffers posted */ 491 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 492 uint32_t hbqPutIdx; /* HBQ slot to use */ 493 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 494 void *hbq_virt; /* Virtual ptr to this hbq */ 495 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 496 /* Callback for HBQ buffer allocation */ 497 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 498 /* Callback for HBQ buffer free */ 499 void (*hbq_free_buffer) (struct lpfc_hba *, 500 struct hbq_dmabuf *); 501 }; 502 503 /* this matches the position in the lpfc_hbq_defs array */ 504 #define LPFC_ELS_HBQ 0 505 #define LPFC_MAX_HBQS 1 506 507 enum hba_temp_state { 508 HBA_NORMAL_TEMP, 509 HBA_OVER_TEMP 510 }; 511 512 enum intr_type_t { 513 NONE = 0, 514 INTx, 515 MSI, 516 MSIX, 517 }; 518 519 #define LPFC_CT_CTX_MAX 64 520 struct unsol_rcv_ct_ctx { 521 uint32_t ctxt_id; 522 uint32_t SID; 523 uint32_t valid; 524 #define UNSOL_INVALID 0 525 #define UNSOL_VALID 1 526 uint16_t oxid; 527 uint16_t rxid; 528 }; 529 530 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 531 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 532 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 533 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 534 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 535 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 536 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 537 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 538 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G 539 #define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \ 540 (1 << LPFC_USER_LINK_SPEED_16G) | \ 541 (1 << LPFC_USER_LINK_SPEED_10G) | \ 542 (1 << LPFC_USER_LINK_SPEED_8G) | \ 543 (1 << LPFC_USER_LINK_SPEED_4G) | \ 544 (1 << LPFC_USER_LINK_SPEED_2G) | \ 545 (1 << LPFC_USER_LINK_SPEED_1G) | \ 546 (1 << LPFC_USER_LINK_SPEED_AUTO)) 547 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32" 548 549 enum nemb_type { 550 nemb_mse = 1, 551 nemb_hbd 552 }; 553 554 enum mbox_type { 555 mbox_rd = 1, 556 mbox_wr 557 }; 558 559 enum dma_type { 560 dma_mbox = 1, 561 dma_ebuf 562 }; 563 564 enum sta_type { 565 sta_pre_addr = 1, 566 sta_pos_addr 567 }; 568 569 struct lpfc_mbox_ext_buf_ctx { 570 uint32_t state; 571 #define LPFC_BSG_MBOX_IDLE 0 572 #define LPFC_BSG_MBOX_HOST 1 573 #define LPFC_BSG_MBOX_PORT 2 574 #define LPFC_BSG_MBOX_DONE 3 575 #define LPFC_BSG_MBOX_ABTS 4 576 enum nemb_type nembType; 577 enum mbox_type mboxType; 578 uint32_t numBuf; 579 uint32_t mbxTag; 580 uint32_t seqNum; 581 struct lpfc_dmabuf *mbx_dmabuf; 582 struct list_head ext_dmabuf_list; 583 }; 584 585 struct lpfc_hba { 586 /* SCSI interface function jump table entries */ 587 int (*lpfc_new_scsi_buf) 588 (struct lpfc_vport *, int); 589 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf) 590 (struct lpfc_hba *, struct lpfc_nodelist *); 591 int (*lpfc_scsi_prep_dma_buf) 592 (struct lpfc_hba *, struct lpfc_scsi_buf *); 593 void (*lpfc_scsi_unprep_dma_buf) 594 (struct lpfc_hba *, struct lpfc_scsi_buf *); 595 void (*lpfc_release_scsi_buf) 596 (struct lpfc_hba *, struct lpfc_scsi_buf *); 597 void (*lpfc_rampdown_queue_depth) 598 (struct lpfc_hba *); 599 void (*lpfc_scsi_prep_cmnd) 600 (struct lpfc_vport *, struct lpfc_scsi_buf *, 601 struct lpfc_nodelist *); 602 603 /* IOCB interface function jump table entries */ 604 int (*__lpfc_sli_issue_iocb) 605 (struct lpfc_hba *, uint32_t, 606 struct lpfc_iocbq *, uint32_t); 607 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 608 struct lpfc_iocbq *); 609 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 610 IOCB_t * (*lpfc_get_iocb_from_iocbq) 611 (struct lpfc_iocbq *); 612 void (*lpfc_scsi_cmd_iocb_cmpl) 613 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 614 615 /* MBOX interface function jump table entries */ 616 int (*lpfc_sli_issue_mbox) 617 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 618 619 /* Slow-path IOCB process function jump table entries */ 620 void (*lpfc_sli_handle_slow_ring_event) 621 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 622 uint32_t mask); 623 624 /* INIT device interface function jump table entries */ 625 int (*lpfc_sli_hbq_to_firmware) 626 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 627 int (*lpfc_sli_brdrestart) 628 (struct lpfc_hba *); 629 int (*lpfc_sli_brdready) 630 (struct lpfc_hba *, uint32_t); 631 void (*lpfc_handle_eratt) 632 (struct lpfc_hba *); 633 void (*lpfc_stop_port) 634 (struct lpfc_hba *); 635 int (*lpfc_hba_init_link) 636 (struct lpfc_hba *, uint32_t); 637 int (*lpfc_hba_down_link) 638 (struct lpfc_hba *, uint32_t); 639 int (*lpfc_selective_reset) 640 (struct lpfc_hba *); 641 642 int (*lpfc_bg_scsi_prep_dma_buf) 643 (struct lpfc_hba *, struct lpfc_scsi_buf *); 644 /* Add new entries here */ 645 646 /* SLI4 specific HBA data structure */ 647 struct lpfc_sli4_hba sli4_hba; 648 649 struct lpfc_sli sli; 650 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 651 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 652 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 653 #define LPFC_SLI3_HBQ_ENABLED 0x01 654 #define LPFC_SLI3_NPIV_ENABLED 0x02 655 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 656 #define LPFC_SLI3_CRP_ENABLED 0x08 657 #define LPFC_SLI3_BG_ENABLED 0x20 658 #define LPFC_SLI3_DSS_ENABLED 0x40 659 #define LPFC_SLI4_PERFH_ENABLED 0x80 660 #define LPFC_SLI4_PHWQ_ENABLED 0x100 661 uint32_t iocb_cmd_size; 662 uint32_t iocb_rsp_size; 663 664 enum hba_state link_state; 665 uint32_t link_flag; /* link state flags */ 666 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 667 /* This flag is set while issuing */ 668 /* INIT_LINK mailbox command */ 669 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 670 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 671 672 uint32_t hba_flag; /* hba generic flags */ 673 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 674 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 675 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 676 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 677 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 678 #define FCP_XRI_ABORT_EVENT 0x20 679 #define ELS_XRI_ABORT_EVENT 0x40 680 #define ASYNC_EVENT 0x80 681 #define LINK_DISABLED 0x100 /* Link disabled by user */ 682 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 683 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 684 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 685 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 686 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 687 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 688 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */ 689 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 690 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 691 #define HBA_FORCED_LINK_SPEED 0x40000 /* 692 * Firmware supports Forced Link Speed 693 * capability 694 */ 695 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */ 696 #define NVME_XRI_ABORT_EVENT 0x100000 697 698 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 699 struct lpfc_dmabuf slim2p; 700 701 MAILBOX_t *mbox; 702 uint32_t *mbox_ext; 703 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 704 uint32_t ha_copy; 705 struct _PCB *pcb; 706 struct _IOCB *IOCBs; 707 708 struct lpfc_dmabuf hbqslimp; 709 710 uint16_t pci_cfg_value; 711 712 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 713 714 uint32_t fc_eventTag; /* event tag for link attention */ 715 uint32_t link_events; 716 717 /* These fields used to be binfo */ 718 uint32_t fc_pref_DID; /* preferred D_ID */ 719 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 720 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 721 uint32_t fc_edtov; /* E_D_TOV timer value */ 722 uint32_t fc_arbtov; /* ARB_TOV timer value */ 723 uint32_t fc_ratov; /* R_A_TOV timer value */ 724 uint32_t fc_rttov; /* R_T_TOV timer value */ 725 uint32_t fc_altov; /* AL_TOV timer value */ 726 uint32_t fc_crtov; /* C_R_TOV timer value */ 727 uint32_t fc_citov; /* C_I_TOV timer value */ 728 729 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 730 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 731 732 uint32_t lmt; 733 734 uint32_t fc_topology; /* link topology, from LINK INIT */ 735 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 736 737 struct lpfc_stats fc_stat; 738 739 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 740 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 741 742 uint8_t wwnn[8]; 743 uint8_t wwpn[8]; 744 uint32_t RandomData[7]; 745 uint8_t fcp_embed_io; 746 uint8_t nvme_support; /* Firmware supports NVME */ 747 uint8_t nvmet_support; /* driver supports NVMET */ 748 #define LPFC_NVMET_MAX_PORTS 32 749 uint8_t mds_diags_support; 750 751 /* HBA Config Parameters */ 752 uint32_t cfg_ack0; 753 uint32_t cfg_enable_npiv; 754 uint32_t cfg_enable_rrq; 755 uint32_t cfg_topology; 756 uint32_t cfg_link_speed; 757 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 758 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 759 uint32_t cfg_fcf_failover_policy; 760 uint32_t cfg_fcp_io_sched; 761 uint32_t cfg_fcp2_no_tgt_reset; 762 uint32_t cfg_cr_delay; 763 uint32_t cfg_cr_count; 764 uint32_t cfg_multi_ring_support; 765 uint32_t cfg_multi_ring_rctl; 766 uint32_t cfg_multi_ring_type; 767 uint32_t cfg_poll; 768 uint32_t cfg_poll_tmo; 769 uint32_t cfg_task_mgmt_tmo; 770 uint32_t cfg_use_msi; 771 uint32_t cfg_fcp_imax; 772 uint32_t cfg_fcp_cpu_map; 773 uint32_t cfg_fcp_io_channel; 774 uint32_t cfg_suppress_rsp; 775 uint32_t cfg_nvme_oas; 776 uint32_t cfg_nvme_io_channel; 777 uint32_t cfg_nvmet_mrq; 778 uint32_t cfg_nvmet_mrq_post; 779 uint32_t cfg_enable_nvmet; 780 uint32_t cfg_nvme_enable_fb; 781 uint32_t cfg_nvmet_fb_size; 782 uint32_t cfg_total_seg_cnt; 783 uint32_t cfg_sg_seg_cnt; 784 uint32_t cfg_sg_dma_buf_size; 785 uint64_t cfg_soft_wwnn; 786 uint64_t cfg_soft_wwpn; 787 uint32_t cfg_hba_queue_depth; 788 uint32_t cfg_enable_hba_reset; 789 uint32_t cfg_enable_hba_heartbeat; 790 uint32_t cfg_fof; 791 uint32_t cfg_EnableXLane; 792 uint8_t cfg_oas_tgt_wwpn[8]; 793 uint8_t cfg_oas_vpt_wwpn[8]; 794 uint32_t cfg_oas_lun_state; 795 #define OAS_LUN_ENABLE 1 796 #define OAS_LUN_DISABLE 0 797 uint32_t cfg_oas_lun_status; 798 #define OAS_LUN_STATUS_EXISTS 0x01 799 uint32_t cfg_oas_flags; 800 #define OAS_FIND_ANY_VPORT 0x01 801 #define OAS_FIND_ANY_TARGET 0x02 802 #define OAS_LUN_VALID 0x04 803 uint32_t cfg_oas_priority; 804 uint32_t cfg_XLanePriority; 805 uint32_t cfg_enable_bg; 806 uint32_t cfg_prot_mask; 807 uint32_t cfg_prot_guard; 808 uint32_t cfg_hostmem_hgp; 809 uint32_t cfg_log_verbose; 810 uint32_t cfg_aer_support; 811 uint32_t cfg_sriov_nr_virtfn; 812 uint32_t cfg_request_firmware_upgrade; 813 uint32_t cfg_iocb_cnt; 814 uint32_t cfg_suppress_link_up; 815 uint32_t cfg_rrq_xri_bitmap_sz; 816 uint32_t cfg_delay_discovery; 817 uint32_t cfg_sli_mode; 818 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 819 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 820 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 821 uint32_t cfg_enable_dss; 822 uint32_t cfg_fdmi_on; 823 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 824 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 825 uint32_t cfg_enable_SmartSAN; 826 uint32_t cfg_enable_mds_diags; 827 uint32_t cfg_enable_fc4_type; 828 uint32_t cfg_xri_split; 829 #define LPFC_ENABLE_FCP 1 830 #define LPFC_ENABLE_NVME 2 831 #define LPFC_ENABLE_BOTH 3 832 uint32_t io_channel_irqs; /* number of irqs for io channels */ 833 struct nvmet_fc_target_port *targetport; 834 lpfc_vpd_t vpd; /* vital product data */ 835 836 struct pci_dev *pcidev; 837 struct list_head work_list; 838 uint32_t work_ha; /* Host Attention Bits for WT */ 839 uint32_t work_ha_mask; /* HA Bits owned by WT */ 840 uint32_t work_hs; /* HS stored in case of ERRAT */ 841 uint32_t work_status[2]; /* Extra status from SLIM */ 842 843 wait_queue_head_t work_waitq; 844 struct task_struct *worker_thread; 845 unsigned long data_flags; 846 847 uint32_t hbq_in_use; /* HBQs in use flag */ 848 uint32_t hbq_count; /* Count of configured HBQs */ 849 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 850 851 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 852 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 853 854 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 855 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 856 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 857 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 858 PCI BAR0 */ 859 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 860 PCI BAR2 */ 861 862 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 863 PCI BAR0 with dual-ULP support */ 864 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 865 PCI BAR2 with dual-ULP support */ 866 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 867 PCI BAR4 with dual-ULP support */ 868 #define PCI_64BIT_BAR0 0 869 #define PCI_64BIT_BAR2 2 870 #define PCI_64BIT_BAR4 4 871 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 872 void __iomem *HAregaddr; /* virtual address for host attn reg */ 873 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 874 void __iomem *HSregaddr; /* virtual address for host status 875 reg */ 876 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 877 878 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 879 struct lpfc_pgp *port_gp; 880 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 881 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 882 883 int brd_no; /* FC board number */ 884 char SerialNumber[32]; /* adapter Serial Number */ 885 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 886 char ModelDesc[256]; /* Model Description */ 887 char ModelName[80]; /* Model Name */ 888 char ProgramType[256]; /* Program Type */ 889 char Port[20]; /* Port No */ 890 uint8_t vpd_flag; /* VPD data flag */ 891 892 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 893 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 894 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 895 #define VPD_PORT 0x8 /* valid vpd port data */ 896 #define VPD_MASK 0xf /* mask for any vpd data */ 897 898 uint8_t soft_wwn_enable; 899 900 struct timer_list fcp_poll_timer; 901 struct timer_list eratt_poll; 902 uint32_t eratt_poll_interval; 903 904 /* 905 * stat counters 906 */ 907 uint64_t fc4ScsiInputRequests; 908 uint64_t fc4ScsiOutputRequests; 909 uint64_t fc4ScsiControlRequests; 910 uint64_t fc4ScsiIoCmpls; 911 uint64_t fc4NvmeInputRequests; 912 uint64_t fc4NvmeOutputRequests; 913 uint64_t fc4NvmeControlRequests; 914 uint64_t fc4NvmeIoCmpls; 915 uint64_t fc4NvmeLsRequests; 916 uint64_t fc4NvmeLsCmpls; 917 918 uint64_t bg_guard_err_cnt; 919 uint64_t bg_apptag_err_cnt; 920 uint64_t bg_reftag_err_cnt; 921 922 /* fastpath list. */ 923 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 924 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 925 struct list_head lpfc_scsi_buf_list_get; 926 struct list_head lpfc_scsi_buf_list_put; 927 uint32_t total_scsi_bufs; 928 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */ 929 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */ 930 struct list_head lpfc_nvme_buf_list_get; 931 struct list_head lpfc_nvme_buf_list_put; 932 uint32_t total_nvme_bufs; 933 struct list_head lpfc_iocb_list; 934 uint32_t total_iocbq_bufs; 935 struct list_head active_rrq_list; 936 spinlock_t hbalock; 937 938 /* pci_mem_pools */ 939 struct pci_pool *lpfc_sg_dma_buf_pool; 940 struct pci_pool *lpfc_mbuf_pool; 941 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */ 942 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */ 943 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 944 struct pci_pool *txrdy_payload_pool; 945 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 946 947 mempool_t *mbox_mem_pool; 948 mempool_t *nlp_mem_pool; 949 mempool_t *rrq_pool; 950 mempool_t *active_rrq_pool; 951 952 struct fc_host_statistics link_stats; 953 enum intr_type_t intr_type; 954 uint32_t intr_mode; 955 #define LPFC_INTR_ERROR 0xFFFFFFFF 956 struct list_head port_list; 957 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 958 uint16_t max_vpi; /* Maximum virtual nports */ 959 #define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */ 960 uint16_t max_vports; /* 961 * For IOV HBAs max_vpi can change 962 * after a reset. max_vports is max 963 * number of vports present. This can 964 * be greater than max_vpi. 965 */ 966 uint16_t vpi_base; 967 uint16_t vfi_base; 968 unsigned long *vpi_bmask; /* vpi allocation table */ 969 uint16_t *vpi_ids; 970 uint16_t vpi_count; 971 struct list_head lpfc_vpi_blk_list; 972 973 /* Data structure used by fabric iocb scheduler */ 974 struct list_head fabric_iocb_list; 975 atomic_t fabric_iocb_count; 976 struct timer_list fabric_block_timer; 977 unsigned long bit_flags; 978 #define FABRIC_COMANDS_BLOCKED 0 979 atomic_t num_rsrc_err; 980 atomic_t num_cmd_success; 981 unsigned long last_rsrc_error_time; 982 unsigned long last_ramp_down_time; 983 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 984 struct dentry *hba_debugfs_root; 985 atomic_t debugfs_vport_count; 986 struct dentry *debug_hbqinfo; 987 struct dentry *debug_dumpHostSlim; 988 struct dentry *debug_dumpHBASlim; 989 struct dentry *debug_dumpData; /* BlockGuard BPL */ 990 struct dentry *debug_dumpDif; /* BlockGuard BPL */ 991 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 992 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 993 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 994 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 995 struct dentry *debug_writeApp; /* inject write app_tag errors */ 996 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 997 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 998 struct dentry *debug_readApp; /* inject read app_tag errors */ 999 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1000 1001 struct dentry *debug_nvmeio_trc; 1002 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1003 atomic_t nvmeio_trc_cnt; 1004 uint32_t nvmeio_trc_size; 1005 uint32_t nvmeio_trc_output_idx; 1006 1007 /* T10 DIF error injection */ 1008 uint32_t lpfc_injerr_wgrd_cnt; 1009 uint32_t lpfc_injerr_wapp_cnt; 1010 uint32_t lpfc_injerr_wref_cnt; 1011 uint32_t lpfc_injerr_rgrd_cnt; 1012 uint32_t lpfc_injerr_rapp_cnt; 1013 uint32_t lpfc_injerr_rref_cnt; 1014 uint32_t lpfc_injerr_nportid; 1015 struct lpfc_name lpfc_injerr_wwpn; 1016 sector_t lpfc_injerr_lba; 1017 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1018 1019 struct dentry *debug_slow_ring_trc; 1020 struct lpfc_debugfs_trc *slow_ring_trc; 1021 atomic_t slow_ring_trc_cnt; 1022 /* iDiag debugfs sub-directory */ 1023 struct dentry *idiag_root; 1024 struct dentry *idiag_pci_cfg; 1025 struct dentry *idiag_bar_acc; 1026 struct dentry *idiag_que_info; 1027 struct dentry *idiag_que_acc; 1028 struct dentry *idiag_drb_acc; 1029 struct dentry *idiag_ctl_acc; 1030 struct dentry *idiag_mbx_acc; 1031 struct dentry *idiag_ext_acc; 1032 uint8_t lpfc_idiag_last_eq; 1033 #endif 1034 uint16_t nvmeio_trc_on; 1035 1036 /* Used for deferred freeing of ELS data buffers */ 1037 struct list_head elsbuf; 1038 int elsbuf_cnt; 1039 int elsbuf_prev_cnt; 1040 1041 uint8_t temp_sensor_support; 1042 /* Fields used for heart beat. */ 1043 unsigned long last_completion_time; 1044 unsigned long skipped_hb; 1045 struct timer_list hb_tmofunc; 1046 uint8_t hb_outstanding; 1047 struct timer_list rrq_tmr; 1048 enum hba_temp_state over_temp_state; 1049 /* ndlp reference management */ 1050 spinlock_t ndlp_lock; 1051 /* 1052 * Following bit will be set for all buffer tags which are not 1053 * associated with any HBQ. 1054 */ 1055 #define QUE_BUFTAG_BIT (1<<31) 1056 uint32_t buffer_tag_count; 1057 int wait_4_mlo_maint_flg; 1058 wait_queue_head_t wait_4_mlo_m_q; 1059 /* data structure used for latency data collection */ 1060 #define LPFC_NO_BUCKET 0 1061 #define LPFC_LINEAR_BUCKET 1 1062 #define LPFC_POWER2_BUCKET 2 1063 uint8_t bucket_type; 1064 uint32_t bucket_base; 1065 uint32_t bucket_step; 1066 1067 /* Maximum number of events that can be outstanding at any time*/ 1068 #define LPFC_MAX_EVT_COUNT 512 1069 atomic_t fast_event_count; 1070 uint32_t fcoe_eventtag; 1071 uint32_t fcoe_eventtag_at_fcf_scan; 1072 uint32_t fcoe_cvl_eventtag; 1073 uint32_t fcoe_cvl_eventtag_attn; 1074 struct lpfc_fcf fcf; 1075 uint8_t fc_map[3]; 1076 uint8_t valid_vlan; 1077 uint16_t vlan_id; 1078 struct list_head fcf_conn_rec_list; 1079 1080 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1081 struct list_head ct_ev_waiters; 1082 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1083 uint32_t ctx_idx; 1084 1085 uint8_t menlo_flag; /* menlo generic flags */ 1086 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1087 uint32_t iocb_cnt; 1088 uint32_t iocb_max; 1089 atomic_t sdev_cnt; 1090 uint8_t fips_spec_rev; 1091 uint8_t fips_level; 1092 spinlock_t devicelock; /* lock for luns list */ 1093 mempool_t *device_data_mem_pool; 1094 struct list_head luns; 1095 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1096 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1097 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1098 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1099 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1100 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1101 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1102 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1103 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1104 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1105 uint16_t sfp_alarm; 1106 uint16_t sfp_warning; 1107 1108 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1109 #define LPFC_CHECK_CPU_CNT 32 1110 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT]; 1111 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 1112 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 1113 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT]; 1114 uint16_t cpucheck_on; 1115 #define LPFC_CHECK_OFF 0 1116 #define LPFC_CHECK_NVME_IO 1 1117 #define LPFC_CHECK_NVMET_RCV 2 1118 #define LPFC_CHECK_NVMET_IO 4 1119 uint16_t ktime_on; 1120 uint64_t ktime_data_samples; 1121 uint64_t ktime_status_samples; 1122 uint64_t ktime_last_cmd; 1123 uint64_t ktime_seg1_total; 1124 uint64_t ktime_seg1_min; 1125 uint64_t ktime_seg1_max; 1126 uint64_t ktime_seg2_total; 1127 uint64_t ktime_seg2_min; 1128 uint64_t ktime_seg2_max; 1129 uint64_t ktime_seg3_total; 1130 uint64_t ktime_seg3_min; 1131 uint64_t ktime_seg3_max; 1132 uint64_t ktime_seg4_total; 1133 uint64_t ktime_seg4_min; 1134 uint64_t ktime_seg4_max; 1135 uint64_t ktime_seg5_total; 1136 uint64_t ktime_seg5_min; 1137 uint64_t ktime_seg5_max; 1138 uint64_t ktime_seg6_total; 1139 uint64_t ktime_seg6_min; 1140 uint64_t ktime_seg6_max; 1141 uint64_t ktime_seg7_total; 1142 uint64_t ktime_seg7_min; 1143 uint64_t ktime_seg7_max; 1144 uint64_t ktime_seg8_total; 1145 uint64_t ktime_seg8_min; 1146 uint64_t ktime_seg8_max; 1147 uint64_t ktime_seg9_total; 1148 uint64_t ktime_seg9_min; 1149 uint64_t ktime_seg9_max; 1150 uint64_t ktime_seg10_total; 1151 uint64_t ktime_seg10_min; 1152 uint64_t ktime_seg10_max; 1153 #endif 1154 }; 1155 1156 static inline struct Scsi_Host * 1157 lpfc_shost_from_vport(struct lpfc_vport *vport) 1158 { 1159 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1160 } 1161 1162 static inline void 1163 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1164 { 1165 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1166 phba->link_flag |= LS_LOOPBACK_MODE; 1167 else 1168 phba->link_flag &= ~LS_LOOPBACK_MODE; 1169 } 1170 1171 static inline int 1172 lpfc_is_link_up(struct lpfc_hba *phba) 1173 { 1174 return phba->link_state == LPFC_LINK_UP || 1175 phba->link_state == LPFC_CLEAR_LA || 1176 phba->link_state == LPFC_HBA_READY; 1177 } 1178 1179 static inline void 1180 lpfc_worker_wake_up(struct lpfc_hba *phba) 1181 { 1182 /* Set the lpfc data pending flag */ 1183 set_bit(LPFC_DATA_READY, &phba->data_flags); 1184 1185 /* Wake up worker thread */ 1186 wake_up(&phba->work_waitq); 1187 return; 1188 } 1189 1190 static inline int 1191 lpfc_readl(void __iomem *addr, uint32_t *data) 1192 { 1193 uint32_t temp; 1194 temp = readl(addr); 1195 if (temp == 0xffffffff) 1196 return -EIO; 1197 *data = temp; 1198 return 0; 1199 } 1200 1201 static inline int 1202 lpfc_sli_read_hs(struct lpfc_hba *phba) 1203 { 1204 /* 1205 * There was a link/board error. Read the status register to retrieve 1206 * the error event and process it. 1207 */ 1208 phba->sli.slistat.err_attn_event++; 1209 1210 /* Save status info and check for unplug error */ 1211 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1212 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1213 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1214 return -EIO; 1215 } 1216 1217 /* Clear chip Host Attention error bit */ 1218 writel(HA_ERATT, phba->HAregaddr); 1219 readl(phba->HAregaddr); /* flush */ 1220 phba->pport->stopped = 1; 1221 1222 return 0; 1223 } 1224 1225 static inline struct lpfc_sli_ring * 1226 lpfc_phba_elsring(struct lpfc_hba *phba) 1227 { 1228 if (phba->sli_rev == LPFC_SLI_REV4) 1229 return phba->sli4_hba.els_wq->pring; 1230 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1231 } 1232