1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2021 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/hashtable.h> 26 #include <linux/ktime.h> 27 #include <linux/workqueue.h> 28 29 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 30 #define CONFIG_SCSI_LPFC_DEBUG_FS 31 #endif 32 33 struct lpfc_sli2_slim; 34 35 #define ELX_MODEL_NAME_SIZE 80 36 37 #define LPFC_PCI_DEV_LP 0x1 38 #define LPFC_PCI_DEV_OC 0x2 39 40 #define LPFC_SLI_REV2 2 41 #define LPFC_SLI_REV3 3 42 #define LPFC_SLI_REV4 4 43 44 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 45 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 46 requests */ 47 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 48 the NameServer before giving up. */ 49 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 50 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 51 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 52 cmnd for menlo needs nearly twice as for firmware 53 downloads using bsg */ 54 55 #define LPFC_DEFAULT_XPSGL_SIZE 256 56 #define LPFC_MAX_SG_TABLESIZE 0xffff 57 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 58 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 59 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 60 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 61 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 62 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 63 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 64 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 65 66 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 67 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 68 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 69 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 70 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 71 #define LPFC_MIN_TGT_QDEPTH 10 72 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 73 74 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 75 collection. */ 76 /* 77 * Following time intervals are used of adjusting SCSI device 78 * queue depths when there are driver resource error or Firmware 79 * resource error. 80 */ 81 /* 1 Second */ 82 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 83 84 /* Number of exchanges reserved for discovery to complete */ 85 #define LPFC_DISC_IOCB_BUFF_COUNT 20 86 87 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 88 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 89 90 /* Error Attention event polling interval */ 91 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 92 93 /* Define macros for 64 bit support */ 94 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 95 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 96 #define getPaddr(high, low) ((dma_addr_t)( \ 97 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 98 /* Provide maximum configuration definitions. */ 99 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 100 #define FC_MAX_ADPTMSG 64 101 102 #define MAX_HBAEVT 32 103 #define MAX_HBAS_NO_RESET 16 104 105 /* Number of MSI-X vectors the driver uses */ 106 #define LPFC_MSIX_VECTORS 2 107 108 /* lpfc wait event data ready flag */ 109 #define LPFC_DATA_READY 0 /* bit 0 */ 110 111 /* queue dump line buffer size */ 112 #define LPFC_LBUF_SZ 128 113 114 /* mailbox system shutdown options */ 115 #define LPFC_MBX_NO_WAIT 0 116 #define LPFC_MBX_WAIT 1 117 118 #define LPFC_CFG_PARAM_MAGIC_NUM 0xFEAA0005 119 #define LPFC_PORT_CFG_NAME "/cfg/port.cfg" 120 121 #define lpfc_rangecheck(val, min, max) \ 122 ((uint)(val) >= (uint)(min) && (val) <= (max)) 123 124 enum lpfc_polling_flags { 125 ENABLE_FCP_RING_POLLING = 0x1, 126 DISABLE_FCP_RING_INT = 0x2 127 }; 128 129 struct perf_prof { 130 uint16_t cmd_cpu[40]; 131 uint16_t rsp_cpu[40]; 132 uint16_t qh_cpu[40]; 133 uint16_t wqidx[40]; 134 }; 135 136 /* 137 * Provide for FC4 TYPE x28 - NVME. The 138 * bit mask for FCP and NVME is 0x8 identically 139 * because they are 32 bit positions distance. 140 */ 141 #define LPFC_FC4_TYPE_BITMASK 0x00000100 142 143 /* Provide DMA memory definitions the driver uses per port instance. */ 144 struct lpfc_dmabuf { 145 struct list_head list; 146 void *virt; /* virtual address ptr */ 147 dma_addr_t phys; /* mapped address */ 148 uint32_t buffer_tag; /* used for tagged queue ring */ 149 }; 150 151 struct lpfc_nvmet_ctxbuf { 152 struct list_head list; 153 struct lpfc_async_xchg_ctx *context; 154 struct lpfc_iocbq *iocbq; 155 struct lpfc_sglq *sglq; 156 struct work_struct defer_work; 157 }; 158 159 struct lpfc_dma_pool { 160 struct lpfc_dmabuf *elements; 161 uint32_t max_count; 162 uint32_t current_count; 163 }; 164 165 struct hbq_dmabuf { 166 struct lpfc_dmabuf hbuf; 167 struct lpfc_dmabuf dbuf; 168 uint16_t total_size; 169 uint16_t bytes_recv; 170 uint32_t tag; 171 struct lpfc_cq_event cq_event; 172 unsigned long time_stamp; 173 void *context; 174 }; 175 176 struct rqb_dmabuf { 177 struct lpfc_dmabuf hbuf; 178 struct lpfc_dmabuf dbuf; 179 uint16_t total_size; 180 uint16_t bytes_recv; 181 uint16_t idx; 182 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 183 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 184 }; 185 186 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 187 #define MEM_PRI 0x100 188 189 190 /****************************************************************************/ 191 /* Device VPD save area */ 192 /****************************************************************************/ 193 typedef struct lpfc_vpd { 194 uint32_t status; /* vpd status value */ 195 uint32_t length; /* number of bytes actually returned */ 196 struct { 197 uint32_t rsvd1; /* Revision numbers */ 198 uint32_t biuRev; 199 uint32_t smRev; 200 uint32_t smFwRev; 201 uint32_t endecRev; 202 uint16_t rBit; 203 uint8_t fcphHigh; 204 uint8_t fcphLow; 205 uint8_t feaLevelHigh; 206 uint8_t feaLevelLow; 207 uint32_t postKernRev; 208 uint32_t opFwRev; 209 uint8_t opFwName[16]; 210 uint32_t sli1FwRev; 211 uint8_t sli1FwName[16]; 212 uint32_t sli2FwRev; 213 uint8_t sli2FwName[16]; 214 } rev; 215 struct { 216 #ifdef __BIG_ENDIAN_BITFIELD 217 uint32_t rsvd3 :20; /* Reserved */ 218 uint32_t rsvd2 : 3; /* Reserved */ 219 uint32_t cbg : 1; /* Configure BlockGuard */ 220 uint32_t cmv : 1; /* Configure Max VPIs */ 221 uint32_t ccrp : 1; /* Config Command Ring Polling */ 222 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 223 uint32_t chbs : 1; /* Cofigure Host Backing store */ 224 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 225 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 226 uint32_t cmx : 1; /* Configure Max XRIs */ 227 uint32_t cmr : 1; /* Configure Max RPIs */ 228 #else /* __LITTLE_ENDIAN */ 229 uint32_t cmr : 1; /* Configure Max RPIs */ 230 uint32_t cmx : 1; /* Configure Max XRIs */ 231 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 232 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 233 uint32_t chbs : 1; /* Cofigure Host Backing store */ 234 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 235 uint32_t ccrp : 1; /* Config Command Ring Polling */ 236 uint32_t cmv : 1; /* Configure Max VPIs */ 237 uint32_t cbg : 1; /* Configure BlockGuard */ 238 uint32_t rsvd2 : 3; /* Reserved */ 239 uint32_t rsvd3 :20; /* Reserved */ 240 #endif 241 } sli3Feat; 242 } lpfc_vpd_t; 243 244 245 /* 246 * lpfc stat counters 247 */ 248 struct lpfc_stats { 249 /* Statistics for ELS commands */ 250 uint32_t elsLogiCol; 251 uint32_t elsRetryExceeded; 252 uint32_t elsXmitRetry; 253 uint32_t elsDelayRetry; 254 uint32_t elsRcvDrop; 255 uint32_t elsRcvFrame; 256 uint32_t elsRcvRSCN; 257 uint32_t elsRcvRNID; 258 uint32_t elsRcvFARP; 259 uint32_t elsRcvFARPR; 260 uint32_t elsRcvFLOGI; 261 uint32_t elsRcvPLOGI; 262 uint32_t elsRcvADISC; 263 uint32_t elsRcvPDISC; 264 uint32_t elsRcvFAN; 265 uint32_t elsRcvLOGO; 266 uint32_t elsRcvPRLO; 267 uint32_t elsRcvPRLI; 268 uint32_t elsRcvLIRR; 269 uint32_t elsRcvRLS; 270 uint32_t elsRcvRPL; 271 uint32_t elsRcvRRQ; 272 uint32_t elsRcvRTV; 273 uint32_t elsRcvECHO; 274 uint32_t elsRcvLCB; 275 uint32_t elsRcvRDP; 276 uint32_t elsRcvRDF; 277 uint32_t elsXmitFLOGI; 278 uint32_t elsXmitFDISC; 279 uint32_t elsXmitPLOGI; 280 uint32_t elsXmitPRLI; 281 uint32_t elsXmitADISC; 282 uint32_t elsXmitLOGO; 283 uint32_t elsXmitSCR; 284 uint32_t elsXmitRSCN; 285 uint32_t elsXmitRNID; 286 uint32_t elsXmitFARP; 287 uint32_t elsXmitFARPR; 288 uint32_t elsXmitACC; 289 uint32_t elsXmitLSRJT; 290 291 uint32_t frameRcvBcast; 292 uint32_t frameRcvMulti; 293 uint32_t strayXmitCmpl; 294 uint32_t frameXmitDelay; 295 uint32_t xriCmdCmpl; 296 uint32_t xriStatErr; 297 uint32_t LinkUp; 298 uint32_t LinkDown; 299 uint32_t LinkMultiEvent; 300 uint32_t NoRcvBuf; 301 uint32_t fcpCmd; 302 uint32_t fcpCmpl; 303 uint32_t fcpRspErr; 304 uint32_t fcpRemoteStop; 305 uint32_t fcpPortRjt; 306 uint32_t fcpPortBusy; 307 uint32_t fcpError; 308 uint32_t fcpLocalErr; 309 }; 310 311 struct lpfc_hba; 312 313 314 #define LPFC_VMID_TIMER 300 /* timer interval in seconds */ 315 316 #define LPFC_MAX_VMID_SIZE 256 317 #define LPFC_COMPRESS_VMID_SIZE 16 318 319 union lpfc_vmid_io_tag { 320 u32 app_id; /* App Id vmid */ 321 u8 cs_ctl_vmid; /* Priority tag vmid */ 322 }; 323 324 #define JIFFIES_PER_HR (HZ * 60 * 60) 325 326 struct lpfc_vmid { 327 u8 flag; 328 #define LPFC_VMID_SLOT_FREE 0x0 329 #define LPFC_VMID_SLOT_USED 0x1 330 #define LPFC_VMID_REQ_REGISTER 0x2 331 #define LPFC_VMID_REGISTERED 0x4 332 #define LPFC_VMID_DE_REGISTER 0x8 333 char host_vmid[LPFC_MAX_VMID_SIZE]; 334 union lpfc_vmid_io_tag un; 335 struct hlist_node hnode; 336 u64 io_rd_cnt; 337 u64 io_wr_cnt; 338 u8 vmid_len; 339 u8 delete_inactive; /* Delete if inactive flag 0 = no, 1 = yes */ 340 u32 hash_index; 341 u64 __percpu *last_io_time; 342 }; 343 344 #define lpfc_vmid_is_type_priority_tag(vport)\ 345 (vport->vmid_priority_tagging ? 1 : 0) 346 347 #define LPFC_VMID_HASH_SIZE 256 348 #define LPFC_VMID_HASH_MASK 255 349 #define LPFC_VMID_HASH_SHIFT 6 350 351 struct lpfc_vmid_context { 352 struct lpfc_vmid *vmp; 353 struct lpfc_nodelist *nlp; 354 bool instantiated; 355 }; 356 357 struct lpfc_vmid_priority_range { 358 u8 low; 359 u8 high; 360 u8 qos; 361 }; 362 363 struct lpfc_vmid_priority_info { 364 u32 num_descriptors; 365 struct lpfc_vmid_priority_range *vmid_range; 366 }; 367 368 #define QFPA_EVEN_ONLY 0x01 369 #define QFPA_ODD_ONLY 0x02 370 #define QFPA_EVEN_ODD 0x03 371 372 enum discovery_state { 373 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 374 LPFC_VPORT_FAILED = 1, /* vport has failed */ 375 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 376 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 377 LPFC_FDISC = 8, /* FDISC sent for vport */ 378 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 379 * configured */ 380 LPFC_NS_REG = 10, /* Register with NameServer */ 381 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 382 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 383 * device authentication / discovery */ 384 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 385 LPFC_VPORT_READY = 32, 386 }; 387 388 enum hba_state { 389 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 390 LPFC_WARM_START = 1, /* HBA state after selective reset */ 391 LPFC_INIT_START = 2, /* Initial state after board reset */ 392 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 393 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 394 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 395 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 396 * CLEAR_LA */ 397 LPFC_HBA_READY = 32, 398 LPFC_HBA_ERROR = -1 399 }; 400 401 struct lpfc_trunk_link_state { 402 enum hba_state state; 403 uint8_t fault; 404 }; 405 406 struct lpfc_trunk_link { 407 struct lpfc_trunk_link_state link0, 408 link1, 409 link2, 410 link3; 411 }; 412 413 /* Format of congestion module parameters */ 414 struct lpfc_cgn_param { 415 uint32_t cgn_param_magic; 416 uint8_t cgn_param_version; /* version 1 */ 417 uint8_t cgn_param_mode; /* 0=off 1=managed 2=monitor only */ 418 #define LPFC_CFG_OFF 0 419 #define LPFC_CFG_MANAGED 1 420 #define LPFC_CFG_MONITOR 2 421 uint8_t cgn_rsvd1; 422 uint8_t cgn_rsvd2; 423 uint8_t cgn_param_level0; 424 uint8_t cgn_param_level1; 425 uint8_t cgn_param_level2; 426 uint8_t byte11; 427 uint8_t byte12; 428 uint8_t byte13; 429 uint8_t byte14; 430 uint8_t byte15; 431 }; 432 433 /* Max number of days of congestion data */ 434 #define LPFC_MAX_CGN_DAYS 10 435 436 /* Format of congestion buffer info 437 * This structure defines memory thats allocated and registered with 438 * the HBA firmware. When adding or removing fields from this structure 439 * the alignment must match the HBA firmware. 440 */ 441 442 struct lpfc_cgn_info { 443 /* Header */ 444 __le16 cgn_info_size; /* is sizeof(struct lpfc_cgn_info) */ 445 uint8_t cgn_info_version; /* represents format of structure */ 446 #define LPFC_CGN_INFO_V1 1 447 #define LPFC_CGN_INFO_V2 2 448 #define LPFC_CGN_INFO_V3 3 449 uint8_t cgn_info_mode; /* 0=off 1=managed 2=monitor only */ 450 uint8_t cgn_info_detect; 451 uint8_t cgn_info_action; 452 uint8_t cgn_info_level0; 453 uint8_t cgn_info_level1; 454 uint8_t cgn_info_level2; 455 456 /* Start Time */ 457 uint8_t cgn_info_month; 458 uint8_t cgn_info_day; 459 uint8_t cgn_info_year; 460 uint8_t cgn_info_hour; 461 uint8_t cgn_info_minute; 462 uint8_t cgn_info_second; 463 464 /* minute / hours / daily indices */ 465 uint8_t cgn_index_minute; 466 uint8_t cgn_index_hour; 467 uint8_t cgn_index_day; 468 469 __le16 cgn_warn_freq; 470 __le16 cgn_alarm_freq; 471 __le16 cgn_lunq; 472 uint8_t cgn_pad1[8]; 473 474 /* Driver Information */ 475 __le16 cgn_drvr_min[60]; 476 __le32 cgn_drvr_hr[24]; 477 __le32 cgn_drvr_day[LPFC_MAX_CGN_DAYS]; 478 479 /* Congestion Warnings */ 480 __le16 cgn_warn_min[60]; 481 __le32 cgn_warn_hr[24]; 482 __le32 cgn_warn_day[LPFC_MAX_CGN_DAYS]; 483 484 /* Latency Information */ 485 __le32 cgn_latency_min[60]; 486 __le32 cgn_latency_hr[24]; 487 __le32 cgn_latency_day[LPFC_MAX_CGN_DAYS]; 488 489 /* Bandwidth Information */ 490 __le16 cgn_bw_min[60]; 491 __le16 cgn_bw_hr[24]; 492 __le16 cgn_bw_day[LPFC_MAX_CGN_DAYS]; 493 494 /* Congestion Alarms */ 495 __le16 cgn_alarm_min[60]; 496 __le32 cgn_alarm_hr[24]; 497 __le32 cgn_alarm_day[LPFC_MAX_CGN_DAYS]; 498 499 /* Start of congestion statistics */ 500 uint8_t cgn_stat_npm; /* Notifications per minute */ 501 502 /* Start Time */ 503 uint8_t cgn_stat_month; 504 uint8_t cgn_stat_day; 505 uint8_t cgn_stat_year; 506 uint8_t cgn_stat_hour; 507 uint8_t cgn_stat_minute; 508 uint8_t cgn_pad2[2]; 509 510 __le32 cgn_notification; 511 __le32 cgn_peer_notification; 512 __le32 link_integ_notification; 513 __le32 delivery_notification; 514 515 uint8_t cgn_stat_cgn_month; /* Last congestion notification FPIN */ 516 uint8_t cgn_stat_cgn_day; 517 uint8_t cgn_stat_cgn_year; 518 uint8_t cgn_stat_cgn_hour; 519 uint8_t cgn_stat_cgn_min; 520 uint8_t cgn_stat_cgn_sec; 521 522 uint8_t cgn_stat_peer_month; /* Last peer congestion FPIN */ 523 uint8_t cgn_stat_peer_day; 524 uint8_t cgn_stat_peer_year; 525 uint8_t cgn_stat_peer_hour; 526 uint8_t cgn_stat_peer_min; 527 uint8_t cgn_stat_peer_sec; 528 529 uint8_t cgn_stat_lnk_month; /* Last link integrity FPIN */ 530 uint8_t cgn_stat_lnk_day; 531 uint8_t cgn_stat_lnk_year; 532 uint8_t cgn_stat_lnk_hour; 533 uint8_t cgn_stat_lnk_min; 534 uint8_t cgn_stat_lnk_sec; 535 536 uint8_t cgn_stat_del_month; /* Last delivery notification FPIN */ 537 uint8_t cgn_stat_del_day; 538 uint8_t cgn_stat_del_year; 539 uint8_t cgn_stat_del_hour; 540 uint8_t cgn_stat_del_min; 541 uint8_t cgn_stat_del_sec; 542 #define LPFC_CGN_STAT_SIZE 48 543 #define LPFC_CGN_DATA_SIZE (sizeof(struct lpfc_cgn_info) - \ 544 LPFC_CGN_STAT_SIZE - sizeof(uint32_t)) 545 546 __le32 cgn_info_crc; 547 #define LPFC_CGN_CRC32_MAGIC_NUMBER 0x1EDC6F41 548 #define LPFC_CGN_CRC32_SEED 0xFFFFFFFF 549 }; 550 551 #define LPFC_CGN_INFO_SZ (sizeof(struct lpfc_cgn_info) - \ 552 sizeof(uint32_t)) 553 554 struct lpfc_cgn_stat { 555 atomic64_t total_bytes; 556 atomic64_t rcv_bytes; 557 atomic64_t rx_latency; 558 #define LPFC_CGN_NOT_SENT 0xFFFFFFFFFFFFFFFFLL 559 atomic_t rx_io_cnt; 560 }; 561 562 struct lpfc_cgn_acqe_stat { 563 atomic64_t alarm; 564 atomic64_t warn; 565 }; 566 567 struct lpfc_vport { 568 struct lpfc_hba *phba; 569 struct list_head listentry; 570 uint8_t port_type; 571 #define LPFC_PHYSICAL_PORT 1 572 #define LPFC_NPIV_PORT 2 573 #define LPFC_FABRIC_PORT 3 574 enum discovery_state port_state; 575 576 uint16_t vpi; 577 uint16_t vfi; 578 uint8_t vpi_state; 579 #define LPFC_VPI_REGISTERED 0x1 580 581 uint32_t fc_flag; /* FC flags */ 582 /* Several of these flags are HBA centric and should be moved to 583 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 584 */ 585 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 586 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 587 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 588 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 589 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 590 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 591 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 592 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 593 #define FC_FABRIC 0x100 /* We are fabric attached */ 594 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 595 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 596 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 597 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 598 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 599 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 600 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 601 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 602 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 603 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 604 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 605 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 606 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 607 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 608 609 uint32_t ct_flags; 610 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 611 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 612 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 613 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 614 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 615 616 struct list_head fc_nodes; 617 618 /* Keep counters for the number of entries in each list. */ 619 uint16_t fc_plogi_cnt; 620 uint16_t fc_adisc_cnt; 621 uint16_t fc_reglogin_cnt; 622 uint16_t fc_prli_cnt; 623 uint16_t fc_unmap_cnt; 624 uint16_t fc_map_cnt; 625 uint16_t fc_npr_cnt; 626 uint16_t fc_unused_cnt; 627 struct serv_parm fc_sparam; /* buffer for our service parameters */ 628 629 uint32_t fc_myDID; /* fibre channel S_ID */ 630 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 631 struct lpfc_name fabric_portname; 632 struct lpfc_name fabric_nodename; 633 634 int32_t stopped; /* HBA has not been restarted since last ERATT */ 635 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 636 637 uint32_t num_disc_nodes; /* in addition to hba_state */ 638 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 639 640 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 641 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 642 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 643 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 644 struct lpfc_name fc_nodename; /* fc nodename */ 645 struct lpfc_name fc_portname; /* fc portname */ 646 647 struct lpfc_work_evt disc_timeout_evt; 648 649 struct timer_list fc_disctmo; /* Discovery rescue timer */ 650 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 651 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 652 653 spinlock_t work_port_lock; 654 uint32_t work_port_events; /* Timeout to be handled */ 655 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 656 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 657 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 658 659 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 660 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 661 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 662 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 663 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 664 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 665 #define WORKER_CHECK_INACTIVE_VMID 0x4000 /* hba: check inactive vmids */ 666 #define WORKER_CHECK_VMID_ISSUE_QFPA 0x8000 /* vport: Check if qfpa needs 667 * to be issued */ 668 669 struct timer_list els_tmofunc; 670 struct timer_list delayed_disc_tmo; 671 672 int unreg_vpi_cmpl; 673 674 uint8_t load_flag; 675 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 676 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 677 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 678 #define FC_ALLOW_VMID 0x8 /* Allow VMID I/Os */ 679 #define FC_DEREGISTER_ALL_APP_ID 0x10 /* Deregister all VMIDs */ 680 /* Vport Config Parameters */ 681 uint32_t cfg_scan_down; 682 uint32_t cfg_lun_queue_depth; 683 uint32_t cfg_nodev_tmo; 684 uint32_t cfg_devloss_tmo; 685 uint32_t cfg_restrict_login; 686 uint32_t cfg_peer_port_login; 687 uint32_t cfg_fcp_class; 688 uint32_t cfg_use_adisc; 689 uint32_t cfg_discovery_threads; 690 uint32_t cfg_log_verbose; 691 uint32_t cfg_enable_fc4_type; 692 uint32_t cfg_max_luns; 693 uint32_t cfg_enable_da_id; 694 uint32_t cfg_max_scsicmpl_time; 695 uint32_t cfg_tgt_queue_depth; 696 uint32_t cfg_first_burst_size; 697 uint32_t dev_loss_tmo_changed; 698 /* VMID parameters */ 699 u8 lpfc_vmid_host_uuid[LPFC_COMPRESS_VMID_SIZE]; 700 u32 max_vmid; /* maximum VMIDs allowed per port */ 701 u32 cur_vmid_cnt; /* Current VMID count */ 702 #define LPFC_MIN_VMID 4 703 #define LPFC_MAX_VMID 255 704 u32 vmid_inactivity_timeout; /* Time after which the VMID */ 705 /* deregisters from switch */ 706 u32 vmid_priority_tagging; 707 #define LPFC_VMID_PRIO_TAG_DISABLE 0 /* Disable */ 708 #define LPFC_VMID_PRIO_TAG_SUP_TARGETS 1 /* Allow supported targets only */ 709 #define LPFC_VMID_PRIO_TAG_ALL_TARGETS 2 /* Allow all targets */ 710 unsigned long *vmid_priority_range; 711 #define LPFC_VMID_MAX_PRIORITY_RANGE 256 712 #define LPFC_VMID_PRIORITY_BITMAP_SIZE 32 713 u8 vmid_flag; 714 #define LPFC_VMID_IN_USE 0x1 715 #define LPFC_VMID_ISSUE_QFPA 0x2 716 #define LPFC_VMID_QFPA_CMPL 0x4 717 #define LPFC_VMID_QOS_ENABLED 0x8 718 #define LPFC_VMID_TIMER_ENBLD 0x10 719 struct fc_qfpa_res *qfpa_res; 720 721 struct fc_vport *fc_vport; 722 723 struct lpfc_vmid *vmid; 724 DECLARE_HASHTABLE(hash_table, 8); 725 rwlock_t vmid_lock; 726 struct lpfc_vmid_priority_info vmid_priority; 727 728 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 729 struct dentry *debug_disc_trc; 730 struct dentry *debug_nodelist; 731 struct dentry *debug_nvmestat; 732 struct dentry *debug_scsistat; 733 struct dentry *debug_ioktime; 734 struct dentry *debug_hdwqstat; 735 struct dentry *vport_debugfs_root; 736 struct lpfc_debugfs_trc *disc_trc; 737 atomic_t disc_trc_cnt; 738 #endif 739 uint8_t stat_data_enabled; 740 uint8_t stat_data_blocked; 741 struct list_head rcv_buffer_list; 742 unsigned long rcv_buffer_time_stamp; 743 uint32_t vport_flag; 744 #define STATIC_VPORT 1 745 #define FAWWPN_SET 2 746 #define FAWWPN_PARAM_CHG 4 747 748 uint16_t fdmi_num_disc; 749 uint32_t fdmi_hba_mask; 750 uint32_t fdmi_port_mask; 751 752 /* There is a single nvme instance per vport. */ 753 struct nvme_fc_local_port *localport; 754 uint8_t nvmei_support; /* driver supports NVME Initiator */ 755 uint32_t last_fcp_wqidx; 756 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 757 }; 758 759 struct hbq_s { 760 uint16_t entry_count; /* Current number of HBQ slots */ 761 uint16_t buffer_count; /* Current number of buffers posted */ 762 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 763 uint32_t hbqPutIdx; /* HBQ slot to use */ 764 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 765 void *hbq_virt; /* Virtual ptr to this hbq */ 766 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 767 /* Callback for HBQ buffer allocation */ 768 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 769 /* Callback for HBQ buffer free */ 770 void (*hbq_free_buffer) (struct lpfc_hba *, 771 struct hbq_dmabuf *); 772 }; 773 774 /* this matches the position in the lpfc_hbq_defs array */ 775 #define LPFC_ELS_HBQ 0 776 #define LPFC_MAX_HBQS 1 777 778 enum hba_temp_state { 779 HBA_NORMAL_TEMP, 780 HBA_OVER_TEMP 781 }; 782 783 enum intr_type_t { 784 NONE = 0, 785 INTx, 786 MSI, 787 MSIX, 788 }; 789 790 #define LPFC_CT_CTX_MAX 64 791 struct unsol_rcv_ct_ctx { 792 uint32_t ctxt_id; 793 uint32_t SID; 794 uint32_t valid; 795 #define UNSOL_INVALID 0 796 #define UNSOL_VALID 1 797 uint16_t oxid; 798 uint16_t rxid; 799 }; 800 801 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 802 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 803 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 804 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 805 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 806 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 807 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 808 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 809 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 810 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 811 812 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 813 814 enum nemb_type { 815 nemb_mse = 1, 816 nemb_hbd 817 }; 818 819 enum mbox_type { 820 mbox_rd = 1, 821 mbox_wr 822 }; 823 824 enum dma_type { 825 dma_mbox = 1, 826 dma_ebuf 827 }; 828 829 enum sta_type { 830 sta_pre_addr = 1, 831 sta_pos_addr 832 }; 833 834 struct lpfc_mbox_ext_buf_ctx { 835 uint32_t state; 836 #define LPFC_BSG_MBOX_IDLE 0 837 #define LPFC_BSG_MBOX_HOST 1 838 #define LPFC_BSG_MBOX_PORT 2 839 #define LPFC_BSG_MBOX_DONE 3 840 #define LPFC_BSG_MBOX_ABTS 4 841 enum nemb_type nembType; 842 enum mbox_type mboxType; 843 uint32_t numBuf; 844 uint32_t mbxTag; 845 uint32_t seqNum; 846 struct lpfc_dmabuf *mbx_dmabuf; 847 struct list_head ext_dmabuf_list; 848 }; 849 850 struct lpfc_epd_pool { 851 /* Expedite pool */ 852 struct list_head list; 853 u32 count; 854 spinlock_t lock; /* lock for expedite pool */ 855 }; 856 857 enum ras_state { 858 INACTIVE, 859 REG_INPROGRESS, 860 ACTIVE 861 }; 862 863 struct lpfc_ras_fwlog { 864 uint8_t *fwlog_buff; 865 uint32_t fw_buffcount; /* Buffer size posted to FW */ 866 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 867 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 868 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 869 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 870 uint32_t fw_loglevel; /* Log level set */ 871 struct lpfc_dmabuf lwpd; 872 struct list_head fwlog_buff_list; 873 874 /* RAS support status on adapter */ 875 bool ras_hwsupport; /* RAS Support available on HW or not */ 876 bool ras_enabled; /* Ras Enabled for the function */ 877 #define LPFC_RAS_DISABLE_LOGGING 0x00 878 #define LPFC_RAS_ENABLE_LOGGING 0x01 879 enum ras_state state; /* RAS logging running state */ 880 }; 881 882 #define DBG_LOG_STR_SZ 256 883 #define DBG_LOG_SZ 256 884 885 struct dbg_log_ent { 886 char log[DBG_LOG_STR_SZ]; 887 u64 t_ns; 888 }; 889 890 enum lpfc_irq_chann_mode { 891 /* Assign IRQs to all possible cpus that have hardware queues */ 892 NORMAL_MODE, 893 894 /* Assign IRQs only to cpus on the same numa node as HBA */ 895 NUMA_MODE, 896 897 /* Assign IRQs only on non-hyperthreaded CPUs. This is the 898 * same as normal_mode, but assign IRQS only on physical CPUs. 899 */ 900 NHT_MODE, 901 }; 902 903 struct lpfc_hba { 904 /* SCSI interface function jump table entries */ 905 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 906 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 907 struct scsi_cmnd *cmnd); 908 int (*lpfc_scsi_prep_dma_buf) 909 (struct lpfc_hba *, struct lpfc_io_buf *); 910 void (*lpfc_scsi_unprep_dma_buf) 911 (struct lpfc_hba *, struct lpfc_io_buf *); 912 void (*lpfc_release_scsi_buf) 913 (struct lpfc_hba *, struct lpfc_io_buf *); 914 void (*lpfc_rampdown_queue_depth) 915 (struct lpfc_hba *); 916 void (*lpfc_scsi_prep_cmnd) 917 (struct lpfc_vport *, struct lpfc_io_buf *, 918 struct lpfc_nodelist *); 919 int (*lpfc_scsi_prep_cmnd_buf) 920 (struct lpfc_vport *vport, 921 struct lpfc_io_buf *lpfc_cmd, 922 uint8_t tmo); 923 924 /* IOCB interface function jump table entries */ 925 int (*__lpfc_sli_issue_iocb) 926 (struct lpfc_hba *, uint32_t, 927 struct lpfc_iocbq *, uint32_t); 928 int (*__lpfc_sli_issue_fcp_io) 929 (struct lpfc_hba *phba, uint32_t ring_number, 930 struct lpfc_iocbq *piocb, uint32_t flag); 931 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 932 struct lpfc_iocbq *); 933 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 934 IOCB_t * (*lpfc_get_iocb_from_iocbq) 935 (struct lpfc_iocbq *); 936 void (*lpfc_scsi_cmd_iocb_cmpl) 937 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 938 939 /* MBOX interface function jump table entries */ 940 int (*lpfc_sli_issue_mbox) 941 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 942 943 /* Slow-path IOCB process function jump table entries */ 944 void (*lpfc_sli_handle_slow_ring_event) 945 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 946 uint32_t mask); 947 948 /* INIT device interface function jump table entries */ 949 int (*lpfc_sli_hbq_to_firmware) 950 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 951 int (*lpfc_sli_brdrestart) 952 (struct lpfc_hba *); 953 int (*lpfc_sli_brdready) 954 (struct lpfc_hba *, uint32_t); 955 void (*lpfc_handle_eratt) 956 (struct lpfc_hba *); 957 void (*lpfc_stop_port) 958 (struct lpfc_hba *); 959 int (*lpfc_hba_init_link) 960 (struct lpfc_hba *, uint32_t); 961 int (*lpfc_hba_down_link) 962 (struct lpfc_hba *, uint32_t); 963 int (*lpfc_selective_reset) 964 (struct lpfc_hba *); 965 966 int (*lpfc_bg_scsi_prep_dma_buf) 967 (struct lpfc_hba *, struct lpfc_io_buf *); 968 /* Add new entries here */ 969 970 /* expedite pool */ 971 struct lpfc_epd_pool epd_pool; 972 973 /* SLI4 specific HBA data structure */ 974 struct lpfc_sli4_hba sli4_hba; 975 976 struct workqueue_struct *wq; 977 struct delayed_work eq_delay_work; 978 979 #define LPFC_IDLE_STAT_DELAY 1000 980 struct delayed_work idle_stat_delay_work; 981 982 struct lpfc_sli sli; 983 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 984 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 985 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 986 #define LPFC_SLI3_HBQ_ENABLED 0x01 987 #define LPFC_SLI3_NPIV_ENABLED 0x02 988 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 989 #define LPFC_SLI3_CRP_ENABLED 0x08 990 #define LPFC_SLI3_BG_ENABLED 0x20 991 #define LPFC_SLI3_DSS_ENABLED 0x40 992 #define LPFC_SLI4_PERFH_ENABLED 0x80 993 #define LPFC_SLI4_PHWQ_ENABLED 0x100 994 uint32_t iocb_cmd_size; 995 uint32_t iocb_rsp_size; 996 997 struct lpfc_trunk_link trunk_link; 998 enum hba_state link_state; 999 uint32_t link_flag; /* link state flags */ 1000 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 1001 /* This flag is set while issuing */ 1002 /* INIT_LINK mailbox command */ 1003 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 1004 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 1005 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 1006 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 1007 #define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */ 1008 1009 uint32_t hba_flag; /* hba generic flags */ 1010 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 1011 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 1012 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 1013 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 1014 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 1015 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */ 1016 #define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */ 1017 #define ASYNC_EVENT 0x80 1018 #define LINK_DISABLED 0x100 /* Link disabled by user */ 1019 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 1020 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 1021 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 1022 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 1023 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 1024 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 1025 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 1026 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 1027 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 1028 #define HBA_FORCED_LINK_SPEED 0x40000 /* 1029 * Firmware supports Forced Link Speed 1030 * capability 1031 */ 1032 #define HBA_PCI_ERR 0x80000 /* The PCI slot is offline */ 1033 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 1034 #define HBA_CGN_RSVD1 0x200000 /* Reserved CGN flag */ 1035 #define HBA_CGN_DAY_WRAP 0x400000 /* HBA Congestion info day wraps */ 1036 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */ 1037 #define HBA_SETUP 0x1000000 /* Signifies HBA setup is completed */ 1038 #define HBA_NEEDS_CFG_PORT 0x2000000 /* SLI3 - needs a CONFIG_PORT mbox */ 1039 #define HBA_HBEAT_INP 0x4000000 /* mbox HBEAT is in progress */ 1040 #define HBA_HBEAT_TMO 0x8000000 /* HBEAT initiated after timeout */ 1041 #define HBA_FLOGI_OUTSTANDING 0x10000000 /* FLOGI is outstanding */ 1042 1043 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 1044 struct lpfc_dmabuf slim2p; 1045 1046 MAILBOX_t *mbox; 1047 uint32_t *mbox_ext; 1048 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 1049 uint32_t ha_copy; 1050 struct _PCB *pcb; 1051 struct _IOCB *IOCBs; 1052 1053 struct lpfc_dmabuf hbqslimp; 1054 1055 uint16_t pci_cfg_value; 1056 1057 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 1058 1059 uint32_t fc_eventTag; /* event tag for link attention */ 1060 uint32_t link_events; 1061 1062 /* These fields used to be binfo */ 1063 uint32_t fc_pref_DID; /* preferred D_ID */ 1064 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 1065 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 1066 uint32_t fc_edtov; /* E_D_TOV timer value */ 1067 uint32_t fc_arbtov; /* ARB_TOV timer value */ 1068 uint32_t fc_ratov; /* R_A_TOV timer value */ 1069 uint32_t fc_rttov; /* R_T_TOV timer value */ 1070 uint32_t fc_altov; /* AL_TOV timer value */ 1071 uint32_t fc_crtov; /* C_R_TOV timer value */ 1072 1073 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 1074 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 1075 1076 uint32_t lmt; 1077 1078 uint32_t fc_topology; /* link topology, from LINK INIT */ 1079 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 1080 1081 struct lpfc_stats fc_stat; 1082 1083 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 1084 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 1085 1086 uint8_t wwnn[8]; 1087 uint8_t wwpn[8]; 1088 uint32_t RandomData[7]; 1089 uint8_t fcp_embed_io; 1090 uint8_t nvmet_support; /* driver supports NVMET */ 1091 #define LPFC_NVMET_MAX_PORTS 32 1092 uint8_t mds_diags_support; 1093 uint8_t bbcredit_support; 1094 uint8_t enab_exp_wqcq_pages; 1095 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 1096 1097 /* HBA Config Parameters */ 1098 uint32_t cfg_ack0; 1099 uint32_t cfg_xri_rebalancing; 1100 uint32_t cfg_xpsgl; 1101 uint32_t cfg_enable_npiv; 1102 uint32_t cfg_enable_rrq; 1103 uint32_t cfg_topology; 1104 uint32_t cfg_link_speed; 1105 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 1106 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 1107 uint32_t cfg_fcf_failover_policy; 1108 uint32_t cfg_fcp_io_sched; 1109 uint32_t cfg_ns_query; 1110 uint32_t cfg_fcp2_no_tgt_reset; 1111 uint32_t cfg_cr_delay; 1112 uint32_t cfg_cr_count; 1113 uint32_t cfg_multi_ring_support; 1114 uint32_t cfg_multi_ring_rctl; 1115 uint32_t cfg_multi_ring_type; 1116 uint32_t cfg_poll; 1117 uint32_t cfg_poll_tmo; 1118 uint32_t cfg_task_mgmt_tmo; 1119 uint32_t cfg_use_msi; 1120 uint32_t cfg_auto_imax; 1121 uint32_t cfg_fcp_imax; 1122 uint32_t cfg_force_rscn; 1123 uint32_t cfg_cq_poll_threshold; 1124 uint32_t cfg_cq_max_proc_limit; 1125 uint32_t cfg_fcp_cpu_map; 1126 uint32_t cfg_fcp_mq_threshold; 1127 uint32_t cfg_hdw_queue; 1128 uint32_t cfg_irq_chann; 1129 uint32_t cfg_suppress_rsp; 1130 uint32_t cfg_nvme_oas; 1131 uint32_t cfg_nvme_embed_cmd; 1132 uint32_t cfg_nvmet_mrq_post; 1133 uint32_t cfg_nvmet_mrq; 1134 uint32_t cfg_enable_nvmet; 1135 uint32_t cfg_nvme_enable_fb; 1136 uint32_t cfg_nvmet_fb_size; 1137 uint32_t cfg_total_seg_cnt; 1138 uint32_t cfg_sg_seg_cnt; 1139 uint32_t cfg_nvme_seg_cnt; 1140 uint32_t cfg_scsi_seg_cnt; 1141 uint32_t cfg_sg_dma_buf_size; 1142 uint64_t cfg_soft_wwnn; 1143 uint64_t cfg_soft_wwpn; 1144 uint32_t cfg_hba_queue_depth; 1145 uint32_t cfg_enable_hba_reset; 1146 uint32_t cfg_enable_hba_heartbeat; 1147 uint32_t cfg_fof; 1148 uint32_t cfg_EnableXLane; 1149 uint8_t cfg_oas_tgt_wwpn[8]; 1150 uint8_t cfg_oas_vpt_wwpn[8]; 1151 uint32_t cfg_oas_lun_state; 1152 #define OAS_LUN_ENABLE 1 1153 #define OAS_LUN_DISABLE 0 1154 uint32_t cfg_oas_lun_status; 1155 #define OAS_LUN_STATUS_EXISTS 0x01 1156 uint32_t cfg_oas_flags; 1157 #define OAS_FIND_ANY_VPORT 0x01 1158 #define OAS_FIND_ANY_TARGET 0x02 1159 #define OAS_LUN_VALID 0x04 1160 uint32_t cfg_oas_priority; 1161 uint32_t cfg_XLanePriority; 1162 uint32_t cfg_enable_bg; 1163 uint32_t cfg_prot_mask; 1164 uint32_t cfg_prot_guard; 1165 uint32_t cfg_hostmem_hgp; 1166 uint32_t cfg_log_verbose; 1167 uint32_t cfg_enable_fc4_type; 1168 uint32_t cfg_aer_support; 1169 uint32_t cfg_sriov_nr_virtfn; 1170 uint32_t cfg_request_firmware_upgrade; 1171 uint32_t cfg_suppress_link_up; 1172 uint32_t cfg_rrq_xri_bitmap_sz; 1173 u32 cfg_fcp_wait_abts_rsp; 1174 uint32_t cfg_delay_discovery; 1175 uint32_t cfg_sli_mode; 1176 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 1177 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 1178 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 1179 uint32_t cfg_fdmi_on; 1180 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 1181 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 1182 uint32_t cfg_enable_SmartSAN; 1183 uint32_t cfg_enable_mds_diags; 1184 uint32_t cfg_ras_fwlog_level; 1185 uint32_t cfg_ras_fwlog_buffsize; 1186 uint32_t cfg_ras_fwlog_func; 1187 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 1188 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 1189 #define LPFC_ENABLE_FCP 1 1190 #define LPFC_ENABLE_NVME 2 1191 #define LPFC_ENABLE_BOTH 3 1192 uint32_t cfg_enable_pbde; 1193 uint32_t cfg_enable_mi; 1194 struct nvmet_fc_target_port *targetport; 1195 lpfc_vpd_t vpd; /* vital product data */ 1196 1197 u32 cfg_max_vmid; /* maximum VMIDs allowed per port */ 1198 u32 cfg_vmid_app_header; 1199 #define LPFC_VMID_APP_HEADER_DISABLE 0 1200 #define LPFC_VMID_APP_HEADER_ENABLE 1 1201 u32 cfg_vmid_priority_tagging; 1202 u32 cfg_vmid_inactivity_timeout; /* Time after which the VMID */ 1203 /* deregisters from switch */ 1204 struct pci_dev *pcidev; 1205 struct list_head work_list; 1206 uint32_t work_ha; /* Host Attention Bits for WT */ 1207 uint32_t work_ha_mask; /* HA Bits owned by WT */ 1208 uint32_t work_hs; /* HS stored in case of ERRAT */ 1209 uint32_t work_status[2]; /* Extra status from SLIM */ 1210 1211 wait_queue_head_t work_waitq; 1212 struct task_struct *worker_thread; 1213 unsigned long data_flags; 1214 uint32_t border_sge_num; 1215 1216 uint32_t hbq_in_use; /* HBQs in use flag */ 1217 uint32_t hbq_count; /* Count of configured HBQs */ 1218 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 1219 1220 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 1221 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 1222 1223 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 1224 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 1225 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 1226 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 1227 PCI BAR0 */ 1228 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 1229 PCI BAR2 */ 1230 1231 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 1232 PCI BAR0 with dual-ULP support */ 1233 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 1234 PCI BAR2 with dual-ULP support */ 1235 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 1236 PCI BAR4 with dual-ULP support */ 1237 #define PCI_64BIT_BAR0 0 1238 #define PCI_64BIT_BAR2 2 1239 #define PCI_64BIT_BAR4 4 1240 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 1241 void __iomem *HAregaddr; /* virtual address for host attn reg */ 1242 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 1243 void __iomem *HSregaddr; /* virtual address for host status 1244 reg */ 1245 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 1246 1247 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 1248 struct lpfc_pgp *port_gp; 1249 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 1250 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 1251 1252 int brd_no; /* FC board number */ 1253 char SerialNumber[32]; /* adapter Serial Number */ 1254 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 1255 char BIOSVersion[16]; /* Boot BIOS version */ 1256 char ModelDesc[256]; /* Model Description */ 1257 char ModelName[80]; /* Model Name */ 1258 char ProgramType[256]; /* Program Type */ 1259 char Port[20]; /* Port No */ 1260 uint8_t vpd_flag; /* VPD data flag */ 1261 1262 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 1263 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 1264 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 1265 #define VPD_PORT 0x8 /* valid vpd port data */ 1266 #define VPD_MASK 0xf /* mask for any vpd data */ 1267 1268 uint8_t soft_wwn_enable; 1269 1270 struct timer_list fcp_poll_timer; 1271 struct timer_list eratt_poll; 1272 uint32_t eratt_poll_interval; 1273 1274 uint64_t bg_guard_err_cnt; 1275 uint64_t bg_apptag_err_cnt; 1276 uint64_t bg_reftag_err_cnt; 1277 1278 /* fastpath list. */ 1279 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 1280 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 1281 struct list_head lpfc_scsi_buf_list_get; 1282 struct list_head lpfc_scsi_buf_list_put; 1283 uint32_t total_scsi_bufs; 1284 struct list_head lpfc_iocb_list; 1285 uint32_t total_iocbq_bufs; 1286 struct list_head active_rrq_list; 1287 spinlock_t hbalock; 1288 struct work_struct unblock_request_work; /* SCSI layer unblock IOs */ 1289 1290 /* dma_mem_pools */ 1291 struct dma_pool *lpfc_sg_dma_buf_pool; 1292 struct dma_pool *lpfc_mbuf_pool; 1293 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 1294 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 1295 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 1296 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 1297 struct dma_pool *lpfc_cmd_rsp_buf_pool; 1298 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 1299 1300 mempool_t *mbox_mem_pool; 1301 mempool_t *nlp_mem_pool; 1302 mempool_t *rrq_pool; 1303 mempool_t *active_rrq_pool; 1304 1305 struct fc_host_statistics link_stats; 1306 enum lpfc_irq_chann_mode irq_chann_mode; 1307 enum intr_type_t intr_type; 1308 uint32_t intr_mode; 1309 #define LPFC_INTR_ERROR 0xFFFFFFFF 1310 struct list_head port_list; 1311 spinlock_t port_list_lock; /* lock for port_list mutations */ 1312 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1313 uint16_t max_vpi; /* Maximum virtual nports */ 1314 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1315 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1316 uint16_t max_vports; /* 1317 * For IOV HBAs max_vpi can change 1318 * after a reset. max_vports is max 1319 * number of vports present. This can 1320 * be greater than max_vpi. 1321 */ 1322 uint16_t vpi_base; 1323 uint16_t vfi_base; 1324 unsigned long *vpi_bmask; /* vpi allocation table */ 1325 uint16_t *vpi_ids; 1326 uint16_t vpi_count; 1327 struct list_head lpfc_vpi_blk_list; 1328 1329 /* Data structure used by fabric iocb scheduler */ 1330 struct list_head fabric_iocb_list; 1331 atomic_t fabric_iocb_count; 1332 struct timer_list fabric_block_timer; 1333 unsigned long bit_flags; 1334 #define FABRIC_COMANDS_BLOCKED 0 1335 atomic_t num_rsrc_err; 1336 atomic_t num_cmd_success; 1337 unsigned long last_rsrc_error_time; 1338 unsigned long last_ramp_down_time; 1339 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1340 struct dentry *hba_debugfs_root; 1341 atomic_t debugfs_vport_count; 1342 struct dentry *debug_multixri_pools; 1343 struct dentry *debug_hbqinfo; 1344 struct dentry *debug_dumpHostSlim; 1345 struct dentry *debug_dumpHBASlim; 1346 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1347 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1348 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1349 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1350 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1351 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1352 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1353 struct dentry *debug_readApp; /* inject read app_tag errors */ 1354 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1355 1356 struct dentry *debug_nvmeio_trc; 1357 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1358 struct dentry *debug_hdwqinfo; 1359 #ifdef LPFC_HDWQ_LOCK_STAT 1360 struct dentry *debug_lockstat; 1361 #endif 1362 struct dentry *debug_cgn_buffer; 1363 struct dentry *debug_rx_monitor; 1364 struct dentry *debug_ras_log; 1365 atomic_t nvmeio_trc_cnt; 1366 uint32_t nvmeio_trc_size; 1367 uint32_t nvmeio_trc_output_idx; 1368 1369 /* T10 DIF error injection */ 1370 uint32_t lpfc_injerr_wgrd_cnt; 1371 uint32_t lpfc_injerr_wapp_cnt; 1372 uint32_t lpfc_injerr_wref_cnt; 1373 uint32_t lpfc_injerr_rgrd_cnt; 1374 uint32_t lpfc_injerr_rapp_cnt; 1375 uint32_t lpfc_injerr_rref_cnt; 1376 uint32_t lpfc_injerr_nportid; 1377 struct lpfc_name lpfc_injerr_wwpn; 1378 sector_t lpfc_injerr_lba; 1379 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1380 1381 struct dentry *debug_slow_ring_trc; 1382 struct lpfc_debugfs_trc *slow_ring_trc; 1383 atomic_t slow_ring_trc_cnt; 1384 /* iDiag debugfs sub-directory */ 1385 struct dentry *idiag_root; 1386 struct dentry *idiag_pci_cfg; 1387 struct dentry *idiag_bar_acc; 1388 struct dentry *idiag_que_info; 1389 struct dentry *idiag_que_acc; 1390 struct dentry *idiag_drb_acc; 1391 struct dentry *idiag_ctl_acc; 1392 struct dentry *idiag_mbx_acc; 1393 struct dentry *idiag_ext_acc; 1394 uint8_t lpfc_idiag_last_eq; 1395 #endif 1396 uint16_t nvmeio_trc_on; 1397 1398 /* Used for deferred freeing of ELS data buffers */ 1399 struct list_head elsbuf; 1400 int elsbuf_cnt; 1401 int elsbuf_prev_cnt; 1402 1403 uint8_t temp_sensor_support; 1404 /* Fields used for heart beat. */ 1405 unsigned long last_completion_time; 1406 unsigned long skipped_hb; 1407 struct timer_list hb_tmofunc; 1408 struct timer_list rrq_tmr; 1409 enum hba_temp_state over_temp_state; 1410 /* 1411 * Following bit will be set for all buffer tags which are not 1412 * associated with any HBQ. 1413 */ 1414 #define QUE_BUFTAG_BIT (1<<31) 1415 uint32_t buffer_tag_count; 1416 int wait_4_mlo_maint_flg; 1417 wait_queue_head_t wait_4_mlo_m_q; 1418 /* data structure used for latency data collection */ 1419 #define LPFC_NO_BUCKET 0 1420 #define LPFC_LINEAR_BUCKET 1 1421 #define LPFC_POWER2_BUCKET 2 1422 uint8_t bucket_type; 1423 uint32_t bucket_base; 1424 uint32_t bucket_step; 1425 1426 /* Maximum number of events that can be outstanding at any time*/ 1427 #define LPFC_MAX_EVT_COUNT 512 1428 atomic_t fast_event_count; 1429 uint32_t fcoe_eventtag; 1430 uint32_t fcoe_eventtag_at_fcf_scan; 1431 uint32_t fcoe_cvl_eventtag; 1432 uint32_t fcoe_cvl_eventtag_attn; 1433 struct lpfc_fcf fcf; 1434 uint8_t fc_map[3]; 1435 uint8_t valid_vlan; 1436 uint16_t vlan_id; 1437 struct list_head fcf_conn_rec_list; 1438 1439 bool defer_flogi_acc_flag; 1440 uint16_t defer_flogi_acc_rx_id; 1441 uint16_t defer_flogi_acc_ox_id; 1442 1443 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1444 struct list_head ct_ev_waiters; 1445 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1446 uint32_t ctx_idx; 1447 struct timer_list inactive_vmid_poll; 1448 1449 /* RAS Support */ 1450 struct lpfc_ras_fwlog ras_fwlog; 1451 1452 uint8_t menlo_flag; /* menlo generic flags */ 1453 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1454 uint32_t iocb_cnt; 1455 uint32_t iocb_max; 1456 atomic_t sdev_cnt; 1457 spinlock_t devicelock; /* lock for luns list */ 1458 mempool_t *device_data_mem_pool; 1459 struct list_head luns; 1460 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1461 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1462 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1463 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1464 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1465 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1466 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1467 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1468 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1469 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1470 uint16_t sfp_alarm; 1471 uint16_t sfp_warning; 1472 1473 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1474 uint16_t hdwqstat_on; 1475 #define LPFC_CHECK_OFF 0 1476 #define LPFC_CHECK_NVME_IO 1 1477 #define LPFC_CHECK_NVMET_IO 2 1478 #define LPFC_CHECK_SCSI_IO 4 1479 uint16_t ktime_on; 1480 uint64_t ktime_data_samples; 1481 uint64_t ktime_status_samples; 1482 uint64_t ktime_last_cmd; 1483 uint64_t ktime_seg1_total; 1484 uint64_t ktime_seg1_min; 1485 uint64_t ktime_seg1_max; 1486 uint64_t ktime_seg2_total; 1487 uint64_t ktime_seg2_min; 1488 uint64_t ktime_seg2_max; 1489 uint64_t ktime_seg3_total; 1490 uint64_t ktime_seg3_min; 1491 uint64_t ktime_seg3_max; 1492 uint64_t ktime_seg4_total; 1493 uint64_t ktime_seg4_min; 1494 uint64_t ktime_seg4_max; 1495 uint64_t ktime_seg5_total; 1496 uint64_t ktime_seg5_min; 1497 uint64_t ktime_seg5_max; 1498 uint64_t ktime_seg6_total; 1499 uint64_t ktime_seg6_min; 1500 uint64_t ktime_seg6_max; 1501 uint64_t ktime_seg7_total; 1502 uint64_t ktime_seg7_min; 1503 uint64_t ktime_seg7_max; 1504 uint64_t ktime_seg8_total; 1505 uint64_t ktime_seg8_min; 1506 uint64_t ktime_seg8_max; 1507 uint64_t ktime_seg9_total; 1508 uint64_t ktime_seg9_min; 1509 uint64_t ktime_seg9_max; 1510 uint64_t ktime_seg10_total; 1511 uint64_t ktime_seg10_min; 1512 uint64_t ktime_seg10_max; 1513 #endif 1514 /* CMF objects */ 1515 struct lpfc_cgn_stat __percpu *cmf_stat; 1516 uint32_t cmf_interval_rate; /* timer interval limit in ms */ 1517 uint32_t cmf_timer_cnt; 1518 #define LPFC_CMF_INTERVAL 90 1519 uint64_t cmf_link_byte_count; 1520 uint64_t cmf_max_line_rate; 1521 uint64_t cmf_max_bytes_per_interval; 1522 uint64_t cmf_last_sync_bw; 1523 #define LPFC_CMF_BLK_SIZE 512 1524 struct hrtimer cmf_timer; 1525 atomic_t cmf_bw_wait; 1526 atomic_t cmf_busy; 1527 atomic_t cmf_stop_io; /* To block request and stop IO's */ 1528 uint32_t cmf_active_mode; 1529 uint32_t cmf_info_per_interval; 1530 #define LPFC_MAX_CMF_INFO 32 1531 struct timespec64 cmf_latency; /* Interval congestion timestamp */ 1532 uint32_t cmf_last_ts; /* Interval congestion time (ms) */ 1533 uint32_t cmf_active_info; 1534 1535 /* Signal / FPIN handling for Congestion Mgmt */ 1536 u8 cgn_reg_fpin; /* Negotiated value from RDF */ 1537 u8 cgn_init_reg_fpin; /* Initial value from READ_CONFIG */ 1538 #define LPFC_CGN_FPIN_NONE 0x0 1539 #define LPFC_CGN_FPIN_WARN 0x1 1540 #define LPFC_CGN_FPIN_ALARM 0x2 1541 #define LPFC_CGN_FPIN_BOTH (LPFC_CGN_FPIN_WARN | LPFC_CGN_FPIN_ALARM) 1542 1543 u8 cgn_reg_signal; /* Negotiated value from EDC */ 1544 u8 cgn_init_reg_signal; /* Initial value from READ_CONFIG */ 1545 /* cgn_reg_signal and cgn_init_reg_signal use 1546 * enum fc_edc_cg_signal_cap_types 1547 */ 1548 u16 cgn_fpin_frequency; 1549 #define LPFC_FPIN_INIT_FREQ 0xffff 1550 u32 cgn_sig_freq; 1551 u32 cgn_acqe_cnt; 1552 1553 /* RX monitor handling for CMF */ 1554 struct rxtable_entry *rxtable; /* RX_monitor information */ 1555 atomic_t rxtable_idx_head; 1556 #define LPFC_RXMONITOR_TABLE_IN_USE (LPFC_MAX_RXMONITOR_ENTRY + 73) 1557 atomic_t rxtable_idx_tail; 1558 atomic_t rx_max_read_cnt; /* Maximum read bytes */ 1559 uint64_t rx_block_cnt; 1560 1561 /* Congestion parameters from flash */ 1562 struct lpfc_cgn_param cgn_p; 1563 1564 /* Statistics counter for ACQE cgn alarms and warnings */ 1565 struct lpfc_cgn_acqe_stat cgn_acqe_stat; 1566 1567 /* Congestion buffer information */ 1568 struct lpfc_dmabuf *cgn_i; /* Congestion Info buffer */ 1569 atomic_t cgn_fabric_warn_cnt; /* Total warning cgn events for info */ 1570 atomic_t cgn_fabric_alarm_cnt; /* Total alarm cgn events for info */ 1571 atomic_t cgn_sync_warn_cnt; /* Total warning events for SYNC wqe */ 1572 atomic_t cgn_sync_alarm_cnt; /* Total alarm events for SYNC wqe */ 1573 atomic_t cgn_driver_evt_cnt; /* Total driver cgn events for fmw */ 1574 atomic_t cgn_latency_evt_cnt; 1575 struct timespec64 cgn_daily_ts; 1576 atomic64_t cgn_latency_evt; /* Avg latency per minute */ 1577 unsigned long cgn_evt_timestamp; 1578 #define LPFC_CGN_TIMER_TO_MIN 60000 /* ms in a minute */ 1579 uint32_t cgn_evt_minute; 1580 #define LPFC_SEC_MIN 60 1581 #define LPFC_MIN_HOUR 60 1582 #define LPFC_HOUR_DAY 24 1583 #define LPFC_MIN_DAY (LPFC_MIN_HOUR * LPFC_HOUR_DAY) 1584 1585 struct hlist_node cpuhp; /* used for cpuhp per hba callback */ 1586 struct timer_list cpuhp_poll_timer; 1587 struct list_head poll_list; /* slowpath eq polling list */ 1588 #define LPFC_POLL_HB 1 /* slowpath heartbeat */ 1589 #define LPFC_POLL_FASTPATH 0 /* called from fastpath */ 1590 #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */ 1591 1592 char os_host_name[MAXHOSTNAMELEN]; 1593 1594 /* SCSI host template information - for physical port */ 1595 struct scsi_host_template port_template; 1596 /* SCSI host template information - for all vports */ 1597 struct scsi_host_template vport_template; 1598 atomic_t dbg_log_idx; 1599 atomic_t dbg_log_cnt; 1600 atomic_t dbg_log_dmping; 1601 struct dbg_log_ent dbg_log[DBG_LOG_SZ]; 1602 }; 1603 1604 #define LPFC_MAX_RXMONITOR_ENTRY 800 1605 #define LPFC_MAX_RXMONITOR_DUMP 32 1606 struct rxtable_entry { 1607 uint64_t total_bytes; /* Total no of read bytes requested */ 1608 uint64_t rcv_bytes; /* Total no of read bytes completed */ 1609 uint64_t avg_io_size; 1610 uint64_t avg_io_latency;/* Average io latency in microseconds */ 1611 uint64_t max_read_cnt; /* Maximum read bytes */ 1612 uint64_t max_bytes_per_interval; 1613 uint32_t cmf_busy; 1614 uint32_t cmf_info; /* CMF_SYNC_WQE info */ 1615 uint32_t io_cnt; 1616 uint32_t timer_utilization; 1617 uint32_t timer_interval; 1618 }; 1619 1620 static inline struct Scsi_Host * 1621 lpfc_shost_from_vport(struct lpfc_vport *vport) 1622 { 1623 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1624 } 1625 1626 static inline void 1627 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1628 { 1629 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1630 phba->link_flag |= LS_LOOPBACK_MODE; 1631 else 1632 phba->link_flag &= ~LS_LOOPBACK_MODE; 1633 } 1634 1635 static inline int 1636 lpfc_is_link_up(struct lpfc_hba *phba) 1637 { 1638 return phba->link_state == LPFC_LINK_UP || 1639 phba->link_state == LPFC_CLEAR_LA || 1640 phba->link_state == LPFC_HBA_READY; 1641 } 1642 1643 static inline void 1644 lpfc_worker_wake_up(struct lpfc_hba *phba) 1645 { 1646 /* Set the lpfc data pending flag */ 1647 set_bit(LPFC_DATA_READY, &phba->data_flags); 1648 1649 /* Wake up worker thread */ 1650 wake_up(&phba->work_waitq); 1651 return; 1652 } 1653 1654 static inline int 1655 lpfc_readl(void __iomem *addr, uint32_t *data) 1656 { 1657 uint32_t temp; 1658 temp = readl(addr); 1659 if (temp == 0xffffffff) 1660 return -EIO; 1661 *data = temp; 1662 return 0; 1663 } 1664 1665 static inline int 1666 lpfc_sli_read_hs(struct lpfc_hba *phba) 1667 { 1668 /* 1669 * There was a link/board error. Read the status register to retrieve 1670 * the error event and process it. 1671 */ 1672 phba->sli.slistat.err_attn_event++; 1673 1674 /* Save status info and check for unplug error */ 1675 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1676 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1677 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1678 return -EIO; 1679 } 1680 1681 /* Clear chip Host Attention error bit */ 1682 writel(HA_ERATT, phba->HAregaddr); 1683 readl(phba->HAregaddr); /* flush */ 1684 phba->pport->stopped = 1; 1685 1686 return 0; 1687 } 1688 1689 static inline struct lpfc_sli_ring * 1690 lpfc_phba_elsring(struct lpfc_hba *phba) 1691 { 1692 /* Return NULL if sli_rev has become invalid due to bad fw */ 1693 if (phba->sli_rev != LPFC_SLI_REV4 && 1694 phba->sli_rev != LPFC_SLI_REV3 && 1695 phba->sli_rev != LPFC_SLI_REV2) 1696 return NULL; 1697 1698 if (phba->sli_rev == LPFC_SLI_REV4) { 1699 if (phba->sli4_hba.els_wq) 1700 return phba->sli4_hba.els_wq->pring; 1701 else 1702 return NULL; 1703 } 1704 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1705 } 1706 1707 /** 1708 * lpfc_next_online_cpu - Finds next online CPU on cpumask 1709 * @mask: Pointer to phba's cpumask member. 1710 * @start: starting cpu index 1711 * 1712 * Note: If no valid cpu found, then nr_cpu_ids is returned. 1713 * 1714 **/ 1715 static inline unsigned int 1716 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start) 1717 { 1718 unsigned int cpu_it; 1719 1720 for_each_cpu_wrap(cpu_it, mask, start) { 1721 if (cpu_online(cpu_it)) 1722 break; 1723 } 1724 1725 return cpu_it; 1726 } 1727 /** 1728 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1729 * @phba: Pointer to HBA context object. 1730 * @q: The Event Queue to update. 1731 * @delay: The delay value (in us) to be written. 1732 * 1733 **/ 1734 static inline void 1735 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1736 u32 delay) 1737 { 1738 struct lpfc_register reg_data; 1739 1740 reg_data.word0 = 0; 1741 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1742 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1743 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1744 eq->q_mode = delay; 1745 } 1746 1747 1748 /* 1749 * Macro that declares tables and a routine to perform enum type to 1750 * ascii string lookup. 1751 * 1752 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for 1753 * the enum to populate the table. Macro defines a routine (named 1754 * by caller) that will search all elements of the table for the key 1755 * and return the name string if found or "Unrecognized" if not found. 1756 */ 1757 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \ 1758 static struct { \ 1759 enum enum_name value; \ 1760 char *name; \ 1761 } fc_##enum_name##_e2str_names[] = enum_init; \ 1762 static const char *routine(enum enum_name table_key) \ 1763 { \ 1764 int i; \ 1765 char *name = "Unrecognized"; \ 1766 \ 1767 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\ 1768 if (fc_##enum_name##_e2str_names[i].value == table_key) {\ 1769 name = fc_##enum_name##_e2str_names[i].name; \ 1770 break; \ 1771 } \ 1772 } \ 1773 return name; \ 1774 } 1775 1776 /** 1777 * lpfc_is_vmid_enabled - returns if VMID is enabled for either switch types 1778 * @phba: Pointer to HBA context object. 1779 * 1780 * Relationship between the enable, target support and if vmid tag is required 1781 * for the particular combination 1782 * --------------------------------------------------- 1783 * Switch Enable Flag Target Support VMID Needed 1784 * --------------------------------------------------- 1785 * App Id 0 NA N 1786 * App Id 1 0 N 1787 * App Id 1 1 Y 1788 * Pr Tag 0 NA N 1789 * Pr Tag 1 0 N 1790 * Pr Tag 1 1 Y 1791 * Pr Tag 2 * Y 1792 --------------------------------------------------- 1793 * 1794 **/ 1795 static inline int lpfc_is_vmid_enabled(struct lpfc_hba *phba) 1796 { 1797 return phba->cfg_vmid_app_header || phba->cfg_vmid_priority_tagging; 1798 } 1799