1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/ktime.h> 26 #include <linux/workqueue.h> 27 28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 29 #define CONFIG_SCSI_LPFC_DEBUG_FS 30 #endif 31 32 struct lpfc_sli2_slim; 33 34 #define ELX_MODEL_NAME_SIZE 80 35 36 #define LPFC_PCI_DEV_LP 0x1 37 #define LPFC_PCI_DEV_OC 0x2 38 39 #define LPFC_SLI_REV2 2 40 #define LPFC_SLI_REV3 3 41 #define LPFC_SLI_REV4 4 42 43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 45 requests */ 46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 47 the NameServer before giving up. */ 48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 51 cmnd for menlo needs nearly twice as for firmware 52 downloads using bsg */ 53 54 #define LPFC_DEFAULT_XPSGL_SIZE 256 55 #define LPFC_MAX_SG_TABLESIZE 0xffff 56 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 57 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 58 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 59 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 60 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 61 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 62 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 63 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 64 65 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 66 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 67 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 68 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 69 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 70 #define LPFC_MIN_TGT_QDEPTH 10 71 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 72 73 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 74 collection. */ 75 /* 76 * Following time intervals are used of adjusting SCSI device 77 * queue depths when there are driver resource error or Firmware 78 * resource error. 79 */ 80 /* 1 Second */ 81 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 82 83 /* Number of exchanges reserved for discovery to complete */ 84 #define LPFC_DISC_IOCB_BUFF_COUNT 20 85 86 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 87 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 88 89 /* Error Attention event polling interval */ 90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 91 92 /* Define macros for 64 bit support */ 93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 95 #define getPaddr(high, low) ((dma_addr_t)( \ 96 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 97 /* Provide maximum configuration definitions. */ 98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 99 #define FC_MAX_ADPTMSG 64 100 101 #define MAX_HBAEVT 32 102 #define MAX_HBAS_NO_RESET 16 103 104 /* Number of MSI-X vectors the driver uses */ 105 #define LPFC_MSIX_VECTORS 2 106 107 /* lpfc wait event data ready flag */ 108 #define LPFC_DATA_READY 0 /* bit 0 */ 109 110 /* queue dump line buffer size */ 111 #define LPFC_LBUF_SZ 128 112 113 /* mailbox system shutdown options */ 114 #define LPFC_MBX_NO_WAIT 0 115 #define LPFC_MBX_WAIT 1 116 117 enum lpfc_polling_flags { 118 ENABLE_FCP_RING_POLLING = 0x1, 119 DISABLE_FCP_RING_INT = 0x2 120 }; 121 122 struct perf_prof { 123 uint16_t cmd_cpu[40]; 124 uint16_t rsp_cpu[40]; 125 uint16_t qh_cpu[40]; 126 uint16_t wqidx[40]; 127 }; 128 129 /* 130 * Provide for FC4 TYPE x28 - NVME. The 131 * bit mask for FCP and NVME is 0x8 identically 132 * because they are 32 bit positions distance. 133 */ 134 #define LPFC_FC4_TYPE_BITMASK 0x00000100 135 136 /* Provide DMA memory definitions the driver uses per port instance. */ 137 struct lpfc_dmabuf { 138 struct list_head list; 139 void *virt; /* virtual address ptr */ 140 dma_addr_t phys; /* mapped address */ 141 uint32_t buffer_tag; /* used for tagged queue ring */ 142 }; 143 144 struct lpfc_nvmet_ctxbuf { 145 struct list_head list; 146 struct lpfc_nvmet_rcv_ctx *context; 147 struct lpfc_iocbq *iocbq; 148 struct lpfc_sglq *sglq; 149 struct work_struct defer_work; 150 }; 151 152 struct lpfc_dma_pool { 153 struct lpfc_dmabuf *elements; 154 uint32_t max_count; 155 uint32_t current_count; 156 }; 157 158 struct hbq_dmabuf { 159 struct lpfc_dmabuf hbuf; 160 struct lpfc_dmabuf dbuf; 161 uint16_t total_size; 162 uint16_t bytes_recv; 163 uint32_t tag; 164 struct lpfc_cq_event cq_event; 165 unsigned long time_stamp; 166 void *context; 167 }; 168 169 struct rqb_dmabuf { 170 struct lpfc_dmabuf hbuf; 171 struct lpfc_dmabuf dbuf; 172 uint16_t total_size; 173 uint16_t bytes_recv; 174 uint16_t idx; 175 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 176 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 177 }; 178 179 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 180 #define MEM_PRI 0x100 181 182 183 /****************************************************************************/ 184 /* Device VPD save area */ 185 /****************************************************************************/ 186 typedef struct lpfc_vpd { 187 uint32_t status; /* vpd status value */ 188 uint32_t length; /* number of bytes actually returned */ 189 struct { 190 uint32_t rsvd1; /* Revision numbers */ 191 uint32_t biuRev; 192 uint32_t smRev; 193 uint32_t smFwRev; 194 uint32_t endecRev; 195 uint16_t rBit; 196 uint8_t fcphHigh; 197 uint8_t fcphLow; 198 uint8_t feaLevelHigh; 199 uint8_t feaLevelLow; 200 uint32_t postKernRev; 201 uint32_t opFwRev; 202 uint8_t opFwName[16]; 203 uint32_t sli1FwRev; 204 uint8_t sli1FwName[16]; 205 uint32_t sli2FwRev; 206 uint8_t sli2FwName[16]; 207 } rev; 208 struct { 209 #ifdef __BIG_ENDIAN_BITFIELD 210 uint32_t rsvd3 :19; /* Reserved */ 211 uint32_t cdss : 1; /* Configure Data Security SLI */ 212 uint32_t rsvd2 : 3; /* Reserved */ 213 uint32_t cbg : 1; /* Configure BlockGuard */ 214 uint32_t cmv : 1; /* Configure Max VPIs */ 215 uint32_t ccrp : 1; /* Config Command Ring Polling */ 216 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 217 uint32_t chbs : 1; /* Cofigure Host Backing store */ 218 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 219 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 220 uint32_t cmx : 1; /* Configure Max XRIs */ 221 uint32_t cmr : 1; /* Configure Max RPIs */ 222 #else /* __LITTLE_ENDIAN */ 223 uint32_t cmr : 1; /* Configure Max RPIs */ 224 uint32_t cmx : 1; /* Configure Max XRIs */ 225 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 226 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 227 uint32_t chbs : 1; /* Cofigure Host Backing store */ 228 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 229 uint32_t ccrp : 1; /* Config Command Ring Polling */ 230 uint32_t cmv : 1; /* Configure Max VPIs */ 231 uint32_t cbg : 1; /* Configure BlockGuard */ 232 uint32_t rsvd2 : 3; /* Reserved */ 233 uint32_t cdss : 1; /* Configure Data Security SLI */ 234 uint32_t rsvd3 :19; /* Reserved */ 235 #endif 236 } sli3Feat; 237 } lpfc_vpd_t; 238 239 240 /* 241 * lpfc stat counters 242 */ 243 struct lpfc_stats { 244 /* Statistics for ELS commands */ 245 uint32_t elsLogiCol; 246 uint32_t elsRetryExceeded; 247 uint32_t elsXmitRetry; 248 uint32_t elsDelayRetry; 249 uint32_t elsRcvDrop; 250 uint32_t elsRcvFrame; 251 uint32_t elsRcvRSCN; 252 uint32_t elsRcvRNID; 253 uint32_t elsRcvFARP; 254 uint32_t elsRcvFARPR; 255 uint32_t elsRcvFLOGI; 256 uint32_t elsRcvPLOGI; 257 uint32_t elsRcvADISC; 258 uint32_t elsRcvPDISC; 259 uint32_t elsRcvFAN; 260 uint32_t elsRcvLOGO; 261 uint32_t elsRcvPRLO; 262 uint32_t elsRcvPRLI; 263 uint32_t elsRcvLIRR; 264 uint32_t elsRcvRLS; 265 uint32_t elsRcvRPS; 266 uint32_t elsRcvRPL; 267 uint32_t elsRcvRRQ; 268 uint32_t elsRcvRTV; 269 uint32_t elsRcvECHO; 270 uint32_t elsRcvLCB; 271 uint32_t elsRcvRDP; 272 uint32_t elsXmitFLOGI; 273 uint32_t elsXmitFDISC; 274 uint32_t elsXmitPLOGI; 275 uint32_t elsXmitPRLI; 276 uint32_t elsXmitADISC; 277 uint32_t elsXmitLOGO; 278 uint32_t elsXmitSCR; 279 uint32_t elsXmitRSCN; 280 uint32_t elsXmitRNID; 281 uint32_t elsXmitFARP; 282 uint32_t elsXmitFARPR; 283 uint32_t elsXmitACC; 284 uint32_t elsXmitLSRJT; 285 286 uint32_t frameRcvBcast; 287 uint32_t frameRcvMulti; 288 uint32_t strayXmitCmpl; 289 uint32_t frameXmitDelay; 290 uint32_t xriCmdCmpl; 291 uint32_t xriStatErr; 292 uint32_t LinkUp; 293 uint32_t LinkDown; 294 uint32_t LinkMultiEvent; 295 uint32_t NoRcvBuf; 296 uint32_t fcpCmd; 297 uint32_t fcpCmpl; 298 uint32_t fcpRspErr; 299 uint32_t fcpRemoteStop; 300 uint32_t fcpPortRjt; 301 uint32_t fcpPortBusy; 302 uint32_t fcpError; 303 uint32_t fcpLocalErr; 304 }; 305 306 struct lpfc_hba; 307 308 309 enum discovery_state { 310 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 311 LPFC_VPORT_FAILED = 1, /* vport has failed */ 312 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 313 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 314 LPFC_FDISC = 8, /* FDISC sent for vport */ 315 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 316 * configured */ 317 LPFC_NS_REG = 10, /* Register with NameServer */ 318 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 319 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 320 * device authentication / discovery */ 321 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 322 LPFC_VPORT_READY = 32, 323 }; 324 325 enum hba_state { 326 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 327 LPFC_WARM_START = 1, /* HBA state after selective reset */ 328 LPFC_INIT_START = 2, /* Initial state after board reset */ 329 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 330 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 331 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 332 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 333 * CLEAR_LA */ 334 LPFC_HBA_READY = 32, 335 LPFC_HBA_ERROR = -1 336 }; 337 338 struct lpfc_trunk_link_state { 339 enum hba_state state; 340 uint8_t fault; 341 }; 342 343 struct lpfc_trunk_link { 344 struct lpfc_trunk_link_state link0, 345 link1, 346 link2, 347 link3; 348 }; 349 350 struct lpfc_vport { 351 struct lpfc_hba *phba; 352 struct list_head listentry; 353 uint8_t port_type; 354 #define LPFC_PHYSICAL_PORT 1 355 #define LPFC_NPIV_PORT 2 356 #define LPFC_FABRIC_PORT 3 357 enum discovery_state port_state; 358 359 uint16_t vpi; 360 uint16_t vfi; 361 uint8_t vpi_state; 362 #define LPFC_VPI_REGISTERED 0x1 363 364 uint32_t fc_flag; /* FC flags */ 365 /* Several of these flags are HBA centric and should be moved to 366 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 367 */ 368 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 369 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 370 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 371 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 372 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 373 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 374 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 375 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 376 #define FC_FABRIC 0x100 /* We are fabric attached */ 377 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 378 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 379 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 380 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 381 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 382 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 383 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 384 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 385 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 386 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 387 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 388 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 389 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 390 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 391 392 uint32_t ct_flags; 393 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 394 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 395 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 396 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 397 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 398 399 struct list_head fc_nodes; 400 401 /* Keep counters for the number of entries in each list. */ 402 uint16_t fc_plogi_cnt; 403 uint16_t fc_adisc_cnt; 404 uint16_t fc_reglogin_cnt; 405 uint16_t fc_prli_cnt; 406 uint16_t fc_unmap_cnt; 407 uint16_t fc_map_cnt; 408 uint16_t fc_npr_cnt; 409 uint16_t fc_unused_cnt; 410 struct serv_parm fc_sparam; /* buffer for our service parameters */ 411 412 uint32_t fc_myDID; /* fibre channel S_ID */ 413 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 414 struct lpfc_name fabric_portname; 415 struct lpfc_name fabric_nodename; 416 417 int32_t stopped; /* HBA has not been restarted since last ERATT */ 418 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 419 420 uint32_t num_disc_nodes; /* in addition to hba_state */ 421 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 422 423 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 424 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 425 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 426 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 427 struct lpfc_name fc_nodename; /* fc nodename */ 428 struct lpfc_name fc_portname; /* fc portname */ 429 430 struct lpfc_work_evt disc_timeout_evt; 431 432 struct timer_list fc_disctmo; /* Discovery rescue timer */ 433 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 434 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 435 436 spinlock_t work_port_lock; 437 uint32_t work_port_events; /* Timeout to be handled */ 438 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 439 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 440 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 441 442 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 443 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 444 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 445 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 446 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 447 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 448 449 struct timer_list els_tmofunc; 450 struct timer_list delayed_disc_tmo; 451 452 int unreg_vpi_cmpl; 453 454 uint8_t load_flag; 455 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 456 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 457 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 458 /* Vport Config Parameters */ 459 uint32_t cfg_scan_down; 460 uint32_t cfg_lun_queue_depth; 461 uint32_t cfg_nodev_tmo; 462 uint32_t cfg_devloss_tmo; 463 uint32_t cfg_restrict_login; 464 uint32_t cfg_peer_port_login; 465 uint32_t cfg_fcp_class; 466 uint32_t cfg_use_adisc; 467 uint32_t cfg_discovery_threads; 468 uint32_t cfg_log_verbose; 469 uint32_t cfg_enable_fc4_type; 470 uint32_t cfg_max_luns; 471 uint32_t cfg_enable_da_id; 472 uint32_t cfg_max_scsicmpl_time; 473 uint32_t cfg_tgt_queue_depth; 474 uint32_t cfg_first_burst_size; 475 uint32_t dev_loss_tmo_changed; 476 477 struct fc_vport *fc_vport; 478 479 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 480 struct dentry *debug_disc_trc; 481 struct dentry *debug_nodelist; 482 struct dentry *debug_nvmestat; 483 struct dentry *debug_scsistat; 484 struct dentry *debug_nvmektime; 485 struct dentry *debug_cpucheck; 486 struct dentry *vport_debugfs_root; 487 struct lpfc_debugfs_trc *disc_trc; 488 atomic_t disc_trc_cnt; 489 #endif 490 uint8_t stat_data_enabled; 491 uint8_t stat_data_blocked; 492 struct list_head rcv_buffer_list; 493 unsigned long rcv_buffer_time_stamp; 494 uint32_t vport_flag; 495 #define STATIC_VPORT 1 496 #define FAWWPN_SET 2 497 #define FAWWPN_PARAM_CHG 4 498 499 uint16_t fdmi_num_disc; 500 uint32_t fdmi_hba_mask; 501 uint32_t fdmi_port_mask; 502 503 /* There is a single nvme instance per vport. */ 504 struct nvme_fc_local_port *localport; 505 uint8_t nvmei_support; /* driver supports NVME Initiator */ 506 uint32_t last_fcp_wqidx; 507 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 508 }; 509 510 struct hbq_s { 511 uint16_t entry_count; /* Current number of HBQ slots */ 512 uint16_t buffer_count; /* Current number of buffers posted */ 513 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 514 uint32_t hbqPutIdx; /* HBQ slot to use */ 515 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 516 void *hbq_virt; /* Virtual ptr to this hbq */ 517 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 518 /* Callback for HBQ buffer allocation */ 519 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 520 /* Callback for HBQ buffer free */ 521 void (*hbq_free_buffer) (struct lpfc_hba *, 522 struct hbq_dmabuf *); 523 }; 524 525 /* this matches the position in the lpfc_hbq_defs array */ 526 #define LPFC_ELS_HBQ 0 527 #define LPFC_MAX_HBQS 1 528 529 enum hba_temp_state { 530 HBA_NORMAL_TEMP, 531 HBA_OVER_TEMP 532 }; 533 534 enum intr_type_t { 535 NONE = 0, 536 INTx, 537 MSI, 538 MSIX, 539 }; 540 541 #define LPFC_CT_CTX_MAX 64 542 struct unsol_rcv_ct_ctx { 543 uint32_t ctxt_id; 544 uint32_t SID; 545 uint32_t valid; 546 #define UNSOL_INVALID 0 547 #define UNSOL_VALID 1 548 uint16_t oxid; 549 uint16_t rxid; 550 }; 551 552 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 553 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 554 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 555 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 556 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 557 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 558 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 559 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 560 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 561 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 562 563 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 564 565 enum nemb_type { 566 nemb_mse = 1, 567 nemb_hbd 568 }; 569 570 enum mbox_type { 571 mbox_rd = 1, 572 mbox_wr 573 }; 574 575 enum dma_type { 576 dma_mbox = 1, 577 dma_ebuf 578 }; 579 580 enum sta_type { 581 sta_pre_addr = 1, 582 sta_pos_addr 583 }; 584 585 struct lpfc_mbox_ext_buf_ctx { 586 uint32_t state; 587 #define LPFC_BSG_MBOX_IDLE 0 588 #define LPFC_BSG_MBOX_HOST 1 589 #define LPFC_BSG_MBOX_PORT 2 590 #define LPFC_BSG_MBOX_DONE 3 591 #define LPFC_BSG_MBOX_ABTS 4 592 enum nemb_type nembType; 593 enum mbox_type mboxType; 594 uint32_t numBuf; 595 uint32_t mbxTag; 596 uint32_t seqNum; 597 struct lpfc_dmabuf *mbx_dmabuf; 598 struct list_head ext_dmabuf_list; 599 }; 600 601 struct lpfc_epd_pool { 602 /* Expedite pool */ 603 struct list_head list; 604 u32 count; 605 spinlock_t lock; /* lock for expedite pool */ 606 }; 607 608 struct lpfc_ras_fwlog { 609 uint8_t *fwlog_buff; 610 uint32_t fw_buffcount; /* Buffer size posted to FW */ 611 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 612 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 613 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 614 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 615 uint32_t fw_loglevel; /* Log level set */ 616 struct lpfc_dmabuf lwpd; 617 struct list_head fwlog_buff_list; 618 619 /* RAS support status on adapter */ 620 bool ras_hwsupport; /* RAS Support available on HW or not */ 621 bool ras_enabled; /* Ras Enabled for the function */ 622 #define LPFC_RAS_DISABLE_LOGGING 0x00 623 #define LPFC_RAS_ENABLE_LOGGING 0x01 624 bool ras_active; /* RAS logging running state */ 625 }; 626 627 struct lpfc_hba { 628 /* SCSI interface function jump table entries */ 629 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 630 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 631 struct scsi_cmnd *cmnd); 632 int (*lpfc_scsi_prep_dma_buf) 633 (struct lpfc_hba *, struct lpfc_io_buf *); 634 void (*lpfc_scsi_unprep_dma_buf) 635 (struct lpfc_hba *, struct lpfc_io_buf *); 636 void (*lpfc_release_scsi_buf) 637 (struct lpfc_hba *, struct lpfc_io_buf *); 638 void (*lpfc_rampdown_queue_depth) 639 (struct lpfc_hba *); 640 void (*lpfc_scsi_prep_cmnd) 641 (struct lpfc_vport *, struct lpfc_io_buf *, 642 struct lpfc_nodelist *); 643 644 /* IOCB interface function jump table entries */ 645 int (*__lpfc_sli_issue_iocb) 646 (struct lpfc_hba *, uint32_t, 647 struct lpfc_iocbq *, uint32_t); 648 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 649 struct lpfc_iocbq *); 650 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 651 IOCB_t * (*lpfc_get_iocb_from_iocbq) 652 (struct lpfc_iocbq *); 653 void (*lpfc_scsi_cmd_iocb_cmpl) 654 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 655 656 /* MBOX interface function jump table entries */ 657 int (*lpfc_sli_issue_mbox) 658 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 659 660 /* Slow-path IOCB process function jump table entries */ 661 void (*lpfc_sli_handle_slow_ring_event) 662 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 663 uint32_t mask); 664 665 /* INIT device interface function jump table entries */ 666 int (*lpfc_sli_hbq_to_firmware) 667 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 668 int (*lpfc_sli_brdrestart) 669 (struct lpfc_hba *); 670 int (*lpfc_sli_brdready) 671 (struct lpfc_hba *, uint32_t); 672 void (*lpfc_handle_eratt) 673 (struct lpfc_hba *); 674 void (*lpfc_stop_port) 675 (struct lpfc_hba *); 676 int (*lpfc_hba_init_link) 677 (struct lpfc_hba *, uint32_t); 678 int (*lpfc_hba_down_link) 679 (struct lpfc_hba *, uint32_t); 680 int (*lpfc_selective_reset) 681 (struct lpfc_hba *); 682 683 int (*lpfc_bg_scsi_prep_dma_buf) 684 (struct lpfc_hba *, struct lpfc_io_buf *); 685 /* Add new entries here */ 686 687 /* expedite pool */ 688 struct lpfc_epd_pool epd_pool; 689 690 /* SLI4 specific HBA data structure */ 691 struct lpfc_sli4_hba sli4_hba; 692 693 struct workqueue_struct *wq; 694 struct delayed_work eq_delay_work; 695 696 struct lpfc_sli sli; 697 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 698 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 699 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 700 #define LPFC_SLI3_HBQ_ENABLED 0x01 701 #define LPFC_SLI3_NPIV_ENABLED 0x02 702 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 703 #define LPFC_SLI3_CRP_ENABLED 0x08 704 #define LPFC_SLI3_BG_ENABLED 0x20 705 #define LPFC_SLI3_DSS_ENABLED 0x40 706 #define LPFC_SLI4_PERFH_ENABLED 0x80 707 #define LPFC_SLI4_PHWQ_ENABLED 0x100 708 uint32_t iocb_cmd_size; 709 uint32_t iocb_rsp_size; 710 711 struct lpfc_trunk_link trunk_link; 712 enum hba_state link_state; 713 uint32_t link_flag; /* link state flags */ 714 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 715 /* This flag is set while issuing */ 716 /* INIT_LINK mailbox command */ 717 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 718 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 719 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 720 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 721 722 uint32_t hba_flag; /* hba generic flags */ 723 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 724 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 725 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 726 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 727 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 728 #define ELS_XRI_ABORT_EVENT 0x40 729 #define ASYNC_EVENT 0x80 730 #define LINK_DISABLED 0x100 /* Link disabled by user */ 731 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 732 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 733 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 734 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 735 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 736 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 737 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 738 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 739 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 740 #define HBA_FORCED_LINK_SPEED 0x40000 /* 741 * Firmware supports Forced Link Speed 742 * capability 743 */ 744 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 745 746 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 747 struct lpfc_dmabuf slim2p; 748 749 MAILBOX_t *mbox; 750 uint32_t *mbox_ext; 751 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 752 uint32_t ha_copy; 753 struct _PCB *pcb; 754 struct _IOCB *IOCBs; 755 756 struct lpfc_dmabuf hbqslimp; 757 758 uint16_t pci_cfg_value; 759 760 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 761 762 uint32_t fc_eventTag; /* event tag for link attention */ 763 uint32_t link_events; 764 765 /* These fields used to be binfo */ 766 uint32_t fc_pref_DID; /* preferred D_ID */ 767 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 768 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 769 uint32_t fc_edtov; /* E_D_TOV timer value */ 770 uint32_t fc_arbtov; /* ARB_TOV timer value */ 771 uint32_t fc_ratov; /* R_A_TOV timer value */ 772 uint32_t fc_rttov; /* R_T_TOV timer value */ 773 uint32_t fc_altov; /* AL_TOV timer value */ 774 uint32_t fc_crtov; /* C_R_TOV timer value */ 775 776 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 777 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 778 779 uint32_t lmt; 780 781 uint32_t fc_topology; /* link topology, from LINK INIT */ 782 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 783 784 struct lpfc_stats fc_stat; 785 786 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 787 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 788 789 uint8_t wwnn[8]; 790 uint8_t wwpn[8]; 791 uint32_t RandomData[7]; 792 uint8_t fcp_embed_io; 793 uint8_t nvme_support; /* Firmware supports NVME */ 794 uint8_t nvmet_support; /* driver supports NVMET */ 795 #define LPFC_NVMET_MAX_PORTS 32 796 uint8_t mds_diags_support; 797 uint8_t bbcredit_support; 798 uint8_t enab_exp_wqcq_pages; 799 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 800 801 /* HBA Config Parameters */ 802 uint32_t cfg_ack0; 803 uint32_t cfg_xri_rebalancing; 804 uint32_t cfg_xpsgl; 805 uint32_t cfg_enable_npiv; 806 uint32_t cfg_enable_rrq; 807 uint32_t cfg_topology; 808 uint32_t cfg_link_speed; 809 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 810 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 811 uint32_t cfg_fcf_failover_policy; 812 uint32_t cfg_fcp_io_sched; 813 uint32_t cfg_ns_query; 814 uint32_t cfg_fcp2_no_tgt_reset; 815 uint32_t cfg_cr_delay; 816 uint32_t cfg_cr_count; 817 uint32_t cfg_multi_ring_support; 818 uint32_t cfg_multi_ring_rctl; 819 uint32_t cfg_multi_ring_type; 820 uint32_t cfg_poll; 821 uint32_t cfg_poll_tmo; 822 uint32_t cfg_task_mgmt_tmo; 823 uint32_t cfg_use_msi; 824 uint32_t cfg_auto_imax; 825 uint32_t cfg_fcp_imax; 826 uint32_t cfg_force_rscn; 827 uint32_t cfg_cq_poll_threshold; 828 uint32_t cfg_cq_max_proc_limit; 829 uint32_t cfg_fcp_cpu_map; 830 uint32_t cfg_fcp_mq_threshold; 831 uint32_t cfg_hdw_queue; 832 uint32_t cfg_irq_chann; 833 uint32_t cfg_suppress_rsp; 834 uint32_t cfg_nvme_oas; 835 uint32_t cfg_nvme_embed_cmd; 836 uint32_t cfg_nvmet_mrq_post; 837 uint32_t cfg_nvmet_mrq; 838 uint32_t cfg_enable_nvmet; 839 uint32_t cfg_nvme_enable_fb; 840 uint32_t cfg_nvmet_fb_size; 841 uint32_t cfg_total_seg_cnt; 842 uint32_t cfg_sg_seg_cnt; 843 uint32_t cfg_nvme_seg_cnt; 844 uint32_t cfg_scsi_seg_cnt; 845 uint32_t cfg_sg_dma_buf_size; 846 uint64_t cfg_soft_wwnn; 847 uint64_t cfg_soft_wwpn; 848 uint32_t cfg_hba_queue_depth; 849 uint32_t cfg_enable_hba_reset; 850 uint32_t cfg_enable_hba_heartbeat; 851 uint32_t cfg_fof; 852 uint32_t cfg_EnableXLane; 853 uint8_t cfg_oas_tgt_wwpn[8]; 854 uint8_t cfg_oas_vpt_wwpn[8]; 855 uint32_t cfg_oas_lun_state; 856 #define OAS_LUN_ENABLE 1 857 #define OAS_LUN_DISABLE 0 858 uint32_t cfg_oas_lun_status; 859 #define OAS_LUN_STATUS_EXISTS 0x01 860 uint32_t cfg_oas_flags; 861 #define OAS_FIND_ANY_VPORT 0x01 862 #define OAS_FIND_ANY_TARGET 0x02 863 #define OAS_LUN_VALID 0x04 864 uint32_t cfg_oas_priority; 865 uint32_t cfg_XLanePriority; 866 uint32_t cfg_enable_bg; 867 uint32_t cfg_prot_mask; 868 uint32_t cfg_prot_guard; 869 uint32_t cfg_hostmem_hgp; 870 uint32_t cfg_log_verbose; 871 uint32_t cfg_enable_fc4_type; 872 uint32_t cfg_aer_support; 873 uint32_t cfg_sriov_nr_virtfn; 874 uint32_t cfg_request_firmware_upgrade; 875 uint32_t cfg_iocb_cnt; 876 uint32_t cfg_suppress_link_up; 877 uint32_t cfg_rrq_xri_bitmap_sz; 878 uint32_t cfg_delay_discovery; 879 uint32_t cfg_sli_mode; 880 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 881 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 882 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 883 uint32_t cfg_enable_dss; 884 uint32_t cfg_fdmi_on; 885 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 886 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 887 uint32_t cfg_enable_SmartSAN; 888 uint32_t cfg_enable_mds_diags; 889 uint32_t cfg_ras_fwlog_level; 890 uint32_t cfg_ras_fwlog_buffsize; 891 uint32_t cfg_ras_fwlog_func; 892 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 893 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 894 #define LPFC_ENABLE_FCP 1 895 #define LPFC_ENABLE_NVME 2 896 #define LPFC_ENABLE_BOTH 3 897 uint32_t cfg_enable_pbde; 898 struct nvmet_fc_target_port *targetport; 899 lpfc_vpd_t vpd; /* vital product data */ 900 901 struct pci_dev *pcidev; 902 struct list_head work_list; 903 uint32_t work_ha; /* Host Attention Bits for WT */ 904 uint32_t work_ha_mask; /* HA Bits owned by WT */ 905 uint32_t work_hs; /* HS stored in case of ERRAT */ 906 uint32_t work_status[2]; /* Extra status from SLIM */ 907 908 wait_queue_head_t work_waitq; 909 struct task_struct *worker_thread; 910 unsigned long data_flags; 911 uint32_t border_sge_num; 912 913 uint32_t hbq_in_use; /* HBQs in use flag */ 914 uint32_t hbq_count; /* Count of configured HBQs */ 915 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 916 917 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 918 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 919 920 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 921 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 922 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 923 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 924 PCI BAR0 */ 925 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 926 PCI BAR2 */ 927 928 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 929 PCI BAR0 with dual-ULP support */ 930 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 931 PCI BAR2 with dual-ULP support */ 932 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 933 PCI BAR4 with dual-ULP support */ 934 #define PCI_64BIT_BAR0 0 935 #define PCI_64BIT_BAR2 2 936 #define PCI_64BIT_BAR4 4 937 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 938 void __iomem *HAregaddr; /* virtual address for host attn reg */ 939 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 940 void __iomem *HSregaddr; /* virtual address for host status 941 reg */ 942 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 943 944 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 945 struct lpfc_pgp *port_gp; 946 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 947 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 948 949 int brd_no; /* FC board number */ 950 char SerialNumber[32]; /* adapter Serial Number */ 951 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 952 char BIOSVersion[16]; /* Boot BIOS version */ 953 char ModelDesc[256]; /* Model Description */ 954 char ModelName[80]; /* Model Name */ 955 char ProgramType[256]; /* Program Type */ 956 char Port[20]; /* Port No */ 957 uint8_t vpd_flag; /* VPD data flag */ 958 959 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 960 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 961 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 962 #define VPD_PORT 0x8 /* valid vpd port data */ 963 #define VPD_MASK 0xf /* mask for any vpd data */ 964 965 uint8_t soft_wwn_enable; 966 967 struct timer_list fcp_poll_timer; 968 struct timer_list eratt_poll; 969 uint32_t eratt_poll_interval; 970 971 uint64_t bg_guard_err_cnt; 972 uint64_t bg_apptag_err_cnt; 973 uint64_t bg_reftag_err_cnt; 974 975 /* fastpath list. */ 976 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 977 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 978 struct list_head lpfc_scsi_buf_list_get; 979 struct list_head lpfc_scsi_buf_list_put; 980 uint32_t total_scsi_bufs; 981 struct list_head lpfc_iocb_list; 982 uint32_t total_iocbq_bufs; 983 struct list_head active_rrq_list; 984 spinlock_t hbalock; 985 986 /* dma_mem_pools */ 987 struct dma_pool *lpfc_sg_dma_buf_pool; 988 struct dma_pool *lpfc_mbuf_pool; 989 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 990 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 991 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 992 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 993 struct dma_pool *txrdy_payload_pool; 994 struct dma_pool *lpfc_cmd_rsp_buf_pool; 995 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 996 997 mempool_t *mbox_mem_pool; 998 mempool_t *nlp_mem_pool; 999 mempool_t *rrq_pool; 1000 mempool_t *active_rrq_pool; 1001 1002 struct fc_host_statistics link_stats; 1003 enum intr_type_t intr_type; 1004 uint32_t intr_mode; 1005 #define LPFC_INTR_ERROR 0xFFFFFFFF 1006 struct list_head port_list; 1007 spinlock_t port_list_lock; /* lock for port_list mutations */ 1008 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1009 uint16_t max_vpi; /* Maximum virtual nports */ 1010 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1011 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1012 uint16_t max_vports; /* 1013 * For IOV HBAs max_vpi can change 1014 * after a reset. max_vports is max 1015 * number of vports present. This can 1016 * be greater than max_vpi. 1017 */ 1018 uint16_t vpi_base; 1019 uint16_t vfi_base; 1020 unsigned long *vpi_bmask; /* vpi allocation table */ 1021 uint16_t *vpi_ids; 1022 uint16_t vpi_count; 1023 struct list_head lpfc_vpi_blk_list; 1024 1025 /* Data structure used by fabric iocb scheduler */ 1026 struct list_head fabric_iocb_list; 1027 atomic_t fabric_iocb_count; 1028 struct timer_list fabric_block_timer; 1029 unsigned long bit_flags; 1030 #define FABRIC_COMANDS_BLOCKED 0 1031 atomic_t num_rsrc_err; 1032 atomic_t num_cmd_success; 1033 unsigned long last_rsrc_error_time; 1034 unsigned long last_ramp_down_time; 1035 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1036 struct dentry *hba_debugfs_root; 1037 atomic_t debugfs_vport_count; 1038 struct dentry *debug_multixri_pools; 1039 struct dentry *debug_hbqinfo; 1040 struct dentry *debug_dumpHostSlim; 1041 struct dentry *debug_dumpHBASlim; 1042 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1043 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1044 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1045 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1046 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1047 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1048 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1049 struct dentry *debug_readApp; /* inject read app_tag errors */ 1050 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1051 1052 struct dentry *debug_nvmeio_trc; 1053 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1054 struct dentry *debug_hdwqinfo; 1055 #ifdef LPFC_HDWQ_LOCK_STAT 1056 struct dentry *debug_lockstat; 1057 #endif 1058 atomic_t nvmeio_trc_cnt; 1059 uint32_t nvmeio_trc_size; 1060 uint32_t nvmeio_trc_output_idx; 1061 1062 /* T10 DIF error injection */ 1063 uint32_t lpfc_injerr_wgrd_cnt; 1064 uint32_t lpfc_injerr_wapp_cnt; 1065 uint32_t lpfc_injerr_wref_cnt; 1066 uint32_t lpfc_injerr_rgrd_cnt; 1067 uint32_t lpfc_injerr_rapp_cnt; 1068 uint32_t lpfc_injerr_rref_cnt; 1069 uint32_t lpfc_injerr_nportid; 1070 struct lpfc_name lpfc_injerr_wwpn; 1071 sector_t lpfc_injerr_lba; 1072 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1073 1074 struct dentry *debug_slow_ring_trc; 1075 struct lpfc_debugfs_trc *slow_ring_trc; 1076 atomic_t slow_ring_trc_cnt; 1077 /* iDiag debugfs sub-directory */ 1078 struct dentry *idiag_root; 1079 struct dentry *idiag_pci_cfg; 1080 struct dentry *idiag_bar_acc; 1081 struct dentry *idiag_que_info; 1082 struct dentry *idiag_que_acc; 1083 struct dentry *idiag_drb_acc; 1084 struct dentry *idiag_ctl_acc; 1085 struct dentry *idiag_mbx_acc; 1086 struct dentry *idiag_ext_acc; 1087 uint8_t lpfc_idiag_last_eq; 1088 #endif 1089 uint16_t nvmeio_trc_on; 1090 1091 /* Used for deferred freeing of ELS data buffers */ 1092 struct list_head elsbuf; 1093 int elsbuf_cnt; 1094 int elsbuf_prev_cnt; 1095 1096 uint8_t temp_sensor_support; 1097 /* Fields used for heart beat. */ 1098 unsigned long last_completion_time; 1099 unsigned long skipped_hb; 1100 struct timer_list hb_tmofunc; 1101 uint8_t hb_outstanding; 1102 struct timer_list rrq_tmr; 1103 enum hba_temp_state over_temp_state; 1104 /* ndlp reference management */ 1105 spinlock_t ndlp_lock; 1106 /* 1107 * Following bit will be set for all buffer tags which are not 1108 * associated with any HBQ. 1109 */ 1110 #define QUE_BUFTAG_BIT (1<<31) 1111 uint32_t buffer_tag_count; 1112 int wait_4_mlo_maint_flg; 1113 wait_queue_head_t wait_4_mlo_m_q; 1114 /* data structure used for latency data collection */ 1115 #define LPFC_NO_BUCKET 0 1116 #define LPFC_LINEAR_BUCKET 1 1117 #define LPFC_POWER2_BUCKET 2 1118 uint8_t bucket_type; 1119 uint32_t bucket_base; 1120 uint32_t bucket_step; 1121 1122 /* Maximum number of events that can be outstanding at any time*/ 1123 #define LPFC_MAX_EVT_COUNT 512 1124 atomic_t fast_event_count; 1125 uint32_t fcoe_eventtag; 1126 uint32_t fcoe_eventtag_at_fcf_scan; 1127 uint32_t fcoe_cvl_eventtag; 1128 uint32_t fcoe_cvl_eventtag_attn; 1129 struct lpfc_fcf fcf; 1130 uint8_t fc_map[3]; 1131 uint8_t valid_vlan; 1132 uint16_t vlan_id; 1133 struct list_head fcf_conn_rec_list; 1134 1135 bool defer_flogi_acc_flag; 1136 uint16_t defer_flogi_acc_rx_id; 1137 uint16_t defer_flogi_acc_ox_id; 1138 1139 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1140 struct list_head ct_ev_waiters; 1141 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1142 uint32_t ctx_idx; 1143 1144 /* RAS Support */ 1145 struct lpfc_ras_fwlog ras_fwlog; 1146 1147 uint8_t menlo_flag; /* menlo generic flags */ 1148 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1149 uint32_t iocb_cnt; 1150 uint32_t iocb_max; 1151 atomic_t sdev_cnt; 1152 uint8_t fips_spec_rev; 1153 uint8_t fips_level; 1154 spinlock_t devicelock; /* lock for luns list */ 1155 mempool_t *device_data_mem_pool; 1156 struct list_head luns; 1157 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1158 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1159 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1160 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1161 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1162 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1163 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1164 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1165 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1166 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1167 uint16_t sfp_alarm; 1168 uint16_t sfp_warning; 1169 1170 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1171 uint16_t cpucheck_on; 1172 #define LPFC_CHECK_OFF 0 1173 #define LPFC_CHECK_NVME_IO 1 1174 #define LPFC_CHECK_NVMET_RCV 2 1175 #define LPFC_CHECK_NVMET_IO 4 1176 #define LPFC_CHECK_SCSI_IO 8 1177 uint16_t ktime_on; 1178 uint64_t ktime_data_samples; 1179 uint64_t ktime_status_samples; 1180 uint64_t ktime_last_cmd; 1181 uint64_t ktime_seg1_total; 1182 uint64_t ktime_seg1_min; 1183 uint64_t ktime_seg1_max; 1184 uint64_t ktime_seg2_total; 1185 uint64_t ktime_seg2_min; 1186 uint64_t ktime_seg2_max; 1187 uint64_t ktime_seg3_total; 1188 uint64_t ktime_seg3_min; 1189 uint64_t ktime_seg3_max; 1190 uint64_t ktime_seg4_total; 1191 uint64_t ktime_seg4_min; 1192 uint64_t ktime_seg4_max; 1193 uint64_t ktime_seg5_total; 1194 uint64_t ktime_seg5_min; 1195 uint64_t ktime_seg5_max; 1196 uint64_t ktime_seg6_total; 1197 uint64_t ktime_seg6_min; 1198 uint64_t ktime_seg6_max; 1199 uint64_t ktime_seg7_total; 1200 uint64_t ktime_seg7_min; 1201 uint64_t ktime_seg7_max; 1202 uint64_t ktime_seg8_total; 1203 uint64_t ktime_seg8_min; 1204 uint64_t ktime_seg8_max; 1205 uint64_t ktime_seg9_total; 1206 uint64_t ktime_seg9_min; 1207 uint64_t ktime_seg9_max; 1208 uint64_t ktime_seg10_total; 1209 uint64_t ktime_seg10_min; 1210 uint64_t ktime_seg10_max; 1211 #endif 1212 }; 1213 1214 static inline struct Scsi_Host * 1215 lpfc_shost_from_vport(struct lpfc_vport *vport) 1216 { 1217 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1218 } 1219 1220 static inline void 1221 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1222 { 1223 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1224 phba->link_flag |= LS_LOOPBACK_MODE; 1225 else 1226 phba->link_flag &= ~LS_LOOPBACK_MODE; 1227 } 1228 1229 static inline int 1230 lpfc_is_link_up(struct lpfc_hba *phba) 1231 { 1232 return phba->link_state == LPFC_LINK_UP || 1233 phba->link_state == LPFC_CLEAR_LA || 1234 phba->link_state == LPFC_HBA_READY; 1235 } 1236 1237 static inline void 1238 lpfc_worker_wake_up(struct lpfc_hba *phba) 1239 { 1240 /* Set the lpfc data pending flag */ 1241 set_bit(LPFC_DATA_READY, &phba->data_flags); 1242 1243 /* Wake up worker thread */ 1244 wake_up(&phba->work_waitq); 1245 return; 1246 } 1247 1248 static inline int 1249 lpfc_readl(void __iomem *addr, uint32_t *data) 1250 { 1251 uint32_t temp; 1252 temp = readl(addr); 1253 if (temp == 0xffffffff) 1254 return -EIO; 1255 *data = temp; 1256 return 0; 1257 } 1258 1259 static inline int 1260 lpfc_sli_read_hs(struct lpfc_hba *phba) 1261 { 1262 /* 1263 * There was a link/board error. Read the status register to retrieve 1264 * the error event and process it. 1265 */ 1266 phba->sli.slistat.err_attn_event++; 1267 1268 /* Save status info and check for unplug error */ 1269 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1270 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1271 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1272 return -EIO; 1273 } 1274 1275 /* Clear chip Host Attention error bit */ 1276 writel(HA_ERATT, phba->HAregaddr); 1277 readl(phba->HAregaddr); /* flush */ 1278 phba->pport->stopped = 1; 1279 1280 return 0; 1281 } 1282 1283 static inline struct lpfc_sli_ring * 1284 lpfc_phba_elsring(struct lpfc_hba *phba) 1285 { 1286 /* Return NULL if sli_rev has become invalid due to bad fw */ 1287 if (phba->sli_rev != LPFC_SLI_REV4 && 1288 phba->sli_rev != LPFC_SLI_REV3 && 1289 phba->sli_rev != LPFC_SLI_REV2) 1290 return NULL; 1291 1292 if (phba->sli_rev == LPFC_SLI_REV4) { 1293 if (phba->sli4_hba.els_wq) 1294 return phba->sli4_hba.els_wq->pring; 1295 else 1296 return NULL; 1297 } 1298 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1299 } 1300 1301 /** 1302 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1303 * @phba: Pointer to HBA context object. 1304 * @q: The Event Queue to update. 1305 * @delay: The delay value (in us) to be written. 1306 * 1307 **/ 1308 static inline void 1309 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1310 u32 delay) 1311 { 1312 struct lpfc_register reg_data; 1313 1314 reg_data.word0 = 0; 1315 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1316 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1317 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1318 eq->q_mode = delay; 1319 } 1320