1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/ktime.h> 26 #include <linux/workqueue.h> 27 28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 29 #define CONFIG_SCSI_LPFC_DEBUG_FS 30 #endif 31 32 struct lpfc_sli2_slim; 33 34 #define ELX_MODEL_NAME_SIZE 80 35 36 #define LPFC_PCI_DEV_LP 0x1 37 #define LPFC_PCI_DEV_OC 0x2 38 39 #define LPFC_SLI_REV2 2 40 #define LPFC_SLI_REV3 3 41 #define LPFC_SLI_REV4 4 42 43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 45 requests */ 46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 47 the NameServer before giving up. */ 48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 51 cmnd for menlo needs nearly twice as for firmware 52 downloads using bsg */ 53 54 #define LPFC_DEFAULT_XPSGL_SIZE 256 55 #define LPFC_MAX_SG_TABLESIZE 0xffff 56 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 57 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 58 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 59 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 60 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 61 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 62 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 63 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 64 65 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 66 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 67 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 68 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 69 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 70 #define LPFC_MIN_TGT_QDEPTH 10 71 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 72 73 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 74 collection. */ 75 /* 76 * Following time intervals are used of adjusting SCSI device 77 * queue depths when there are driver resource error or Firmware 78 * resource error. 79 */ 80 /* 1 Second */ 81 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 82 83 /* Number of exchanges reserved for discovery to complete */ 84 #define LPFC_DISC_IOCB_BUFF_COUNT 20 85 86 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 87 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 88 89 /* Error Attention event polling interval */ 90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 91 92 /* Define macros for 64 bit support */ 93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 95 #define getPaddr(high, low) ((dma_addr_t)( \ 96 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 97 /* Provide maximum configuration definitions. */ 98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 99 #define FC_MAX_ADPTMSG 64 100 101 #define MAX_HBAEVT 32 102 #define MAX_HBAS_NO_RESET 16 103 104 /* Number of MSI-X vectors the driver uses */ 105 #define LPFC_MSIX_VECTORS 2 106 107 /* lpfc wait event data ready flag */ 108 #define LPFC_DATA_READY 0 /* bit 0 */ 109 110 /* queue dump line buffer size */ 111 #define LPFC_LBUF_SZ 128 112 113 /* mailbox system shutdown options */ 114 #define LPFC_MBX_NO_WAIT 0 115 #define LPFC_MBX_WAIT 1 116 117 enum lpfc_polling_flags { 118 ENABLE_FCP_RING_POLLING = 0x1, 119 DISABLE_FCP_RING_INT = 0x2 120 }; 121 122 struct perf_prof { 123 uint16_t cmd_cpu[40]; 124 uint16_t rsp_cpu[40]; 125 uint16_t qh_cpu[40]; 126 uint16_t wqidx[40]; 127 }; 128 129 /* 130 * Provide for FC4 TYPE x28 - NVME. The 131 * bit mask for FCP and NVME is 0x8 identically 132 * because they are 32 bit positions distance. 133 */ 134 #define LPFC_FC4_TYPE_BITMASK 0x00000100 135 136 /* Provide DMA memory definitions the driver uses per port instance. */ 137 struct lpfc_dmabuf { 138 struct list_head list; 139 void *virt; /* virtual address ptr */ 140 dma_addr_t phys; /* mapped address */ 141 uint32_t buffer_tag; /* used for tagged queue ring */ 142 }; 143 144 struct lpfc_nvmet_ctxbuf { 145 struct list_head list; 146 struct lpfc_async_xchg_ctx *context; 147 struct lpfc_iocbq *iocbq; 148 struct lpfc_sglq *sglq; 149 struct work_struct defer_work; 150 }; 151 152 struct lpfc_dma_pool { 153 struct lpfc_dmabuf *elements; 154 uint32_t max_count; 155 uint32_t current_count; 156 }; 157 158 struct hbq_dmabuf { 159 struct lpfc_dmabuf hbuf; 160 struct lpfc_dmabuf dbuf; 161 uint16_t total_size; 162 uint16_t bytes_recv; 163 uint32_t tag; 164 struct lpfc_cq_event cq_event; 165 unsigned long time_stamp; 166 void *context; 167 }; 168 169 struct rqb_dmabuf { 170 struct lpfc_dmabuf hbuf; 171 struct lpfc_dmabuf dbuf; 172 uint16_t total_size; 173 uint16_t bytes_recv; 174 uint16_t idx; 175 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 176 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 177 }; 178 179 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 180 #define MEM_PRI 0x100 181 182 183 /****************************************************************************/ 184 /* Device VPD save area */ 185 /****************************************************************************/ 186 typedef struct lpfc_vpd { 187 uint32_t status; /* vpd status value */ 188 uint32_t length; /* number of bytes actually returned */ 189 struct { 190 uint32_t rsvd1; /* Revision numbers */ 191 uint32_t biuRev; 192 uint32_t smRev; 193 uint32_t smFwRev; 194 uint32_t endecRev; 195 uint16_t rBit; 196 uint8_t fcphHigh; 197 uint8_t fcphLow; 198 uint8_t feaLevelHigh; 199 uint8_t feaLevelLow; 200 uint32_t postKernRev; 201 uint32_t opFwRev; 202 uint8_t opFwName[16]; 203 uint32_t sli1FwRev; 204 uint8_t sli1FwName[16]; 205 uint32_t sli2FwRev; 206 uint8_t sli2FwName[16]; 207 } rev; 208 struct { 209 #ifdef __BIG_ENDIAN_BITFIELD 210 uint32_t rsvd3 :20; /* Reserved */ 211 uint32_t rsvd2 : 3; /* Reserved */ 212 uint32_t cbg : 1; /* Configure BlockGuard */ 213 uint32_t cmv : 1; /* Configure Max VPIs */ 214 uint32_t ccrp : 1; /* Config Command Ring Polling */ 215 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 216 uint32_t chbs : 1; /* Cofigure Host Backing store */ 217 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 218 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 219 uint32_t cmx : 1; /* Configure Max XRIs */ 220 uint32_t cmr : 1; /* Configure Max RPIs */ 221 #else /* __LITTLE_ENDIAN */ 222 uint32_t cmr : 1; /* Configure Max RPIs */ 223 uint32_t cmx : 1; /* Configure Max XRIs */ 224 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 225 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 226 uint32_t chbs : 1; /* Cofigure Host Backing store */ 227 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 228 uint32_t ccrp : 1; /* Config Command Ring Polling */ 229 uint32_t cmv : 1; /* Configure Max VPIs */ 230 uint32_t cbg : 1; /* Configure BlockGuard */ 231 uint32_t rsvd2 : 3; /* Reserved */ 232 uint32_t rsvd3 :20; /* Reserved */ 233 #endif 234 } sli3Feat; 235 } lpfc_vpd_t; 236 237 238 /* 239 * lpfc stat counters 240 */ 241 struct lpfc_stats { 242 /* Statistics for ELS commands */ 243 uint32_t elsLogiCol; 244 uint32_t elsRetryExceeded; 245 uint32_t elsXmitRetry; 246 uint32_t elsDelayRetry; 247 uint32_t elsRcvDrop; 248 uint32_t elsRcvFrame; 249 uint32_t elsRcvRSCN; 250 uint32_t elsRcvRNID; 251 uint32_t elsRcvFARP; 252 uint32_t elsRcvFARPR; 253 uint32_t elsRcvFLOGI; 254 uint32_t elsRcvPLOGI; 255 uint32_t elsRcvADISC; 256 uint32_t elsRcvPDISC; 257 uint32_t elsRcvFAN; 258 uint32_t elsRcvLOGO; 259 uint32_t elsRcvPRLO; 260 uint32_t elsRcvPRLI; 261 uint32_t elsRcvLIRR; 262 uint32_t elsRcvRLS; 263 uint32_t elsRcvRPL; 264 uint32_t elsRcvRRQ; 265 uint32_t elsRcvRTV; 266 uint32_t elsRcvECHO; 267 uint32_t elsRcvLCB; 268 uint32_t elsRcvRDP; 269 uint32_t elsXmitFLOGI; 270 uint32_t elsXmitFDISC; 271 uint32_t elsXmitPLOGI; 272 uint32_t elsXmitPRLI; 273 uint32_t elsXmitADISC; 274 uint32_t elsXmitLOGO; 275 uint32_t elsXmitSCR; 276 uint32_t elsXmitRSCN; 277 uint32_t elsXmitRNID; 278 uint32_t elsXmitFARP; 279 uint32_t elsXmitFARPR; 280 uint32_t elsXmitACC; 281 uint32_t elsXmitLSRJT; 282 283 uint32_t frameRcvBcast; 284 uint32_t frameRcvMulti; 285 uint32_t strayXmitCmpl; 286 uint32_t frameXmitDelay; 287 uint32_t xriCmdCmpl; 288 uint32_t xriStatErr; 289 uint32_t LinkUp; 290 uint32_t LinkDown; 291 uint32_t LinkMultiEvent; 292 uint32_t NoRcvBuf; 293 uint32_t fcpCmd; 294 uint32_t fcpCmpl; 295 uint32_t fcpRspErr; 296 uint32_t fcpRemoteStop; 297 uint32_t fcpPortRjt; 298 uint32_t fcpPortBusy; 299 uint32_t fcpError; 300 uint32_t fcpLocalErr; 301 }; 302 303 struct lpfc_hba; 304 305 306 enum discovery_state { 307 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 308 LPFC_VPORT_FAILED = 1, /* vport has failed */ 309 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 310 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 311 LPFC_FDISC = 8, /* FDISC sent for vport */ 312 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 313 * configured */ 314 LPFC_NS_REG = 10, /* Register with NameServer */ 315 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 316 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 317 * device authentication / discovery */ 318 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 319 LPFC_VPORT_READY = 32, 320 }; 321 322 enum hba_state { 323 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 324 LPFC_WARM_START = 1, /* HBA state after selective reset */ 325 LPFC_INIT_START = 2, /* Initial state after board reset */ 326 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 327 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 328 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 329 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 330 * CLEAR_LA */ 331 LPFC_HBA_READY = 32, 332 LPFC_HBA_ERROR = -1 333 }; 334 335 struct lpfc_trunk_link_state { 336 enum hba_state state; 337 uint8_t fault; 338 }; 339 340 struct lpfc_trunk_link { 341 struct lpfc_trunk_link_state link0, 342 link1, 343 link2, 344 link3; 345 }; 346 347 struct lpfc_vport { 348 struct lpfc_hba *phba; 349 struct list_head listentry; 350 uint8_t port_type; 351 #define LPFC_PHYSICAL_PORT 1 352 #define LPFC_NPIV_PORT 2 353 #define LPFC_FABRIC_PORT 3 354 enum discovery_state port_state; 355 356 uint16_t vpi; 357 uint16_t vfi; 358 uint8_t vpi_state; 359 #define LPFC_VPI_REGISTERED 0x1 360 361 uint32_t fc_flag; /* FC flags */ 362 /* Several of these flags are HBA centric and should be moved to 363 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 364 */ 365 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 366 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 367 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 368 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 369 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 370 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 371 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 372 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 373 #define FC_FABRIC 0x100 /* We are fabric attached */ 374 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 375 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 376 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 377 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 378 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 379 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 380 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 381 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 382 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 383 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 384 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 385 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 386 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 387 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 388 389 uint32_t ct_flags; 390 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 391 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 392 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 393 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 394 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 395 396 struct list_head fc_nodes; 397 398 /* Keep counters for the number of entries in each list. */ 399 uint16_t fc_plogi_cnt; 400 uint16_t fc_adisc_cnt; 401 uint16_t fc_reglogin_cnt; 402 uint16_t fc_prli_cnt; 403 uint16_t fc_unmap_cnt; 404 uint16_t fc_map_cnt; 405 uint16_t fc_npr_cnt; 406 uint16_t fc_unused_cnt; 407 struct serv_parm fc_sparam; /* buffer for our service parameters */ 408 409 uint32_t fc_myDID; /* fibre channel S_ID */ 410 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 411 struct lpfc_name fabric_portname; 412 struct lpfc_name fabric_nodename; 413 414 int32_t stopped; /* HBA has not been restarted since last ERATT */ 415 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 416 417 uint32_t num_disc_nodes; /* in addition to hba_state */ 418 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 419 420 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 421 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 422 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 423 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 424 struct lpfc_name fc_nodename; /* fc nodename */ 425 struct lpfc_name fc_portname; /* fc portname */ 426 427 struct lpfc_work_evt disc_timeout_evt; 428 429 struct timer_list fc_disctmo; /* Discovery rescue timer */ 430 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 431 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 432 433 spinlock_t work_port_lock; 434 uint32_t work_port_events; /* Timeout to be handled */ 435 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 436 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 437 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 438 439 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 440 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 441 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 442 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 443 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 444 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 445 446 struct timer_list els_tmofunc; 447 struct timer_list delayed_disc_tmo; 448 449 int unreg_vpi_cmpl; 450 451 uint8_t load_flag; 452 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 453 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 454 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 455 /* Vport Config Parameters */ 456 uint32_t cfg_scan_down; 457 uint32_t cfg_lun_queue_depth; 458 uint32_t cfg_nodev_tmo; 459 uint32_t cfg_devloss_tmo; 460 uint32_t cfg_restrict_login; 461 uint32_t cfg_peer_port_login; 462 uint32_t cfg_fcp_class; 463 uint32_t cfg_use_adisc; 464 uint32_t cfg_discovery_threads; 465 uint32_t cfg_log_verbose; 466 uint32_t cfg_enable_fc4_type; 467 uint32_t cfg_max_luns; 468 uint32_t cfg_enable_da_id; 469 uint32_t cfg_max_scsicmpl_time; 470 uint32_t cfg_tgt_queue_depth; 471 uint32_t cfg_first_burst_size; 472 uint32_t dev_loss_tmo_changed; 473 474 struct fc_vport *fc_vport; 475 476 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 477 struct dentry *debug_disc_trc; 478 struct dentry *debug_nodelist; 479 struct dentry *debug_nvmestat; 480 struct dentry *debug_scsistat; 481 struct dentry *debug_ioktime; 482 struct dentry *debug_hdwqstat; 483 struct dentry *vport_debugfs_root; 484 struct lpfc_debugfs_trc *disc_trc; 485 atomic_t disc_trc_cnt; 486 #endif 487 uint8_t stat_data_enabled; 488 uint8_t stat_data_blocked; 489 struct list_head rcv_buffer_list; 490 unsigned long rcv_buffer_time_stamp; 491 uint32_t vport_flag; 492 #define STATIC_VPORT 1 493 #define FAWWPN_SET 2 494 #define FAWWPN_PARAM_CHG 4 495 496 uint16_t fdmi_num_disc; 497 uint32_t fdmi_hba_mask; 498 uint32_t fdmi_port_mask; 499 500 /* There is a single nvme instance per vport. */ 501 struct nvme_fc_local_port *localport; 502 uint8_t nvmei_support; /* driver supports NVME Initiator */ 503 uint32_t last_fcp_wqidx; 504 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 505 }; 506 507 struct hbq_s { 508 uint16_t entry_count; /* Current number of HBQ slots */ 509 uint16_t buffer_count; /* Current number of buffers posted */ 510 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 511 uint32_t hbqPutIdx; /* HBQ slot to use */ 512 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 513 void *hbq_virt; /* Virtual ptr to this hbq */ 514 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 515 /* Callback for HBQ buffer allocation */ 516 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 517 /* Callback for HBQ buffer free */ 518 void (*hbq_free_buffer) (struct lpfc_hba *, 519 struct hbq_dmabuf *); 520 }; 521 522 /* this matches the position in the lpfc_hbq_defs array */ 523 #define LPFC_ELS_HBQ 0 524 #define LPFC_MAX_HBQS 1 525 526 enum hba_temp_state { 527 HBA_NORMAL_TEMP, 528 HBA_OVER_TEMP 529 }; 530 531 enum intr_type_t { 532 NONE = 0, 533 INTx, 534 MSI, 535 MSIX, 536 }; 537 538 #define LPFC_CT_CTX_MAX 64 539 struct unsol_rcv_ct_ctx { 540 uint32_t ctxt_id; 541 uint32_t SID; 542 uint32_t valid; 543 #define UNSOL_INVALID 0 544 #define UNSOL_VALID 1 545 uint16_t oxid; 546 uint16_t rxid; 547 }; 548 549 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 550 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 551 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 552 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 553 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 554 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 555 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 556 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 557 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 558 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 559 560 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 561 562 enum nemb_type { 563 nemb_mse = 1, 564 nemb_hbd 565 }; 566 567 enum mbox_type { 568 mbox_rd = 1, 569 mbox_wr 570 }; 571 572 enum dma_type { 573 dma_mbox = 1, 574 dma_ebuf 575 }; 576 577 enum sta_type { 578 sta_pre_addr = 1, 579 sta_pos_addr 580 }; 581 582 struct lpfc_mbox_ext_buf_ctx { 583 uint32_t state; 584 #define LPFC_BSG_MBOX_IDLE 0 585 #define LPFC_BSG_MBOX_HOST 1 586 #define LPFC_BSG_MBOX_PORT 2 587 #define LPFC_BSG_MBOX_DONE 3 588 #define LPFC_BSG_MBOX_ABTS 4 589 enum nemb_type nembType; 590 enum mbox_type mboxType; 591 uint32_t numBuf; 592 uint32_t mbxTag; 593 uint32_t seqNum; 594 struct lpfc_dmabuf *mbx_dmabuf; 595 struct list_head ext_dmabuf_list; 596 }; 597 598 struct lpfc_epd_pool { 599 /* Expedite pool */ 600 struct list_head list; 601 u32 count; 602 spinlock_t lock; /* lock for expedite pool */ 603 }; 604 605 enum ras_state { 606 INACTIVE, 607 REG_INPROGRESS, 608 ACTIVE 609 }; 610 611 struct lpfc_ras_fwlog { 612 uint8_t *fwlog_buff; 613 uint32_t fw_buffcount; /* Buffer size posted to FW */ 614 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 615 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 616 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 617 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 618 uint32_t fw_loglevel; /* Log level set */ 619 struct lpfc_dmabuf lwpd; 620 struct list_head fwlog_buff_list; 621 622 /* RAS support status on adapter */ 623 bool ras_hwsupport; /* RAS Support available on HW or not */ 624 bool ras_enabled; /* Ras Enabled for the function */ 625 #define LPFC_RAS_DISABLE_LOGGING 0x00 626 #define LPFC_RAS_ENABLE_LOGGING 0x01 627 enum ras_state state; /* RAS logging running state */ 628 }; 629 630 #define DBG_LOG_STR_SZ 256 631 #define DBG_LOG_SZ 256 632 633 struct dbg_log_ent { 634 char log[DBG_LOG_STR_SZ]; 635 u64 t_ns; 636 }; 637 638 enum lpfc_irq_chann_mode { 639 /* Assign IRQs to all possible cpus that have hardware queues */ 640 NORMAL_MODE, 641 642 /* Assign IRQs only to cpus on the same numa node as HBA */ 643 NUMA_MODE, 644 645 /* Assign IRQs only on non-hyperthreaded CPUs. This is the 646 * same as normal_mode, but assign IRQS only on physical CPUs. 647 */ 648 NHT_MODE, 649 }; 650 651 struct lpfc_hba { 652 /* SCSI interface function jump table entries */ 653 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 654 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 655 struct scsi_cmnd *cmnd); 656 int (*lpfc_scsi_prep_dma_buf) 657 (struct lpfc_hba *, struct lpfc_io_buf *); 658 void (*lpfc_scsi_unprep_dma_buf) 659 (struct lpfc_hba *, struct lpfc_io_buf *); 660 void (*lpfc_release_scsi_buf) 661 (struct lpfc_hba *, struct lpfc_io_buf *); 662 void (*lpfc_rampdown_queue_depth) 663 (struct lpfc_hba *); 664 void (*lpfc_scsi_prep_cmnd) 665 (struct lpfc_vport *, struct lpfc_io_buf *, 666 struct lpfc_nodelist *); 667 int (*lpfc_scsi_prep_cmnd_buf) 668 (struct lpfc_vport *vport, 669 struct lpfc_io_buf *lpfc_cmd, 670 uint8_t tmo); 671 672 /* IOCB interface function jump table entries */ 673 int (*__lpfc_sli_issue_iocb) 674 (struct lpfc_hba *, uint32_t, 675 struct lpfc_iocbq *, uint32_t); 676 int (*__lpfc_sli_issue_fcp_io) 677 (struct lpfc_hba *phba, uint32_t ring_number, 678 struct lpfc_iocbq *piocb, uint32_t flag); 679 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 680 struct lpfc_iocbq *); 681 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 682 IOCB_t * (*lpfc_get_iocb_from_iocbq) 683 (struct lpfc_iocbq *); 684 void (*lpfc_scsi_cmd_iocb_cmpl) 685 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 686 687 /* MBOX interface function jump table entries */ 688 int (*lpfc_sli_issue_mbox) 689 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 690 691 /* Slow-path IOCB process function jump table entries */ 692 void (*lpfc_sli_handle_slow_ring_event) 693 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 694 uint32_t mask); 695 696 /* INIT device interface function jump table entries */ 697 int (*lpfc_sli_hbq_to_firmware) 698 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 699 int (*lpfc_sli_brdrestart) 700 (struct lpfc_hba *); 701 int (*lpfc_sli_brdready) 702 (struct lpfc_hba *, uint32_t); 703 void (*lpfc_handle_eratt) 704 (struct lpfc_hba *); 705 void (*lpfc_stop_port) 706 (struct lpfc_hba *); 707 int (*lpfc_hba_init_link) 708 (struct lpfc_hba *, uint32_t); 709 int (*lpfc_hba_down_link) 710 (struct lpfc_hba *, uint32_t); 711 int (*lpfc_selective_reset) 712 (struct lpfc_hba *); 713 714 int (*lpfc_bg_scsi_prep_dma_buf) 715 (struct lpfc_hba *, struct lpfc_io_buf *); 716 /* Add new entries here */ 717 718 /* expedite pool */ 719 struct lpfc_epd_pool epd_pool; 720 721 /* SLI4 specific HBA data structure */ 722 struct lpfc_sli4_hba sli4_hba; 723 724 struct workqueue_struct *wq; 725 struct delayed_work eq_delay_work; 726 727 #define LPFC_IDLE_STAT_DELAY 1000 728 struct delayed_work idle_stat_delay_work; 729 730 struct lpfc_sli sli; 731 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 732 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 733 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 734 #define LPFC_SLI3_HBQ_ENABLED 0x01 735 #define LPFC_SLI3_NPIV_ENABLED 0x02 736 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 737 #define LPFC_SLI3_CRP_ENABLED 0x08 738 #define LPFC_SLI3_BG_ENABLED 0x20 739 #define LPFC_SLI3_DSS_ENABLED 0x40 740 #define LPFC_SLI4_PERFH_ENABLED 0x80 741 #define LPFC_SLI4_PHWQ_ENABLED 0x100 742 uint32_t iocb_cmd_size; 743 uint32_t iocb_rsp_size; 744 745 struct lpfc_trunk_link trunk_link; 746 enum hba_state link_state; 747 uint32_t link_flag; /* link state flags */ 748 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 749 /* This flag is set while issuing */ 750 /* INIT_LINK mailbox command */ 751 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 752 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 753 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 754 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 755 #define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */ 756 757 uint32_t hba_flag; /* hba generic flags */ 758 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 759 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 760 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 761 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 762 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 763 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */ 764 #define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */ 765 #define ASYNC_EVENT 0x80 766 #define LINK_DISABLED 0x100 /* Link disabled by user */ 767 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 768 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 769 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 770 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 771 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 772 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 773 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 774 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 775 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 776 #define HBA_FORCED_LINK_SPEED 0x40000 /* 777 * Firmware supports Forced Link Speed 778 * capability 779 */ 780 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 781 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */ 782 783 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 784 struct lpfc_dmabuf slim2p; 785 786 MAILBOX_t *mbox; 787 uint32_t *mbox_ext; 788 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 789 uint32_t ha_copy; 790 struct _PCB *pcb; 791 struct _IOCB *IOCBs; 792 793 struct lpfc_dmabuf hbqslimp; 794 795 uint16_t pci_cfg_value; 796 797 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 798 799 uint32_t fc_eventTag; /* event tag for link attention */ 800 uint32_t link_events; 801 802 /* These fields used to be binfo */ 803 uint32_t fc_pref_DID; /* preferred D_ID */ 804 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 805 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 806 uint32_t fc_edtov; /* E_D_TOV timer value */ 807 uint32_t fc_arbtov; /* ARB_TOV timer value */ 808 uint32_t fc_ratov; /* R_A_TOV timer value */ 809 uint32_t fc_rttov; /* R_T_TOV timer value */ 810 uint32_t fc_altov; /* AL_TOV timer value */ 811 uint32_t fc_crtov; /* C_R_TOV timer value */ 812 813 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 814 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 815 816 uint32_t lmt; 817 818 uint32_t fc_topology; /* link topology, from LINK INIT */ 819 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 820 821 struct lpfc_stats fc_stat; 822 823 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 824 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 825 826 uint8_t wwnn[8]; 827 uint8_t wwpn[8]; 828 uint32_t RandomData[7]; 829 uint8_t fcp_embed_io; 830 uint8_t nvme_support; /* Firmware supports NVME */ 831 uint8_t nvmet_support; /* driver supports NVMET */ 832 #define LPFC_NVMET_MAX_PORTS 32 833 uint8_t mds_diags_support; 834 uint8_t bbcredit_support; 835 uint8_t enab_exp_wqcq_pages; 836 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 837 838 /* HBA Config Parameters */ 839 uint32_t cfg_ack0; 840 uint32_t cfg_xri_rebalancing; 841 uint32_t cfg_xpsgl; 842 uint32_t cfg_enable_npiv; 843 uint32_t cfg_enable_rrq; 844 uint32_t cfg_topology; 845 uint32_t cfg_link_speed; 846 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 847 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 848 uint32_t cfg_fcf_failover_policy; 849 uint32_t cfg_fcp_io_sched; 850 uint32_t cfg_ns_query; 851 uint32_t cfg_fcp2_no_tgt_reset; 852 uint32_t cfg_cr_delay; 853 uint32_t cfg_cr_count; 854 uint32_t cfg_multi_ring_support; 855 uint32_t cfg_multi_ring_rctl; 856 uint32_t cfg_multi_ring_type; 857 uint32_t cfg_poll; 858 uint32_t cfg_poll_tmo; 859 uint32_t cfg_task_mgmt_tmo; 860 uint32_t cfg_use_msi; 861 uint32_t cfg_auto_imax; 862 uint32_t cfg_fcp_imax; 863 uint32_t cfg_force_rscn; 864 uint32_t cfg_cq_poll_threshold; 865 uint32_t cfg_cq_max_proc_limit; 866 uint32_t cfg_fcp_cpu_map; 867 uint32_t cfg_fcp_mq_threshold; 868 uint32_t cfg_hdw_queue; 869 uint32_t cfg_irq_chann; 870 uint32_t cfg_suppress_rsp; 871 uint32_t cfg_nvme_oas; 872 uint32_t cfg_nvme_embed_cmd; 873 uint32_t cfg_nvmet_mrq_post; 874 uint32_t cfg_nvmet_mrq; 875 uint32_t cfg_enable_nvmet; 876 uint32_t cfg_nvme_enable_fb; 877 uint32_t cfg_nvmet_fb_size; 878 uint32_t cfg_total_seg_cnt; 879 uint32_t cfg_sg_seg_cnt; 880 uint32_t cfg_nvme_seg_cnt; 881 uint32_t cfg_scsi_seg_cnt; 882 uint32_t cfg_sg_dma_buf_size; 883 uint64_t cfg_soft_wwnn; 884 uint64_t cfg_soft_wwpn; 885 uint32_t cfg_hba_queue_depth; 886 uint32_t cfg_enable_hba_reset; 887 uint32_t cfg_enable_hba_heartbeat; 888 uint32_t cfg_fof; 889 uint32_t cfg_EnableXLane; 890 uint8_t cfg_oas_tgt_wwpn[8]; 891 uint8_t cfg_oas_vpt_wwpn[8]; 892 uint32_t cfg_oas_lun_state; 893 #define OAS_LUN_ENABLE 1 894 #define OAS_LUN_DISABLE 0 895 uint32_t cfg_oas_lun_status; 896 #define OAS_LUN_STATUS_EXISTS 0x01 897 uint32_t cfg_oas_flags; 898 #define OAS_FIND_ANY_VPORT 0x01 899 #define OAS_FIND_ANY_TARGET 0x02 900 #define OAS_LUN_VALID 0x04 901 uint32_t cfg_oas_priority; 902 uint32_t cfg_XLanePriority; 903 uint32_t cfg_enable_bg; 904 uint32_t cfg_prot_mask; 905 uint32_t cfg_prot_guard; 906 uint32_t cfg_hostmem_hgp; 907 uint32_t cfg_log_verbose; 908 uint32_t cfg_enable_fc4_type; 909 uint32_t cfg_aer_support; 910 uint32_t cfg_sriov_nr_virtfn; 911 uint32_t cfg_request_firmware_upgrade; 912 uint32_t cfg_suppress_link_up; 913 uint32_t cfg_rrq_xri_bitmap_sz; 914 uint32_t cfg_delay_discovery; 915 uint32_t cfg_sli_mode; 916 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 917 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 918 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 919 uint32_t cfg_fdmi_on; 920 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 921 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 922 uint32_t cfg_enable_SmartSAN; 923 uint32_t cfg_enable_mds_diags; 924 uint32_t cfg_ras_fwlog_level; 925 uint32_t cfg_ras_fwlog_buffsize; 926 uint32_t cfg_ras_fwlog_func; 927 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 928 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 929 #define LPFC_ENABLE_FCP 1 930 #define LPFC_ENABLE_NVME 2 931 #define LPFC_ENABLE_BOTH 3 932 uint32_t cfg_enable_pbde; 933 uint32_t cfg_enable_mi; 934 struct nvmet_fc_target_port *targetport; 935 lpfc_vpd_t vpd; /* vital product data */ 936 937 struct pci_dev *pcidev; 938 struct list_head work_list; 939 uint32_t work_ha; /* Host Attention Bits for WT */ 940 uint32_t work_ha_mask; /* HA Bits owned by WT */ 941 uint32_t work_hs; /* HS stored in case of ERRAT */ 942 uint32_t work_status[2]; /* Extra status from SLIM */ 943 944 wait_queue_head_t work_waitq; 945 struct task_struct *worker_thread; 946 unsigned long data_flags; 947 uint32_t border_sge_num; 948 949 uint32_t hbq_in_use; /* HBQs in use flag */ 950 uint32_t hbq_count; /* Count of configured HBQs */ 951 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 952 953 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 954 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 955 956 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 957 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 958 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 959 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 960 PCI BAR0 */ 961 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 962 PCI BAR2 */ 963 964 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 965 PCI BAR0 with dual-ULP support */ 966 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 967 PCI BAR2 with dual-ULP support */ 968 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 969 PCI BAR4 with dual-ULP support */ 970 #define PCI_64BIT_BAR0 0 971 #define PCI_64BIT_BAR2 2 972 #define PCI_64BIT_BAR4 4 973 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 974 void __iomem *HAregaddr; /* virtual address for host attn reg */ 975 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 976 void __iomem *HSregaddr; /* virtual address for host status 977 reg */ 978 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 979 980 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 981 struct lpfc_pgp *port_gp; 982 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 983 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 984 985 int brd_no; /* FC board number */ 986 char SerialNumber[32]; /* adapter Serial Number */ 987 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 988 char BIOSVersion[16]; /* Boot BIOS version */ 989 char ModelDesc[256]; /* Model Description */ 990 char ModelName[80]; /* Model Name */ 991 char ProgramType[256]; /* Program Type */ 992 char Port[20]; /* Port No */ 993 uint8_t vpd_flag; /* VPD data flag */ 994 995 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 996 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 997 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 998 #define VPD_PORT 0x8 /* valid vpd port data */ 999 #define VPD_MASK 0xf /* mask for any vpd data */ 1000 1001 uint8_t soft_wwn_enable; 1002 1003 struct timer_list fcp_poll_timer; 1004 struct timer_list eratt_poll; 1005 uint32_t eratt_poll_interval; 1006 1007 uint64_t bg_guard_err_cnt; 1008 uint64_t bg_apptag_err_cnt; 1009 uint64_t bg_reftag_err_cnt; 1010 1011 /* fastpath list. */ 1012 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 1013 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 1014 struct list_head lpfc_scsi_buf_list_get; 1015 struct list_head lpfc_scsi_buf_list_put; 1016 uint32_t total_scsi_bufs; 1017 struct list_head lpfc_iocb_list; 1018 uint32_t total_iocbq_bufs; 1019 struct list_head active_rrq_list; 1020 spinlock_t hbalock; 1021 1022 /* dma_mem_pools */ 1023 struct dma_pool *lpfc_sg_dma_buf_pool; 1024 struct dma_pool *lpfc_mbuf_pool; 1025 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 1026 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 1027 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 1028 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 1029 struct dma_pool *lpfc_cmd_rsp_buf_pool; 1030 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 1031 1032 mempool_t *mbox_mem_pool; 1033 mempool_t *nlp_mem_pool; 1034 mempool_t *rrq_pool; 1035 mempool_t *active_rrq_pool; 1036 1037 struct fc_host_statistics link_stats; 1038 enum lpfc_irq_chann_mode irq_chann_mode; 1039 enum intr_type_t intr_type; 1040 uint32_t intr_mode; 1041 #define LPFC_INTR_ERROR 0xFFFFFFFF 1042 struct list_head port_list; 1043 spinlock_t port_list_lock; /* lock for port_list mutations */ 1044 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1045 uint16_t max_vpi; /* Maximum virtual nports */ 1046 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1047 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1048 uint16_t max_vports; /* 1049 * For IOV HBAs max_vpi can change 1050 * after a reset. max_vports is max 1051 * number of vports present. This can 1052 * be greater than max_vpi. 1053 */ 1054 uint16_t vpi_base; 1055 uint16_t vfi_base; 1056 unsigned long *vpi_bmask; /* vpi allocation table */ 1057 uint16_t *vpi_ids; 1058 uint16_t vpi_count; 1059 struct list_head lpfc_vpi_blk_list; 1060 1061 /* Data structure used by fabric iocb scheduler */ 1062 struct list_head fabric_iocb_list; 1063 atomic_t fabric_iocb_count; 1064 struct timer_list fabric_block_timer; 1065 unsigned long bit_flags; 1066 #define FABRIC_COMANDS_BLOCKED 0 1067 atomic_t num_rsrc_err; 1068 atomic_t num_cmd_success; 1069 unsigned long last_rsrc_error_time; 1070 unsigned long last_ramp_down_time; 1071 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1072 struct dentry *hba_debugfs_root; 1073 atomic_t debugfs_vport_count; 1074 struct dentry *debug_multixri_pools; 1075 struct dentry *debug_hbqinfo; 1076 struct dentry *debug_dumpHostSlim; 1077 struct dentry *debug_dumpHBASlim; 1078 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1079 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1080 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1081 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1082 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1083 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1084 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1085 struct dentry *debug_readApp; /* inject read app_tag errors */ 1086 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1087 1088 struct dentry *debug_nvmeio_trc; 1089 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1090 struct dentry *debug_hdwqinfo; 1091 #ifdef LPFC_HDWQ_LOCK_STAT 1092 struct dentry *debug_lockstat; 1093 #endif 1094 struct dentry *debug_ras_log; 1095 atomic_t nvmeio_trc_cnt; 1096 uint32_t nvmeio_trc_size; 1097 uint32_t nvmeio_trc_output_idx; 1098 1099 /* T10 DIF error injection */ 1100 uint32_t lpfc_injerr_wgrd_cnt; 1101 uint32_t lpfc_injerr_wapp_cnt; 1102 uint32_t lpfc_injerr_wref_cnt; 1103 uint32_t lpfc_injerr_rgrd_cnt; 1104 uint32_t lpfc_injerr_rapp_cnt; 1105 uint32_t lpfc_injerr_rref_cnt; 1106 uint32_t lpfc_injerr_nportid; 1107 struct lpfc_name lpfc_injerr_wwpn; 1108 sector_t lpfc_injerr_lba; 1109 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1110 1111 struct dentry *debug_slow_ring_trc; 1112 struct lpfc_debugfs_trc *slow_ring_trc; 1113 atomic_t slow_ring_trc_cnt; 1114 /* iDiag debugfs sub-directory */ 1115 struct dentry *idiag_root; 1116 struct dentry *idiag_pci_cfg; 1117 struct dentry *idiag_bar_acc; 1118 struct dentry *idiag_que_info; 1119 struct dentry *idiag_que_acc; 1120 struct dentry *idiag_drb_acc; 1121 struct dentry *idiag_ctl_acc; 1122 struct dentry *idiag_mbx_acc; 1123 struct dentry *idiag_ext_acc; 1124 uint8_t lpfc_idiag_last_eq; 1125 #endif 1126 uint16_t nvmeio_trc_on; 1127 1128 /* Used for deferred freeing of ELS data buffers */ 1129 struct list_head elsbuf; 1130 int elsbuf_cnt; 1131 int elsbuf_prev_cnt; 1132 1133 uint8_t temp_sensor_support; 1134 /* Fields used for heart beat. */ 1135 unsigned long last_completion_time; 1136 unsigned long skipped_hb; 1137 struct timer_list hb_tmofunc; 1138 uint8_t hb_outstanding; 1139 struct timer_list rrq_tmr; 1140 enum hba_temp_state over_temp_state; 1141 /* 1142 * Following bit will be set for all buffer tags which are not 1143 * associated with any HBQ. 1144 */ 1145 #define QUE_BUFTAG_BIT (1<<31) 1146 uint32_t buffer_tag_count; 1147 int wait_4_mlo_maint_flg; 1148 wait_queue_head_t wait_4_mlo_m_q; 1149 /* data structure used for latency data collection */ 1150 #define LPFC_NO_BUCKET 0 1151 #define LPFC_LINEAR_BUCKET 1 1152 #define LPFC_POWER2_BUCKET 2 1153 uint8_t bucket_type; 1154 uint32_t bucket_base; 1155 uint32_t bucket_step; 1156 1157 /* Maximum number of events that can be outstanding at any time*/ 1158 #define LPFC_MAX_EVT_COUNT 512 1159 atomic_t fast_event_count; 1160 uint32_t fcoe_eventtag; 1161 uint32_t fcoe_eventtag_at_fcf_scan; 1162 uint32_t fcoe_cvl_eventtag; 1163 uint32_t fcoe_cvl_eventtag_attn; 1164 struct lpfc_fcf fcf; 1165 uint8_t fc_map[3]; 1166 uint8_t valid_vlan; 1167 uint16_t vlan_id; 1168 struct list_head fcf_conn_rec_list; 1169 1170 bool defer_flogi_acc_flag; 1171 uint16_t defer_flogi_acc_rx_id; 1172 uint16_t defer_flogi_acc_ox_id; 1173 1174 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1175 struct list_head ct_ev_waiters; 1176 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1177 uint32_t ctx_idx; 1178 1179 /* RAS Support */ 1180 struct lpfc_ras_fwlog ras_fwlog; 1181 1182 uint8_t menlo_flag; /* menlo generic flags */ 1183 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1184 uint32_t iocb_cnt; 1185 uint32_t iocb_max; 1186 atomic_t sdev_cnt; 1187 spinlock_t devicelock; /* lock for luns list */ 1188 mempool_t *device_data_mem_pool; 1189 struct list_head luns; 1190 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1191 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1192 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1193 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1194 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1195 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1196 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1197 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1198 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1199 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1200 uint16_t sfp_alarm; 1201 uint16_t sfp_warning; 1202 1203 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1204 uint16_t hdwqstat_on; 1205 #define LPFC_CHECK_OFF 0 1206 #define LPFC_CHECK_NVME_IO 1 1207 #define LPFC_CHECK_NVMET_IO 2 1208 #define LPFC_CHECK_SCSI_IO 4 1209 uint16_t ktime_on; 1210 uint64_t ktime_data_samples; 1211 uint64_t ktime_status_samples; 1212 uint64_t ktime_last_cmd; 1213 uint64_t ktime_seg1_total; 1214 uint64_t ktime_seg1_min; 1215 uint64_t ktime_seg1_max; 1216 uint64_t ktime_seg2_total; 1217 uint64_t ktime_seg2_min; 1218 uint64_t ktime_seg2_max; 1219 uint64_t ktime_seg3_total; 1220 uint64_t ktime_seg3_min; 1221 uint64_t ktime_seg3_max; 1222 uint64_t ktime_seg4_total; 1223 uint64_t ktime_seg4_min; 1224 uint64_t ktime_seg4_max; 1225 uint64_t ktime_seg5_total; 1226 uint64_t ktime_seg5_min; 1227 uint64_t ktime_seg5_max; 1228 uint64_t ktime_seg6_total; 1229 uint64_t ktime_seg6_min; 1230 uint64_t ktime_seg6_max; 1231 uint64_t ktime_seg7_total; 1232 uint64_t ktime_seg7_min; 1233 uint64_t ktime_seg7_max; 1234 uint64_t ktime_seg8_total; 1235 uint64_t ktime_seg8_min; 1236 uint64_t ktime_seg8_max; 1237 uint64_t ktime_seg9_total; 1238 uint64_t ktime_seg9_min; 1239 uint64_t ktime_seg9_max; 1240 uint64_t ktime_seg10_total; 1241 uint64_t ktime_seg10_min; 1242 uint64_t ktime_seg10_max; 1243 #endif 1244 1245 struct hlist_node cpuhp; /* used for cpuhp per hba callback */ 1246 struct timer_list cpuhp_poll_timer; 1247 struct list_head poll_list; /* slowpath eq polling list */ 1248 #define LPFC_POLL_HB 1 /* slowpath heartbeat */ 1249 #define LPFC_POLL_FASTPATH 0 /* called from fastpath */ 1250 #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */ 1251 1252 char os_host_name[MAXHOSTNAMELEN]; 1253 1254 /* SCSI host template information - for physical port */ 1255 struct scsi_host_template port_template; 1256 /* SCSI host template information - for all vports */ 1257 struct scsi_host_template vport_template; 1258 atomic_t dbg_log_idx; 1259 atomic_t dbg_log_cnt; 1260 atomic_t dbg_log_dmping; 1261 struct dbg_log_ent dbg_log[DBG_LOG_SZ]; 1262 }; 1263 1264 static inline struct Scsi_Host * 1265 lpfc_shost_from_vport(struct lpfc_vport *vport) 1266 { 1267 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1268 } 1269 1270 static inline void 1271 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1272 { 1273 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1274 phba->link_flag |= LS_LOOPBACK_MODE; 1275 else 1276 phba->link_flag &= ~LS_LOOPBACK_MODE; 1277 } 1278 1279 static inline int 1280 lpfc_is_link_up(struct lpfc_hba *phba) 1281 { 1282 return phba->link_state == LPFC_LINK_UP || 1283 phba->link_state == LPFC_CLEAR_LA || 1284 phba->link_state == LPFC_HBA_READY; 1285 } 1286 1287 static inline void 1288 lpfc_worker_wake_up(struct lpfc_hba *phba) 1289 { 1290 /* Set the lpfc data pending flag */ 1291 set_bit(LPFC_DATA_READY, &phba->data_flags); 1292 1293 /* Wake up worker thread */ 1294 wake_up(&phba->work_waitq); 1295 return; 1296 } 1297 1298 static inline int 1299 lpfc_readl(void __iomem *addr, uint32_t *data) 1300 { 1301 uint32_t temp; 1302 temp = readl(addr); 1303 if (temp == 0xffffffff) 1304 return -EIO; 1305 *data = temp; 1306 return 0; 1307 } 1308 1309 static inline int 1310 lpfc_sli_read_hs(struct lpfc_hba *phba) 1311 { 1312 /* 1313 * There was a link/board error. Read the status register to retrieve 1314 * the error event and process it. 1315 */ 1316 phba->sli.slistat.err_attn_event++; 1317 1318 /* Save status info and check for unplug error */ 1319 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1320 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1321 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1322 return -EIO; 1323 } 1324 1325 /* Clear chip Host Attention error bit */ 1326 writel(HA_ERATT, phba->HAregaddr); 1327 readl(phba->HAregaddr); /* flush */ 1328 phba->pport->stopped = 1; 1329 1330 return 0; 1331 } 1332 1333 static inline struct lpfc_sli_ring * 1334 lpfc_phba_elsring(struct lpfc_hba *phba) 1335 { 1336 /* Return NULL if sli_rev has become invalid due to bad fw */ 1337 if (phba->sli_rev != LPFC_SLI_REV4 && 1338 phba->sli_rev != LPFC_SLI_REV3 && 1339 phba->sli_rev != LPFC_SLI_REV2) 1340 return NULL; 1341 1342 if (phba->sli_rev == LPFC_SLI_REV4) { 1343 if (phba->sli4_hba.els_wq) 1344 return phba->sli4_hba.els_wq->pring; 1345 else 1346 return NULL; 1347 } 1348 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1349 } 1350 1351 /** 1352 * lpfc_next_online_cpu - Finds next online CPU on cpumask 1353 * @mask: Pointer to phba's cpumask member. 1354 * @start: starting cpu index 1355 * 1356 * Note: If no valid cpu found, then nr_cpu_ids is returned. 1357 * 1358 **/ 1359 static inline unsigned int 1360 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start) 1361 { 1362 unsigned int cpu_it; 1363 1364 for_each_cpu_wrap(cpu_it, mask, start) { 1365 if (cpu_online(cpu_it)) 1366 break; 1367 } 1368 1369 return cpu_it; 1370 } 1371 /** 1372 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1373 * @phba: Pointer to HBA context object. 1374 * @q: The Event Queue to update. 1375 * @delay: The delay value (in us) to be written. 1376 * 1377 **/ 1378 static inline void 1379 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1380 u32 delay) 1381 { 1382 struct lpfc_register reg_data; 1383 1384 reg_data.word0 = 0; 1385 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1386 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1387 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1388 eq->q_mode = delay; 1389 } 1390 1391 1392 /* 1393 * Macro that declares tables and a routine to perform enum type to 1394 * ascii string lookup. 1395 * 1396 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for 1397 * the enum to populate the table. Macro defines a routine (named 1398 * by caller) that will search all elements of the table for the key 1399 * and return the name string if found or "Unrecognized" if not found. 1400 */ 1401 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \ 1402 static struct { \ 1403 enum enum_name value; \ 1404 char *name; \ 1405 } fc_##enum_name##_e2str_names[] = enum_init; \ 1406 static const char *routine(enum enum_name table_key) \ 1407 { \ 1408 int i; \ 1409 char *name = "Unrecognized"; \ 1410 \ 1411 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\ 1412 if (fc_##enum_name##_e2str_names[i].value == table_key) {\ 1413 name = fc_##enum_name##_e2str_names[i].name; \ 1414 break; \ 1415 } \ 1416 } \ 1417 return name; \ 1418 } 1419