1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/hashtable.h> 26 #include <linux/ktime.h> 27 #include <linux/workqueue.h> 28 29 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 30 #define CONFIG_SCSI_LPFC_DEBUG_FS 31 #endif 32 33 struct lpfc_sli2_slim; 34 35 #define ELX_MODEL_NAME_SIZE 80 36 37 #define LPFC_PCI_DEV_LP 0x1 38 #define LPFC_PCI_DEV_OC 0x2 39 40 #define LPFC_SLI_REV2 2 41 #define LPFC_SLI_REV3 3 42 #define LPFC_SLI_REV4 4 43 44 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 45 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 46 requests */ 47 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 48 the NameServer before giving up. */ 49 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 50 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 51 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 52 cmnd for menlo needs nearly twice as for firmware 53 downloads using bsg */ 54 55 #define LPFC_DEFAULT_XPSGL_SIZE 256 56 #define LPFC_MAX_SG_TABLESIZE 0xffff 57 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 58 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 59 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 60 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 61 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 62 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 63 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 64 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 65 66 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 67 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 68 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 69 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 70 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 71 #define LPFC_MIN_TGT_QDEPTH 10 72 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 73 74 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 75 collection. */ 76 /* 77 * Following time intervals are used of adjusting SCSI device 78 * queue depths when there are driver resource error or Firmware 79 * resource error. 80 */ 81 /* 1 Second */ 82 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 83 84 /* Number of exchanges reserved for discovery to complete */ 85 #define LPFC_DISC_IOCB_BUFF_COUNT 20 86 87 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 88 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 89 90 /* Error Attention event polling interval */ 91 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 92 93 /* Define macros for 64 bit support */ 94 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 95 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 96 #define getPaddr(high, low) ((dma_addr_t)( \ 97 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 98 /* Provide maximum configuration definitions. */ 99 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 100 #define FC_MAX_ADPTMSG 64 101 102 #define MAX_HBAEVT 32 103 #define MAX_HBAS_NO_RESET 16 104 105 /* Number of MSI-X vectors the driver uses */ 106 #define LPFC_MSIX_VECTORS 2 107 108 /* lpfc wait event data ready flag */ 109 #define LPFC_DATA_READY 0 /* bit 0 */ 110 111 /* queue dump line buffer size */ 112 #define LPFC_LBUF_SZ 128 113 114 /* mailbox system shutdown options */ 115 #define LPFC_MBX_NO_WAIT 0 116 #define LPFC_MBX_WAIT 1 117 118 #define LPFC_CFG_PARAM_MAGIC_NUM 0xFEAA0005 119 #define LPFC_PORT_CFG_NAME "/cfg/port.cfg" 120 121 #define lpfc_rangecheck(val, min, max) \ 122 ((uint)(val) >= (uint)(min) && (val) <= (max)) 123 124 enum lpfc_polling_flags { 125 ENABLE_FCP_RING_POLLING = 0x1, 126 DISABLE_FCP_RING_INT = 0x2 127 }; 128 129 struct perf_prof { 130 uint16_t cmd_cpu[40]; 131 uint16_t rsp_cpu[40]; 132 uint16_t qh_cpu[40]; 133 uint16_t wqidx[40]; 134 }; 135 136 /* 137 * Provide for FC4 TYPE x28 - NVME. The 138 * bit mask for FCP and NVME is 0x8 identically 139 * because they are 32 bit positions distance. 140 */ 141 #define LPFC_FC4_TYPE_BITMASK 0x00000100 142 143 /* Provide DMA memory definitions the driver uses per port instance. */ 144 struct lpfc_dmabuf { 145 struct list_head list; 146 void *virt; /* virtual address ptr */ 147 dma_addr_t phys; /* mapped address */ 148 uint32_t buffer_tag; /* used for tagged queue ring */ 149 }; 150 151 struct lpfc_nvmet_ctxbuf { 152 struct list_head list; 153 struct lpfc_async_xchg_ctx *context; 154 struct lpfc_iocbq *iocbq; 155 struct lpfc_sglq *sglq; 156 struct work_struct defer_work; 157 }; 158 159 struct lpfc_dma_pool { 160 struct lpfc_dmabuf *elements; 161 uint32_t max_count; 162 uint32_t current_count; 163 }; 164 165 struct hbq_dmabuf { 166 struct lpfc_dmabuf hbuf; 167 struct lpfc_dmabuf dbuf; 168 uint16_t total_size; 169 uint16_t bytes_recv; 170 uint32_t tag; 171 struct lpfc_cq_event cq_event; 172 unsigned long time_stamp; 173 void *context; 174 }; 175 176 struct rqb_dmabuf { 177 struct lpfc_dmabuf hbuf; 178 struct lpfc_dmabuf dbuf; 179 uint16_t total_size; 180 uint16_t bytes_recv; 181 uint16_t idx; 182 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 183 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 184 }; 185 186 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 187 #define MEM_PRI 0x100 188 189 190 /****************************************************************************/ 191 /* Device VPD save area */ 192 /****************************************************************************/ 193 typedef struct lpfc_vpd { 194 uint32_t status; /* vpd status value */ 195 uint32_t length; /* number of bytes actually returned */ 196 struct { 197 uint32_t rsvd1; /* Revision numbers */ 198 uint32_t biuRev; 199 uint32_t smRev; 200 uint32_t smFwRev; 201 uint32_t endecRev; 202 uint16_t rBit; 203 uint8_t fcphHigh; 204 uint8_t fcphLow; 205 uint8_t feaLevelHigh; 206 uint8_t feaLevelLow; 207 uint32_t postKernRev; 208 uint32_t opFwRev; 209 uint8_t opFwName[16]; 210 uint32_t sli1FwRev; 211 uint8_t sli1FwName[16]; 212 uint32_t sli2FwRev; 213 uint8_t sli2FwName[16]; 214 } rev; 215 struct { 216 #ifdef __BIG_ENDIAN_BITFIELD 217 uint32_t rsvd3 :20; /* Reserved */ 218 uint32_t rsvd2 : 3; /* Reserved */ 219 uint32_t cbg : 1; /* Configure BlockGuard */ 220 uint32_t cmv : 1; /* Configure Max VPIs */ 221 uint32_t ccrp : 1; /* Config Command Ring Polling */ 222 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 223 uint32_t chbs : 1; /* Cofigure Host Backing store */ 224 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 225 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 226 uint32_t cmx : 1; /* Configure Max XRIs */ 227 uint32_t cmr : 1; /* Configure Max RPIs */ 228 #else /* __LITTLE_ENDIAN */ 229 uint32_t cmr : 1; /* Configure Max RPIs */ 230 uint32_t cmx : 1; /* Configure Max XRIs */ 231 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 232 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 233 uint32_t chbs : 1; /* Cofigure Host Backing store */ 234 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 235 uint32_t ccrp : 1; /* Config Command Ring Polling */ 236 uint32_t cmv : 1; /* Configure Max VPIs */ 237 uint32_t cbg : 1; /* Configure BlockGuard */ 238 uint32_t rsvd2 : 3; /* Reserved */ 239 uint32_t rsvd3 :20; /* Reserved */ 240 #endif 241 } sli3Feat; 242 } lpfc_vpd_t; 243 244 245 /* 246 * lpfc stat counters 247 */ 248 struct lpfc_stats { 249 /* Statistics for ELS commands */ 250 uint32_t elsLogiCol; 251 uint32_t elsRetryExceeded; 252 uint32_t elsXmitRetry; 253 uint32_t elsDelayRetry; 254 uint32_t elsRcvDrop; 255 uint32_t elsRcvFrame; 256 uint32_t elsRcvRSCN; 257 uint32_t elsRcvRNID; 258 uint32_t elsRcvFARP; 259 uint32_t elsRcvFARPR; 260 uint32_t elsRcvFLOGI; 261 uint32_t elsRcvPLOGI; 262 uint32_t elsRcvADISC; 263 uint32_t elsRcvPDISC; 264 uint32_t elsRcvFAN; 265 uint32_t elsRcvLOGO; 266 uint32_t elsRcvPRLO; 267 uint32_t elsRcvPRLI; 268 uint32_t elsRcvLIRR; 269 uint32_t elsRcvRLS; 270 uint32_t elsRcvRPL; 271 uint32_t elsRcvRRQ; 272 uint32_t elsRcvRTV; 273 uint32_t elsRcvECHO; 274 uint32_t elsRcvLCB; 275 uint32_t elsRcvRDP; 276 uint32_t elsRcvRDF; 277 uint32_t elsXmitFLOGI; 278 uint32_t elsXmitFDISC; 279 uint32_t elsXmitPLOGI; 280 uint32_t elsXmitPRLI; 281 uint32_t elsXmitADISC; 282 uint32_t elsXmitLOGO; 283 uint32_t elsXmitSCR; 284 uint32_t elsXmitRSCN; 285 uint32_t elsXmitRNID; 286 uint32_t elsXmitFARP; 287 uint32_t elsXmitFARPR; 288 uint32_t elsXmitACC; 289 uint32_t elsXmitLSRJT; 290 291 uint32_t frameRcvBcast; 292 uint32_t frameRcvMulti; 293 uint32_t strayXmitCmpl; 294 uint32_t frameXmitDelay; 295 uint32_t xriCmdCmpl; 296 uint32_t xriStatErr; 297 uint32_t LinkUp; 298 uint32_t LinkDown; 299 uint32_t LinkMultiEvent; 300 uint32_t NoRcvBuf; 301 uint32_t fcpCmd; 302 uint32_t fcpCmpl; 303 uint32_t fcpRspErr; 304 uint32_t fcpRemoteStop; 305 uint32_t fcpPortRjt; 306 uint32_t fcpPortBusy; 307 uint32_t fcpError; 308 uint32_t fcpLocalErr; 309 }; 310 311 struct lpfc_hba; 312 313 314 #define LPFC_VMID_TIMER 300 /* timer interval in seconds */ 315 316 #define LPFC_MAX_VMID_SIZE 256 317 #define LPFC_COMPRESS_VMID_SIZE 16 318 319 union lpfc_vmid_io_tag { 320 u32 app_id; /* App Id vmid */ 321 u8 cs_ctl_vmid; /* Priority tag vmid */ 322 }; 323 324 #define JIFFIES_PER_HR (HZ * 60 * 60) 325 326 struct lpfc_vmid { 327 u8 flag; 328 #define LPFC_VMID_SLOT_FREE 0x0 329 #define LPFC_VMID_SLOT_USED 0x1 330 #define LPFC_VMID_REQ_REGISTER 0x2 331 #define LPFC_VMID_REGISTERED 0x4 332 #define LPFC_VMID_DE_REGISTER 0x8 333 char host_vmid[LPFC_MAX_VMID_SIZE]; 334 union lpfc_vmid_io_tag un; 335 struct hlist_node hnode; 336 u64 io_rd_cnt; 337 u64 io_wr_cnt; 338 u8 vmid_len; 339 u8 delete_inactive; /* Delete if inactive flag 0 = no, 1 = yes */ 340 u32 hash_index; 341 u64 __percpu *last_io_time; 342 }; 343 344 #define lpfc_vmid_is_type_priority_tag(vport)\ 345 (vport->vmid_priority_tagging ? 1 : 0) 346 347 #define LPFC_VMID_HASH_SIZE 256 348 #define LPFC_VMID_HASH_MASK 255 349 #define LPFC_VMID_HASH_SHIFT 6 350 351 struct lpfc_vmid_context { 352 struct lpfc_vmid *vmp; 353 struct lpfc_nodelist *nlp; 354 bool instantiated; 355 }; 356 357 struct lpfc_vmid_priority_range { 358 u8 low; 359 u8 high; 360 u8 qos; 361 }; 362 363 struct lpfc_vmid_priority_info { 364 u32 num_descriptors; 365 struct lpfc_vmid_priority_range *vmid_range; 366 }; 367 368 #define QFPA_EVEN_ONLY 0x01 369 #define QFPA_ODD_ONLY 0x02 370 #define QFPA_EVEN_ODD 0x03 371 372 enum discovery_state { 373 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 374 LPFC_VPORT_FAILED = 1, /* vport has failed */ 375 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 376 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 377 LPFC_FDISC = 8, /* FDISC sent for vport */ 378 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 379 * configured */ 380 LPFC_NS_REG = 10, /* Register with NameServer */ 381 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 382 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 383 * device authentication / discovery */ 384 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 385 LPFC_VPORT_READY = 32, 386 }; 387 388 enum hba_state { 389 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 390 LPFC_WARM_START = 1, /* HBA state after selective reset */ 391 LPFC_INIT_START = 2, /* Initial state after board reset */ 392 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 393 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 394 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 395 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 396 * CLEAR_LA */ 397 LPFC_HBA_READY = 32, 398 LPFC_HBA_ERROR = -1 399 }; 400 401 struct lpfc_trunk_link_state { 402 enum hba_state state; 403 uint8_t fault; 404 }; 405 406 struct lpfc_trunk_link { 407 struct lpfc_trunk_link_state link0, 408 link1, 409 link2, 410 link3; 411 }; 412 413 /* Format of congestion module parameters */ 414 struct lpfc_cgn_param { 415 uint32_t cgn_param_magic; 416 uint8_t cgn_param_version; /* version 1 */ 417 uint8_t cgn_param_mode; /* 0=off 1=managed 2=monitor only */ 418 #define LPFC_CFG_OFF 0 419 #define LPFC_CFG_MANAGED 1 420 #define LPFC_CFG_MONITOR 2 421 uint8_t cgn_rsvd1; 422 uint8_t cgn_rsvd2; 423 uint8_t cgn_param_level0; 424 uint8_t cgn_param_level1; 425 uint8_t cgn_param_level2; 426 uint8_t byte11; 427 uint8_t byte12; 428 uint8_t byte13; 429 uint8_t byte14; 430 uint8_t byte15; 431 }; 432 433 /* Max number of days of congestion data */ 434 #define LPFC_MAX_CGN_DAYS 10 435 436 /* Format of congestion buffer info 437 * This structure defines memory thats allocated and registered with 438 * the HBA firmware. When adding or removing fields from this structure 439 * the alignment must match the HBA firmware. 440 */ 441 442 struct lpfc_cgn_info { 443 /* Header */ 444 __le16 cgn_info_size; /* is sizeof(struct lpfc_cgn_info) */ 445 uint8_t cgn_info_version; /* represents format of structure */ 446 #define LPFC_CGN_INFO_V1 1 447 #define LPFC_CGN_INFO_V2 2 448 #define LPFC_CGN_INFO_V3 3 449 uint8_t cgn_info_mode; /* 0=off 1=managed 2=monitor only */ 450 uint8_t cgn_info_detect; 451 uint8_t cgn_info_action; 452 uint8_t cgn_info_level0; 453 uint8_t cgn_info_level1; 454 uint8_t cgn_info_level2; 455 456 /* Start Time */ 457 uint8_t cgn_info_month; 458 uint8_t cgn_info_day; 459 uint8_t cgn_info_year; 460 uint8_t cgn_info_hour; 461 uint8_t cgn_info_minute; 462 uint8_t cgn_info_second; 463 464 /* minute / hours / daily indices */ 465 uint8_t cgn_index_minute; 466 uint8_t cgn_index_hour; 467 uint8_t cgn_index_day; 468 469 __le16 cgn_warn_freq; 470 __le16 cgn_alarm_freq; 471 __le16 cgn_lunq; 472 uint8_t cgn_pad1[8]; 473 474 /* Driver Information */ 475 __le16 cgn_drvr_min[60]; 476 __le32 cgn_drvr_hr[24]; 477 __le32 cgn_drvr_day[LPFC_MAX_CGN_DAYS]; 478 479 /* Congestion Warnings */ 480 __le16 cgn_warn_min[60]; 481 __le32 cgn_warn_hr[24]; 482 __le32 cgn_warn_day[LPFC_MAX_CGN_DAYS]; 483 484 /* Latency Information */ 485 __le32 cgn_latency_min[60]; 486 __le32 cgn_latency_hr[24]; 487 __le32 cgn_latency_day[LPFC_MAX_CGN_DAYS]; 488 489 /* Bandwidth Information */ 490 __le16 cgn_bw_min[60]; 491 __le16 cgn_bw_hr[24]; 492 __le16 cgn_bw_day[LPFC_MAX_CGN_DAYS]; 493 494 /* Congestion Alarms */ 495 __le16 cgn_alarm_min[60]; 496 __le32 cgn_alarm_hr[24]; 497 __le32 cgn_alarm_day[LPFC_MAX_CGN_DAYS]; 498 499 struct_group(cgn_stat, 500 uint8_t cgn_stat_npm; /* Notifications per minute */ 501 502 /* Start Time */ 503 uint8_t cgn_stat_month; 504 uint8_t cgn_stat_day; 505 uint8_t cgn_stat_year; 506 uint8_t cgn_stat_hour; 507 uint8_t cgn_stat_minute; 508 uint8_t cgn_pad2[2]; 509 510 __le32 cgn_notification; 511 __le32 cgn_peer_notification; 512 __le32 link_integ_notification; 513 __le32 delivery_notification; 514 515 uint8_t cgn_stat_cgn_month; /* Last congestion notification FPIN */ 516 uint8_t cgn_stat_cgn_day; 517 uint8_t cgn_stat_cgn_year; 518 uint8_t cgn_stat_cgn_hour; 519 uint8_t cgn_stat_cgn_min; 520 uint8_t cgn_stat_cgn_sec; 521 522 uint8_t cgn_stat_peer_month; /* Last peer congestion FPIN */ 523 uint8_t cgn_stat_peer_day; 524 uint8_t cgn_stat_peer_year; 525 uint8_t cgn_stat_peer_hour; 526 uint8_t cgn_stat_peer_min; 527 uint8_t cgn_stat_peer_sec; 528 529 uint8_t cgn_stat_lnk_month; /* Last link integrity FPIN */ 530 uint8_t cgn_stat_lnk_day; 531 uint8_t cgn_stat_lnk_year; 532 uint8_t cgn_stat_lnk_hour; 533 uint8_t cgn_stat_lnk_min; 534 uint8_t cgn_stat_lnk_sec; 535 536 uint8_t cgn_stat_del_month; /* Last delivery notification FPIN */ 537 uint8_t cgn_stat_del_day; 538 uint8_t cgn_stat_del_year; 539 uint8_t cgn_stat_del_hour; 540 uint8_t cgn_stat_del_min; 541 uint8_t cgn_stat_del_sec; 542 ); 543 544 __le32 cgn_info_crc; 545 #define LPFC_CGN_CRC32_MAGIC_NUMBER 0x1EDC6F41 546 #define LPFC_CGN_CRC32_SEED 0xFFFFFFFF 547 }; 548 549 #define LPFC_CGN_INFO_SZ (sizeof(struct lpfc_cgn_info) - \ 550 sizeof(uint32_t)) 551 552 struct lpfc_cgn_stat { 553 atomic64_t total_bytes; 554 atomic64_t rcv_bytes; 555 atomic64_t rx_latency; 556 #define LPFC_CGN_NOT_SENT 0xFFFFFFFFFFFFFFFFLL 557 atomic_t rx_io_cnt; 558 }; 559 560 struct lpfc_cgn_acqe_stat { 561 atomic64_t alarm; 562 atomic64_t warn; 563 }; 564 565 struct lpfc_vport { 566 struct lpfc_hba *phba; 567 struct list_head listentry; 568 uint8_t port_type; 569 #define LPFC_PHYSICAL_PORT 1 570 #define LPFC_NPIV_PORT 2 571 #define LPFC_FABRIC_PORT 3 572 enum discovery_state port_state; 573 574 uint16_t vpi; 575 uint16_t vfi; 576 uint8_t vpi_state; 577 #define LPFC_VPI_REGISTERED 0x1 578 579 uint32_t fc_flag; /* FC flags */ 580 /* Several of these flags are HBA centric and should be moved to 581 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 582 */ 583 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 584 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 585 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 586 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 587 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 588 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 589 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 590 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 591 #define FC_FABRIC 0x100 /* We are fabric attached */ 592 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 593 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 594 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 595 #define FC_PT2PT_NO_NVME 0x1000 /* Don't send NVME PRLI */ 596 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 597 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 598 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 599 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 600 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 601 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 602 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 603 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 604 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 605 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 606 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 607 608 uint32_t ct_flags; 609 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 610 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 611 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 612 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 613 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 614 615 struct list_head fc_nodes; 616 617 /* Keep counters for the number of entries in each list. */ 618 uint16_t fc_plogi_cnt; 619 uint16_t fc_adisc_cnt; 620 uint16_t fc_reglogin_cnt; 621 uint16_t fc_prli_cnt; 622 uint16_t fc_unmap_cnt; 623 uint16_t fc_map_cnt; 624 uint16_t fc_npr_cnt; 625 uint16_t fc_unused_cnt; 626 struct serv_parm fc_sparam; /* buffer for our service parameters */ 627 628 uint32_t fc_myDID; /* fibre channel S_ID */ 629 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 630 struct lpfc_name fabric_portname; 631 struct lpfc_name fabric_nodename; 632 633 int32_t stopped; /* HBA has not been restarted since last ERATT */ 634 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 635 636 uint32_t num_disc_nodes; /* in addition to hba_state */ 637 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 638 639 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 640 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 641 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 642 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 643 struct lpfc_name fc_nodename; /* fc nodename */ 644 struct lpfc_name fc_portname; /* fc portname */ 645 646 struct lpfc_work_evt disc_timeout_evt; 647 648 struct timer_list fc_disctmo; /* Discovery rescue timer */ 649 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 650 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 651 652 spinlock_t work_port_lock; 653 uint32_t work_port_events; /* Timeout to be handled */ 654 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 655 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 656 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 657 658 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 659 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 660 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 661 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 662 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 663 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 664 #define WORKER_CHECK_INACTIVE_VMID 0x4000 /* hba: check inactive vmids */ 665 #define WORKER_CHECK_VMID_ISSUE_QFPA 0x8000 /* vport: Check if qfpa needs 666 * to be issued */ 667 668 struct timer_list els_tmofunc; 669 struct timer_list delayed_disc_tmo; 670 671 uint8_t load_flag; 672 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 673 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 674 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 675 #define FC_ALLOW_VMID 0x8 /* Allow VMID I/Os */ 676 #define FC_DEREGISTER_ALL_APP_ID 0x10 /* Deregister all VMIDs */ 677 /* Vport Config Parameters */ 678 uint32_t cfg_scan_down; 679 uint32_t cfg_lun_queue_depth; 680 uint32_t cfg_nodev_tmo; 681 uint32_t cfg_devloss_tmo; 682 uint32_t cfg_restrict_login; 683 uint32_t cfg_peer_port_login; 684 uint32_t cfg_fcp_class; 685 uint32_t cfg_use_adisc; 686 uint32_t cfg_discovery_threads; 687 uint32_t cfg_log_verbose; 688 uint32_t cfg_enable_fc4_type; 689 uint32_t cfg_max_luns; 690 uint32_t cfg_enable_da_id; 691 uint32_t cfg_max_scsicmpl_time; 692 uint32_t cfg_tgt_queue_depth; 693 uint32_t cfg_first_burst_size; 694 uint32_t dev_loss_tmo_changed; 695 /* VMID parameters */ 696 u8 lpfc_vmid_host_uuid[LPFC_COMPRESS_VMID_SIZE]; 697 u32 max_vmid; /* maximum VMIDs allowed per port */ 698 u32 cur_vmid_cnt; /* Current VMID count */ 699 #define LPFC_MIN_VMID 4 700 #define LPFC_MAX_VMID 255 701 u32 vmid_inactivity_timeout; /* Time after which the VMID */ 702 /* deregisters from switch */ 703 u32 vmid_priority_tagging; 704 #define LPFC_VMID_PRIO_TAG_DISABLE 0 /* Disable */ 705 #define LPFC_VMID_PRIO_TAG_SUP_TARGETS 1 /* Allow supported targets only */ 706 #define LPFC_VMID_PRIO_TAG_ALL_TARGETS 2 /* Allow all targets */ 707 unsigned long *vmid_priority_range; 708 #define LPFC_VMID_MAX_PRIORITY_RANGE 256 709 #define LPFC_VMID_PRIORITY_BITMAP_SIZE 32 710 u8 vmid_flag; 711 #define LPFC_VMID_IN_USE 0x1 712 #define LPFC_VMID_ISSUE_QFPA 0x2 713 #define LPFC_VMID_QFPA_CMPL 0x4 714 #define LPFC_VMID_QOS_ENABLED 0x8 715 #define LPFC_VMID_TIMER_ENBLD 0x10 716 struct fc_qfpa_res *qfpa_res; 717 718 struct fc_vport *fc_vport; 719 720 struct lpfc_vmid *vmid; 721 DECLARE_HASHTABLE(hash_table, 8); 722 rwlock_t vmid_lock; 723 struct lpfc_vmid_priority_info vmid_priority; 724 725 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 726 struct dentry *debug_disc_trc; 727 struct dentry *debug_nodelist; 728 struct dentry *debug_nvmestat; 729 struct dentry *debug_scsistat; 730 struct dentry *debug_ioktime; 731 struct dentry *debug_hdwqstat; 732 struct dentry *vport_debugfs_root; 733 struct lpfc_debugfs_trc *disc_trc; 734 atomic_t disc_trc_cnt; 735 #endif 736 uint8_t stat_data_enabled; 737 uint8_t stat_data_blocked; 738 struct list_head rcv_buffer_list; 739 unsigned long rcv_buffer_time_stamp; 740 uint32_t vport_flag; 741 #define STATIC_VPORT 1 742 #define FAWWPN_SET 2 743 #define FAWWPN_PARAM_CHG 4 744 745 uint16_t fdmi_num_disc; 746 uint32_t fdmi_hba_mask; 747 uint32_t fdmi_port_mask; 748 749 /* There is a single nvme instance per vport. */ 750 struct nvme_fc_local_port *localport; 751 uint8_t nvmei_support; /* driver supports NVME Initiator */ 752 uint32_t last_fcp_wqidx; 753 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 754 }; 755 756 struct hbq_s { 757 uint16_t entry_count; /* Current number of HBQ slots */ 758 uint16_t buffer_count; /* Current number of buffers posted */ 759 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 760 uint32_t hbqPutIdx; /* HBQ slot to use */ 761 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 762 void *hbq_virt; /* Virtual ptr to this hbq */ 763 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 764 /* Callback for HBQ buffer allocation */ 765 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 766 /* Callback for HBQ buffer free */ 767 void (*hbq_free_buffer) (struct lpfc_hba *, 768 struct hbq_dmabuf *); 769 }; 770 771 /* this matches the position in the lpfc_hbq_defs array */ 772 #define LPFC_ELS_HBQ 0 773 #define LPFC_MAX_HBQS 1 774 775 enum hba_temp_state { 776 HBA_NORMAL_TEMP, 777 HBA_OVER_TEMP 778 }; 779 780 enum intr_type_t { 781 NONE = 0, 782 INTx, 783 MSI, 784 MSIX, 785 }; 786 787 #define LPFC_CT_CTX_MAX 64 788 struct unsol_rcv_ct_ctx { 789 uint32_t ctxt_id; 790 uint32_t SID; 791 uint32_t valid; 792 #define UNSOL_INVALID 0 793 #define UNSOL_VALID 1 794 uint16_t oxid; 795 uint16_t rxid; 796 }; 797 798 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 799 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 800 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 801 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 802 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 803 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 804 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 805 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 806 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 807 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 808 809 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 810 811 enum nemb_type { 812 nemb_mse = 1, 813 nemb_hbd 814 }; 815 816 enum mbox_type { 817 mbox_rd = 1, 818 mbox_wr 819 }; 820 821 enum dma_type { 822 dma_mbox = 1, 823 dma_ebuf 824 }; 825 826 enum sta_type { 827 sta_pre_addr = 1, 828 sta_pos_addr 829 }; 830 831 struct lpfc_mbox_ext_buf_ctx { 832 uint32_t state; 833 #define LPFC_BSG_MBOX_IDLE 0 834 #define LPFC_BSG_MBOX_HOST 1 835 #define LPFC_BSG_MBOX_PORT 2 836 #define LPFC_BSG_MBOX_DONE 3 837 #define LPFC_BSG_MBOX_ABTS 4 838 enum nemb_type nembType; 839 enum mbox_type mboxType; 840 uint32_t numBuf; 841 uint32_t mbxTag; 842 uint32_t seqNum; 843 struct lpfc_dmabuf *mbx_dmabuf; 844 struct list_head ext_dmabuf_list; 845 }; 846 847 struct lpfc_epd_pool { 848 /* Expedite pool */ 849 struct list_head list; 850 u32 count; 851 spinlock_t lock; /* lock for expedite pool */ 852 }; 853 854 enum ras_state { 855 INACTIVE, 856 REG_INPROGRESS, 857 ACTIVE 858 }; 859 860 struct lpfc_ras_fwlog { 861 uint8_t *fwlog_buff; 862 uint32_t fw_buffcount; /* Buffer size posted to FW */ 863 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 864 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 865 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 866 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 867 uint32_t fw_loglevel; /* Log level set */ 868 struct lpfc_dmabuf lwpd; 869 struct list_head fwlog_buff_list; 870 871 /* RAS support status on adapter */ 872 bool ras_hwsupport; /* RAS Support available on HW or not */ 873 bool ras_enabled; /* Ras Enabled for the function */ 874 #define LPFC_RAS_DISABLE_LOGGING 0x00 875 #define LPFC_RAS_ENABLE_LOGGING 0x01 876 enum ras_state state; /* RAS logging running state */ 877 }; 878 879 #define DBG_LOG_STR_SZ 256 880 #define DBG_LOG_SZ 256 881 882 struct dbg_log_ent { 883 char log[DBG_LOG_STR_SZ]; 884 u64 t_ns; 885 }; 886 887 enum lpfc_irq_chann_mode { 888 /* Assign IRQs to all possible cpus that have hardware queues */ 889 NORMAL_MODE, 890 891 /* Assign IRQs only to cpus on the same numa node as HBA */ 892 NUMA_MODE, 893 894 /* Assign IRQs only on non-hyperthreaded CPUs. This is the 895 * same as normal_mode, but assign IRQS only on physical CPUs. 896 */ 897 NHT_MODE, 898 }; 899 900 enum lpfc_hba_bit_flags { 901 FABRIC_COMANDS_BLOCKED, 902 HBA_PCI_ERR, 903 }; 904 905 struct lpfc_hba { 906 /* SCSI interface function jump table entries */ 907 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 908 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 909 struct scsi_cmnd *cmnd); 910 int (*lpfc_scsi_prep_dma_buf) 911 (struct lpfc_hba *, struct lpfc_io_buf *); 912 void (*lpfc_scsi_unprep_dma_buf) 913 (struct lpfc_hba *, struct lpfc_io_buf *); 914 void (*lpfc_release_scsi_buf) 915 (struct lpfc_hba *, struct lpfc_io_buf *); 916 void (*lpfc_rampdown_queue_depth) 917 (struct lpfc_hba *); 918 void (*lpfc_scsi_prep_cmnd) 919 (struct lpfc_vport *, struct lpfc_io_buf *, 920 struct lpfc_nodelist *); 921 int (*lpfc_scsi_prep_cmnd_buf) 922 (struct lpfc_vport *vport, 923 struct lpfc_io_buf *lpfc_cmd, 924 uint8_t tmo); 925 int (*lpfc_scsi_prep_task_mgmt_cmd) 926 (struct lpfc_vport *vport, 927 struct lpfc_io_buf *lpfc_cmd, 928 u64 lun, u8 task_mgmt_cmd); 929 930 /* IOCB interface function jump table entries */ 931 int (*__lpfc_sli_issue_iocb) 932 (struct lpfc_hba *, uint32_t, 933 struct lpfc_iocbq *, uint32_t); 934 int (*__lpfc_sli_issue_fcp_io) 935 (struct lpfc_hba *phba, uint32_t ring_number, 936 struct lpfc_iocbq *piocb, uint32_t flag); 937 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 938 struct lpfc_iocbq *); 939 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 940 void (*lpfc_scsi_cmd_iocb_cmpl) 941 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 942 943 /* MBOX interface function jump table entries */ 944 int (*lpfc_sli_issue_mbox) 945 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 946 947 /* Slow-path IOCB process function jump table entries */ 948 void (*lpfc_sli_handle_slow_ring_event) 949 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 950 uint32_t mask); 951 952 /* INIT device interface function jump table entries */ 953 int (*lpfc_sli_hbq_to_firmware) 954 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 955 int (*lpfc_sli_brdrestart) 956 (struct lpfc_hba *); 957 int (*lpfc_sli_brdready) 958 (struct lpfc_hba *, uint32_t); 959 void (*lpfc_handle_eratt) 960 (struct lpfc_hba *); 961 void (*lpfc_stop_port) 962 (struct lpfc_hba *); 963 int (*lpfc_hba_init_link) 964 (struct lpfc_hba *, uint32_t); 965 int (*lpfc_hba_down_link) 966 (struct lpfc_hba *, uint32_t); 967 int (*lpfc_selective_reset) 968 (struct lpfc_hba *); 969 970 int (*lpfc_bg_scsi_prep_dma_buf) 971 (struct lpfc_hba *, struct lpfc_io_buf *); 972 973 /* Prep SLI WQE/IOCB jump table entries */ 974 void (*__lpfc_sli_prep_els_req_rsp)(struct lpfc_iocbq *cmdiocbq, 975 struct lpfc_vport *vport, 976 struct lpfc_dmabuf *bmp, 977 u16 cmd_size, u32 did, u32 elscmd, 978 u8 tmo, u8 expect_rsp); 979 void (*__lpfc_sli_prep_gen_req)(struct lpfc_iocbq *cmdiocbq, 980 struct lpfc_dmabuf *bmp, u16 rpi, 981 u32 num_entry, u8 tmo); 982 void (*__lpfc_sli_prep_xmit_seq64)(struct lpfc_iocbq *cmdiocbq, 983 struct lpfc_dmabuf *bmp, u16 rpi, 984 u16 ox_id, u32 num_entry, u8 rctl, 985 u8 last_seq, u8 cr_cx_cmd); 986 void (*__lpfc_sli_prep_abort_xri)(struct lpfc_iocbq *cmdiocbq, 987 u16 ulp_context, u16 iotag, 988 u8 ulp_class, u16 cqid, bool ia); 989 990 /* expedite pool */ 991 struct lpfc_epd_pool epd_pool; 992 993 /* SLI4 specific HBA data structure */ 994 struct lpfc_sli4_hba sli4_hba; 995 996 struct workqueue_struct *wq; 997 struct delayed_work eq_delay_work; 998 999 #define LPFC_IDLE_STAT_DELAY 1000 1000 struct delayed_work idle_stat_delay_work; 1001 1002 struct lpfc_sli sli; 1003 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 1004 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 1005 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 1006 #define LPFC_SLI3_HBQ_ENABLED 0x01 1007 #define LPFC_SLI3_NPIV_ENABLED 0x02 1008 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 1009 #define LPFC_SLI3_CRP_ENABLED 0x08 1010 #define LPFC_SLI3_BG_ENABLED 0x20 1011 #define LPFC_SLI3_DSS_ENABLED 0x40 1012 #define LPFC_SLI4_PERFH_ENABLED 0x80 1013 #define LPFC_SLI4_PHWQ_ENABLED 0x100 1014 uint32_t iocb_cmd_size; 1015 uint32_t iocb_rsp_size; 1016 1017 struct lpfc_trunk_link trunk_link; 1018 enum hba_state link_state; 1019 uint32_t link_flag; /* link state flags */ 1020 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 1021 /* This flag is set while issuing */ 1022 /* INIT_LINK mailbox command */ 1023 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 1024 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 1025 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 1026 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 1027 #define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */ 1028 1029 uint32_t hba_flag; /* hba generic flags */ 1030 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 1031 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 1032 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 1033 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 1034 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 1035 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */ 1036 #define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */ 1037 #define ASYNC_EVENT 0x80 1038 #define LINK_DISABLED 0x100 /* Link disabled by user */ 1039 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 1040 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 1041 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 1042 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 1043 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 1044 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 1045 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 1046 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 1047 #define HBA_FORCED_LINK_SPEED 0x40000 /* 1048 * Firmware supports Forced Link Speed 1049 * capability 1050 */ 1051 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 1052 #define HBA_SHORT_CMF 0x200000 /* shorter CMF timer routine */ 1053 #define HBA_CGN_DAY_WRAP 0x400000 /* HBA Congestion info day wraps */ 1054 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */ 1055 #define HBA_SETUP 0x1000000 /* Signifies HBA setup is completed */ 1056 #define HBA_NEEDS_CFG_PORT 0x2000000 /* SLI3 - needs a CONFIG_PORT mbox */ 1057 #define HBA_HBEAT_INP 0x4000000 /* mbox HBEAT is in progress */ 1058 #define HBA_HBEAT_TMO 0x8000000 /* HBEAT initiated after timeout */ 1059 #define HBA_FLOGI_OUTSTANDING 0x10000000 /* FLOGI is outstanding */ 1060 1061 struct completion *fw_dump_cmpl; /* cmpl event tracker for fw_dump */ 1062 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 1063 struct lpfc_dmabuf slim2p; 1064 1065 MAILBOX_t *mbox; 1066 uint32_t *mbox_ext; 1067 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 1068 uint32_t ha_copy; 1069 struct _PCB *pcb; 1070 struct _IOCB *IOCBs; 1071 1072 struct lpfc_dmabuf hbqslimp; 1073 1074 uint16_t pci_cfg_value; 1075 1076 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 1077 1078 uint32_t fc_eventTag; /* event tag for link attention */ 1079 uint32_t link_events; 1080 1081 /* These fields used to be binfo */ 1082 uint32_t fc_pref_DID; /* preferred D_ID */ 1083 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 1084 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 1085 uint32_t fc_edtov; /* E_D_TOV timer value */ 1086 uint32_t fc_arbtov; /* ARB_TOV timer value */ 1087 uint32_t fc_ratov; /* R_A_TOV timer value */ 1088 uint32_t fc_rttov; /* R_T_TOV timer value */ 1089 uint32_t fc_altov; /* AL_TOV timer value */ 1090 uint32_t fc_crtov; /* C_R_TOV timer value */ 1091 1092 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 1093 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 1094 1095 uint32_t lmt; 1096 1097 uint32_t fc_topology; /* link topology, from LINK INIT */ 1098 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 1099 1100 struct lpfc_stats fc_stat; 1101 1102 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 1103 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 1104 1105 uint8_t wwnn[8]; 1106 uint8_t wwpn[8]; 1107 uint32_t RandomData[7]; 1108 uint8_t fcp_embed_io; 1109 uint8_t nvmet_support; /* driver supports NVMET */ 1110 #define LPFC_NVMET_MAX_PORTS 32 1111 uint8_t mds_diags_support; 1112 uint8_t bbcredit_support; 1113 uint8_t enab_exp_wqcq_pages; 1114 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 1115 1116 /* HBA Config Parameters */ 1117 uint32_t cfg_ack0; 1118 uint32_t cfg_xri_rebalancing; 1119 uint32_t cfg_xpsgl; 1120 uint32_t cfg_enable_npiv; 1121 uint32_t cfg_enable_rrq; 1122 uint32_t cfg_topology; 1123 uint32_t cfg_link_speed; 1124 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 1125 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 1126 uint32_t cfg_fcf_failover_policy; 1127 uint32_t cfg_fcp_io_sched; 1128 uint32_t cfg_ns_query; 1129 uint32_t cfg_fcp2_no_tgt_reset; 1130 uint32_t cfg_cr_delay; 1131 uint32_t cfg_cr_count; 1132 uint32_t cfg_multi_ring_support; 1133 uint32_t cfg_multi_ring_rctl; 1134 uint32_t cfg_multi_ring_type; 1135 uint32_t cfg_poll; 1136 uint32_t cfg_poll_tmo; 1137 uint32_t cfg_task_mgmt_tmo; 1138 uint32_t cfg_use_msi; 1139 uint32_t cfg_auto_imax; 1140 uint32_t cfg_fcp_imax; 1141 uint32_t cfg_force_rscn; 1142 uint32_t cfg_cq_poll_threshold; 1143 uint32_t cfg_cq_max_proc_limit; 1144 uint32_t cfg_fcp_cpu_map; 1145 uint32_t cfg_fcp_mq_threshold; 1146 uint32_t cfg_hdw_queue; 1147 uint32_t cfg_irq_chann; 1148 uint32_t cfg_suppress_rsp; 1149 uint32_t cfg_nvme_oas; 1150 uint32_t cfg_nvme_embed_cmd; 1151 uint32_t cfg_nvmet_mrq_post; 1152 uint32_t cfg_nvmet_mrq; 1153 uint32_t cfg_enable_nvmet; 1154 uint32_t cfg_nvme_enable_fb; 1155 uint32_t cfg_nvmet_fb_size; 1156 uint32_t cfg_total_seg_cnt; 1157 uint32_t cfg_sg_seg_cnt; 1158 uint32_t cfg_nvme_seg_cnt; 1159 uint32_t cfg_scsi_seg_cnt; 1160 uint32_t cfg_sg_dma_buf_size; 1161 uint32_t cfg_hba_queue_depth; 1162 uint32_t cfg_enable_hba_reset; 1163 uint32_t cfg_enable_hba_heartbeat; 1164 uint32_t cfg_fof; 1165 uint32_t cfg_EnableXLane; 1166 uint8_t cfg_oas_tgt_wwpn[8]; 1167 uint8_t cfg_oas_vpt_wwpn[8]; 1168 uint32_t cfg_oas_lun_state; 1169 #define OAS_LUN_ENABLE 1 1170 #define OAS_LUN_DISABLE 0 1171 uint32_t cfg_oas_lun_status; 1172 #define OAS_LUN_STATUS_EXISTS 0x01 1173 uint32_t cfg_oas_flags; 1174 #define OAS_FIND_ANY_VPORT 0x01 1175 #define OAS_FIND_ANY_TARGET 0x02 1176 #define OAS_LUN_VALID 0x04 1177 uint32_t cfg_oas_priority; 1178 uint32_t cfg_XLanePriority; 1179 uint32_t cfg_enable_bg; 1180 uint32_t cfg_prot_mask; 1181 uint32_t cfg_prot_guard; 1182 uint32_t cfg_hostmem_hgp; 1183 uint32_t cfg_log_verbose; 1184 uint32_t cfg_enable_fc4_type; 1185 #define LPFC_ENABLE_FCP 1 1186 #define LPFC_ENABLE_NVME 2 1187 #define LPFC_ENABLE_BOTH 3 1188 #if (IS_ENABLED(CONFIG_NVME_FC)) 1189 #define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_BOTH 1190 #define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_BOTH 1191 #else 1192 #define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_FCP 1193 #define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_FCP 1194 #endif 1195 uint32_t cfg_aer_support; 1196 uint32_t cfg_sriov_nr_virtfn; 1197 uint32_t cfg_request_firmware_upgrade; 1198 uint32_t cfg_suppress_link_up; 1199 uint32_t cfg_rrq_xri_bitmap_sz; 1200 u32 cfg_fcp_wait_abts_rsp; 1201 uint32_t cfg_delay_discovery; 1202 uint32_t cfg_sli_mode; 1203 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 1204 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 1205 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 1206 uint32_t cfg_fdmi_on; 1207 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 1208 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 1209 uint32_t cfg_enable_SmartSAN; 1210 uint32_t cfg_enable_mds_diags; 1211 uint32_t cfg_ras_fwlog_level; 1212 uint32_t cfg_ras_fwlog_buffsize; 1213 uint32_t cfg_ras_fwlog_func; 1214 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 1215 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 1216 uint32_t cfg_enable_pbde; 1217 uint32_t cfg_enable_mi; 1218 struct nvmet_fc_target_port *targetport; 1219 lpfc_vpd_t vpd; /* vital product data */ 1220 1221 u32 cfg_max_vmid; /* maximum VMIDs allowed per port */ 1222 u32 cfg_vmid_app_header; 1223 #define LPFC_VMID_APP_HEADER_DISABLE 0 1224 #define LPFC_VMID_APP_HEADER_ENABLE 1 1225 u32 cfg_vmid_priority_tagging; 1226 u32 cfg_vmid_inactivity_timeout; /* Time after which the VMID */ 1227 /* deregisters from switch */ 1228 struct pci_dev *pcidev; 1229 struct list_head work_list; 1230 uint32_t work_ha; /* Host Attention Bits for WT */ 1231 uint32_t work_ha_mask; /* HA Bits owned by WT */ 1232 uint32_t work_hs; /* HS stored in case of ERRAT */ 1233 uint32_t work_status[2]; /* Extra status from SLIM */ 1234 1235 wait_queue_head_t work_waitq; 1236 struct task_struct *worker_thread; 1237 unsigned long data_flags; 1238 uint32_t border_sge_num; 1239 1240 uint32_t hbq_in_use; /* HBQs in use flag */ 1241 uint32_t hbq_count; /* Count of configured HBQs */ 1242 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 1243 1244 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 1245 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 1246 1247 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 1248 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 1249 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 1250 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 1251 PCI BAR0 */ 1252 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 1253 PCI BAR2 */ 1254 1255 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 1256 PCI BAR0 with dual-ULP support */ 1257 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 1258 PCI BAR2 with dual-ULP support */ 1259 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 1260 PCI BAR4 with dual-ULP support */ 1261 #define PCI_64BIT_BAR0 0 1262 #define PCI_64BIT_BAR2 2 1263 #define PCI_64BIT_BAR4 4 1264 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 1265 void __iomem *HAregaddr; /* virtual address for host attn reg */ 1266 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 1267 void __iomem *HSregaddr; /* virtual address for host status 1268 reg */ 1269 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 1270 1271 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 1272 struct lpfc_pgp *port_gp; 1273 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 1274 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 1275 1276 int brd_no; /* FC board number */ 1277 char SerialNumber[32]; /* adapter Serial Number */ 1278 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 1279 char BIOSVersion[16]; /* Boot BIOS version */ 1280 char ModelDesc[256]; /* Model Description */ 1281 char ModelName[80]; /* Model Name */ 1282 char ProgramType[256]; /* Program Type */ 1283 char Port[20]; /* Port No */ 1284 uint8_t vpd_flag; /* VPD data flag */ 1285 1286 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 1287 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 1288 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 1289 #define VPD_PORT 0x8 /* valid vpd port data */ 1290 #define VPD_MASK 0xf /* mask for any vpd data */ 1291 1292 1293 struct timer_list fcp_poll_timer; 1294 struct timer_list eratt_poll; 1295 uint32_t eratt_poll_interval; 1296 1297 uint64_t bg_guard_err_cnt; 1298 uint64_t bg_apptag_err_cnt; 1299 uint64_t bg_reftag_err_cnt; 1300 1301 /* fastpath list. */ 1302 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 1303 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 1304 struct list_head lpfc_scsi_buf_list_get; 1305 struct list_head lpfc_scsi_buf_list_put; 1306 uint32_t total_scsi_bufs; 1307 struct list_head lpfc_iocb_list; 1308 uint32_t total_iocbq_bufs; 1309 struct list_head active_rrq_list; 1310 spinlock_t hbalock; 1311 struct work_struct unblock_request_work; /* SCSI layer unblock IOs */ 1312 1313 /* dma_mem_pools */ 1314 struct dma_pool *lpfc_sg_dma_buf_pool; 1315 struct dma_pool *lpfc_mbuf_pool; 1316 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 1317 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 1318 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 1319 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 1320 struct dma_pool *lpfc_cmd_rsp_buf_pool; 1321 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 1322 1323 mempool_t *mbox_mem_pool; 1324 mempool_t *nlp_mem_pool; 1325 mempool_t *rrq_pool; 1326 mempool_t *active_rrq_pool; 1327 1328 struct fc_host_statistics link_stats; 1329 enum lpfc_irq_chann_mode irq_chann_mode; 1330 enum intr_type_t intr_type; 1331 uint32_t intr_mode; 1332 #define LPFC_INTR_ERROR 0xFFFFFFFF 1333 struct list_head port_list; 1334 spinlock_t port_list_lock; /* lock for port_list mutations */ 1335 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1336 uint16_t max_vpi; /* Maximum virtual nports */ 1337 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1338 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1339 uint16_t max_vports; /* 1340 * For IOV HBAs max_vpi can change 1341 * after a reset. max_vports is max 1342 * number of vports present. This can 1343 * be greater than max_vpi. 1344 */ 1345 uint16_t vpi_base; 1346 uint16_t vfi_base; 1347 unsigned long *vpi_bmask; /* vpi allocation table */ 1348 uint16_t *vpi_ids; 1349 uint16_t vpi_count; 1350 struct list_head lpfc_vpi_blk_list; 1351 1352 /* Data structure used by fabric iocb scheduler */ 1353 struct list_head fabric_iocb_list; 1354 atomic_t fabric_iocb_count; 1355 struct timer_list fabric_block_timer; 1356 unsigned long bit_flags; 1357 atomic_t num_rsrc_err; 1358 atomic_t num_cmd_success; 1359 unsigned long last_rsrc_error_time; 1360 unsigned long last_ramp_down_time; 1361 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1362 struct dentry *hba_debugfs_root; 1363 atomic_t debugfs_vport_count; 1364 struct dentry *debug_multixri_pools; 1365 struct dentry *debug_hbqinfo; 1366 struct dentry *debug_dumpHostSlim; 1367 struct dentry *debug_dumpHBASlim; 1368 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1369 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1370 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1371 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1372 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1373 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1374 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1375 struct dentry *debug_readApp; /* inject read app_tag errors */ 1376 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1377 1378 struct dentry *debug_nvmeio_trc; 1379 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1380 struct dentry *debug_hdwqinfo; 1381 #ifdef LPFC_HDWQ_LOCK_STAT 1382 struct dentry *debug_lockstat; 1383 #endif 1384 struct dentry *debug_cgn_buffer; 1385 struct dentry *debug_rx_monitor; 1386 struct dentry *debug_ras_log; 1387 atomic_t nvmeio_trc_cnt; 1388 uint32_t nvmeio_trc_size; 1389 uint32_t nvmeio_trc_output_idx; 1390 1391 /* T10 DIF error injection */ 1392 uint32_t lpfc_injerr_wgrd_cnt; 1393 uint32_t lpfc_injerr_wapp_cnt; 1394 uint32_t lpfc_injerr_wref_cnt; 1395 uint32_t lpfc_injerr_rgrd_cnt; 1396 uint32_t lpfc_injerr_rapp_cnt; 1397 uint32_t lpfc_injerr_rref_cnt; 1398 uint32_t lpfc_injerr_nportid; 1399 struct lpfc_name lpfc_injerr_wwpn; 1400 sector_t lpfc_injerr_lba; 1401 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1402 1403 struct dentry *debug_slow_ring_trc; 1404 struct lpfc_debugfs_trc *slow_ring_trc; 1405 atomic_t slow_ring_trc_cnt; 1406 /* iDiag debugfs sub-directory */ 1407 struct dentry *idiag_root; 1408 struct dentry *idiag_pci_cfg; 1409 struct dentry *idiag_bar_acc; 1410 struct dentry *idiag_que_info; 1411 struct dentry *idiag_que_acc; 1412 struct dentry *idiag_drb_acc; 1413 struct dentry *idiag_ctl_acc; 1414 struct dentry *idiag_mbx_acc; 1415 struct dentry *idiag_ext_acc; 1416 uint8_t lpfc_idiag_last_eq; 1417 #endif 1418 uint16_t nvmeio_trc_on; 1419 1420 /* Used for deferred freeing of ELS data buffers */ 1421 struct list_head elsbuf; 1422 int elsbuf_cnt; 1423 int elsbuf_prev_cnt; 1424 1425 uint8_t temp_sensor_support; 1426 /* Fields used for heart beat. */ 1427 unsigned long last_completion_time; 1428 unsigned long skipped_hb; 1429 struct timer_list hb_tmofunc; 1430 struct timer_list rrq_tmr; 1431 enum hba_temp_state over_temp_state; 1432 /* 1433 * Following bit will be set for all buffer tags which are not 1434 * associated with any HBQ. 1435 */ 1436 #define QUE_BUFTAG_BIT (1<<31) 1437 uint32_t buffer_tag_count; 1438 int wait_4_mlo_maint_flg; 1439 wait_queue_head_t wait_4_mlo_m_q; 1440 /* data structure used for latency data collection */ 1441 #define LPFC_NO_BUCKET 0 1442 #define LPFC_LINEAR_BUCKET 1 1443 #define LPFC_POWER2_BUCKET 2 1444 uint8_t bucket_type; 1445 uint32_t bucket_base; 1446 uint32_t bucket_step; 1447 1448 /* Maximum number of events that can be outstanding at any time*/ 1449 #define LPFC_MAX_EVT_COUNT 512 1450 atomic_t fast_event_count; 1451 uint32_t fcoe_eventtag; 1452 uint32_t fcoe_eventtag_at_fcf_scan; 1453 uint32_t fcoe_cvl_eventtag; 1454 uint32_t fcoe_cvl_eventtag_attn; 1455 struct lpfc_fcf fcf; 1456 uint8_t fc_map[3]; 1457 uint8_t valid_vlan; 1458 uint16_t vlan_id; 1459 struct list_head fcf_conn_rec_list; 1460 1461 bool defer_flogi_acc_flag; 1462 uint16_t defer_flogi_acc_rx_id; 1463 uint16_t defer_flogi_acc_ox_id; 1464 1465 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1466 struct list_head ct_ev_waiters; 1467 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1468 uint32_t ctx_idx; 1469 struct timer_list inactive_vmid_poll; 1470 1471 /* RAS Support */ 1472 struct lpfc_ras_fwlog ras_fwlog; 1473 1474 uint8_t menlo_flag; /* menlo generic flags */ 1475 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1476 uint32_t iocb_cnt; 1477 uint32_t iocb_max; 1478 atomic_t sdev_cnt; 1479 spinlock_t devicelock; /* lock for luns list */ 1480 mempool_t *device_data_mem_pool; 1481 struct list_head luns; 1482 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1483 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1484 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1485 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1486 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1487 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1488 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1489 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1490 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1491 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1492 uint16_t sfp_alarm; 1493 uint16_t sfp_warning; 1494 1495 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1496 uint16_t hdwqstat_on; 1497 #define LPFC_CHECK_OFF 0 1498 #define LPFC_CHECK_NVME_IO 1 1499 #define LPFC_CHECK_NVMET_IO 2 1500 #define LPFC_CHECK_SCSI_IO 4 1501 uint16_t ktime_on; 1502 uint64_t ktime_data_samples; 1503 uint64_t ktime_status_samples; 1504 uint64_t ktime_last_cmd; 1505 uint64_t ktime_seg1_total; 1506 uint64_t ktime_seg1_min; 1507 uint64_t ktime_seg1_max; 1508 uint64_t ktime_seg2_total; 1509 uint64_t ktime_seg2_min; 1510 uint64_t ktime_seg2_max; 1511 uint64_t ktime_seg3_total; 1512 uint64_t ktime_seg3_min; 1513 uint64_t ktime_seg3_max; 1514 uint64_t ktime_seg4_total; 1515 uint64_t ktime_seg4_min; 1516 uint64_t ktime_seg4_max; 1517 uint64_t ktime_seg5_total; 1518 uint64_t ktime_seg5_min; 1519 uint64_t ktime_seg5_max; 1520 uint64_t ktime_seg6_total; 1521 uint64_t ktime_seg6_min; 1522 uint64_t ktime_seg6_max; 1523 uint64_t ktime_seg7_total; 1524 uint64_t ktime_seg7_min; 1525 uint64_t ktime_seg7_max; 1526 uint64_t ktime_seg8_total; 1527 uint64_t ktime_seg8_min; 1528 uint64_t ktime_seg8_max; 1529 uint64_t ktime_seg9_total; 1530 uint64_t ktime_seg9_min; 1531 uint64_t ktime_seg9_max; 1532 uint64_t ktime_seg10_total; 1533 uint64_t ktime_seg10_min; 1534 uint64_t ktime_seg10_max; 1535 #endif 1536 /* CMF objects */ 1537 struct lpfc_cgn_stat __percpu *cmf_stat; 1538 uint32_t cmf_interval_rate; /* timer interval limit in ms */ 1539 uint32_t cmf_timer_cnt; 1540 #define LPFC_CMF_INTERVAL 90 1541 uint64_t cmf_link_byte_count; 1542 uint64_t cmf_max_line_rate; 1543 uint64_t cmf_max_bytes_per_interval; 1544 uint64_t cmf_last_sync_bw; 1545 #define LPFC_CMF_BLK_SIZE 512 1546 struct hrtimer cmf_timer; 1547 atomic_t cmf_bw_wait; 1548 atomic_t cmf_busy; 1549 atomic_t cmf_stop_io; /* To block request and stop IO's */ 1550 uint32_t cmf_active_mode; 1551 uint32_t cmf_info_per_interval; 1552 #define LPFC_MAX_CMF_INFO 32 1553 struct timespec64 cmf_latency; /* Interval congestion timestamp */ 1554 uint32_t cmf_last_ts; /* Interval congestion time (ms) */ 1555 uint32_t cmf_active_info; 1556 1557 /* Signal / FPIN handling for Congestion Mgmt */ 1558 u8 cgn_reg_fpin; /* Negotiated value from RDF */ 1559 u8 cgn_init_reg_fpin; /* Initial value from READ_CONFIG */ 1560 #define LPFC_CGN_FPIN_NONE 0x0 1561 #define LPFC_CGN_FPIN_WARN 0x1 1562 #define LPFC_CGN_FPIN_ALARM 0x2 1563 #define LPFC_CGN_FPIN_BOTH (LPFC_CGN_FPIN_WARN | LPFC_CGN_FPIN_ALARM) 1564 1565 u8 cgn_reg_signal; /* Negotiated value from EDC */ 1566 u8 cgn_init_reg_signal; /* Initial value from READ_CONFIG */ 1567 /* cgn_reg_signal and cgn_init_reg_signal use 1568 * enum fc_edc_cg_signal_cap_types 1569 */ 1570 u16 cgn_fpin_frequency; 1571 #define LPFC_FPIN_INIT_FREQ 0xffff 1572 u32 cgn_sig_freq; 1573 u32 cgn_acqe_cnt; 1574 1575 /* RX monitor handling for CMF */ 1576 struct rxtable_entry *rxtable; /* RX_monitor information */ 1577 atomic_t rxtable_idx_head; 1578 #define LPFC_RXMONITOR_TABLE_IN_USE (LPFC_MAX_RXMONITOR_ENTRY + 73) 1579 atomic_t rxtable_idx_tail; 1580 atomic_t rx_max_read_cnt; /* Maximum read bytes */ 1581 uint64_t rx_block_cnt; 1582 1583 /* Congestion parameters from flash */ 1584 struct lpfc_cgn_param cgn_p; 1585 1586 /* Statistics counter for ACQE cgn alarms and warnings */ 1587 struct lpfc_cgn_acqe_stat cgn_acqe_stat; 1588 1589 /* Congestion buffer information */ 1590 struct lpfc_dmabuf *cgn_i; /* Congestion Info buffer */ 1591 atomic_t cgn_fabric_warn_cnt; /* Total warning cgn events for info */ 1592 atomic_t cgn_fabric_alarm_cnt; /* Total alarm cgn events for info */ 1593 atomic_t cgn_sync_warn_cnt; /* Total warning events for SYNC wqe */ 1594 atomic_t cgn_sync_alarm_cnt; /* Total alarm events for SYNC wqe */ 1595 atomic_t cgn_driver_evt_cnt; /* Total driver cgn events for fmw */ 1596 atomic_t cgn_latency_evt_cnt; 1597 struct timespec64 cgn_daily_ts; 1598 atomic64_t cgn_latency_evt; /* Avg latency per minute */ 1599 unsigned long cgn_evt_timestamp; 1600 #define LPFC_CGN_TIMER_TO_MIN 60000 /* ms in a minute */ 1601 uint32_t cgn_evt_minute; 1602 #define LPFC_SEC_MIN 60 1603 #define LPFC_MIN_HOUR 60 1604 #define LPFC_HOUR_DAY 24 1605 #define LPFC_MIN_DAY (LPFC_MIN_HOUR * LPFC_HOUR_DAY) 1606 1607 struct hlist_node cpuhp; /* used for cpuhp per hba callback */ 1608 struct timer_list cpuhp_poll_timer; 1609 struct list_head poll_list; /* slowpath eq polling list */ 1610 #define LPFC_POLL_HB 1 /* slowpath heartbeat */ 1611 #define LPFC_POLL_FASTPATH 0 /* called from fastpath */ 1612 #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */ 1613 1614 char os_host_name[MAXHOSTNAMELEN]; 1615 1616 /* SCSI host template information - for physical port */ 1617 struct scsi_host_template port_template; 1618 /* SCSI host template information - for all vports */ 1619 struct scsi_host_template vport_template; 1620 atomic_t dbg_log_idx; 1621 atomic_t dbg_log_cnt; 1622 atomic_t dbg_log_dmping; 1623 struct dbg_log_ent dbg_log[DBG_LOG_SZ]; 1624 }; 1625 1626 #define LPFC_MAX_RXMONITOR_ENTRY 800 1627 #define LPFC_MAX_RXMONITOR_DUMP 32 1628 struct rxtable_entry { 1629 uint64_t cmf_bytes; /* Total no of read bytes for CMF_SYNC_WQE */ 1630 uint64_t total_bytes; /* Total no of read bytes requested */ 1631 uint64_t rcv_bytes; /* Total no of read bytes completed */ 1632 uint64_t avg_io_size; 1633 uint64_t avg_io_latency;/* Average io latency in microseconds */ 1634 uint64_t max_read_cnt; /* Maximum read bytes */ 1635 uint64_t max_bytes_per_interval; 1636 uint32_t cmf_busy; 1637 uint32_t cmf_info; /* CMF_SYNC_WQE info */ 1638 uint32_t io_cnt; 1639 uint32_t timer_utilization; 1640 uint32_t timer_interval; 1641 }; 1642 1643 static inline struct Scsi_Host * 1644 lpfc_shost_from_vport(struct lpfc_vport *vport) 1645 { 1646 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1647 } 1648 1649 static inline void 1650 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1651 { 1652 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1653 phba->link_flag |= LS_LOOPBACK_MODE; 1654 else 1655 phba->link_flag &= ~LS_LOOPBACK_MODE; 1656 } 1657 1658 static inline int 1659 lpfc_is_link_up(struct lpfc_hba *phba) 1660 { 1661 return phba->link_state == LPFC_LINK_UP || 1662 phba->link_state == LPFC_CLEAR_LA || 1663 phba->link_state == LPFC_HBA_READY; 1664 } 1665 1666 static inline void 1667 lpfc_worker_wake_up(struct lpfc_hba *phba) 1668 { 1669 /* Set the lpfc data pending flag */ 1670 set_bit(LPFC_DATA_READY, &phba->data_flags); 1671 1672 /* Wake up worker thread */ 1673 wake_up(&phba->work_waitq); 1674 return; 1675 } 1676 1677 static inline int 1678 lpfc_readl(void __iomem *addr, uint32_t *data) 1679 { 1680 uint32_t temp; 1681 temp = readl(addr); 1682 if (temp == 0xffffffff) 1683 return -EIO; 1684 *data = temp; 1685 return 0; 1686 } 1687 1688 static inline int 1689 lpfc_sli_read_hs(struct lpfc_hba *phba) 1690 { 1691 /* 1692 * There was a link/board error. Read the status register to retrieve 1693 * the error event and process it. 1694 */ 1695 phba->sli.slistat.err_attn_event++; 1696 1697 /* Save status info and check for unplug error */ 1698 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1699 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1700 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1701 return -EIO; 1702 } 1703 1704 /* Clear chip Host Attention error bit */ 1705 writel(HA_ERATT, phba->HAregaddr); 1706 readl(phba->HAregaddr); /* flush */ 1707 phba->pport->stopped = 1; 1708 1709 return 0; 1710 } 1711 1712 static inline struct lpfc_sli_ring * 1713 lpfc_phba_elsring(struct lpfc_hba *phba) 1714 { 1715 /* Return NULL if sli_rev has become invalid due to bad fw */ 1716 if (phba->sli_rev != LPFC_SLI_REV4 && 1717 phba->sli_rev != LPFC_SLI_REV3 && 1718 phba->sli_rev != LPFC_SLI_REV2) 1719 return NULL; 1720 1721 if (phba->sli_rev == LPFC_SLI_REV4) { 1722 if (phba->sli4_hba.els_wq) 1723 return phba->sli4_hba.els_wq->pring; 1724 else 1725 return NULL; 1726 } 1727 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1728 } 1729 1730 /** 1731 * lpfc_next_online_cpu - Finds next online CPU on cpumask 1732 * @mask: Pointer to phba's cpumask member. 1733 * @start: starting cpu index 1734 * 1735 * Note: If no valid cpu found, then nr_cpu_ids is returned. 1736 * 1737 **/ 1738 static inline unsigned int 1739 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start) 1740 { 1741 unsigned int cpu_it; 1742 1743 for_each_cpu_wrap(cpu_it, mask, start) { 1744 if (cpu_online(cpu_it)) 1745 break; 1746 } 1747 1748 return cpu_it; 1749 } 1750 /** 1751 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1752 * @phba: Pointer to HBA context object. 1753 * @q: The Event Queue to update. 1754 * @delay: The delay value (in us) to be written. 1755 * 1756 **/ 1757 static inline void 1758 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1759 u32 delay) 1760 { 1761 struct lpfc_register reg_data; 1762 1763 reg_data.word0 = 0; 1764 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1765 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1766 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1767 eq->q_mode = delay; 1768 } 1769 1770 1771 /* 1772 * Macro that declares tables and a routine to perform enum type to 1773 * ascii string lookup. 1774 * 1775 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for 1776 * the enum to populate the table. Macro defines a routine (named 1777 * by caller) that will search all elements of the table for the key 1778 * and return the name string if found or "Unrecognized" if not found. 1779 */ 1780 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \ 1781 static struct { \ 1782 enum enum_name value; \ 1783 char *name; \ 1784 } fc_##enum_name##_e2str_names[] = enum_init; \ 1785 static const char *routine(enum enum_name table_key) \ 1786 { \ 1787 int i; \ 1788 char *name = "Unrecognized"; \ 1789 \ 1790 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\ 1791 if (fc_##enum_name##_e2str_names[i].value == table_key) {\ 1792 name = fc_##enum_name##_e2str_names[i].name; \ 1793 break; \ 1794 } \ 1795 } \ 1796 return name; \ 1797 } 1798 1799 /** 1800 * lpfc_is_vmid_enabled - returns if VMID is enabled for either switch types 1801 * @phba: Pointer to HBA context object. 1802 * 1803 * Relationship between the enable, target support and if vmid tag is required 1804 * for the particular combination 1805 * --------------------------------------------------- 1806 * Switch Enable Flag Target Support VMID Needed 1807 * --------------------------------------------------- 1808 * App Id 0 NA N 1809 * App Id 1 0 N 1810 * App Id 1 1 Y 1811 * Pr Tag 0 NA N 1812 * Pr Tag 1 0 N 1813 * Pr Tag 1 1 Y 1814 * Pr Tag 2 * Y 1815 --------------------------------------------------- 1816 * 1817 **/ 1818 static inline int lpfc_is_vmid_enabled(struct lpfc_hba *phba) 1819 { 1820 return phba->cfg_vmid_app_header || phba->cfg_vmid_priority_tagging; 1821 } 1822 1823 static inline 1824 u8 get_job_ulpstatus(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1825 { 1826 if (phba->sli_rev == LPFC_SLI_REV4) 1827 return bf_get(lpfc_wcqe_c_status, &iocbq->wcqe_cmpl); 1828 else 1829 return iocbq->iocb.ulpStatus; 1830 } 1831 1832 static inline 1833 u32 get_job_word4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1834 { 1835 if (phba->sli_rev == LPFC_SLI_REV4) 1836 return iocbq->wcqe_cmpl.parameter; 1837 else 1838 return iocbq->iocb.un.ulpWord[4]; 1839 } 1840 1841 static inline 1842 u8 get_job_cmnd(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1843 { 1844 if (phba->sli_rev == LPFC_SLI_REV4) 1845 return bf_get(wqe_cmnd, &iocbq->wqe.generic.wqe_com); 1846 else 1847 return iocbq->iocb.ulpCommand; 1848 } 1849 1850 static inline 1851 u16 get_job_ulpcontext(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1852 { 1853 if (phba->sli_rev == LPFC_SLI_REV4) 1854 return bf_get(wqe_ctxt_tag, &iocbq->wqe.generic.wqe_com); 1855 else 1856 return iocbq->iocb.ulpContext; 1857 } 1858 1859 static inline 1860 u16 get_job_rcvoxid(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1861 { 1862 if (phba->sli_rev == LPFC_SLI_REV4) 1863 return bf_get(wqe_rcvoxid, &iocbq->wqe.generic.wqe_com); 1864 else 1865 return iocbq->iocb.unsli3.rcvsli3.ox_id; 1866 } 1867 1868 static inline 1869 u32 get_job_data_placed(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1870 { 1871 if (phba->sli_rev == LPFC_SLI_REV4) 1872 return iocbq->wcqe_cmpl.total_data_placed; 1873 else 1874 return iocbq->iocb.un.genreq64.bdl.bdeSize; 1875 } 1876 1877 static inline 1878 u32 get_job_abtsiotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1879 { 1880 if (phba->sli_rev == LPFC_SLI_REV4) 1881 return iocbq->wqe.abort_cmd.wqe_com.abort_tag; 1882 else 1883 return iocbq->iocb.un.acxri.abortIoTag; 1884 } 1885 1886 static inline 1887 u32 get_job_els_rsp64_did(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq) 1888 { 1889 if (phba->sli_rev == LPFC_SLI_REV4) 1890 return bf_get(wqe_els_did, &iocbq->wqe.els_req.wqe_dest); 1891 else 1892 return iocbq->iocb.un.elsreq64.remoteID; 1893 } 1894