1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/ktime.h> 26 #include <linux/workqueue.h> 27 28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 29 #define CONFIG_SCSI_LPFC_DEBUG_FS 30 #endif 31 32 struct lpfc_sli2_slim; 33 34 #define ELX_MODEL_NAME_SIZE 80 35 36 #define LPFC_PCI_DEV_LP 0x1 37 #define LPFC_PCI_DEV_OC 0x2 38 39 #define LPFC_SLI_REV2 2 40 #define LPFC_SLI_REV3 3 41 #define LPFC_SLI_REV4 4 42 43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 45 requests */ 46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 47 the NameServer before giving up. */ 48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 51 cmnd for menlo needs nearly twice as for firmware 52 downloads using bsg */ 53 54 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 55 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 56 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 57 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 58 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 59 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 60 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 61 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 62 63 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 64 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 65 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 66 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 67 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 68 #define LPFC_MIN_TGT_QDEPTH 10 69 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 70 71 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 72 collection. */ 73 /* 74 * Following time intervals are used of adjusting SCSI device 75 * queue depths when there are driver resource error or Firmware 76 * resource error. 77 */ 78 /* 1 Second */ 79 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 80 81 /* Number of exchanges reserved for discovery to complete */ 82 #define LPFC_DISC_IOCB_BUFF_COUNT 20 83 84 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 85 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 86 87 /* Error Attention event polling interval */ 88 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 89 90 /* Define macros for 64 bit support */ 91 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 92 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 93 #define getPaddr(high, low) ((dma_addr_t)( \ 94 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 95 /* Provide maximum configuration definitions. */ 96 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 97 #define FC_MAX_ADPTMSG 64 98 99 #define MAX_HBAEVT 32 100 #define MAX_HBAS_NO_RESET 16 101 102 /* Number of MSI-X vectors the driver uses */ 103 #define LPFC_MSIX_VECTORS 2 104 105 /* lpfc wait event data ready flag */ 106 #define LPFC_DATA_READY 0 /* bit 0 */ 107 108 /* queue dump line buffer size */ 109 #define LPFC_LBUF_SZ 128 110 111 /* mailbox system shutdown options */ 112 #define LPFC_MBX_NO_WAIT 0 113 #define LPFC_MBX_WAIT 1 114 115 enum lpfc_polling_flags { 116 ENABLE_FCP_RING_POLLING = 0x1, 117 DISABLE_FCP_RING_INT = 0x2 118 }; 119 120 struct perf_prof { 121 uint16_t cmd_cpu[40]; 122 uint16_t rsp_cpu[40]; 123 uint16_t qh_cpu[40]; 124 uint16_t wqidx[40]; 125 }; 126 127 /* 128 * Provide for FC4 TYPE x28 - NVME. The 129 * bit mask for FCP and NVME is 0x8 identically 130 * because they are 32 bit positions distance. 131 */ 132 #define LPFC_FC4_TYPE_BITMASK 0x00000100 133 134 /* Provide DMA memory definitions the driver uses per port instance. */ 135 struct lpfc_dmabuf { 136 struct list_head list; 137 void *virt; /* virtual address ptr */ 138 dma_addr_t phys; /* mapped address */ 139 uint32_t buffer_tag; /* used for tagged queue ring */ 140 }; 141 142 struct lpfc_nvmet_ctxbuf { 143 struct list_head list; 144 struct lpfc_nvmet_rcv_ctx *context; 145 struct lpfc_iocbq *iocbq; 146 struct lpfc_sglq *sglq; 147 struct work_struct defer_work; 148 }; 149 150 struct lpfc_dma_pool { 151 struct lpfc_dmabuf *elements; 152 uint32_t max_count; 153 uint32_t current_count; 154 }; 155 156 struct hbq_dmabuf { 157 struct lpfc_dmabuf hbuf; 158 struct lpfc_dmabuf dbuf; 159 uint16_t total_size; 160 uint16_t bytes_recv; 161 uint32_t tag; 162 struct lpfc_cq_event cq_event; 163 unsigned long time_stamp; 164 void *context; 165 }; 166 167 struct rqb_dmabuf { 168 struct lpfc_dmabuf hbuf; 169 struct lpfc_dmabuf dbuf; 170 uint16_t total_size; 171 uint16_t bytes_recv; 172 uint16_t idx; 173 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 174 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 175 }; 176 177 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 178 #define MEM_PRI 0x100 179 180 181 /****************************************************************************/ 182 /* Device VPD save area */ 183 /****************************************************************************/ 184 typedef struct lpfc_vpd { 185 uint32_t status; /* vpd status value */ 186 uint32_t length; /* number of bytes actually returned */ 187 struct { 188 uint32_t rsvd1; /* Revision numbers */ 189 uint32_t biuRev; 190 uint32_t smRev; 191 uint32_t smFwRev; 192 uint32_t endecRev; 193 uint16_t rBit; 194 uint8_t fcphHigh; 195 uint8_t fcphLow; 196 uint8_t feaLevelHigh; 197 uint8_t feaLevelLow; 198 uint32_t postKernRev; 199 uint32_t opFwRev; 200 uint8_t opFwName[16]; 201 uint32_t sli1FwRev; 202 uint8_t sli1FwName[16]; 203 uint32_t sli2FwRev; 204 uint8_t sli2FwName[16]; 205 } rev; 206 struct { 207 #ifdef __BIG_ENDIAN_BITFIELD 208 uint32_t rsvd3 :19; /* Reserved */ 209 uint32_t cdss : 1; /* Configure Data Security SLI */ 210 uint32_t rsvd2 : 3; /* Reserved */ 211 uint32_t cbg : 1; /* Configure BlockGuard */ 212 uint32_t cmv : 1; /* Configure Max VPIs */ 213 uint32_t ccrp : 1; /* Config Command Ring Polling */ 214 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 215 uint32_t chbs : 1; /* Cofigure Host Backing store */ 216 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 217 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 218 uint32_t cmx : 1; /* Configure Max XRIs */ 219 uint32_t cmr : 1; /* Configure Max RPIs */ 220 #else /* __LITTLE_ENDIAN */ 221 uint32_t cmr : 1; /* Configure Max RPIs */ 222 uint32_t cmx : 1; /* Configure Max XRIs */ 223 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 224 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 225 uint32_t chbs : 1; /* Cofigure Host Backing store */ 226 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 227 uint32_t ccrp : 1; /* Config Command Ring Polling */ 228 uint32_t cmv : 1; /* Configure Max VPIs */ 229 uint32_t cbg : 1; /* Configure BlockGuard */ 230 uint32_t rsvd2 : 3; /* Reserved */ 231 uint32_t cdss : 1; /* Configure Data Security SLI */ 232 uint32_t rsvd3 :19; /* Reserved */ 233 #endif 234 } sli3Feat; 235 } lpfc_vpd_t; 236 237 238 /* 239 * lpfc stat counters 240 */ 241 struct lpfc_stats { 242 /* Statistics for ELS commands */ 243 uint32_t elsLogiCol; 244 uint32_t elsRetryExceeded; 245 uint32_t elsXmitRetry; 246 uint32_t elsDelayRetry; 247 uint32_t elsRcvDrop; 248 uint32_t elsRcvFrame; 249 uint32_t elsRcvRSCN; 250 uint32_t elsRcvRNID; 251 uint32_t elsRcvFARP; 252 uint32_t elsRcvFARPR; 253 uint32_t elsRcvFLOGI; 254 uint32_t elsRcvPLOGI; 255 uint32_t elsRcvADISC; 256 uint32_t elsRcvPDISC; 257 uint32_t elsRcvFAN; 258 uint32_t elsRcvLOGO; 259 uint32_t elsRcvPRLO; 260 uint32_t elsRcvPRLI; 261 uint32_t elsRcvLIRR; 262 uint32_t elsRcvRLS; 263 uint32_t elsRcvRPS; 264 uint32_t elsRcvRPL; 265 uint32_t elsRcvRRQ; 266 uint32_t elsRcvRTV; 267 uint32_t elsRcvECHO; 268 uint32_t elsRcvLCB; 269 uint32_t elsRcvRDP; 270 uint32_t elsXmitFLOGI; 271 uint32_t elsXmitFDISC; 272 uint32_t elsXmitPLOGI; 273 uint32_t elsXmitPRLI; 274 uint32_t elsXmitADISC; 275 uint32_t elsXmitLOGO; 276 uint32_t elsXmitSCR; 277 uint32_t elsXmitRSCN; 278 uint32_t elsXmitRNID; 279 uint32_t elsXmitFARP; 280 uint32_t elsXmitFARPR; 281 uint32_t elsXmitACC; 282 uint32_t elsXmitLSRJT; 283 284 uint32_t frameRcvBcast; 285 uint32_t frameRcvMulti; 286 uint32_t strayXmitCmpl; 287 uint32_t frameXmitDelay; 288 uint32_t xriCmdCmpl; 289 uint32_t xriStatErr; 290 uint32_t LinkUp; 291 uint32_t LinkDown; 292 uint32_t LinkMultiEvent; 293 uint32_t NoRcvBuf; 294 uint32_t fcpCmd; 295 uint32_t fcpCmpl; 296 uint32_t fcpRspErr; 297 uint32_t fcpRemoteStop; 298 uint32_t fcpPortRjt; 299 uint32_t fcpPortBusy; 300 uint32_t fcpError; 301 uint32_t fcpLocalErr; 302 }; 303 304 struct lpfc_hba; 305 306 307 enum discovery_state { 308 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 309 LPFC_VPORT_FAILED = 1, /* vport has failed */ 310 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 311 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 312 LPFC_FDISC = 8, /* FDISC sent for vport */ 313 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 314 * configured */ 315 LPFC_NS_REG = 10, /* Register with NameServer */ 316 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 317 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 318 * device authentication / discovery */ 319 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 320 LPFC_VPORT_READY = 32, 321 }; 322 323 enum hba_state { 324 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 325 LPFC_WARM_START = 1, /* HBA state after selective reset */ 326 LPFC_INIT_START = 2, /* Initial state after board reset */ 327 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 328 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 329 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 330 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 331 * CLEAR_LA */ 332 LPFC_HBA_READY = 32, 333 LPFC_HBA_ERROR = -1 334 }; 335 336 struct lpfc_trunk_link_state { 337 enum hba_state state; 338 uint8_t fault; 339 }; 340 341 struct lpfc_trunk_link { 342 struct lpfc_trunk_link_state link0, 343 link1, 344 link2, 345 link3; 346 }; 347 348 struct lpfc_vport { 349 struct lpfc_hba *phba; 350 struct list_head listentry; 351 uint8_t port_type; 352 #define LPFC_PHYSICAL_PORT 1 353 #define LPFC_NPIV_PORT 2 354 #define LPFC_FABRIC_PORT 3 355 enum discovery_state port_state; 356 357 uint16_t vpi; 358 uint16_t vfi; 359 uint8_t vpi_state; 360 #define LPFC_VPI_REGISTERED 0x1 361 362 uint32_t fc_flag; /* FC flags */ 363 /* Several of these flags are HBA centric and should be moved to 364 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 365 */ 366 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 367 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 368 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 369 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 370 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 371 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 372 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 373 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 374 #define FC_FABRIC 0x100 /* We are fabric attached */ 375 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 376 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 377 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 378 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 379 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 380 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 381 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 382 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 383 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 384 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 385 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 386 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 387 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 388 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 389 390 uint32_t ct_flags; 391 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 392 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 393 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 394 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 395 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 396 397 struct list_head fc_nodes; 398 399 /* Keep counters for the number of entries in each list. */ 400 uint16_t fc_plogi_cnt; 401 uint16_t fc_adisc_cnt; 402 uint16_t fc_reglogin_cnt; 403 uint16_t fc_prli_cnt; 404 uint16_t fc_unmap_cnt; 405 uint16_t fc_map_cnt; 406 uint16_t fc_npr_cnt; 407 uint16_t fc_unused_cnt; 408 struct serv_parm fc_sparam; /* buffer for our service parameters */ 409 410 uint32_t fc_myDID; /* fibre channel S_ID */ 411 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 412 struct lpfc_name fabric_portname; 413 struct lpfc_name fabric_nodename; 414 415 int32_t stopped; /* HBA has not been restarted since last ERATT */ 416 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 417 418 uint32_t num_disc_nodes; /* in addition to hba_state */ 419 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 420 421 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 422 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 423 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 424 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 425 struct lpfc_name fc_nodename; /* fc nodename */ 426 struct lpfc_name fc_portname; /* fc portname */ 427 428 struct lpfc_work_evt disc_timeout_evt; 429 430 struct timer_list fc_disctmo; /* Discovery rescue timer */ 431 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 432 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 433 434 spinlock_t work_port_lock; 435 uint32_t work_port_events; /* Timeout to be handled */ 436 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 437 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 438 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 439 440 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 441 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 442 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 443 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 444 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 445 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 446 447 struct timer_list els_tmofunc; 448 struct timer_list delayed_disc_tmo; 449 450 int unreg_vpi_cmpl; 451 452 uint8_t load_flag; 453 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 454 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 455 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 456 /* Vport Config Parameters */ 457 uint32_t cfg_scan_down; 458 uint32_t cfg_lun_queue_depth; 459 uint32_t cfg_nodev_tmo; 460 uint32_t cfg_devloss_tmo; 461 uint32_t cfg_restrict_login; 462 uint32_t cfg_peer_port_login; 463 uint32_t cfg_fcp_class; 464 uint32_t cfg_use_adisc; 465 uint32_t cfg_discovery_threads; 466 uint32_t cfg_log_verbose; 467 uint32_t cfg_enable_fc4_type; 468 uint32_t cfg_max_luns; 469 uint32_t cfg_enable_da_id; 470 uint32_t cfg_max_scsicmpl_time; 471 uint32_t cfg_tgt_queue_depth; 472 uint32_t cfg_first_burst_size; 473 uint32_t dev_loss_tmo_changed; 474 475 struct fc_vport *fc_vport; 476 477 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 478 struct dentry *debug_disc_trc; 479 struct dentry *debug_nodelist; 480 struct dentry *debug_nvmestat; 481 struct dentry *debug_scsistat; 482 struct dentry *debug_nvmektime; 483 struct dentry *debug_cpucheck; 484 struct dentry *vport_debugfs_root; 485 struct lpfc_debugfs_trc *disc_trc; 486 atomic_t disc_trc_cnt; 487 #endif 488 uint8_t stat_data_enabled; 489 uint8_t stat_data_blocked; 490 struct list_head rcv_buffer_list; 491 unsigned long rcv_buffer_time_stamp; 492 uint32_t vport_flag; 493 #define STATIC_VPORT 1 494 #define FAWWPN_SET 2 495 #define FAWWPN_PARAM_CHG 4 496 497 uint16_t fdmi_num_disc; 498 uint32_t fdmi_hba_mask; 499 uint32_t fdmi_port_mask; 500 501 /* There is a single nvme instance per vport. */ 502 struct nvme_fc_local_port *localport; 503 uint8_t nvmei_support; /* driver supports NVME Initiator */ 504 uint32_t last_fcp_wqidx; 505 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */ 506 }; 507 508 struct hbq_s { 509 uint16_t entry_count; /* Current number of HBQ slots */ 510 uint16_t buffer_count; /* Current number of buffers posted */ 511 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 512 uint32_t hbqPutIdx; /* HBQ slot to use */ 513 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 514 void *hbq_virt; /* Virtual ptr to this hbq */ 515 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 516 /* Callback for HBQ buffer allocation */ 517 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 518 /* Callback for HBQ buffer free */ 519 void (*hbq_free_buffer) (struct lpfc_hba *, 520 struct hbq_dmabuf *); 521 }; 522 523 /* this matches the position in the lpfc_hbq_defs array */ 524 #define LPFC_ELS_HBQ 0 525 #define LPFC_MAX_HBQS 1 526 527 enum hba_temp_state { 528 HBA_NORMAL_TEMP, 529 HBA_OVER_TEMP 530 }; 531 532 enum intr_type_t { 533 NONE = 0, 534 INTx, 535 MSI, 536 MSIX, 537 }; 538 539 #define LPFC_CT_CTX_MAX 64 540 struct unsol_rcv_ct_ctx { 541 uint32_t ctxt_id; 542 uint32_t SID; 543 uint32_t valid; 544 #define UNSOL_INVALID 0 545 #define UNSOL_VALID 1 546 uint16_t oxid; 547 uint16_t rxid; 548 }; 549 550 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 551 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 552 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 553 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 554 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 555 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 556 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 557 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 558 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */ 559 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G 560 561 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64" 562 563 enum nemb_type { 564 nemb_mse = 1, 565 nemb_hbd 566 }; 567 568 enum mbox_type { 569 mbox_rd = 1, 570 mbox_wr 571 }; 572 573 enum dma_type { 574 dma_mbox = 1, 575 dma_ebuf 576 }; 577 578 enum sta_type { 579 sta_pre_addr = 1, 580 sta_pos_addr 581 }; 582 583 struct lpfc_mbox_ext_buf_ctx { 584 uint32_t state; 585 #define LPFC_BSG_MBOX_IDLE 0 586 #define LPFC_BSG_MBOX_HOST 1 587 #define LPFC_BSG_MBOX_PORT 2 588 #define LPFC_BSG_MBOX_DONE 3 589 #define LPFC_BSG_MBOX_ABTS 4 590 enum nemb_type nembType; 591 enum mbox_type mboxType; 592 uint32_t numBuf; 593 uint32_t mbxTag; 594 uint32_t seqNum; 595 struct lpfc_dmabuf *mbx_dmabuf; 596 struct list_head ext_dmabuf_list; 597 }; 598 599 struct lpfc_epd_pool { 600 /* Expedite pool */ 601 struct list_head list; 602 u32 count; 603 spinlock_t lock; /* lock for expedite pool */ 604 }; 605 606 struct lpfc_ras_fwlog { 607 uint8_t *fwlog_buff; 608 uint32_t fw_buffcount; /* Buffer size posted to FW */ 609 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ 610 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) 611 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) 612 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024) 613 uint32_t fw_loglevel; /* Log level set */ 614 struct lpfc_dmabuf lwpd; 615 struct list_head fwlog_buff_list; 616 617 /* RAS support status on adapter */ 618 bool ras_hwsupport; /* RAS Support available on HW or not */ 619 bool ras_enabled; /* Ras Enabled for the function */ 620 #define LPFC_RAS_DISABLE_LOGGING 0x00 621 #define LPFC_RAS_ENABLE_LOGGING 0x01 622 bool ras_active; /* RAS logging running state */ 623 }; 624 625 struct lpfc_hba { 626 /* SCSI interface function jump table entries */ 627 struct lpfc_io_buf * (*lpfc_get_scsi_buf) 628 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, 629 struct scsi_cmnd *cmnd); 630 int (*lpfc_scsi_prep_dma_buf) 631 (struct lpfc_hba *, struct lpfc_io_buf *); 632 void (*lpfc_scsi_unprep_dma_buf) 633 (struct lpfc_hba *, struct lpfc_io_buf *); 634 void (*lpfc_release_scsi_buf) 635 (struct lpfc_hba *, struct lpfc_io_buf *); 636 void (*lpfc_rampdown_queue_depth) 637 (struct lpfc_hba *); 638 void (*lpfc_scsi_prep_cmnd) 639 (struct lpfc_vport *, struct lpfc_io_buf *, 640 struct lpfc_nodelist *); 641 642 /* IOCB interface function jump table entries */ 643 int (*__lpfc_sli_issue_iocb) 644 (struct lpfc_hba *, uint32_t, 645 struct lpfc_iocbq *, uint32_t); 646 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 647 struct lpfc_iocbq *); 648 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 649 IOCB_t * (*lpfc_get_iocb_from_iocbq) 650 (struct lpfc_iocbq *); 651 void (*lpfc_scsi_cmd_iocb_cmpl) 652 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 653 654 /* MBOX interface function jump table entries */ 655 int (*lpfc_sli_issue_mbox) 656 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 657 658 /* Slow-path IOCB process function jump table entries */ 659 void (*lpfc_sli_handle_slow_ring_event) 660 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 661 uint32_t mask); 662 663 /* INIT device interface function jump table entries */ 664 int (*lpfc_sli_hbq_to_firmware) 665 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 666 int (*lpfc_sli_brdrestart) 667 (struct lpfc_hba *); 668 int (*lpfc_sli_brdready) 669 (struct lpfc_hba *, uint32_t); 670 void (*lpfc_handle_eratt) 671 (struct lpfc_hba *); 672 void (*lpfc_stop_port) 673 (struct lpfc_hba *); 674 int (*lpfc_hba_init_link) 675 (struct lpfc_hba *, uint32_t); 676 int (*lpfc_hba_down_link) 677 (struct lpfc_hba *, uint32_t); 678 int (*lpfc_selective_reset) 679 (struct lpfc_hba *); 680 681 int (*lpfc_bg_scsi_prep_dma_buf) 682 (struct lpfc_hba *, struct lpfc_io_buf *); 683 /* Add new entries here */ 684 685 /* expedite pool */ 686 struct lpfc_epd_pool epd_pool; 687 688 /* SLI4 specific HBA data structure */ 689 struct lpfc_sli4_hba sli4_hba; 690 691 struct workqueue_struct *wq; 692 struct delayed_work eq_delay_work; 693 694 struct lpfc_sli sli; 695 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 696 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 697 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 698 #define LPFC_SLI3_HBQ_ENABLED 0x01 699 #define LPFC_SLI3_NPIV_ENABLED 0x02 700 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 701 #define LPFC_SLI3_CRP_ENABLED 0x08 702 #define LPFC_SLI3_BG_ENABLED 0x20 703 #define LPFC_SLI3_DSS_ENABLED 0x40 704 #define LPFC_SLI4_PERFH_ENABLED 0x80 705 #define LPFC_SLI4_PHWQ_ENABLED 0x100 706 uint32_t iocb_cmd_size; 707 uint32_t iocb_rsp_size; 708 709 struct lpfc_trunk_link trunk_link; 710 enum hba_state link_state; 711 uint32_t link_flag; /* link state flags */ 712 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 713 /* This flag is set while issuing */ 714 /* INIT_LINK mailbox command */ 715 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 716 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 717 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 718 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 719 720 uint32_t hba_flag; /* hba generic flags */ 721 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 722 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 723 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 724 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 725 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 726 #define ELS_XRI_ABORT_EVENT 0x40 727 #define ASYNC_EVENT 0x80 728 #define LINK_DISABLED 0x100 /* Link disabled by user */ 729 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 730 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 731 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 732 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 733 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 734 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 735 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */ 736 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 737 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 738 #define HBA_FORCED_LINK_SPEED 0x40000 /* 739 * Firmware supports Forced Link Speed 740 * capability 741 */ 742 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */ 743 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 744 745 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 746 struct lpfc_dmabuf slim2p; 747 748 MAILBOX_t *mbox; 749 uint32_t *mbox_ext; 750 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 751 uint32_t ha_copy; 752 struct _PCB *pcb; 753 struct _IOCB *IOCBs; 754 755 struct lpfc_dmabuf hbqslimp; 756 757 uint16_t pci_cfg_value; 758 759 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 760 761 uint32_t fc_eventTag; /* event tag for link attention */ 762 uint32_t link_events; 763 764 /* These fields used to be binfo */ 765 uint32_t fc_pref_DID; /* preferred D_ID */ 766 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 767 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 768 uint32_t fc_edtov; /* E_D_TOV timer value */ 769 uint32_t fc_arbtov; /* ARB_TOV timer value */ 770 uint32_t fc_ratov; /* R_A_TOV timer value */ 771 uint32_t fc_rttov; /* R_T_TOV timer value */ 772 uint32_t fc_altov; /* AL_TOV timer value */ 773 uint32_t fc_crtov; /* C_R_TOV timer value */ 774 775 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 776 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 777 778 uint32_t lmt; 779 780 uint32_t fc_topology; /* link topology, from LINK INIT */ 781 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 782 783 struct lpfc_stats fc_stat; 784 785 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 786 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 787 788 uint8_t wwnn[8]; 789 uint8_t wwpn[8]; 790 uint32_t RandomData[7]; 791 uint8_t fcp_embed_io; 792 uint8_t nvme_support; /* Firmware supports NVME */ 793 uint8_t nvmet_support; /* driver supports NVMET */ 794 #define LPFC_NVMET_MAX_PORTS 32 795 uint8_t mds_diags_support; 796 uint8_t bbcredit_support; 797 uint8_t enab_exp_wqcq_pages; 798 799 /* HBA Config Parameters */ 800 uint32_t cfg_ack0; 801 uint32_t cfg_xri_rebalancing; 802 uint32_t cfg_enable_npiv; 803 uint32_t cfg_enable_rrq; 804 uint32_t cfg_topology; 805 uint32_t cfg_link_speed; 806 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 807 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 808 uint32_t cfg_fcf_failover_policy; 809 uint32_t cfg_fcp_io_sched; 810 uint32_t cfg_ns_query; 811 uint32_t cfg_fcp2_no_tgt_reset; 812 uint32_t cfg_cr_delay; 813 uint32_t cfg_cr_count; 814 uint32_t cfg_multi_ring_support; 815 uint32_t cfg_multi_ring_rctl; 816 uint32_t cfg_multi_ring_type; 817 uint32_t cfg_poll; 818 uint32_t cfg_poll_tmo; 819 uint32_t cfg_task_mgmt_tmo; 820 uint32_t cfg_use_msi; 821 uint32_t cfg_auto_imax; 822 uint32_t cfg_fcp_imax; 823 uint32_t cfg_force_rscn; 824 uint32_t cfg_cq_poll_threshold; 825 uint32_t cfg_cq_max_proc_limit; 826 uint32_t cfg_fcp_cpu_map; 827 uint32_t cfg_hdw_queue; 828 uint32_t cfg_irq_chann; 829 uint32_t cfg_suppress_rsp; 830 uint32_t cfg_nvme_oas; 831 uint32_t cfg_nvme_embed_cmd; 832 uint32_t cfg_nvmet_mrq_post; 833 uint32_t cfg_nvmet_mrq; 834 uint32_t cfg_enable_nvmet; 835 uint32_t cfg_nvme_enable_fb; 836 uint32_t cfg_nvmet_fb_size; 837 uint32_t cfg_total_seg_cnt; 838 uint32_t cfg_sg_seg_cnt; 839 uint32_t cfg_nvme_seg_cnt; 840 uint32_t cfg_scsi_seg_cnt; 841 uint32_t cfg_sg_dma_buf_size; 842 uint64_t cfg_soft_wwnn; 843 uint64_t cfg_soft_wwpn; 844 uint32_t cfg_hba_queue_depth; 845 uint32_t cfg_enable_hba_reset; 846 uint32_t cfg_enable_hba_heartbeat; 847 uint32_t cfg_fof; 848 uint32_t cfg_EnableXLane; 849 uint8_t cfg_oas_tgt_wwpn[8]; 850 uint8_t cfg_oas_vpt_wwpn[8]; 851 uint32_t cfg_oas_lun_state; 852 #define OAS_LUN_ENABLE 1 853 #define OAS_LUN_DISABLE 0 854 uint32_t cfg_oas_lun_status; 855 #define OAS_LUN_STATUS_EXISTS 0x01 856 uint32_t cfg_oas_flags; 857 #define OAS_FIND_ANY_VPORT 0x01 858 #define OAS_FIND_ANY_TARGET 0x02 859 #define OAS_LUN_VALID 0x04 860 uint32_t cfg_oas_priority; 861 uint32_t cfg_XLanePriority; 862 uint32_t cfg_enable_bg; 863 uint32_t cfg_prot_mask; 864 uint32_t cfg_prot_guard; 865 uint32_t cfg_hostmem_hgp; 866 uint32_t cfg_log_verbose; 867 uint32_t cfg_enable_fc4_type; 868 uint32_t cfg_aer_support; 869 uint32_t cfg_sriov_nr_virtfn; 870 uint32_t cfg_request_firmware_upgrade; 871 uint32_t cfg_iocb_cnt; 872 uint32_t cfg_suppress_link_up; 873 uint32_t cfg_rrq_xri_bitmap_sz; 874 uint32_t cfg_delay_discovery; 875 uint32_t cfg_sli_mode; 876 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 877 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 878 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 879 uint32_t cfg_enable_dss; 880 uint32_t cfg_fdmi_on; 881 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 882 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 883 uint32_t cfg_enable_SmartSAN; 884 uint32_t cfg_enable_mds_diags; 885 uint32_t cfg_ras_fwlog_level; 886 uint32_t cfg_ras_fwlog_buffsize; 887 uint32_t cfg_ras_fwlog_func; 888 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */ 889 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */ 890 #define LPFC_ENABLE_FCP 1 891 #define LPFC_ENABLE_NVME 2 892 #define LPFC_ENABLE_BOTH 3 893 uint32_t cfg_enable_pbde; 894 struct nvmet_fc_target_port *targetport; 895 lpfc_vpd_t vpd; /* vital product data */ 896 897 struct pci_dev *pcidev; 898 struct list_head work_list; 899 uint32_t work_ha; /* Host Attention Bits for WT */ 900 uint32_t work_ha_mask; /* HA Bits owned by WT */ 901 uint32_t work_hs; /* HS stored in case of ERRAT */ 902 uint32_t work_status[2]; /* Extra status from SLIM */ 903 904 wait_queue_head_t work_waitq; 905 struct task_struct *worker_thread; 906 unsigned long data_flags; 907 908 uint32_t hbq_in_use; /* HBQs in use flag */ 909 uint32_t hbq_count; /* Count of configured HBQs */ 910 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 911 912 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 913 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 914 915 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 916 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 917 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 918 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 919 PCI BAR0 */ 920 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 921 PCI BAR2 */ 922 923 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 924 PCI BAR0 with dual-ULP support */ 925 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 926 PCI BAR2 with dual-ULP support */ 927 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 928 PCI BAR4 with dual-ULP support */ 929 #define PCI_64BIT_BAR0 0 930 #define PCI_64BIT_BAR2 2 931 #define PCI_64BIT_BAR4 4 932 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 933 void __iomem *HAregaddr; /* virtual address for host attn reg */ 934 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 935 void __iomem *HSregaddr; /* virtual address for host status 936 reg */ 937 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 938 939 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 940 struct lpfc_pgp *port_gp; 941 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 942 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 943 944 int brd_no; /* FC board number */ 945 char SerialNumber[32]; /* adapter Serial Number */ 946 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 947 char BIOSVersion[16]; /* Boot BIOS version */ 948 char ModelDesc[256]; /* Model Description */ 949 char ModelName[80]; /* Model Name */ 950 char ProgramType[256]; /* Program Type */ 951 char Port[20]; /* Port No */ 952 uint8_t vpd_flag; /* VPD data flag */ 953 954 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 955 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 956 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 957 #define VPD_PORT 0x8 /* valid vpd port data */ 958 #define VPD_MASK 0xf /* mask for any vpd data */ 959 960 uint8_t soft_wwn_enable; 961 962 struct timer_list fcp_poll_timer; 963 struct timer_list eratt_poll; 964 uint32_t eratt_poll_interval; 965 966 uint64_t bg_guard_err_cnt; 967 uint64_t bg_apptag_err_cnt; 968 uint64_t bg_reftag_err_cnt; 969 970 /* fastpath list. */ 971 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 972 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 973 struct list_head lpfc_scsi_buf_list_get; 974 struct list_head lpfc_scsi_buf_list_put; 975 uint32_t total_scsi_bufs; 976 struct list_head lpfc_iocb_list; 977 uint32_t total_iocbq_bufs; 978 struct list_head active_rrq_list; 979 spinlock_t hbalock; 980 981 /* dma_mem_pools */ 982 struct dma_pool *lpfc_sg_dma_buf_pool; 983 struct dma_pool *lpfc_mbuf_pool; 984 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 985 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 986 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 987 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 988 struct dma_pool *txrdy_payload_pool; 989 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 990 991 mempool_t *mbox_mem_pool; 992 mempool_t *nlp_mem_pool; 993 mempool_t *rrq_pool; 994 mempool_t *active_rrq_pool; 995 996 struct fc_host_statistics link_stats; 997 enum intr_type_t intr_type; 998 uint32_t intr_mode; 999 #define LPFC_INTR_ERROR 0xFFFFFFFF 1000 struct list_head port_list; 1001 spinlock_t port_list_lock; /* lock for port_list mutations */ 1002 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 1003 uint16_t max_vpi; /* Maximum virtual nports */ 1004 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */ 1005 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */ 1006 uint16_t max_vports; /* 1007 * For IOV HBAs max_vpi can change 1008 * after a reset. max_vports is max 1009 * number of vports present. This can 1010 * be greater than max_vpi. 1011 */ 1012 uint16_t vpi_base; 1013 uint16_t vfi_base; 1014 unsigned long *vpi_bmask; /* vpi allocation table */ 1015 uint16_t *vpi_ids; 1016 uint16_t vpi_count; 1017 struct list_head lpfc_vpi_blk_list; 1018 1019 /* Data structure used by fabric iocb scheduler */ 1020 struct list_head fabric_iocb_list; 1021 atomic_t fabric_iocb_count; 1022 struct timer_list fabric_block_timer; 1023 unsigned long bit_flags; 1024 #define FABRIC_COMANDS_BLOCKED 0 1025 atomic_t num_rsrc_err; 1026 atomic_t num_cmd_success; 1027 unsigned long last_rsrc_error_time; 1028 unsigned long last_ramp_down_time; 1029 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1030 struct dentry *hba_debugfs_root; 1031 atomic_t debugfs_vport_count; 1032 struct dentry *debug_multixri_pools; 1033 struct dentry *debug_hbqinfo; 1034 struct dentry *debug_dumpHostSlim; 1035 struct dentry *debug_dumpHBASlim; 1036 struct dentry *debug_dumpData; /* BlockGuard BPL */ 1037 struct dentry *debug_dumpDif; /* BlockGuard BPL */ 1038 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1039 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1040 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1041 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1042 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1043 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1044 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1045 struct dentry *debug_readApp; /* inject read app_tag errors */ 1046 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1047 1048 struct dentry *debug_nvmeio_trc; 1049 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1050 struct dentry *debug_hdwqinfo; 1051 #ifdef LPFC_HDWQ_LOCK_STAT 1052 struct dentry *debug_lockstat; 1053 #endif 1054 atomic_t nvmeio_trc_cnt; 1055 uint32_t nvmeio_trc_size; 1056 uint32_t nvmeio_trc_output_idx; 1057 1058 /* T10 DIF error injection */ 1059 uint32_t lpfc_injerr_wgrd_cnt; 1060 uint32_t lpfc_injerr_wapp_cnt; 1061 uint32_t lpfc_injerr_wref_cnt; 1062 uint32_t lpfc_injerr_rgrd_cnt; 1063 uint32_t lpfc_injerr_rapp_cnt; 1064 uint32_t lpfc_injerr_rref_cnt; 1065 uint32_t lpfc_injerr_nportid; 1066 struct lpfc_name lpfc_injerr_wwpn; 1067 sector_t lpfc_injerr_lba; 1068 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1069 1070 struct dentry *debug_slow_ring_trc; 1071 struct lpfc_debugfs_trc *slow_ring_trc; 1072 atomic_t slow_ring_trc_cnt; 1073 /* iDiag debugfs sub-directory */ 1074 struct dentry *idiag_root; 1075 struct dentry *idiag_pci_cfg; 1076 struct dentry *idiag_bar_acc; 1077 struct dentry *idiag_que_info; 1078 struct dentry *idiag_que_acc; 1079 struct dentry *idiag_drb_acc; 1080 struct dentry *idiag_ctl_acc; 1081 struct dentry *idiag_mbx_acc; 1082 struct dentry *idiag_ext_acc; 1083 uint8_t lpfc_idiag_last_eq; 1084 #endif 1085 uint16_t nvmeio_trc_on; 1086 1087 /* Used for deferred freeing of ELS data buffers */ 1088 struct list_head elsbuf; 1089 int elsbuf_cnt; 1090 int elsbuf_prev_cnt; 1091 1092 uint8_t temp_sensor_support; 1093 /* Fields used for heart beat. */ 1094 unsigned long last_completion_time; 1095 unsigned long skipped_hb; 1096 struct timer_list hb_tmofunc; 1097 uint8_t hb_outstanding; 1098 struct timer_list rrq_tmr; 1099 enum hba_temp_state over_temp_state; 1100 /* ndlp reference management */ 1101 spinlock_t ndlp_lock; 1102 /* 1103 * Following bit will be set for all buffer tags which are not 1104 * associated with any HBQ. 1105 */ 1106 #define QUE_BUFTAG_BIT (1<<31) 1107 uint32_t buffer_tag_count; 1108 int wait_4_mlo_maint_flg; 1109 wait_queue_head_t wait_4_mlo_m_q; 1110 /* data structure used for latency data collection */ 1111 #define LPFC_NO_BUCKET 0 1112 #define LPFC_LINEAR_BUCKET 1 1113 #define LPFC_POWER2_BUCKET 2 1114 uint8_t bucket_type; 1115 uint32_t bucket_base; 1116 uint32_t bucket_step; 1117 1118 /* Maximum number of events that can be outstanding at any time*/ 1119 #define LPFC_MAX_EVT_COUNT 512 1120 atomic_t fast_event_count; 1121 uint32_t fcoe_eventtag; 1122 uint32_t fcoe_eventtag_at_fcf_scan; 1123 uint32_t fcoe_cvl_eventtag; 1124 uint32_t fcoe_cvl_eventtag_attn; 1125 struct lpfc_fcf fcf; 1126 uint8_t fc_map[3]; 1127 uint8_t valid_vlan; 1128 uint16_t vlan_id; 1129 struct list_head fcf_conn_rec_list; 1130 1131 bool defer_flogi_acc_flag; 1132 uint16_t defer_flogi_acc_rx_id; 1133 uint16_t defer_flogi_acc_ox_id; 1134 1135 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1136 struct list_head ct_ev_waiters; 1137 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1138 uint32_t ctx_idx; 1139 1140 /* RAS Support */ 1141 struct lpfc_ras_fwlog ras_fwlog; 1142 1143 uint8_t menlo_flag; /* menlo generic flags */ 1144 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1145 uint32_t iocb_cnt; 1146 uint32_t iocb_max; 1147 atomic_t sdev_cnt; 1148 uint8_t fips_spec_rev; 1149 uint8_t fips_level; 1150 spinlock_t devicelock; /* lock for luns list */ 1151 mempool_t *device_data_mem_pool; 1152 struct list_head luns; 1153 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1154 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1155 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1156 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1157 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1158 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1159 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1160 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1161 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1162 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1163 uint16_t sfp_alarm; 1164 uint16_t sfp_warning; 1165 1166 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1167 uint16_t cpucheck_on; 1168 #define LPFC_CHECK_OFF 0 1169 #define LPFC_CHECK_NVME_IO 1 1170 #define LPFC_CHECK_NVMET_RCV 2 1171 #define LPFC_CHECK_NVMET_IO 4 1172 #define LPFC_CHECK_SCSI_IO 8 1173 uint16_t ktime_on; 1174 uint64_t ktime_data_samples; 1175 uint64_t ktime_status_samples; 1176 uint64_t ktime_last_cmd; 1177 uint64_t ktime_seg1_total; 1178 uint64_t ktime_seg1_min; 1179 uint64_t ktime_seg1_max; 1180 uint64_t ktime_seg2_total; 1181 uint64_t ktime_seg2_min; 1182 uint64_t ktime_seg2_max; 1183 uint64_t ktime_seg3_total; 1184 uint64_t ktime_seg3_min; 1185 uint64_t ktime_seg3_max; 1186 uint64_t ktime_seg4_total; 1187 uint64_t ktime_seg4_min; 1188 uint64_t ktime_seg4_max; 1189 uint64_t ktime_seg5_total; 1190 uint64_t ktime_seg5_min; 1191 uint64_t ktime_seg5_max; 1192 uint64_t ktime_seg6_total; 1193 uint64_t ktime_seg6_min; 1194 uint64_t ktime_seg6_max; 1195 uint64_t ktime_seg7_total; 1196 uint64_t ktime_seg7_min; 1197 uint64_t ktime_seg7_max; 1198 uint64_t ktime_seg8_total; 1199 uint64_t ktime_seg8_min; 1200 uint64_t ktime_seg8_max; 1201 uint64_t ktime_seg9_total; 1202 uint64_t ktime_seg9_min; 1203 uint64_t ktime_seg9_max; 1204 uint64_t ktime_seg10_total; 1205 uint64_t ktime_seg10_min; 1206 uint64_t ktime_seg10_max; 1207 #endif 1208 }; 1209 1210 static inline struct Scsi_Host * 1211 lpfc_shost_from_vport(struct lpfc_vport *vport) 1212 { 1213 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1214 } 1215 1216 static inline void 1217 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1218 { 1219 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1220 phba->link_flag |= LS_LOOPBACK_MODE; 1221 else 1222 phba->link_flag &= ~LS_LOOPBACK_MODE; 1223 } 1224 1225 static inline int 1226 lpfc_is_link_up(struct lpfc_hba *phba) 1227 { 1228 return phba->link_state == LPFC_LINK_UP || 1229 phba->link_state == LPFC_CLEAR_LA || 1230 phba->link_state == LPFC_HBA_READY; 1231 } 1232 1233 static inline void 1234 lpfc_worker_wake_up(struct lpfc_hba *phba) 1235 { 1236 /* Set the lpfc data pending flag */ 1237 set_bit(LPFC_DATA_READY, &phba->data_flags); 1238 1239 /* Wake up worker thread */ 1240 wake_up(&phba->work_waitq); 1241 return; 1242 } 1243 1244 static inline int 1245 lpfc_readl(void __iomem *addr, uint32_t *data) 1246 { 1247 uint32_t temp; 1248 temp = readl(addr); 1249 if (temp == 0xffffffff) 1250 return -EIO; 1251 *data = temp; 1252 return 0; 1253 } 1254 1255 static inline int 1256 lpfc_sli_read_hs(struct lpfc_hba *phba) 1257 { 1258 /* 1259 * There was a link/board error. Read the status register to retrieve 1260 * the error event and process it. 1261 */ 1262 phba->sli.slistat.err_attn_event++; 1263 1264 /* Save status info and check for unplug error */ 1265 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1266 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1267 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1268 return -EIO; 1269 } 1270 1271 /* Clear chip Host Attention error bit */ 1272 writel(HA_ERATT, phba->HAregaddr); 1273 readl(phba->HAregaddr); /* flush */ 1274 phba->pport->stopped = 1; 1275 1276 return 0; 1277 } 1278 1279 static inline struct lpfc_sli_ring * 1280 lpfc_phba_elsring(struct lpfc_hba *phba) 1281 { 1282 /* Return NULL if sli_rev has become invalid due to bad fw */ 1283 if (phba->sli_rev != LPFC_SLI_REV4 && 1284 phba->sli_rev != LPFC_SLI_REV3 && 1285 phba->sli_rev != LPFC_SLI_REV2) 1286 return NULL; 1287 1288 if (phba->sli_rev == LPFC_SLI_REV4) { 1289 if (phba->sli4_hba.els_wq) 1290 return phba->sli4_hba.els_wq->pring; 1291 else 1292 return NULL; 1293 } 1294 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1295 } 1296 1297 /** 1298 * lpfc_sli4_mod_hba_eq_delay - update EQ delay 1299 * @phba: Pointer to HBA context object. 1300 * @q: The Event Queue to update. 1301 * @delay: The delay value (in us) to be written. 1302 * 1303 **/ 1304 static inline void 1305 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq, 1306 u32 delay) 1307 { 1308 struct lpfc_register reg_data; 1309 1310 reg_data.word0 = 0; 1311 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id); 1312 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay); 1313 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr); 1314 eq->q_mode = delay; 1315 } 1316