1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <scsi/scsi_host.h> 25 #include <linux/ktime.h> 26 #include <linux/workqueue.h> 27 28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 29 #define CONFIG_SCSI_LPFC_DEBUG_FS 30 #endif 31 32 struct lpfc_sli2_slim; 33 34 #define ELX_MODEL_NAME_SIZE 80 35 36 #define LPFC_PCI_DEV_LP 0x1 37 #define LPFC_PCI_DEV_OC 0x2 38 39 #define LPFC_SLI_REV2 2 40 #define LPFC_SLI_REV3 3 41 #define LPFC_SLI_REV4 4 42 43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */ 44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els 45 requests */ 46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact 47 the NameServer before giving up. */ 48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ 49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */ 50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi 51 cmnd for menlo needs nearly twice as for firmware 52 downloads using bsg */ 53 54 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 55 #define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */ 56 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ 57 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ 58 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ 59 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ 60 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ 61 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */ 62 63 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ 64 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ 65 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ 66 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ 67 #define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt 68 queue depth change in millisecs */ 69 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ 70 #define LPFC_MIN_TGT_QDEPTH 10 71 #define LPFC_MAX_TGT_QDEPTH 0xFFFF 72 73 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data 74 collection. */ 75 /* 76 * Following time intervals are used of adjusting SCSI device 77 * queue depths when there are driver resource error or Firmware 78 * resource error. 79 */ 80 /* 1 Second */ 81 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1)) 82 83 /* Number of exchanges reserved for discovery to complete */ 84 #define LPFC_DISC_IOCB_BUFF_COUNT 20 85 86 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ 87 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */ 88 89 #define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */ 90 91 /* Error Attention event polling interval */ 92 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */ 93 94 /* Define macros for 64 bit support */ 95 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr))) 96 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32))) 97 #define getPaddr(high, low) ((dma_addr_t)( \ 98 (( (u64)(high)<<16 ) << 16)|( (u64)(low)))) 99 /* Provide maximum configuration definitions. */ 100 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */ 101 #define FC_MAX_ADPTMSG 64 102 103 #define MAX_HBAEVT 32 104 #define MAX_HBAS_NO_RESET 16 105 106 /* Number of MSI-X vectors the driver uses */ 107 #define LPFC_MSIX_VECTORS 2 108 109 /* lpfc wait event data ready flag */ 110 #define LPFC_DATA_READY 0 /* bit 0 */ 111 112 /* queue dump line buffer size */ 113 #define LPFC_LBUF_SZ 128 114 115 /* mailbox system shutdown options */ 116 #define LPFC_MBX_NO_WAIT 0 117 #define LPFC_MBX_WAIT 1 118 119 enum lpfc_polling_flags { 120 ENABLE_FCP_RING_POLLING = 0x1, 121 DISABLE_FCP_RING_INT = 0x2 122 }; 123 124 struct perf_prof { 125 uint16_t cmd_cpu[40]; 126 uint16_t rsp_cpu[40]; 127 uint16_t qh_cpu[40]; 128 uint16_t wqidx[40]; 129 }; 130 131 /* 132 * Provide for FC4 TYPE x28 - NVME. The 133 * bit mask for FCP and NVME is 0x8 identically 134 * because they are 32 bit positions distance. 135 */ 136 #define LPFC_FC4_TYPE_BITMASK 0x00000100 137 138 /* Provide DMA memory definitions the driver uses per port instance. */ 139 struct lpfc_dmabuf { 140 struct list_head list; 141 void *virt; /* virtual address ptr */ 142 dma_addr_t phys; /* mapped address */ 143 uint32_t buffer_tag; /* used for tagged queue ring */ 144 }; 145 146 struct lpfc_nvmet_ctxbuf { 147 struct list_head list; 148 struct lpfc_nvmet_rcv_ctx *context; 149 struct lpfc_iocbq *iocbq; 150 struct lpfc_sglq *sglq; 151 }; 152 153 struct lpfc_dma_pool { 154 struct lpfc_dmabuf *elements; 155 uint32_t max_count; 156 uint32_t current_count; 157 }; 158 159 struct hbq_dmabuf { 160 struct lpfc_dmabuf hbuf; 161 struct lpfc_dmabuf dbuf; 162 uint16_t total_size; 163 uint16_t bytes_recv; 164 uint32_t tag; 165 struct lpfc_cq_event cq_event; 166 unsigned long time_stamp; 167 void *context; 168 }; 169 170 struct rqb_dmabuf { 171 struct lpfc_dmabuf hbuf; 172 struct lpfc_dmabuf dbuf; 173 uint16_t total_size; 174 uint16_t bytes_recv; 175 uint16_t idx; 176 struct lpfc_queue *hrq; /* ptr to associated Header RQ */ 177 struct lpfc_queue *drq; /* ptr to associated Data RQ */ 178 }; 179 180 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */ 181 #define MEM_PRI 0x100 182 183 184 /****************************************************************************/ 185 /* Device VPD save area */ 186 /****************************************************************************/ 187 typedef struct lpfc_vpd { 188 uint32_t status; /* vpd status value */ 189 uint32_t length; /* number of bytes actually returned */ 190 struct { 191 uint32_t rsvd1; /* Revision numbers */ 192 uint32_t biuRev; 193 uint32_t smRev; 194 uint32_t smFwRev; 195 uint32_t endecRev; 196 uint16_t rBit; 197 uint8_t fcphHigh; 198 uint8_t fcphLow; 199 uint8_t feaLevelHigh; 200 uint8_t feaLevelLow; 201 uint32_t postKernRev; 202 uint32_t opFwRev; 203 uint8_t opFwName[16]; 204 uint32_t sli1FwRev; 205 uint8_t sli1FwName[16]; 206 uint32_t sli2FwRev; 207 uint8_t sli2FwName[16]; 208 } rev; 209 struct { 210 #ifdef __BIG_ENDIAN_BITFIELD 211 uint32_t rsvd3 :19; /* Reserved */ 212 uint32_t cdss : 1; /* Configure Data Security SLI */ 213 uint32_t rsvd2 : 3; /* Reserved */ 214 uint32_t cbg : 1; /* Configure BlockGuard */ 215 uint32_t cmv : 1; /* Configure Max VPIs */ 216 uint32_t ccrp : 1; /* Config Command Ring Polling */ 217 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 218 uint32_t chbs : 1; /* Cofigure Host Backing store */ 219 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 220 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 221 uint32_t cmx : 1; /* Configure Max XRIs */ 222 uint32_t cmr : 1; /* Configure Max RPIs */ 223 #else /* __LITTLE_ENDIAN */ 224 uint32_t cmr : 1; /* Configure Max RPIs */ 225 uint32_t cmx : 1; /* Configure Max XRIs */ 226 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 227 uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 228 uint32_t chbs : 1; /* Cofigure Host Backing store */ 229 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 230 uint32_t ccrp : 1; /* Config Command Ring Polling */ 231 uint32_t cmv : 1; /* Configure Max VPIs */ 232 uint32_t cbg : 1; /* Configure BlockGuard */ 233 uint32_t rsvd2 : 3; /* Reserved */ 234 uint32_t cdss : 1; /* Configure Data Security SLI */ 235 uint32_t rsvd3 :19; /* Reserved */ 236 #endif 237 } sli3Feat; 238 } lpfc_vpd_t; 239 240 struct lpfc_scsi_buf; 241 242 243 /* 244 * lpfc stat counters 245 */ 246 struct lpfc_stats { 247 /* Statistics for ELS commands */ 248 uint32_t elsLogiCol; 249 uint32_t elsRetryExceeded; 250 uint32_t elsXmitRetry; 251 uint32_t elsDelayRetry; 252 uint32_t elsRcvDrop; 253 uint32_t elsRcvFrame; 254 uint32_t elsRcvRSCN; 255 uint32_t elsRcvRNID; 256 uint32_t elsRcvFARP; 257 uint32_t elsRcvFARPR; 258 uint32_t elsRcvFLOGI; 259 uint32_t elsRcvPLOGI; 260 uint32_t elsRcvADISC; 261 uint32_t elsRcvPDISC; 262 uint32_t elsRcvFAN; 263 uint32_t elsRcvLOGO; 264 uint32_t elsRcvPRLO; 265 uint32_t elsRcvPRLI; 266 uint32_t elsRcvLIRR; 267 uint32_t elsRcvRLS; 268 uint32_t elsRcvRPS; 269 uint32_t elsRcvRPL; 270 uint32_t elsRcvRRQ; 271 uint32_t elsRcvRTV; 272 uint32_t elsRcvECHO; 273 uint32_t elsRcvLCB; 274 uint32_t elsRcvRDP; 275 uint32_t elsXmitFLOGI; 276 uint32_t elsXmitFDISC; 277 uint32_t elsXmitPLOGI; 278 uint32_t elsXmitPRLI; 279 uint32_t elsXmitADISC; 280 uint32_t elsXmitLOGO; 281 uint32_t elsXmitSCR; 282 uint32_t elsXmitRNID; 283 uint32_t elsXmitFARP; 284 uint32_t elsXmitFARPR; 285 uint32_t elsXmitACC; 286 uint32_t elsXmitLSRJT; 287 288 uint32_t frameRcvBcast; 289 uint32_t frameRcvMulti; 290 uint32_t strayXmitCmpl; 291 uint32_t frameXmitDelay; 292 uint32_t xriCmdCmpl; 293 uint32_t xriStatErr; 294 uint32_t LinkUp; 295 uint32_t LinkDown; 296 uint32_t LinkMultiEvent; 297 uint32_t NoRcvBuf; 298 uint32_t fcpCmd; 299 uint32_t fcpCmpl; 300 uint32_t fcpRspErr; 301 uint32_t fcpRemoteStop; 302 uint32_t fcpPortRjt; 303 uint32_t fcpPortBusy; 304 uint32_t fcpError; 305 uint32_t fcpLocalErr; 306 }; 307 308 struct lpfc_hba; 309 310 311 enum discovery_state { 312 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */ 313 LPFC_VPORT_FAILED = 1, /* vport has failed */ 314 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */ 315 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */ 316 LPFC_FDISC = 8, /* FDISC sent for vport */ 317 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id 318 * configured */ 319 LPFC_NS_REG = 10, /* Register with NameServer */ 320 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */ 321 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for 322 * device authentication / discovery */ 323 LPFC_DISC_AUTH = 13, /* Processing ADISC list */ 324 LPFC_VPORT_READY = 32, 325 }; 326 327 enum hba_state { 328 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */ 329 LPFC_WARM_START = 1, /* HBA state after selective reset */ 330 LPFC_INIT_START = 2, /* Initial state after board reset */ 331 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */ 332 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */ 333 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */ 334 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue 335 * CLEAR_LA */ 336 LPFC_HBA_READY = 32, 337 LPFC_HBA_ERROR = -1 338 }; 339 340 struct lpfc_vport { 341 struct lpfc_hba *phba; 342 struct list_head listentry; 343 uint8_t port_type; 344 #define LPFC_PHYSICAL_PORT 1 345 #define LPFC_NPIV_PORT 2 346 #define LPFC_FABRIC_PORT 3 347 enum discovery_state port_state; 348 349 uint16_t vpi; 350 uint16_t vfi; 351 uint8_t vpi_state; 352 #define LPFC_VPI_REGISTERED 0x1 353 354 uint32_t fc_flag; /* FC flags */ 355 /* Several of these flags are HBA centric and should be moved to 356 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP) 357 */ 358 #define FC_PT2PT 0x1 /* pt2pt with no fabric */ 359 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */ 360 #define FC_DISC_TMO 0x4 /* Discovery timer running */ 361 #define FC_PUBLIC_LOOP 0x8 /* Public loop */ 362 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */ 363 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */ 364 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */ 365 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */ 366 #define FC_FABRIC 0x100 /* We are fabric attached */ 367 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */ 368 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */ 369 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/ 370 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */ 371 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */ 372 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */ 373 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */ 374 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */ 375 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */ 376 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */ 377 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */ 378 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */ 379 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */ 380 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */ 381 382 uint32_t ct_flags; 383 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */ 384 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */ 385 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */ 386 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */ 387 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */ 388 389 struct list_head fc_nodes; 390 391 /* Keep counters for the number of entries in each list. */ 392 uint16_t fc_plogi_cnt; 393 uint16_t fc_adisc_cnt; 394 uint16_t fc_reglogin_cnt; 395 uint16_t fc_prli_cnt; 396 uint16_t fc_unmap_cnt; 397 uint16_t fc_map_cnt; 398 uint16_t fc_npr_cnt; 399 uint16_t fc_unused_cnt; 400 struct serv_parm fc_sparam; /* buffer for our service parameters */ 401 402 uint32_t fc_myDID; /* fibre channel S_ID */ 403 uint32_t fc_prevDID; /* previous fibre channel S_ID */ 404 struct lpfc_name fabric_portname; 405 struct lpfc_name fabric_nodename; 406 407 int32_t stopped; /* HBA has not been restarted since last ERATT */ 408 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 409 410 uint32_t num_disc_nodes; /* in addition to hba_state */ 411 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */ 412 413 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */ 414 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */ 415 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */ 416 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN]; 417 struct lpfc_name fc_nodename; /* fc nodename */ 418 struct lpfc_name fc_portname; /* fc portname */ 419 420 struct lpfc_work_evt disc_timeout_evt; 421 422 struct timer_list fc_disctmo; /* Discovery rescue timer */ 423 uint8_t fc_ns_retry; /* retries for fabric nameserver */ 424 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */ 425 426 spinlock_t work_port_lock; 427 uint32_t work_port_events; /* Timeout to be handled */ 428 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */ 429 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */ 430 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */ 431 432 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */ 433 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */ 434 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */ 435 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */ 436 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */ 437 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */ 438 439 struct timer_list els_tmofunc; 440 struct timer_list delayed_disc_tmo; 441 442 int unreg_vpi_cmpl; 443 444 uint8_t load_flag; 445 #define FC_LOADING 0x1 /* HBA in process of loading drvr */ 446 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */ 447 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */ 448 /* Vport Config Parameters */ 449 uint32_t cfg_scan_down; 450 uint32_t cfg_lun_queue_depth; 451 uint32_t cfg_nodev_tmo; 452 uint32_t cfg_devloss_tmo; 453 uint32_t cfg_restrict_login; 454 uint32_t cfg_peer_port_login; 455 uint32_t cfg_fcp_class; 456 uint32_t cfg_use_adisc; 457 uint32_t cfg_discovery_threads; 458 uint32_t cfg_log_verbose; 459 uint32_t cfg_max_luns; 460 uint32_t cfg_enable_da_id; 461 uint32_t cfg_max_scsicmpl_time; 462 uint32_t cfg_tgt_queue_depth; 463 uint32_t cfg_first_burst_size; 464 uint32_t dev_loss_tmo_changed; 465 466 struct fc_vport *fc_vport; 467 468 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 469 struct dentry *debug_disc_trc; 470 struct dentry *debug_nodelist; 471 struct dentry *debug_nvmestat; 472 struct dentry *debug_nvmektime; 473 struct dentry *debug_cpucheck; 474 struct dentry *vport_debugfs_root; 475 struct lpfc_debugfs_trc *disc_trc; 476 atomic_t disc_trc_cnt; 477 #endif 478 uint8_t stat_data_enabled; 479 uint8_t stat_data_blocked; 480 struct list_head rcv_buffer_list; 481 unsigned long rcv_buffer_time_stamp; 482 uint32_t vport_flag; 483 #define STATIC_VPORT 1 484 #define FAWWPN_SET 2 485 #define FAWWPN_PARAM_CHG 4 486 487 uint16_t fdmi_num_disc; 488 uint32_t fdmi_hba_mask; 489 uint32_t fdmi_port_mask; 490 491 /* There is a single nvme instance per vport. */ 492 struct nvme_fc_local_port *localport; 493 uint8_t nvmei_support; /* driver supports NVME Initiator */ 494 uint32_t last_fcp_wqidx; 495 }; 496 497 struct hbq_s { 498 uint16_t entry_count; /* Current number of HBQ slots */ 499 uint16_t buffer_count; /* Current number of buffers posted */ 500 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */ 501 uint32_t hbqPutIdx; /* HBQ slot to use */ 502 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ 503 void *hbq_virt; /* Virtual ptr to this hbq */ 504 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ 505 /* Callback for HBQ buffer allocation */ 506 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); 507 /* Callback for HBQ buffer free */ 508 void (*hbq_free_buffer) (struct lpfc_hba *, 509 struct hbq_dmabuf *); 510 }; 511 512 /* this matches the position in the lpfc_hbq_defs array */ 513 #define LPFC_ELS_HBQ 0 514 #define LPFC_MAX_HBQS 1 515 516 enum hba_temp_state { 517 HBA_NORMAL_TEMP, 518 HBA_OVER_TEMP 519 }; 520 521 enum intr_type_t { 522 NONE = 0, 523 INTx, 524 MSI, 525 MSIX, 526 }; 527 528 #define LPFC_CT_CTX_MAX 64 529 struct unsol_rcv_ct_ctx { 530 uint32_t ctxt_id; 531 uint32_t SID; 532 uint32_t valid; 533 #define UNSOL_INVALID 0 534 #define UNSOL_VALID 1 535 uint16_t oxid; 536 uint16_t rxid; 537 }; 538 539 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/ 540 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */ 541 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */ 542 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */ 543 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */ 544 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */ 545 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */ 546 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */ 547 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G 548 #define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \ 549 (1 << LPFC_USER_LINK_SPEED_16G) | \ 550 (1 << LPFC_USER_LINK_SPEED_10G) | \ 551 (1 << LPFC_USER_LINK_SPEED_8G) | \ 552 (1 << LPFC_USER_LINK_SPEED_4G) | \ 553 (1 << LPFC_USER_LINK_SPEED_2G) | \ 554 (1 << LPFC_USER_LINK_SPEED_1G) | \ 555 (1 << LPFC_USER_LINK_SPEED_AUTO)) 556 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32" 557 558 enum nemb_type { 559 nemb_mse = 1, 560 nemb_hbd 561 }; 562 563 enum mbox_type { 564 mbox_rd = 1, 565 mbox_wr 566 }; 567 568 enum dma_type { 569 dma_mbox = 1, 570 dma_ebuf 571 }; 572 573 enum sta_type { 574 sta_pre_addr = 1, 575 sta_pos_addr 576 }; 577 578 struct lpfc_mbox_ext_buf_ctx { 579 uint32_t state; 580 #define LPFC_BSG_MBOX_IDLE 0 581 #define LPFC_BSG_MBOX_HOST 1 582 #define LPFC_BSG_MBOX_PORT 2 583 #define LPFC_BSG_MBOX_DONE 3 584 #define LPFC_BSG_MBOX_ABTS 4 585 enum nemb_type nembType; 586 enum mbox_type mboxType; 587 uint32_t numBuf; 588 uint32_t mbxTag; 589 uint32_t seqNum; 590 struct lpfc_dmabuf *mbx_dmabuf; 591 struct list_head ext_dmabuf_list; 592 }; 593 594 struct lpfc_hba { 595 /* SCSI interface function jump table entries */ 596 int (*lpfc_new_scsi_buf) 597 (struct lpfc_vport *, int); 598 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf) 599 (struct lpfc_hba *, struct lpfc_nodelist *); 600 int (*lpfc_scsi_prep_dma_buf) 601 (struct lpfc_hba *, struct lpfc_scsi_buf *); 602 void (*lpfc_scsi_unprep_dma_buf) 603 (struct lpfc_hba *, struct lpfc_scsi_buf *); 604 void (*lpfc_release_scsi_buf) 605 (struct lpfc_hba *, struct lpfc_scsi_buf *); 606 void (*lpfc_rampdown_queue_depth) 607 (struct lpfc_hba *); 608 void (*lpfc_scsi_prep_cmnd) 609 (struct lpfc_vport *, struct lpfc_scsi_buf *, 610 struct lpfc_nodelist *); 611 612 /* IOCB interface function jump table entries */ 613 int (*__lpfc_sli_issue_iocb) 614 (struct lpfc_hba *, uint32_t, 615 struct lpfc_iocbq *, uint32_t); 616 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *, 617 struct lpfc_iocbq *); 618 int (*lpfc_hba_down_post)(struct lpfc_hba *phba); 619 IOCB_t * (*lpfc_get_iocb_from_iocbq) 620 (struct lpfc_iocbq *); 621 void (*lpfc_scsi_cmd_iocb_cmpl) 622 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *); 623 624 /* MBOX interface function jump table entries */ 625 int (*lpfc_sli_issue_mbox) 626 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t); 627 628 /* Slow-path IOCB process function jump table entries */ 629 void (*lpfc_sli_handle_slow_ring_event) 630 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring, 631 uint32_t mask); 632 633 /* INIT device interface function jump table entries */ 634 int (*lpfc_sli_hbq_to_firmware) 635 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *); 636 int (*lpfc_sli_brdrestart) 637 (struct lpfc_hba *); 638 int (*lpfc_sli_brdready) 639 (struct lpfc_hba *, uint32_t); 640 void (*lpfc_handle_eratt) 641 (struct lpfc_hba *); 642 void (*lpfc_stop_port) 643 (struct lpfc_hba *); 644 int (*lpfc_hba_init_link) 645 (struct lpfc_hba *, uint32_t); 646 int (*lpfc_hba_down_link) 647 (struct lpfc_hba *, uint32_t); 648 int (*lpfc_selective_reset) 649 (struct lpfc_hba *); 650 651 int (*lpfc_bg_scsi_prep_dma_buf) 652 (struct lpfc_hba *, struct lpfc_scsi_buf *); 653 /* Add new entries here */ 654 655 /* SLI4 specific HBA data structure */ 656 struct lpfc_sli4_hba sli4_hba; 657 658 struct workqueue_struct *wq; 659 660 struct lpfc_sli sli; 661 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */ 662 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */ 663 uint32_t sli3_options; /* Mask of enabled SLI3 options */ 664 #define LPFC_SLI3_HBQ_ENABLED 0x01 665 #define LPFC_SLI3_NPIV_ENABLED 0x02 666 #define LPFC_SLI3_VPORT_TEARDOWN 0x04 667 #define LPFC_SLI3_CRP_ENABLED 0x08 668 #define LPFC_SLI3_BG_ENABLED 0x20 669 #define LPFC_SLI3_DSS_ENABLED 0x40 670 #define LPFC_SLI4_PERFH_ENABLED 0x80 671 #define LPFC_SLI4_PHWQ_ENABLED 0x100 672 uint32_t iocb_cmd_size; 673 uint32_t iocb_rsp_size; 674 675 enum hba_state link_state; 676 uint32_t link_flag; /* link state flags */ 677 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */ 678 /* This flag is set while issuing */ 679 /* INIT_LINK mailbox command */ 680 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 681 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 682 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 683 #define LS_MDS_LOOPBACK 0x16 /* MDS Diagnostics Link Up (Loopback) */ 684 685 uint32_t hba_flag; /* hba generic flags */ 686 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ 687 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */ 688 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */ 689 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/ 690 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */ 691 #define FCP_XRI_ABORT_EVENT 0x20 692 #define ELS_XRI_ABORT_EVENT 0x40 693 #define ASYNC_EVENT 0x80 694 #define LINK_DISABLED 0x100 /* Link disabled by user */ 695 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */ 696 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */ 697 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */ 698 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 699 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 700 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 701 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */ 702 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 703 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 704 #define HBA_FORCED_LINK_SPEED 0x40000 /* 705 * Firmware supports Forced Link Speed 706 * capability 707 */ 708 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */ 709 710 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ 711 struct lpfc_dmabuf slim2p; 712 713 MAILBOX_t *mbox; 714 uint32_t *mbox_ext; 715 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx; 716 uint32_t ha_copy; 717 struct _PCB *pcb; 718 struct _IOCB *IOCBs; 719 720 struct lpfc_dmabuf hbqslimp; 721 722 uint16_t pci_cfg_value; 723 724 uint8_t fc_linkspeed; /* Link speed after last READ_LA */ 725 726 uint32_t fc_eventTag; /* event tag for link attention */ 727 uint32_t link_events; 728 729 /* These fields used to be binfo */ 730 uint32_t fc_pref_DID; /* preferred D_ID */ 731 uint8_t fc_pref_ALPA; /* preferred AL_PA */ 732 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */ 733 uint32_t fc_edtov; /* E_D_TOV timer value */ 734 uint32_t fc_arbtov; /* ARB_TOV timer value */ 735 uint32_t fc_ratov; /* R_A_TOV timer value */ 736 uint32_t fc_rttov; /* R_T_TOV timer value */ 737 uint32_t fc_altov; /* AL_TOV timer value */ 738 uint32_t fc_crtov; /* C_R_TOV timer value */ 739 740 struct serv_parm fc_fabparam; /* fabric service parameters buffer */ 741 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */ 742 743 uint32_t lmt; 744 745 uint32_t fc_topology; /* link topology, from LINK INIT */ 746 uint32_t fc_topology_changed; /* link topology, from LINK INIT */ 747 748 struct lpfc_stats fc_stat; 749 750 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */ 751 uint32_t nport_event_cnt; /* timestamp for nlplist entry */ 752 753 uint8_t wwnn[8]; 754 uint8_t wwpn[8]; 755 uint32_t RandomData[7]; 756 uint8_t fcp_embed_io; 757 uint8_t nvme_support; /* Firmware supports NVME */ 758 uint8_t nvmet_support; /* driver supports NVMET */ 759 #define LPFC_NVMET_MAX_PORTS 32 760 uint8_t mds_diags_support; 761 uint32_t initial_imax; 762 uint8_t bbcredit_support; 763 764 /* HBA Config Parameters */ 765 uint32_t cfg_ack0; 766 uint32_t cfg_enable_npiv; 767 uint32_t cfg_enable_rrq; 768 uint32_t cfg_topology; 769 uint32_t cfg_link_speed; 770 #define LPFC_FCF_FOV 1 /* Fast fcf failover */ 771 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */ 772 uint32_t cfg_fcf_failover_policy; 773 uint32_t cfg_fcp_io_sched; 774 uint32_t cfg_fcp2_no_tgt_reset; 775 uint32_t cfg_cr_delay; 776 uint32_t cfg_cr_count; 777 uint32_t cfg_multi_ring_support; 778 uint32_t cfg_multi_ring_rctl; 779 uint32_t cfg_multi_ring_type; 780 uint32_t cfg_poll; 781 uint32_t cfg_poll_tmo; 782 uint32_t cfg_task_mgmt_tmo; 783 uint32_t cfg_use_msi; 784 uint32_t cfg_auto_imax; 785 uint32_t cfg_fcp_imax; 786 uint32_t cfg_fcp_cpu_map; 787 uint32_t cfg_fcp_io_channel; 788 uint32_t cfg_suppress_rsp; 789 uint32_t cfg_nvme_oas; 790 uint32_t cfg_nvme_io_channel; 791 uint32_t cfg_nvmet_mrq; 792 uint32_t cfg_enable_nvmet; 793 uint32_t cfg_nvme_enable_fb; 794 uint32_t cfg_nvmet_fb_size; 795 uint32_t cfg_total_seg_cnt; 796 uint32_t cfg_sg_seg_cnt; 797 uint32_t cfg_nvme_seg_cnt; 798 uint32_t cfg_sg_dma_buf_size; 799 uint64_t cfg_soft_wwnn; 800 uint64_t cfg_soft_wwpn; 801 uint32_t cfg_hba_queue_depth; 802 uint32_t cfg_enable_hba_reset; 803 uint32_t cfg_enable_hba_heartbeat; 804 uint32_t cfg_fof; 805 uint32_t cfg_EnableXLane; 806 uint8_t cfg_oas_tgt_wwpn[8]; 807 uint8_t cfg_oas_vpt_wwpn[8]; 808 uint32_t cfg_oas_lun_state; 809 #define OAS_LUN_ENABLE 1 810 #define OAS_LUN_DISABLE 0 811 uint32_t cfg_oas_lun_status; 812 #define OAS_LUN_STATUS_EXISTS 0x01 813 uint32_t cfg_oas_flags; 814 #define OAS_FIND_ANY_VPORT 0x01 815 #define OAS_FIND_ANY_TARGET 0x02 816 #define OAS_LUN_VALID 0x04 817 uint32_t cfg_oas_priority; 818 uint32_t cfg_XLanePriority; 819 uint32_t cfg_enable_bg; 820 uint32_t cfg_prot_mask; 821 uint32_t cfg_prot_guard; 822 uint32_t cfg_hostmem_hgp; 823 uint32_t cfg_log_verbose; 824 uint32_t cfg_aer_support; 825 uint32_t cfg_sriov_nr_virtfn; 826 uint32_t cfg_request_firmware_upgrade; 827 uint32_t cfg_iocb_cnt; 828 uint32_t cfg_suppress_link_up; 829 uint32_t cfg_rrq_xri_bitmap_sz; 830 uint32_t cfg_delay_discovery; 831 uint32_t cfg_sli_mode; 832 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */ 833 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */ 834 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */ 835 uint32_t cfg_enable_dss; 836 uint32_t cfg_fdmi_on; 837 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */ 838 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */ 839 uint32_t cfg_enable_SmartSAN; 840 uint32_t cfg_enable_mds_diags; 841 uint32_t cfg_enable_fc4_type; 842 uint32_t cfg_enable_bbcr; /*Enable BB Credit Recovery*/ 843 uint32_t cfg_xri_split; 844 #define LPFC_ENABLE_FCP 1 845 #define LPFC_ENABLE_NVME 2 846 #define LPFC_ENABLE_BOTH 3 847 uint32_t io_channel_irqs; /* number of irqs for io channels */ 848 struct nvmet_fc_target_port *targetport; 849 lpfc_vpd_t vpd; /* vital product data */ 850 851 struct pci_dev *pcidev; 852 struct list_head work_list; 853 uint32_t work_ha; /* Host Attention Bits for WT */ 854 uint32_t work_ha_mask; /* HA Bits owned by WT */ 855 uint32_t work_hs; /* HS stored in case of ERRAT */ 856 uint32_t work_status[2]; /* Extra status from SLIM */ 857 858 wait_queue_head_t work_waitq; 859 struct task_struct *worker_thread; 860 unsigned long data_flags; 861 862 uint32_t hbq_in_use; /* HBQs in use flag */ 863 uint32_t hbq_count; /* Count of configured HBQs */ 864 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */ 865 866 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */ 867 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */ 868 869 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */ 870 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */ 871 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ 872 void __iomem *slim_memmap_p; /* Kernel memory mapped address for 873 PCI BAR0 */ 874 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for 875 PCI BAR2 */ 876 877 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for 878 PCI BAR0 with dual-ULP support */ 879 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for 880 PCI BAR2 with dual-ULP support */ 881 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for 882 PCI BAR4 with dual-ULP support */ 883 #define PCI_64BIT_BAR0 0 884 #define PCI_64BIT_BAR2 2 885 #define PCI_64BIT_BAR4 4 886 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ 887 void __iomem *HAregaddr; /* virtual address for host attn reg */ 888 void __iomem *CAregaddr; /* virtual address for chip attn reg */ 889 void __iomem *HSregaddr; /* virtual address for host status 890 reg */ 891 void __iomem *HCregaddr; /* virtual address for host ctl reg */ 892 893 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ 894 struct lpfc_pgp *port_gp; 895 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */ 896 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */ 897 898 int brd_no; /* FC board number */ 899 char SerialNumber[32]; /* adapter Serial Number */ 900 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ 901 char ModelDesc[256]; /* Model Description */ 902 char ModelName[80]; /* Model Name */ 903 char ProgramType[256]; /* Program Type */ 904 char Port[20]; /* Port No */ 905 uint8_t vpd_flag; /* VPD data flag */ 906 907 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */ 908 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ 909 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ 910 #define VPD_PORT 0x8 /* valid vpd port data */ 911 #define VPD_MASK 0xf /* mask for any vpd data */ 912 913 uint8_t soft_wwn_enable; 914 915 struct timer_list fcp_poll_timer; 916 struct timer_list eratt_poll; 917 uint32_t eratt_poll_interval; 918 919 /* 920 * stat counters 921 */ 922 atomic_t fc4ScsiInputRequests; 923 atomic_t fc4ScsiOutputRequests; 924 atomic_t fc4ScsiControlRequests; 925 atomic_t fc4ScsiIoCmpls; 926 atomic_t fc4NvmeInputRequests; 927 atomic_t fc4NvmeOutputRequests; 928 atomic_t fc4NvmeControlRequests; 929 atomic_t fc4NvmeIoCmpls; 930 atomic_t fc4NvmeLsRequests; 931 atomic_t fc4NvmeLsCmpls; 932 933 uint64_t bg_guard_err_cnt; 934 uint64_t bg_apptag_err_cnt; 935 uint64_t bg_reftag_err_cnt; 936 937 /* fastpath list. */ 938 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */ 939 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */ 940 struct list_head lpfc_scsi_buf_list_get; 941 struct list_head lpfc_scsi_buf_list_put; 942 uint32_t total_scsi_bufs; 943 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */ 944 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */ 945 struct list_head lpfc_nvme_buf_list_get; 946 struct list_head lpfc_nvme_buf_list_put; 947 uint32_t total_nvme_bufs; 948 uint32_t get_nvme_bufs; 949 uint32_t put_nvme_bufs; 950 struct list_head lpfc_iocb_list; 951 uint32_t total_iocbq_bufs; 952 struct list_head active_rrq_list; 953 spinlock_t hbalock; 954 955 /* dma_mem_pools */ 956 struct dma_pool *lpfc_sg_dma_buf_pool; 957 struct dma_pool *lpfc_mbuf_pool; 958 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */ 959 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */ 960 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 961 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 962 struct dma_pool *txrdy_payload_pool; 963 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 964 965 mempool_t *mbox_mem_pool; 966 mempool_t *nlp_mem_pool; 967 mempool_t *rrq_pool; 968 mempool_t *active_rrq_pool; 969 970 struct fc_host_statistics link_stats; 971 enum intr_type_t intr_type; 972 uint32_t intr_mode; 973 #define LPFC_INTR_ERROR 0xFFFFFFFF 974 struct list_head port_list; 975 struct lpfc_vport *pport; /* physical lpfc_vport pointer */ 976 uint16_t max_vpi; /* Maximum virtual nports */ 977 #define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */ 978 uint16_t max_vports; /* 979 * For IOV HBAs max_vpi can change 980 * after a reset. max_vports is max 981 * number of vports present. This can 982 * be greater than max_vpi. 983 */ 984 uint16_t vpi_base; 985 uint16_t vfi_base; 986 unsigned long *vpi_bmask; /* vpi allocation table */ 987 uint16_t *vpi_ids; 988 uint16_t vpi_count; 989 struct list_head lpfc_vpi_blk_list; 990 991 /* Data structure used by fabric iocb scheduler */ 992 struct list_head fabric_iocb_list; 993 atomic_t fabric_iocb_count; 994 struct timer_list fabric_block_timer; 995 unsigned long bit_flags; 996 #define FABRIC_COMANDS_BLOCKED 0 997 atomic_t num_rsrc_err; 998 atomic_t num_cmd_success; 999 unsigned long last_rsrc_error_time; 1000 unsigned long last_ramp_down_time; 1001 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1002 struct dentry *hba_debugfs_root; 1003 atomic_t debugfs_vport_count; 1004 struct dentry *debug_hbqinfo; 1005 struct dentry *debug_dumpHostSlim; 1006 struct dentry *debug_dumpHBASlim; 1007 struct dentry *debug_dumpData; /* BlockGuard BPL */ 1008 struct dentry *debug_dumpDif; /* BlockGuard BPL */ 1009 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1010 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1011 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */ 1012 struct dentry *debug_writeGuard; /* inject write guard_tag errors */ 1013 struct dentry *debug_writeApp; /* inject write app_tag errors */ 1014 struct dentry *debug_writeRef; /* inject write ref_tag errors */ 1015 struct dentry *debug_readGuard; /* inject read guard_tag errors */ 1016 struct dentry *debug_readApp; /* inject read app_tag errors */ 1017 struct dentry *debug_readRef; /* inject read ref_tag errors */ 1018 1019 struct dentry *debug_nvmeio_trc; 1020 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc; 1021 atomic_t nvmeio_trc_cnt; 1022 uint32_t nvmeio_trc_size; 1023 uint32_t nvmeio_trc_output_idx; 1024 1025 /* T10 DIF error injection */ 1026 uint32_t lpfc_injerr_wgrd_cnt; 1027 uint32_t lpfc_injerr_wapp_cnt; 1028 uint32_t lpfc_injerr_wref_cnt; 1029 uint32_t lpfc_injerr_rgrd_cnt; 1030 uint32_t lpfc_injerr_rapp_cnt; 1031 uint32_t lpfc_injerr_rref_cnt; 1032 uint32_t lpfc_injerr_nportid; 1033 struct lpfc_name lpfc_injerr_wwpn; 1034 sector_t lpfc_injerr_lba; 1035 #define LPFC_INJERR_LBA_OFF (sector_t)(-1) 1036 1037 struct dentry *debug_slow_ring_trc; 1038 struct lpfc_debugfs_trc *slow_ring_trc; 1039 atomic_t slow_ring_trc_cnt; 1040 /* iDiag debugfs sub-directory */ 1041 struct dentry *idiag_root; 1042 struct dentry *idiag_pci_cfg; 1043 struct dentry *idiag_bar_acc; 1044 struct dentry *idiag_que_info; 1045 struct dentry *idiag_que_acc; 1046 struct dentry *idiag_drb_acc; 1047 struct dentry *idiag_ctl_acc; 1048 struct dentry *idiag_mbx_acc; 1049 struct dentry *idiag_ext_acc; 1050 uint8_t lpfc_idiag_last_eq; 1051 #endif 1052 uint16_t nvmeio_trc_on; 1053 1054 /* Used for deferred freeing of ELS data buffers */ 1055 struct list_head elsbuf; 1056 int elsbuf_cnt; 1057 int elsbuf_prev_cnt; 1058 1059 uint8_t temp_sensor_support; 1060 /* Fields used for heart beat. */ 1061 unsigned long last_eqdelay_time; 1062 unsigned long last_completion_time; 1063 unsigned long skipped_hb; 1064 struct timer_list hb_tmofunc; 1065 uint8_t hb_outstanding; 1066 struct timer_list rrq_tmr; 1067 enum hba_temp_state over_temp_state; 1068 /* ndlp reference management */ 1069 spinlock_t ndlp_lock; 1070 /* 1071 * Following bit will be set for all buffer tags which are not 1072 * associated with any HBQ. 1073 */ 1074 #define QUE_BUFTAG_BIT (1<<31) 1075 uint32_t buffer_tag_count; 1076 int wait_4_mlo_maint_flg; 1077 wait_queue_head_t wait_4_mlo_m_q; 1078 /* data structure used for latency data collection */ 1079 #define LPFC_NO_BUCKET 0 1080 #define LPFC_LINEAR_BUCKET 1 1081 #define LPFC_POWER2_BUCKET 2 1082 uint8_t bucket_type; 1083 uint32_t bucket_base; 1084 uint32_t bucket_step; 1085 1086 /* Maximum number of events that can be outstanding at any time*/ 1087 #define LPFC_MAX_EVT_COUNT 512 1088 atomic_t fast_event_count; 1089 uint32_t fcoe_eventtag; 1090 uint32_t fcoe_eventtag_at_fcf_scan; 1091 uint32_t fcoe_cvl_eventtag; 1092 uint32_t fcoe_cvl_eventtag_attn; 1093 struct lpfc_fcf fcf; 1094 uint8_t fc_map[3]; 1095 uint8_t valid_vlan; 1096 uint16_t vlan_id; 1097 struct list_head fcf_conn_rec_list; 1098 1099 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */ 1100 struct list_head ct_ev_waiters; 1101 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX]; 1102 uint32_t ctx_idx; 1103 1104 uint8_t menlo_flag; /* menlo generic flags */ 1105 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */ 1106 uint32_t iocb_cnt; 1107 uint32_t iocb_max; 1108 atomic_t sdev_cnt; 1109 uint8_t fips_spec_rev; 1110 uint8_t fips_level; 1111 spinlock_t devicelock; /* lock for luns list */ 1112 mempool_t *device_data_mem_pool; 1113 struct list_head luns; 1114 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080 1115 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040 1116 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020 1117 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010 1118 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008 1119 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004 1120 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002 1121 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001 1122 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000 1123 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000 1124 uint16_t sfp_alarm; 1125 uint16_t sfp_warning; 1126 1127 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 1128 #define LPFC_CHECK_CPU_CNT 32 1129 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT]; 1130 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 1131 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 1132 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT]; 1133 uint16_t cpucheck_on; 1134 #define LPFC_CHECK_OFF 0 1135 #define LPFC_CHECK_NVME_IO 1 1136 #define LPFC_CHECK_NVMET_RCV 2 1137 #define LPFC_CHECK_NVMET_IO 4 1138 uint16_t ktime_on; 1139 uint64_t ktime_data_samples; 1140 uint64_t ktime_status_samples; 1141 uint64_t ktime_last_cmd; 1142 uint64_t ktime_seg1_total; 1143 uint64_t ktime_seg1_min; 1144 uint64_t ktime_seg1_max; 1145 uint64_t ktime_seg2_total; 1146 uint64_t ktime_seg2_min; 1147 uint64_t ktime_seg2_max; 1148 uint64_t ktime_seg3_total; 1149 uint64_t ktime_seg3_min; 1150 uint64_t ktime_seg3_max; 1151 uint64_t ktime_seg4_total; 1152 uint64_t ktime_seg4_min; 1153 uint64_t ktime_seg4_max; 1154 uint64_t ktime_seg5_total; 1155 uint64_t ktime_seg5_min; 1156 uint64_t ktime_seg5_max; 1157 uint64_t ktime_seg6_total; 1158 uint64_t ktime_seg6_min; 1159 uint64_t ktime_seg6_max; 1160 uint64_t ktime_seg7_total; 1161 uint64_t ktime_seg7_min; 1162 uint64_t ktime_seg7_max; 1163 uint64_t ktime_seg8_total; 1164 uint64_t ktime_seg8_min; 1165 uint64_t ktime_seg8_max; 1166 uint64_t ktime_seg9_total; 1167 uint64_t ktime_seg9_min; 1168 uint64_t ktime_seg9_max; 1169 uint64_t ktime_seg10_total; 1170 uint64_t ktime_seg10_min; 1171 uint64_t ktime_seg10_max; 1172 #endif 1173 }; 1174 1175 static inline struct Scsi_Host * 1176 lpfc_shost_from_vport(struct lpfc_vport *vport) 1177 { 1178 return container_of((void *) vport, struct Scsi_Host, hostdata[0]); 1179 } 1180 1181 static inline void 1182 lpfc_set_loopback_flag(struct lpfc_hba *phba) 1183 { 1184 if (phba->cfg_topology == FLAGS_LOCAL_LB) 1185 phba->link_flag |= LS_LOOPBACK_MODE; 1186 else 1187 phba->link_flag &= ~LS_LOOPBACK_MODE; 1188 } 1189 1190 static inline int 1191 lpfc_is_link_up(struct lpfc_hba *phba) 1192 { 1193 return phba->link_state == LPFC_LINK_UP || 1194 phba->link_state == LPFC_CLEAR_LA || 1195 phba->link_state == LPFC_HBA_READY; 1196 } 1197 1198 static inline void 1199 lpfc_worker_wake_up(struct lpfc_hba *phba) 1200 { 1201 /* Set the lpfc data pending flag */ 1202 set_bit(LPFC_DATA_READY, &phba->data_flags); 1203 1204 /* Wake up worker thread */ 1205 wake_up(&phba->work_waitq); 1206 return; 1207 } 1208 1209 static inline int 1210 lpfc_readl(void __iomem *addr, uint32_t *data) 1211 { 1212 uint32_t temp; 1213 temp = readl(addr); 1214 if (temp == 0xffffffff) 1215 return -EIO; 1216 *data = temp; 1217 return 0; 1218 } 1219 1220 static inline int 1221 lpfc_sli_read_hs(struct lpfc_hba *phba) 1222 { 1223 /* 1224 * There was a link/board error. Read the status register to retrieve 1225 * the error event and process it. 1226 */ 1227 phba->sli.slistat.err_attn_event++; 1228 1229 /* Save status info and check for unplug error */ 1230 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) || 1231 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) || 1232 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { 1233 return -EIO; 1234 } 1235 1236 /* Clear chip Host Attention error bit */ 1237 writel(HA_ERATT, phba->HAregaddr); 1238 readl(phba->HAregaddr); /* flush */ 1239 phba->pport->stopped = 1; 1240 1241 return 0; 1242 } 1243 1244 static inline struct lpfc_sli_ring * 1245 lpfc_phba_elsring(struct lpfc_hba *phba) 1246 { 1247 if (phba->sli_rev == LPFC_SLI_REV4) { 1248 if (phba->sli4_hba.els_wq) 1249 return phba->sli4_hba.els_wq->pring; 1250 else 1251 return NULL; 1252 } 1253 return &phba->sli.sli3_ring[LPFC_ELS_RING]; 1254 } 1255