xref: /openbmc/linux/drivers/scsi/hpsa_cmd.h (revision a09d2831)
1 /*
2  *    Disk Array driver for HP Smart Array SAS controllers
3  *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4  *
5  *    This program is free software; you can redistribute it and/or modify
6  *    it under the terms of the GNU General Public License as published by
7  *    the Free Software Foundation; version 2 of the License.
8  *
9  *    This program is distributed in the hope that it will be useful,
10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
13  *
14  *    You should have received a copy of the GNU General Public License
15  *    along with this program; if not, write to the Free Software
16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  *
18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
19  *
20  */
21 #ifndef HPSA_CMD_H
22 #define HPSA_CMD_H
23 
24 /* general boundary defintions */
25 #define SENSEINFOBYTES          32 /* may vary between hbas */
26 #define MAXSGENTRIES            31
27 #define MAXREPLYQS              256
28 
29 /* Command Status value */
30 #define CMD_SUCCESS             0x0000
31 #define CMD_TARGET_STATUS       0x0001
32 #define CMD_DATA_UNDERRUN       0x0002
33 #define CMD_DATA_OVERRUN        0x0003
34 #define CMD_INVALID             0x0004
35 #define CMD_PROTOCOL_ERR        0x0005
36 #define CMD_HARDWARE_ERR        0x0006
37 #define CMD_CONNECTION_LOST     0x0007
38 #define CMD_ABORTED             0x0008
39 #define CMD_ABORT_FAILED        0x0009
40 #define CMD_UNSOLICITED_ABORT   0x000A
41 #define CMD_TIMEOUT             0x000B
42 #define CMD_UNABORTABLE		0x000C
43 
44 /* Unit Attentions ASC's as defined for the MSA2012sa */
45 #define POWER_OR_RESET			0x29
46 #define STATE_CHANGED			0x2a
47 #define UNIT_ATTENTION_CLEARED		0x2f
48 #define LUN_FAILED			0x3e
49 #define REPORT_LUNS_CHANGED		0x3f
50 
51 /* Unit Attentions ASCQ's as defined for the MSA2012sa */
52 
53 	/* These ASCQ's defined for ASC = POWER_OR_RESET */
54 #define POWER_ON_RESET			0x00
55 #define POWER_ON_REBOOT			0x01
56 #define SCSI_BUS_RESET			0x02
57 #define MSA_TARGET_RESET		0x03
58 #define CONTROLLER_FAILOVER		0x04
59 #define TRANSCEIVER_SE			0x05
60 #define TRANSCEIVER_LVD			0x06
61 
62 	/* These ASCQ's defined for ASC = STATE_CHANGED */
63 #define RESERVATION_PREEMPTED		0x03
64 #define ASYM_ACCESS_CHANGED		0x06
65 #define LUN_CAPACITY_CHANGED		0x09
66 
67 /* transfer direction */
68 #define XFER_NONE               0x00
69 #define XFER_WRITE              0x01
70 #define XFER_READ               0x02
71 #define XFER_RSVD               0x03
72 
73 /* task attribute */
74 #define ATTR_UNTAGGED           0x00
75 #define ATTR_SIMPLE             0x04
76 #define ATTR_HEADOFQUEUE        0x05
77 #define ATTR_ORDERED            0x06
78 #define ATTR_ACA                0x07
79 
80 /* cdb type */
81 #define TYPE_CMD				0x00
82 #define TYPE_MSG				0x01
83 
84 /* config space register offsets */
85 #define CFG_VENDORID            0x00
86 #define CFG_DEVICEID            0x02
87 #define CFG_I2OBAR              0x10
88 #define CFG_MEM1BAR             0x14
89 
90 /* i2o space register offsets */
91 #define I2O_IBDB_SET            0x20
92 #define I2O_IBDB_CLEAR          0x70
93 #define I2O_INT_STATUS          0x30
94 #define I2O_INT_MASK            0x34
95 #define I2O_IBPOST_Q            0x40
96 #define I2O_OBPOST_Q            0x44
97 #define I2O_DMA1_CFG		0x214
98 
99 /* Configuration Table */
100 #define CFGTBL_ChangeReq        0x00000001l
101 #define CFGTBL_AccCmds          0x00000001l
102 
103 #define CFGTBL_Trans_Simple     0x00000002l
104 
105 #define CFGTBL_BusType_Ultra2   0x00000001l
106 #define CFGTBL_BusType_Ultra3   0x00000002l
107 #define CFGTBL_BusType_Fibre1G  0x00000100l
108 #define CFGTBL_BusType_Fibre2G  0x00000200l
109 struct vals32 {
110 	__u32   lower;
111 	__u32   upper;
112 };
113 
114 union u64bit {
115 	struct vals32 val32;
116 	__u64 val;
117 };
118 
119 /* FIXME this is a per controller value (barf!) */
120 #define HPSA_MAX_TARGETS_PER_CTLR 16
121 #define HPSA_MAX_LUN 256
122 #define HPSA_MAX_PHYS_LUN 1024
123 
124 /* SCSI-3 Commands */
125 #pragma pack(1)
126 
127 #define HPSA_INQUIRY 0x12
128 struct InquiryData {
129 	__u8 data_byte[36];
130 };
131 
132 #define HPSA_REPORT_LOG 0xc2    /* Report Logical LUNs */
133 #define HPSA_REPORT_PHYS 0xc3   /* Report Physical LUNs */
134 struct ReportLUNdata {
135 	__u8 LUNListLength[4];
136 	__u32 reserved;
137 	__u8 LUN[HPSA_MAX_LUN][8];
138 };
139 
140 struct ReportExtendedLUNdata {
141 	__u8 LUNListLength[4];
142 	__u8 extended_response_flag;
143 	__u8 reserved[3];
144 	__u8 LUN[HPSA_MAX_LUN][24];
145 };
146 
147 struct SenseSubsystem_info {
148 	__u8 reserved[36];
149 	__u8 portname[8];
150 	__u8 reserved1[1108];
151 };
152 
153 #define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
154 struct ReadCapdata {
155 	__u8 total_size[4];	/* Total size in blocks */
156 	__u8 block_size[4];	/* Size of blocks in bytes */
157 };
158 
159 #if 0
160 /* 12 byte commands not implemented in firmware yet. */
161 #define HPSA_READ 	0xa8
162 #define HPSA_WRITE	0xaa
163 #endif
164 
165 #define HPSA_READ   0x28    /* Read(10) */
166 #define HPSA_WRITE  0x2a    /* Write(10) */
167 
168 /* BMIC commands */
169 #define BMIC_READ 0x26
170 #define BMIC_WRITE 0x27
171 #define BMIC_CACHE_FLUSH 0xc2
172 #define HPSA_CACHE_FLUSH 0x01	/* C2 was already being used by HPSA */
173 
174 /* Command List Structure */
175 union SCSI3Addr {
176 	struct {
177 		__u8 Dev;
178 		__u8 Bus:6;
179 		__u8 Mode:2;        /* b00 */
180 	} PeripDev;
181 	struct {
182 		__u8 DevLSB;
183 		__u8 DevMSB:6;
184 		__u8 Mode:2;        /* b01 */
185 	} LogDev;
186 	struct {
187 		__u8 Dev:5;
188 		__u8 Bus:3;
189 		__u8 Targ:6;
190 		__u8 Mode:2;        /* b10 */
191 	} LogUnit;
192 };
193 
194 struct PhysDevAddr {
195 	__u32             TargetId:24;
196 	__u32             Bus:6;
197 	__u32             Mode:2;
198 	/* 2 level target device addr */
199 	union SCSI3Addr  Target[2];
200 };
201 
202 struct LogDevAddr {
203 	__u32            VolId:30;
204 	__u32            Mode:2;
205 	__u8             reserved[4];
206 };
207 
208 union LUNAddr {
209 	__u8               LunAddrBytes[8];
210 	union SCSI3Addr    SCSI3Lun[4];
211 	struct PhysDevAddr PhysDev;
212 	struct LogDevAddr  LogDev;
213 };
214 
215 struct CommandListHeader {
216 	__u8              ReplyQueue;
217 	__u8              SGList;
218 	__u16             SGTotal;
219 	struct vals32     Tag;
220 	union LUNAddr     LUN;
221 };
222 
223 struct RequestBlock {
224 	__u8   CDBLen;
225 	struct {
226 		__u8 Type:3;
227 		__u8 Attribute:3;
228 		__u8 Direction:2;
229 	} Type;
230 	__u16  Timeout;
231 	__u8   CDB[16];
232 };
233 
234 struct ErrDescriptor {
235 	struct vals32 Addr;
236 	__u32  Len;
237 };
238 
239 struct SGDescriptor {
240 	struct vals32 Addr;
241 	__u32  Len;
242 	__u32  Ext;
243 };
244 
245 union MoreErrInfo {
246 	struct {
247 		__u8  Reserved[3];
248 		__u8  Type;
249 		__u32 ErrorInfo;
250 	} Common_Info;
251 	struct {
252 		__u8  Reserved[2];
253 		__u8  offense_size; /* size of offending entry */
254 		__u8  offense_num;  /* byte # of offense 0-base */
255 		__u32 offense_value;
256 	} Invalid_Cmd;
257 };
258 struct ErrorInfo {
259 	__u8               ScsiStatus;
260 	__u8               SenseLen;
261 	__u16              CommandStatus;
262 	__u32              ResidualCnt;
263 	union MoreErrInfo  MoreErrInfo;
264 	__u8               SenseInfo[SENSEINFOBYTES];
265 };
266 /* Command types */
267 #define CMD_IOCTL_PEND  0x01
268 #define CMD_SCSI	0x03
269 
270 struct ctlr_info; /* defined in hpsa.h */
271 /* The size of this structure needs to be divisible by 8
272  * od on all architectures, because the controller uses 2
273  * lower bits of the address, and the driver uses 1 lower
274  * bit (3 bits total.)
275  */
276 struct CommandList {
277 	struct CommandListHeader Header;
278 	struct RequestBlock      Request;
279 	struct ErrDescriptor     ErrDesc;
280 	struct SGDescriptor      SG[MAXSGENTRIES];
281 	/* information associated with the command */
282 	__u32			   busaddr; /* physical addr of this record */
283 	struct ErrorInfo *err_info; /* pointer to the allocated mem */
284 	struct ctlr_info	   *h;
285 	int			   cmd_type;
286 	long			   cmdindex;
287 	struct hlist_node list;
288 	struct CommandList *prev;
289 	struct CommandList *next;
290 	struct request *rq;
291 	struct completion *waiting;
292 	int	 retry_count;
293 	void   *scsi_cmd;
294 };
295 
296 /* Configuration Table Structure */
297 struct HostWrite {
298 	__u32 TransportRequest;
299 	__u32 Reserved;
300 	__u32 CoalIntDelay;
301 	__u32 CoalIntCount;
302 };
303 
304 struct CfgTable {
305 	__u8             Signature[4];
306 	__u32            SpecValence;
307 	__u32            TransportSupport;
308 	__u32            TransportActive;
309 	struct HostWrite HostWrite;
310 	__u32            CmdsOutMax;
311 	__u32            BusTypes;
312 	__u32            Reserved;
313 	__u8             ServerName[16];
314 	__u32            HeartBeat;
315 	__u32            SCSI_Prefetch;
316 };
317 
318 struct hpsa_pci_info {
319 	unsigned char	bus;
320 	unsigned char	dev_fn;
321 	unsigned short	domain;
322 	__u32		board_id;
323 };
324 
325 #pragma pack()
326 #endif /* HPSA_CMD_H */
327