1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.16-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149 {0,} 150 }; 151 152 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153 154 /* board_id = Subsystem Device ID & Vendor ID 155 * product = Marketing Name for the board 156 * access = Address of the struct of function pointers 157 */ 158 static struct board_type products[] = { 159 {0x3241103C, "Smart Array P212", &SA5_access}, 160 {0x3243103C, "Smart Array P410", &SA5_access}, 161 {0x3245103C, "Smart Array P410i", &SA5_access}, 162 {0x3247103C, "Smart Array P411", &SA5_access}, 163 {0x3249103C, "Smart Array P812", &SA5_access}, 164 {0x324A103C, "Smart Array P712m", &SA5_access}, 165 {0x324B103C, "Smart Array P711m", &SA5_access}, 166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167 {0x3350103C, "Smart Array P222", &SA5_access}, 168 {0x3351103C, "Smart Array P420", &SA5_access}, 169 {0x3352103C, "Smart Array P421", &SA5_access}, 170 {0x3353103C, "Smart Array P822", &SA5_access}, 171 {0x3354103C, "Smart Array P420i", &SA5_access}, 172 {0x3355103C, "Smart Array P220i", &SA5_access}, 173 {0x3356103C, "Smart Array P721m", &SA5_access}, 174 {0x1921103C, "Smart Array P830i", &SA5_access}, 175 {0x1922103C, "Smart Array P430", &SA5_access}, 176 {0x1923103C, "Smart Array P431", &SA5_access}, 177 {0x1924103C, "Smart Array P830", &SA5_access}, 178 {0x1926103C, "Smart Array P731m", &SA5_access}, 179 {0x1928103C, "Smart Array P230i", &SA5_access}, 180 {0x1929103C, "Smart Array P530", &SA5_access}, 181 {0x21BD103C, "Smart Array P244br", &SA5_access}, 182 {0x21BE103C, "Smart Array P741m", &SA5_access}, 183 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 184 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 186 {0x21C2103C, "Smart Array P440", &SA5_access}, 187 {0x21C3103C, "Smart Array P441", &SA5_access}, 188 {0x21C4103C, "Smart Array", &SA5_access}, 189 {0x21C5103C, "Smart Array P841", &SA5_access}, 190 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 191 {0x21C7103C, "Smart HBA H240", &SA5_access}, 192 {0x21C8103C, "Smart HBA H241", &SA5_access}, 193 {0x21C9103C, "Smart Array", &SA5_access}, 194 {0x21CA103C, "Smart Array P246br", &SA5_access}, 195 {0x21CB103C, "Smart Array P840", &SA5_access}, 196 {0x21CC103C, "Smart Array", &SA5_access}, 197 {0x21CD103C, "Smart Array", &SA5_access}, 198 {0x21CE103C, "Smart HBA", &SA5_access}, 199 {0x05809005, "SmartHBA-SA", &SA5_access}, 200 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211 }; 212 213 static struct scsi_transport_template *hpsa_sas_transport_template; 214 static int hpsa_add_sas_host(struct ctlr_info *h); 215 static void hpsa_delete_sas_host(struct ctlr_info *h); 216 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217 struct hpsa_scsi_dev_t *device); 218 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219 static struct hpsa_scsi_dev_t 220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221 struct sas_rphy *rphy); 222 223 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224 static const struct scsi_cmnd hpsa_cmd_busy; 225 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226 static const struct scsi_cmnd hpsa_cmd_idle; 227 static int number_of_controllers; 228 229 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 230 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 231 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232 233 #ifdef CONFIG_COMPAT 234 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 235 void __user *arg); 236 #endif 237 238 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239 static struct CommandList *cmd_alloc(struct ctlr_info *h); 240 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 241 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 242 struct scsi_cmnd *scmd); 243 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245 int cmd_type); 246 static void hpsa_free_cmd_pool(struct ctlr_info *h); 247 #define VPD_PAGE (1 << 8) 248 #define HPSA_SIMPLE_ERROR_BITS 0x03 249 250 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251 static void hpsa_scan_start(struct Scsi_Host *); 252 static int hpsa_scan_finished(struct Scsi_Host *sh, 253 unsigned long elapsed_time); 254 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255 256 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 257 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258 static int hpsa_slave_alloc(struct scsi_device *sdev); 259 static int hpsa_slave_configure(struct scsi_device *sdev); 260 static void hpsa_slave_destroy(struct scsi_device *sdev); 261 262 static void hpsa_update_scsi_devices(struct ctlr_info *h); 263 static int check_for_unit_attention(struct ctlr_info *h, 264 struct CommandList *c); 265 static void check_ioctl_unit_attention(struct ctlr_info *h, 266 struct CommandList *c); 267 /* performant mode helper functions */ 268 static void calc_bucket_map(int *bucket, int num_buckets, 269 int nsgs, int min_blocks, u32 *bucket_map); 270 static void hpsa_free_performant_mode(struct ctlr_info *h); 271 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272 static inline u32 next_command(struct ctlr_info *h, u8 q); 273 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 274 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 275 u64 *cfg_offset); 276 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 277 unsigned long *memory_bar); 278 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279 static int wait_for_device_to_become_ready(struct ctlr_info *h, 280 unsigned char lunaddr[], 281 int reply_queue); 282 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 283 int wait_for_ready); 284 static inline void finish_cmd(struct CommandList *c); 285 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286 #define BOARD_NOT_READY 0 287 #define BOARD_READY 1 288 static void hpsa_drain_accel_commands(struct ctlr_info *h); 289 static void hpsa_flush_cache(struct ctlr_info *h); 290 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 292 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293 static void hpsa_command_resubmit_worker(struct work_struct *work); 294 static u32 lockup_detected(struct ctlr_info *h); 295 static int detect_controller_lockup(struct ctlr_info *h); 296 static void hpsa_disable_rld_caching(struct ctlr_info *h); 297 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298 struct ReportExtendedLUNdata *buf, int bufsize); 299 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 300 unsigned char scsi3addr[], u8 page); 301 static int hpsa_luns_changed(struct ctlr_info *h); 302 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303 struct hpsa_scsi_dev_t *dev, 304 unsigned char *scsi3addr); 305 306 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307 { 308 unsigned long *priv = shost_priv(sdev->host); 309 return (struct ctlr_info *) *priv; 310 } 311 312 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313 { 314 unsigned long *priv = shost_priv(sh); 315 return (struct ctlr_info *) *priv; 316 } 317 318 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319 { 320 return c->scsi_cmd == SCSI_CMD_IDLE; 321 } 322 323 static inline bool hpsa_is_pending_event(struct CommandList *c) 324 { 325 return c->abort_pending || c->reset_pending; 326 } 327 328 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 329 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 330 u8 *sense_key, u8 *asc, u8 *ascq) 331 { 332 struct scsi_sense_hdr sshdr; 333 bool rc; 334 335 *sense_key = -1; 336 *asc = -1; 337 *ascq = -1; 338 339 if (sense_data_len < 1) 340 return; 341 342 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 343 if (rc) { 344 *sense_key = sshdr.sense_key; 345 *asc = sshdr.asc; 346 *ascq = sshdr.ascq; 347 } 348 } 349 350 static int check_for_unit_attention(struct ctlr_info *h, 351 struct CommandList *c) 352 { 353 u8 sense_key, asc, ascq; 354 int sense_len; 355 356 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 357 sense_len = sizeof(c->err_info->SenseInfo); 358 else 359 sense_len = c->err_info->SenseLen; 360 361 decode_sense_data(c->err_info->SenseInfo, sense_len, 362 &sense_key, &asc, &ascq); 363 if (sense_key != UNIT_ATTENTION || asc == 0xff) 364 return 0; 365 366 switch (asc) { 367 case STATE_CHANGED: 368 dev_warn(&h->pdev->dev, 369 "%s: a state change detected, command retried\n", 370 h->devname); 371 break; 372 case LUN_FAILED: 373 dev_warn(&h->pdev->dev, 374 "%s: LUN failure detected\n", h->devname); 375 break; 376 case REPORT_LUNS_CHANGED: 377 dev_warn(&h->pdev->dev, 378 "%s: report LUN data changed\n", h->devname); 379 /* 380 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 381 * target (array) devices. 382 */ 383 break; 384 case POWER_OR_RESET: 385 dev_warn(&h->pdev->dev, 386 "%s: a power on or device reset detected\n", 387 h->devname); 388 break; 389 case UNIT_ATTENTION_CLEARED: 390 dev_warn(&h->pdev->dev, 391 "%s: unit attention cleared by another initiator\n", 392 h->devname); 393 break; 394 default: 395 dev_warn(&h->pdev->dev, 396 "%s: unknown unit attention detected\n", 397 h->devname); 398 break; 399 } 400 return 1; 401 } 402 403 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404 { 405 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408 return 0; 409 dev_warn(&h->pdev->dev, HPSA "device busy"); 410 return 1; 411 } 412 413 static u32 lockup_detected(struct ctlr_info *h); 414 static ssize_t host_show_lockup_detected(struct device *dev, 415 struct device_attribute *attr, char *buf) 416 { 417 int ld; 418 struct ctlr_info *h; 419 struct Scsi_Host *shost = class_to_shost(dev); 420 421 h = shost_to_hba(shost); 422 ld = lockup_detected(h); 423 424 return sprintf(buf, "ld=%d\n", ld); 425 } 426 427 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428 struct device_attribute *attr, 429 const char *buf, size_t count) 430 { 431 int status, len; 432 struct ctlr_info *h; 433 struct Scsi_Host *shost = class_to_shost(dev); 434 char tmpbuf[10]; 435 436 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437 return -EACCES; 438 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439 strncpy(tmpbuf, buf, len); 440 tmpbuf[len] = '\0'; 441 if (sscanf(tmpbuf, "%d", &status) != 1) 442 return -EINVAL; 443 h = shost_to_hba(shost); 444 h->acciopath_status = !!status; 445 dev_warn(&h->pdev->dev, 446 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447 h->acciopath_status ? "enabled" : "disabled"); 448 return count; 449 } 450 451 static ssize_t host_store_raid_offload_debug(struct device *dev, 452 struct device_attribute *attr, 453 const char *buf, size_t count) 454 { 455 int debug_level, len; 456 struct ctlr_info *h; 457 struct Scsi_Host *shost = class_to_shost(dev); 458 char tmpbuf[10]; 459 460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 461 return -EACCES; 462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 463 strncpy(tmpbuf, buf, len); 464 tmpbuf[len] = '\0'; 465 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 466 return -EINVAL; 467 if (debug_level < 0) 468 debug_level = 0; 469 h = shost_to_hba(shost); 470 h->raid_offload_debug = debug_level; 471 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 472 h->raid_offload_debug); 473 return count; 474 } 475 476 static ssize_t host_store_rescan(struct device *dev, 477 struct device_attribute *attr, 478 const char *buf, size_t count) 479 { 480 struct ctlr_info *h; 481 struct Scsi_Host *shost = class_to_shost(dev); 482 h = shost_to_hba(shost); 483 hpsa_scan_start(h->scsi_host); 484 return count; 485 } 486 487 static ssize_t host_show_firmware_revision(struct device *dev, 488 struct device_attribute *attr, char *buf) 489 { 490 struct ctlr_info *h; 491 struct Scsi_Host *shost = class_to_shost(dev); 492 unsigned char *fwrev; 493 494 h = shost_to_hba(shost); 495 if (!h->hba_inquiry_data) 496 return 0; 497 fwrev = &h->hba_inquiry_data[32]; 498 return snprintf(buf, 20, "%c%c%c%c\n", 499 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500 } 501 502 static ssize_t host_show_commands_outstanding(struct device *dev, 503 struct device_attribute *attr, char *buf) 504 { 505 struct Scsi_Host *shost = class_to_shost(dev); 506 struct ctlr_info *h = shost_to_hba(shost); 507 508 return snprintf(buf, 20, "%d\n", 509 atomic_read(&h->commands_outstanding)); 510 } 511 512 static ssize_t host_show_transport_mode(struct device *dev, 513 struct device_attribute *attr, char *buf) 514 { 515 struct ctlr_info *h; 516 struct Scsi_Host *shost = class_to_shost(dev); 517 518 h = shost_to_hba(shost); 519 return snprintf(buf, 20, "%s\n", 520 h->transMethod & CFGTBL_Trans_Performant ? 521 "performant" : "simple"); 522 } 523 524 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525 struct device_attribute *attr, char *buf) 526 { 527 struct ctlr_info *h; 528 struct Scsi_Host *shost = class_to_shost(dev); 529 530 h = shost_to_hba(shost); 531 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532 (h->acciopath_status == 1) ? "enabled" : "disabled"); 533 } 534 535 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536 static u32 unresettable_controller[] = { 537 0x324a103C, /* Smart Array P712m */ 538 0x324b103C, /* Smart Array P711m */ 539 0x3223103C, /* Smart Array P800 */ 540 0x3234103C, /* Smart Array P400 */ 541 0x3235103C, /* Smart Array P400i */ 542 0x3211103C, /* Smart Array E200i */ 543 0x3212103C, /* Smart Array E200 */ 544 0x3213103C, /* Smart Array E200i */ 545 0x3214103C, /* Smart Array E200i */ 546 0x3215103C, /* Smart Array E200i */ 547 0x3237103C, /* Smart Array E500 */ 548 0x323D103C, /* Smart Array P700m */ 549 0x40800E11, /* Smart Array 5i */ 550 0x409C0E11, /* Smart Array 6400 */ 551 0x409D0E11, /* Smart Array 6400 EM */ 552 0x40700E11, /* Smart Array 5300 */ 553 0x40820E11, /* Smart Array 532 */ 554 0x40830E11, /* Smart Array 5312 */ 555 0x409A0E11, /* Smart Array 641 */ 556 0x409B0E11, /* Smart Array 642 */ 557 0x40910E11, /* Smart Array 6i */ 558 }; 559 560 /* List of controllers which cannot even be soft reset */ 561 static u32 soft_unresettable_controller[] = { 562 0x40800E11, /* Smart Array 5i */ 563 0x40700E11, /* Smart Array 5300 */ 564 0x40820E11, /* Smart Array 532 */ 565 0x40830E11, /* Smart Array 5312 */ 566 0x409A0E11, /* Smart Array 641 */ 567 0x409B0E11, /* Smart Array 642 */ 568 0x40910E11, /* Smart Array 6i */ 569 /* Exclude 640x boards. These are two pci devices in one slot 570 * which share a battery backed cache module. One controls the 571 * cache, the other accesses the cache through the one that controls 572 * it. If we reset the one controlling the cache, the other will 573 * likely not be happy. Just forbid resetting this conjoined mess. 574 * The 640x isn't really supported by hpsa anyway. 575 */ 576 0x409C0E11, /* Smart Array 6400 */ 577 0x409D0E11, /* Smart Array 6400 EM */ 578 }; 579 580 static u32 needs_abort_tags_swizzled[] = { 581 0x323D103C, /* Smart Array P700m */ 582 0x324a103C, /* Smart Array P712m */ 583 0x324b103C, /* SmartArray P711m */ 584 }; 585 586 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587 { 588 int i; 589 590 for (i = 0; i < nelems; i++) 591 if (a[i] == board_id) 592 return 1; 593 return 0; 594 } 595 596 static int ctlr_is_hard_resettable(u32 board_id) 597 { 598 return !board_id_in_array(unresettable_controller, 599 ARRAY_SIZE(unresettable_controller), board_id); 600 } 601 602 static int ctlr_is_soft_resettable(u32 board_id) 603 { 604 return !board_id_in_array(soft_unresettable_controller, 605 ARRAY_SIZE(soft_unresettable_controller), board_id); 606 } 607 608 static int ctlr_is_resettable(u32 board_id) 609 { 610 return ctlr_is_hard_resettable(board_id) || 611 ctlr_is_soft_resettable(board_id); 612 } 613 614 static int ctlr_needs_abort_tags_swizzled(u32 board_id) 615 { 616 return board_id_in_array(needs_abort_tags_swizzled, 617 ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 618 } 619 620 static ssize_t host_show_resettable(struct device *dev, 621 struct device_attribute *attr, char *buf) 622 { 623 struct ctlr_info *h; 624 struct Scsi_Host *shost = class_to_shost(dev); 625 626 h = shost_to_hba(shost); 627 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628 } 629 630 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631 { 632 return (scsi3addr[3] & 0xC0) == 0x40; 633 } 634 635 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 636 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637 }; 638 #define HPSA_RAID_0 0 639 #define HPSA_RAID_4 1 640 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 641 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 642 #define HPSA_RAID_51 4 643 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 644 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 645 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 646 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647 648 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649 { 650 return !device->physical_device; 651 } 652 653 static ssize_t raid_level_show(struct device *dev, 654 struct device_attribute *attr, char *buf) 655 { 656 ssize_t l = 0; 657 unsigned char rlevel; 658 struct ctlr_info *h; 659 struct scsi_device *sdev; 660 struct hpsa_scsi_dev_t *hdev; 661 unsigned long flags; 662 663 sdev = to_scsi_device(dev); 664 h = sdev_to_hba(sdev); 665 spin_lock_irqsave(&h->lock, flags); 666 hdev = sdev->hostdata; 667 if (!hdev) { 668 spin_unlock_irqrestore(&h->lock, flags); 669 return -ENODEV; 670 } 671 672 /* Is this even a logical drive? */ 673 if (!is_logical_device(hdev)) { 674 spin_unlock_irqrestore(&h->lock, flags); 675 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676 return l; 677 } 678 679 rlevel = hdev->raid_level; 680 spin_unlock_irqrestore(&h->lock, flags); 681 if (rlevel > RAID_UNKNOWN) 682 rlevel = RAID_UNKNOWN; 683 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684 return l; 685 } 686 687 static ssize_t lunid_show(struct device *dev, 688 struct device_attribute *attr, char *buf) 689 { 690 struct ctlr_info *h; 691 struct scsi_device *sdev; 692 struct hpsa_scsi_dev_t *hdev; 693 unsigned long flags; 694 unsigned char lunid[8]; 695 696 sdev = to_scsi_device(dev); 697 h = sdev_to_hba(sdev); 698 spin_lock_irqsave(&h->lock, flags); 699 hdev = sdev->hostdata; 700 if (!hdev) { 701 spin_unlock_irqrestore(&h->lock, flags); 702 return -ENODEV; 703 } 704 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705 spin_unlock_irqrestore(&h->lock, flags); 706 return snprintf(buf, 20, "0x%8phN\n", lunid); 707 } 708 709 static ssize_t unique_id_show(struct device *dev, 710 struct device_attribute *attr, char *buf) 711 { 712 struct ctlr_info *h; 713 struct scsi_device *sdev; 714 struct hpsa_scsi_dev_t *hdev; 715 unsigned long flags; 716 unsigned char sn[16]; 717 718 sdev = to_scsi_device(dev); 719 h = sdev_to_hba(sdev); 720 spin_lock_irqsave(&h->lock, flags); 721 hdev = sdev->hostdata; 722 if (!hdev) { 723 spin_unlock_irqrestore(&h->lock, flags); 724 return -ENODEV; 725 } 726 memcpy(sn, hdev->device_id, sizeof(sn)); 727 spin_unlock_irqrestore(&h->lock, flags); 728 return snprintf(buf, 16 * 2 + 2, 729 "%02X%02X%02X%02X%02X%02X%02X%02X" 730 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 731 sn[0], sn[1], sn[2], sn[3], 732 sn[4], sn[5], sn[6], sn[7], 733 sn[8], sn[9], sn[10], sn[11], 734 sn[12], sn[13], sn[14], sn[15]); 735 } 736 737 static ssize_t sas_address_show(struct device *dev, 738 struct device_attribute *attr, char *buf) 739 { 740 struct ctlr_info *h; 741 struct scsi_device *sdev; 742 struct hpsa_scsi_dev_t *hdev; 743 unsigned long flags; 744 u64 sas_address; 745 746 sdev = to_scsi_device(dev); 747 h = sdev_to_hba(sdev); 748 spin_lock_irqsave(&h->lock, flags); 749 hdev = sdev->hostdata; 750 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 751 spin_unlock_irqrestore(&h->lock, flags); 752 return -ENODEV; 753 } 754 sas_address = hdev->sas_address; 755 spin_unlock_irqrestore(&h->lock, flags); 756 757 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 758 } 759 760 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 761 struct device_attribute *attr, char *buf) 762 { 763 struct ctlr_info *h; 764 struct scsi_device *sdev; 765 struct hpsa_scsi_dev_t *hdev; 766 unsigned long flags; 767 int offload_enabled; 768 769 sdev = to_scsi_device(dev); 770 h = sdev_to_hba(sdev); 771 spin_lock_irqsave(&h->lock, flags); 772 hdev = sdev->hostdata; 773 if (!hdev) { 774 spin_unlock_irqrestore(&h->lock, flags); 775 return -ENODEV; 776 } 777 offload_enabled = hdev->offload_enabled; 778 spin_unlock_irqrestore(&h->lock, flags); 779 return snprintf(buf, 20, "%d\n", offload_enabled); 780 } 781 782 #define MAX_PATHS 8 783 static ssize_t path_info_show(struct device *dev, 784 struct device_attribute *attr, char *buf) 785 { 786 struct ctlr_info *h; 787 struct scsi_device *sdev; 788 struct hpsa_scsi_dev_t *hdev; 789 unsigned long flags; 790 int i; 791 int output_len = 0; 792 u8 box; 793 u8 bay; 794 u8 path_map_index = 0; 795 char *active; 796 unsigned char phys_connector[2]; 797 798 sdev = to_scsi_device(dev); 799 h = sdev_to_hba(sdev); 800 spin_lock_irqsave(&h->devlock, flags); 801 hdev = sdev->hostdata; 802 if (!hdev) { 803 spin_unlock_irqrestore(&h->devlock, flags); 804 return -ENODEV; 805 } 806 807 bay = hdev->bay; 808 for (i = 0; i < MAX_PATHS; i++) { 809 path_map_index = 1<<i; 810 if (i == hdev->active_path_index) 811 active = "Active"; 812 else if (hdev->path_map & path_map_index) 813 active = "Inactive"; 814 else 815 continue; 816 817 output_len += scnprintf(buf + output_len, 818 PAGE_SIZE - output_len, 819 "[%d:%d:%d:%d] %20.20s ", 820 h->scsi_host->host_no, 821 hdev->bus, hdev->target, hdev->lun, 822 scsi_device_type(hdev->devtype)); 823 824 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 825 output_len += scnprintf(buf + output_len, 826 PAGE_SIZE - output_len, 827 "%s\n", active); 828 continue; 829 } 830 831 box = hdev->box[i]; 832 memcpy(&phys_connector, &hdev->phys_connector[i], 833 sizeof(phys_connector)); 834 if (phys_connector[0] < '0') 835 phys_connector[0] = '0'; 836 if (phys_connector[1] < '0') 837 phys_connector[1] = '0'; 838 output_len += scnprintf(buf + output_len, 839 PAGE_SIZE - output_len, 840 "PORT: %.2s ", 841 phys_connector); 842 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 843 hdev->expose_device) { 844 if (box == 0 || box == 0xFF) { 845 output_len += scnprintf(buf + output_len, 846 PAGE_SIZE - output_len, 847 "BAY: %hhu %s\n", 848 bay, active); 849 } else { 850 output_len += scnprintf(buf + output_len, 851 PAGE_SIZE - output_len, 852 "BOX: %hhu BAY: %hhu %s\n", 853 box, bay, active); 854 } 855 } else if (box != 0 && box != 0xFF) { 856 output_len += scnprintf(buf + output_len, 857 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 858 box, active); 859 } else 860 output_len += scnprintf(buf + output_len, 861 PAGE_SIZE - output_len, "%s\n", active); 862 } 863 864 spin_unlock_irqrestore(&h->devlock, flags); 865 return output_len; 866 } 867 868 static ssize_t host_show_ctlr_num(struct device *dev, 869 struct device_attribute *attr, char *buf) 870 { 871 struct ctlr_info *h; 872 struct Scsi_Host *shost = class_to_shost(dev); 873 874 h = shost_to_hba(shost); 875 return snprintf(buf, 20, "%d\n", h->ctlr); 876 } 877 878 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 879 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 880 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 881 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 882 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 883 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 884 host_show_hp_ssd_smart_path_enabled, NULL); 885 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 886 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 887 host_show_hp_ssd_smart_path_status, 888 host_store_hp_ssd_smart_path_status); 889 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 890 host_store_raid_offload_debug); 891 static DEVICE_ATTR(firmware_revision, S_IRUGO, 892 host_show_firmware_revision, NULL); 893 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 894 host_show_commands_outstanding, NULL); 895 static DEVICE_ATTR(transport_mode, S_IRUGO, 896 host_show_transport_mode, NULL); 897 static DEVICE_ATTR(resettable, S_IRUGO, 898 host_show_resettable, NULL); 899 static DEVICE_ATTR(lockup_detected, S_IRUGO, 900 host_show_lockup_detected, NULL); 901 static DEVICE_ATTR(ctlr_num, S_IRUGO, 902 host_show_ctlr_num, NULL); 903 904 static struct device_attribute *hpsa_sdev_attrs[] = { 905 &dev_attr_raid_level, 906 &dev_attr_lunid, 907 &dev_attr_unique_id, 908 &dev_attr_hp_ssd_smart_path_enabled, 909 &dev_attr_path_info, 910 &dev_attr_sas_address, 911 NULL, 912 }; 913 914 static struct device_attribute *hpsa_shost_attrs[] = { 915 &dev_attr_rescan, 916 &dev_attr_firmware_revision, 917 &dev_attr_commands_outstanding, 918 &dev_attr_transport_mode, 919 &dev_attr_resettable, 920 &dev_attr_hp_ssd_smart_path_status, 921 &dev_attr_raid_offload_debug, 922 &dev_attr_lockup_detected, 923 &dev_attr_ctlr_num, 924 NULL, 925 }; 926 927 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 928 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 929 930 static struct scsi_host_template hpsa_driver_template = { 931 .module = THIS_MODULE, 932 .name = HPSA, 933 .proc_name = HPSA, 934 .queuecommand = hpsa_scsi_queue_command, 935 .scan_start = hpsa_scan_start, 936 .scan_finished = hpsa_scan_finished, 937 .change_queue_depth = hpsa_change_queue_depth, 938 .this_id = -1, 939 .use_clustering = ENABLE_CLUSTERING, 940 .eh_abort_handler = hpsa_eh_abort_handler, 941 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 942 .ioctl = hpsa_ioctl, 943 .slave_alloc = hpsa_slave_alloc, 944 .slave_configure = hpsa_slave_configure, 945 .slave_destroy = hpsa_slave_destroy, 946 #ifdef CONFIG_COMPAT 947 .compat_ioctl = hpsa_compat_ioctl, 948 #endif 949 .sdev_attrs = hpsa_sdev_attrs, 950 .shost_attrs = hpsa_shost_attrs, 951 .max_sectors = 8192, 952 .no_write_same = 1, 953 }; 954 955 static inline u32 next_command(struct ctlr_info *h, u8 q) 956 { 957 u32 a; 958 struct reply_queue_buffer *rq = &h->reply_queue[q]; 959 960 if (h->transMethod & CFGTBL_Trans_io_accel1) 961 return h->access.command_completed(h, q); 962 963 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 964 return h->access.command_completed(h, q); 965 966 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 967 a = rq->head[rq->current_entry]; 968 rq->current_entry++; 969 atomic_dec(&h->commands_outstanding); 970 } else { 971 a = FIFO_EMPTY; 972 } 973 /* Check for wraparound */ 974 if (rq->current_entry == h->max_commands) { 975 rq->current_entry = 0; 976 rq->wraparound ^= 1; 977 } 978 return a; 979 } 980 981 /* 982 * There are some special bits in the bus address of the 983 * command that we have to set for the controller to know 984 * how to process the command: 985 * 986 * Normal performant mode: 987 * bit 0: 1 means performant mode, 0 means simple mode. 988 * bits 1-3 = block fetch table entry 989 * bits 4-6 = command type (== 0) 990 * 991 * ioaccel1 mode: 992 * bit 0 = "performant mode" bit. 993 * bits 1-3 = block fetch table entry 994 * bits 4-6 = command type (== 110) 995 * (command type is needed because ioaccel1 mode 996 * commands are submitted through the same register as normal 997 * mode commands, so this is how the controller knows whether 998 * the command is normal mode or ioaccel1 mode.) 999 * 1000 * ioaccel2 mode: 1001 * bit 0 = "performant mode" bit. 1002 * bits 1-4 = block fetch table entry (note extra bit) 1003 * bits 4-6 = not needed, because ioaccel2 mode has 1004 * a separate special register for submitting commands. 1005 */ 1006 1007 /* 1008 * set_performant_mode: Modify the tag for cciss performant 1009 * set bit 0 for pull model, bits 3-1 for block fetch 1010 * register number 1011 */ 1012 #define DEFAULT_REPLY_QUEUE (-1) 1013 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1014 int reply_queue) 1015 { 1016 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1017 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1018 if (unlikely(!h->msix_vectors)) 1019 return; 1020 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1021 c->Header.ReplyQueue = 1022 raw_smp_processor_id() % h->nreply_queues; 1023 else 1024 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1025 } 1026 } 1027 1028 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1029 struct CommandList *c, 1030 int reply_queue) 1031 { 1032 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1033 1034 /* 1035 * Tell the controller to post the reply to the queue for this 1036 * processor. This seems to give the best I/O throughput. 1037 */ 1038 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1039 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1040 else 1041 cp->ReplyQueue = reply_queue % h->nreply_queues; 1042 /* 1043 * Set the bits in the address sent down to include: 1044 * - performant mode bit (bit 0) 1045 * - pull count (bits 1-3) 1046 * - command type (bits 4-6) 1047 */ 1048 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1049 IOACCEL1_BUSADDR_CMDTYPE; 1050 } 1051 1052 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1053 struct CommandList *c, 1054 int reply_queue) 1055 { 1056 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1057 &h->ioaccel2_cmd_pool[c->cmdindex]; 1058 1059 /* Tell the controller to post the reply to the queue for this 1060 * processor. This seems to give the best I/O throughput. 1061 */ 1062 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1063 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1064 else 1065 cp->reply_queue = reply_queue % h->nreply_queues; 1066 /* Set the bits in the address sent down to include: 1067 * - performant mode bit not used in ioaccel mode 2 1068 * - pull count (bits 0-3) 1069 * - command type isn't needed for ioaccel2 1070 */ 1071 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1072 } 1073 1074 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1075 struct CommandList *c, 1076 int reply_queue) 1077 { 1078 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1079 1080 /* 1081 * Tell the controller to post the reply to the queue for this 1082 * processor. This seems to give the best I/O throughput. 1083 */ 1084 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1085 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1086 else 1087 cp->reply_queue = reply_queue % h->nreply_queues; 1088 /* 1089 * Set the bits in the address sent down to include: 1090 * - performant mode bit not used in ioaccel mode 2 1091 * - pull count (bits 0-3) 1092 * - command type isn't needed for ioaccel2 1093 */ 1094 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1095 } 1096 1097 static int is_firmware_flash_cmd(u8 *cdb) 1098 { 1099 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1100 } 1101 1102 /* 1103 * During firmware flash, the heartbeat register may not update as frequently 1104 * as it should. So we dial down lockup detection during firmware flash. and 1105 * dial it back up when firmware flash completes. 1106 */ 1107 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1108 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1109 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1110 struct CommandList *c) 1111 { 1112 if (!is_firmware_flash_cmd(c->Request.CDB)) 1113 return; 1114 atomic_inc(&h->firmware_flash_in_progress); 1115 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1116 } 1117 1118 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1119 struct CommandList *c) 1120 { 1121 if (is_firmware_flash_cmd(c->Request.CDB) && 1122 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1123 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1124 } 1125 1126 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1127 struct CommandList *c, int reply_queue) 1128 { 1129 dial_down_lockup_detection_during_fw_flash(h, c); 1130 atomic_inc(&h->commands_outstanding); 1131 switch (c->cmd_type) { 1132 case CMD_IOACCEL1: 1133 set_ioaccel1_performant_mode(h, c, reply_queue); 1134 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1135 break; 1136 case CMD_IOACCEL2: 1137 set_ioaccel2_performant_mode(h, c, reply_queue); 1138 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1139 break; 1140 case IOACCEL2_TMF: 1141 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1142 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1143 break; 1144 default: 1145 set_performant_mode(h, c, reply_queue); 1146 h->access.submit_command(h, c); 1147 } 1148 } 1149 1150 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1151 { 1152 if (unlikely(hpsa_is_pending_event(c))) 1153 return finish_cmd(c); 1154 1155 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1156 } 1157 1158 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1159 { 1160 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1161 } 1162 1163 static inline int is_scsi_rev_5(struct ctlr_info *h) 1164 { 1165 if (!h->hba_inquiry_data) 1166 return 0; 1167 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1168 return 1; 1169 return 0; 1170 } 1171 1172 static int hpsa_find_target_lun(struct ctlr_info *h, 1173 unsigned char scsi3addr[], int bus, int *target, int *lun) 1174 { 1175 /* finds an unused bus, target, lun for a new physical device 1176 * assumes h->devlock is held 1177 */ 1178 int i, found = 0; 1179 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1180 1181 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1182 1183 for (i = 0; i < h->ndevices; i++) { 1184 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1185 __set_bit(h->dev[i]->target, lun_taken); 1186 } 1187 1188 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1189 if (i < HPSA_MAX_DEVICES) { 1190 /* *bus = 1; */ 1191 *target = i; 1192 *lun = 0; 1193 found = 1; 1194 } 1195 return !found; 1196 } 1197 1198 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1199 struct hpsa_scsi_dev_t *dev, char *description) 1200 { 1201 #define LABEL_SIZE 25 1202 char label[LABEL_SIZE]; 1203 1204 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1205 return; 1206 1207 switch (dev->devtype) { 1208 case TYPE_RAID: 1209 snprintf(label, LABEL_SIZE, "controller"); 1210 break; 1211 case TYPE_ENCLOSURE: 1212 snprintf(label, LABEL_SIZE, "enclosure"); 1213 break; 1214 case TYPE_DISK: 1215 case TYPE_ZBC: 1216 if (dev->external) 1217 snprintf(label, LABEL_SIZE, "external"); 1218 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1219 snprintf(label, LABEL_SIZE, "%s", 1220 raid_label[PHYSICAL_DRIVE]); 1221 else 1222 snprintf(label, LABEL_SIZE, "RAID-%s", 1223 dev->raid_level > RAID_UNKNOWN ? "?" : 1224 raid_label[dev->raid_level]); 1225 break; 1226 case TYPE_ROM: 1227 snprintf(label, LABEL_SIZE, "rom"); 1228 break; 1229 case TYPE_TAPE: 1230 snprintf(label, LABEL_SIZE, "tape"); 1231 break; 1232 case TYPE_MEDIUM_CHANGER: 1233 snprintf(label, LABEL_SIZE, "changer"); 1234 break; 1235 default: 1236 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1237 break; 1238 } 1239 1240 dev_printk(level, &h->pdev->dev, 1241 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1242 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1243 description, 1244 scsi_device_type(dev->devtype), 1245 dev->vendor, 1246 dev->model, 1247 label, 1248 dev->offload_config ? '+' : '-', 1249 dev->offload_enabled ? '+' : '-', 1250 dev->expose_device); 1251 } 1252 1253 /* Add an entry into h->dev[] array. */ 1254 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1255 struct hpsa_scsi_dev_t *device, 1256 struct hpsa_scsi_dev_t *added[], int *nadded) 1257 { 1258 /* assumes h->devlock is held */ 1259 int n = h->ndevices; 1260 int i; 1261 unsigned char addr1[8], addr2[8]; 1262 struct hpsa_scsi_dev_t *sd; 1263 1264 if (n >= HPSA_MAX_DEVICES) { 1265 dev_err(&h->pdev->dev, "too many devices, some will be " 1266 "inaccessible.\n"); 1267 return -1; 1268 } 1269 1270 /* physical devices do not have lun or target assigned until now. */ 1271 if (device->lun != -1) 1272 /* Logical device, lun is already assigned. */ 1273 goto lun_assigned; 1274 1275 /* If this device a non-zero lun of a multi-lun device 1276 * byte 4 of the 8-byte LUN addr will contain the logical 1277 * unit no, zero otherwise. 1278 */ 1279 if (device->scsi3addr[4] == 0) { 1280 /* This is not a non-zero lun of a multi-lun device */ 1281 if (hpsa_find_target_lun(h, device->scsi3addr, 1282 device->bus, &device->target, &device->lun) != 0) 1283 return -1; 1284 goto lun_assigned; 1285 } 1286 1287 /* This is a non-zero lun of a multi-lun device. 1288 * Search through our list and find the device which 1289 * has the same 8 byte LUN address, excepting byte 4 and 5. 1290 * Assign the same bus and target for this new LUN. 1291 * Use the logical unit number from the firmware. 1292 */ 1293 memcpy(addr1, device->scsi3addr, 8); 1294 addr1[4] = 0; 1295 addr1[5] = 0; 1296 for (i = 0; i < n; i++) { 1297 sd = h->dev[i]; 1298 memcpy(addr2, sd->scsi3addr, 8); 1299 addr2[4] = 0; 1300 addr2[5] = 0; 1301 /* differ only in byte 4 and 5? */ 1302 if (memcmp(addr1, addr2, 8) == 0) { 1303 device->bus = sd->bus; 1304 device->target = sd->target; 1305 device->lun = device->scsi3addr[4]; 1306 break; 1307 } 1308 } 1309 if (device->lun == -1) { 1310 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1311 " suspect firmware bug or unsupported hardware " 1312 "configuration.\n"); 1313 return -1; 1314 } 1315 1316 lun_assigned: 1317 1318 h->dev[n] = device; 1319 h->ndevices++; 1320 added[*nadded] = device; 1321 (*nadded)++; 1322 hpsa_show_dev_msg(KERN_INFO, h, device, 1323 device->expose_device ? "added" : "masked"); 1324 device->offload_to_be_enabled = device->offload_enabled; 1325 device->offload_enabled = 0; 1326 return 0; 1327 } 1328 1329 /* Update an entry in h->dev[] array. */ 1330 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1331 int entry, struct hpsa_scsi_dev_t *new_entry) 1332 { 1333 int offload_enabled; 1334 /* assumes h->devlock is held */ 1335 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1336 1337 /* Raid level changed. */ 1338 h->dev[entry]->raid_level = new_entry->raid_level; 1339 1340 /* Raid offload parameters changed. Careful about the ordering. */ 1341 if (new_entry->offload_config && new_entry->offload_enabled) { 1342 /* 1343 * if drive is newly offload_enabled, we want to copy the 1344 * raid map data first. If previously offload_enabled and 1345 * offload_config were set, raid map data had better be 1346 * the same as it was before. if raid map data is changed 1347 * then it had better be the case that 1348 * h->dev[entry]->offload_enabled is currently 0. 1349 */ 1350 h->dev[entry]->raid_map = new_entry->raid_map; 1351 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1352 } 1353 if (new_entry->hba_ioaccel_enabled) { 1354 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1355 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1356 } 1357 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1358 h->dev[entry]->offload_config = new_entry->offload_config; 1359 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1360 h->dev[entry]->queue_depth = new_entry->queue_depth; 1361 1362 /* 1363 * We can turn off ioaccel offload now, but need to delay turning 1364 * it on until we can update h->dev[entry]->phys_disk[], but we 1365 * can't do that until all the devices are updated. 1366 */ 1367 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1368 if (!new_entry->offload_enabled) 1369 h->dev[entry]->offload_enabled = 0; 1370 1371 offload_enabled = h->dev[entry]->offload_enabled; 1372 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1373 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1374 h->dev[entry]->offload_enabled = offload_enabled; 1375 } 1376 1377 /* Replace an entry from h->dev[] array. */ 1378 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1379 int entry, struct hpsa_scsi_dev_t *new_entry, 1380 struct hpsa_scsi_dev_t *added[], int *nadded, 1381 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1382 { 1383 /* assumes h->devlock is held */ 1384 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1385 removed[*nremoved] = h->dev[entry]; 1386 (*nremoved)++; 1387 1388 /* 1389 * New physical devices won't have target/lun assigned yet 1390 * so we need to preserve the values in the slot we are replacing. 1391 */ 1392 if (new_entry->target == -1) { 1393 new_entry->target = h->dev[entry]->target; 1394 new_entry->lun = h->dev[entry]->lun; 1395 } 1396 1397 h->dev[entry] = new_entry; 1398 added[*nadded] = new_entry; 1399 (*nadded)++; 1400 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1401 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1402 new_entry->offload_enabled = 0; 1403 } 1404 1405 /* Remove an entry from h->dev[] array. */ 1406 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1407 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1408 { 1409 /* assumes h->devlock is held */ 1410 int i; 1411 struct hpsa_scsi_dev_t *sd; 1412 1413 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1414 1415 sd = h->dev[entry]; 1416 removed[*nremoved] = h->dev[entry]; 1417 (*nremoved)++; 1418 1419 for (i = entry; i < h->ndevices-1; i++) 1420 h->dev[i] = h->dev[i+1]; 1421 h->ndevices--; 1422 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1423 } 1424 1425 #define SCSI3ADDR_EQ(a, b) ( \ 1426 (a)[7] == (b)[7] && \ 1427 (a)[6] == (b)[6] && \ 1428 (a)[5] == (b)[5] && \ 1429 (a)[4] == (b)[4] && \ 1430 (a)[3] == (b)[3] && \ 1431 (a)[2] == (b)[2] && \ 1432 (a)[1] == (b)[1] && \ 1433 (a)[0] == (b)[0]) 1434 1435 static void fixup_botched_add(struct ctlr_info *h, 1436 struct hpsa_scsi_dev_t *added) 1437 { 1438 /* called when scsi_add_device fails in order to re-adjust 1439 * h->dev[] to match the mid layer's view. 1440 */ 1441 unsigned long flags; 1442 int i, j; 1443 1444 spin_lock_irqsave(&h->lock, flags); 1445 for (i = 0; i < h->ndevices; i++) { 1446 if (h->dev[i] == added) { 1447 for (j = i; j < h->ndevices-1; j++) 1448 h->dev[j] = h->dev[j+1]; 1449 h->ndevices--; 1450 break; 1451 } 1452 } 1453 spin_unlock_irqrestore(&h->lock, flags); 1454 kfree(added); 1455 } 1456 1457 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1458 struct hpsa_scsi_dev_t *dev2) 1459 { 1460 /* we compare everything except lun and target as these 1461 * are not yet assigned. Compare parts likely 1462 * to differ first 1463 */ 1464 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1465 sizeof(dev1->scsi3addr)) != 0) 1466 return 0; 1467 if (memcmp(dev1->device_id, dev2->device_id, 1468 sizeof(dev1->device_id)) != 0) 1469 return 0; 1470 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1471 return 0; 1472 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1473 return 0; 1474 if (dev1->devtype != dev2->devtype) 1475 return 0; 1476 if (dev1->bus != dev2->bus) 1477 return 0; 1478 return 1; 1479 } 1480 1481 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1482 struct hpsa_scsi_dev_t *dev2) 1483 { 1484 /* Device attributes that can change, but don't mean 1485 * that the device is a different device, nor that the OS 1486 * needs to be told anything about the change. 1487 */ 1488 if (dev1->raid_level != dev2->raid_level) 1489 return 1; 1490 if (dev1->offload_config != dev2->offload_config) 1491 return 1; 1492 if (dev1->offload_enabled != dev2->offload_enabled) 1493 return 1; 1494 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1495 if (dev1->queue_depth != dev2->queue_depth) 1496 return 1; 1497 return 0; 1498 } 1499 1500 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1501 * and return needle location in *index. If scsi3addr matches, but not 1502 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1503 * location in *index. 1504 * In the case of a minor device attribute change, such as RAID level, just 1505 * return DEVICE_UPDATED, along with the updated device's location in index. 1506 * If needle not found, return DEVICE_NOT_FOUND. 1507 */ 1508 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1509 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1510 int *index) 1511 { 1512 int i; 1513 #define DEVICE_NOT_FOUND 0 1514 #define DEVICE_CHANGED 1 1515 #define DEVICE_SAME 2 1516 #define DEVICE_UPDATED 3 1517 if (needle == NULL) 1518 return DEVICE_NOT_FOUND; 1519 1520 for (i = 0; i < haystack_size; i++) { 1521 if (haystack[i] == NULL) /* previously removed. */ 1522 continue; 1523 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1524 *index = i; 1525 if (device_is_the_same(needle, haystack[i])) { 1526 if (device_updated(needle, haystack[i])) 1527 return DEVICE_UPDATED; 1528 return DEVICE_SAME; 1529 } else { 1530 /* Keep offline devices offline */ 1531 if (needle->volume_offline) 1532 return DEVICE_NOT_FOUND; 1533 return DEVICE_CHANGED; 1534 } 1535 } 1536 } 1537 *index = -1; 1538 return DEVICE_NOT_FOUND; 1539 } 1540 1541 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1542 unsigned char scsi3addr[]) 1543 { 1544 struct offline_device_entry *device; 1545 unsigned long flags; 1546 1547 /* Check to see if device is already on the list */ 1548 spin_lock_irqsave(&h->offline_device_lock, flags); 1549 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1550 if (memcmp(device->scsi3addr, scsi3addr, 1551 sizeof(device->scsi3addr)) == 0) { 1552 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1553 return; 1554 } 1555 } 1556 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1557 1558 /* Device is not on the list, add it. */ 1559 device = kmalloc(sizeof(*device), GFP_KERNEL); 1560 if (!device) 1561 return; 1562 1563 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1564 spin_lock_irqsave(&h->offline_device_lock, flags); 1565 list_add_tail(&device->offline_list, &h->offline_device_list); 1566 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1567 } 1568 1569 /* Print a message explaining various offline volume states */ 1570 static void hpsa_show_volume_status(struct ctlr_info *h, 1571 struct hpsa_scsi_dev_t *sd) 1572 { 1573 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1574 dev_info(&h->pdev->dev, 1575 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1576 h->scsi_host->host_no, 1577 sd->bus, sd->target, sd->lun); 1578 switch (sd->volume_offline) { 1579 case HPSA_LV_OK: 1580 break; 1581 case HPSA_LV_UNDERGOING_ERASE: 1582 dev_info(&h->pdev->dev, 1583 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1584 h->scsi_host->host_no, 1585 sd->bus, sd->target, sd->lun); 1586 break; 1587 case HPSA_LV_NOT_AVAILABLE: 1588 dev_info(&h->pdev->dev, 1589 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1590 h->scsi_host->host_no, 1591 sd->bus, sd->target, sd->lun); 1592 break; 1593 case HPSA_LV_UNDERGOING_RPI: 1594 dev_info(&h->pdev->dev, 1595 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1596 h->scsi_host->host_no, 1597 sd->bus, sd->target, sd->lun); 1598 break; 1599 case HPSA_LV_PENDING_RPI: 1600 dev_info(&h->pdev->dev, 1601 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1602 h->scsi_host->host_no, 1603 sd->bus, sd->target, sd->lun); 1604 break; 1605 case HPSA_LV_ENCRYPTED_NO_KEY: 1606 dev_info(&h->pdev->dev, 1607 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1608 h->scsi_host->host_no, 1609 sd->bus, sd->target, sd->lun); 1610 break; 1611 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1612 dev_info(&h->pdev->dev, 1613 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1614 h->scsi_host->host_no, 1615 sd->bus, sd->target, sd->lun); 1616 break; 1617 case HPSA_LV_UNDERGOING_ENCRYPTION: 1618 dev_info(&h->pdev->dev, 1619 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1620 h->scsi_host->host_no, 1621 sd->bus, sd->target, sd->lun); 1622 break; 1623 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1624 dev_info(&h->pdev->dev, 1625 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1626 h->scsi_host->host_no, 1627 sd->bus, sd->target, sd->lun); 1628 break; 1629 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1630 dev_info(&h->pdev->dev, 1631 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1632 h->scsi_host->host_no, 1633 sd->bus, sd->target, sd->lun); 1634 break; 1635 case HPSA_LV_PENDING_ENCRYPTION: 1636 dev_info(&h->pdev->dev, 1637 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1638 h->scsi_host->host_no, 1639 sd->bus, sd->target, sd->lun); 1640 break; 1641 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1642 dev_info(&h->pdev->dev, 1643 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1644 h->scsi_host->host_no, 1645 sd->bus, sd->target, sd->lun); 1646 break; 1647 } 1648 } 1649 1650 /* 1651 * Figure the list of physical drive pointers for a logical drive with 1652 * raid offload configured. 1653 */ 1654 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1655 struct hpsa_scsi_dev_t *dev[], int ndevices, 1656 struct hpsa_scsi_dev_t *logical_drive) 1657 { 1658 struct raid_map_data *map = &logical_drive->raid_map; 1659 struct raid_map_disk_data *dd = &map->data[0]; 1660 int i, j; 1661 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1662 le16_to_cpu(map->metadata_disks_per_row); 1663 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1664 le16_to_cpu(map->layout_map_count) * 1665 total_disks_per_row; 1666 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1667 total_disks_per_row; 1668 int qdepth; 1669 1670 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1671 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1672 1673 logical_drive->nphysical_disks = nraid_map_entries; 1674 1675 qdepth = 0; 1676 for (i = 0; i < nraid_map_entries; i++) { 1677 logical_drive->phys_disk[i] = NULL; 1678 if (!logical_drive->offload_config) 1679 continue; 1680 for (j = 0; j < ndevices; j++) { 1681 if (dev[j] == NULL) 1682 continue; 1683 if (dev[j]->devtype != TYPE_DISK && 1684 dev[j]->devtype != TYPE_ZBC) 1685 continue; 1686 if (is_logical_device(dev[j])) 1687 continue; 1688 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1689 continue; 1690 1691 logical_drive->phys_disk[i] = dev[j]; 1692 if (i < nphys_disk) 1693 qdepth = min(h->nr_cmds, qdepth + 1694 logical_drive->phys_disk[i]->queue_depth); 1695 break; 1696 } 1697 1698 /* 1699 * This can happen if a physical drive is removed and 1700 * the logical drive is degraded. In that case, the RAID 1701 * map data will refer to a physical disk which isn't actually 1702 * present. And in that case offload_enabled should already 1703 * be 0, but we'll turn it off here just in case 1704 */ 1705 if (!logical_drive->phys_disk[i]) { 1706 logical_drive->offload_enabled = 0; 1707 logical_drive->offload_to_be_enabled = 0; 1708 logical_drive->queue_depth = 8; 1709 } 1710 } 1711 if (nraid_map_entries) 1712 /* 1713 * This is correct for reads, too high for full stripe writes, 1714 * way too high for partial stripe writes 1715 */ 1716 logical_drive->queue_depth = qdepth; 1717 else 1718 logical_drive->queue_depth = h->nr_cmds; 1719 } 1720 1721 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1722 struct hpsa_scsi_dev_t *dev[], int ndevices) 1723 { 1724 int i; 1725 1726 for (i = 0; i < ndevices; i++) { 1727 if (dev[i] == NULL) 1728 continue; 1729 if (dev[i]->devtype != TYPE_DISK && 1730 dev[i]->devtype != TYPE_ZBC) 1731 continue; 1732 if (!is_logical_device(dev[i])) 1733 continue; 1734 1735 /* 1736 * If offload is currently enabled, the RAID map and 1737 * phys_disk[] assignment *better* not be changing 1738 * and since it isn't changing, we do not need to 1739 * update it. 1740 */ 1741 if (dev[i]->offload_enabled) 1742 continue; 1743 1744 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1745 } 1746 } 1747 1748 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1749 { 1750 int rc = 0; 1751 1752 if (!h->scsi_host) 1753 return 1; 1754 1755 if (is_logical_device(device)) /* RAID */ 1756 rc = scsi_add_device(h->scsi_host, device->bus, 1757 device->target, device->lun); 1758 else /* HBA */ 1759 rc = hpsa_add_sas_device(h->sas_host, device); 1760 1761 return rc; 1762 } 1763 1764 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1765 struct hpsa_scsi_dev_t *dev) 1766 { 1767 int i; 1768 int count = 0; 1769 1770 for (i = 0; i < h->nr_cmds; i++) { 1771 struct CommandList *c = h->cmd_pool + i; 1772 int refcount = atomic_inc_return(&c->refcount); 1773 1774 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1775 dev->scsi3addr)) { 1776 unsigned long flags; 1777 1778 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1779 if (!hpsa_is_cmd_idle(c)) 1780 ++count; 1781 spin_unlock_irqrestore(&h->lock, flags); 1782 } 1783 1784 cmd_free(h, c); 1785 } 1786 1787 return count; 1788 } 1789 1790 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1791 struct hpsa_scsi_dev_t *device) 1792 { 1793 int cmds = 0; 1794 int waits = 0; 1795 1796 while (1) { 1797 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1798 if (cmds == 0) 1799 break; 1800 if (++waits > 20) 1801 break; 1802 dev_warn(&h->pdev->dev, 1803 "%s: removing device with %d outstanding commands!\n", 1804 __func__, cmds); 1805 msleep(1000); 1806 } 1807 } 1808 1809 static void hpsa_remove_device(struct ctlr_info *h, 1810 struct hpsa_scsi_dev_t *device) 1811 { 1812 struct scsi_device *sdev = NULL; 1813 1814 if (!h->scsi_host) 1815 return; 1816 1817 if (is_logical_device(device)) { /* RAID */ 1818 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1819 device->target, device->lun); 1820 if (sdev) { 1821 scsi_remove_device(sdev); 1822 scsi_device_put(sdev); 1823 } else { 1824 /* 1825 * We don't expect to get here. Future commands 1826 * to this device will get a selection timeout as 1827 * if the device were gone. 1828 */ 1829 hpsa_show_dev_msg(KERN_WARNING, h, device, 1830 "didn't find device for removal."); 1831 } 1832 } else { /* HBA */ 1833 1834 device->removed = 1; 1835 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1836 1837 hpsa_remove_sas_device(device); 1838 } 1839 } 1840 1841 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1842 struct hpsa_scsi_dev_t *sd[], int nsds) 1843 { 1844 /* sd contains scsi3 addresses and devtypes, and inquiry 1845 * data. This function takes what's in sd to be the current 1846 * reality and updates h->dev[] to reflect that reality. 1847 */ 1848 int i, entry, device_change, changes = 0; 1849 struct hpsa_scsi_dev_t *csd; 1850 unsigned long flags; 1851 struct hpsa_scsi_dev_t **added, **removed; 1852 int nadded, nremoved; 1853 1854 /* 1855 * A reset can cause a device status to change 1856 * re-schedule the scan to see what happened. 1857 */ 1858 if (h->reset_in_progress) { 1859 h->drv_req_rescan = 1; 1860 return; 1861 } 1862 1863 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1864 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1865 1866 if (!added || !removed) { 1867 dev_warn(&h->pdev->dev, "out of memory in " 1868 "adjust_hpsa_scsi_table\n"); 1869 goto free_and_out; 1870 } 1871 1872 spin_lock_irqsave(&h->devlock, flags); 1873 1874 /* find any devices in h->dev[] that are not in 1875 * sd[] and remove them from h->dev[], and for any 1876 * devices which have changed, remove the old device 1877 * info and add the new device info. 1878 * If minor device attributes change, just update 1879 * the existing device structure. 1880 */ 1881 i = 0; 1882 nremoved = 0; 1883 nadded = 0; 1884 while (i < h->ndevices) { 1885 csd = h->dev[i]; 1886 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1887 if (device_change == DEVICE_NOT_FOUND) { 1888 changes++; 1889 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1890 continue; /* remove ^^^, hence i not incremented */ 1891 } else if (device_change == DEVICE_CHANGED) { 1892 changes++; 1893 hpsa_scsi_replace_entry(h, i, sd[entry], 1894 added, &nadded, removed, &nremoved); 1895 /* Set it to NULL to prevent it from being freed 1896 * at the bottom of hpsa_update_scsi_devices() 1897 */ 1898 sd[entry] = NULL; 1899 } else if (device_change == DEVICE_UPDATED) { 1900 hpsa_scsi_update_entry(h, i, sd[entry]); 1901 } 1902 i++; 1903 } 1904 1905 /* Now, make sure every device listed in sd[] is also 1906 * listed in h->dev[], adding them if they aren't found 1907 */ 1908 1909 for (i = 0; i < nsds; i++) { 1910 if (!sd[i]) /* if already added above. */ 1911 continue; 1912 1913 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1914 * as the SCSI mid-layer does not handle such devices well. 1915 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1916 * at 160Hz, and prevents the system from coming up. 1917 */ 1918 if (sd[i]->volume_offline) { 1919 hpsa_show_volume_status(h, sd[i]); 1920 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1921 continue; 1922 } 1923 1924 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1925 h->ndevices, &entry); 1926 if (device_change == DEVICE_NOT_FOUND) { 1927 changes++; 1928 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1929 break; 1930 sd[i] = NULL; /* prevent from being freed later. */ 1931 } else if (device_change == DEVICE_CHANGED) { 1932 /* should never happen... */ 1933 changes++; 1934 dev_warn(&h->pdev->dev, 1935 "device unexpectedly changed.\n"); 1936 /* but if it does happen, we just ignore that device */ 1937 } 1938 } 1939 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1940 1941 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1942 * any logical drives that need it enabled. 1943 */ 1944 for (i = 0; i < h->ndevices; i++) { 1945 if (h->dev[i] == NULL) 1946 continue; 1947 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1948 } 1949 1950 spin_unlock_irqrestore(&h->devlock, flags); 1951 1952 /* Monitor devices which are in one of several NOT READY states to be 1953 * brought online later. This must be done without holding h->devlock, 1954 * so don't touch h->dev[] 1955 */ 1956 for (i = 0; i < nsds; i++) { 1957 if (!sd[i]) /* if already added above. */ 1958 continue; 1959 if (sd[i]->volume_offline) 1960 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1961 } 1962 1963 /* Don't notify scsi mid layer of any changes the first time through 1964 * (or if there are no changes) scsi_scan_host will do it later the 1965 * first time through. 1966 */ 1967 if (!changes) 1968 goto free_and_out; 1969 1970 /* Notify scsi mid layer of any removed devices */ 1971 for (i = 0; i < nremoved; i++) { 1972 if (removed[i] == NULL) 1973 continue; 1974 if (removed[i]->expose_device) 1975 hpsa_remove_device(h, removed[i]); 1976 kfree(removed[i]); 1977 removed[i] = NULL; 1978 } 1979 1980 /* Notify scsi mid layer of any added devices */ 1981 for (i = 0; i < nadded; i++) { 1982 int rc = 0; 1983 1984 if (added[i] == NULL) 1985 continue; 1986 if (!(added[i]->expose_device)) 1987 continue; 1988 rc = hpsa_add_device(h, added[i]); 1989 if (!rc) 1990 continue; 1991 dev_warn(&h->pdev->dev, 1992 "addition failed %d, device not added.", rc); 1993 /* now we have to remove it from h->dev, 1994 * since it didn't get added to scsi mid layer 1995 */ 1996 fixup_botched_add(h, added[i]); 1997 h->drv_req_rescan = 1; 1998 } 1999 2000 free_and_out: 2001 kfree(added); 2002 kfree(removed); 2003 } 2004 2005 /* 2006 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2007 * Assume's h->devlock is held. 2008 */ 2009 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2010 int bus, int target, int lun) 2011 { 2012 int i; 2013 struct hpsa_scsi_dev_t *sd; 2014 2015 for (i = 0; i < h->ndevices; i++) { 2016 sd = h->dev[i]; 2017 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2018 return sd; 2019 } 2020 return NULL; 2021 } 2022 2023 static int hpsa_slave_alloc(struct scsi_device *sdev) 2024 { 2025 struct hpsa_scsi_dev_t *sd = NULL; 2026 unsigned long flags; 2027 struct ctlr_info *h; 2028 2029 h = sdev_to_hba(sdev); 2030 spin_lock_irqsave(&h->devlock, flags); 2031 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2032 struct scsi_target *starget; 2033 struct sas_rphy *rphy; 2034 2035 starget = scsi_target(sdev); 2036 rphy = target_to_rphy(starget); 2037 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2038 if (sd) { 2039 sd->target = sdev_id(sdev); 2040 sd->lun = sdev->lun; 2041 } 2042 } 2043 if (!sd) 2044 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2045 sdev_id(sdev), sdev->lun); 2046 2047 if (sd && sd->expose_device) { 2048 atomic_set(&sd->ioaccel_cmds_out, 0); 2049 sdev->hostdata = sd; 2050 } else 2051 sdev->hostdata = NULL; 2052 spin_unlock_irqrestore(&h->devlock, flags); 2053 return 0; 2054 } 2055 2056 /* configure scsi device based on internal per-device structure */ 2057 static int hpsa_slave_configure(struct scsi_device *sdev) 2058 { 2059 struct hpsa_scsi_dev_t *sd; 2060 int queue_depth; 2061 2062 sd = sdev->hostdata; 2063 sdev->no_uld_attach = !sd || !sd->expose_device; 2064 2065 if (sd) 2066 queue_depth = sd->queue_depth != 0 ? 2067 sd->queue_depth : sdev->host->can_queue; 2068 else 2069 queue_depth = sdev->host->can_queue; 2070 2071 scsi_change_queue_depth(sdev, queue_depth); 2072 2073 return 0; 2074 } 2075 2076 static void hpsa_slave_destroy(struct scsi_device *sdev) 2077 { 2078 /* nothing to do. */ 2079 } 2080 2081 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082 { 2083 int i; 2084 2085 if (!h->ioaccel2_cmd_sg_list) 2086 return; 2087 for (i = 0; i < h->nr_cmds; i++) { 2088 kfree(h->ioaccel2_cmd_sg_list[i]); 2089 h->ioaccel2_cmd_sg_list[i] = NULL; 2090 } 2091 kfree(h->ioaccel2_cmd_sg_list); 2092 h->ioaccel2_cmd_sg_list = NULL; 2093 } 2094 2095 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2096 { 2097 int i; 2098 2099 if (h->chainsize <= 0) 2100 return 0; 2101 2102 h->ioaccel2_cmd_sg_list = 2103 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2104 GFP_KERNEL); 2105 if (!h->ioaccel2_cmd_sg_list) 2106 return -ENOMEM; 2107 for (i = 0; i < h->nr_cmds; i++) { 2108 h->ioaccel2_cmd_sg_list[i] = 2109 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2110 h->maxsgentries, GFP_KERNEL); 2111 if (!h->ioaccel2_cmd_sg_list[i]) 2112 goto clean; 2113 } 2114 return 0; 2115 2116 clean: 2117 hpsa_free_ioaccel2_sg_chain_blocks(h); 2118 return -ENOMEM; 2119 } 2120 2121 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2122 { 2123 int i; 2124 2125 if (!h->cmd_sg_list) 2126 return; 2127 for (i = 0; i < h->nr_cmds; i++) { 2128 kfree(h->cmd_sg_list[i]); 2129 h->cmd_sg_list[i] = NULL; 2130 } 2131 kfree(h->cmd_sg_list); 2132 h->cmd_sg_list = NULL; 2133 } 2134 2135 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2136 { 2137 int i; 2138 2139 if (h->chainsize <= 0) 2140 return 0; 2141 2142 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2143 GFP_KERNEL); 2144 if (!h->cmd_sg_list) 2145 return -ENOMEM; 2146 2147 for (i = 0; i < h->nr_cmds; i++) { 2148 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2149 h->chainsize, GFP_KERNEL); 2150 if (!h->cmd_sg_list[i]) 2151 goto clean; 2152 2153 } 2154 return 0; 2155 2156 clean: 2157 hpsa_free_sg_chain_blocks(h); 2158 return -ENOMEM; 2159 } 2160 2161 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2162 struct io_accel2_cmd *cp, struct CommandList *c) 2163 { 2164 struct ioaccel2_sg_element *chain_block; 2165 u64 temp64; 2166 u32 chain_size; 2167 2168 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2169 chain_size = le32_to_cpu(cp->sg[0].length); 2170 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2171 PCI_DMA_TODEVICE); 2172 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2173 /* prevent subsequent unmapping */ 2174 cp->sg->address = 0; 2175 return -1; 2176 } 2177 cp->sg->address = cpu_to_le64(temp64); 2178 return 0; 2179 } 2180 2181 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2182 struct io_accel2_cmd *cp) 2183 { 2184 struct ioaccel2_sg_element *chain_sg; 2185 u64 temp64; 2186 u32 chain_size; 2187 2188 chain_sg = cp->sg; 2189 temp64 = le64_to_cpu(chain_sg->address); 2190 chain_size = le32_to_cpu(cp->sg[0].length); 2191 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2192 } 2193 2194 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2195 struct CommandList *c) 2196 { 2197 struct SGDescriptor *chain_sg, *chain_block; 2198 u64 temp64; 2199 u32 chain_len; 2200 2201 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2202 chain_block = h->cmd_sg_list[c->cmdindex]; 2203 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2204 chain_len = sizeof(*chain_sg) * 2205 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2206 chain_sg->Len = cpu_to_le32(chain_len); 2207 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2208 PCI_DMA_TODEVICE); 2209 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2210 /* prevent subsequent unmapping */ 2211 chain_sg->Addr = cpu_to_le64(0); 2212 return -1; 2213 } 2214 chain_sg->Addr = cpu_to_le64(temp64); 2215 return 0; 2216 } 2217 2218 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2219 struct CommandList *c) 2220 { 2221 struct SGDescriptor *chain_sg; 2222 2223 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2224 return; 2225 2226 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2227 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2228 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2229 } 2230 2231 2232 /* Decode the various types of errors on ioaccel2 path. 2233 * Return 1 for any error that should generate a RAID path retry. 2234 * Return 0 for errors that don't require a RAID path retry. 2235 */ 2236 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2237 struct CommandList *c, 2238 struct scsi_cmnd *cmd, 2239 struct io_accel2_cmd *c2, 2240 struct hpsa_scsi_dev_t *dev) 2241 { 2242 int data_len; 2243 int retry = 0; 2244 u32 ioaccel2_resid = 0; 2245 2246 switch (c2->error_data.serv_response) { 2247 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2248 switch (c2->error_data.status) { 2249 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2250 break; 2251 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2252 cmd->result |= SAM_STAT_CHECK_CONDITION; 2253 if (c2->error_data.data_present != 2254 IOACCEL2_SENSE_DATA_PRESENT) { 2255 memset(cmd->sense_buffer, 0, 2256 SCSI_SENSE_BUFFERSIZE); 2257 break; 2258 } 2259 /* copy the sense data */ 2260 data_len = c2->error_data.sense_data_len; 2261 if (data_len > SCSI_SENSE_BUFFERSIZE) 2262 data_len = SCSI_SENSE_BUFFERSIZE; 2263 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2264 data_len = 2265 sizeof(c2->error_data.sense_data_buff); 2266 memcpy(cmd->sense_buffer, 2267 c2->error_data.sense_data_buff, data_len); 2268 retry = 1; 2269 break; 2270 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2271 retry = 1; 2272 break; 2273 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2274 retry = 1; 2275 break; 2276 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2277 retry = 1; 2278 break; 2279 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2280 retry = 1; 2281 break; 2282 default: 2283 retry = 1; 2284 break; 2285 } 2286 break; 2287 case IOACCEL2_SERV_RESPONSE_FAILURE: 2288 switch (c2->error_data.status) { 2289 case IOACCEL2_STATUS_SR_IO_ERROR: 2290 case IOACCEL2_STATUS_SR_IO_ABORTED: 2291 case IOACCEL2_STATUS_SR_OVERRUN: 2292 retry = 1; 2293 break; 2294 case IOACCEL2_STATUS_SR_UNDERRUN: 2295 cmd->result = (DID_OK << 16); /* host byte */ 2296 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2297 ioaccel2_resid = get_unaligned_le32( 2298 &c2->error_data.resid_cnt[0]); 2299 scsi_set_resid(cmd, ioaccel2_resid); 2300 break; 2301 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2302 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2303 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2304 /* 2305 * Did an HBA disk disappear? We will eventually 2306 * get a state change event from the controller but 2307 * in the meantime, we need to tell the OS that the 2308 * HBA disk is no longer there and stop I/O 2309 * from going down. This allows the potential re-insert 2310 * of the disk to get the same device node. 2311 */ 2312 if (dev->physical_device && dev->expose_device) { 2313 cmd->result = DID_NO_CONNECT << 16; 2314 dev->removed = 1; 2315 h->drv_req_rescan = 1; 2316 dev_warn(&h->pdev->dev, 2317 "%s: device is gone!\n", __func__); 2318 } else 2319 /* 2320 * Retry by sending down the RAID path. 2321 * We will get an event from ctlr to 2322 * trigger rescan regardless. 2323 */ 2324 retry = 1; 2325 break; 2326 default: 2327 retry = 1; 2328 } 2329 break; 2330 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2331 break; 2332 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2333 break; 2334 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2335 retry = 1; 2336 break; 2337 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2338 break; 2339 default: 2340 retry = 1; 2341 break; 2342 } 2343 2344 return retry; /* retry on raid path? */ 2345 } 2346 2347 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2348 struct CommandList *c) 2349 { 2350 bool do_wake = false; 2351 2352 /* 2353 * Prevent the following race in the abort handler: 2354 * 2355 * 1. LLD is requested to abort a SCSI command 2356 * 2. The SCSI command completes 2357 * 3. The struct CommandList associated with step 2 is made available 2358 * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2359 * 5. Abort handler follows scsi_cmnd->host_scribble and 2360 * finds struct CommandList and tries to aborts it 2361 * Now we have aborted the wrong command. 2362 * 2363 * Reset c->scsi_cmd here so that the abort or reset handler will know 2364 * this command has completed. Then, check to see if the handler is 2365 * waiting for this command, and, if so, wake it. 2366 */ 2367 c->scsi_cmd = SCSI_CMD_IDLE; 2368 mb(); /* Declare command idle before checking for pending events. */ 2369 if (c->abort_pending) { 2370 do_wake = true; 2371 c->abort_pending = false; 2372 } 2373 if (c->reset_pending) { 2374 unsigned long flags; 2375 struct hpsa_scsi_dev_t *dev; 2376 2377 /* 2378 * There appears to be a reset pending; lock the lock and 2379 * reconfirm. If so, then decrement the count of outstanding 2380 * commands and wake the reset command if this is the last one. 2381 */ 2382 spin_lock_irqsave(&h->lock, flags); 2383 dev = c->reset_pending; /* Re-fetch under the lock. */ 2384 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2385 do_wake = true; 2386 c->reset_pending = NULL; 2387 spin_unlock_irqrestore(&h->lock, flags); 2388 } 2389 2390 if (do_wake) 2391 wake_up_all(&h->event_sync_wait_queue); 2392 } 2393 2394 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2395 struct CommandList *c) 2396 { 2397 hpsa_cmd_resolve_events(h, c); 2398 cmd_tagged_free(h, c); 2399 } 2400 2401 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2402 struct CommandList *c, struct scsi_cmnd *cmd) 2403 { 2404 hpsa_cmd_resolve_and_free(h, c); 2405 if (cmd && cmd->scsi_done) 2406 cmd->scsi_done(cmd); 2407 } 2408 2409 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2410 { 2411 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2412 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2413 } 2414 2415 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2416 { 2417 cmd->result = DID_ABORT << 16; 2418 } 2419 2420 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2421 struct scsi_cmnd *cmd) 2422 { 2423 hpsa_set_scsi_cmd_aborted(cmd); 2424 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2425 c->Request.CDB, c->err_info->ScsiStatus); 2426 hpsa_cmd_resolve_and_free(h, c); 2427 } 2428 2429 static void process_ioaccel2_completion(struct ctlr_info *h, 2430 struct CommandList *c, struct scsi_cmnd *cmd, 2431 struct hpsa_scsi_dev_t *dev) 2432 { 2433 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2434 2435 /* check for good status */ 2436 if (likely(c2->error_data.serv_response == 0 && 2437 c2->error_data.status == 0)) 2438 return hpsa_cmd_free_and_done(h, c, cmd); 2439 2440 /* 2441 * Any RAID offload error results in retry which will use 2442 * the normal I/O path so the controller can handle whatever's 2443 * wrong. 2444 */ 2445 if (is_logical_device(dev) && 2446 c2->error_data.serv_response == 2447 IOACCEL2_SERV_RESPONSE_FAILURE) { 2448 if (c2->error_data.status == 2449 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2450 dev->offload_enabled = 0; 2451 dev->offload_to_be_enabled = 0; 2452 } 2453 2454 return hpsa_retry_cmd(h, c); 2455 } 2456 2457 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2458 return hpsa_retry_cmd(h, c); 2459 2460 return hpsa_cmd_free_and_done(h, c, cmd); 2461 } 2462 2463 /* Returns 0 on success, < 0 otherwise. */ 2464 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2465 struct CommandList *cp) 2466 { 2467 u8 tmf_status = cp->err_info->ScsiStatus; 2468 2469 switch (tmf_status) { 2470 case CISS_TMF_COMPLETE: 2471 /* 2472 * CISS_TMF_COMPLETE never happens, instead, 2473 * ei->CommandStatus == 0 for this case. 2474 */ 2475 case CISS_TMF_SUCCESS: 2476 return 0; 2477 case CISS_TMF_INVALID_FRAME: 2478 case CISS_TMF_NOT_SUPPORTED: 2479 case CISS_TMF_FAILED: 2480 case CISS_TMF_WRONG_LUN: 2481 case CISS_TMF_OVERLAPPED_TAG: 2482 break; 2483 default: 2484 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2485 tmf_status); 2486 break; 2487 } 2488 return -tmf_status; 2489 } 2490 2491 static void complete_scsi_command(struct CommandList *cp) 2492 { 2493 struct scsi_cmnd *cmd; 2494 struct ctlr_info *h; 2495 struct ErrorInfo *ei; 2496 struct hpsa_scsi_dev_t *dev; 2497 struct io_accel2_cmd *c2; 2498 2499 u8 sense_key; 2500 u8 asc; /* additional sense code */ 2501 u8 ascq; /* additional sense code qualifier */ 2502 unsigned long sense_data_size; 2503 2504 ei = cp->err_info; 2505 cmd = cp->scsi_cmd; 2506 h = cp->h; 2507 2508 if (!cmd->device) { 2509 cmd->result = DID_NO_CONNECT << 16; 2510 return hpsa_cmd_free_and_done(h, cp, cmd); 2511 } 2512 2513 dev = cmd->device->hostdata; 2514 if (!dev) { 2515 cmd->result = DID_NO_CONNECT << 16; 2516 return hpsa_cmd_free_and_done(h, cp, cmd); 2517 } 2518 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2519 2520 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2521 if ((cp->cmd_type == CMD_SCSI) && 2522 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2523 hpsa_unmap_sg_chain_block(h, cp); 2524 2525 if ((cp->cmd_type == CMD_IOACCEL2) && 2526 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2527 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2528 2529 cmd->result = (DID_OK << 16); /* host byte */ 2530 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2531 2532 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2533 if (dev->physical_device && dev->expose_device && 2534 dev->removed) { 2535 cmd->result = DID_NO_CONNECT << 16; 2536 return hpsa_cmd_free_and_done(h, cp, cmd); 2537 } 2538 if (likely(cp->phys_disk != NULL)) 2539 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2540 } 2541 2542 /* 2543 * We check for lockup status here as it may be set for 2544 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2545 * fail_all_oustanding_cmds() 2546 */ 2547 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2548 /* DID_NO_CONNECT will prevent a retry */ 2549 cmd->result = DID_NO_CONNECT << 16; 2550 return hpsa_cmd_free_and_done(h, cp, cmd); 2551 } 2552 2553 if ((unlikely(hpsa_is_pending_event(cp)))) { 2554 if (cp->reset_pending) 2555 return hpsa_cmd_free_and_done(h, cp, cmd); 2556 if (cp->abort_pending) 2557 return hpsa_cmd_abort_and_free(h, cp, cmd); 2558 } 2559 2560 if (cp->cmd_type == CMD_IOACCEL2) 2561 return process_ioaccel2_completion(h, cp, cmd, dev); 2562 2563 scsi_set_resid(cmd, ei->ResidualCnt); 2564 if (ei->CommandStatus == 0) 2565 return hpsa_cmd_free_and_done(h, cp, cmd); 2566 2567 /* For I/O accelerator commands, copy over some fields to the normal 2568 * CISS header used below for error handling. 2569 */ 2570 if (cp->cmd_type == CMD_IOACCEL1) { 2571 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2572 cp->Header.SGList = scsi_sg_count(cmd); 2573 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2574 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2575 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2576 cp->Header.tag = c->tag; 2577 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2578 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2579 2580 /* Any RAID offload error results in retry which will use 2581 * the normal I/O path so the controller can handle whatever's 2582 * wrong. 2583 */ 2584 if (is_logical_device(dev)) { 2585 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2586 dev->offload_enabled = 0; 2587 return hpsa_retry_cmd(h, cp); 2588 } 2589 } 2590 2591 /* an error has occurred */ 2592 switch (ei->CommandStatus) { 2593 2594 case CMD_TARGET_STATUS: 2595 cmd->result |= ei->ScsiStatus; 2596 /* copy the sense data */ 2597 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2598 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2599 else 2600 sense_data_size = sizeof(ei->SenseInfo); 2601 if (ei->SenseLen < sense_data_size) 2602 sense_data_size = ei->SenseLen; 2603 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2604 if (ei->ScsiStatus) 2605 decode_sense_data(ei->SenseInfo, sense_data_size, 2606 &sense_key, &asc, &ascq); 2607 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2608 if (sense_key == ABORTED_COMMAND) { 2609 cmd->result |= DID_SOFT_ERROR << 16; 2610 break; 2611 } 2612 break; 2613 } 2614 /* Problem was not a check condition 2615 * Pass it up to the upper layers... 2616 */ 2617 if (ei->ScsiStatus) { 2618 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2619 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2620 "Returning result: 0x%x\n", 2621 cp, ei->ScsiStatus, 2622 sense_key, asc, ascq, 2623 cmd->result); 2624 } else { /* scsi status is zero??? How??? */ 2625 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2626 "Returning no connection.\n", cp), 2627 2628 /* Ordinarily, this case should never happen, 2629 * but there is a bug in some released firmware 2630 * revisions that allows it to happen if, for 2631 * example, a 4100 backplane loses power and 2632 * the tape drive is in it. We assume that 2633 * it's a fatal error of some kind because we 2634 * can't show that it wasn't. We will make it 2635 * look like selection timeout since that is 2636 * the most common reason for this to occur, 2637 * and it's severe enough. 2638 */ 2639 2640 cmd->result = DID_NO_CONNECT << 16; 2641 } 2642 break; 2643 2644 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2645 break; 2646 case CMD_DATA_OVERRUN: 2647 dev_warn(&h->pdev->dev, 2648 "CDB %16phN data overrun\n", cp->Request.CDB); 2649 break; 2650 case CMD_INVALID: { 2651 /* print_bytes(cp, sizeof(*cp), 1, 0); 2652 print_cmd(cp); */ 2653 /* We get CMD_INVALID if you address a non-existent device 2654 * instead of a selection timeout (no response). You will 2655 * see this if you yank out a drive, then try to access it. 2656 * This is kind of a shame because it means that any other 2657 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2658 * missing target. */ 2659 cmd->result = DID_NO_CONNECT << 16; 2660 } 2661 break; 2662 case CMD_PROTOCOL_ERR: 2663 cmd->result = DID_ERROR << 16; 2664 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2665 cp->Request.CDB); 2666 break; 2667 case CMD_HARDWARE_ERR: 2668 cmd->result = DID_ERROR << 16; 2669 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2670 cp->Request.CDB); 2671 break; 2672 case CMD_CONNECTION_LOST: 2673 cmd->result = DID_ERROR << 16; 2674 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2675 cp->Request.CDB); 2676 break; 2677 case CMD_ABORTED: 2678 /* Return now to avoid calling scsi_done(). */ 2679 return hpsa_cmd_abort_and_free(h, cp, cmd); 2680 case CMD_ABORT_FAILED: 2681 cmd->result = DID_ERROR << 16; 2682 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2683 cp->Request.CDB); 2684 break; 2685 case CMD_UNSOLICITED_ABORT: 2686 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2687 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2688 cp->Request.CDB); 2689 break; 2690 case CMD_TIMEOUT: 2691 cmd->result = DID_TIME_OUT << 16; 2692 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2693 cp->Request.CDB); 2694 break; 2695 case CMD_UNABORTABLE: 2696 cmd->result = DID_ERROR << 16; 2697 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2698 break; 2699 case CMD_TMF_STATUS: 2700 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2701 cmd->result = DID_ERROR << 16; 2702 break; 2703 case CMD_IOACCEL_DISABLED: 2704 /* This only handles the direct pass-through case since RAID 2705 * offload is handled above. Just attempt a retry. 2706 */ 2707 cmd->result = DID_SOFT_ERROR << 16; 2708 dev_warn(&h->pdev->dev, 2709 "cp %p had HP SSD Smart Path error\n", cp); 2710 break; 2711 default: 2712 cmd->result = DID_ERROR << 16; 2713 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2714 cp, ei->CommandStatus); 2715 } 2716 2717 return hpsa_cmd_free_and_done(h, cp, cmd); 2718 } 2719 2720 static void hpsa_pci_unmap(struct pci_dev *pdev, 2721 struct CommandList *c, int sg_used, int data_direction) 2722 { 2723 int i; 2724 2725 for (i = 0; i < sg_used; i++) 2726 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2727 le32_to_cpu(c->SG[i].Len), 2728 data_direction); 2729 } 2730 2731 static int hpsa_map_one(struct pci_dev *pdev, 2732 struct CommandList *cp, 2733 unsigned char *buf, 2734 size_t buflen, 2735 int data_direction) 2736 { 2737 u64 addr64; 2738 2739 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2740 cp->Header.SGList = 0; 2741 cp->Header.SGTotal = cpu_to_le16(0); 2742 return 0; 2743 } 2744 2745 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2746 if (dma_mapping_error(&pdev->dev, addr64)) { 2747 /* Prevent subsequent unmap of something never mapped */ 2748 cp->Header.SGList = 0; 2749 cp->Header.SGTotal = cpu_to_le16(0); 2750 return -1; 2751 } 2752 cp->SG[0].Addr = cpu_to_le64(addr64); 2753 cp->SG[0].Len = cpu_to_le32(buflen); 2754 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2755 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2756 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2757 return 0; 2758 } 2759 2760 #define NO_TIMEOUT ((unsigned long) -1) 2761 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2762 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2763 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2764 { 2765 DECLARE_COMPLETION_ONSTACK(wait); 2766 2767 c->waiting = &wait; 2768 __enqueue_cmd_and_start_io(h, c, reply_queue); 2769 if (timeout_msecs == NO_TIMEOUT) { 2770 /* TODO: get rid of this no-timeout thing */ 2771 wait_for_completion_io(&wait); 2772 return IO_OK; 2773 } 2774 if (!wait_for_completion_io_timeout(&wait, 2775 msecs_to_jiffies(timeout_msecs))) { 2776 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2777 return -ETIMEDOUT; 2778 } 2779 return IO_OK; 2780 } 2781 2782 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2783 int reply_queue, unsigned long timeout_msecs) 2784 { 2785 if (unlikely(lockup_detected(h))) { 2786 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2787 return IO_OK; 2788 } 2789 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2790 } 2791 2792 static u32 lockup_detected(struct ctlr_info *h) 2793 { 2794 int cpu; 2795 u32 rc, *lockup_detected; 2796 2797 cpu = get_cpu(); 2798 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2799 rc = *lockup_detected; 2800 put_cpu(); 2801 return rc; 2802 } 2803 2804 #define MAX_DRIVER_CMD_RETRIES 25 2805 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2806 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2807 { 2808 int backoff_time = 10, retry_count = 0; 2809 int rc; 2810 2811 do { 2812 memset(c->err_info, 0, sizeof(*c->err_info)); 2813 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2814 timeout_msecs); 2815 if (rc) 2816 break; 2817 retry_count++; 2818 if (retry_count > 3) { 2819 msleep(backoff_time); 2820 if (backoff_time < 1000) 2821 backoff_time *= 2; 2822 } 2823 } while ((check_for_unit_attention(h, c) || 2824 check_for_busy(h, c)) && 2825 retry_count <= MAX_DRIVER_CMD_RETRIES); 2826 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2827 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2828 rc = -EIO; 2829 return rc; 2830 } 2831 2832 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2833 struct CommandList *c) 2834 { 2835 const u8 *cdb = c->Request.CDB; 2836 const u8 *lun = c->Header.LUN.LunAddrBytes; 2837 2838 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2839 txt, lun, cdb); 2840 } 2841 2842 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2843 struct CommandList *cp) 2844 { 2845 const struct ErrorInfo *ei = cp->err_info; 2846 struct device *d = &cp->h->pdev->dev; 2847 u8 sense_key, asc, ascq; 2848 int sense_len; 2849 2850 switch (ei->CommandStatus) { 2851 case CMD_TARGET_STATUS: 2852 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2853 sense_len = sizeof(ei->SenseInfo); 2854 else 2855 sense_len = ei->SenseLen; 2856 decode_sense_data(ei->SenseInfo, sense_len, 2857 &sense_key, &asc, &ascq); 2858 hpsa_print_cmd(h, "SCSI status", cp); 2859 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2860 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2861 sense_key, asc, ascq); 2862 else 2863 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2864 if (ei->ScsiStatus == 0) 2865 dev_warn(d, "SCSI status is abnormally zero. " 2866 "(probably indicates selection timeout " 2867 "reported incorrectly due to a known " 2868 "firmware bug, circa July, 2001.)\n"); 2869 break; 2870 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2871 break; 2872 case CMD_DATA_OVERRUN: 2873 hpsa_print_cmd(h, "overrun condition", cp); 2874 break; 2875 case CMD_INVALID: { 2876 /* controller unfortunately reports SCSI passthru's 2877 * to non-existent targets as invalid commands. 2878 */ 2879 hpsa_print_cmd(h, "invalid command", cp); 2880 dev_warn(d, "probably means device no longer present\n"); 2881 } 2882 break; 2883 case CMD_PROTOCOL_ERR: 2884 hpsa_print_cmd(h, "protocol error", cp); 2885 break; 2886 case CMD_HARDWARE_ERR: 2887 hpsa_print_cmd(h, "hardware error", cp); 2888 break; 2889 case CMD_CONNECTION_LOST: 2890 hpsa_print_cmd(h, "connection lost", cp); 2891 break; 2892 case CMD_ABORTED: 2893 hpsa_print_cmd(h, "aborted", cp); 2894 break; 2895 case CMD_ABORT_FAILED: 2896 hpsa_print_cmd(h, "abort failed", cp); 2897 break; 2898 case CMD_UNSOLICITED_ABORT: 2899 hpsa_print_cmd(h, "unsolicited abort", cp); 2900 break; 2901 case CMD_TIMEOUT: 2902 hpsa_print_cmd(h, "timed out", cp); 2903 break; 2904 case CMD_UNABORTABLE: 2905 hpsa_print_cmd(h, "unabortable", cp); 2906 break; 2907 case CMD_CTLR_LOCKUP: 2908 hpsa_print_cmd(h, "controller lockup detected", cp); 2909 break; 2910 default: 2911 hpsa_print_cmd(h, "unknown status", cp); 2912 dev_warn(d, "Unknown command status %x\n", 2913 ei->CommandStatus); 2914 } 2915 } 2916 2917 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2918 u16 page, unsigned char *buf, 2919 unsigned char bufsize) 2920 { 2921 int rc = IO_OK; 2922 struct CommandList *c; 2923 struct ErrorInfo *ei; 2924 2925 c = cmd_alloc(h); 2926 2927 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2928 page, scsi3addr, TYPE_CMD)) { 2929 rc = -1; 2930 goto out; 2931 } 2932 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2933 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2934 if (rc) 2935 goto out; 2936 ei = c->err_info; 2937 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2938 hpsa_scsi_interpret_error(h, c); 2939 rc = -1; 2940 } 2941 out: 2942 cmd_free(h, c); 2943 return rc; 2944 } 2945 2946 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2947 u8 reset_type, int reply_queue) 2948 { 2949 int rc = IO_OK; 2950 struct CommandList *c; 2951 struct ErrorInfo *ei; 2952 2953 c = cmd_alloc(h); 2954 2955 2956 /* fill_cmd can't fail here, no data buffer to map. */ 2957 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2958 scsi3addr, TYPE_MSG); 2959 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 2960 if (rc) { 2961 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2962 goto out; 2963 } 2964 /* no unmap needed here because no data xfer. */ 2965 2966 ei = c->err_info; 2967 if (ei->CommandStatus != 0) { 2968 hpsa_scsi_interpret_error(h, c); 2969 rc = -1; 2970 } 2971 out: 2972 cmd_free(h, c); 2973 return rc; 2974 } 2975 2976 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2977 struct hpsa_scsi_dev_t *dev, 2978 unsigned char *scsi3addr) 2979 { 2980 int i; 2981 bool match = false; 2982 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2983 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2984 2985 if (hpsa_is_cmd_idle(c)) 2986 return false; 2987 2988 switch (c->cmd_type) { 2989 case CMD_SCSI: 2990 case CMD_IOCTL_PEND: 2991 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2992 sizeof(c->Header.LUN.LunAddrBytes)); 2993 break; 2994 2995 case CMD_IOACCEL1: 2996 case CMD_IOACCEL2: 2997 if (c->phys_disk == dev) { 2998 /* HBA mode match */ 2999 match = true; 3000 } else { 3001 /* Possible RAID mode -- check each phys dev. */ 3002 /* FIXME: Do we need to take out a lock here? If 3003 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3004 * instead. */ 3005 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3006 /* FIXME: an alternate test might be 3007 * 3008 * match = dev->phys_disk[i]->ioaccel_handle 3009 * == c2->scsi_nexus; */ 3010 match = dev->phys_disk[i] == c->phys_disk; 3011 } 3012 } 3013 break; 3014 3015 case IOACCEL2_TMF: 3016 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3017 match = dev->phys_disk[i]->ioaccel_handle == 3018 le32_to_cpu(ac->it_nexus); 3019 } 3020 break; 3021 3022 case 0: /* The command is in the middle of being initialized. */ 3023 match = false; 3024 break; 3025 3026 default: 3027 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3028 c->cmd_type); 3029 BUG(); 3030 } 3031 3032 return match; 3033 } 3034 3035 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3036 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3037 { 3038 int i; 3039 int rc = 0; 3040 3041 /* We can really only handle one reset at a time */ 3042 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3043 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3044 return -EINTR; 3045 } 3046 3047 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3048 3049 for (i = 0; i < h->nr_cmds; i++) { 3050 struct CommandList *c = h->cmd_pool + i; 3051 int refcount = atomic_inc_return(&c->refcount); 3052 3053 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3054 unsigned long flags; 3055 3056 /* 3057 * Mark the target command as having a reset pending, 3058 * then lock a lock so that the command cannot complete 3059 * while we're considering it. If the command is not 3060 * idle then count it; otherwise revoke the event. 3061 */ 3062 c->reset_pending = dev; 3063 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3064 if (!hpsa_is_cmd_idle(c)) 3065 atomic_inc(&dev->reset_cmds_out); 3066 else 3067 c->reset_pending = NULL; 3068 spin_unlock_irqrestore(&h->lock, flags); 3069 } 3070 3071 cmd_free(h, c); 3072 } 3073 3074 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3075 if (!rc) 3076 wait_event(h->event_sync_wait_queue, 3077 atomic_read(&dev->reset_cmds_out) == 0 || 3078 lockup_detected(h)); 3079 3080 if (unlikely(lockup_detected(h))) { 3081 dev_warn(&h->pdev->dev, 3082 "Controller lockup detected during reset wait\n"); 3083 rc = -ENODEV; 3084 } 3085 3086 if (unlikely(rc)) 3087 atomic_set(&dev->reset_cmds_out, 0); 3088 else 3089 wait_for_device_to_become_ready(h, scsi3addr, 0); 3090 3091 mutex_unlock(&h->reset_mutex); 3092 return rc; 3093 } 3094 3095 static void hpsa_get_raid_level(struct ctlr_info *h, 3096 unsigned char *scsi3addr, unsigned char *raid_level) 3097 { 3098 int rc; 3099 unsigned char *buf; 3100 3101 *raid_level = RAID_UNKNOWN; 3102 buf = kzalloc(64, GFP_KERNEL); 3103 if (!buf) 3104 return; 3105 3106 if (!hpsa_vpd_page_supported(h, scsi3addr, 3107 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3108 goto exit; 3109 3110 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3111 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3112 3113 if (rc == 0) 3114 *raid_level = buf[8]; 3115 if (*raid_level > RAID_UNKNOWN) 3116 *raid_level = RAID_UNKNOWN; 3117 exit: 3118 kfree(buf); 3119 return; 3120 } 3121 3122 #define HPSA_MAP_DEBUG 3123 #ifdef HPSA_MAP_DEBUG 3124 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3125 struct raid_map_data *map_buff) 3126 { 3127 struct raid_map_disk_data *dd = &map_buff->data[0]; 3128 int map, row, col; 3129 u16 map_cnt, row_cnt, disks_per_row; 3130 3131 if (rc != 0) 3132 return; 3133 3134 /* Show details only if debugging has been activated. */ 3135 if (h->raid_offload_debug < 2) 3136 return; 3137 3138 dev_info(&h->pdev->dev, "structure_size = %u\n", 3139 le32_to_cpu(map_buff->structure_size)); 3140 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3141 le32_to_cpu(map_buff->volume_blk_size)); 3142 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3143 le64_to_cpu(map_buff->volume_blk_cnt)); 3144 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3145 map_buff->phys_blk_shift); 3146 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3147 map_buff->parity_rotation_shift); 3148 dev_info(&h->pdev->dev, "strip_size = %u\n", 3149 le16_to_cpu(map_buff->strip_size)); 3150 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3151 le64_to_cpu(map_buff->disk_starting_blk)); 3152 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3153 le64_to_cpu(map_buff->disk_blk_cnt)); 3154 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3155 le16_to_cpu(map_buff->data_disks_per_row)); 3156 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3157 le16_to_cpu(map_buff->metadata_disks_per_row)); 3158 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3159 le16_to_cpu(map_buff->row_cnt)); 3160 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3161 le16_to_cpu(map_buff->layout_map_count)); 3162 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3163 le16_to_cpu(map_buff->flags)); 3164 dev_info(&h->pdev->dev, "encrypytion = %s\n", 3165 le16_to_cpu(map_buff->flags) & 3166 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3167 dev_info(&h->pdev->dev, "dekindex = %u\n", 3168 le16_to_cpu(map_buff->dekindex)); 3169 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3170 for (map = 0; map < map_cnt; map++) { 3171 dev_info(&h->pdev->dev, "Map%u:\n", map); 3172 row_cnt = le16_to_cpu(map_buff->row_cnt); 3173 for (row = 0; row < row_cnt; row++) { 3174 dev_info(&h->pdev->dev, " Row%u:\n", row); 3175 disks_per_row = 3176 le16_to_cpu(map_buff->data_disks_per_row); 3177 for (col = 0; col < disks_per_row; col++, dd++) 3178 dev_info(&h->pdev->dev, 3179 " D%02u: h=0x%04x xor=%u,%u\n", 3180 col, dd->ioaccel_handle, 3181 dd->xor_mult[0], dd->xor_mult[1]); 3182 disks_per_row = 3183 le16_to_cpu(map_buff->metadata_disks_per_row); 3184 for (col = 0; col < disks_per_row; col++, dd++) 3185 dev_info(&h->pdev->dev, 3186 " M%02u: h=0x%04x xor=%u,%u\n", 3187 col, dd->ioaccel_handle, 3188 dd->xor_mult[0], dd->xor_mult[1]); 3189 } 3190 } 3191 } 3192 #else 3193 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3194 __attribute__((unused)) int rc, 3195 __attribute__((unused)) struct raid_map_data *map_buff) 3196 { 3197 } 3198 #endif 3199 3200 static int hpsa_get_raid_map(struct ctlr_info *h, 3201 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3202 { 3203 int rc = 0; 3204 struct CommandList *c; 3205 struct ErrorInfo *ei; 3206 3207 c = cmd_alloc(h); 3208 3209 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3210 sizeof(this_device->raid_map), 0, 3211 scsi3addr, TYPE_CMD)) { 3212 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3213 cmd_free(h, c); 3214 return -1; 3215 } 3216 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3217 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3218 if (rc) 3219 goto out; 3220 ei = c->err_info; 3221 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3222 hpsa_scsi_interpret_error(h, c); 3223 rc = -1; 3224 goto out; 3225 } 3226 cmd_free(h, c); 3227 3228 /* @todo in the future, dynamically allocate RAID map memory */ 3229 if (le32_to_cpu(this_device->raid_map.structure_size) > 3230 sizeof(this_device->raid_map)) { 3231 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3232 rc = -1; 3233 } 3234 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3235 return rc; 3236 out: 3237 cmd_free(h, c); 3238 return rc; 3239 } 3240 3241 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3242 unsigned char scsi3addr[], u16 bmic_device_index, 3243 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3244 { 3245 int rc = IO_OK; 3246 struct CommandList *c; 3247 struct ErrorInfo *ei; 3248 3249 c = cmd_alloc(h); 3250 3251 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3252 0, RAID_CTLR_LUNID, TYPE_CMD); 3253 if (rc) 3254 goto out; 3255 3256 c->Request.CDB[2] = bmic_device_index & 0xff; 3257 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3258 3259 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3260 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3261 if (rc) 3262 goto out; 3263 ei = c->err_info; 3264 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3265 hpsa_scsi_interpret_error(h, c); 3266 rc = -1; 3267 } 3268 out: 3269 cmd_free(h, c); 3270 return rc; 3271 } 3272 3273 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3274 struct bmic_identify_controller *buf, size_t bufsize) 3275 { 3276 int rc = IO_OK; 3277 struct CommandList *c; 3278 struct ErrorInfo *ei; 3279 3280 c = cmd_alloc(h); 3281 3282 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3283 0, RAID_CTLR_LUNID, TYPE_CMD); 3284 if (rc) 3285 goto out; 3286 3287 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3288 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3289 if (rc) 3290 goto out; 3291 ei = c->err_info; 3292 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3293 hpsa_scsi_interpret_error(h, c); 3294 rc = -1; 3295 } 3296 out: 3297 cmd_free(h, c); 3298 return rc; 3299 } 3300 3301 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3302 unsigned char scsi3addr[], u16 bmic_device_index, 3303 struct bmic_identify_physical_device *buf, size_t bufsize) 3304 { 3305 int rc = IO_OK; 3306 struct CommandList *c; 3307 struct ErrorInfo *ei; 3308 3309 c = cmd_alloc(h); 3310 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3311 0, RAID_CTLR_LUNID, TYPE_CMD); 3312 if (rc) 3313 goto out; 3314 3315 c->Request.CDB[2] = bmic_device_index & 0xff; 3316 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3317 3318 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3319 DEFAULT_TIMEOUT); 3320 ei = c->err_info; 3321 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3322 hpsa_scsi_interpret_error(h, c); 3323 rc = -1; 3324 } 3325 out: 3326 cmd_free(h, c); 3327 3328 return rc; 3329 } 3330 3331 /* 3332 * get enclosure information 3333 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3334 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3335 * Uses id_physical_device to determine the box_index. 3336 */ 3337 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3338 unsigned char *scsi3addr, 3339 struct ReportExtendedLUNdata *rlep, int rle_index, 3340 struct hpsa_scsi_dev_t *encl_dev) 3341 { 3342 int rc = -1; 3343 struct CommandList *c = NULL; 3344 struct ErrorInfo *ei = NULL; 3345 struct bmic_sense_storage_box_params *bssbp = NULL; 3346 struct bmic_identify_physical_device *id_phys = NULL; 3347 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3348 u16 bmic_device_index = 0; 3349 3350 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3351 3352 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3353 rc = IO_OK; 3354 goto out; 3355 } 3356 3357 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3358 if (!bssbp) 3359 goto out; 3360 3361 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3362 if (!id_phys) 3363 goto out; 3364 3365 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3366 id_phys, sizeof(*id_phys)); 3367 if (rc) { 3368 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3369 __func__, encl_dev->external, bmic_device_index); 3370 goto out; 3371 } 3372 3373 c = cmd_alloc(h); 3374 3375 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3376 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3377 3378 if (rc) 3379 goto out; 3380 3381 if (id_phys->phys_connector[1] == 'E') 3382 c->Request.CDB[5] = id_phys->box_index; 3383 else 3384 c->Request.CDB[5] = 0; 3385 3386 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3387 DEFAULT_TIMEOUT); 3388 if (rc) 3389 goto out; 3390 3391 ei = c->err_info; 3392 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3393 rc = -1; 3394 goto out; 3395 } 3396 3397 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3398 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3399 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3400 3401 rc = IO_OK; 3402 out: 3403 kfree(bssbp); 3404 kfree(id_phys); 3405 3406 if (c) 3407 cmd_free(h, c); 3408 3409 if (rc != IO_OK) 3410 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3411 "Error, could not get enclosure information\n"); 3412 } 3413 3414 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3415 unsigned char *scsi3addr) 3416 { 3417 struct ReportExtendedLUNdata *physdev; 3418 u32 nphysicals; 3419 u64 sa = 0; 3420 int i; 3421 3422 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3423 if (!physdev) 3424 return 0; 3425 3426 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3427 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3428 kfree(physdev); 3429 return 0; 3430 } 3431 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3432 3433 for (i = 0; i < nphysicals; i++) 3434 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3435 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3436 break; 3437 } 3438 3439 kfree(physdev); 3440 3441 return sa; 3442 } 3443 3444 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3445 struct hpsa_scsi_dev_t *dev) 3446 { 3447 int rc; 3448 u64 sa = 0; 3449 3450 if (is_hba_lunid(scsi3addr)) { 3451 struct bmic_sense_subsystem_info *ssi; 3452 3453 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3454 if (!ssi) 3455 return; 3456 3457 rc = hpsa_bmic_sense_subsystem_information(h, 3458 scsi3addr, 0, ssi, sizeof(*ssi)); 3459 if (rc == 0) { 3460 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3461 h->sas_address = sa; 3462 } 3463 3464 kfree(ssi); 3465 } else 3466 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3467 3468 dev->sas_address = sa; 3469 } 3470 3471 /* Get a device id from inquiry page 0x83 */ 3472 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3473 unsigned char scsi3addr[], u8 page) 3474 { 3475 int rc; 3476 int i; 3477 int pages; 3478 unsigned char *buf, bufsize; 3479 3480 buf = kzalloc(256, GFP_KERNEL); 3481 if (!buf) 3482 return false; 3483 3484 /* Get the size of the page list first */ 3485 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3486 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3487 buf, HPSA_VPD_HEADER_SZ); 3488 if (rc != 0) 3489 goto exit_unsupported; 3490 pages = buf[3]; 3491 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3492 bufsize = pages + HPSA_VPD_HEADER_SZ; 3493 else 3494 bufsize = 255; 3495 3496 /* Get the whole VPD page list */ 3497 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3498 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3499 buf, bufsize); 3500 if (rc != 0) 3501 goto exit_unsupported; 3502 3503 pages = buf[3]; 3504 for (i = 1; i <= pages; i++) 3505 if (buf[3 + i] == page) 3506 goto exit_supported; 3507 exit_unsupported: 3508 kfree(buf); 3509 return false; 3510 exit_supported: 3511 kfree(buf); 3512 return true; 3513 } 3514 3515 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3516 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3517 { 3518 int rc; 3519 unsigned char *buf; 3520 u8 ioaccel_status; 3521 3522 this_device->offload_config = 0; 3523 this_device->offload_enabled = 0; 3524 this_device->offload_to_be_enabled = 0; 3525 3526 buf = kzalloc(64, GFP_KERNEL); 3527 if (!buf) 3528 return; 3529 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3530 goto out; 3531 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3532 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3533 if (rc != 0) 3534 goto out; 3535 3536 #define IOACCEL_STATUS_BYTE 4 3537 #define OFFLOAD_CONFIGURED_BIT 0x01 3538 #define OFFLOAD_ENABLED_BIT 0x02 3539 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3540 this_device->offload_config = 3541 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3542 if (this_device->offload_config) { 3543 this_device->offload_enabled = 3544 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3545 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3546 this_device->offload_enabled = 0; 3547 } 3548 this_device->offload_to_be_enabled = this_device->offload_enabled; 3549 out: 3550 kfree(buf); 3551 return; 3552 } 3553 3554 /* Get the device id from inquiry page 0x83 */ 3555 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3556 unsigned char *device_id, int index, int buflen) 3557 { 3558 int rc; 3559 unsigned char *buf; 3560 3561 /* Does controller have VPD for device id? */ 3562 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3563 return 1; /* not supported */ 3564 3565 buf = kzalloc(64, GFP_KERNEL); 3566 if (!buf) 3567 return -ENOMEM; 3568 3569 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3570 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3571 if (rc == 0) { 3572 if (buflen > 16) 3573 buflen = 16; 3574 memcpy(device_id, &buf[8], buflen); 3575 } 3576 3577 kfree(buf); 3578 3579 return rc; /*0 - got id, otherwise, didn't */ 3580 } 3581 3582 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3583 void *buf, int bufsize, 3584 int extended_response) 3585 { 3586 int rc = IO_OK; 3587 struct CommandList *c; 3588 unsigned char scsi3addr[8]; 3589 struct ErrorInfo *ei; 3590 3591 c = cmd_alloc(h); 3592 3593 /* address the controller */ 3594 memset(scsi3addr, 0, sizeof(scsi3addr)); 3595 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3596 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3597 rc = -1; 3598 goto out; 3599 } 3600 if (extended_response) 3601 c->Request.CDB[1] = extended_response; 3602 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3603 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3604 if (rc) 3605 goto out; 3606 ei = c->err_info; 3607 if (ei->CommandStatus != 0 && 3608 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3609 hpsa_scsi_interpret_error(h, c); 3610 rc = -1; 3611 } else { 3612 struct ReportLUNdata *rld = buf; 3613 3614 if (rld->extended_response_flag != extended_response) { 3615 dev_err(&h->pdev->dev, 3616 "report luns requested format %u, got %u\n", 3617 extended_response, 3618 rld->extended_response_flag); 3619 rc = -1; 3620 } 3621 } 3622 out: 3623 cmd_free(h, c); 3624 return rc; 3625 } 3626 3627 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3628 struct ReportExtendedLUNdata *buf, int bufsize) 3629 { 3630 int rc; 3631 struct ReportLUNdata *lbuf; 3632 3633 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3634 HPSA_REPORT_PHYS_EXTENDED); 3635 if (!rc || !hpsa_allow_any) 3636 return rc; 3637 3638 /* REPORT PHYS EXTENDED is not supported */ 3639 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3640 if (!lbuf) 3641 return -ENOMEM; 3642 3643 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3644 if (!rc) { 3645 int i; 3646 u32 nphys; 3647 3648 /* Copy ReportLUNdata header */ 3649 memcpy(buf, lbuf, 8); 3650 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3651 for (i = 0; i < nphys; i++) 3652 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3653 } 3654 kfree(lbuf); 3655 return rc; 3656 } 3657 3658 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3659 struct ReportLUNdata *buf, int bufsize) 3660 { 3661 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3662 } 3663 3664 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3665 int bus, int target, int lun) 3666 { 3667 device->bus = bus; 3668 device->target = target; 3669 device->lun = lun; 3670 } 3671 3672 /* Use VPD inquiry to get details of volume status */ 3673 static int hpsa_get_volume_status(struct ctlr_info *h, 3674 unsigned char scsi3addr[]) 3675 { 3676 int rc; 3677 int status; 3678 int size; 3679 unsigned char *buf; 3680 3681 buf = kzalloc(64, GFP_KERNEL); 3682 if (!buf) 3683 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3684 3685 /* Does controller have VPD for logical volume status? */ 3686 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3687 goto exit_failed; 3688 3689 /* Get the size of the VPD return buffer */ 3690 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3691 buf, HPSA_VPD_HEADER_SZ); 3692 if (rc != 0) 3693 goto exit_failed; 3694 size = buf[3]; 3695 3696 /* Now get the whole VPD buffer */ 3697 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3698 buf, size + HPSA_VPD_HEADER_SZ); 3699 if (rc != 0) 3700 goto exit_failed; 3701 status = buf[4]; /* status byte */ 3702 3703 kfree(buf); 3704 return status; 3705 exit_failed: 3706 kfree(buf); 3707 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3708 } 3709 3710 /* Determine offline status of a volume. 3711 * Return either: 3712 * 0 (not offline) 3713 * 0xff (offline for unknown reasons) 3714 * # (integer code indicating one of several NOT READY states 3715 * describing why a volume is to be kept offline) 3716 */ 3717 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3718 unsigned char scsi3addr[]) 3719 { 3720 struct CommandList *c; 3721 unsigned char *sense; 3722 u8 sense_key, asc, ascq; 3723 int sense_len; 3724 int rc, ldstat = 0; 3725 u16 cmd_status; 3726 u8 scsi_status; 3727 #define ASC_LUN_NOT_READY 0x04 3728 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3729 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3730 3731 c = cmd_alloc(h); 3732 3733 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3734 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3735 DEFAULT_TIMEOUT); 3736 if (rc) { 3737 cmd_free(h, c); 3738 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3739 } 3740 sense = c->err_info->SenseInfo; 3741 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3742 sense_len = sizeof(c->err_info->SenseInfo); 3743 else 3744 sense_len = c->err_info->SenseLen; 3745 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3746 cmd_status = c->err_info->CommandStatus; 3747 scsi_status = c->err_info->ScsiStatus; 3748 cmd_free(h, c); 3749 3750 /* Determine the reason for not ready state */ 3751 ldstat = hpsa_get_volume_status(h, scsi3addr); 3752 3753 /* Keep volume offline in certain cases: */ 3754 switch (ldstat) { 3755 case HPSA_LV_FAILED: 3756 case HPSA_LV_UNDERGOING_ERASE: 3757 case HPSA_LV_NOT_AVAILABLE: 3758 case HPSA_LV_UNDERGOING_RPI: 3759 case HPSA_LV_PENDING_RPI: 3760 case HPSA_LV_ENCRYPTED_NO_KEY: 3761 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3762 case HPSA_LV_UNDERGOING_ENCRYPTION: 3763 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3764 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3765 return ldstat; 3766 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3767 /* If VPD status page isn't available, 3768 * use ASC/ASCQ to determine state 3769 */ 3770 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3771 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3772 return ldstat; 3773 break; 3774 default: 3775 break; 3776 } 3777 return HPSA_LV_OK; 3778 } 3779 3780 /* 3781 * Find out if a logical device supports aborts by simply trying one. 3782 * Smart Array may claim not to support aborts on logical drives, but 3783 * if a MSA2000 * is connected, the drives on that will be presented 3784 * by the Smart Array as logical drives, and aborts may be sent to 3785 * those devices successfully. So the simplest way to find out is 3786 * to simply try an abort and see how the device responds. 3787 */ 3788 static int hpsa_device_supports_aborts(struct ctlr_info *h, 3789 unsigned char *scsi3addr) 3790 { 3791 struct CommandList *c; 3792 struct ErrorInfo *ei; 3793 int rc = 0; 3794 3795 u64 tag = (u64) -1; /* bogus tag */ 3796 3797 /* Assume that physical devices support aborts */ 3798 if (!is_logical_dev_addr_mode(scsi3addr)) 3799 return 1; 3800 3801 c = cmd_alloc(h); 3802 3803 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3804 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3805 DEFAULT_TIMEOUT); 3806 /* no unmap needed here because no data xfer. */ 3807 ei = c->err_info; 3808 switch (ei->CommandStatus) { 3809 case CMD_INVALID: 3810 rc = 0; 3811 break; 3812 case CMD_UNABORTABLE: 3813 case CMD_ABORT_FAILED: 3814 rc = 1; 3815 break; 3816 case CMD_TMF_STATUS: 3817 rc = hpsa_evaluate_tmf_status(h, c); 3818 break; 3819 default: 3820 rc = 0; 3821 break; 3822 } 3823 cmd_free(h, c); 3824 return rc; 3825 } 3826 3827 static int hpsa_update_device_info(struct ctlr_info *h, 3828 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3829 unsigned char *is_OBDR_device) 3830 { 3831 3832 #define OBDR_SIG_OFFSET 43 3833 #define OBDR_TAPE_SIG "$DR-10" 3834 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3835 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3836 3837 unsigned char *inq_buff; 3838 unsigned char *obdr_sig; 3839 int rc = 0; 3840 3841 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3842 if (!inq_buff) { 3843 rc = -ENOMEM; 3844 goto bail_out; 3845 } 3846 3847 /* Do an inquiry to the device to see what it is. */ 3848 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3849 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3850 dev_err(&h->pdev->dev, 3851 "%s: inquiry failed, device will be skipped.\n", 3852 __func__); 3853 rc = HPSA_INQUIRY_FAILED; 3854 goto bail_out; 3855 } 3856 3857 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3858 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3859 3860 this_device->devtype = (inq_buff[0] & 0x1f); 3861 memcpy(this_device->scsi3addr, scsi3addr, 8); 3862 memcpy(this_device->vendor, &inq_buff[8], 3863 sizeof(this_device->vendor)); 3864 memcpy(this_device->model, &inq_buff[16], 3865 sizeof(this_device->model)); 3866 this_device->rev = inq_buff[2]; 3867 memset(this_device->device_id, 0, 3868 sizeof(this_device->device_id)); 3869 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3870 sizeof(this_device->device_id))) 3871 dev_err(&h->pdev->dev, 3872 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3873 h->ctlr, __func__, 3874 h->scsi_host->host_no, 3875 this_device->target, this_device->lun, 3876 scsi_device_type(this_device->devtype), 3877 this_device->model); 3878 3879 if ((this_device->devtype == TYPE_DISK || 3880 this_device->devtype == TYPE_ZBC) && 3881 is_logical_dev_addr_mode(scsi3addr)) { 3882 unsigned char volume_offline; 3883 3884 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3885 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3886 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3887 volume_offline = hpsa_volume_offline(h, scsi3addr); 3888 this_device->volume_offline = volume_offline; 3889 if (volume_offline == HPSA_LV_FAILED) { 3890 rc = HPSA_LV_FAILED; 3891 dev_err(&h->pdev->dev, 3892 "%s: LV failed, device will be skipped.\n", 3893 __func__); 3894 goto bail_out; 3895 } 3896 } else { 3897 this_device->raid_level = RAID_UNKNOWN; 3898 this_device->offload_config = 0; 3899 this_device->offload_enabled = 0; 3900 this_device->offload_to_be_enabled = 0; 3901 this_device->hba_ioaccel_enabled = 0; 3902 this_device->volume_offline = 0; 3903 this_device->queue_depth = h->nr_cmds; 3904 } 3905 3906 if (is_OBDR_device) { 3907 /* See if this is a One-Button-Disaster-Recovery device 3908 * by looking for "$DR-10" at offset 43 in inquiry data. 3909 */ 3910 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3911 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3912 strncmp(obdr_sig, OBDR_TAPE_SIG, 3913 OBDR_SIG_LEN) == 0); 3914 } 3915 kfree(inq_buff); 3916 return 0; 3917 3918 bail_out: 3919 kfree(inq_buff); 3920 return rc; 3921 } 3922 3923 static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 3924 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 3925 { 3926 unsigned long flags; 3927 int rc, entry; 3928 /* 3929 * See if this device supports aborts. If we already know 3930 * the device, we already know if it supports aborts, otherwise 3931 * we have to find out if it supports aborts by trying one. 3932 */ 3933 spin_lock_irqsave(&h->devlock, flags); 3934 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 3935 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 3936 entry >= 0 && entry < h->ndevices) { 3937 dev->supports_aborts = h->dev[entry]->supports_aborts; 3938 spin_unlock_irqrestore(&h->devlock, flags); 3939 } else { 3940 spin_unlock_irqrestore(&h->devlock, flags); 3941 dev->supports_aborts = 3942 hpsa_device_supports_aborts(h, scsi3addr); 3943 if (dev->supports_aborts < 0) 3944 dev->supports_aborts = 0; 3945 } 3946 } 3947 3948 /* 3949 * Helper function to assign bus, target, lun mapping of devices. 3950 * Logical drive target and lun are assigned at this time, but 3951 * physical device lun and target assignment are deferred (assigned 3952 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3953 */ 3954 static void figure_bus_target_lun(struct ctlr_info *h, 3955 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3956 { 3957 u32 lunid = get_unaligned_le32(lunaddrbytes); 3958 3959 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3960 /* physical device, target and lun filled in later */ 3961 if (is_hba_lunid(lunaddrbytes)) { 3962 int bus = HPSA_HBA_BUS; 3963 3964 if (!device->rev) 3965 bus = HPSA_LEGACY_HBA_BUS; 3966 hpsa_set_bus_target_lun(device, 3967 bus, 0, lunid & 0x3fff); 3968 } else 3969 /* defer target, lun assignment for physical devices */ 3970 hpsa_set_bus_target_lun(device, 3971 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3972 return; 3973 } 3974 /* It's a logical device */ 3975 if (device->external) { 3976 hpsa_set_bus_target_lun(device, 3977 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3978 lunid & 0x00ff); 3979 return; 3980 } 3981 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3982 0, lunid & 0x3fff); 3983 } 3984 3985 3986 /* 3987 * Get address of physical disk used for an ioaccel2 mode command: 3988 * 1. Extract ioaccel2 handle from the command. 3989 * 2. Find a matching ioaccel2 handle from list of physical disks. 3990 * 3. Return: 3991 * 1 and set scsi3addr to address of matching physical 3992 * 0 if no matching physical disk was found. 3993 */ 3994 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 3995 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 3996 { 3997 struct io_accel2_cmd *c2 = 3998 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 3999 unsigned long flags; 4000 int i; 4001 4002 spin_lock_irqsave(&h->devlock, flags); 4003 for (i = 0; i < h->ndevices; i++) 4004 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 4005 memcpy(scsi3addr, h->dev[i]->scsi3addr, 4006 sizeof(h->dev[i]->scsi3addr)); 4007 spin_unlock_irqrestore(&h->devlock, flags); 4008 return 1; 4009 } 4010 spin_unlock_irqrestore(&h->devlock, flags); 4011 return 0; 4012 } 4013 4014 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4015 int i, int nphysicals, int nlocal_logicals) 4016 { 4017 /* In report logicals, local logicals are listed first, 4018 * then any externals. 4019 */ 4020 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4021 4022 if (i == raid_ctlr_position) 4023 return 0; 4024 4025 if (i < logicals_start) 4026 return 0; 4027 4028 /* i is in logicals range, but still within local logicals */ 4029 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4030 return 0; 4031 4032 return 1; /* it's an external lun */ 4033 } 4034 4035 /* 4036 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4037 * logdev. The number of luns in physdev and logdev are returned in 4038 * *nphysicals and *nlogicals, respectively. 4039 * Returns 0 on success, -1 otherwise. 4040 */ 4041 static int hpsa_gather_lun_info(struct ctlr_info *h, 4042 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4043 struct ReportLUNdata *logdev, u32 *nlogicals) 4044 { 4045 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4046 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4047 return -1; 4048 } 4049 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4050 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4051 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4052 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4053 *nphysicals = HPSA_MAX_PHYS_LUN; 4054 } 4055 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4056 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4057 return -1; 4058 } 4059 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4060 /* Reject Logicals in excess of our max capability. */ 4061 if (*nlogicals > HPSA_MAX_LUN) { 4062 dev_warn(&h->pdev->dev, 4063 "maximum logical LUNs (%d) exceeded. " 4064 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4065 *nlogicals - HPSA_MAX_LUN); 4066 *nlogicals = HPSA_MAX_LUN; 4067 } 4068 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4069 dev_warn(&h->pdev->dev, 4070 "maximum logical + physical LUNs (%d) exceeded. " 4071 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4072 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4073 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4074 } 4075 return 0; 4076 } 4077 4078 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4079 int i, int nphysicals, int nlogicals, 4080 struct ReportExtendedLUNdata *physdev_list, 4081 struct ReportLUNdata *logdev_list) 4082 { 4083 /* Helper function, figure out where the LUN ID info is coming from 4084 * given index i, lists of physical and logical devices, where in 4085 * the list the raid controller is supposed to appear (first or last) 4086 */ 4087 4088 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4089 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4090 4091 if (i == raid_ctlr_position) 4092 return RAID_CTLR_LUNID; 4093 4094 if (i < logicals_start) 4095 return &physdev_list->LUN[i - 4096 (raid_ctlr_position == 0)].lunid[0]; 4097 4098 if (i < last_device) 4099 return &logdev_list->LUN[i - nphysicals - 4100 (raid_ctlr_position == 0)][0]; 4101 BUG(); 4102 return NULL; 4103 } 4104 4105 /* get physical drive ioaccel handle and queue depth */ 4106 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4107 struct hpsa_scsi_dev_t *dev, 4108 struct ReportExtendedLUNdata *rlep, int rle_index, 4109 struct bmic_identify_physical_device *id_phys) 4110 { 4111 int rc; 4112 struct ext_report_lun_entry *rle; 4113 4114 /* 4115 * external targets don't support BMIC 4116 */ 4117 if (dev->external) { 4118 dev->queue_depth = 7; 4119 return; 4120 } 4121 4122 rle = &rlep->LUN[rle_index]; 4123 4124 dev->ioaccel_handle = rle->ioaccel_handle; 4125 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4126 dev->hba_ioaccel_enabled = 1; 4127 memset(id_phys, 0, sizeof(*id_phys)); 4128 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4129 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4130 sizeof(*id_phys)); 4131 if (!rc) 4132 /* Reserve space for FW operations */ 4133 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4134 #define DRIVE_QUEUE_DEPTH 7 4135 dev->queue_depth = 4136 le16_to_cpu(id_phys->current_queue_depth_limit) - 4137 DRIVE_CMDS_RESERVED_FOR_FW; 4138 else 4139 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4140 } 4141 4142 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4143 struct ReportExtendedLUNdata *rlep, int rle_index, 4144 struct bmic_identify_physical_device *id_phys) 4145 { 4146 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4147 4148 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4149 this_device->hba_ioaccel_enabled = 1; 4150 4151 memcpy(&this_device->active_path_index, 4152 &id_phys->active_path_number, 4153 sizeof(this_device->active_path_index)); 4154 memcpy(&this_device->path_map, 4155 &id_phys->redundant_path_present_map, 4156 sizeof(this_device->path_map)); 4157 memcpy(&this_device->box, 4158 &id_phys->alternate_paths_phys_box_on_port, 4159 sizeof(this_device->box)); 4160 memcpy(&this_device->phys_connector, 4161 &id_phys->alternate_paths_phys_connector, 4162 sizeof(this_device->phys_connector)); 4163 memcpy(&this_device->bay, 4164 &id_phys->phys_bay_in_box, 4165 sizeof(this_device->bay)); 4166 } 4167 4168 /* get number of local logical disks. */ 4169 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4170 struct bmic_identify_controller *id_ctlr, 4171 u32 *nlocals) 4172 { 4173 int rc; 4174 4175 if (!id_ctlr) { 4176 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4177 __func__); 4178 return -ENOMEM; 4179 } 4180 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4181 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4182 if (!rc) 4183 if (id_ctlr->configured_logical_drive_count < 256) 4184 *nlocals = id_ctlr->configured_logical_drive_count; 4185 else 4186 *nlocals = le16_to_cpu( 4187 id_ctlr->extended_logical_unit_count); 4188 else 4189 *nlocals = -1; 4190 return rc; 4191 } 4192 4193 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4194 { 4195 struct bmic_identify_physical_device *id_phys; 4196 bool is_spare = false; 4197 int rc; 4198 4199 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4200 if (!id_phys) 4201 return false; 4202 4203 rc = hpsa_bmic_id_physical_device(h, 4204 lunaddrbytes, 4205 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4206 id_phys, sizeof(*id_phys)); 4207 if (rc == 0) 4208 is_spare = (id_phys->more_flags >> 6) & 0x01; 4209 4210 kfree(id_phys); 4211 return is_spare; 4212 } 4213 4214 #define RPL_DEV_FLAG_NON_DISK 0x1 4215 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4216 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4217 4218 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4219 4220 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4221 struct ext_report_lun_entry *rle) 4222 { 4223 u8 device_flags; 4224 u8 device_type; 4225 4226 if (!MASKED_DEVICE(lunaddrbytes)) 4227 return false; 4228 4229 device_flags = rle->device_flags; 4230 device_type = rle->device_type; 4231 4232 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4233 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4234 return false; 4235 return true; 4236 } 4237 4238 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4239 return false; 4240 4241 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4242 return false; 4243 4244 /* 4245 * Spares may be spun down, we do not want to 4246 * do an Inquiry to a RAID set spare drive as 4247 * that would have them spun up, that is a 4248 * performance hit because I/O to the RAID device 4249 * stops while the spin up occurs which can take 4250 * over 50 seconds. 4251 */ 4252 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4253 return true; 4254 4255 return false; 4256 } 4257 4258 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4259 { 4260 /* the idea here is we could get notified 4261 * that some devices have changed, so we do a report 4262 * physical luns and report logical luns cmd, and adjust 4263 * our list of devices accordingly. 4264 * 4265 * The scsi3addr's of devices won't change so long as the 4266 * adapter is not reset. That means we can rescan and 4267 * tell which devices we already know about, vs. new 4268 * devices, vs. disappearing devices. 4269 */ 4270 struct ReportExtendedLUNdata *physdev_list = NULL; 4271 struct ReportLUNdata *logdev_list = NULL; 4272 struct bmic_identify_physical_device *id_phys = NULL; 4273 struct bmic_identify_controller *id_ctlr = NULL; 4274 u32 nphysicals = 0; 4275 u32 nlogicals = 0; 4276 u32 nlocal_logicals = 0; 4277 u32 ndev_allocated = 0; 4278 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4279 int ncurrent = 0; 4280 int i, n_ext_target_devs, ndevs_to_allocate; 4281 int raid_ctlr_position; 4282 bool physical_device; 4283 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4284 4285 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4286 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4287 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4288 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4289 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4290 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4291 4292 if (!currentsd || !physdev_list || !logdev_list || 4293 !tmpdevice || !id_phys || !id_ctlr) { 4294 dev_err(&h->pdev->dev, "out of memory\n"); 4295 goto out; 4296 } 4297 memset(lunzerobits, 0, sizeof(lunzerobits)); 4298 4299 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4300 4301 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4302 logdev_list, &nlogicals)) { 4303 h->drv_req_rescan = 1; 4304 goto out; 4305 } 4306 4307 /* Set number of local logicals (non PTRAID) */ 4308 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4309 dev_warn(&h->pdev->dev, 4310 "%s: Can't determine number of local logical devices.\n", 4311 __func__); 4312 } 4313 4314 /* We might see up to the maximum number of logical and physical disks 4315 * plus external target devices, and a device for the local RAID 4316 * controller. 4317 */ 4318 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4319 4320 /* Allocate the per device structures */ 4321 for (i = 0; i < ndevs_to_allocate; i++) { 4322 if (i >= HPSA_MAX_DEVICES) { 4323 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4324 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4325 ndevs_to_allocate - HPSA_MAX_DEVICES); 4326 break; 4327 } 4328 4329 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4330 if (!currentsd[i]) { 4331 h->drv_req_rescan = 1; 4332 goto out; 4333 } 4334 ndev_allocated++; 4335 } 4336 4337 if (is_scsi_rev_5(h)) 4338 raid_ctlr_position = 0; 4339 else 4340 raid_ctlr_position = nphysicals + nlogicals; 4341 4342 /* adjust our table of devices */ 4343 n_ext_target_devs = 0; 4344 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4345 u8 *lunaddrbytes, is_OBDR = 0; 4346 int rc = 0; 4347 int phys_dev_index = i - (raid_ctlr_position == 0); 4348 bool skip_device = false; 4349 4350 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4351 4352 /* Figure out where the LUN ID info is coming from */ 4353 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4354 i, nphysicals, nlogicals, physdev_list, logdev_list); 4355 4356 /* Determine if this is a lun from an external target array */ 4357 tmpdevice->external = 4358 figure_external_status(h, raid_ctlr_position, i, 4359 nphysicals, nlocal_logicals); 4360 4361 /* 4362 * Skip over some devices such as a spare. 4363 */ 4364 if (!tmpdevice->external && physical_device) { 4365 skip_device = hpsa_skip_device(h, lunaddrbytes, 4366 &physdev_list->LUN[phys_dev_index]); 4367 if (skip_device) 4368 continue; 4369 } 4370 4371 /* Get device type, vendor, model, device id */ 4372 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4373 &is_OBDR); 4374 if (rc == -ENOMEM) { 4375 dev_warn(&h->pdev->dev, 4376 "Out of memory, rescan deferred.\n"); 4377 h->drv_req_rescan = 1; 4378 goto out; 4379 } 4380 if (rc) { 4381 h->drv_req_rescan = 1; 4382 continue; 4383 } 4384 4385 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4386 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4387 this_device = currentsd[ncurrent]; 4388 4389 /* Turn on discovery_polling if there are ext target devices. 4390 * Event-based change notification is unreliable for those. 4391 */ 4392 if (!h->discovery_polling) { 4393 if (tmpdevice->external) { 4394 h->discovery_polling = 1; 4395 dev_info(&h->pdev->dev, 4396 "External target, activate discovery polling.\n"); 4397 } 4398 } 4399 4400 4401 *this_device = *tmpdevice; 4402 this_device->physical_device = physical_device; 4403 4404 /* 4405 * Expose all devices except for physical devices that 4406 * are masked. 4407 */ 4408 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4409 this_device->expose_device = 0; 4410 else 4411 this_device->expose_device = 1; 4412 4413 4414 /* 4415 * Get the SAS address for physical devices that are exposed. 4416 */ 4417 if (this_device->physical_device && this_device->expose_device) 4418 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4419 4420 switch (this_device->devtype) { 4421 case TYPE_ROM: 4422 /* We don't *really* support actual CD-ROM devices, 4423 * just "One Button Disaster Recovery" tape drive 4424 * which temporarily pretends to be a CD-ROM drive. 4425 * So we check that the device is really an OBDR tape 4426 * device by checking for "$DR-10" in bytes 43-48 of 4427 * the inquiry data. 4428 */ 4429 if (is_OBDR) 4430 ncurrent++; 4431 break; 4432 case TYPE_DISK: 4433 case TYPE_ZBC: 4434 if (this_device->physical_device) { 4435 /* The disk is in HBA mode. */ 4436 /* Never use RAID mapper in HBA mode. */ 4437 this_device->offload_enabled = 0; 4438 hpsa_get_ioaccel_drive_info(h, this_device, 4439 physdev_list, phys_dev_index, id_phys); 4440 hpsa_get_path_info(this_device, 4441 physdev_list, phys_dev_index, id_phys); 4442 } 4443 ncurrent++; 4444 break; 4445 case TYPE_TAPE: 4446 case TYPE_MEDIUM_CHANGER: 4447 ncurrent++; 4448 break; 4449 case TYPE_ENCLOSURE: 4450 if (!this_device->external) 4451 hpsa_get_enclosure_info(h, lunaddrbytes, 4452 physdev_list, phys_dev_index, 4453 this_device); 4454 ncurrent++; 4455 break; 4456 case TYPE_RAID: 4457 /* Only present the Smartarray HBA as a RAID controller. 4458 * If it's a RAID controller other than the HBA itself 4459 * (an external RAID controller, MSA500 or similar) 4460 * don't present it. 4461 */ 4462 if (!is_hba_lunid(lunaddrbytes)) 4463 break; 4464 ncurrent++; 4465 break; 4466 default: 4467 break; 4468 } 4469 if (ncurrent >= HPSA_MAX_DEVICES) 4470 break; 4471 } 4472 4473 if (h->sas_host == NULL) { 4474 int rc = 0; 4475 4476 rc = hpsa_add_sas_host(h); 4477 if (rc) { 4478 dev_warn(&h->pdev->dev, 4479 "Could not add sas host %d\n", rc); 4480 goto out; 4481 } 4482 } 4483 4484 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4485 out: 4486 kfree(tmpdevice); 4487 for (i = 0; i < ndev_allocated; i++) 4488 kfree(currentsd[i]); 4489 kfree(currentsd); 4490 kfree(physdev_list); 4491 kfree(logdev_list); 4492 kfree(id_ctlr); 4493 kfree(id_phys); 4494 } 4495 4496 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4497 struct scatterlist *sg) 4498 { 4499 u64 addr64 = (u64) sg_dma_address(sg); 4500 unsigned int len = sg_dma_len(sg); 4501 4502 desc->Addr = cpu_to_le64(addr64); 4503 desc->Len = cpu_to_le32(len); 4504 desc->Ext = 0; 4505 } 4506 4507 /* 4508 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4509 * dma mapping and fills in the scatter gather entries of the 4510 * hpsa command, cp. 4511 */ 4512 static int hpsa_scatter_gather(struct ctlr_info *h, 4513 struct CommandList *cp, 4514 struct scsi_cmnd *cmd) 4515 { 4516 struct scatterlist *sg; 4517 int use_sg, i, sg_limit, chained, last_sg; 4518 struct SGDescriptor *curr_sg; 4519 4520 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4521 4522 use_sg = scsi_dma_map(cmd); 4523 if (use_sg < 0) 4524 return use_sg; 4525 4526 if (!use_sg) 4527 goto sglist_finished; 4528 4529 /* 4530 * If the number of entries is greater than the max for a single list, 4531 * then we have a chained list; we will set up all but one entry in the 4532 * first list (the last entry is saved for link information); 4533 * otherwise, we don't have a chained list and we'll set up at each of 4534 * the entries in the one list. 4535 */ 4536 curr_sg = cp->SG; 4537 chained = use_sg > h->max_cmd_sg_entries; 4538 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4539 last_sg = scsi_sg_count(cmd) - 1; 4540 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4541 hpsa_set_sg_descriptor(curr_sg, sg); 4542 curr_sg++; 4543 } 4544 4545 if (chained) { 4546 /* 4547 * Continue with the chained list. Set curr_sg to the chained 4548 * list. Modify the limit to the total count less the entries 4549 * we've already set up. Resume the scan at the list entry 4550 * where the previous loop left off. 4551 */ 4552 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4553 sg_limit = use_sg - sg_limit; 4554 for_each_sg(sg, sg, sg_limit, i) { 4555 hpsa_set_sg_descriptor(curr_sg, sg); 4556 curr_sg++; 4557 } 4558 } 4559 4560 /* Back the pointer up to the last entry and mark it as "last". */ 4561 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4562 4563 if (use_sg + chained > h->maxSG) 4564 h->maxSG = use_sg + chained; 4565 4566 if (chained) { 4567 cp->Header.SGList = h->max_cmd_sg_entries; 4568 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4569 if (hpsa_map_sg_chain_block(h, cp)) { 4570 scsi_dma_unmap(cmd); 4571 return -1; 4572 } 4573 return 0; 4574 } 4575 4576 sglist_finished: 4577 4578 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4579 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4580 return 0; 4581 } 4582 4583 #define IO_ACCEL_INELIGIBLE (1) 4584 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4585 { 4586 int is_write = 0; 4587 u32 block; 4588 u32 block_cnt; 4589 4590 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4591 switch (cdb[0]) { 4592 case WRITE_6: 4593 case WRITE_12: 4594 is_write = 1; 4595 case READ_6: 4596 case READ_12: 4597 if (*cdb_len == 6) { 4598 block = (((cdb[1] & 0x1F) << 16) | 4599 (cdb[2] << 8) | 4600 cdb[3]); 4601 block_cnt = cdb[4]; 4602 if (block_cnt == 0) 4603 block_cnt = 256; 4604 } else { 4605 BUG_ON(*cdb_len != 12); 4606 block = get_unaligned_be32(&cdb[2]); 4607 block_cnt = get_unaligned_be32(&cdb[6]); 4608 } 4609 if (block_cnt > 0xffff) 4610 return IO_ACCEL_INELIGIBLE; 4611 4612 cdb[0] = is_write ? WRITE_10 : READ_10; 4613 cdb[1] = 0; 4614 cdb[2] = (u8) (block >> 24); 4615 cdb[3] = (u8) (block >> 16); 4616 cdb[4] = (u8) (block >> 8); 4617 cdb[5] = (u8) (block); 4618 cdb[6] = 0; 4619 cdb[7] = (u8) (block_cnt >> 8); 4620 cdb[8] = (u8) (block_cnt); 4621 cdb[9] = 0; 4622 *cdb_len = 10; 4623 break; 4624 } 4625 return 0; 4626 } 4627 4628 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4629 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4630 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4631 { 4632 struct scsi_cmnd *cmd = c->scsi_cmd; 4633 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4634 unsigned int len; 4635 unsigned int total_len = 0; 4636 struct scatterlist *sg; 4637 u64 addr64; 4638 int use_sg, i; 4639 struct SGDescriptor *curr_sg; 4640 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4641 4642 /* TODO: implement chaining support */ 4643 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4644 atomic_dec(&phys_disk->ioaccel_cmds_out); 4645 return IO_ACCEL_INELIGIBLE; 4646 } 4647 4648 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4649 4650 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4651 atomic_dec(&phys_disk->ioaccel_cmds_out); 4652 return IO_ACCEL_INELIGIBLE; 4653 } 4654 4655 c->cmd_type = CMD_IOACCEL1; 4656 4657 /* Adjust the DMA address to point to the accelerated command buffer */ 4658 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4659 (c->cmdindex * sizeof(*cp)); 4660 BUG_ON(c->busaddr & 0x0000007F); 4661 4662 use_sg = scsi_dma_map(cmd); 4663 if (use_sg < 0) { 4664 atomic_dec(&phys_disk->ioaccel_cmds_out); 4665 return use_sg; 4666 } 4667 4668 if (use_sg) { 4669 curr_sg = cp->SG; 4670 scsi_for_each_sg(cmd, sg, use_sg, i) { 4671 addr64 = (u64) sg_dma_address(sg); 4672 len = sg_dma_len(sg); 4673 total_len += len; 4674 curr_sg->Addr = cpu_to_le64(addr64); 4675 curr_sg->Len = cpu_to_le32(len); 4676 curr_sg->Ext = cpu_to_le32(0); 4677 curr_sg++; 4678 } 4679 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4680 4681 switch (cmd->sc_data_direction) { 4682 case DMA_TO_DEVICE: 4683 control |= IOACCEL1_CONTROL_DATA_OUT; 4684 break; 4685 case DMA_FROM_DEVICE: 4686 control |= IOACCEL1_CONTROL_DATA_IN; 4687 break; 4688 case DMA_NONE: 4689 control |= IOACCEL1_CONTROL_NODATAXFER; 4690 break; 4691 default: 4692 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4693 cmd->sc_data_direction); 4694 BUG(); 4695 break; 4696 } 4697 } else { 4698 control |= IOACCEL1_CONTROL_NODATAXFER; 4699 } 4700 4701 c->Header.SGList = use_sg; 4702 /* Fill out the command structure to submit */ 4703 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4704 cp->transfer_len = cpu_to_le32(total_len); 4705 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4706 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4707 cp->control = cpu_to_le32(control); 4708 memcpy(cp->CDB, cdb, cdb_len); 4709 memcpy(cp->CISS_LUN, scsi3addr, 8); 4710 /* Tag was already set at init time. */ 4711 enqueue_cmd_and_start_io(h, c); 4712 return 0; 4713 } 4714 4715 /* 4716 * Queue a command directly to a device behind the controller using the 4717 * I/O accelerator path. 4718 */ 4719 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4720 struct CommandList *c) 4721 { 4722 struct scsi_cmnd *cmd = c->scsi_cmd; 4723 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4724 4725 if (!dev) 4726 return -1; 4727 4728 c->phys_disk = dev; 4729 4730 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4731 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4732 } 4733 4734 /* 4735 * Set encryption parameters for the ioaccel2 request 4736 */ 4737 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4738 struct CommandList *c, struct io_accel2_cmd *cp) 4739 { 4740 struct scsi_cmnd *cmd = c->scsi_cmd; 4741 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4742 struct raid_map_data *map = &dev->raid_map; 4743 u64 first_block; 4744 4745 /* Are we doing encryption on this device */ 4746 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4747 return; 4748 /* Set the data encryption key index. */ 4749 cp->dekindex = map->dekindex; 4750 4751 /* Set the encryption enable flag, encoded into direction field. */ 4752 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4753 4754 /* Set encryption tweak values based on logical block address 4755 * If block size is 512, tweak value is LBA. 4756 * For other block sizes, tweak is (LBA * block size)/ 512) 4757 */ 4758 switch (cmd->cmnd[0]) { 4759 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4760 case READ_6: 4761 case WRITE_6: 4762 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4763 (cmd->cmnd[2] << 8) | 4764 cmd->cmnd[3]); 4765 break; 4766 case WRITE_10: 4767 case READ_10: 4768 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4769 case WRITE_12: 4770 case READ_12: 4771 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4772 break; 4773 case WRITE_16: 4774 case READ_16: 4775 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4776 break; 4777 default: 4778 dev_err(&h->pdev->dev, 4779 "ERROR: %s: size (0x%x) not supported for encryption\n", 4780 __func__, cmd->cmnd[0]); 4781 BUG(); 4782 break; 4783 } 4784 4785 if (le32_to_cpu(map->volume_blk_size) != 512) 4786 first_block = first_block * 4787 le32_to_cpu(map->volume_blk_size)/512; 4788 4789 cp->tweak_lower = cpu_to_le32(first_block); 4790 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4791 } 4792 4793 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4794 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4795 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4796 { 4797 struct scsi_cmnd *cmd = c->scsi_cmd; 4798 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4799 struct ioaccel2_sg_element *curr_sg; 4800 int use_sg, i; 4801 struct scatterlist *sg; 4802 u64 addr64; 4803 u32 len; 4804 u32 total_len = 0; 4805 4806 if (!cmd->device) 4807 return -1; 4808 4809 if (!cmd->device->hostdata) 4810 return -1; 4811 4812 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4813 4814 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4815 atomic_dec(&phys_disk->ioaccel_cmds_out); 4816 return IO_ACCEL_INELIGIBLE; 4817 } 4818 4819 c->cmd_type = CMD_IOACCEL2; 4820 /* Adjust the DMA address to point to the accelerated command buffer */ 4821 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4822 (c->cmdindex * sizeof(*cp)); 4823 BUG_ON(c->busaddr & 0x0000007F); 4824 4825 memset(cp, 0, sizeof(*cp)); 4826 cp->IU_type = IOACCEL2_IU_TYPE; 4827 4828 use_sg = scsi_dma_map(cmd); 4829 if (use_sg < 0) { 4830 atomic_dec(&phys_disk->ioaccel_cmds_out); 4831 return use_sg; 4832 } 4833 4834 if (use_sg) { 4835 curr_sg = cp->sg; 4836 if (use_sg > h->ioaccel_maxsg) { 4837 addr64 = le64_to_cpu( 4838 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4839 curr_sg->address = cpu_to_le64(addr64); 4840 curr_sg->length = 0; 4841 curr_sg->reserved[0] = 0; 4842 curr_sg->reserved[1] = 0; 4843 curr_sg->reserved[2] = 0; 4844 curr_sg->chain_indicator = 0x80; 4845 4846 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4847 } 4848 scsi_for_each_sg(cmd, sg, use_sg, i) { 4849 addr64 = (u64) sg_dma_address(sg); 4850 len = sg_dma_len(sg); 4851 total_len += len; 4852 curr_sg->address = cpu_to_le64(addr64); 4853 curr_sg->length = cpu_to_le32(len); 4854 curr_sg->reserved[0] = 0; 4855 curr_sg->reserved[1] = 0; 4856 curr_sg->reserved[2] = 0; 4857 curr_sg->chain_indicator = 0; 4858 curr_sg++; 4859 } 4860 4861 switch (cmd->sc_data_direction) { 4862 case DMA_TO_DEVICE: 4863 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4864 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4865 break; 4866 case DMA_FROM_DEVICE: 4867 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4868 cp->direction |= IOACCEL2_DIR_DATA_IN; 4869 break; 4870 case DMA_NONE: 4871 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4872 cp->direction |= IOACCEL2_DIR_NO_DATA; 4873 break; 4874 default: 4875 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4876 cmd->sc_data_direction); 4877 BUG(); 4878 break; 4879 } 4880 } else { 4881 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4882 cp->direction |= IOACCEL2_DIR_NO_DATA; 4883 } 4884 4885 /* Set encryption parameters, if necessary */ 4886 set_encrypt_ioaccel2(h, c, cp); 4887 4888 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4889 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4890 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4891 4892 cp->data_len = cpu_to_le32(total_len); 4893 cp->err_ptr = cpu_to_le64(c->busaddr + 4894 offsetof(struct io_accel2_cmd, error_data)); 4895 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4896 4897 /* fill in sg elements */ 4898 if (use_sg > h->ioaccel_maxsg) { 4899 cp->sg_count = 1; 4900 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4901 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4902 atomic_dec(&phys_disk->ioaccel_cmds_out); 4903 scsi_dma_unmap(cmd); 4904 return -1; 4905 } 4906 } else 4907 cp->sg_count = (u8) use_sg; 4908 4909 enqueue_cmd_and_start_io(h, c); 4910 return 0; 4911 } 4912 4913 /* 4914 * Queue a command to the correct I/O accelerator path. 4915 */ 4916 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4917 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4918 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4919 { 4920 if (!c->scsi_cmd->device) 4921 return -1; 4922 4923 if (!c->scsi_cmd->device->hostdata) 4924 return -1; 4925 4926 /* Try to honor the device's queue depth */ 4927 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4928 phys_disk->queue_depth) { 4929 atomic_dec(&phys_disk->ioaccel_cmds_out); 4930 return IO_ACCEL_INELIGIBLE; 4931 } 4932 if (h->transMethod & CFGTBL_Trans_io_accel1) 4933 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4934 cdb, cdb_len, scsi3addr, 4935 phys_disk); 4936 else 4937 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4938 cdb, cdb_len, scsi3addr, 4939 phys_disk); 4940 } 4941 4942 static void raid_map_helper(struct raid_map_data *map, 4943 int offload_to_mirror, u32 *map_index, u32 *current_group) 4944 { 4945 if (offload_to_mirror == 0) { 4946 /* use physical disk in the first mirrored group. */ 4947 *map_index %= le16_to_cpu(map->data_disks_per_row); 4948 return; 4949 } 4950 do { 4951 /* determine mirror group that *map_index indicates */ 4952 *current_group = *map_index / 4953 le16_to_cpu(map->data_disks_per_row); 4954 if (offload_to_mirror == *current_group) 4955 continue; 4956 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4957 /* select map index from next group */ 4958 *map_index += le16_to_cpu(map->data_disks_per_row); 4959 (*current_group)++; 4960 } else { 4961 /* select map index from first group */ 4962 *map_index %= le16_to_cpu(map->data_disks_per_row); 4963 *current_group = 0; 4964 } 4965 } while (offload_to_mirror != *current_group); 4966 } 4967 4968 /* 4969 * Attempt to perform offload RAID mapping for a logical volume I/O. 4970 */ 4971 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4972 struct CommandList *c) 4973 { 4974 struct scsi_cmnd *cmd = c->scsi_cmd; 4975 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4976 struct raid_map_data *map = &dev->raid_map; 4977 struct raid_map_disk_data *dd = &map->data[0]; 4978 int is_write = 0; 4979 u32 map_index; 4980 u64 first_block, last_block; 4981 u32 block_cnt; 4982 u32 blocks_per_row; 4983 u64 first_row, last_row; 4984 u32 first_row_offset, last_row_offset; 4985 u32 first_column, last_column; 4986 u64 r0_first_row, r0_last_row; 4987 u32 r5or6_blocks_per_row; 4988 u64 r5or6_first_row, r5or6_last_row; 4989 u32 r5or6_first_row_offset, r5or6_last_row_offset; 4990 u32 r5or6_first_column, r5or6_last_column; 4991 u32 total_disks_per_row; 4992 u32 stripesize; 4993 u32 first_group, last_group, current_group; 4994 u32 map_row; 4995 u32 disk_handle; 4996 u64 disk_block; 4997 u32 disk_block_cnt; 4998 u8 cdb[16]; 4999 u8 cdb_len; 5000 u16 strip_size; 5001 #if BITS_PER_LONG == 32 5002 u64 tmpdiv; 5003 #endif 5004 int offload_to_mirror; 5005 5006 if (!dev) 5007 return -1; 5008 5009 /* check for valid opcode, get LBA and block count */ 5010 switch (cmd->cmnd[0]) { 5011 case WRITE_6: 5012 is_write = 1; 5013 case READ_6: 5014 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5015 (cmd->cmnd[2] << 8) | 5016 cmd->cmnd[3]); 5017 block_cnt = cmd->cmnd[4]; 5018 if (block_cnt == 0) 5019 block_cnt = 256; 5020 break; 5021 case WRITE_10: 5022 is_write = 1; 5023 case READ_10: 5024 first_block = 5025 (((u64) cmd->cmnd[2]) << 24) | 5026 (((u64) cmd->cmnd[3]) << 16) | 5027 (((u64) cmd->cmnd[4]) << 8) | 5028 cmd->cmnd[5]; 5029 block_cnt = 5030 (((u32) cmd->cmnd[7]) << 8) | 5031 cmd->cmnd[8]; 5032 break; 5033 case WRITE_12: 5034 is_write = 1; 5035 case READ_12: 5036 first_block = 5037 (((u64) cmd->cmnd[2]) << 24) | 5038 (((u64) cmd->cmnd[3]) << 16) | 5039 (((u64) cmd->cmnd[4]) << 8) | 5040 cmd->cmnd[5]; 5041 block_cnt = 5042 (((u32) cmd->cmnd[6]) << 24) | 5043 (((u32) cmd->cmnd[7]) << 16) | 5044 (((u32) cmd->cmnd[8]) << 8) | 5045 cmd->cmnd[9]; 5046 break; 5047 case WRITE_16: 5048 is_write = 1; 5049 case READ_16: 5050 first_block = 5051 (((u64) cmd->cmnd[2]) << 56) | 5052 (((u64) cmd->cmnd[3]) << 48) | 5053 (((u64) cmd->cmnd[4]) << 40) | 5054 (((u64) cmd->cmnd[5]) << 32) | 5055 (((u64) cmd->cmnd[6]) << 24) | 5056 (((u64) cmd->cmnd[7]) << 16) | 5057 (((u64) cmd->cmnd[8]) << 8) | 5058 cmd->cmnd[9]; 5059 block_cnt = 5060 (((u32) cmd->cmnd[10]) << 24) | 5061 (((u32) cmd->cmnd[11]) << 16) | 5062 (((u32) cmd->cmnd[12]) << 8) | 5063 cmd->cmnd[13]; 5064 break; 5065 default: 5066 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5067 } 5068 last_block = first_block + block_cnt - 1; 5069 5070 /* check for write to non-RAID-0 */ 5071 if (is_write && dev->raid_level != 0) 5072 return IO_ACCEL_INELIGIBLE; 5073 5074 /* check for invalid block or wraparound */ 5075 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5076 last_block < first_block) 5077 return IO_ACCEL_INELIGIBLE; 5078 5079 /* calculate stripe information for the request */ 5080 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5081 le16_to_cpu(map->strip_size); 5082 strip_size = le16_to_cpu(map->strip_size); 5083 #if BITS_PER_LONG == 32 5084 tmpdiv = first_block; 5085 (void) do_div(tmpdiv, blocks_per_row); 5086 first_row = tmpdiv; 5087 tmpdiv = last_block; 5088 (void) do_div(tmpdiv, blocks_per_row); 5089 last_row = tmpdiv; 5090 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5091 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5092 tmpdiv = first_row_offset; 5093 (void) do_div(tmpdiv, strip_size); 5094 first_column = tmpdiv; 5095 tmpdiv = last_row_offset; 5096 (void) do_div(tmpdiv, strip_size); 5097 last_column = tmpdiv; 5098 #else 5099 first_row = first_block / blocks_per_row; 5100 last_row = last_block / blocks_per_row; 5101 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5102 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5103 first_column = first_row_offset / strip_size; 5104 last_column = last_row_offset / strip_size; 5105 #endif 5106 5107 /* if this isn't a single row/column then give to the controller */ 5108 if ((first_row != last_row) || (first_column != last_column)) 5109 return IO_ACCEL_INELIGIBLE; 5110 5111 /* proceeding with driver mapping */ 5112 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5113 le16_to_cpu(map->metadata_disks_per_row); 5114 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5115 le16_to_cpu(map->row_cnt); 5116 map_index = (map_row * total_disks_per_row) + first_column; 5117 5118 switch (dev->raid_level) { 5119 case HPSA_RAID_0: 5120 break; /* nothing special to do */ 5121 case HPSA_RAID_1: 5122 /* Handles load balance across RAID 1 members. 5123 * (2-drive R1 and R10 with even # of drives.) 5124 * Appropriate for SSDs, not optimal for HDDs 5125 */ 5126 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5127 if (dev->offload_to_mirror) 5128 map_index += le16_to_cpu(map->data_disks_per_row); 5129 dev->offload_to_mirror = !dev->offload_to_mirror; 5130 break; 5131 case HPSA_RAID_ADM: 5132 /* Handles N-way mirrors (R1-ADM) 5133 * and R10 with # of drives divisible by 3.) 5134 */ 5135 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5136 5137 offload_to_mirror = dev->offload_to_mirror; 5138 raid_map_helper(map, offload_to_mirror, 5139 &map_index, ¤t_group); 5140 /* set mirror group to use next time */ 5141 offload_to_mirror = 5142 (offload_to_mirror >= 5143 le16_to_cpu(map->layout_map_count) - 1) 5144 ? 0 : offload_to_mirror + 1; 5145 dev->offload_to_mirror = offload_to_mirror; 5146 /* Avoid direct use of dev->offload_to_mirror within this 5147 * function since multiple threads might simultaneously 5148 * increment it beyond the range of dev->layout_map_count -1. 5149 */ 5150 break; 5151 case HPSA_RAID_5: 5152 case HPSA_RAID_6: 5153 if (le16_to_cpu(map->layout_map_count) <= 1) 5154 break; 5155 5156 /* Verify first and last block are in same RAID group */ 5157 r5or6_blocks_per_row = 5158 le16_to_cpu(map->strip_size) * 5159 le16_to_cpu(map->data_disks_per_row); 5160 BUG_ON(r5or6_blocks_per_row == 0); 5161 stripesize = r5or6_blocks_per_row * 5162 le16_to_cpu(map->layout_map_count); 5163 #if BITS_PER_LONG == 32 5164 tmpdiv = first_block; 5165 first_group = do_div(tmpdiv, stripesize); 5166 tmpdiv = first_group; 5167 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5168 first_group = tmpdiv; 5169 tmpdiv = last_block; 5170 last_group = do_div(tmpdiv, stripesize); 5171 tmpdiv = last_group; 5172 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5173 last_group = tmpdiv; 5174 #else 5175 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5176 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5177 #endif 5178 if (first_group != last_group) 5179 return IO_ACCEL_INELIGIBLE; 5180 5181 /* Verify request is in a single row of RAID 5/6 */ 5182 #if BITS_PER_LONG == 32 5183 tmpdiv = first_block; 5184 (void) do_div(tmpdiv, stripesize); 5185 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5186 tmpdiv = last_block; 5187 (void) do_div(tmpdiv, stripesize); 5188 r5or6_last_row = r0_last_row = tmpdiv; 5189 #else 5190 first_row = r5or6_first_row = r0_first_row = 5191 first_block / stripesize; 5192 r5or6_last_row = r0_last_row = last_block / stripesize; 5193 #endif 5194 if (r5or6_first_row != r5or6_last_row) 5195 return IO_ACCEL_INELIGIBLE; 5196 5197 5198 /* Verify request is in a single column */ 5199 #if BITS_PER_LONG == 32 5200 tmpdiv = first_block; 5201 first_row_offset = do_div(tmpdiv, stripesize); 5202 tmpdiv = first_row_offset; 5203 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5204 r5or6_first_row_offset = first_row_offset; 5205 tmpdiv = last_block; 5206 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5207 tmpdiv = r5or6_last_row_offset; 5208 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5209 tmpdiv = r5or6_first_row_offset; 5210 (void) do_div(tmpdiv, map->strip_size); 5211 first_column = r5or6_first_column = tmpdiv; 5212 tmpdiv = r5or6_last_row_offset; 5213 (void) do_div(tmpdiv, map->strip_size); 5214 r5or6_last_column = tmpdiv; 5215 #else 5216 first_row_offset = r5or6_first_row_offset = 5217 (u32)((first_block % stripesize) % 5218 r5or6_blocks_per_row); 5219 5220 r5or6_last_row_offset = 5221 (u32)((last_block % stripesize) % 5222 r5or6_blocks_per_row); 5223 5224 first_column = r5or6_first_column = 5225 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5226 r5or6_last_column = 5227 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5228 #endif 5229 if (r5or6_first_column != r5or6_last_column) 5230 return IO_ACCEL_INELIGIBLE; 5231 5232 /* Request is eligible */ 5233 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5234 le16_to_cpu(map->row_cnt); 5235 5236 map_index = (first_group * 5237 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5238 (map_row * total_disks_per_row) + first_column; 5239 break; 5240 default: 5241 return IO_ACCEL_INELIGIBLE; 5242 } 5243 5244 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5245 return IO_ACCEL_INELIGIBLE; 5246 5247 c->phys_disk = dev->phys_disk[map_index]; 5248 if (!c->phys_disk) 5249 return IO_ACCEL_INELIGIBLE; 5250 5251 disk_handle = dd[map_index].ioaccel_handle; 5252 disk_block = le64_to_cpu(map->disk_starting_blk) + 5253 first_row * le16_to_cpu(map->strip_size) + 5254 (first_row_offset - first_column * 5255 le16_to_cpu(map->strip_size)); 5256 disk_block_cnt = block_cnt; 5257 5258 /* handle differing logical/physical block sizes */ 5259 if (map->phys_blk_shift) { 5260 disk_block <<= map->phys_blk_shift; 5261 disk_block_cnt <<= map->phys_blk_shift; 5262 } 5263 BUG_ON(disk_block_cnt > 0xffff); 5264 5265 /* build the new CDB for the physical disk I/O */ 5266 if (disk_block > 0xffffffff) { 5267 cdb[0] = is_write ? WRITE_16 : READ_16; 5268 cdb[1] = 0; 5269 cdb[2] = (u8) (disk_block >> 56); 5270 cdb[3] = (u8) (disk_block >> 48); 5271 cdb[4] = (u8) (disk_block >> 40); 5272 cdb[5] = (u8) (disk_block >> 32); 5273 cdb[6] = (u8) (disk_block >> 24); 5274 cdb[7] = (u8) (disk_block >> 16); 5275 cdb[8] = (u8) (disk_block >> 8); 5276 cdb[9] = (u8) (disk_block); 5277 cdb[10] = (u8) (disk_block_cnt >> 24); 5278 cdb[11] = (u8) (disk_block_cnt >> 16); 5279 cdb[12] = (u8) (disk_block_cnt >> 8); 5280 cdb[13] = (u8) (disk_block_cnt); 5281 cdb[14] = 0; 5282 cdb[15] = 0; 5283 cdb_len = 16; 5284 } else { 5285 cdb[0] = is_write ? WRITE_10 : READ_10; 5286 cdb[1] = 0; 5287 cdb[2] = (u8) (disk_block >> 24); 5288 cdb[3] = (u8) (disk_block >> 16); 5289 cdb[4] = (u8) (disk_block >> 8); 5290 cdb[5] = (u8) (disk_block); 5291 cdb[6] = 0; 5292 cdb[7] = (u8) (disk_block_cnt >> 8); 5293 cdb[8] = (u8) (disk_block_cnt); 5294 cdb[9] = 0; 5295 cdb_len = 10; 5296 } 5297 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5298 dev->scsi3addr, 5299 dev->phys_disk[map_index]); 5300 } 5301 5302 /* 5303 * Submit commands down the "normal" RAID stack path 5304 * All callers to hpsa_ciss_submit must check lockup_detected 5305 * beforehand, before (opt.) and after calling cmd_alloc 5306 */ 5307 static int hpsa_ciss_submit(struct ctlr_info *h, 5308 struct CommandList *c, struct scsi_cmnd *cmd, 5309 unsigned char scsi3addr[]) 5310 { 5311 cmd->host_scribble = (unsigned char *) c; 5312 c->cmd_type = CMD_SCSI; 5313 c->scsi_cmd = cmd; 5314 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5315 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5316 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5317 5318 /* Fill in the request block... */ 5319 5320 c->Request.Timeout = 0; 5321 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5322 c->Request.CDBLen = cmd->cmd_len; 5323 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5324 switch (cmd->sc_data_direction) { 5325 case DMA_TO_DEVICE: 5326 c->Request.type_attr_dir = 5327 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5328 break; 5329 case DMA_FROM_DEVICE: 5330 c->Request.type_attr_dir = 5331 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5332 break; 5333 case DMA_NONE: 5334 c->Request.type_attr_dir = 5335 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5336 break; 5337 case DMA_BIDIRECTIONAL: 5338 /* This can happen if a buggy application does a scsi passthru 5339 * and sets both inlen and outlen to non-zero. ( see 5340 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5341 */ 5342 5343 c->Request.type_attr_dir = 5344 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5345 /* This is technically wrong, and hpsa controllers should 5346 * reject it with CMD_INVALID, which is the most correct 5347 * response, but non-fibre backends appear to let it 5348 * slide by, and give the same results as if this field 5349 * were set correctly. Either way is acceptable for 5350 * our purposes here. 5351 */ 5352 5353 break; 5354 5355 default: 5356 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5357 cmd->sc_data_direction); 5358 BUG(); 5359 break; 5360 } 5361 5362 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5363 hpsa_cmd_resolve_and_free(h, c); 5364 return SCSI_MLQUEUE_HOST_BUSY; 5365 } 5366 enqueue_cmd_and_start_io(h, c); 5367 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5368 return 0; 5369 } 5370 5371 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5372 struct CommandList *c) 5373 { 5374 dma_addr_t cmd_dma_handle, err_dma_handle; 5375 5376 /* Zero out all of commandlist except the last field, refcount */ 5377 memset(c, 0, offsetof(struct CommandList, refcount)); 5378 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5379 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5380 c->err_info = h->errinfo_pool + index; 5381 memset(c->err_info, 0, sizeof(*c->err_info)); 5382 err_dma_handle = h->errinfo_pool_dhandle 5383 + index * sizeof(*c->err_info); 5384 c->cmdindex = index; 5385 c->busaddr = (u32) cmd_dma_handle; 5386 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5387 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5388 c->h = h; 5389 c->scsi_cmd = SCSI_CMD_IDLE; 5390 } 5391 5392 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5393 { 5394 int i; 5395 5396 for (i = 0; i < h->nr_cmds; i++) { 5397 struct CommandList *c = h->cmd_pool + i; 5398 5399 hpsa_cmd_init(h, i, c); 5400 atomic_set(&c->refcount, 0); 5401 } 5402 } 5403 5404 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5405 struct CommandList *c) 5406 { 5407 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5408 5409 BUG_ON(c->cmdindex != index); 5410 5411 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5412 memset(c->err_info, 0, sizeof(*c->err_info)); 5413 c->busaddr = (u32) cmd_dma_handle; 5414 } 5415 5416 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5417 struct CommandList *c, struct scsi_cmnd *cmd, 5418 unsigned char *scsi3addr) 5419 { 5420 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5421 int rc = IO_ACCEL_INELIGIBLE; 5422 5423 if (!dev) 5424 return SCSI_MLQUEUE_HOST_BUSY; 5425 5426 cmd->host_scribble = (unsigned char *) c; 5427 5428 if (dev->offload_enabled) { 5429 hpsa_cmd_init(h, c->cmdindex, c); 5430 c->cmd_type = CMD_SCSI; 5431 c->scsi_cmd = cmd; 5432 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5433 if (rc < 0) /* scsi_dma_map failed. */ 5434 rc = SCSI_MLQUEUE_HOST_BUSY; 5435 } else if (dev->hba_ioaccel_enabled) { 5436 hpsa_cmd_init(h, c->cmdindex, c); 5437 c->cmd_type = CMD_SCSI; 5438 c->scsi_cmd = cmd; 5439 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5440 if (rc < 0) /* scsi_dma_map failed. */ 5441 rc = SCSI_MLQUEUE_HOST_BUSY; 5442 } 5443 return rc; 5444 } 5445 5446 static void hpsa_command_resubmit_worker(struct work_struct *work) 5447 { 5448 struct scsi_cmnd *cmd; 5449 struct hpsa_scsi_dev_t *dev; 5450 struct CommandList *c = container_of(work, struct CommandList, work); 5451 5452 cmd = c->scsi_cmd; 5453 dev = cmd->device->hostdata; 5454 if (!dev) { 5455 cmd->result = DID_NO_CONNECT << 16; 5456 return hpsa_cmd_free_and_done(c->h, c, cmd); 5457 } 5458 if (c->reset_pending) 5459 return hpsa_cmd_resolve_and_free(c->h, c); 5460 if (c->abort_pending) 5461 return hpsa_cmd_abort_and_free(c->h, c, cmd); 5462 if (c->cmd_type == CMD_IOACCEL2) { 5463 struct ctlr_info *h = c->h; 5464 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5465 int rc; 5466 5467 if (c2->error_data.serv_response == 5468 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5469 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5470 if (rc == 0) 5471 return; 5472 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5473 /* 5474 * If we get here, it means dma mapping failed. 5475 * Try again via scsi mid layer, which will 5476 * then get SCSI_MLQUEUE_HOST_BUSY. 5477 */ 5478 cmd->result = DID_IMM_RETRY << 16; 5479 return hpsa_cmd_free_and_done(h, c, cmd); 5480 } 5481 /* else, fall thru and resubmit down CISS path */ 5482 } 5483 } 5484 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5485 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5486 /* 5487 * If we get here, it means dma mapping failed. Try 5488 * again via scsi mid layer, which will then get 5489 * SCSI_MLQUEUE_HOST_BUSY. 5490 * 5491 * hpsa_ciss_submit will have already freed c 5492 * if it encountered a dma mapping failure. 5493 */ 5494 cmd->result = DID_IMM_RETRY << 16; 5495 cmd->scsi_done(cmd); 5496 } 5497 } 5498 5499 /* Running in struct Scsi_Host->host_lock less mode */ 5500 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5501 { 5502 struct ctlr_info *h; 5503 struct hpsa_scsi_dev_t *dev; 5504 unsigned char scsi3addr[8]; 5505 struct CommandList *c; 5506 int rc = 0; 5507 5508 /* Get the ptr to our adapter structure out of cmd->host. */ 5509 h = sdev_to_hba(cmd->device); 5510 5511 BUG_ON(cmd->request->tag < 0); 5512 5513 dev = cmd->device->hostdata; 5514 if (!dev) { 5515 cmd->result = DID_NO_CONNECT << 16; 5516 cmd->scsi_done(cmd); 5517 return 0; 5518 } 5519 5520 if (dev->removed) { 5521 cmd->result = DID_NO_CONNECT << 16; 5522 cmd->scsi_done(cmd); 5523 return 0; 5524 } 5525 5526 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5527 5528 if (unlikely(lockup_detected(h))) { 5529 cmd->result = DID_NO_CONNECT << 16; 5530 cmd->scsi_done(cmd); 5531 return 0; 5532 } 5533 c = cmd_tagged_alloc(h, cmd); 5534 5535 /* 5536 * Call alternate submit routine for I/O accelerated commands. 5537 * Retries always go down the normal I/O path. 5538 */ 5539 if (likely(cmd->retries == 0 && 5540 !blk_rq_is_passthrough(cmd->request) && 5541 h->acciopath_status)) { 5542 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5543 if (rc == 0) 5544 return 0; 5545 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5546 hpsa_cmd_resolve_and_free(h, c); 5547 return SCSI_MLQUEUE_HOST_BUSY; 5548 } 5549 } 5550 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5551 } 5552 5553 static void hpsa_scan_complete(struct ctlr_info *h) 5554 { 5555 unsigned long flags; 5556 5557 spin_lock_irqsave(&h->scan_lock, flags); 5558 h->scan_finished = 1; 5559 wake_up(&h->scan_wait_queue); 5560 spin_unlock_irqrestore(&h->scan_lock, flags); 5561 } 5562 5563 static void hpsa_scan_start(struct Scsi_Host *sh) 5564 { 5565 struct ctlr_info *h = shost_to_hba(sh); 5566 unsigned long flags; 5567 5568 /* 5569 * Don't let rescans be initiated on a controller known to be locked 5570 * up. If the controller locks up *during* a rescan, that thread is 5571 * probably hosed, but at least we can prevent new rescan threads from 5572 * piling up on a locked up controller. 5573 */ 5574 if (unlikely(lockup_detected(h))) 5575 return hpsa_scan_complete(h); 5576 5577 /* 5578 * If a scan is already waiting to run, no need to add another 5579 */ 5580 spin_lock_irqsave(&h->scan_lock, flags); 5581 if (h->scan_waiting) { 5582 spin_unlock_irqrestore(&h->scan_lock, flags); 5583 return; 5584 } 5585 5586 spin_unlock_irqrestore(&h->scan_lock, flags); 5587 5588 /* wait until any scan already in progress is finished. */ 5589 while (1) { 5590 spin_lock_irqsave(&h->scan_lock, flags); 5591 if (h->scan_finished) 5592 break; 5593 h->scan_waiting = 1; 5594 spin_unlock_irqrestore(&h->scan_lock, flags); 5595 wait_event(h->scan_wait_queue, h->scan_finished); 5596 /* Note: We don't need to worry about a race between this 5597 * thread and driver unload because the midlayer will 5598 * have incremented the reference count, so unload won't 5599 * happen if we're in here. 5600 */ 5601 } 5602 h->scan_finished = 0; /* mark scan as in progress */ 5603 h->scan_waiting = 0; 5604 spin_unlock_irqrestore(&h->scan_lock, flags); 5605 5606 if (unlikely(lockup_detected(h))) 5607 return hpsa_scan_complete(h); 5608 5609 /* 5610 * Do the scan after a reset completion 5611 */ 5612 if (h->reset_in_progress) { 5613 h->drv_req_rescan = 1; 5614 return; 5615 } 5616 5617 hpsa_update_scsi_devices(h); 5618 5619 hpsa_scan_complete(h); 5620 } 5621 5622 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5623 { 5624 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5625 5626 if (!logical_drive) 5627 return -ENODEV; 5628 5629 if (qdepth < 1) 5630 qdepth = 1; 5631 else if (qdepth > logical_drive->queue_depth) 5632 qdepth = logical_drive->queue_depth; 5633 5634 return scsi_change_queue_depth(sdev, qdepth); 5635 } 5636 5637 static int hpsa_scan_finished(struct Scsi_Host *sh, 5638 unsigned long elapsed_time) 5639 { 5640 struct ctlr_info *h = shost_to_hba(sh); 5641 unsigned long flags; 5642 int finished; 5643 5644 spin_lock_irqsave(&h->scan_lock, flags); 5645 finished = h->scan_finished; 5646 spin_unlock_irqrestore(&h->scan_lock, flags); 5647 return finished; 5648 } 5649 5650 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5651 { 5652 struct Scsi_Host *sh; 5653 5654 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5655 if (sh == NULL) { 5656 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5657 return -ENOMEM; 5658 } 5659 5660 sh->io_port = 0; 5661 sh->n_io_port = 0; 5662 sh->this_id = -1; 5663 sh->max_channel = 3; 5664 sh->max_cmd_len = MAX_COMMAND_SIZE; 5665 sh->max_lun = HPSA_MAX_LUN; 5666 sh->max_id = HPSA_MAX_LUN; 5667 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5668 sh->cmd_per_lun = sh->can_queue; 5669 sh->sg_tablesize = h->maxsgentries; 5670 sh->transportt = hpsa_sas_transport_template; 5671 sh->hostdata[0] = (unsigned long) h; 5672 sh->irq = pci_irq_vector(h->pdev, 0); 5673 sh->unique_id = sh->irq; 5674 5675 h->scsi_host = sh; 5676 return 0; 5677 } 5678 5679 static int hpsa_scsi_add_host(struct ctlr_info *h) 5680 { 5681 int rv; 5682 5683 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5684 if (rv) { 5685 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5686 return rv; 5687 } 5688 scsi_scan_host(h->scsi_host); 5689 return 0; 5690 } 5691 5692 /* 5693 * The block layer has already gone to the trouble of picking out a unique, 5694 * small-integer tag for this request. We use an offset from that value as 5695 * an index to select our command block. (The offset allows us to reserve the 5696 * low-numbered entries for our own uses.) 5697 */ 5698 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5699 { 5700 int idx = scmd->request->tag; 5701 5702 if (idx < 0) 5703 return idx; 5704 5705 /* Offset to leave space for internal cmds. */ 5706 return idx += HPSA_NRESERVED_CMDS; 5707 } 5708 5709 /* 5710 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5711 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5712 */ 5713 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5714 struct CommandList *c, unsigned char lunaddr[], 5715 int reply_queue) 5716 { 5717 int rc; 5718 5719 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5720 (void) fill_cmd(c, TEST_UNIT_READY, h, 5721 NULL, 0, 0, lunaddr, TYPE_CMD); 5722 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5723 if (rc) 5724 return rc; 5725 /* no unmap needed here because no data xfer. */ 5726 5727 /* Check if the unit is already ready. */ 5728 if (c->err_info->CommandStatus == CMD_SUCCESS) 5729 return 0; 5730 5731 /* 5732 * The first command sent after reset will receive "unit attention" to 5733 * indicate that the LUN has been reset...this is actually what we're 5734 * looking for (but, success is good too). 5735 */ 5736 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5737 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5738 (c->err_info->SenseInfo[2] == NO_SENSE || 5739 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5740 return 0; 5741 5742 return 1; 5743 } 5744 5745 /* 5746 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5747 * returns zero when the unit is ready, and non-zero when giving up. 5748 */ 5749 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5750 struct CommandList *c, 5751 unsigned char lunaddr[], int reply_queue) 5752 { 5753 int rc; 5754 int count = 0; 5755 int waittime = 1; /* seconds */ 5756 5757 /* Send test unit ready until device ready, or give up. */ 5758 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5759 5760 /* 5761 * Wait for a bit. do this first, because if we send 5762 * the TUR right away, the reset will just abort it. 5763 */ 5764 msleep(1000 * waittime); 5765 5766 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5767 if (!rc) 5768 break; 5769 5770 /* Increase wait time with each try, up to a point. */ 5771 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5772 waittime *= 2; 5773 5774 dev_warn(&h->pdev->dev, 5775 "waiting %d secs for device to become ready.\n", 5776 waittime); 5777 } 5778 5779 return rc; 5780 } 5781 5782 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5783 unsigned char lunaddr[], 5784 int reply_queue) 5785 { 5786 int first_queue; 5787 int last_queue; 5788 int rq; 5789 int rc = 0; 5790 struct CommandList *c; 5791 5792 c = cmd_alloc(h); 5793 5794 /* 5795 * If no specific reply queue was requested, then send the TUR 5796 * repeatedly, requesting a reply on each reply queue; otherwise execute 5797 * the loop exactly once using only the specified queue. 5798 */ 5799 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5800 first_queue = 0; 5801 last_queue = h->nreply_queues - 1; 5802 } else { 5803 first_queue = reply_queue; 5804 last_queue = reply_queue; 5805 } 5806 5807 for (rq = first_queue; rq <= last_queue; rq++) { 5808 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5809 if (rc) 5810 break; 5811 } 5812 5813 if (rc) 5814 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5815 else 5816 dev_warn(&h->pdev->dev, "device is ready.\n"); 5817 5818 cmd_free(h, c); 5819 return rc; 5820 } 5821 5822 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5823 * complaining. Doing a host- or bus-reset can't do anything good here. 5824 */ 5825 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5826 { 5827 int rc; 5828 struct ctlr_info *h; 5829 struct hpsa_scsi_dev_t *dev; 5830 u8 reset_type; 5831 char msg[48]; 5832 5833 /* find the controller to which the command to be aborted was sent */ 5834 h = sdev_to_hba(scsicmd->device); 5835 if (h == NULL) /* paranoia */ 5836 return FAILED; 5837 5838 if (lockup_detected(h)) 5839 return FAILED; 5840 5841 dev = scsicmd->device->hostdata; 5842 if (!dev) { 5843 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5844 return FAILED; 5845 } 5846 5847 /* if controller locked up, we can guarantee command won't complete */ 5848 if (lockup_detected(h)) { 5849 snprintf(msg, sizeof(msg), 5850 "cmd %d RESET FAILED, lockup detected", 5851 hpsa_get_cmd_index(scsicmd)); 5852 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5853 return FAILED; 5854 } 5855 5856 /* this reset request might be the result of a lockup; check */ 5857 if (detect_controller_lockup(h)) { 5858 snprintf(msg, sizeof(msg), 5859 "cmd %d RESET FAILED, new lockup detected", 5860 hpsa_get_cmd_index(scsicmd)); 5861 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5862 return FAILED; 5863 } 5864 5865 /* Do not attempt on controller */ 5866 if (is_hba_lunid(dev->scsi3addr)) 5867 return SUCCESS; 5868 5869 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5870 reset_type = HPSA_DEVICE_RESET_MSG; 5871 else 5872 reset_type = HPSA_PHYS_TARGET_RESET; 5873 5874 sprintf(msg, "resetting %s", 5875 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5876 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5877 5878 h->reset_in_progress = 1; 5879 5880 /* send a reset to the SCSI LUN which the command was sent to */ 5881 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5882 DEFAULT_REPLY_QUEUE); 5883 sprintf(msg, "reset %s %s", 5884 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5885 rc == 0 ? "completed successfully" : "failed"); 5886 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5887 h->reset_in_progress = 0; 5888 return rc == 0 ? SUCCESS : FAILED; 5889 } 5890 5891 static void swizzle_abort_tag(u8 *tag) 5892 { 5893 u8 original_tag[8]; 5894 5895 memcpy(original_tag, tag, 8); 5896 tag[0] = original_tag[3]; 5897 tag[1] = original_tag[2]; 5898 tag[2] = original_tag[1]; 5899 tag[3] = original_tag[0]; 5900 tag[4] = original_tag[7]; 5901 tag[5] = original_tag[6]; 5902 tag[6] = original_tag[5]; 5903 tag[7] = original_tag[4]; 5904 } 5905 5906 static void hpsa_get_tag(struct ctlr_info *h, 5907 struct CommandList *c, __le32 *taglower, __le32 *tagupper) 5908 { 5909 u64 tag; 5910 if (c->cmd_type == CMD_IOACCEL1) { 5911 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 5912 &h->ioaccel_cmd_pool[c->cmdindex]; 5913 tag = le64_to_cpu(cm1->tag); 5914 *tagupper = cpu_to_le32(tag >> 32); 5915 *taglower = cpu_to_le32(tag); 5916 return; 5917 } 5918 if (c->cmd_type == CMD_IOACCEL2) { 5919 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 5920 &h->ioaccel2_cmd_pool[c->cmdindex]; 5921 /* upper tag not used in ioaccel2 mode */ 5922 memset(tagupper, 0, sizeof(*tagupper)); 5923 *taglower = cm2->Tag; 5924 return; 5925 } 5926 tag = le64_to_cpu(c->Header.tag); 5927 *tagupper = cpu_to_le32(tag >> 32); 5928 *taglower = cpu_to_le32(tag); 5929 } 5930 5931 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 5932 struct CommandList *abort, int reply_queue) 5933 { 5934 int rc = IO_OK; 5935 struct CommandList *c; 5936 struct ErrorInfo *ei; 5937 __le32 tagupper, taglower; 5938 5939 c = cmd_alloc(h); 5940 5941 /* fill_cmd can't fail here, no buffer to map */ 5942 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5943 0, 0, scsi3addr, TYPE_MSG); 5944 if (h->needs_abort_tags_swizzled) 5945 swizzle_abort_tag(&c->Request.CDB[4]); 5946 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5947 hpsa_get_tag(h, abort, &taglower, &tagupper); 5948 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 5949 __func__, tagupper, taglower); 5950 /* no unmap needed here because no data xfer. */ 5951 5952 ei = c->err_info; 5953 switch (ei->CommandStatus) { 5954 case CMD_SUCCESS: 5955 break; 5956 case CMD_TMF_STATUS: 5957 rc = hpsa_evaluate_tmf_status(h, c); 5958 break; 5959 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 5960 rc = -1; 5961 break; 5962 default: 5963 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 5964 __func__, tagupper, taglower); 5965 hpsa_scsi_interpret_error(h, c); 5966 rc = -1; 5967 break; 5968 } 5969 cmd_free(h, c); 5970 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5971 __func__, tagupper, taglower); 5972 return rc; 5973 } 5974 5975 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 5976 struct CommandList *command_to_abort, int reply_queue) 5977 { 5978 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5979 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 5980 struct io_accel2_cmd *c2a = 5981 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5982 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 5983 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 5984 5985 if (!dev) 5986 return; 5987 5988 /* 5989 * We're overlaying struct hpsa_tmf_struct on top of something which 5990 * was allocated as a struct io_accel2_cmd, so we better be sure it 5991 * actually fits, and doesn't overrun the error info space. 5992 */ 5993 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 5994 sizeof(struct io_accel2_cmd)); 5995 BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 5996 offsetof(struct hpsa_tmf_struct, error_len) + 5997 sizeof(ac->error_len)); 5998 5999 c->cmd_type = IOACCEL2_TMF; 6000 c->scsi_cmd = SCSI_CMD_BUSY; 6001 6002 /* Adjust the DMA address to point to the accelerated command buffer */ 6003 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 6004 (c->cmdindex * sizeof(struct io_accel2_cmd)); 6005 BUG_ON(c->busaddr & 0x0000007F); 6006 6007 memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 6008 ac->iu_type = IOACCEL2_IU_TMF_TYPE; 6009 ac->reply_queue = reply_queue; 6010 ac->tmf = IOACCEL2_TMF_ABORT; 6011 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 6012 memset(ac->lun_id, 0, sizeof(ac->lun_id)); 6013 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 6014 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 6015 ac->error_ptr = cpu_to_le64(c->busaddr + 6016 offsetof(struct io_accel2_cmd, error_data)); 6017 ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 6018 } 6019 6020 /* ioaccel2 path firmware cannot handle abort task requests. 6021 * Change abort requests to physical target reset, and send to the 6022 * address of the physical disk used for the ioaccel 2 command. 6023 * Return 0 on success (IO_OK) 6024 * -1 on failure 6025 */ 6026 6027 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 6028 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 6029 { 6030 int rc = IO_OK; 6031 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 6032 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 6033 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 6034 unsigned char *psa = &phys_scsi3addr[0]; 6035 6036 /* Get a pointer to the hpsa logical device. */ 6037 scmd = abort->scsi_cmd; 6038 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 6039 if (dev == NULL) { 6040 dev_warn(&h->pdev->dev, 6041 "Cannot abort: no device pointer for command.\n"); 6042 return -1; /* not abortable */ 6043 } 6044 6045 if (h->raid_offload_debug > 0) 6046 dev_info(&h->pdev->dev, 6047 "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 6048 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6049 "Reset as abort", scsi3addr); 6050 6051 if (!dev->offload_enabled) { 6052 dev_warn(&h->pdev->dev, 6053 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 6054 return -1; /* not abortable */ 6055 } 6056 6057 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 6058 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 6059 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 6060 return -1; /* not abortable */ 6061 } 6062 6063 /* send the reset */ 6064 if (h->raid_offload_debug > 0) 6065 dev_info(&h->pdev->dev, 6066 "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6067 psa); 6068 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 6069 if (rc != 0) { 6070 dev_warn(&h->pdev->dev, 6071 "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6072 psa); 6073 return rc; /* failed to reset */ 6074 } 6075 6076 /* wait for device to recover */ 6077 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 6078 dev_warn(&h->pdev->dev, 6079 "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6080 psa); 6081 return -1; /* failed to recover */ 6082 } 6083 6084 /* device recovered */ 6085 dev_info(&h->pdev->dev, 6086 "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6087 psa); 6088 6089 return rc; /* success */ 6090 } 6091 6092 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 6093 struct CommandList *abort, int reply_queue) 6094 { 6095 int rc = IO_OK; 6096 struct CommandList *c; 6097 __le32 taglower, tagupper; 6098 struct hpsa_scsi_dev_t *dev; 6099 struct io_accel2_cmd *c2; 6100 6101 dev = abort->scsi_cmd->device->hostdata; 6102 if (!dev) 6103 return -1; 6104 6105 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 6106 return -1; 6107 6108 c = cmd_alloc(h); 6109 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 6110 c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6111 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 6112 hpsa_get_tag(h, abort, &taglower, &tagupper); 6113 dev_dbg(&h->pdev->dev, 6114 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 6115 __func__, tagupper, taglower); 6116 /* no unmap needed here because no data xfer. */ 6117 6118 dev_dbg(&h->pdev->dev, 6119 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 6120 __func__, tagupper, taglower, c2->error_data.serv_response); 6121 switch (c2->error_data.serv_response) { 6122 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 6123 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 6124 rc = 0; 6125 break; 6126 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 6127 case IOACCEL2_SERV_RESPONSE_FAILURE: 6128 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 6129 rc = -1; 6130 break; 6131 default: 6132 dev_warn(&h->pdev->dev, 6133 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 6134 __func__, tagupper, taglower, 6135 c2->error_data.serv_response); 6136 rc = -1; 6137 } 6138 cmd_free(h, c); 6139 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 6140 tagupper, taglower); 6141 return rc; 6142 } 6143 6144 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 6145 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 6146 { 6147 /* 6148 * ioccelerator mode 2 commands should be aborted via the 6149 * accelerated path, since RAID path is unaware of these commands, 6150 * but not all underlying firmware can handle abort TMF. 6151 * Change abort to physical device reset when abort TMF is unsupported. 6152 */ 6153 if (abort->cmd_type == CMD_IOACCEL2) { 6154 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 6155 dev->physical_device) 6156 return hpsa_send_abort_ioaccel2(h, abort, 6157 reply_queue); 6158 else 6159 return hpsa_send_reset_as_abort_ioaccel2(h, 6160 dev->scsi3addr, 6161 abort, reply_queue); 6162 } 6163 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 6164 } 6165 6166 /* Find out which reply queue a command was meant to return on */ 6167 static int hpsa_extract_reply_queue(struct ctlr_info *h, 6168 struct CommandList *c) 6169 { 6170 if (c->cmd_type == CMD_IOACCEL2) 6171 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 6172 return c->Header.ReplyQueue; 6173 } 6174 6175 /* 6176 * Limit concurrency of abort commands to prevent 6177 * over-subscription of commands 6178 */ 6179 static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 6180 { 6181 #define ABORT_CMD_WAIT_MSECS 5000 6182 return !wait_event_timeout(h->abort_cmd_wait_queue, 6183 atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 6184 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 6185 } 6186 6187 /* Send an abort for the specified command. 6188 * If the device and controller support it, 6189 * send a task abort request. 6190 */ 6191 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 6192 { 6193 6194 int rc; 6195 struct ctlr_info *h; 6196 struct hpsa_scsi_dev_t *dev; 6197 struct CommandList *abort; /* pointer to command to be aborted */ 6198 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 6199 char msg[256]; /* For debug messaging. */ 6200 int ml = 0; 6201 __le32 tagupper, taglower; 6202 int refcount, reply_queue; 6203 6204 if (sc == NULL) 6205 return FAILED; 6206 6207 if (sc->device == NULL) 6208 return FAILED; 6209 6210 /* Find the controller of the command to be aborted */ 6211 h = sdev_to_hba(sc->device); 6212 if (h == NULL) 6213 return FAILED; 6214 6215 /* Find the device of the command to be aborted */ 6216 dev = sc->device->hostdata; 6217 if (!dev) { 6218 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 6219 msg); 6220 return FAILED; 6221 } 6222 6223 /* If controller locked up, we can guarantee command won't complete */ 6224 if (lockup_detected(h)) { 6225 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6226 "ABORT FAILED, lockup detected"); 6227 return FAILED; 6228 } 6229 6230 /* This is a good time to check if controller lockup has occurred */ 6231 if (detect_controller_lockup(h)) { 6232 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6233 "ABORT FAILED, new lockup detected"); 6234 return FAILED; 6235 } 6236 6237 /* Check that controller supports some kind of task abort */ 6238 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 6239 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6240 return FAILED; 6241 6242 memset(msg, 0, sizeof(msg)); 6243 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 6244 h->scsi_host->host_no, sc->device->channel, 6245 sc->device->id, sc->device->lun, 6246 "Aborting command", sc); 6247 6248 /* Get SCSI command to be aborted */ 6249 abort = (struct CommandList *) sc->host_scribble; 6250 if (abort == NULL) { 6251 /* This can happen if the command already completed. */ 6252 return SUCCESS; 6253 } 6254 refcount = atomic_inc_return(&abort->refcount); 6255 if (refcount == 1) { /* Command is done already. */ 6256 cmd_free(h, abort); 6257 return SUCCESS; 6258 } 6259 6260 /* Don't bother trying the abort if we know it won't work. */ 6261 if (abort->cmd_type != CMD_IOACCEL2 && 6262 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 6263 cmd_free(h, abort); 6264 return FAILED; 6265 } 6266 6267 /* 6268 * Check that we're aborting the right command. 6269 * It's possible the CommandList already completed and got re-used. 6270 */ 6271 if (abort->scsi_cmd != sc) { 6272 cmd_free(h, abort); 6273 return SUCCESS; 6274 } 6275 6276 abort->abort_pending = true; 6277 hpsa_get_tag(h, abort, &taglower, &tagupper); 6278 reply_queue = hpsa_extract_reply_queue(h, abort); 6279 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 6280 as = abort->scsi_cmd; 6281 if (as != NULL) 6282 ml += sprintf(msg+ml, 6283 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 6284 as->cmd_len, as->cmnd[0], as->cmnd[1], 6285 as->serial_number); 6286 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 6287 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 6288 6289 /* 6290 * Command is in flight, or possibly already completed 6291 * by the firmware (but not to the scsi mid layer) but we can't 6292 * distinguish which. Send the abort down. 6293 */ 6294 if (wait_for_available_abort_cmd(h)) { 6295 dev_warn(&h->pdev->dev, 6296 "%s FAILED, timeout waiting for an abort command to become available.\n", 6297 msg); 6298 cmd_free(h, abort); 6299 return FAILED; 6300 } 6301 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 6302 atomic_inc(&h->abort_cmds_available); 6303 wake_up_all(&h->abort_cmd_wait_queue); 6304 if (rc != 0) { 6305 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 6306 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6307 "FAILED to abort command"); 6308 cmd_free(h, abort); 6309 return FAILED; 6310 } 6311 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6312 wait_event(h->event_sync_wait_queue, 6313 abort->scsi_cmd != sc || lockup_detected(h)); 6314 cmd_free(h, abort); 6315 return !lockup_detected(h) ? SUCCESS : FAILED; 6316 } 6317 6318 /* 6319 * For operations with an associated SCSI command, a command block is allocated 6320 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6321 * block request tag as an index into a table of entries. cmd_tagged_free() is 6322 * the complement, although cmd_free() may be called instead. 6323 */ 6324 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6325 struct scsi_cmnd *scmd) 6326 { 6327 int idx = hpsa_get_cmd_index(scmd); 6328 struct CommandList *c = h->cmd_pool + idx; 6329 6330 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6331 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6332 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6333 /* The index value comes from the block layer, so if it's out of 6334 * bounds, it's probably not our bug. 6335 */ 6336 BUG(); 6337 } 6338 6339 atomic_inc(&c->refcount); 6340 if (unlikely(!hpsa_is_cmd_idle(c))) { 6341 /* 6342 * We expect that the SCSI layer will hand us a unique tag 6343 * value. Thus, there should never be a collision here between 6344 * two requests...because if the selected command isn't idle 6345 * then someone is going to be very disappointed. 6346 */ 6347 dev_err(&h->pdev->dev, 6348 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6349 idx); 6350 if (c->scsi_cmd != NULL) 6351 scsi_print_command(c->scsi_cmd); 6352 scsi_print_command(scmd); 6353 } 6354 6355 hpsa_cmd_partial_init(h, idx, c); 6356 return c; 6357 } 6358 6359 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6360 { 6361 /* 6362 * Release our reference to the block. We don't need to do anything 6363 * else to free it, because it is accessed by index. (There's no point 6364 * in checking the result of the decrement, since we cannot guarantee 6365 * that there isn't a concurrent abort which is also accessing it.) 6366 */ 6367 (void)atomic_dec(&c->refcount); 6368 } 6369 6370 /* 6371 * For operations that cannot sleep, a command block is allocated at init, 6372 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6373 * which ones are free or in use. Lock must be held when calling this. 6374 * cmd_free() is the complement. 6375 * This function never gives up and returns NULL. If it hangs, 6376 * another thread must call cmd_free() to free some tags. 6377 */ 6378 6379 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6380 { 6381 struct CommandList *c; 6382 int refcount, i; 6383 int offset = 0; 6384 6385 /* 6386 * There is some *extremely* small but non-zero chance that that 6387 * multiple threads could get in here, and one thread could 6388 * be scanning through the list of bits looking for a free 6389 * one, but the free ones are always behind him, and other 6390 * threads sneak in behind him and eat them before he can 6391 * get to them, so that while there is always a free one, a 6392 * very unlucky thread might be starved anyway, never able to 6393 * beat the other threads. In reality, this happens so 6394 * infrequently as to be indistinguishable from never. 6395 * 6396 * Note that we start allocating commands before the SCSI host structure 6397 * is initialized. Since the search starts at bit zero, this 6398 * all works, since we have at least one command structure available; 6399 * however, it means that the structures with the low indexes have to be 6400 * reserved for driver-initiated requests, while requests from the block 6401 * layer will use the higher indexes. 6402 */ 6403 6404 for (;;) { 6405 i = find_next_zero_bit(h->cmd_pool_bits, 6406 HPSA_NRESERVED_CMDS, 6407 offset); 6408 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6409 offset = 0; 6410 continue; 6411 } 6412 c = h->cmd_pool + i; 6413 refcount = atomic_inc_return(&c->refcount); 6414 if (unlikely(refcount > 1)) { 6415 cmd_free(h, c); /* already in use */ 6416 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6417 continue; 6418 } 6419 set_bit(i & (BITS_PER_LONG - 1), 6420 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6421 break; /* it's ours now. */ 6422 } 6423 hpsa_cmd_partial_init(h, i, c); 6424 return c; 6425 } 6426 6427 /* 6428 * This is the complementary operation to cmd_alloc(). Note, however, in some 6429 * corner cases it may also be used to free blocks allocated by 6430 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6431 * the clear-bit is harmless. 6432 */ 6433 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6434 { 6435 if (atomic_dec_and_test(&c->refcount)) { 6436 int i; 6437 6438 i = c - h->cmd_pool; 6439 clear_bit(i & (BITS_PER_LONG - 1), 6440 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6441 } 6442 } 6443 6444 #ifdef CONFIG_COMPAT 6445 6446 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6447 void __user *arg) 6448 { 6449 IOCTL32_Command_struct __user *arg32 = 6450 (IOCTL32_Command_struct __user *) arg; 6451 IOCTL_Command_struct arg64; 6452 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6453 int err; 6454 u32 cp; 6455 6456 memset(&arg64, 0, sizeof(arg64)); 6457 err = 0; 6458 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6459 sizeof(arg64.LUN_info)); 6460 err |= copy_from_user(&arg64.Request, &arg32->Request, 6461 sizeof(arg64.Request)); 6462 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6463 sizeof(arg64.error_info)); 6464 err |= get_user(arg64.buf_size, &arg32->buf_size); 6465 err |= get_user(cp, &arg32->buf); 6466 arg64.buf = compat_ptr(cp); 6467 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6468 6469 if (err) 6470 return -EFAULT; 6471 6472 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6473 if (err) 6474 return err; 6475 err |= copy_in_user(&arg32->error_info, &p->error_info, 6476 sizeof(arg32->error_info)); 6477 if (err) 6478 return -EFAULT; 6479 return err; 6480 } 6481 6482 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6483 int cmd, void __user *arg) 6484 { 6485 BIG_IOCTL32_Command_struct __user *arg32 = 6486 (BIG_IOCTL32_Command_struct __user *) arg; 6487 BIG_IOCTL_Command_struct arg64; 6488 BIG_IOCTL_Command_struct __user *p = 6489 compat_alloc_user_space(sizeof(arg64)); 6490 int err; 6491 u32 cp; 6492 6493 memset(&arg64, 0, sizeof(arg64)); 6494 err = 0; 6495 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6496 sizeof(arg64.LUN_info)); 6497 err |= copy_from_user(&arg64.Request, &arg32->Request, 6498 sizeof(arg64.Request)); 6499 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6500 sizeof(arg64.error_info)); 6501 err |= get_user(arg64.buf_size, &arg32->buf_size); 6502 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6503 err |= get_user(cp, &arg32->buf); 6504 arg64.buf = compat_ptr(cp); 6505 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6506 6507 if (err) 6508 return -EFAULT; 6509 6510 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6511 if (err) 6512 return err; 6513 err |= copy_in_user(&arg32->error_info, &p->error_info, 6514 sizeof(arg32->error_info)); 6515 if (err) 6516 return -EFAULT; 6517 return err; 6518 } 6519 6520 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6521 { 6522 switch (cmd) { 6523 case CCISS_GETPCIINFO: 6524 case CCISS_GETINTINFO: 6525 case CCISS_SETINTINFO: 6526 case CCISS_GETNODENAME: 6527 case CCISS_SETNODENAME: 6528 case CCISS_GETHEARTBEAT: 6529 case CCISS_GETBUSTYPES: 6530 case CCISS_GETFIRMVER: 6531 case CCISS_GETDRIVVER: 6532 case CCISS_REVALIDVOLS: 6533 case CCISS_DEREGDISK: 6534 case CCISS_REGNEWDISK: 6535 case CCISS_REGNEWD: 6536 case CCISS_RESCANDISK: 6537 case CCISS_GETLUNINFO: 6538 return hpsa_ioctl(dev, cmd, arg); 6539 6540 case CCISS_PASSTHRU32: 6541 return hpsa_ioctl32_passthru(dev, cmd, arg); 6542 case CCISS_BIG_PASSTHRU32: 6543 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6544 6545 default: 6546 return -ENOIOCTLCMD; 6547 } 6548 } 6549 #endif 6550 6551 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6552 { 6553 struct hpsa_pci_info pciinfo; 6554 6555 if (!argp) 6556 return -EINVAL; 6557 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6558 pciinfo.bus = h->pdev->bus->number; 6559 pciinfo.dev_fn = h->pdev->devfn; 6560 pciinfo.board_id = h->board_id; 6561 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6562 return -EFAULT; 6563 return 0; 6564 } 6565 6566 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6567 { 6568 DriverVer_type DriverVer; 6569 unsigned char vmaj, vmin, vsubmin; 6570 int rc; 6571 6572 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6573 &vmaj, &vmin, &vsubmin); 6574 if (rc != 3) { 6575 dev_info(&h->pdev->dev, "driver version string '%s' " 6576 "unrecognized.", HPSA_DRIVER_VERSION); 6577 vmaj = 0; 6578 vmin = 0; 6579 vsubmin = 0; 6580 } 6581 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6582 if (!argp) 6583 return -EINVAL; 6584 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6585 return -EFAULT; 6586 return 0; 6587 } 6588 6589 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6590 { 6591 IOCTL_Command_struct iocommand; 6592 struct CommandList *c; 6593 char *buff = NULL; 6594 u64 temp64; 6595 int rc = 0; 6596 6597 if (!argp) 6598 return -EINVAL; 6599 if (!capable(CAP_SYS_RAWIO)) 6600 return -EPERM; 6601 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6602 return -EFAULT; 6603 if ((iocommand.buf_size < 1) && 6604 (iocommand.Request.Type.Direction != XFER_NONE)) { 6605 return -EINVAL; 6606 } 6607 if (iocommand.buf_size > 0) { 6608 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6609 if (buff == NULL) 6610 return -ENOMEM; 6611 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6612 /* Copy the data into the buffer we created */ 6613 if (copy_from_user(buff, iocommand.buf, 6614 iocommand.buf_size)) { 6615 rc = -EFAULT; 6616 goto out_kfree; 6617 } 6618 } else { 6619 memset(buff, 0, iocommand.buf_size); 6620 } 6621 } 6622 c = cmd_alloc(h); 6623 6624 /* Fill in the command type */ 6625 c->cmd_type = CMD_IOCTL_PEND; 6626 c->scsi_cmd = SCSI_CMD_BUSY; 6627 /* Fill in Command Header */ 6628 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6629 if (iocommand.buf_size > 0) { /* buffer to fill */ 6630 c->Header.SGList = 1; 6631 c->Header.SGTotal = cpu_to_le16(1); 6632 } else { /* no buffers to fill */ 6633 c->Header.SGList = 0; 6634 c->Header.SGTotal = cpu_to_le16(0); 6635 } 6636 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6637 6638 /* Fill in Request block */ 6639 memcpy(&c->Request, &iocommand.Request, 6640 sizeof(c->Request)); 6641 6642 /* Fill in the scatter gather information */ 6643 if (iocommand.buf_size > 0) { 6644 temp64 = pci_map_single(h->pdev, buff, 6645 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6646 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6647 c->SG[0].Addr = cpu_to_le64(0); 6648 c->SG[0].Len = cpu_to_le32(0); 6649 rc = -ENOMEM; 6650 goto out; 6651 } 6652 c->SG[0].Addr = cpu_to_le64(temp64); 6653 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6654 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6655 } 6656 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6657 NO_TIMEOUT); 6658 if (iocommand.buf_size > 0) 6659 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6660 check_ioctl_unit_attention(h, c); 6661 if (rc) { 6662 rc = -EIO; 6663 goto out; 6664 } 6665 6666 /* Copy the error information out */ 6667 memcpy(&iocommand.error_info, c->err_info, 6668 sizeof(iocommand.error_info)); 6669 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6670 rc = -EFAULT; 6671 goto out; 6672 } 6673 if ((iocommand.Request.Type.Direction & XFER_READ) && 6674 iocommand.buf_size > 0) { 6675 /* Copy the data out of the buffer we created */ 6676 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6677 rc = -EFAULT; 6678 goto out; 6679 } 6680 } 6681 out: 6682 cmd_free(h, c); 6683 out_kfree: 6684 kfree(buff); 6685 return rc; 6686 } 6687 6688 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6689 { 6690 BIG_IOCTL_Command_struct *ioc; 6691 struct CommandList *c; 6692 unsigned char **buff = NULL; 6693 int *buff_size = NULL; 6694 u64 temp64; 6695 BYTE sg_used = 0; 6696 int status = 0; 6697 u32 left; 6698 u32 sz; 6699 BYTE __user *data_ptr; 6700 6701 if (!argp) 6702 return -EINVAL; 6703 if (!capable(CAP_SYS_RAWIO)) 6704 return -EPERM; 6705 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6706 if (!ioc) { 6707 status = -ENOMEM; 6708 goto cleanup1; 6709 } 6710 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6711 status = -EFAULT; 6712 goto cleanup1; 6713 } 6714 if ((ioc->buf_size < 1) && 6715 (ioc->Request.Type.Direction != XFER_NONE)) { 6716 status = -EINVAL; 6717 goto cleanup1; 6718 } 6719 /* Check kmalloc limits using all SGs */ 6720 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6721 status = -EINVAL; 6722 goto cleanup1; 6723 } 6724 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6725 status = -EINVAL; 6726 goto cleanup1; 6727 } 6728 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6729 if (!buff) { 6730 status = -ENOMEM; 6731 goto cleanup1; 6732 } 6733 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6734 if (!buff_size) { 6735 status = -ENOMEM; 6736 goto cleanup1; 6737 } 6738 left = ioc->buf_size; 6739 data_ptr = ioc->buf; 6740 while (left) { 6741 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6742 buff_size[sg_used] = sz; 6743 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6744 if (buff[sg_used] == NULL) { 6745 status = -ENOMEM; 6746 goto cleanup1; 6747 } 6748 if (ioc->Request.Type.Direction & XFER_WRITE) { 6749 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6750 status = -EFAULT; 6751 goto cleanup1; 6752 } 6753 } else 6754 memset(buff[sg_used], 0, sz); 6755 left -= sz; 6756 data_ptr += sz; 6757 sg_used++; 6758 } 6759 c = cmd_alloc(h); 6760 6761 c->cmd_type = CMD_IOCTL_PEND; 6762 c->scsi_cmd = SCSI_CMD_BUSY; 6763 c->Header.ReplyQueue = 0; 6764 c->Header.SGList = (u8) sg_used; 6765 c->Header.SGTotal = cpu_to_le16(sg_used); 6766 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6767 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6768 if (ioc->buf_size > 0) { 6769 int i; 6770 for (i = 0; i < sg_used; i++) { 6771 temp64 = pci_map_single(h->pdev, buff[i], 6772 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6773 if (dma_mapping_error(&h->pdev->dev, 6774 (dma_addr_t) temp64)) { 6775 c->SG[i].Addr = cpu_to_le64(0); 6776 c->SG[i].Len = cpu_to_le32(0); 6777 hpsa_pci_unmap(h->pdev, c, i, 6778 PCI_DMA_BIDIRECTIONAL); 6779 status = -ENOMEM; 6780 goto cleanup0; 6781 } 6782 c->SG[i].Addr = cpu_to_le64(temp64); 6783 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6784 c->SG[i].Ext = cpu_to_le32(0); 6785 } 6786 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6787 } 6788 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6789 NO_TIMEOUT); 6790 if (sg_used) 6791 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6792 check_ioctl_unit_attention(h, c); 6793 if (status) { 6794 status = -EIO; 6795 goto cleanup0; 6796 } 6797 6798 /* Copy the error information out */ 6799 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6800 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6801 status = -EFAULT; 6802 goto cleanup0; 6803 } 6804 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6805 int i; 6806 6807 /* Copy the data out of the buffer we created */ 6808 BYTE __user *ptr = ioc->buf; 6809 for (i = 0; i < sg_used; i++) { 6810 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6811 status = -EFAULT; 6812 goto cleanup0; 6813 } 6814 ptr += buff_size[i]; 6815 } 6816 } 6817 status = 0; 6818 cleanup0: 6819 cmd_free(h, c); 6820 cleanup1: 6821 if (buff) { 6822 int i; 6823 6824 for (i = 0; i < sg_used; i++) 6825 kfree(buff[i]); 6826 kfree(buff); 6827 } 6828 kfree(buff_size); 6829 kfree(ioc); 6830 return status; 6831 } 6832 6833 static void check_ioctl_unit_attention(struct ctlr_info *h, 6834 struct CommandList *c) 6835 { 6836 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6837 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6838 (void) check_for_unit_attention(h, c); 6839 } 6840 6841 /* 6842 * ioctl 6843 */ 6844 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6845 { 6846 struct ctlr_info *h; 6847 void __user *argp = (void __user *)arg; 6848 int rc; 6849 6850 h = sdev_to_hba(dev); 6851 6852 switch (cmd) { 6853 case CCISS_DEREGDISK: 6854 case CCISS_REGNEWDISK: 6855 case CCISS_REGNEWD: 6856 hpsa_scan_start(h->scsi_host); 6857 return 0; 6858 case CCISS_GETPCIINFO: 6859 return hpsa_getpciinfo_ioctl(h, argp); 6860 case CCISS_GETDRIVVER: 6861 return hpsa_getdrivver_ioctl(h, argp); 6862 case CCISS_PASSTHRU: 6863 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6864 return -EAGAIN; 6865 rc = hpsa_passthru_ioctl(h, argp); 6866 atomic_inc(&h->passthru_cmds_avail); 6867 return rc; 6868 case CCISS_BIG_PASSTHRU: 6869 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6870 return -EAGAIN; 6871 rc = hpsa_big_passthru_ioctl(h, argp); 6872 atomic_inc(&h->passthru_cmds_avail); 6873 return rc; 6874 default: 6875 return -ENOTTY; 6876 } 6877 } 6878 6879 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6880 u8 reset_type) 6881 { 6882 struct CommandList *c; 6883 6884 c = cmd_alloc(h); 6885 6886 /* fill_cmd can't fail here, no data buffer to map */ 6887 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6888 RAID_CTLR_LUNID, TYPE_MSG); 6889 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6890 c->waiting = NULL; 6891 enqueue_cmd_and_start_io(h, c); 6892 /* Don't wait for completion, the reset won't complete. Don't free 6893 * the command either. This is the last command we will send before 6894 * re-initializing everything, so it doesn't matter and won't leak. 6895 */ 6896 return; 6897 } 6898 6899 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6900 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6901 int cmd_type) 6902 { 6903 int pci_dir = XFER_NONE; 6904 u64 tag; /* for commands to be aborted */ 6905 6906 c->cmd_type = CMD_IOCTL_PEND; 6907 c->scsi_cmd = SCSI_CMD_BUSY; 6908 c->Header.ReplyQueue = 0; 6909 if (buff != NULL && size > 0) { 6910 c->Header.SGList = 1; 6911 c->Header.SGTotal = cpu_to_le16(1); 6912 } else { 6913 c->Header.SGList = 0; 6914 c->Header.SGTotal = cpu_to_le16(0); 6915 } 6916 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6917 6918 if (cmd_type == TYPE_CMD) { 6919 switch (cmd) { 6920 case HPSA_INQUIRY: 6921 /* are we trying to read a vital product page */ 6922 if (page_code & VPD_PAGE) { 6923 c->Request.CDB[1] = 0x01; 6924 c->Request.CDB[2] = (page_code & 0xff); 6925 } 6926 c->Request.CDBLen = 6; 6927 c->Request.type_attr_dir = 6928 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6929 c->Request.Timeout = 0; 6930 c->Request.CDB[0] = HPSA_INQUIRY; 6931 c->Request.CDB[4] = size & 0xFF; 6932 break; 6933 case HPSA_REPORT_LOG: 6934 case HPSA_REPORT_PHYS: 6935 /* Talking to controller so It's a physical command 6936 mode = 00 target = 0. Nothing to write. 6937 */ 6938 c->Request.CDBLen = 12; 6939 c->Request.type_attr_dir = 6940 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6941 c->Request.Timeout = 0; 6942 c->Request.CDB[0] = cmd; 6943 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6944 c->Request.CDB[7] = (size >> 16) & 0xFF; 6945 c->Request.CDB[8] = (size >> 8) & 0xFF; 6946 c->Request.CDB[9] = size & 0xFF; 6947 break; 6948 case BMIC_SENSE_DIAG_OPTIONS: 6949 c->Request.CDBLen = 16; 6950 c->Request.type_attr_dir = 6951 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6952 c->Request.Timeout = 0; 6953 /* Spec says this should be BMIC_WRITE */ 6954 c->Request.CDB[0] = BMIC_READ; 6955 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6956 break; 6957 case BMIC_SET_DIAG_OPTIONS: 6958 c->Request.CDBLen = 16; 6959 c->Request.type_attr_dir = 6960 TYPE_ATTR_DIR(cmd_type, 6961 ATTR_SIMPLE, XFER_WRITE); 6962 c->Request.Timeout = 0; 6963 c->Request.CDB[0] = BMIC_WRITE; 6964 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6965 break; 6966 case HPSA_CACHE_FLUSH: 6967 c->Request.CDBLen = 12; 6968 c->Request.type_attr_dir = 6969 TYPE_ATTR_DIR(cmd_type, 6970 ATTR_SIMPLE, XFER_WRITE); 6971 c->Request.Timeout = 0; 6972 c->Request.CDB[0] = BMIC_WRITE; 6973 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6974 c->Request.CDB[7] = (size >> 8) & 0xFF; 6975 c->Request.CDB[8] = size & 0xFF; 6976 break; 6977 case TEST_UNIT_READY: 6978 c->Request.CDBLen = 6; 6979 c->Request.type_attr_dir = 6980 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6981 c->Request.Timeout = 0; 6982 break; 6983 case HPSA_GET_RAID_MAP: 6984 c->Request.CDBLen = 12; 6985 c->Request.type_attr_dir = 6986 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6987 c->Request.Timeout = 0; 6988 c->Request.CDB[0] = HPSA_CISS_READ; 6989 c->Request.CDB[1] = cmd; 6990 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6991 c->Request.CDB[7] = (size >> 16) & 0xFF; 6992 c->Request.CDB[8] = (size >> 8) & 0xFF; 6993 c->Request.CDB[9] = size & 0xFF; 6994 break; 6995 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6996 c->Request.CDBLen = 10; 6997 c->Request.type_attr_dir = 6998 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6999 c->Request.Timeout = 0; 7000 c->Request.CDB[0] = BMIC_READ; 7001 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 7002 c->Request.CDB[7] = (size >> 16) & 0xFF; 7003 c->Request.CDB[8] = (size >> 8) & 0xFF; 7004 break; 7005 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 7006 c->Request.CDBLen = 10; 7007 c->Request.type_attr_dir = 7008 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7009 c->Request.Timeout = 0; 7010 c->Request.CDB[0] = BMIC_READ; 7011 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 7012 c->Request.CDB[7] = (size >> 16) & 0xFF; 7013 c->Request.CDB[8] = (size >> 8) & 0XFF; 7014 break; 7015 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7016 c->Request.CDBLen = 10; 7017 c->Request.type_attr_dir = 7018 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7019 c->Request.Timeout = 0; 7020 c->Request.CDB[0] = BMIC_READ; 7021 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7022 c->Request.CDB[7] = (size >> 16) & 0xFF; 7023 c->Request.CDB[8] = (size >> 8) & 0XFF; 7024 break; 7025 case BMIC_SENSE_STORAGE_BOX_PARAMS: 7026 c->Request.CDBLen = 10; 7027 c->Request.type_attr_dir = 7028 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7029 c->Request.Timeout = 0; 7030 c->Request.CDB[0] = BMIC_READ; 7031 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7032 c->Request.CDB[7] = (size >> 16) & 0xFF; 7033 c->Request.CDB[8] = (size >> 8) & 0XFF; 7034 break; 7035 case BMIC_IDENTIFY_CONTROLLER: 7036 c->Request.CDBLen = 10; 7037 c->Request.type_attr_dir = 7038 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7039 c->Request.Timeout = 0; 7040 c->Request.CDB[0] = BMIC_READ; 7041 c->Request.CDB[1] = 0; 7042 c->Request.CDB[2] = 0; 7043 c->Request.CDB[3] = 0; 7044 c->Request.CDB[4] = 0; 7045 c->Request.CDB[5] = 0; 7046 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 7047 c->Request.CDB[7] = (size >> 16) & 0xFF; 7048 c->Request.CDB[8] = (size >> 8) & 0XFF; 7049 c->Request.CDB[9] = 0; 7050 break; 7051 default: 7052 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7053 BUG(); 7054 return -1; 7055 } 7056 } else if (cmd_type == TYPE_MSG) { 7057 switch (cmd) { 7058 7059 case HPSA_PHYS_TARGET_RESET: 7060 c->Request.CDBLen = 16; 7061 c->Request.type_attr_dir = 7062 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7063 c->Request.Timeout = 0; /* Don't time out */ 7064 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7065 c->Request.CDB[0] = HPSA_RESET; 7066 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 7067 /* Physical target reset needs no control bytes 4-7*/ 7068 c->Request.CDB[4] = 0x00; 7069 c->Request.CDB[5] = 0x00; 7070 c->Request.CDB[6] = 0x00; 7071 c->Request.CDB[7] = 0x00; 7072 break; 7073 case HPSA_DEVICE_RESET_MSG: 7074 c->Request.CDBLen = 16; 7075 c->Request.type_attr_dir = 7076 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7077 c->Request.Timeout = 0; /* Don't time out */ 7078 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7079 c->Request.CDB[0] = cmd; 7080 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7081 /* If bytes 4-7 are zero, it means reset the */ 7082 /* LunID device */ 7083 c->Request.CDB[4] = 0x00; 7084 c->Request.CDB[5] = 0x00; 7085 c->Request.CDB[6] = 0x00; 7086 c->Request.CDB[7] = 0x00; 7087 break; 7088 case HPSA_ABORT_MSG: 7089 memcpy(&tag, buff, sizeof(tag)); 7090 dev_dbg(&h->pdev->dev, 7091 "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 7092 tag, c->Header.tag); 7093 c->Request.CDBLen = 16; 7094 c->Request.type_attr_dir = 7095 TYPE_ATTR_DIR(cmd_type, 7096 ATTR_SIMPLE, XFER_WRITE); 7097 c->Request.Timeout = 0; /* Don't time out */ 7098 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 7099 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 7100 c->Request.CDB[2] = 0x00; /* reserved */ 7101 c->Request.CDB[3] = 0x00; /* reserved */ 7102 /* Tag to abort goes in CDB[4]-CDB[11] */ 7103 memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 7104 c->Request.CDB[12] = 0x00; /* reserved */ 7105 c->Request.CDB[13] = 0x00; /* reserved */ 7106 c->Request.CDB[14] = 0x00; /* reserved */ 7107 c->Request.CDB[15] = 0x00; /* reserved */ 7108 break; 7109 default: 7110 dev_warn(&h->pdev->dev, "unknown message type %d\n", 7111 cmd); 7112 BUG(); 7113 } 7114 } else { 7115 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7116 BUG(); 7117 } 7118 7119 switch (GET_DIR(c->Request.type_attr_dir)) { 7120 case XFER_READ: 7121 pci_dir = PCI_DMA_FROMDEVICE; 7122 break; 7123 case XFER_WRITE: 7124 pci_dir = PCI_DMA_TODEVICE; 7125 break; 7126 case XFER_NONE: 7127 pci_dir = PCI_DMA_NONE; 7128 break; 7129 default: 7130 pci_dir = PCI_DMA_BIDIRECTIONAL; 7131 } 7132 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7133 return -1; 7134 return 0; 7135 } 7136 7137 /* 7138 * Map (physical) PCI mem into (virtual) kernel space 7139 */ 7140 static void __iomem *remap_pci_mem(ulong base, ulong size) 7141 { 7142 ulong page_base = ((ulong) base) & PAGE_MASK; 7143 ulong page_offs = ((ulong) base) - page_base; 7144 void __iomem *page_remapped = ioremap_nocache(page_base, 7145 page_offs + size); 7146 7147 return page_remapped ? (page_remapped + page_offs) : NULL; 7148 } 7149 7150 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7151 { 7152 return h->access.command_completed(h, q); 7153 } 7154 7155 static inline bool interrupt_pending(struct ctlr_info *h) 7156 { 7157 return h->access.intr_pending(h); 7158 } 7159 7160 static inline long interrupt_not_for_us(struct ctlr_info *h) 7161 { 7162 return (h->access.intr_pending(h) == 0) || 7163 (h->interrupts_enabled == 0); 7164 } 7165 7166 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 7167 u32 raw_tag) 7168 { 7169 if (unlikely(tag_index >= h->nr_cmds)) { 7170 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7171 return 1; 7172 } 7173 return 0; 7174 } 7175 7176 static inline void finish_cmd(struct CommandList *c) 7177 { 7178 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7179 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7180 || c->cmd_type == CMD_IOACCEL2)) 7181 complete_scsi_command(c); 7182 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7183 complete(c->waiting); 7184 } 7185 7186 /* process completion of an indexed ("direct lookup") command */ 7187 static inline void process_indexed_cmd(struct ctlr_info *h, 7188 u32 raw_tag) 7189 { 7190 u32 tag_index; 7191 struct CommandList *c; 7192 7193 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 7194 if (!bad_tag(h, tag_index, raw_tag)) { 7195 c = h->cmd_pool + tag_index; 7196 finish_cmd(c); 7197 } 7198 } 7199 7200 /* Some controllers, like p400, will give us one interrupt 7201 * after a soft reset, even if we turned interrupts off. 7202 * Only need to check for this in the hpsa_xxx_discard_completions 7203 * functions. 7204 */ 7205 static int ignore_bogus_interrupt(struct ctlr_info *h) 7206 { 7207 if (likely(!reset_devices)) 7208 return 0; 7209 7210 if (likely(h->interrupts_enabled)) 7211 return 0; 7212 7213 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 7214 "(known firmware bug.) Ignoring.\n"); 7215 7216 return 1; 7217 } 7218 7219 /* 7220 * Convert &h->q[x] (passed to interrupt handlers) back to h. 7221 * Relies on (h-q[x] == x) being true for x such that 7222 * 0 <= x < MAX_REPLY_QUEUES. 7223 */ 7224 static struct ctlr_info *queue_to_hba(u8 *queue) 7225 { 7226 return container_of((queue - *queue), struct ctlr_info, q[0]); 7227 } 7228 7229 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7230 { 7231 struct ctlr_info *h = queue_to_hba(queue); 7232 u8 q = *(u8 *) queue; 7233 u32 raw_tag; 7234 7235 if (ignore_bogus_interrupt(h)) 7236 return IRQ_NONE; 7237 7238 if (interrupt_not_for_us(h)) 7239 return IRQ_NONE; 7240 h->last_intr_timestamp = get_jiffies_64(); 7241 while (interrupt_pending(h)) { 7242 raw_tag = get_next_completion(h, q); 7243 while (raw_tag != FIFO_EMPTY) 7244 raw_tag = next_command(h, q); 7245 } 7246 return IRQ_HANDLED; 7247 } 7248 7249 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 7250 { 7251 struct ctlr_info *h = queue_to_hba(queue); 7252 u32 raw_tag; 7253 u8 q = *(u8 *) queue; 7254 7255 if (ignore_bogus_interrupt(h)) 7256 return IRQ_NONE; 7257 7258 h->last_intr_timestamp = get_jiffies_64(); 7259 raw_tag = get_next_completion(h, q); 7260 while (raw_tag != FIFO_EMPTY) 7261 raw_tag = next_command(h, q); 7262 return IRQ_HANDLED; 7263 } 7264 7265 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7266 { 7267 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7268 u32 raw_tag; 7269 u8 q = *(u8 *) queue; 7270 7271 if (interrupt_not_for_us(h)) 7272 return IRQ_NONE; 7273 h->last_intr_timestamp = get_jiffies_64(); 7274 while (interrupt_pending(h)) { 7275 raw_tag = get_next_completion(h, q); 7276 while (raw_tag != FIFO_EMPTY) { 7277 process_indexed_cmd(h, raw_tag); 7278 raw_tag = next_command(h, q); 7279 } 7280 } 7281 return IRQ_HANDLED; 7282 } 7283 7284 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7285 { 7286 struct ctlr_info *h = queue_to_hba(queue); 7287 u32 raw_tag; 7288 u8 q = *(u8 *) queue; 7289 7290 h->last_intr_timestamp = get_jiffies_64(); 7291 raw_tag = get_next_completion(h, q); 7292 while (raw_tag != FIFO_EMPTY) { 7293 process_indexed_cmd(h, raw_tag); 7294 raw_tag = next_command(h, q); 7295 } 7296 return IRQ_HANDLED; 7297 } 7298 7299 /* Send a message CDB to the firmware. Careful, this only works 7300 * in simple mode, not performant mode due to the tag lookup. 7301 * We only ever use this immediately after a controller reset. 7302 */ 7303 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7304 unsigned char type) 7305 { 7306 struct Command { 7307 struct CommandListHeader CommandHeader; 7308 struct RequestBlock Request; 7309 struct ErrDescriptor ErrorDescriptor; 7310 }; 7311 struct Command *cmd; 7312 static const size_t cmd_sz = sizeof(*cmd) + 7313 sizeof(cmd->ErrorDescriptor); 7314 dma_addr_t paddr64; 7315 __le32 paddr32; 7316 u32 tag; 7317 void __iomem *vaddr; 7318 int i, err; 7319 7320 vaddr = pci_ioremap_bar(pdev, 0); 7321 if (vaddr == NULL) 7322 return -ENOMEM; 7323 7324 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7325 * CCISS commands, so they must be allocated from the lower 4GiB of 7326 * memory. 7327 */ 7328 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7329 if (err) { 7330 iounmap(vaddr); 7331 return err; 7332 } 7333 7334 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7335 if (cmd == NULL) { 7336 iounmap(vaddr); 7337 return -ENOMEM; 7338 } 7339 7340 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7341 * although there's no guarantee, we assume that the address is at 7342 * least 4-byte aligned (most likely, it's page-aligned). 7343 */ 7344 paddr32 = cpu_to_le32(paddr64); 7345 7346 cmd->CommandHeader.ReplyQueue = 0; 7347 cmd->CommandHeader.SGList = 0; 7348 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7349 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7350 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7351 7352 cmd->Request.CDBLen = 16; 7353 cmd->Request.type_attr_dir = 7354 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7355 cmd->Request.Timeout = 0; /* Don't time out */ 7356 cmd->Request.CDB[0] = opcode; 7357 cmd->Request.CDB[1] = type; 7358 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7359 cmd->ErrorDescriptor.Addr = 7360 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7361 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7362 7363 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7364 7365 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7366 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7367 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7368 break; 7369 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7370 } 7371 7372 iounmap(vaddr); 7373 7374 /* we leak the DMA buffer here ... no choice since the controller could 7375 * still complete the command. 7376 */ 7377 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7378 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7379 opcode, type); 7380 return -ETIMEDOUT; 7381 } 7382 7383 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7384 7385 if (tag & HPSA_ERROR_BIT) { 7386 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7387 opcode, type); 7388 return -EIO; 7389 } 7390 7391 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7392 opcode, type); 7393 return 0; 7394 } 7395 7396 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7397 7398 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7399 void __iomem *vaddr, u32 use_doorbell) 7400 { 7401 7402 if (use_doorbell) { 7403 /* For everything after the P600, the PCI power state method 7404 * of resetting the controller doesn't work, so we have this 7405 * other way using the doorbell register. 7406 */ 7407 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7408 writel(use_doorbell, vaddr + SA5_DOORBELL); 7409 7410 /* PMC hardware guys tell us we need a 10 second delay after 7411 * doorbell reset and before any attempt to talk to the board 7412 * at all to ensure that this actually works and doesn't fall 7413 * over in some weird corner cases. 7414 */ 7415 msleep(10000); 7416 } else { /* Try to do it the PCI power state way */ 7417 7418 /* Quoting from the Open CISS Specification: "The Power 7419 * Management Control/Status Register (CSR) controls the power 7420 * state of the device. The normal operating state is D0, 7421 * CSR=00h. The software off state is D3, CSR=03h. To reset 7422 * the controller, place the interface device in D3 then to D0, 7423 * this causes a secondary PCI reset which will reset the 7424 * controller." */ 7425 7426 int rc = 0; 7427 7428 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7429 7430 /* enter the D3hot power management state */ 7431 rc = pci_set_power_state(pdev, PCI_D3hot); 7432 if (rc) 7433 return rc; 7434 7435 msleep(500); 7436 7437 /* enter the D0 power management state */ 7438 rc = pci_set_power_state(pdev, PCI_D0); 7439 if (rc) 7440 return rc; 7441 7442 /* 7443 * The P600 requires a small delay when changing states. 7444 * Otherwise we may think the board did not reset and we bail. 7445 * This for kdump only and is particular to the P600. 7446 */ 7447 msleep(500); 7448 } 7449 return 0; 7450 } 7451 7452 static void init_driver_version(char *driver_version, int len) 7453 { 7454 memset(driver_version, 0, len); 7455 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7456 } 7457 7458 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7459 { 7460 char *driver_version; 7461 int i, size = sizeof(cfgtable->driver_version); 7462 7463 driver_version = kmalloc(size, GFP_KERNEL); 7464 if (!driver_version) 7465 return -ENOMEM; 7466 7467 init_driver_version(driver_version, size); 7468 for (i = 0; i < size; i++) 7469 writeb(driver_version[i], &cfgtable->driver_version[i]); 7470 kfree(driver_version); 7471 return 0; 7472 } 7473 7474 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7475 unsigned char *driver_ver) 7476 { 7477 int i; 7478 7479 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7480 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7481 } 7482 7483 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7484 { 7485 7486 char *driver_ver, *old_driver_ver; 7487 int rc, size = sizeof(cfgtable->driver_version); 7488 7489 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7490 if (!old_driver_ver) 7491 return -ENOMEM; 7492 driver_ver = old_driver_ver + size; 7493 7494 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7495 * should have been changed, otherwise we know the reset failed. 7496 */ 7497 init_driver_version(old_driver_ver, size); 7498 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7499 rc = !memcmp(driver_ver, old_driver_ver, size); 7500 kfree(old_driver_ver); 7501 return rc; 7502 } 7503 /* This does a hard reset of the controller using PCI power management 7504 * states or the using the doorbell register. 7505 */ 7506 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7507 { 7508 u64 cfg_offset; 7509 u32 cfg_base_addr; 7510 u64 cfg_base_addr_index; 7511 void __iomem *vaddr; 7512 unsigned long paddr; 7513 u32 misc_fw_support; 7514 int rc; 7515 struct CfgTable __iomem *cfgtable; 7516 u32 use_doorbell; 7517 u16 command_register; 7518 7519 /* For controllers as old as the P600, this is very nearly 7520 * the same thing as 7521 * 7522 * pci_save_state(pci_dev); 7523 * pci_set_power_state(pci_dev, PCI_D3hot); 7524 * pci_set_power_state(pci_dev, PCI_D0); 7525 * pci_restore_state(pci_dev); 7526 * 7527 * For controllers newer than the P600, the pci power state 7528 * method of resetting doesn't work so we have another way 7529 * using the doorbell register. 7530 */ 7531 7532 if (!ctlr_is_resettable(board_id)) { 7533 dev_warn(&pdev->dev, "Controller not resettable\n"); 7534 return -ENODEV; 7535 } 7536 7537 /* if controller is soft- but not hard resettable... */ 7538 if (!ctlr_is_hard_resettable(board_id)) 7539 return -ENOTSUPP; /* try soft reset later. */ 7540 7541 /* Save the PCI command register */ 7542 pci_read_config_word(pdev, 4, &command_register); 7543 pci_save_state(pdev); 7544 7545 /* find the first memory BAR, so we can find the cfg table */ 7546 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7547 if (rc) 7548 return rc; 7549 vaddr = remap_pci_mem(paddr, 0x250); 7550 if (!vaddr) 7551 return -ENOMEM; 7552 7553 /* find cfgtable in order to check if reset via doorbell is supported */ 7554 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7555 &cfg_base_addr_index, &cfg_offset); 7556 if (rc) 7557 goto unmap_vaddr; 7558 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7559 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7560 if (!cfgtable) { 7561 rc = -ENOMEM; 7562 goto unmap_vaddr; 7563 } 7564 rc = write_driver_ver_to_cfgtable(cfgtable); 7565 if (rc) 7566 goto unmap_cfgtable; 7567 7568 /* If reset via doorbell register is supported, use that. 7569 * There are two such methods. Favor the newest method. 7570 */ 7571 misc_fw_support = readl(&cfgtable->misc_fw_support); 7572 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7573 if (use_doorbell) { 7574 use_doorbell = DOORBELL_CTLR_RESET2; 7575 } else { 7576 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7577 if (use_doorbell) { 7578 dev_warn(&pdev->dev, 7579 "Soft reset not supported. Firmware update is required.\n"); 7580 rc = -ENOTSUPP; /* try soft reset */ 7581 goto unmap_cfgtable; 7582 } 7583 } 7584 7585 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7586 if (rc) 7587 goto unmap_cfgtable; 7588 7589 pci_restore_state(pdev); 7590 pci_write_config_word(pdev, 4, command_register); 7591 7592 /* Some devices (notably the HP Smart Array 5i Controller) 7593 need a little pause here */ 7594 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7595 7596 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7597 if (rc) { 7598 dev_warn(&pdev->dev, 7599 "Failed waiting for board to become ready after hard reset\n"); 7600 goto unmap_cfgtable; 7601 } 7602 7603 rc = controller_reset_failed(vaddr); 7604 if (rc < 0) 7605 goto unmap_cfgtable; 7606 if (rc) { 7607 dev_warn(&pdev->dev, "Unable to successfully reset " 7608 "controller. Will try soft reset.\n"); 7609 rc = -ENOTSUPP; 7610 } else { 7611 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7612 } 7613 7614 unmap_cfgtable: 7615 iounmap(cfgtable); 7616 7617 unmap_vaddr: 7618 iounmap(vaddr); 7619 return rc; 7620 } 7621 7622 /* 7623 * We cannot read the structure directly, for portability we must use 7624 * the io functions. 7625 * This is for debug only. 7626 */ 7627 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7628 { 7629 #ifdef HPSA_DEBUG 7630 int i; 7631 char temp_name[17]; 7632 7633 dev_info(dev, "Controller Configuration information\n"); 7634 dev_info(dev, "------------------------------------\n"); 7635 for (i = 0; i < 4; i++) 7636 temp_name[i] = readb(&(tb->Signature[i])); 7637 temp_name[4] = '\0'; 7638 dev_info(dev, " Signature = %s\n", temp_name); 7639 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7640 dev_info(dev, " Transport methods supported = 0x%x\n", 7641 readl(&(tb->TransportSupport))); 7642 dev_info(dev, " Transport methods active = 0x%x\n", 7643 readl(&(tb->TransportActive))); 7644 dev_info(dev, " Requested transport Method = 0x%x\n", 7645 readl(&(tb->HostWrite.TransportRequest))); 7646 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7647 readl(&(tb->HostWrite.CoalIntDelay))); 7648 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7649 readl(&(tb->HostWrite.CoalIntCount))); 7650 dev_info(dev, " Max outstanding commands = %d\n", 7651 readl(&(tb->CmdsOutMax))); 7652 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7653 for (i = 0; i < 16; i++) 7654 temp_name[i] = readb(&(tb->ServerName[i])); 7655 temp_name[16] = '\0'; 7656 dev_info(dev, " Server Name = %s\n", temp_name); 7657 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7658 readl(&(tb->HeartBeat))); 7659 #endif /* HPSA_DEBUG */ 7660 } 7661 7662 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7663 { 7664 int i, offset, mem_type, bar_type; 7665 7666 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7667 return 0; 7668 offset = 0; 7669 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7670 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7671 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7672 offset += 4; 7673 else { 7674 mem_type = pci_resource_flags(pdev, i) & 7675 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7676 switch (mem_type) { 7677 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7678 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7679 offset += 4; /* 32 bit */ 7680 break; 7681 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7682 offset += 8; 7683 break; 7684 default: /* reserved in PCI 2.2 */ 7685 dev_warn(&pdev->dev, 7686 "base address is invalid\n"); 7687 return -1; 7688 break; 7689 } 7690 } 7691 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7692 return i + 1; 7693 } 7694 return -1; 7695 } 7696 7697 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7698 { 7699 pci_free_irq_vectors(h->pdev); 7700 h->msix_vectors = 0; 7701 } 7702 7703 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7704 * controllers that are capable. If not, we use legacy INTx mode. 7705 */ 7706 static int hpsa_interrupt_mode(struct ctlr_info *h) 7707 { 7708 unsigned int flags = PCI_IRQ_LEGACY; 7709 int ret; 7710 7711 /* Some boards advertise MSI but don't really support it */ 7712 switch (h->board_id) { 7713 case 0x40700E11: 7714 case 0x40800E11: 7715 case 0x40820E11: 7716 case 0x40830E11: 7717 break; 7718 default: 7719 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7720 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7721 if (ret > 0) { 7722 h->msix_vectors = ret; 7723 return 0; 7724 } 7725 7726 flags |= PCI_IRQ_MSI; 7727 break; 7728 } 7729 7730 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7731 if (ret < 0) 7732 return ret; 7733 return 0; 7734 } 7735 7736 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7737 { 7738 int i; 7739 u32 subsystem_vendor_id, subsystem_device_id; 7740 7741 subsystem_vendor_id = pdev->subsystem_vendor; 7742 subsystem_device_id = pdev->subsystem_device; 7743 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7744 subsystem_vendor_id; 7745 7746 for (i = 0; i < ARRAY_SIZE(products); i++) 7747 if (*board_id == products[i].board_id) 7748 return i; 7749 7750 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7751 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7752 !hpsa_allow_any) { 7753 dev_warn(&pdev->dev, "unrecognized board ID: " 7754 "0x%08x, ignoring.\n", *board_id); 7755 return -ENODEV; 7756 } 7757 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7758 } 7759 7760 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7761 unsigned long *memory_bar) 7762 { 7763 int i; 7764 7765 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7766 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7767 /* addressing mode bits already removed */ 7768 *memory_bar = pci_resource_start(pdev, i); 7769 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7770 *memory_bar); 7771 return 0; 7772 } 7773 dev_warn(&pdev->dev, "no memory BAR found\n"); 7774 return -ENODEV; 7775 } 7776 7777 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7778 int wait_for_ready) 7779 { 7780 int i, iterations; 7781 u32 scratchpad; 7782 if (wait_for_ready) 7783 iterations = HPSA_BOARD_READY_ITERATIONS; 7784 else 7785 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7786 7787 for (i = 0; i < iterations; i++) { 7788 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7789 if (wait_for_ready) { 7790 if (scratchpad == HPSA_FIRMWARE_READY) 7791 return 0; 7792 } else { 7793 if (scratchpad != HPSA_FIRMWARE_READY) 7794 return 0; 7795 } 7796 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7797 } 7798 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7799 return -ENODEV; 7800 } 7801 7802 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7803 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7804 u64 *cfg_offset) 7805 { 7806 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7807 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7808 *cfg_base_addr &= (u32) 0x0000ffff; 7809 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7810 if (*cfg_base_addr_index == -1) { 7811 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7812 return -ENODEV; 7813 } 7814 return 0; 7815 } 7816 7817 static void hpsa_free_cfgtables(struct ctlr_info *h) 7818 { 7819 if (h->transtable) { 7820 iounmap(h->transtable); 7821 h->transtable = NULL; 7822 } 7823 if (h->cfgtable) { 7824 iounmap(h->cfgtable); 7825 h->cfgtable = NULL; 7826 } 7827 } 7828 7829 /* Find and map CISS config table and transfer table 7830 + * several items must be unmapped (freed) later 7831 + * */ 7832 static int hpsa_find_cfgtables(struct ctlr_info *h) 7833 { 7834 u64 cfg_offset; 7835 u32 cfg_base_addr; 7836 u64 cfg_base_addr_index; 7837 u32 trans_offset; 7838 int rc; 7839 7840 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7841 &cfg_base_addr_index, &cfg_offset); 7842 if (rc) 7843 return rc; 7844 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7845 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7846 if (!h->cfgtable) { 7847 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7848 return -ENOMEM; 7849 } 7850 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7851 if (rc) 7852 return rc; 7853 /* Find performant mode table. */ 7854 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7855 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7856 cfg_base_addr_index)+cfg_offset+trans_offset, 7857 sizeof(*h->transtable)); 7858 if (!h->transtable) { 7859 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7860 hpsa_free_cfgtables(h); 7861 return -ENOMEM; 7862 } 7863 return 0; 7864 } 7865 7866 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7867 { 7868 #define MIN_MAX_COMMANDS 16 7869 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7870 7871 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7872 7873 /* Limit commands in memory limited kdump scenario. */ 7874 if (reset_devices && h->max_commands > 32) 7875 h->max_commands = 32; 7876 7877 if (h->max_commands < MIN_MAX_COMMANDS) { 7878 dev_warn(&h->pdev->dev, 7879 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7880 h->max_commands, 7881 MIN_MAX_COMMANDS); 7882 h->max_commands = MIN_MAX_COMMANDS; 7883 } 7884 } 7885 7886 /* If the controller reports that the total max sg entries is greater than 512, 7887 * then we know that chained SG blocks work. (Original smart arrays did not 7888 * support chained SG blocks and would return zero for max sg entries.) 7889 */ 7890 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7891 { 7892 return h->maxsgentries > 512; 7893 } 7894 7895 /* Interrogate the hardware for some limits: 7896 * max commands, max SG elements without chaining, and with chaining, 7897 * SG chain block size, etc. 7898 */ 7899 static void hpsa_find_board_params(struct ctlr_info *h) 7900 { 7901 hpsa_get_max_perf_mode_cmds(h); 7902 h->nr_cmds = h->max_commands; 7903 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7904 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7905 if (hpsa_supports_chained_sg_blocks(h)) { 7906 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7907 h->max_cmd_sg_entries = 32; 7908 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7909 h->maxsgentries--; /* save one for chain pointer */ 7910 } else { 7911 /* 7912 * Original smart arrays supported at most 31 s/g entries 7913 * embedded inline in the command (trying to use more 7914 * would lock up the controller) 7915 */ 7916 h->max_cmd_sg_entries = 31; 7917 h->maxsgentries = 31; /* default to traditional values */ 7918 h->chainsize = 0; 7919 } 7920 7921 /* Find out what task management functions are supported and cache */ 7922 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7923 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7924 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7925 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7926 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7927 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7928 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7929 } 7930 7931 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7932 { 7933 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7934 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7935 return false; 7936 } 7937 return true; 7938 } 7939 7940 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7941 { 7942 u32 driver_support; 7943 7944 driver_support = readl(&(h->cfgtable->driver_support)); 7945 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7946 #ifdef CONFIG_X86 7947 driver_support |= ENABLE_SCSI_PREFETCH; 7948 #endif 7949 driver_support |= ENABLE_UNIT_ATTN; 7950 writel(driver_support, &(h->cfgtable->driver_support)); 7951 } 7952 7953 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7954 * in a prefetch beyond physical memory. 7955 */ 7956 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7957 { 7958 u32 dma_prefetch; 7959 7960 if (h->board_id != 0x3225103C) 7961 return; 7962 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7963 dma_prefetch |= 0x8000; 7964 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7965 } 7966 7967 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7968 { 7969 int i; 7970 u32 doorbell_value; 7971 unsigned long flags; 7972 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7973 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7974 spin_lock_irqsave(&h->lock, flags); 7975 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7976 spin_unlock_irqrestore(&h->lock, flags); 7977 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7978 goto done; 7979 /* delay and try again */ 7980 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7981 } 7982 return -ENODEV; 7983 done: 7984 return 0; 7985 } 7986 7987 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7988 { 7989 int i; 7990 u32 doorbell_value; 7991 unsigned long flags; 7992 7993 /* under certain very rare conditions, this can take awhile. 7994 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7995 * as we enter this code.) 7996 */ 7997 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7998 if (h->remove_in_progress) 7999 goto done; 8000 spin_lock_irqsave(&h->lock, flags); 8001 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 8002 spin_unlock_irqrestore(&h->lock, flags); 8003 if (!(doorbell_value & CFGTBL_ChangeReq)) 8004 goto done; 8005 /* delay and try again */ 8006 msleep(MODE_CHANGE_WAIT_INTERVAL); 8007 } 8008 return -ENODEV; 8009 done: 8010 return 0; 8011 } 8012 8013 /* return -ENODEV or other reason on error, 0 on success */ 8014 static int hpsa_enter_simple_mode(struct ctlr_info *h) 8015 { 8016 u32 trans_support; 8017 8018 trans_support = readl(&(h->cfgtable->TransportSupport)); 8019 if (!(trans_support & SIMPLE_MODE)) 8020 return -ENOTSUPP; 8021 8022 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8023 8024 /* Update the field, and then ring the doorbell */ 8025 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8026 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8027 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8028 if (hpsa_wait_for_mode_change_ack(h)) 8029 goto error; 8030 print_cfg_table(&h->pdev->dev, h->cfgtable); 8031 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8032 goto error; 8033 h->transMethod = CFGTBL_Trans_Simple; 8034 return 0; 8035 error: 8036 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8037 return -ENODEV; 8038 } 8039 8040 /* free items allocated or mapped by hpsa_pci_init */ 8041 static void hpsa_free_pci_init(struct ctlr_info *h) 8042 { 8043 hpsa_free_cfgtables(h); /* pci_init 4 */ 8044 iounmap(h->vaddr); /* pci_init 3 */ 8045 h->vaddr = NULL; 8046 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8047 /* 8048 * call pci_disable_device before pci_release_regions per 8049 * Documentation/PCI/pci.txt 8050 */ 8051 pci_disable_device(h->pdev); /* pci_init 1 */ 8052 pci_release_regions(h->pdev); /* pci_init 2 */ 8053 } 8054 8055 /* several items must be freed later */ 8056 static int hpsa_pci_init(struct ctlr_info *h) 8057 { 8058 int prod_index, err; 8059 8060 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8061 if (prod_index < 0) 8062 return prod_index; 8063 h->product_name = products[prod_index].product_name; 8064 h->access = *(products[prod_index].access); 8065 8066 h->needs_abort_tags_swizzled = 8067 ctlr_needs_abort_tags_swizzled(h->board_id); 8068 8069 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8070 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8071 8072 err = pci_enable_device(h->pdev); 8073 if (err) { 8074 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8075 pci_disable_device(h->pdev); 8076 return err; 8077 } 8078 8079 err = pci_request_regions(h->pdev, HPSA); 8080 if (err) { 8081 dev_err(&h->pdev->dev, 8082 "failed to obtain PCI resources\n"); 8083 pci_disable_device(h->pdev); 8084 return err; 8085 } 8086 8087 pci_set_master(h->pdev); 8088 8089 err = hpsa_interrupt_mode(h); 8090 if (err) 8091 goto clean1; 8092 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 8093 if (err) 8094 goto clean2; /* intmode+region, pci */ 8095 h->vaddr = remap_pci_mem(h->paddr, 0x250); 8096 if (!h->vaddr) { 8097 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8098 err = -ENOMEM; 8099 goto clean2; /* intmode+region, pci */ 8100 } 8101 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8102 if (err) 8103 goto clean3; /* vaddr, intmode+region, pci */ 8104 err = hpsa_find_cfgtables(h); 8105 if (err) 8106 goto clean3; /* vaddr, intmode+region, pci */ 8107 hpsa_find_board_params(h); 8108 8109 if (!hpsa_CISS_signature_present(h)) { 8110 err = -ENODEV; 8111 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8112 } 8113 hpsa_set_driver_support_bits(h); 8114 hpsa_p600_dma_prefetch_quirk(h); 8115 err = hpsa_enter_simple_mode(h); 8116 if (err) 8117 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8118 return 0; 8119 8120 clean4: /* cfgtables, vaddr, intmode+region, pci */ 8121 hpsa_free_cfgtables(h); 8122 clean3: /* vaddr, intmode+region, pci */ 8123 iounmap(h->vaddr); 8124 h->vaddr = NULL; 8125 clean2: /* intmode+region, pci */ 8126 hpsa_disable_interrupt_mode(h); 8127 clean1: 8128 /* 8129 * call pci_disable_device before pci_release_regions per 8130 * Documentation/PCI/pci.txt 8131 */ 8132 pci_disable_device(h->pdev); 8133 pci_release_regions(h->pdev); 8134 return err; 8135 } 8136 8137 static void hpsa_hba_inquiry(struct ctlr_info *h) 8138 { 8139 int rc; 8140 8141 #define HBA_INQUIRY_BYTE_COUNT 64 8142 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8143 if (!h->hba_inquiry_data) 8144 return; 8145 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8146 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8147 if (rc != 0) { 8148 kfree(h->hba_inquiry_data); 8149 h->hba_inquiry_data = NULL; 8150 } 8151 } 8152 8153 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8154 { 8155 int rc, i; 8156 void __iomem *vaddr; 8157 8158 if (!reset_devices) 8159 return 0; 8160 8161 /* kdump kernel is loading, we don't know in which state is 8162 * the pci interface. The dev->enable_cnt is equal zero 8163 * so we call enable+disable, wait a while and switch it on. 8164 */ 8165 rc = pci_enable_device(pdev); 8166 if (rc) { 8167 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8168 return -ENODEV; 8169 } 8170 pci_disable_device(pdev); 8171 msleep(260); /* a randomly chosen number */ 8172 rc = pci_enable_device(pdev); 8173 if (rc) { 8174 dev_warn(&pdev->dev, "failed to enable device.\n"); 8175 return -ENODEV; 8176 } 8177 8178 pci_set_master(pdev); 8179 8180 vaddr = pci_ioremap_bar(pdev, 0); 8181 if (vaddr == NULL) { 8182 rc = -ENOMEM; 8183 goto out_disable; 8184 } 8185 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 8186 iounmap(vaddr); 8187 8188 /* Reset the controller with a PCI power-cycle or via doorbell */ 8189 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8190 8191 /* -ENOTSUPP here means we cannot reset the controller 8192 * but it's already (and still) up and running in 8193 * "performant mode". Or, it might be 640x, which can't reset 8194 * due to concerns about shared bbwc between 6402/6404 pair. 8195 */ 8196 if (rc) 8197 goto out_disable; 8198 8199 /* Now try to get the controller to respond to a no-op */ 8200 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8201 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8202 if (hpsa_noop(pdev) == 0) 8203 break; 8204 else 8205 dev_warn(&pdev->dev, "no-op failed%s\n", 8206 (i < 11 ? "; re-trying" : "")); 8207 } 8208 8209 out_disable: 8210 8211 pci_disable_device(pdev); 8212 return rc; 8213 } 8214 8215 static void hpsa_free_cmd_pool(struct ctlr_info *h) 8216 { 8217 kfree(h->cmd_pool_bits); 8218 h->cmd_pool_bits = NULL; 8219 if (h->cmd_pool) { 8220 pci_free_consistent(h->pdev, 8221 h->nr_cmds * sizeof(struct CommandList), 8222 h->cmd_pool, 8223 h->cmd_pool_dhandle); 8224 h->cmd_pool = NULL; 8225 h->cmd_pool_dhandle = 0; 8226 } 8227 if (h->errinfo_pool) { 8228 pci_free_consistent(h->pdev, 8229 h->nr_cmds * sizeof(struct ErrorInfo), 8230 h->errinfo_pool, 8231 h->errinfo_pool_dhandle); 8232 h->errinfo_pool = NULL; 8233 h->errinfo_pool_dhandle = 0; 8234 } 8235 } 8236 8237 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8238 { 8239 h->cmd_pool_bits = kzalloc( 8240 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 8241 sizeof(unsigned long), GFP_KERNEL); 8242 h->cmd_pool = pci_alloc_consistent(h->pdev, 8243 h->nr_cmds * sizeof(*h->cmd_pool), 8244 &(h->cmd_pool_dhandle)); 8245 h->errinfo_pool = pci_alloc_consistent(h->pdev, 8246 h->nr_cmds * sizeof(*h->errinfo_pool), 8247 &(h->errinfo_pool_dhandle)); 8248 if ((h->cmd_pool_bits == NULL) 8249 || (h->cmd_pool == NULL) 8250 || (h->errinfo_pool == NULL)) { 8251 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8252 goto clean_up; 8253 } 8254 hpsa_preinitialize_commands(h); 8255 return 0; 8256 clean_up: 8257 hpsa_free_cmd_pool(h); 8258 return -ENOMEM; 8259 } 8260 8261 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8262 static void hpsa_free_irqs(struct ctlr_info *h) 8263 { 8264 int i; 8265 8266 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8267 /* Single reply queue, only one irq to free */ 8268 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8269 h->q[h->intr_mode] = 0; 8270 return; 8271 } 8272 8273 for (i = 0; i < h->msix_vectors; i++) { 8274 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8275 h->q[i] = 0; 8276 } 8277 for (; i < MAX_REPLY_QUEUES; i++) 8278 h->q[i] = 0; 8279 } 8280 8281 /* returns 0 on success; cleans up and returns -Enn on error */ 8282 static int hpsa_request_irqs(struct ctlr_info *h, 8283 irqreturn_t (*msixhandler)(int, void *), 8284 irqreturn_t (*intxhandler)(int, void *)) 8285 { 8286 int rc, i; 8287 8288 /* 8289 * initialize h->q[x] = x so that interrupt handlers know which 8290 * queue to process. 8291 */ 8292 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8293 h->q[i] = (u8) i; 8294 8295 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8296 /* If performant mode and MSI-X, use multiple reply queues */ 8297 for (i = 0; i < h->msix_vectors; i++) { 8298 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8299 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8300 0, h->intrname[i], 8301 &h->q[i]); 8302 if (rc) { 8303 int j; 8304 8305 dev_err(&h->pdev->dev, 8306 "failed to get irq %d for %s\n", 8307 pci_irq_vector(h->pdev, i), h->devname); 8308 for (j = 0; j < i; j++) { 8309 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8310 h->q[j] = 0; 8311 } 8312 for (; j < MAX_REPLY_QUEUES; j++) 8313 h->q[j] = 0; 8314 return rc; 8315 } 8316 } 8317 } else { 8318 /* Use single reply pool */ 8319 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8320 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8321 h->msix_vectors ? "x" : ""); 8322 rc = request_irq(pci_irq_vector(h->pdev, 0), 8323 msixhandler, 0, 8324 h->intrname[0], 8325 &h->q[h->intr_mode]); 8326 } else { 8327 sprintf(h->intrname[h->intr_mode], 8328 "%s-intx", h->devname); 8329 rc = request_irq(pci_irq_vector(h->pdev, 0), 8330 intxhandler, IRQF_SHARED, 8331 h->intrname[0], 8332 &h->q[h->intr_mode]); 8333 } 8334 } 8335 if (rc) { 8336 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8337 pci_irq_vector(h->pdev, 0), h->devname); 8338 hpsa_free_irqs(h); 8339 return -ENODEV; 8340 } 8341 return 0; 8342 } 8343 8344 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8345 { 8346 int rc; 8347 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8348 8349 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8350 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8351 if (rc) { 8352 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8353 return rc; 8354 } 8355 8356 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8357 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8358 if (rc) { 8359 dev_warn(&h->pdev->dev, "Board failed to become ready " 8360 "after soft reset.\n"); 8361 return rc; 8362 } 8363 8364 return 0; 8365 } 8366 8367 static void hpsa_free_reply_queues(struct ctlr_info *h) 8368 { 8369 int i; 8370 8371 for (i = 0; i < h->nreply_queues; i++) { 8372 if (!h->reply_queue[i].head) 8373 continue; 8374 pci_free_consistent(h->pdev, 8375 h->reply_queue_size, 8376 h->reply_queue[i].head, 8377 h->reply_queue[i].busaddr); 8378 h->reply_queue[i].head = NULL; 8379 h->reply_queue[i].busaddr = 0; 8380 } 8381 h->reply_queue_size = 0; 8382 } 8383 8384 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8385 { 8386 hpsa_free_performant_mode(h); /* init_one 7 */ 8387 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8388 hpsa_free_cmd_pool(h); /* init_one 5 */ 8389 hpsa_free_irqs(h); /* init_one 4 */ 8390 scsi_host_put(h->scsi_host); /* init_one 3 */ 8391 h->scsi_host = NULL; /* init_one 3 */ 8392 hpsa_free_pci_init(h); /* init_one 2_5 */ 8393 free_percpu(h->lockup_detected); /* init_one 2 */ 8394 h->lockup_detected = NULL; /* init_one 2 */ 8395 if (h->resubmit_wq) { 8396 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8397 h->resubmit_wq = NULL; 8398 } 8399 if (h->rescan_ctlr_wq) { 8400 destroy_workqueue(h->rescan_ctlr_wq); 8401 h->rescan_ctlr_wq = NULL; 8402 } 8403 kfree(h); /* init_one 1 */ 8404 } 8405 8406 /* Called when controller lockup detected. */ 8407 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8408 { 8409 int i, refcount; 8410 struct CommandList *c; 8411 int failcount = 0; 8412 8413 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8414 for (i = 0; i < h->nr_cmds; i++) { 8415 c = h->cmd_pool + i; 8416 refcount = atomic_inc_return(&c->refcount); 8417 if (refcount > 1) { 8418 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8419 finish_cmd(c); 8420 atomic_dec(&h->commands_outstanding); 8421 failcount++; 8422 } 8423 cmd_free(h, c); 8424 } 8425 dev_warn(&h->pdev->dev, 8426 "failed %d commands in fail_all\n", failcount); 8427 } 8428 8429 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8430 { 8431 int cpu; 8432 8433 for_each_online_cpu(cpu) { 8434 u32 *lockup_detected; 8435 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8436 *lockup_detected = value; 8437 } 8438 wmb(); /* be sure the per-cpu variables are out to memory */ 8439 } 8440 8441 static void controller_lockup_detected(struct ctlr_info *h) 8442 { 8443 unsigned long flags; 8444 u32 lockup_detected; 8445 8446 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8447 spin_lock_irqsave(&h->lock, flags); 8448 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8449 if (!lockup_detected) { 8450 /* no heartbeat, but controller gave us a zero. */ 8451 dev_warn(&h->pdev->dev, 8452 "lockup detected after %d but scratchpad register is zero\n", 8453 h->heartbeat_sample_interval / HZ); 8454 lockup_detected = 0xffffffff; 8455 } 8456 set_lockup_detected_for_all_cpus(h, lockup_detected); 8457 spin_unlock_irqrestore(&h->lock, flags); 8458 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8459 lockup_detected, h->heartbeat_sample_interval / HZ); 8460 pci_disable_device(h->pdev); 8461 fail_all_outstanding_cmds(h); 8462 } 8463 8464 static int detect_controller_lockup(struct ctlr_info *h) 8465 { 8466 u64 now; 8467 u32 heartbeat; 8468 unsigned long flags; 8469 8470 now = get_jiffies_64(); 8471 /* If we've received an interrupt recently, we're ok. */ 8472 if (time_after64(h->last_intr_timestamp + 8473 (h->heartbeat_sample_interval), now)) 8474 return false; 8475 8476 /* 8477 * If we've already checked the heartbeat recently, we're ok. 8478 * This could happen if someone sends us a signal. We 8479 * otherwise don't care about signals in this thread. 8480 */ 8481 if (time_after64(h->last_heartbeat_timestamp + 8482 (h->heartbeat_sample_interval), now)) 8483 return false; 8484 8485 /* If heartbeat has not changed since we last looked, we're not ok. */ 8486 spin_lock_irqsave(&h->lock, flags); 8487 heartbeat = readl(&h->cfgtable->HeartBeat); 8488 spin_unlock_irqrestore(&h->lock, flags); 8489 if (h->last_heartbeat == heartbeat) { 8490 controller_lockup_detected(h); 8491 return true; 8492 } 8493 8494 /* We're ok. */ 8495 h->last_heartbeat = heartbeat; 8496 h->last_heartbeat_timestamp = now; 8497 return false; 8498 } 8499 8500 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8501 { 8502 int i; 8503 char *event_type; 8504 8505 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8506 return; 8507 8508 /* Ask the controller to clear the events we're handling. */ 8509 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8510 | CFGTBL_Trans_io_accel2)) && 8511 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8512 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8513 8514 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8515 event_type = "state change"; 8516 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8517 event_type = "configuration change"; 8518 /* Stop sending new RAID offload reqs via the IO accelerator */ 8519 scsi_block_requests(h->scsi_host); 8520 for (i = 0; i < h->ndevices; i++) { 8521 h->dev[i]->offload_enabled = 0; 8522 h->dev[i]->offload_to_be_enabled = 0; 8523 } 8524 hpsa_drain_accel_commands(h); 8525 /* Set 'accelerator path config change' bit */ 8526 dev_warn(&h->pdev->dev, 8527 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8528 h->events, event_type); 8529 writel(h->events, &(h->cfgtable->clear_event_notify)); 8530 /* Set the "clear event notify field update" bit 6 */ 8531 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8532 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8533 hpsa_wait_for_clear_event_notify_ack(h); 8534 scsi_unblock_requests(h->scsi_host); 8535 } else { 8536 /* Acknowledge controller notification events. */ 8537 writel(h->events, &(h->cfgtable->clear_event_notify)); 8538 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8539 hpsa_wait_for_clear_event_notify_ack(h); 8540 #if 0 8541 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8542 hpsa_wait_for_mode_change_ack(h); 8543 #endif 8544 } 8545 return; 8546 } 8547 8548 /* Check a register on the controller to see if there are configuration 8549 * changes (added/changed/removed logical drives, etc.) which mean that 8550 * we should rescan the controller for devices. 8551 * Also check flag for driver-initiated rescan. 8552 */ 8553 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8554 { 8555 if (h->drv_req_rescan) { 8556 h->drv_req_rescan = 0; 8557 return 1; 8558 } 8559 8560 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8561 return 0; 8562 8563 h->events = readl(&(h->cfgtable->event_notify)); 8564 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8565 } 8566 8567 /* 8568 * Check if any of the offline devices have become ready 8569 */ 8570 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8571 { 8572 unsigned long flags; 8573 struct offline_device_entry *d; 8574 struct list_head *this, *tmp; 8575 8576 spin_lock_irqsave(&h->offline_device_lock, flags); 8577 list_for_each_safe(this, tmp, &h->offline_device_list) { 8578 d = list_entry(this, struct offline_device_entry, 8579 offline_list); 8580 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8581 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8582 spin_lock_irqsave(&h->offline_device_lock, flags); 8583 list_del(&d->offline_list); 8584 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8585 return 1; 8586 } 8587 spin_lock_irqsave(&h->offline_device_lock, flags); 8588 } 8589 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8590 return 0; 8591 } 8592 8593 static int hpsa_luns_changed(struct ctlr_info *h) 8594 { 8595 int rc = 1; /* assume there are changes */ 8596 struct ReportLUNdata *logdev = NULL; 8597 8598 /* if we can't find out if lun data has changed, 8599 * assume that it has. 8600 */ 8601 8602 if (!h->lastlogicals) 8603 return rc; 8604 8605 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8606 if (!logdev) 8607 return rc; 8608 8609 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8610 dev_warn(&h->pdev->dev, 8611 "report luns failed, can't track lun changes.\n"); 8612 goto out; 8613 } 8614 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8615 dev_info(&h->pdev->dev, 8616 "Lun changes detected.\n"); 8617 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8618 goto out; 8619 } else 8620 rc = 0; /* no changes detected. */ 8621 out: 8622 kfree(logdev); 8623 return rc; 8624 } 8625 8626 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8627 { 8628 unsigned long flags; 8629 struct ctlr_info *h = container_of(to_delayed_work(work), 8630 struct ctlr_info, rescan_ctlr_work); 8631 8632 8633 if (h->remove_in_progress) 8634 return; 8635 8636 /* 8637 * Do the scan after the reset 8638 */ 8639 if (h->reset_in_progress) { 8640 h->drv_req_rescan = 1; 8641 return; 8642 } 8643 8644 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 8645 scsi_host_get(h->scsi_host); 8646 hpsa_ack_ctlr_events(h); 8647 hpsa_scan_start(h->scsi_host); 8648 scsi_host_put(h->scsi_host); 8649 } else if (h->discovery_polling) { 8650 hpsa_disable_rld_caching(h); 8651 if (hpsa_luns_changed(h)) { 8652 struct Scsi_Host *sh = NULL; 8653 8654 dev_info(&h->pdev->dev, 8655 "driver discovery polling rescan.\n"); 8656 sh = scsi_host_get(h->scsi_host); 8657 if (sh != NULL) { 8658 hpsa_scan_start(sh); 8659 scsi_host_put(sh); 8660 } 8661 } 8662 } 8663 spin_lock_irqsave(&h->lock, flags); 8664 if (!h->remove_in_progress) 8665 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8666 h->heartbeat_sample_interval); 8667 spin_unlock_irqrestore(&h->lock, flags); 8668 } 8669 8670 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8671 { 8672 unsigned long flags; 8673 struct ctlr_info *h = container_of(to_delayed_work(work), 8674 struct ctlr_info, monitor_ctlr_work); 8675 8676 detect_controller_lockup(h); 8677 if (lockup_detected(h)) 8678 return; 8679 8680 spin_lock_irqsave(&h->lock, flags); 8681 if (!h->remove_in_progress) 8682 schedule_delayed_work(&h->monitor_ctlr_work, 8683 h->heartbeat_sample_interval); 8684 spin_unlock_irqrestore(&h->lock, flags); 8685 } 8686 8687 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8688 char *name) 8689 { 8690 struct workqueue_struct *wq = NULL; 8691 8692 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8693 if (!wq) 8694 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8695 8696 return wq; 8697 } 8698 8699 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8700 { 8701 int dac, rc; 8702 struct ctlr_info *h; 8703 int try_soft_reset = 0; 8704 unsigned long flags; 8705 u32 board_id; 8706 8707 if (number_of_controllers == 0) 8708 printk(KERN_INFO DRIVER_NAME "\n"); 8709 8710 rc = hpsa_lookup_board_id(pdev, &board_id); 8711 if (rc < 0) { 8712 dev_warn(&pdev->dev, "Board ID not found\n"); 8713 return rc; 8714 } 8715 8716 rc = hpsa_init_reset_devices(pdev, board_id); 8717 if (rc) { 8718 if (rc != -ENOTSUPP) 8719 return rc; 8720 /* If the reset fails in a particular way (it has no way to do 8721 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8722 * a soft reset once we get the controller configured up to the 8723 * point that it can accept a command. 8724 */ 8725 try_soft_reset = 1; 8726 rc = 0; 8727 } 8728 8729 reinit_after_soft_reset: 8730 8731 /* Command structures must be aligned on a 32-byte boundary because 8732 * the 5 lower bits of the address are used by the hardware. and by 8733 * the driver. See comments in hpsa.h for more info. 8734 */ 8735 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8736 h = kzalloc(sizeof(*h), GFP_KERNEL); 8737 if (!h) { 8738 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8739 return -ENOMEM; 8740 } 8741 8742 h->pdev = pdev; 8743 8744 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8745 INIT_LIST_HEAD(&h->offline_device_list); 8746 spin_lock_init(&h->lock); 8747 spin_lock_init(&h->offline_device_lock); 8748 spin_lock_init(&h->scan_lock); 8749 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8750 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8751 8752 /* Allocate and clear per-cpu variable lockup_detected */ 8753 h->lockup_detected = alloc_percpu(u32); 8754 if (!h->lockup_detected) { 8755 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8756 rc = -ENOMEM; 8757 goto clean1; /* aer/h */ 8758 } 8759 set_lockup_detected_for_all_cpus(h, 0); 8760 8761 rc = hpsa_pci_init(h); 8762 if (rc) 8763 goto clean2; /* lu, aer/h */ 8764 8765 /* relies on h-> settings made by hpsa_pci_init, including 8766 * interrupt_mode h->intr */ 8767 rc = hpsa_scsi_host_alloc(h); 8768 if (rc) 8769 goto clean2_5; /* pci, lu, aer/h */ 8770 8771 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8772 h->ctlr = number_of_controllers; 8773 number_of_controllers++; 8774 8775 /* configure PCI DMA stuff */ 8776 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8777 if (rc == 0) { 8778 dac = 1; 8779 } else { 8780 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8781 if (rc == 0) { 8782 dac = 0; 8783 } else { 8784 dev_err(&pdev->dev, "no suitable DMA available\n"); 8785 goto clean3; /* shost, pci, lu, aer/h */ 8786 } 8787 } 8788 8789 /* make sure the board interrupts are off */ 8790 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8791 8792 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8793 if (rc) 8794 goto clean3; /* shost, pci, lu, aer/h */ 8795 rc = hpsa_alloc_cmd_pool(h); 8796 if (rc) 8797 goto clean4; /* irq, shost, pci, lu, aer/h */ 8798 rc = hpsa_alloc_sg_chain_blocks(h); 8799 if (rc) 8800 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8801 init_waitqueue_head(&h->scan_wait_queue); 8802 init_waitqueue_head(&h->abort_cmd_wait_queue); 8803 init_waitqueue_head(&h->event_sync_wait_queue); 8804 mutex_init(&h->reset_mutex); 8805 h->scan_finished = 1; /* no scan currently in progress */ 8806 h->scan_waiting = 0; 8807 8808 pci_set_drvdata(pdev, h); 8809 h->ndevices = 0; 8810 8811 spin_lock_init(&h->devlock); 8812 rc = hpsa_put_ctlr_into_performant_mode(h); 8813 if (rc) 8814 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8815 8816 /* create the resubmit workqueue */ 8817 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8818 if (!h->rescan_ctlr_wq) { 8819 rc = -ENOMEM; 8820 goto clean7; 8821 } 8822 8823 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8824 if (!h->resubmit_wq) { 8825 rc = -ENOMEM; 8826 goto clean7; /* aer/h */ 8827 } 8828 8829 /* 8830 * At this point, the controller is ready to take commands. 8831 * Now, if reset_devices and the hard reset didn't work, try 8832 * the soft reset and see if that works. 8833 */ 8834 if (try_soft_reset) { 8835 8836 /* This is kind of gross. We may or may not get a completion 8837 * from the soft reset command, and if we do, then the value 8838 * from the fifo may or may not be valid. So, we wait 10 secs 8839 * after the reset throwing away any completions we get during 8840 * that time. Unregister the interrupt handler and register 8841 * fake ones to scoop up any residual completions. 8842 */ 8843 spin_lock_irqsave(&h->lock, flags); 8844 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8845 spin_unlock_irqrestore(&h->lock, flags); 8846 hpsa_free_irqs(h); 8847 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8848 hpsa_intx_discard_completions); 8849 if (rc) { 8850 dev_warn(&h->pdev->dev, 8851 "Failed to request_irq after soft reset.\n"); 8852 /* 8853 * cannot goto clean7 or free_irqs will be called 8854 * again. Instead, do its work 8855 */ 8856 hpsa_free_performant_mode(h); /* clean7 */ 8857 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8858 hpsa_free_cmd_pool(h); /* clean5 */ 8859 /* 8860 * skip hpsa_free_irqs(h) clean4 since that 8861 * was just called before request_irqs failed 8862 */ 8863 goto clean3; 8864 } 8865 8866 rc = hpsa_kdump_soft_reset(h); 8867 if (rc) 8868 /* Neither hard nor soft reset worked, we're hosed. */ 8869 goto clean7; 8870 8871 dev_info(&h->pdev->dev, "Board READY.\n"); 8872 dev_info(&h->pdev->dev, 8873 "Waiting for stale completions to drain.\n"); 8874 h->access.set_intr_mask(h, HPSA_INTR_ON); 8875 msleep(10000); 8876 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8877 8878 rc = controller_reset_failed(h->cfgtable); 8879 if (rc) 8880 dev_info(&h->pdev->dev, 8881 "Soft reset appears to have failed.\n"); 8882 8883 /* since the controller's reset, we have to go back and re-init 8884 * everything. Easiest to just forget what we've done and do it 8885 * all over again. 8886 */ 8887 hpsa_undo_allocations_after_kdump_soft_reset(h); 8888 try_soft_reset = 0; 8889 if (rc) 8890 /* don't goto clean, we already unallocated */ 8891 return -ENODEV; 8892 8893 goto reinit_after_soft_reset; 8894 } 8895 8896 /* Enable Accelerated IO path at driver layer */ 8897 h->acciopath_status = 1; 8898 /* Disable discovery polling.*/ 8899 h->discovery_polling = 0; 8900 8901 8902 /* Turn the interrupts on so we can service requests */ 8903 h->access.set_intr_mask(h, HPSA_INTR_ON); 8904 8905 hpsa_hba_inquiry(h); 8906 8907 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8908 if (!h->lastlogicals) 8909 dev_info(&h->pdev->dev, 8910 "Can't track change to report lun data\n"); 8911 8912 /* hook into SCSI subsystem */ 8913 rc = hpsa_scsi_add_host(h); 8914 if (rc) 8915 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8916 8917 /* Monitor the controller for firmware lockups */ 8918 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8919 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8920 schedule_delayed_work(&h->monitor_ctlr_work, 8921 h->heartbeat_sample_interval); 8922 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8923 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8924 h->heartbeat_sample_interval); 8925 return 0; 8926 8927 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8928 hpsa_free_performant_mode(h); 8929 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8930 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8931 hpsa_free_sg_chain_blocks(h); 8932 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8933 hpsa_free_cmd_pool(h); 8934 clean4: /* irq, shost, pci, lu, aer/h */ 8935 hpsa_free_irqs(h); 8936 clean3: /* shost, pci, lu, aer/h */ 8937 scsi_host_put(h->scsi_host); 8938 h->scsi_host = NULL; 8939 clean2_5: /* pci, lu, aer/h */ 8940 hpsa_free_pci_init(h); 8941 clean2: /* lu, aer/h */ 8942 if (h->lockup_detected) { 8943 free_percpu(h->lockup_detected); 8944 h->lockup_detected = NULL; 8945 } 8946 clean1: /* wq/aer/h */ 8947 if (h->resubmit_wq) { 8948 destroy_workqueue(h->resubmit_wq); 8949 h->resubmit_wq = NULL; 8950 } 8951 if (h->rescan_ctlr_wq) { 8952 destroy_workqueue(h->rescan_ctlr_wq); 8953 h->rescan_ctlr_wq = NULL; 8954 } 8955 kfree(h); 8956 return rc; 8957 } 8958 8959 static void hpsa_flush_cache(struct ctlr_info *h) 8960 { 8961 char *flush_buf; 8962 struct CommandList *c; 8963 int rc; 8964 8965 if (unlikely(lockup_detected(h))) 8966 return; 8967 flush_buf = kzalloc(4, GFP_KERNEL); 8968 if (!flush_buf) 8969 return; 8970 8971 c = cmd_alloc(h); 8972 8973 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8974 RAID_CTLR_LUNID, TYPE_CMD)) { 8975 goto out; 8976 } 8977 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8978 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8979 if (rc) 8980 goto out; 8981 if (c->err_info->CommandStatus != 0) 8982 out: 8983 dev_warn(&h->pdev->dev, 8984 "error flushing cache on controller\n"); 8985 cmd_free(h, c); 8986 kfree(flush_buf); 8987 } 8988 8989 /* Make controller gather fresh report lun data each time we 8990 * send down a report luns request 8991 */ 8992 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8993 { 8994 u32 *options; 8995 struct CommandList *c; 8996 int rc; 8997 8998 /* Don't bother trying to set diag options if locked up */ 8999 if (unlikely(h->lockup_detected)) 9000 return; 9001 9002 options = kzalloc(sizeof(*options), GFP_KERNEL); 9003 if (!options) 9004 return; 9005 9006 c = cmd_alloc(h); 9007 9008 /* first, get the current diag options settings */ 9009 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9010 RAID_CTLR_LUNID, TYPE_CMD)) 9011 goto errout; 9012 9013 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9014 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9015 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9016 goto errout; 9017 9018 /* Now, set the bit for disabling the RLD caching */ 9019 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9020 9021 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9022 RAID_CTLR_LUNID, TYPE_CMD)) 9023 goto errout; 9024 9025 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9026 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9027 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9028 goto errout; 9029 9030 /* Now verify that it got set: */ 9031 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9032 RAID_CTLR_LUNID, TYPE_CMD)) 9033 goto errout; 9034 9035 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9036 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9037 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9038 goto errout; 9039 9040 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9041 goto out; 9042 9043 errout: 9044 dev_err(&h->pdev->dev, 9045 "Error: failed to disable report lun data caching.\n"); 9046 out: 9047 cmd_free(h, c); 9048 kfree(options); 9049 } 9050 9051 static void hpsa_shutdown(struct pci_dev *pdev) 9052 { 9053 struct ctlr_info *h; 9054 9055 h = pci_get_drvdata(pdev); 9056 /* Turn board interrupts off and send the flush cache command 9057 * sendcmd will turn off interrupt, and send the flush... 9058 * To write all data in the battery backed cache to disks 9059 */ 9060 hpsa_flush_cache(h); 9061 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9062 hpsa_free_irqs(h); /* init_one 4 */ 9063 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9064 } 9065 9066 static void hpsa_free_device_info(struct ctlr_info *h) 9067 { 9068 int i; 9069 9070 for (i = 0; i < h->ndevices; i++) { 9071 kfree(h->dev[i]); 9072 h->dev[i] = NULL; 9073 } 9074 } 9075 9076 static void hpsa_remove_one(struct pci_dev *pdev) 9077 { 9078 struct ctlr_info *h; 9079 unsigned long flags; 9080 9081 if (pci_get_drvdata(pdev) == NULL) { 9082 dev_err(&pdev->dev, "unable to remove device\n"); 9083 return; 9084 } 9085 h = pci_get_drvdata(pdev); 9086 9087 /* Get rid of any controller monitoring work items */ 9088 spin_lock_irqsave(&h->lock, flags); 9089 h->remove_in_progress = 1; 9090 spin_unlock_irqrestore(&h->lock, flags); 9091 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9092 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9093 destroy_workqueue(h->rescan_ctlr_wq); 9094 destroy_workqueue(h->resubmit_wq); 9095 9096 /* 9097 * Call before disabling interrupts. 9098 * scsi_remove_host can trigger I/O operations especially 9099 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9100 * operations which cannot complete and will hang the system. 9101 */ 9102 if (h->scsi_host) 9103 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9104 /* includes hpsa_free_irqs - init_one 4 */ 9105 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9106 hpsa_shutdown(pdev); 9107 9108 hpsa_free_device_info(h); /* scan */ 9109 9110 kfree(h->hba_inquiry_data); /* init_one 10 */ 9111 h->hba_inquiry_data = NULL; /* init_one 10 */ 9112 hpsa_free_ioaccel2_sg_chain_blocks(h); 9113 hpsa_free_performant_mode(h); /* init_one 7 */ 9114 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9115 hpsa_free_cmd_pool(h); /* init_one 5 */ 9116 kfree(h->lastlogicals); 9117 9118 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9119 9120 scsi_host_put(h->scsi_host); /* init_one 3 */ 9121 h->scsi_host = NULL; /* init_one 3 */ 9122 9123 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9124 hpsa_free_pci_init(h); /* init_one 2.5 */ 9125 9126 free_percpu(h->lockup_detected); /* init_one 2 */ 9127 h->lockup_detected = NULL; /* init_one 2 */ 9128 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9129 9130 hpsa_delete_sas_host(h); 9131 9132 kfree(h); /* init_one 1 */ 9133 } 9134 9135 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9136 __attribute__((unused)) pm_message_t state) 9137 { 9138 return -ENOSYS; 9139 } 9140 9141 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9142 { 9143 return -ENOSYS; 9144 } 9145 9146 static struct pci_driver hpsa_pci_driver = { 9147 .name = HPSA, 9148 .probe = hpsa_init_one, 9149 .remove = hpsa_remove_one, 9150 .id_table = hpsa_pci_device_id, /* id_table */ 9151 .shutdown = hpsa_shutdown, 9152 .suspend = hpsa_suspend, 9153 .resume = hpsa_resume, 9154 }; 9155 9156 /* Fill in bucket_map[], given nsgs (the max number of 9157 * scatter gather elements supported) and bucket[], 9158 * which is an array of 8 integers. The bucket[] array 9159 * contains 8 different DMA transfer sizes (in 16 9160 * byte increments) which the controller uses to fetch 9161 * commands. This function fills in bucket_map[], which 9162 * maps a given number of scatter gather elements to one of 9163 * the 8 DMA transfer sizes. The point of it is to allow the 9164 * controller to only do as much DMA as needed to fetch the 9165 * command, with the DMA transfer size encoded in the lower 9166 * bits of the command address. 9167 */ 9168 static void calc_bucket_map(int bucket[], int num_buckets, 9169 int nsgs, int min_blocks, u32 *bucket_map) 9170 { 9171 int i, j, b, size; 9172 9173 /* Note, bucket_map must have nsgs+1 entries. */ 9174 for (i = 0; i <= nsgs; i++) { 9175 /* Compute size of a command with i SG entries */ 9176 size = i + min_blocks; 9177 b = num_buckets; /* Assume the biggest bucket */ 9178 /* Find the bucket that is just big enough */ 9179 for (j = 0; j < num_buckets; j++) { 9180 if (bucket[j] >= size) { 9181 b = j; 9182 break; 9183 } 9184 } 9185 /* for a command with i SG entries, use bucket b. */ 9186 bucket_map[i] = b; 9187 } 9188 } 9189 9190 /* 9191 * return -ENODEV on err, 0 on success (or no action) 9192 * allocates numerous items that must be freed later 9193 */ 9194 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9195 { 9196 int i; 9197 unsigned long register_value; 9198 unsigned long transMethod = CFGTBL_Trans_Performant | 9199 (trans_support & CFGTBL_Trans_use_short_tags) | 9200 CFGTBL_Trans_enable_directed_msix | 9201 (trans_support & (CFGTBL_Trans_io_accel1 | 9202 CFGTBL_Trans_io_accel2)); 9203 struct access_method access = SA5_performant_access; 9204 9205 /* This is a bit complicated. There are 8 registers on 9206 * the controller which we write to to tell it 8 different 9207 * sizes of commands which there may be. It's a way of 9208 * reducing the DMA done to fetch each command. Encoded into 9209 * each command's tag are 3 bits which communicate to the controller 9210 * which of the eight sizes that command fits within. The size of 9211 * each command depends on how many scatter gather entries there are. 9212 * Each SG entry requires 16 bytes. The eight registers are programmed 9213 * with the number of 16-byte blocks a command of that size requires. 9214 * The smallest command possible requires 5 such 16 byte blocks. 9215 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9216 * blocks. Note, this only extends to the SG entries contained 9217 * within the command block, and does not extend to chained blocks 9218 * of SG elements. bft[] contains the eight values we write to 9219 * the registers. They are not evenly distributed, but have more 9220 * sizes for small commands, and fewer sizes for larger commands. 9221 */ 9222 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9223 #define MIN_IOACCEL2_BFT_ENTRY 5 9224 #define HPSA_IOACCEL2_HEADER_SZ 4 9225 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9226 13, 14, 15, 16, 17, 18, 19, 9227 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9228 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9229 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9230 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9231 16 * MIN_IOACCEL2_BFT_ENTRY); 9232 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9233 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9234 /* 5 = 1 s/g entry or 4k 9235 * 6 = 2 s/g entry or 8k 9236 * 8 = 4 s/g entry or 16k 9237 * 10 = 6 s/g entry or 24k 9238 */ 9239 9240 /* If the controller supports either ioaccel method then 9241 * we can also use the RAID stack submit path that does not 9242 * perform the superfluous readl() after each command submission. 9243 */ 9244 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9245 access = SA5_performant_access_no_read; 9246 9247 /* Controller spec: zero out this buffer. */ 9248 for (i = 0; i < h->nreply_queues; i++) 9249 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9250 9251 bft[7] = SG_ENTRIES_IN_CMD + 4; 9252 calc_bucket_map(bft, ARRAY_SIZE(bft), 9253 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9254 for (i = 0; i < 8; i++) 9255 writel(bft[i], &h->transtable->BlockFetch[i]); 9256 9257 /* size of controller ring buffer */ 9258 writel(h->max_commands, &h->transtable->RepQSize); 9259 writel(h->nreply_queues, &h->transtable->RepQCount); 9260 writel(0, &h->transtable->RepQCtrAddrLow32); 9261 writel(0, &h->transtable->RepQCtrAddrHigh32); 9262 9263 for (i = 0; i < h->nreply_queues; i++) { 9264 writel(0, &h->transtable->RepQAddr[i].upper); 9265 writel(h->reply_queue[i].busaddr, 9266 &h->transtable->RepQAddr[i].lower); 9267 } 9268 9269 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9270 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9271 /* 9272 * enable outbound interrupt coalescing in accelerator mode; 9273 */ 9274 if (trans_support & CFGTBL_Trans_io_accel1) { 9275 access = SA5_ioaccel_mode1_access; 9276 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9277 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9278 } else 9279 if (trans_support & CFGTBL_Trans_io_accel2) 9280 access = SA5_ioaccel_mode2_access; 9281 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9282 if (hpsa_wait_for_mode_change_ack(h)) { 9283 dev_err(&h->pdev->dev, 9284 "performant mode problem - doorbell timeout\n"); 9285 return -ENODEV; 9286 } 9287 register_value = readl(&(h->cfgtable->TransportActive)); 9288 if (!(register_value & CFGTBL_Trans_Performant)) { 9289 dev_err(&h->pdev->dev, 9290 "performant mode problem - transport not active\n"); 9291 return -ENODEV; 9292 } 9293 /* Change the access methods to the performant access methods */ 9294 h->access = access; 9295 h->transMethod = transMethod; 9296 9297 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9298 (trans_support & CFGTBL_Trans_io_accel2))) 9299 return 0; 9300 9301 if (trans_support & CFGTBL_Trans_io_accel1) { 9302 /* Set up I/O accelerator mode */ 9303 for (i = 0; i < h->nreply_queues; i++) { 9304 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9305 h->reply_queue[i].current_entry = 9306 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9307 } 9308 bft[7] = h->ioaccel_maxsg + 8; 9309 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9310 h->ioaccel1_blockFetchTable); 9311 9312 /* initialize all reply queue entries to unused */ 9313 for (i = 0; i < h->nreply_queues; i++) 9314 memset(h->reply_queue[i].head, 9315 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9316 h->reply_queue_size); 9317 9318 /* set all the constant fields in the accelerator command 9319 * frames once at init time to save CPU cycles later. 9320 */ 9321 for (i = 0; i < h->nr_cmds; i++) { 9322 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9323 9324 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9325 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9326 (i * sizeof(struct ErrorInfo))); 9327 cp->err_info_len = sizeof(struct ErrorInfo); 9328 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9329 cp->host_context_flags = 9330 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9331 cp->timeout_sec = 0; 9332 cp->ReplyQueue = 0; 9333 cp->tag = 9334 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9335 cp->host_addr = 9336 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9337 (i * sizeof(struct io_accel1_cmd))); 9338 } 9339 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9340 u64 cfg_offset, cfg_base_addr_index; 9341 u32 bft2_offset, cfg_base_addr; 9342 int rc; 9343 9344 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9345 &cfg_base_addr_index, &cfg_offset); 9346 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9347 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9348 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9349 4, h->ioaccel2_blockFetchTable); 9350 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9351 BUILD_BUG_ON(offsetof(struct CfgTable, 9352 io_accel_request_size_offset) != 0xb8); 9353 h->ioaccel2_bft2_regs = 9354 remap_pci_mem(pci_resource_start(h->pdev, 9355 cfg_base_addr_index) + 9356 cfg_offset + bft2_offset, 9357 ARRAY_SIZE(bft2) * 9358 sizeof(*h->ioaccel2_bft2_regs)); 9359 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9360 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9361 } 9362 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9363 if (hpsa_wait_for_mode_change_ack(h)) { 9364 dev_err(&h->pdev->dev, 9365 "performant mode problem - enabling ioaccel mode\n"); 9366 return -ENODEV; 9367 } 9368 return 0; 9369 } 9370 9371 /* Free ioaccel1 mode command blocks and block fetch table */ 9372 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9373 { 9374 if (h->ioaccel_cmd_pool) { 9375 pci_free_consistent(h->pdev, 9376 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9377 h->ioaccel_cmd_pool, 9378 h->ioaccel_cmd_pool_dhandle); 9379 h->ioaccel_cmd_pool = NULL; 9380 h->ioaccel_cmd_pool_dhandle = 0; 9381 } 9382 kfree(h->ioaccel1_blockFetchTable); 9383 h->ioaccel1_blockFetchTable = NULL; 9384 } 9385 9386 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9387 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9388 { 9389 h->ioaccel_maxsg = 9390 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9391 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9392 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9393 9394 /* Command structures must be aligned on a 128-byte boundary 9395 * because the 7 lower bits of the address are used by the 9396 * hardware. 9397 */ 9398 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9399 IOACCEL1_COMMANDLIST_ALIGNMENT); 9400 h->ioaccel_cmd_pool = 9401 pci_alloc_consistent(h->pdev, 9402 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9403 &(h->ioaccel_cmd_pool_dhandle)); 9404 9405 h->ioaccel1_blockFetchTable = 9406 kmalloc(((h->ioaccel_maxsg + 1) * 9407 sizeof(u32)), GFP_KERNEL); 9408 9409 if ((h->ioaccel_cmd_pool == NULL) || 9410 (h->ioaccel1_blockFetchTable == NULL)) 9411 goto clean_up; 9412 9413 memset(h->ioaccel_cmd_pool, 0, 9414 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9415 return 0; 9416 9417 clean_up: 9418 hpsa_free_ioaccel1_cmd_and_bft(h); 9419 return -ENOMEM; 9420 } 9421 9422 /* Free ioaccel2 mode command blocks and block fetch table */ 9423 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9424 { 9425 hpsa_free_ioaccel2_sg_chain_blocks(h); 9426 9427 if (h->ioaccel2_cmd_pool) { 9428 pci_free_consistent(h->pdev, 9429 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9430 h->ioaccel2_cmd_pool, 9431 h->ioaccel2_cmd_pool_dhandle); 9432 h->ioaccel2_cmd_pool = NULL; 9433 h->ioaccel2_cmd_pool_dhandle = 0; 9434 } 9435 kfree(h->ioaccel2_blockFetchTable); 9436 h->ioaccel2_blockFetchTable = NULL; 9437 } 9438 9439 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9440 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9441 { 9442 int rc; 9443 9444 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9445 9446 h->ioaccel_maxsg = 9447 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9448 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9449 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9450 9451 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9452 IOACCEL2_COMMANDLIST_ALIGNMENT); 9453 h->ioaccel2_cmd_pool = 9454 pci_alloc_consistent(h->pdev, 9455 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9456 &(h->ioaccel2_cmd_pool_dhandle)); 9457 9458 h->ioaccel2_blockFetchTable = 9459 kmalloc(((h->ioaccel_maxsg + 1) * 9460 sizeof(u32)), GFP_KERNEL); 9461 9462 if ((h->ioaccel2_cmd_pool == NULL) || 9463 (h->ioaccel2_blockFetchTable == NULL)) { 9464 rc = -ENOMEM; 9465 goto clean_up; 9466 } 9467 9468 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9469 if (rc) 9470 goto clean_up; 9471 9472 memset(h->ioaccel2_cmd_pool, 0, 9473 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9474 return 0; 9475 9476 clean_up: 9477 hpsa_free_ioaccel2_cmd_and_bft(h); 9478 return rc; 9479 } 9480 9481 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9482 static void hpsa_free_performant_mode(struct ctlr_info *h) 9483 { 9484 kfree(h->blockFetchTable); 9485 h->blockFetchTable = NULL; 9486 hpsa_free_reply_queues(h); 9487 hpsa_free_ioaccel1_cmd_and_bft(h); 9488 hpsa_free_ioaccel2_cmd_and_bft(h); 9489 } 9490 9491 /* return -ENODEV on error, 0 on success (or no action) 9492 * allocates numerous items that must be freed later 9493 */ 9494 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9495 { 9496 u32 trans_support; 9497 unsigned long transMethod = CFGTBL_Trans_Performant | 9498 CFGTBL_Trans_use_short_tags; 9499 int i, rc; 9500 9501 if (hpsa_simple_mode) 9502 return 0; 9503 9504 trans_support = readl(&(h->cfgtable->TransportSupport)); 9505 if (!(trans_support & PERFORMANT_MODE)) 9506 return 0; 9507 9508 /* Check for I/O accelerator mode support */ 9509 if (trans_support & CFGTBL_Trans_io_accel1) { 9510 transMethod |= CFGTBL_Trans_io_accel1 | 9511 CFGTBL_Trans_enable_directed_msix; 9512 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9513 if (rc) 9514 return rc; 9515 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9516 transMethod |= CFGTBL_Trans_io_accel2 | 9517 CFGTBL_Trans_enable_directed_msix; 9518 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9519 if (rc) 9520 return rc; 9521 } 9522 9523 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9524 hpsa_get_max_perf_mode_cmds(h); 9525 /* Performant mode ring buffer and supporting data structures */ 9526 h->reply_queue_size = h->max_commands * sizeof(u64); 9527 9528 for (i = 0; i < h->nreply_queues; i++) { 9529 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9530 h->reply_queue_size, 9531 &(h->reply_queue[i].busaddr)); 9532 if (!h->reply_queue[i].head) { 9533 rc = -ENOMEM; 9534 goto clean1; /* rq, ioaccel */ 9535 } 9536 h->reply_queue[i].size = h->max_commands; 9537 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9538 h->reply_queue[i].current_entry = 0; 9539 } 9540 9541 /* Need a block fetch table for performant mode */ 9542 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9543 sizeof(u32)), GFP_KERNEL); 9544 if (!h->blockFetchTable) { 9545 rc = -ENOMEM; 9546 goto clean1; /* rq, ioaccel */ 9547 } 9548 9549 rc = hpsa_enter_performant_mode(h, trans_support); 9550 if (rc) 9551 goto clean2; /* bft, rq, ioaccel */ 9552 return 0; 9553 9554 clean2: /* bft, rq, ioaccel */ 9555 kfree(h->blockFetchTable); 9556 h->blockFetchTable = NULL; 9557 clean1: /* rq, ioaccel */ 9558 hpsa_free_reply_queues(h); 9559 hpsa_free_ioaccel1_cmd_and_bft(h); 9560 hpsa_free_ioaccel2_cmd_and_bft(h); 9561 return rc; 9562 } 9563 9564 static int is_accelerated_cmd(struct CommandList *c) 9565 { 9566 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9567 } 9568 9569 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9570 { 9571 struct CommandList *c = NULL; 9572 int i, accel_cmds_out; 9573 int refcount; 9574 9575 do { /* wait for all outstanding ioaccel commands to drain out */ 9576 accel_cmds_out = 0; 9577 for (i = 0; i < h->nr_cmds; i++) { 9578 c = h->cmd_pool + i; 9579 refcount = atomic_inc_return(&c->refcount); 9580 if (refcount > 1) /* Command is allocated */ 9581 accel_cmds_out += is_accelerated_cmd(c); 9582 cmd_free(h, c); 9583 } 9584 if (accel_cmds_out <= 0) 9585 break; 9586 msleep(100); 9587 } while (1); 9588 } 9589 9590 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9591 struct hpsa_sas_port *hpsa_sas_port) 9592 { 9593 struct hpsa_sas_phy *hpsa_sas_phy; 9594 struct sas_phy *phy; 9595 9596 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9597 if (!hpsa_sas_phy) 9598 return NULL; 9599 9600 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9601 hpsa_sas_port->next_phy_index); 9602 if (!phy) { 9603 kfree(hpsa_sas_phy); 9604 return NULL; 9605 } 9606 9607 hpsa_sas_port->next_phy_index++; 9608 hpsa_sas_phy->phy = phy; 9609 hpsa_sas_phy->parent_port = hpsa_sas_port; 9610 9611 return hpsa_sas_phy; 9612 } 9613 9614 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9615 { 9616 struct sas_phy *phy = hpsa_sas_phy->phy; 9617 9618 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9619 sas_phy_free(phy); 9620 if (hpsa_sas_phy->added_to_port) 9621 list_del(&hpsa_sas_phy->phy_list_entry); 9622 kfree(hpsa_sas_phy); 9623 } 9624 9625 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9626 { 9627 int rc; 9628 struct hpsa_sas_port *hpsa_sas_port; 9629 struct sas_phy *phy; 9630 struct sas_identify *identify; 9631 9632 hpsa_sas_port = hpsa_sas_phy->parent_port; 9633 phy = hpsa_sas_phy->phy; 9634 9635 identify = &phy->identify; 9636 memset(identify, 0, sizeof(*identify)); 9637 identify->sas_address = hpsa_sas_port->sas_address; 9638 identify->device_type = SAS_END_DEVICE; 9639 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9640 identify->target_port_protocols = SAS_PROTOCOL_STP; 9641 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9642 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9643 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9644 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9645 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9646 9647 rc = sas_phy_add(hpsa_sas_phy->phy); 9648 if (rc) 9649 return rc; 9650 9651 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9652 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9653 &hpsa_sas_port->phy_list_head); 9654 hpsa_sas_phy->added_to_port = true; 9655 9656 return 0; 9657 } 9658 9659 static int 9660 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9661 struct sas_rphy *rphy) 9662 { 9663 struct sas_identify *identify; 9664 9665 identify = &rphy->identify; 9666 identify->sas_address = hpsa_sas_port->sas_address; 9667 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9668 identify->target_port_protocols = SAS_PROTOCOL_STP; 9669 9670 return sas_rphy_add(rphy); 9671 } 9672 9673 static struct hpsa_sas_port 9674 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9675 u64 sas_address) 9676 { 9677 int rc; 9678 struct hpsa_sas_port *hpsa_sas_port; 9679 struct sas_port *port; 9680 9681 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9682 if (!hpsa_sas_port) 9683 return NULL; 9684 9685 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9686 hpsa_sas_port->parent_node = hpsa_sas_node; 9687 9688 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9689 if (!port) 9690 goto free_hpsa_port; 9691 9692 rc = sas_port_add(port); 9693 if (rc) 9694 goto free_sas_port; 9695 9696 hpsa_sas_port->port = port; 9697 hpsa_sas_port->sas_address = sas_address; 9698 list_add_tail(&hpsa_sas_port->port_list_entry, 9699 &hpsa_sas_node->port_list_head); 9700 9701 return hpsa_sas_port; 9702 9703 free_sas_port: 9704 sas_port_free(port); 9705 free_hpsa_port: 9706 kfree(hpsa_sas_port); 9707 9708 return NULL; 9709 } 9710 9711 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9712 { 9713 struct hpsa_sas_phy *hpsa_sas_phy; 9714 struct hpsa_sas_phy *next; 9715 9716 list_for_each_entry_safe(hpsa_sas_phy, next, 9717 &hpsa_sas_port->phy_list_head, phy_list_entry) 9718 hpsa_free_sas_phy(hpsa_sas_phy); 9719 9720 sas_port_delete(hpsa_sas_port->port); 9721 list_del(&hpsa_sas_port->port_list_entry); 9722 kfree(hpsa_sas_port); 9723 } 9724 9725 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9726 { 9727 struct hpsa_sas_node *hpsa_sas_node; 9728 9729 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9730 if (hpsa_sas_node) { 9731 hpsa_sas_node->parent_dev = parent_dev; 9732 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9733 } 9734 9735 return hpsa_sas_node; 9736 } 9737 9738 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9739 { 9740 struct hpsa_sas_port *hpsa_sas_port; 9741 struct hpsa_sas_port *next; 9742 9743 if (!hpsa_sas_node) 9744 return; 9745 9746 list_for_each_entry_safe(hpsa_sas_port, next, 9747 &hpsa_sas_node->port_list_head, port_list_entry) 9748 hpsa_free_sas_port(hpsa_sas_port); 9749 9750 kfree(hpsa_sas_node); 9751 } 9752 9753 static struct hpsa_scsi_dev_t 9754 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9755 struct sas_rphy *rphy) 9756 { 9757 int i; 9758 struct hpsa_scsi_dev_t *device; 9759 9760 for (i = 0; i < h->ndevices; i++) { 9761 device = h->dev[i]; 9762 if (!device->sas_port) 9763 continue; 9764 if (device->sas_port->rphy == rphy) 9765 return device; 9766 } 9767 9768 return NULL; 9769 } 9770 9771 static int hpsa_add_sas_host(struct ctlr_info *h) 9772 { 9773 int rc; 9774 struct device *parent_dev; 9775 struct hpsa_sas_node *hpsa_sas_node; 9776 struct hpsa_sas_port *hpsa_sas_port; 9777 struct hpsa_sas_phy *hpsa_sas_phy; 9778 9779 parent_dev = &h->scsi_host->shost_gendev; 9780 9781 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9782 if (!hpsa_sas_node) 9783 return -ENOMEM; 9784 9785 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9786 if (!hpsa_sas_port) { 9787 rc = -ENODEV; 9788 goto free_sas_node; 9789 } 9790 9791 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9792 if (!hpsa_sas_phy) { 9793 rc = -ENODEV; 9794 goto free_sas_port; 9795 } 9796 9797 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9798 if (rc) 9799 goto free_sas_phy; 9800 9801 h->sas_host = hpsa_sas_node; 9802 9803 return 0; 9804 9805 free_sas_phy: 9806 hpsa_free_sas_phy(hpsa_sas_phy); 9807 free_sas_port: 9808 hpsa_free_sas_port(hpsa_sas_port); 9809 free_sas_node: 9810 hpsa_free_sas_node(hpsa_sas_node); 9811 9812 return rc; 9813 } 9814 9815 static void hpsa_delete_sas_host(struct ctlr_info *h) 9816 { 9817 hpsa_free_sas_node(h->sas_host); 9818 } 9819 9820 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9821 struct hpsa_scsi_dev_t *device) 9822 { 9823 int rc; 9824 struct hpsa_sas_port *hpsa_sas_port; 9825 struct sas_rphy *rphy; 9826 9827 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9828 if (!hpsa_sas_port) 9829 return -ENOMEM; 9830 9831 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9832 if (!rphy) { 9833 rc = -ENODEV; 9834 goto free_sas_port; 9835 } 9836 9837 hpsa_sas_port->rphy = rphy; 9838 device->sas_port = hpsa_sas_port; 9839 9840 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9841 if (rc) 9842 goto free_sas_port; 9843 9844 return 0; 9845 9846 free_sas_port: 9847 hpsa_free_sas_port(hpsa_sas_port); 9848 device->sas_port = NULL; 9849 9850 return rc; 9851 } 9852 9853 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9854 { 9855 if (device->sas_port) { 9856 hpsa_free_sas_port(device->sas_port); 9857 device->sas_port = NULL; 9858 } 9859 } 9860 9861 static int 9862 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9863 { 9864 return 0; 9865 } 9866 9867 static int 9868 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9869 { 9870 *identifier = 0; 9871 return 0; 9872 } 9873 9874 static int 9875 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9876 { 9877 return -ENXIO; 9878 } 9879 9880 static int 9881 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9882 { 9883 return 0; 9884 } 9885 9886 static int 9887 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9888 { 9889 return 0; 9890 } 9891 9892 static int 9893 hpsa_sas_phy_setup(struct sas_phy *phy) 9894 { 9895 return 0; 9896 } 9897 9898 static void 9899 hpsa_sas_phy_release(struct sas_phy *phy) 9900 { 9901 } 9902 9903 static int 9904 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9905 { 9906 return -EINVAL; 9907 } 9908 9909 /* SMP = Serial Management Protocol */ 9910 static int 9911 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9912 struct request *req) 9913 { 9914 return -EINVAL; 9915 } 9916 9917 static struct sas_function_template hpsa_sas_transport_functions = { 9918 .get_linkerrors = hpsa_sas_get_linkerrors, 9919 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9920 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9921 .phy_reset = hpsa_sas_phy_reset, 9922 .phy_enable = hpsa_sas_phy_enable, 9923 .phy_setup = hpsa_sas_phy_setup, 9924 .phy_release = hpsa_sas_phy_release, 9925 .set_phy_speed = hpsa_sas_phy_speed, 9926 .smp_handler = hpsa_sas_smp_handler, 9927 }; 9928 9929 /* 9930 * This is it. Register the PCI driver information for the cards we control 9931 * the OS will call our registered routines when it finds one of our cards. 9932 */ 9933 static int __init hpsa_init(void) 9934 { 9935 int rc; 9936 9937 hpsa_sas_transport_template = 9938 sas_attach_transport(&hpsa_sas_transport_functions); 9939 if (!hpsa_sas_transport_template) 9940 return -ENODEV; 9941 9942 rc = pci_register_driver(&hpsa_pci_driver); 9943 9944 if (rc) 9945 sas_release_transport(hpsa_sas_transport_template); 9946 9947 return rc; 9948 } 9949 9950 static void __exit hpsa_cleanup(void) 9951 { 9952 pci_unregister_driver(&hpsa_pci_driver); 9953 sas_release_transport(hpsa_sas_transport_template); 9954 } 9955 9956 static void __attribute__((unused)) verify_offsets(void) 9957 { 9958 #define VERIFY_OFFSET(member, offset) \ 9959 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9960 9961 VERIFY_OFFSET(structure_size, 0); 9962 VERIFY_OFFSET(volume_blk_size, 4); 9963 VERIFY_OFFSET(volume_blk_cnt, 8); 9964 VERIFY_OFFSET(phys_blk_shift, 16); 9965 VERIFY_OFFSET(parity_rotation_shift, 17); 9966 VERIFY_OFFSET(strip_size, 18); 9967 VERIFY_OFFSET(disk_starting_blk, 20); 9968 VERIFY_OFFSET(disk_blk_cnt, 28); 9969 VERIFY_OFFSET(data_disks_per_row, 36); 9970 VERIFY_OFFSET(metadata_disks_per_row, 38); 9971 VERIFY_OFFSET(row_cnt, 40); 9972 VERIFY_OFFSET(layout_map_count, 42); 9973 VERIFY_OFFSET(flags, 44); 9974 VERIFY_OFFSET(dekindex, 46); 9975 /* VERIFY_OFFSET(reserved, 48 */ 9976 VERIFY_OFFSET(data, 64); 9977 9978 #undef VERIFY_OFFSET 9979 9980 #define VERIFY_OFFSET(member, offset) \ 9981 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9982 9983 VERIFY_OFFSET(IU_type, 0); 9984 VERIFY_OFFSET(direction, 1); 9985 VERIFY_OFFSET(reply_queue, 2); 9986 /* VERIFY_OFFSET(reserved1, 3); */ 9987 VERIFY_OFFSET(scsi_nexus, 4); 9988 VERIFY_OFFSET(Tag, 8); 9989 VERIFY_OFFSET(cdb, 16); 9990 VERIFY_OFFSET(cciss_lun, 32); 9991 VERIFY_OFFSET(data_len, 40); 9992 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9993 VERIFY_OFFSET(sg_count, 45); 9994 /* VERIFY_OFFSET(reserved3 */ 9995 VERIFY_OFFSET(err_ptr, 48); 9996 VERIFY_OFFSET(err_len, 56); 9997 /* VERIFY_OFFSET(reserved4 */ 9998 VERIFY_OFFSET(sg, 64); 9999 10000 #undef VERIFY_OFFSET 10001 10002 #define VERIFY_OFFSET(member, offset) \ 10003 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 10004 10005 VERIFY_OFFSET(dev_handle, 0x00); 10006 VERIFY_OFFSET(reserved1, 0x02); 10007 VERIFY_OFFSET(function, 0x03); 10008 VERIFY_OFFSET(reserved2, 0x04); 10009 VERIFY_OFFSET(err_info, 0x0C); 10010 VERIFY_OFFSET(reserved3, 0x10); 10011 VERIFY_OFFSET(err_info_len, 0x12); 10012 VERIFY_OFFSET(reserved4, 0x13); 10013 VERIFY_OFFSET(sgl_offset, 0x14); 10014 VERIFY_OFFSET(reserved5, 0x15); 10015 VERIFY_OFFSET(transfer_len, 0x1C); 10016 VERIFY_OFFSET(reserved6, 0x20); 10017 VERIFY_OFFSET(io_flags, 0x24); 10018 VERIFY_OFFSET(reserved7, 0x26); 10019 VERIFY_OFFSET(LUN, 0x34); 10020 VERIFY_OFFSET(control, 0x3C); 10021 VERIFY_OFFSET(CDB, 0x40); 10022 VERIFY_OFFSET(reserved8, 0x50); 10023 VERIFY_OFFSET(host_context_flags, 0x60); 10024 VERIFY_OFFSET(timeout_sec, 0x62); 10025 VERIFY_OFFSET(ReplyQueue, 0x64); 10026 VERIFY_OFFSET(reserved9, 0x65); 10027 VERIFY_OFFSET(tag, 0x68); 10028 VERIFY_OFFSET(host_addr, 0x70); 10029 VERIFY_OFFSET(CISS_LUN, 0x78); 10030 VERIFY_OFFSET(SG, 0x78 + 8); 10031 #undef VERIFY_OFFSET 10032 } 10033 10034 module_init(hpsa_init); 10035 module_exit(hpsa_cleanup); 10036