1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.20-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 136 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 137 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 142 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 143 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 146 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 147 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 148 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 149 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151 {0,} 152 }; 153 154 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155 156 /* board_id = Subsystem Device ID & Vendor ID 157 * product = Marketing Name for the board 158 * access = Address of the struct of function pointers 159 */ 160 static struct board_type products[] = { 161 {0x3241103C, "Smart Array P212", &SA5_access}, 162 {0x3243103C, "Smart Array P410", &SA5_access}, 163 {0x3245103C, "Smart Array P410i", &SA5_access}, 164 {0x3247103C, "Smart Array P411", &SA5_access}, 165 {0x3249103C, "Smart Array P812", &SA5_access}, 166 {0x324A103C, "Smart Array P712m", &SA5_access}, 167 {0x324B103C, "Smart Array P711m", &SA5_access}, 168 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 169 {0x3350103C, "Smart Array P222", &SA5_access}, 170 {0x3351103C, "Smart Array P420", &SA5_access}, 171 {0x3352103C, "Smart Array P421", &SA5_access}, 172 {0x3353103C, "Smart Array P822", &SA5_access}, 173 {0x3354103C, "Smart Array P420i", &SA5_access}, 174 {0x3355103C, "Smart Array P220i", &SA5_access}, 175 {0x3356103C, "Smart Array P721m", &SA5_access}, 176 {0x1920103C, "Smart Array P430i", &SA5_access}, 177 {0x1921103C, "Smart Array P830i", &SA5_access}, 178 {0x1922103C, "Smart Array P430", &SA5_access}, 179 {0x1923103C, "Smart Array P431", &SA5_access}, 180 {0x1924103C, "Smart Array P830", &SA5_access}, 181 {0x1925103C, "Smart Array P831", &SA5_access}, 182 {0x1926103C, "Smart Array P731m", &SA5_access}, 183 {0x1928103C, "Smart Array P230i", &SA5_access}, 184 {0x1929103C, "Smart Array P530", &SA5_access}, 185 {0x21BD103C, "Smart Array P244br", &SA5_access}, 186 {0x21BE103C, "Smart Array P741m", &SA5_access}, 187 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 188 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 189 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 190 {0x21C2103C, "Smart Array P440", &SA5_access}, 191 {0x21C3103C, "Smart Array P441", &SA5_access}, 192 {0x21C4103C, "Smart Array", &SA5_access}, 193 {0x21C5103C, "Smart Array P841", &SA5_access}, 194 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 195 {0x21C7103C, "Smart HBA H240", &SA5_access}, 196 {0x21C8103C, "Smart HBA H241", &SA5_access}, 197 {0x21C9103C, "Smart Array", &SA5_access}, 198 {0x21CA103C, "Smart Array P246br", &SA5_access}, 199 {0x21CB103C, "Smart Array P840", &SA5_access}, 200 {0x21CC103C, "Smart Array", &SA5_access}, 201 {0x21CD103C, "Smart Array", &SA5_access}, 202 {0x21CE103C, "Smart HBA", &SA5_access}, 203 {0x05809005, "SmartHBA-SA", &SA5_access}, 204 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 205 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 206 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 207 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 208 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 209 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 210 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 211 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 212 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 213 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 214 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 215 }; 216 217 static struct scsi_transport_template *hpsa_sas_transport_template; 218 static int hpsa_add_sas_host(struct ctlr_info *h); 219 static void hpsa_delete_sas_host(struct ctlr_info *h); 220 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 221 struct hpsa_scsi_dev_t *device); 222 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 223 static struct hpsa_scsi_dev_t 224 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 225 struct sas_rphy *rphy); 226 227 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 228 static const struct scsi_cmnd hpsa_cmd_busy; 229 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 230 static const struct scsi_cmnd hpsa_cmd_idle; 231 static int number_of_controllers; 232 233 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 234 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 235 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 236 237 #ifdef CONFIG_COMPAT 238 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 239 void __user *arg); 240 #endif 241 242 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 243 static struct CommandList *cmd_alloc(struct ctlr_info *h); 244 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 245 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 246 struct scsi_cmnd *scmd); 247 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 248 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 249 int cmd_type); 250 static void hpsa_free_cmd_pool(struct ctlr_info *h); 251 #define VPD_PAGE (1 << 8) 252 #define HPSA_SIMPLE_ERROR_BITS 0x03 253 254 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 255 static void hpsa_scan_start(struct Scsi_Host *); 256 static int hpsa_scan_finished(struct Scsi_Host *sh, 257 unsigned long elapsed_time); 258 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 259 260 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 261 static int hpsa_slave_alloc(struct scsi_device *sdev); 262 static int hpsa_slave_configure(struct scsi_device *sdev); 263 static void hpsa_slave_destroy(struct scsi_device *sdev); 264 265 static void hpsa_update_scsi_devices(struct ctlr_info *h); 266 static int check_for_unit_attention(struct ctlr_info *h, 267 struct CommandList *c); 268 static void check_ioctl_unit_attention(struct ctlr_info *h, 269 struct CommandList *c); 270 /* performant mode helper functions */ 271 static void calc_bucket_map(int *bucket, int num_buckets, 272 int nsgs, int min_blocks, u32 *bucket_map); 273 static void hpsa_free_performant_mode(struct ctlr_info *h); 274 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 275 static inline u32 next_command(struct ctlr_info *h, u8 q); 276 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 277 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 278 u64 *cfg_offset); 279 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 280 unsigned long *memory_bar); 281 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 282 static int wait_for_device_to_become_ready(struct ctlr_info *h, 283 unsigned char lunaddr[], 284 int reply_queue); 285 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 286 int wait_for_ready); 287 static inline void finish_cmd(struct CommandList *c); 288 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 289 #define BOARD_NOT_READY 0 290 #define BOARD_READY 1 291 static void hpsa_drain_accel_commands(struct ctlr_info *h); 292 static void hpsa_flush_cache(struct ctlr_info *h); 293 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 294 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 295 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 296 static void hpsa_command_resubmit_worker(struct work_struct *work); 297 static u32 lockup_detected(struct ctlr_info *h); 298 static int detect_controller_lockup(struct ctlr_info *h); 299 static void hpsa_disable_rld_caching(struct ctlr_info *h); 300 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 301 struct ReportExtendedLUNdata *buf, int bufsize); 302 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 303 unsigned char scsi3addr[], u8 page); 304 static int hpsa_luns_changed(struct ctlr_info *h); 305 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 306 struct hpsa_scsi_dev_t *dev, 307 unsigned char *scsi3addr); 308 309 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 310 { 311 unsigned long *priv = shost_priv(sdev->host); 312 return (struct ctlr_info *) *priv; 313 } 314 315 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 316 { 317 unsigned long *priv = shost_priv(sh); 318 return (struct ctlr_info *) *priv; 319 } 320 321 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 322 { 323 return c->scsi_cmd == SCSI_CMD_IDLE; 324 } 325 326 static inline bool hpsa_is_pending_event(struct CommandList *c) 327 { 328 return c->reset_pending; 329 } 330 331 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 332 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 333 u8 *sense_key, u8 *asc, u8 *ascq) 334 { 335 struct scsi_sense_hdr sshdr; 336 bool rc; 337 338 *sense_key = -1; 339 *asc = -1; 340 *ascq = -1; 341 342 if (sense_data_len < 1) 343 return; 344 345 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 346 if (rc) { 347 *sense_key = sshdr.sense_key; 348 *asc = sshdr.asc; 349 *ascq = sshdr.ascq; 350 } 351 } 352 353 static int check_for_unit_attention(struct ctlr_info *h, 354 struct CommandList *c) 355 { 356 u8 sense_key, asc, ascq; 357 int sense_len; 358 359 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 360 sense_len = sizeof(c->err_info->SenseInfo); 361 else 362 sense_len = c->err_info->SenseLen; 363 364 decode_sense_data(c->err_info->SenseInfo, sense_len, 365 &sense_key, &asc, &ascq); 366 if (sense_key != UNIT_ATTENTION || asc == 0xff) 367 return 0; 368 369 switch (asc) { 370 case STATE_CHANGED: 371 dev_warn(&h->pdev->dev, 372 "%s: a state change detected, command retried\n", 373 h->devname); 374 break; 375 case LUN_FAILED: 376 dev_warn(&h->pdev->dev, 377 "%s: LUN failure detected\n", h->devname); 378 break; 379 case REPORT_LUNS_CHANGED: 380 dev_warn(&h->pdev->dev, 381 "%s: report LUN data changed\n", h->devname); 382 /* 383 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 384 * target (array) devices. 385 */ 386 break; 387 case POWER_OR_RESET: 388 dev_warn(&h->pdev->dev, 389 "%s: a power on or device reset detected\n", 390 h->devname); 391 break; 392 case UNIT_ATTENTION_CLEARED: 393 dev_warn(&h->pdev->dev, 394 "%s: unit attention cleared by another initiator\n", 395 h->devname); 396 break; 397 default: 398 dev_warn(&h->pdev->dev, 399 "%s: unknown unit attention detected\n", 400 h->devname); 401 break; 402 } 403 return 1; 404 } 405 406 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 407 { 408 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 409 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 410 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 411 return 0; 412 dev_warn(&h->pdev->dev, HPSA "device busy"); 413 return 1; 414 } 415 416 static u32 lockup_detected(struct ctlr_info *h); 417 static ssize_t host_show_lockup_detected(struct device *dev, 418 struct device_attribute *attr, char *buf) 419 { 420 int ld; 421 struct ctlr_info *h; 422 struct Scsi_Host *shost = class_to_shost(dev); 423 424 h = shost_to_hba(shost); 425 ld = lockup_detected(h); 426 427 return sprintf(buf, "ld=%d\n", ld); 428 } 429 430 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 431 struct device_attribute *attr, 432 const char *buf, size_t count) 433 { 434 int status, len; 435 struct ctlr_info *h; 436 struct Scsi_Host *shost = class_to_shost(dev); 437 char tmpbuf[10]; 438 439 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 440 return -EACCES; 441 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 442 strncpy(tmpbuf, buf, len); 443 tmpbuf[len] = '\0'; 444 if (sscanf(tmpbuf, "%d", &status) != 1) 445 return -EINVAL; 446 h = shost_to_hba(shost); 447 h->acciopath_status = !!status; 448 dev_warn(&h->pdev->dev, 449 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 450 h->acciopath_status ? "enabled" : "disabled"); 451 return count; 452 } 453 454 static ssize_t host_store_raid_offload_debug(struct device *dev, 455 struct device_attribute *attr, 456 const char *buf, size_t count) 457 { 458 int debug_level, len; 459 struct ctlr_info *h; 460 struct Scsi_Host *shost = class_to_shost(dev); 461 char tmpbuf[10]; 462 463 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 464 return -EACCES; 465 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 466 strncpy(tmpbuf, buf, len); 467 tmpbuf[len] = '\0'; 468 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 469 return -EINVAL; 470 if (debug_level < 0) 471 debug_level = 0; 472 h = shost_to_hba(shost); 473 h->raid_offload_debug = debug_level; 474 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 475 h->raid_offload_debug); 476 return count; 477 } 478 479 static ssize_t host_store_rescan(struct device *dev, 480 struct device_attribute *attr, 481 const char *buf, size_t count) 482 { 483 struct ctlr_info *h; 484 struct Scsi_Host *shost = class_to_shost(dev); 485 h = shost_to_hba(shost); 486 hpsa_scan_start(h->scsi_host); 487 return count; 488 } 489 490 static ssize_t host_show_firmware_revision(struct device *dev, 491 struct device_attribute *attr, char *buf) 492 { 493 struct ctlr_info *h; 494 struct Scsi_Host *shost = class_to_shost(dev); 495 unsigned char *fwrev; 496 497 h = shost_to_hba(shost); 498 if (!h->hba_inquiry_data) 499 return 0; 500 fwrev = &h->hba_inquiry_data[32]; 501 return snprintf(buf, 20, "%c%c%c%c\n", 502 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 503 } 504 505 static ssize_t host_show_commands_outstanding(struct device *dev, 506 struct device_attribute *attr, char *buf) 507 { 508 struct Scsi_Host *shost = class_to_shost(dev); 509 struct ctlr_info *h = shost_to_hba(shost); 510 511 return snprintf(buf, 20, "%d\n", 512 atomic_read(&h->commands_outstanding)); 513 } 514 515 static ssize_t host_show_transport_mode(struct device *dev, 516 struct device_attribute *attr, char *buf) 517 { 518 struct ctlr_info *h; 519 struct Scsi_Host *shost = class_to_shost(dev); 520 521 h = shost_to_hba(shost); 522 return snprintf(buf, 20, "%s\n", 523 h->transMethod & CFGTBL_Trans_Performant ? 524 "performant" : "simple"); 525 } 526 527 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 528 struct device_attribute *attr, char *buf) 529 { 530 struct ctlr_info *h; 531 struct Scsi_Host *shost = class_to_shost(dev); 532 533 h = shost_to_hba(shost); 534 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 535 (h->acciopath_status == 1) ? "enabled" : "disabled"); 536 } 537 538 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 539 static u32 unresettable_controller[] = { 540 0x324a103C, /* Smart Array P712m */ 541 0x324b103C, /* Smart Array P711m */ 542 0x3223103C, /* Smart Array P800 */ 543 0x3234103C, /* Smart Array P400 */ 544 0x3235103C, /* Smart Array P400i */ 545 0x3211103C, /* Smart Array E200i */ 546 0x3212103C, /* Smart Array E200 */ 547 0x3213103C, /* Smart Array E200i */ 548 0x3214103C, /* Smart Array E200i */ 549 0x3215103C, /* Smart Array E200i */ 550 0x3237103C, /* Smart Array E500 */ 551 0x323D103C, /* Smart Array P700m */ 552 0x40800E11, /* Smart Array 5i */ 553 0x409C0E11, /* Smart Array 6400 */ 554 0x409D0E11, /* Smart Array 6400 EM */ 555 0x40700E11, /* Smart Array 5300 */ 556 0x40820E11, /* Smart Array 532 */ 557 0x40830E11, /* Smart Array 5312 */ 558 0x409A0E11, /* Smart Array 641 */ 559 0x409B0E11, /* Smart Array 642 */ 560 0x40910E11, /* Smart Array 6i */ 561 }; 562 563 /* List of controllers which cannot even be soft reset */ 564 static u32 soft_unresettable_controller[] = { 565 0x40800E11, /* Smart Array 5i */ 566 0x40700E11, /* Smart Array 5300 */ 567 0x40820E11, /* Smart Array 532 */ 568 0x40830E11, /* Smart Array 5312 */ 569 0x409A0E11, /* Smart Array 641 */ 570 0x409B0E11, /* Smart Array 642 */ 571 0x40910E11, /* Smart Array 6i */ 572 /* Exclude 640x boards. These are two pci devices in one slot 573 * which share a battery backed cache module. One controls the 574 * cache, the other accesses the cache through the one that controls 575 * it. If we reset the one controlling the cache, the other will 576 * likely not be happy. Just forbid resetting this conjoined mess. 577 * The 640x isn't really supported by hpsa anyway. 578 */ 579 0x409C0E11, /* Smart Array 6400 */ 580 0x409D0E11, /* Smart Array 6400 EM */ 581 }; 582 583 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 584 { 585 int i; 586 587 for (i = 0; i < nelems; i++) 588 if (a[i] == board_id) 589 return 1; 590 return 0; 591 } 592 593 static int ctlr_is_hard_resettable(u32 board_id) 594 { 595 return !board_id_in_array(unresettable_controller, 596 ARRAY_SIZE(unresettable_controller), board_id); 597 } 598 599 static int ctlr_is_soft_resettable(u32 board_id) 600 { 601 return !board_id_in_array(soft_unresettable_controller, 602 ARRAY_SIZE(soft_unresettable_controller), board_id); 603 } 604 605 static int ctlr_is_resettable(u32 board_id) 606 { 607 return ctlr_is_hard_resettable(board_id) || 608 ctlr_is_soft_resettable(board_id); 609 } 610 611 static ssize_t host_show_resettable(struct device *dev, 612 struct device_attribute *attr, char *buf) 613 { 614 struct ctlr_info *h; 615 struct Scsi_Host *shost = class_to_shost(dev); 616 617 h = shost_to_hba(shost); 618 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 619 } 620 621 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 622 { 623 return (scsi3addr[3] & 0xC0) == 0x40; 624 } 625 626 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 627 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 628 }; 629 #define HPSA_RAID_0 0 630 #define HPSA_RAID_4 1 631 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 632 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 633 #define HPSA_RAID_51 4 634 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 635 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 636 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 637 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 638 639 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 640 { 641 return !device->physical_device; 642 } 643 644 static ssize_t raid_level_show(struct device *dev, 645 struct device_attribute *attr, char *buf) 646 { 647 ssize_t l = 0; 648 unsigned char rlevel; 649 struct ctlr_info *h; 650 struct scsi_device *sdev; 651 struct hpsa_scsi_dev_t *hdev; 652 unsigned long flags; 653 654 sdev = to_scsi_device(dev); 655 h = sdev_to_hba(sdev); 656 spin_lock_irqsave(&h->lock, flags); 657 hdev = sdev->hostdata; 658 if (!hdev) { 659 spin_unlock_irqrestore(&h->lock, flags); 660 return -ENODEV; 661 } 662 663 /* Is this even a logical drive? */ 664 if (!is_logical_device(hdev)) { 665 spin_unlock_irqrestore(&h->lock, flags); 666 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 667 return l; 668 } 669 670 rlevel = hdev->raid_level; 671 spin_unlock_irqrestore(&h->lock, flags); 672 if (rlevel > RAID_UNKNOWN) 673 rlevel = RAID_UNKNOWN; 674 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 675 return l; 676 } 677 678 static ssize_t lunid_show(struct device *dev, 679 struct device_attribute *attr, char *buf) 680 { 681 struct ctlr_info *h; 682 struct scsi_device *sdev; 683 struct hpsa_scsi_dev_t *hdev; 684 unsigned long flags; 685 unsigned char lunid[8]; 686 687 sdev = to_scsi_device(dev); 688 h = sdev_to_hba(sdev); 689 spin_lock_irqsave(&h->lock, flags); 690 hdev = sdev->hostdata; 691 if (!hdev) { 692 spin_unlock_irqrestore(&h->lock, flags); 693 return -ENODEV; 694 } 695 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 696 spin_unlock_irqrestore(&h->lock, flags); 697 return snprintf(buf, 20, "0x%8phN\n", lunid); 698 } 699 700 static ssize_t unique_id_show(struct device *dev, 701 struct device_attribute *attr, char *buf) 702 { 703 struct ctlr_info *h; 704 struct scsi_device *sdev; 705 struct hpsa_scsi_dev_t *hdev; 706 unsigned long flags; 707 unsigned char sn[16]; 708 709 sdev = to_scsi_device(dev); 710 h = sdev_to_hba(sdev); 711 spin_lock_irqsave(&h->lock, flags); 712 hdev = sdev->hostdata; 713 if (!hdev) { 714 spin_unlock_irqrestore(&h->lock, flags); 715 return -ENODEV; 716 } 717 memcpy(sn, hdev->device_id, sizeof(sn)); 718 spin_unlock_irqrestore(&h->lock, flags); 719 return snprintf(buf, 16 * 2 + 2, 720 "%02X%02X%02X%02X%02X%02X%02X%02X" 721 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 722 sn[0], sn[1], sn[2], sn[3], 723 sn[4], sn[5], sn[6], sn[7], 724 sn[8], sn[9], sn[10], sn[11], 725 sn[12], sn[13], sn[14], sn[15]); 726 } 727 728 static ssize_t sas_address_show(struct device *dev, 729 struct device_attribute *attr, char *buf) 730 { 731 struct ctlr_info *h; 732 struct scsi_device *sdev; 733 struct hpsa_scsi_dev_t *hdev; 734 unsigned long flags; 735 u64 sas_address; 736 737 sdev = to_scsi_device(dev); 738 h = sdev_to_hba(sdev); 739 spin_lock_irqsave(&h->lock, flags); 740 hdev = sdev->hostdata; 741 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 742 spin_unlock_irqrestore(&h->lock, flags); 743 return -ENODEV; 744 } 745 sas_address = hdev->sas_address; 746 spin_unlock_irqrestore(&h->lock, flags); 747 748 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 749 } 750 751 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 752 struct device_attribute *attr, char *buf) 753 { 754 struct ctlr_info *h; 755 struct scsi_device *sdev; 756 struct hpsa_scsi_dev_t *hdev; 757 unsigned long flags; 758 int offload_enabled; 759 760 sdev = to_scsi_device(dev); 761 h = sdev_to_hba(sdev); 762 spin_lock_irqsave(&h->lock, flags); 763 hdev = sdev->hostdata; 764 if (!hdev) { 765 spin_unlock_irqrestore(&h->lock, flags); 766 return -ENODEV; 767 } 768 offload_enabled = hdev->offload_enabled; 769 spin_unlock_irqrestore(&h->lock, flags); 770 return snprintf(buf, 20, "%d\n", offload_enabled); 771 } 772 773 #define MAX_PATHS 8 774 static ssize_t path_info_show(struct device *dev, 775 struct device_attribute *attr, char *buf) 776 { 777 struct ctlr_info *h; 778 struct scsi_device *sdev; 779 struct hpsa_scsi_dev_t *hdev; 780 unsigned long flags; 781 int i; 782 int output_len = 0; 783 u8 box; 784 u8 bay; 785 u8 path_map_index = 0; 786 char *active; 787 unsigned char phys_connector[2]; 788 789 sdev = to_scsi_device(dev); 790 h = sdev_to_hba(sdev); 791 spin_lock_irqsave(&h->devlock, flags); 792 hdev = sdev->hostdata; 793 if (!hdev) { 794 spin_unlock_irqrestore(&h->devlock, flags); 795 return -ENODEV; 796 } 797 798 bay = hdev->bay; 799 for (i = 0; i < MAX_PATHS; i++) { 800 path_map_index = 1<<i; 801 if (i == hdev->active_path_index) 802 active = "Active"; 803 else if (hdev->path_map & path_map_index) 804 active = "Inactive"; 805 else 806 continue; 807 808 output_len += scnprintf(buf + output_len, 809 PAGE_SIZE - output_len, 810 "[%d:%d:%d:%d] %20.20s ", 811 h->scsi_host->host_no, 812 hdev->bus, hdev->target, hdev->lun, 813 scsi_device_type(hdev->devtype)); 814 815 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 816 output_len += scnprintf(buf + output_len, 817 PAGE_SIZE - output_len, 818 "%s\n", active); 819 continue; 820 } 821 822 box = hdev->box[i]; 823 memcpy(&phys_connector, &hdev->phys_connector[i], 824 sizeof(phys_connector)); 825 if (phys_connector[0] < '0') 826 phys_connector[0] = '0'; 827 if (phys_connector[1] < '0') 828 phys_connector[1] = '0'; 829 output_len += scnprintf(buf + output_len, 830 PAGE_SIZE - output_len, 831 "PORT: %.2s ", 832 phys_connector); 833 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 834 hdev->expose_device) { 835 if (box == 0 || box == 0xFF) { 836 output_len += scnprintf(buf + output_len, 837 PAGE_SIZE - output_len, 838 "BAY: %hhu %s\n", 839 bay, active); 840 } else { 841 output_len += scnprintf(buf + output_len, 842 PAGE_SIZE - output_len, 843 "BOX: %hhu BAY: %hhu %s\n", 844 box, bay, active); 845 } 846 } else if (box != 0 && box != 0xFF) { 847 output_len += scnprintf(buf + output_len, 848 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 849 box, active); 850 } else 851 output_len += scnprintf(buf + output_len, 852 PAGE_SIZE - output_len, "%s\n", active); 853 } 854 855 spin_unlock_irqrestore(&h->devlock, flags); 856 return output_len; 857 } 858 859 static ssize_t host_show_ctlr_num(struct device *dev, 860 struct device_attribute *attr, char *buf) 861 { 862 struct ctlr_info *h; 863 struct Scsi_Host *shost = class_to_shost(dev); 864 865 h = shost_to_hba(shost); 866 return snprintf(buf, 20, "%d\n", h->ctlr); 867 } 868 869 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 870 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 871 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 872 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 873 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 874 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 875 host_show_hp_ssd_smart_path_enabled, NULL); 876 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 877 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 878 host_show_hp_ssd_smart_path_status, 879 host_store_hp_ssd_smart_path_status); 880 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 881 host_store_raid_offload_debug); 882 static DEVICE_ATTR(firmware_revision, S_IRUGO, 883 host_show_firmware_revision, NULL); 884 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 885 host_show_commands_outstanding, NULL); 886 static DEVICE_ATTR(transport_mode, S_IRUGO, 887 host_show_transport_mode, NULL); 888 static DEVICE_ATTR(resettable, S_IRUGO, 889 host_show_resettable, NULL); 890 static DEVICE_ATTR(lockup_detected, S_IRUGO, 891 host_show_lockup_detected, NULL); 892 static DEVICE_ATTR(ctlr_num, S_IRUGO, 893 host_show_ctlr_num, NULL); 894 895 static struct device_attribute *hpsa_sdev_attrs[] = { 896 &dev_attr_raid_level, 897 &dev_attr_lunid, 898 &dev_attr_unique_id, 899 &dev_attr_hp_ssd_smart_path_enabled, 900 &dev_attr_path_info, 901 &dev_attr_sas_address, 902 NULL, 903 }; 904 905 static struct device_attribute *hpsa_shost_attrs[] = { 906 &dev_attr_rescan, 907 &dev_attr_firmware_revision, 908 &dev_attr_commands_outstanding, 909 &dev_attr_transport_mode, 910 &dev_attr_resettable, 911 &dev_attr_hp_ssd_smart_path_status, 912 &dev_attr_raid_offload_debug, 913 &dev_attr_lockup_detected, 914 &dev_attr_ctlr_num, 915 NULL, 916 }; 917 918 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 919 HPSA_MAX_CONCURRENT_PASSTHRUS) 920 921 static struct scsi_host_template hpsa_driver_template = { 922 .module = THIS_MODULE, 923 .name = HPSA, 924 .proc_name = HPSA, 925 .queuecommand = hpsa_scsi_queue_command, 926 .scan_start = hpsa_scan_start, 927 .scan_finished = hpsa_scan_finished, 928 .change_queue_depth = hpsa_change_queue_depth, 929 .this_id = -1, 930 .use_clustering = ENABLE_CLUSTERING, 931 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 932 .ioctl = hpsa_ioctl, 933 .slave_alloc = hpsa_slave_alloc, 934 .slave_configure = hpsa_slave_configure, 935 .slave_destroy = hpsa_slave_destroy, 936 #ifdef CONFIG_COMPAT 937 .compat_ioctl = hpsa_compat_ioctl, 938 #endif 939 .sdev_attrs = hpsa_sdev_attrs, 940 .shost_attrs = hpsa_shost_attrs, 941 .max_sectors = 1024, 942 .no_write_same = 1, 943 }; 944 945 static inline u32 next_command(struct ctlr_info *h, u8 q) 946 { 947 u32 a; 948 struct reply_queue_buffer *rq = &h->reply_queue[q]; 949 950 if (h->transMethod & CFGTBL_Trans_io_accel1) 951 return h->access.command_completed(h, q); 952 953 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 954 return h->access.command_completed(h, q); 955 956 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 957 a = rq->head[rq->current_entry]; 958 rq->current_entry++; 959 atomic_dec(&h->commands_outstanding); 960 } else { 961 a = FIFO_EMPTY; 962 } 963 /* Check for wraparound */ 964 if (rq->current_entry == h->max_commands) { 965 rq->current_entry = 0; 966 rq->wraparound ^= 1; 967 } 968 return a; 969 } 970 971 /* 972 * There are some special bits in the bus address of the 973 * command that we have to set for the controller to know 974 * how to process the command: 975 * 976 * Normal performant mode: 977 * bit 0: 1 means performant mode, 0 means simple mode. 978 * bits 1-3 = block fetch table entry 979 * bits 4-6 = command type (== 0) 980 * 981 * ioaccel1 mode: 982 * bit 0 = "performant mode" bit. 983 * bits 1-3 = block fetch table entry 984 * bits 4-6 = command type (== 110) 985 * (command type is needed because ioaccel1 mode 986 * commands are submitted through the same register as normal 987 * mode commands, so this is how the controller knows whether 988 * the command is normal mode or ioaccel1 mode.) 989 * 990 * ioaccel2 mode: 991 * bit 0 = "performant mode" bit. 992 * bits 1-4 = block fetch table entry (note extra bit) 993 * bits 4-6 = not needed, because ioaccel2 mode has 994 * a separate special register for submitting commands. 995 */ 996 997 /* 998 * set_performant_mode: Modify the tag for cciss performant 999 * set bit 0 for pull model, bits 3-1 for block fetch 1000 * register number 1001 */ 1002 #define DEFAULT_REPLY_QUEUE (-1) 1003 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1004 int reply_queue) 1005 { 1006 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1007 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1008 if (unlikely(!h->msix_vectors)) 1009 return; 1010 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1011 c->Header.ReplyQueue = 1012 raw_smp_processor_id() % h->nreply_queues; 1013 else 1014 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1015 } 1016 } 1017 1018 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1019 struct CommandList *c, 1020 int reply_queue) 1021 { 1022 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1023 1024 /* 1025 * Tell the controller to post the reply to the queue for this 1026 * processor. This seems to give the best I/O throughput. 1027 */ 1028 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1029 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1030 else 1031 cp->ReplyQueue = reply_queue % h->nreply_queues; 1032 /* 1033 * Set the bits in the address sent down to include: 1034 * - performant mode bit (bit 0) 1035 * - pull count (bits 1-3) 1036 * - command type (bits 4-6) 1037 */ 1038 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1039 IOACCEL1_BUSADDR_CMDTYPE; 1040 } 1041 1042 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1043 struct CommandList *c, 1044 int reply_queue) 1045 { 1046 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1047 &h->ioaccel2_cmd_pool[c->cmdindex]; 1048 1049 /* Tell the controller to post the reply to the queue for this 1050 * processor. This seems to give the best I/O throughput. 1051 */ 1052 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1053 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1054 else 1055 cp->reply_queue = reply_queue % h->nreply_queues; 1056 /* Set the bits in the address sent down to include: 1057 * - performant mode bit not used in ioaccel mode 2 1058 * - pull count (bits 0-3) 1059 * - command type isn't needed for ioaccel2 1060 */ 1061 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1062 } 1063 1064 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1065 struct CommandList *c, 1066 int reply_queue) 1067 { 1068 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1069 1070 /* 1071 * Tell the controller to post the reply to the queue for this 1072 * processor. This seems to give the best I/O throughput. 1073 */ 1074 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1075 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1076 else 1077 cp->reply_queue = reply_queue % h->nreply_queues; 1078 /* 1079 * Set the bits in the address sent down to include: 1080 * - performant mode bit not used in ioaccel mode 2 1081 * - pull count (bits 0-3) 1082 * - command type isn't needed for ioaccel2 1083 */ 1084 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1085 } 1086 1087 static int is_firmware_flash_cmd(u8 *cdb) 1088 { 1089 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1090 } 1091 1092 /* 1093 * During firmware flash, the heartbeat register may not update as frequently 1094 * as it should. So we dial down lockup detection during firmware flash. and 1095 * dial it back up when firmware flash completes. 1096 */ 1097 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1098 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1099 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1100 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1101 struct CommandList *c) 1102 { 1103 if (!is_firmware_flash_cmd(c->Request.CDB)) 1104 return; 1105 atomic_inc(&h->firmware_flash_in_progress); 1106 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1107 } 1108 1109 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1110 struct CommandList *c) 1111 { 1112 if (is_firmware_flash_cmd(c->Request.CDB) && 1113 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1114 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1115 } 1116 1117 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1118 struct CommandList *c, int reply_queue) 1119 { 1120 dial_down_lockup_detection_during_fw_flash(h, c); 1121 atomic_inc(&h->commands_outstanding); 1122 switch (c->cmd_type) { 1123 case CMD_IOACCEL1: 1124 set_ioaccel1_performant_mode(h, c, reply_queue); 1125 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1126 break; 1127 case CMD_IOACCEL2: 1128 set_ioaccel2_performant_mode(h, c, reply_queue); 1129 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1130 break; 1131 case IOACCEL2_TMF: 1132 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1133 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1134 break; 1135 default: 1136 set_performant_mode(h, c, reply_queue); 1137 h->access.submit_command(h, c); 1138 } 1139 } 1140 1141 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1142 { 1143 if (unlikely(hpsa_is_pending_event(c))) 1144 return finish_cmd(c); 1145 1146 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1147 } 1148 1149 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1150 { 1151 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1152 } 1153 1154 static inline int is_scsi_rev_5(struct ctlr_info *h) 1155 { 1156 if (!h->hba_inquiry_data) 1157 return 0; 1158 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1159 return 1; 1160 return 0; 1161 } 1162 1163 static int hpsa_find_target_lun(struct ctlr_info *h, 1164 unsigned char scsi3addr[], int bus, int *target, int *lun) 1165 { 1166 /* finds an unused bus, target, lun for a new physical device 1167 * assumes h->devlock is held 1168 */ 1169 int i, found = 0; 1170 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1171 1172 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1173 1174 for (i = 0; i < h->ndevices; i++) { 1175 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1176 __set_bit(h->dev[i]->target, lun_taken); 1177 } 1178 1179 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1180 if (i < HPSA_MAX_DEVICES) { 1181 /* *bus = 1; */ 1182 *target = i; 1183 *lun = 0; 1184 found = 1; 1185 } 1186 return !found; 1187 } 1188 1189 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1190 struct hpsa_scsi_dev_t *dev, char *description) 1191 { 1192 #define LABEL_SIZE 25 1193 char label[LABEL_SIZE]; 1194 1195 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1196 return; 1197 1198 switch (dev->devtype) { 1199 case TYPE_RAID: 1200 snprintf(label, LABEL_SIZE, "controller"); 1201 break; 1202 case TYPE_ENCLOSURE: 1203 snprintf(label, LABEL_SIZE, "enclosure"); 1204 break; 1205 case TYPE_DISK: 1206 case TYPE_ZBC: 1207 if (dev->external) 1208 snprintf(label, LABEL_SIZE, "external"); 1209 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1210 snprintf(label, LABEL_SIZE, "%s", 1211 raid_label[PHYSICAL_DRIVE]); 1212 else 1213 snprintf(label, LABEL_SIZE, "RAID-%s", 1214 dev->raid_level > RAID_UNKNOWN ? "?" : 1215 raid_label[dev->raid_level]); 1216 break; 1217 case TYPE_ROM: 1218 snprintf(label, LABEL_SIZE, "rom"); 1219 break; 1220 case TYPE_TAPE: 1221 snprintf(label, LABEL_SIZE, "tape"); 1222 break; 1223 case TYPE_MEDIUM_CHANGER: 1224 snprintf(label, LABEL_SIZE, "changer"); 1225 break; 1226 default: 1227 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1228 break; 1229 } 1230 1231 dev_printk(level, &h->pdev->dev, 1232 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1233 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1234 description, 1235 scsi_device_type(dev->devtype), 1236 dev->vendor, 1237 dev->model, 1238 label, 1239 dev->offload_config ? '+' : '-', 1240 dev->offload_enabled ? '+' : '-', 1241 dev->expose_device); 1242 } 1243 1244 /* Add an entry into h->dev[] array. */ 1245 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1246 struct hpsa_scsi_dev_t *device, 1247 struct hpsa_scsi_dev_t *added[], int *nadded) 1248 { 1249 /* assumes h->devlock is held */ 1250 int n = h->ndevices; 1251 int i; 1252 unsigned char addr1[8], addr2[8]; 1253 struct hpsa_scsi_dev_t *sd; 1254 1255 if (n >= HPSA_MAX_DEVICES) { 1256 dev_err(&h->pdev->dev, "too many devices, some will be " 1257 "inaccessible.\n"); 1258 return -1; 1259 } 1260 1261 /* physical devices do not have lun or target assigned until now. */ 1262 if (device->lun != -1) 1263 /* Logical device, lun is already assigned. */ 1264 goto lun_assigned; 1265 1266 /* If this device a non-zero lun of a multi-lun device 1267 * byte 4 of the 8-byte LUN addr will contain the logical 1268 * unit no, zero otherwise. 1269 */ 1270 if (device->scsi3addr[4] == 0) { 1271 /* This is not a non-zero lun of a multi-lun device */ 1272 if (hpsa_find_target_lun(h, device->scsi3addr, 1273 device->bus, &device->target, &device->lun) != 0) 1274 return -1; 1275 goto lun_assigned; 1276 } 1277 1278 /* This is a non-zero lun of a multi-lun device. 1279 * Search through our list and find the device which 1280 * has the same 8 byte LUN address, excepting byte 4 and 5. 1281 * Assign the same bus and target for this new LUN. 1282 * Use the logical unit number from the firmware. 1283 */ 1284 memcpy(addr1, device->scsi3addr, 8); 1285 addr1[4] = 0; 1286 addr1[5] = 0; 1287 for (i = 0; i < n; i++) { 1288 sd = h->dev[i]; 1289 memcpy(addr2, sd->scsi3addr, 8); 1290 addr2[4] = 0; 1291 addr2[5] = 0; 1292 /* differ only in byte 4 and 5? */ 1293 if (memcmp(addr1, addr2, 8) == 0) { 1294 device->bus = sd->bus; 1295 device->target = sd->target; 1296 device->lun = device->scsi3addr[4]; 1297 break; 1298 } 1299 } 1300 if (device->lun == -1) { 1301 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1302 " suspect firmware bug or unsupported hardware " 1303 "configuration.\n"); 1304 return -1; 1305 } 1306 1307 lun_assigned: 1308 1309 h->dev[n] = device; 1310 h->ndevices++; 1311 added[*nadded] = device; 1312 (*nadded)++; 1313 hpsa_show_dev_msg(KERN_INFO, h, device, 1314 device->expose_device ? "added" : "masked"); 1315 device->offload_to_be_enabled = device->offload_enabled; 1316 device->offload_enabled = 0; 1317 return 0; 1318 } 1319 1320 /* Update an entry in h->dev[] array. */ 1321 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1322 int entry, struct hpsa_scsi_dev_t *new_entry) 1323 { 1324 int offload_enabled; 1325 /* assumes h->devlock is held */ 1326 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1327 1328 /* Raid level changed. */ 1329 h->dev[entry]->raid_level = new_entry->raid_level; 1330 1331 /* Raid offload parameters changed. Careful about the ordering. */ 1332 if (new_entry->offload_config && new_entry->offload_enabled) { 1333 /* 1334 * if drive is newly offload_enabled, we want to copy the 1335 * raid map data first. If previously offload_enabled and 1336 * offload_config were set, raid map data had better be 1337 * the same as it was before. if raid map data is changed 1338 * then it had better be the case that 1339 * h->dev[entry]->offload_enabled is currently 0. 1340 */ 1341 h->dev[entry]->raid_map = new_entry->raid_map; 1342 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1343 } 1344 if (new_entry->hba_ioaccel_enabled) { 1345 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1346 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1347 } 1348 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1349 h->dev[entry]->offload_config = new_entry->offload_config; 1350 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1351 h->dev[entry]->queue_depth = new_entry->queue_depth; 1352 1353 /* 1354 * We can turn off ioaccel offload now, but need to delay turning 1355 * it on until we can update h->dev[entry]->phys_disk[], but we 1356 * can't do that until all the devices are updated. 1357 */ 1358 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1359 if (!new_entry->offload_enabled) 1360 h->dev[entry]->offload_enabled = 0; 1361 1362 offload_enabled = h->dev[entry]->offload_enabled; 1363 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1364 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1365 h->dev[entry]->offload_enabled = offload_enabled; 1366 } 1367 1368 /* Replace an entry from h->dev[] array. */ 1369 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1370 int entry, struct hpsa_scsi_dev_t *new_entry, 1371 struct hpsa_scsi_dev_t *added[], int *nadded, 1372 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1373 { 1374 /* assumes h->devlock is held */ 1375 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1376 removed[*nremoved] = h->dev[entry]; 1377 (*nremoved)++; 1378 1379 /* 1380 * New physical devices won't have target/lun assigned yet 1381 * so we need to preserve the values in the slot we are replacing. 1382 */ 1383 if (new_entry->target == -1) { 1384 new_entry->target = h->dev[entry]->target; 1385 new_entry->lun = h->dev[entry]->lun; 1386 } 1387 1388 h->dev[entry] = new_entry; 1389 added[*nadded] = new_entry; 1390 (*nadded)++; 1391 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1392 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1393 new_entry->offload_enabled = 0; 1394 } 1395 1396 /* Remove an entry from h->dev[] array. */ 1397 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1398 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1399 { 1400 /* assumes h->devlock is held */ 1401 int i; 1402 struct hpsa_scsi_dev_t *sd; 1403 1404 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1405 1406 sd = h->dev[entry]; 1407 removed[*nremoved] = h->dev[entry]; 1408 (*nremoved)++; 1409 1410 for (i = entry; i < h->ndevices-1; i++) 1411 h->dev[i] = h->dev[i+1]; 1412 h->ndevices--; 1413 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1414 } 1415 1416 #define SCSI3ADDR_EQ(a, b) ( \ 1417 (a)[7] == (b)[7] && \ 1418 (a)[6] == (b)[6] && \ 1419 (a)[5] == (b)[5] && \ 1420 (a)[4] == (b)[4] && \ 1421 (a)[3] == (b)[3] && \ 1422 (a)[2] == (b)[2] && \ 1423 (a)[1] == (b)[1] && \ 1424 (a)[0] == (b)[0]) 1425 1426 static void fixup_botched_add(struct ctlr_info *h, 1427 struct hpsa_scsi_dev_t *added) 1428 { 1429 /* called when scsi_add_device fails in order to re-adjust 1430 * h->dev[] to match the mid layer's view. 1431 */ 1432 unsigned long flags; 1433 int i, j; 1434 1435 spin_lock_irqsave(&h->lock, flags); 1436 for (i = 0; i < h->ndevices; i++) { 1437 if (h->dev[i] == added) { 1438 for (j = i; j < h->ndevices-1; j++) 1439 h->dev[j] = h->dev[j+1]; 1440 h->ndevices--; 1441 break; 1442 } 1443 } 1444 spin_unlock_irqrestore(&h->lock, flags); 1445 kfree(added); 1446 } 1447 1448 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1449 struct hpsa_scsi_dev_t *dev2) 1450 { 1451 /* we compare everything except lun and target as these 1452 * are not yet assigned. Compare parts likely 1453 * to differ first 1454 */ 1455 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1456 sizeof(dev1->scsi3addr)) != 0) 1457 return 0; 1458 if (memcmp(dev1->device_id, dev2->device_id, 1459 sizeof(dev1->device_id)) != 0) 1460 return 0; 1461 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1462 return 0; 1463 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1464 return 0; 1465 if (dev1->devtype != dev2->devtype) 1466 return 0; 1467 if (dev1->bus != dev2->bus) 1468 return 0; 1469 return 1; 1470 } 1471 1472 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1473 struct hpsa_scsi_dev_t *dev2) 1474 { 1475 /* Device attributes that can change, but don't mean 1476 * that the device is a different device, nor that the OS 1477 * needs to be told anything about the change. 1478 */ 1479 if (dev1->raid_level != dev2->raid_level) 1480 return 1; 1481 if (dev1->offload_config != dev2->offload_config) 1482 return 1; 1483 if (dev1->offload_enabled != dev2->offload_enabled) 1484 return 1; 1485 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1486 if (dev1->queue_depth != dev2->queue_depth) 1487 return 1; 1488 return 0; 1489 } 1490 1491 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1492 * and return needle location in *index. If scsi3addr matches, but not 1493 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1494 * location in *index. 1495 * In the case of a minor device attribute change, such as RAID level, just 1496 * return DEVICE_UPDATED, along with the updated device's location in index. 1497 * If needle not found, return DEVICE_NOT_FOUND. 1498 */ 1499 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1500 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1501 int *index) 1502 { 1503 int i; 1504 #define DEVICE_NOT_FOUND 0 1505 #define DEVICE_CHANGED 1 1506 #define DEVICE_SAME 2 1507 #define DEVICE_UPDATED 3 1508 if (needle == NULL) 1509 return DEVICE_NOT_FOUND; 1510 1511 for (i = 0; i < haystack_size; i++) { 1512 if (haystack[i] == NULL) /* previously removed. */ 1513 continue; 1514 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1515 *index = i; 1516 if (device_is_the_same(needle, haystack[i])) { 1517 if (device_updated(needle, haystack[i])) 1518 return DEVICE_UPDATED; 1519 return DEVICE_SAME; 1520 } else { 1521 /* Keep offline devices offline */ 1522 if (needle->volume_offline) 1523 return DEVICE_NOT_FOUND; 1524 return DEVICE_CHANGED; 1525 } 1526 } 1527 } 1528 *index = -1; 1529 return DEVICE_NOT_FOUND; 1530 } 1531 1532 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1533 unsigned char scsi3addr[]) 1534 { 1535 struct offline_device_entry *device; 1536 unsigned long flags; 1537 1538 /* Check to see if device is already on the list */ 1539 spin_lock_irqsave(&h->offline_device_lock, flags); 1540 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1541 if (memcmp(device->scsi3addr, scsi3addr, 1542 sizeof(device->scsi3addr)) == 0) { 1543 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1544 return; 1545 } 1546 } 1547 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1548 1549 /* Device is not on the list, add it. */ 1550 device = kmalloc(sizeof(*device), GFP_KERNEL); 1551 if (!device) 1552 return; 1553 1554 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1555 spin_lock_irqsave(&h->offline_device_lock, flags); 1556 list_add_tail(&device->offline_list, &h->offline_device_list); 1557 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1558 } 1559 1560 /* Print a message explaining various offline volume states */ 1561 static void hpsa_show_volume_status(struct ctlr_info *h, 1562 struct hpsa_scsi_dev_t *sd) 1563 { 1564 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1565 dev_info(&h->pdev->dev, 1566 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1567 h->scsi_host->host_no, 1568 sd->bus, sd->target, sd->lun); 1569 switch (sd->volume_offline) { 1570 case HPSA_LV_OK: 1571 break; 1572 case HPSA_LV_UNDERGOING_ERASE: 1573 dev_info(&h->pdev->dev, 1574 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1575 h->scsi_host->host_no, 1576 sd->bus, sd->target, sd->lun); 1577 break; 1578 case HPSA_LV_NOT_AVAILABLE: 1579 dev_info(&h->pdev->dev, 1580 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1581 h->scsi_host->host_no, 1582 sd->bus, sd->target, sd->lun); 1583 break; 1584 case HPSA_LV_UNDERGOING_RPI: 1585 dev_info(&h->pdev->dev, 1586 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1587 h->scsi_host->host_no, 1588 sd->bus, sd->target, sd->lun); 1589 break; 1590 case HPSA_LV_PENDING_RPI: 1591 dev_info(&h->pdev->dev, 1592 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1593 h->scsi_host->host_no, 1594 sd->bus, sd->target, sd->lun); 1595 break; 1596 case HPSA_LV_ENCRYPTED_NO_KEY: 1597 dev_info(&h->pdev->dev, 1598 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1599 h->scsi_host->host_no, 1600 sd->bus, sd->target, sd->lun); 1601 break; 1602 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1603 dev_info(&h->pdev->dev, 1604 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1605 h->scsi_host->host_no, 1606 sd->bus, sd->target, sd->lun); 1607 break; 1608 case HPSA_LV_UNDERGOING_ENCRYPTION: 1609 dev_info(&h->pdev->dev, 1610 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1611 h->scsi_host->host_no, 1612 sd->bus, sd->target, sd->lun); 1613 break; 1614 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1615 dev_info(&h->pdev->dev, 1616 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1617 h->scsi_host->host_no, 1618 sd->bus, sd->target, sd->lun); 1619 break; 1620 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1621 dev_info(&h->pdev->dev, 1622 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1623 h->scsi_host->host_no, 1624 sd->bus, sd->target, sd->lun); 1625 break; 1626 case HPSA_LV_PENDING_ENCRYPTION: 1627 dev_info(&h->pdev->dev, 1628 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1629 h->scsi_host->host_no, 1630 sd->bus, sd->target, sd->lun); 1631 break; 1632 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1633 dev_info(&h->pdev->dev, 1634 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1635 h->scsi_host->host_no, 1636 sd->bus, sd->target, sd->lun); 1637 break; 1638 } 1639 } 1640 1641 /* 1642 * Figure the list of physical drive pointers for a logical drive with 1643 * raid offload configured. 1644 */ 1645 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1646 struct hpsa_scsi_dev_t *dev[], int ndevices, 1647 struct hpsa_scsi_dev_t *logical_drive) 1648 { 1649 struct raid_map_data *map = &logical_drive->raid_map; 1650 struct raid_map_disk_data *dd = &map->data[0]; 1651 int i, j; 1652 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1653 le16_to_cpu(map->metadata_disks_per_row); 1654 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1655 le16_to_cpu(map->layout_map_count) * 1656 total_disks_per_row; 1657 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1658 total_disks_per_row; 1659 int qdepth; 1660 1661 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1662 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1663 1664 logical_drive->nphysical_disks = nraid_map_entries; 1665 1666 qdepth = 0; 1667 for (i = 0; i < nraid_map_entries; i++) { 1668 logical_drive->phys_disk[i] = NULL; 1669 if (!logical_drive->offload_config) 1670 continue; 1671 for (j = 0; j < ndevices; j++) { 1672 if (dev[j] == NULL) 1673 continue; 1674 if (dev[j]->devtype != TYPE_DISK && 1675 dev[j]->devtype != TYPE_ZBC) 1676 continue; 1677 if (is_logical_device(dev[j])) 1678 continue; 1679 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1680 continue; 1681 1682 logical_drive->phys_disk[i] = dev[j]; 1683 if (i < nphys_disk) 1684 qdepth = min(h->nr_cmds, qdepth + 1685 logical_drive->phys_disk[i]->queue_depth); 1686 break; 1687 } 1688 1689 /* 1690 * This can happen if a physical drive is removed and 1691 * the logical drive is degraded. In that case, the RAID 1692 * map data will refer to a physical disk which isn't actually 1693 * present. And in that case offload_enabled should already 1694 * be 0, but we'll turn it off here just in case 1695 */ 1696 if (!logical_drive->phys_disk[i]) { 1697 logical_drive->offload_enabled = 0; 1698 logical_drive->offload_to_be_enabled = 0; 1699 logical_drive->queue_depth = 8; 1700 } 1701 } 1702 if (nraid_map_entries) 1703 /* 1704 * This is correct for reads, too high for full stripe writes, 1705 * way too high for partial stripe writes 1706 */ 1707 logical_drive->queue_depth = qdepth; 1708 else 1709 logical_drive->queue_depth = h->nr_cmds; 1710 } 1711 1712 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1713 struct hpsa_scsi_dev_t *dev[], int ndevices) 1714 { 1715 int i; 1716 1717 for (i = 0; i < ndevices; i++) { 1718 if (dev[i] == NULL) 1719 continue; 1720 if (dev[i]->devtype != TYPE_DISK && 1721 dev[i]->devtype != TYPE_ZBC) 1722 continue; 1723 if (!is_logical_device(dev[i])) 1724 continue; 1725 1726 /* 1727 * If offload is currently enabled, the RAID map and 1728 * phys_disk[] assignment *better* not be changing 1729 * and since it isn't changing, we do not need to 1730 * update it. 1731 */ 1732 if (dev[i]->offload_enabled) 1733 continue; 1734 1735 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1736 } 1737 } 1738 1739 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1740 { 1741 int rc = 0; 1742 1743 if (!h->scsi_host) 1744 return 1; 1745 1746 if (is_logical_device(device)) /* RAID */ 1747 rc = scsi_add_device(h->scsi_host, device->bus, 1748 device->target, device->lun); 1749 else /* HBA */ 1750 rc = hpsa_add_sas_device(h->sas_host, device); 1751 1752 return rc; 1753 } 1754 1755 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1756 struct hpsa_scsi_dev_t *dev) 1757 { 1758 int i; 1759 int count = 0; 1760 1761 for (i = 0; i < h->nr_cmds; i++) { 1762 struct CommandList *c = h->cmd_pool + i; 1763 int refcount = atomic_inc_return(&c->refcount); 1764 1765 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1766 dev->scsi3addr)) { 1767 unsigned long flags; 1768 1769 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1770 if (!hpsa_is_cmd_idle(c)) 1771 ++count; 1772 spin_unlock_irqrestore(&h->lock, flags); 1773 } 1774 1775 cmd_free(h, c); 1776 } 1777 1778 return count; 1779 } 1780 1781 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1782 struct hpsa_scsi_dev_t *device) 1783 { 1784 int cmds = 0; 1785 int waits = 0; 1786 1787 while (1) { 1788 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1789 if (cmds == 0) 1790 break; 1791 if (++waits > 20) 1792 break; 1793 dev_warn(&h->pdev->dev, 1794 "%s: removing device with %d outstanding commands!\n", 1795 __func__, cmds); 1796 msleep(1000); 1797 } 1798 } 1799 1800 static void hpsa_remove_device(struct ctlr_info *h, 1801 struct hpsa_scsi_dev_t *device) 1802 { 1803 struct scsi_device *sdev = NULL; 1804 1805 if (!h->scsi_host) 1806 return; 1807 1808 if (is_logical_device(device)) { /* RAID */ 1809 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1810 device->target, device->lun); 1811 if (sdev) { 1812 scsi_remove_device(sdev); 1813 scsi_device_put(sdev); 1814 } else { 1815 /* 1816 * We don't expect to get here. Future commands 1817 * to this device will get a selection timeout as 1818 * if the device were gone. 1819 */ 1820 hpsa_show_dev_msg(KERN_WARNING, h, device, 1821 "didn't find device for removal."); 1822 } 1823 } else { /* HBA */ 1824 1825 device->removed = 1; 1826 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1827 1828 hpsa_remove_sas_device(device); 1829 } 1830 } 1831 1832 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1833 struct hpsa_scsi_dev_t *sd[], int nsds) 1834 { 1835 /* sd contains scsi3 addresses and devtypes, and inquiry 1836 * data. This function takes what's in sd to be the current 1837 * reality and updates h->dev[] to reflect that reality. 1838 */ 1839 int i, entry, device_change, changes = 0; 1840 struct hpsa_scsi_dev_t *csd; 1841 unsigned long flags; 1842 struct hpsa_scsi_dev_t **added, **removed; 1843 int nadded, nremoved; 1844 1845 /* 1846 * A reset can cause a device status to change 1847 * re-schedule the scan to see what happened. 1848 */ 1849 spin_lock_irqsave(&h->reset_lock, flags); 1850 if (h->reset_in_progress) { 1851 h->drv_req_rescan = 1; 1852 spin_unlock_irqrestore(&h->reset_lock, flags); 1853 return; 1854 } 1855 spin_unlock_irqrestore(&h->reset_lock, flags); 1856 1857 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1858 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1859 1860 if (!added || !removed) { 1861 dev_warn(&h->pdev->dev, "out of memory in " 1862 "adjust_hpsa_scsi_table\n"); 1863 goto free_and_out; 1864 } 1865 1866 spin_lock_irqsave(&h->devlock, flags); 1867 1868 /* find any devices in h->dev[] that are not in 1869 * sd[] and remove them from h->dev[], and for any 1870 * devices which have changed, remove the old device 1871 * info and add the new device info. 1872 * If minor device attributes change, just update 1873 * the existing device structure. 1874 */ 1875 i = 0; 1876 nremoved = 0; 1877 nadded = 0; 1878 while (i < h->ndevices) { 1879 csd = h->dev[i]; 1880 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1881 if (device_change == DEVICE_NOT_FOUND) { 1882 changes++; 1883 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1884 continue; /* remove ^^^, hence i not incremented */ 1885 } else if (device_change == DEVICE_CHANGED) { 1886 changes++; 1887 hpsa_scsi_replace_entry(h, i, sd[entry], 1888 added, &nadded, removed, &nremoved); 1889 /* Set it to NULL to prevent it from being freed 1890 * at the bottom of hpsa_update_scsi_devices() 1891 */ 1892 sd[entry] = NULL; 1893 } else if (device_change == DEVICE_UPDATED) { 1894 hpsa_scsi_update_entry(h, i, sd[entry]); 1895 } 1896 i++; 1897 } 1898 1899 /* Now, make sure every device listed in sd[] is also 1900 * listed in h->dev[], adding them if they aren't found 1901 */ 1902 1903 for (i = 0; i < nsds; i++) { 1904 if (!sd[i]) /* if already added above. */ 1905 continue; 1906 1907 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1908 * as the SCSI mid-layer does not handle such devices well. 1909 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1910 * at 160Hz, and prevents the system from coming up. 1911 */ 1912 if (sd[i]->volume_offline) { 1913 hpsa_show_volume_status(h, sd[i]); 1914 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1915 continue; 1916 } 1917 1918 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1919 h->ndevices, &entry); 1920 if (device_change == DEVICE_NOT_FOUND) { 1921 changes++; 1922 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1923 break; 1924 sd[i] = NULL; /* prevent from being freed later. */ 1925 } else if (device_change == DEVICE_CHANGED) { 1926 /* should never happen... */ 1927 changes++; 1928 dev_warn(&h->pdev->dev, 1929 "device unexpectedly changed.\n"); 1930 /* but if it does happen, we just ignore that device */ 1931 } 1932 } 1933 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1934 1935 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1936 * any logical drives that need it enabled. 1937 */ 1938 for (i = 0; i < h->ndevices; i++) { 1939 if (h->dev[i] == NULL) 1940 continue; 1941 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1942 } 1943 1944 spin_unlock_irqrestore(&h->devlock, flags); 1945 1946 /* Monitor devices which are in one of several NOT READY states to be 1947 * brought online later. This must be done without holding h->devlock, 1948 * so don't touch h->dev[] 1949 */ 1950 for (i = 0; i < nsds; i++) { 1951 if (!sd[i]) /* if already added above. */ 1952 continue; 1953 if (sd[i]->volume_offline) 1954 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1955 } 1956 1957 /* Don't notify scsi mid layer of any changes the first time through 1958 * (or if there are no changes) scsi_scan_host will do it later the 1959 * first time through. 1960 */ 1961 if (!changes) 1962 goto free_and_out; 1963 1964 /* Notify scsi mid layer of any removed devices */ 1965 for (i = 0; i < nremoved; i++) { 1966 if (removed[i] == NULL) 1967 continue; 1968 if (removed[i]->expose_device) 1969 hpsa_remove_device(h, removed[i]); 1970 kfree(removed[i]); 1971 removed[i] = NULL; 1972 } 1973 1974 /* Notify scsi mid layer of any added devices */ 1975 for (i = 0; i < nadded; i++) { 1976 int rc = 0; 1977 1978 if (added[i] == NULL) 1979 continue; 1980 if (!(added[i]->expose_device)) 1981 continue; 1982 rc = hpsa_add_device(h, added[i]); 1983 if (!rc) 1984 continue; 1985 dev_warn(&h->pdev->dev, 1986 "addition failed %d, device not added.", rc); 1987 /* now we have to remove it from h->dev, 1988 * since it didn't get added to scsi mid layer 1989 */ 1990 fixup_botched_add(h, added[i]); 1991 h->drv_req_rescan = 1; 1992 } 1993 1994 free_and_out: 1995 kfree(added); 1996 kfree(removed); 1997 } 1998 1999 /* 2000 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2001 * Assume's h->devlock is held. 2002 */ 2003 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2004 int bus, int target, int lun) 2005 { 2006 int i; 2007 struct hpsa_scsi_dev_t *sd; 2008 2009 for (i = 0; i < h->ndevices; i++) { 2010 sd = h->dev[i]; 2011 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2012 return sd; 2013 } 2014 return NULL; 2015 } 2016 2017 static int hpsa_slave_alloc(struct scsi_device *sdev) 2018 { 2019 struct hpsa_scsi_dev_t *sd = NULL; 2020 unsigned long flags; 2021 struct ctlr_info *h; 2022 2023 h = sdev_to_hba(sdev); 2024 spin_lock_irqsave(&h->devlock, flags); 2025 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2026 struct scsi_target *starget; 2027 struct sas_rphy *rphy; 2028 2029 starget = scsi_target(sdev); 2030 rphy = target_to_rphy(starget); 2031 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2032 if (sd) { 2033 sd->target = sdev_id(sdev); 2034 sd->lun = sdev->lun; 2035 } 2036 } 2037 if (!sd) 2038 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2039 sdev_id(sdev), sdev->lun); 2040 2041 if (sd && sd->expose_device) { 2042 atomic_set(&sd->ioaccel_cmds_out, 0); 2043 sdev->hostdata = sd; 2044 } else 2045 sdev->hostdata = NULL; 2046 spin_unlock_irqrestore(&h->devlock, flags); 2047 return 0; 2048 } 2049 2050 /* configure scsi device based on internal per-device structure */ 2051 static int hpsa_slave_configure(struct scsi_device *sdev) 2052 { 2053 struct hpsa_scsi_dev_t *sd; 2054 int queue_depth; 2055 2056 sd = sdev->hostdata; 2057 sdev->no_uld_attach = !sd || !sd->expose_device; 2058 2059 if (sd) { 2060 if (sd->external) 2061 queue_depth = EXTERNAL_QD; 2062 else 2063 queue_depth = sd->queue_depth != 0 ? 2064 sd->queue_depth : sdev->host->can_queue; 2065 } else 2066 queue_depth = sdev->host->can_queue; 2067 2068 scsi_change_queue_depth(sdev, queue_depth); 2069 2070 return 0; 2071 } 2072 2073 static void hpsa_slave_destroy(struct scsi_device *sdev) 2074 { 2075 /* nothing to do. */ 2076 } 2077 2078 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2079 { 2080 int i; 2081 2082 if (!h->ioaccel2_cmd_sg_list) 2083 return; 2084 for (i = 0; i < h->nr_cmds; i++) { 2085 kfree(h->ioaccel2_cmd_sg_list[i]); 2086 h->ioaccel2_cmd_sg_list[i] = NULL; 2087 } 2088 kfree(h->ioaccel2_cmd_sg_list); 2089 h->ioaccel2_cmd_sg_list = NULL; 2090 } 2091 2092 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2093 { 2094 int i; 2095 2096 if (h->chainsize <= 0) 2097 return 0; 2098 2099 h->ioaccel2_cmd_sg_list = 2100 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2101 GFP_KERNEL); 2102 if (!h->ioaccel2_cmd_sg_list) 2103 return -ENOMEM; 2104 for (i = 0; i < h->nr_cmds; i++) { 2105 h->ioaccel2_cmd_sg_list[i] = 2106 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2107 h->maxsgentries, GFP_KERNEL); 2108 if (!h->ioaccel2_cmd_sg_list[i]) 2109 goto clean; 2110 } 2111 return 0; 2112 2113 clean: 2114 hpsa_free_ioaccel2_sg_chain_blocks(h); 2115 return -ENOMEM; 2116 } 2117 2118 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2119 { 2120 int i; 2121 2122 if (!h->cmd_sg_list) 2123 return; 2124 for (i = 0; i < h->nr_cmds; i++) { 2125 kfree(h->cmd_sg_list[i]); 2126 h->cmd_sg_list[i] = NULL; 2127 } 2128 kfree(h->cmd_sg_list); 2129 h->cmd_sg_list = NULL; 2130 } 2131 2132 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2133 { 2134 int i; 2135 2136 if (h->chainsize <= 0) 2137 return 0; 2138 2139 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2140 GFP_KERNEL); 2141 if (!h->cmd_sg_list) 2142 return -ENOMEM; 2143 2144 for (i = 0; i < h->nr_cmds; i++) { 2145 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2146 h->chainsize, GFP_KERNEL); 2147 if (!h->cmd_sg_list[i]) 2148 goto clean; 2149 2150 } 2151 return 0; 2152 2153 clean: 2154 hpsa_free_sg_chain_blocks(h); 2155 return -ENOMEM; 2156 } 2157 2158 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2159 struct io_accel2_cmd *cp, struct CommandList *c) 2160 { 2161 struct ioaccel2_sg_element *chain_block; 2162 u64 temp64; 2163 u32 chain_size; 2164 2165 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2166 chain_size = le32_to_cpu(cp->sg[0].length); 2167 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2168 PCI_DMA_TODEVICE); 2169 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2170 /* prevent subsequent unmapping */ 2171 cp->sg->address = 0; 2172 return -1; 2173 } 2174 cp->sg->address = cpu_to_le64(temp64); 2175 return 0; 2176 } 2177 2178 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2179 struct io_accel2_cmd *cp) 2180 { 2181 struct ioaccel2_sg_element *chain_sg; 2182 u64 temp64; 2183 u32 chain_size; 2184 2185 chain_sg = cp->sg; 2186 temp64 = le64_to_cpu(chain_sg->address); 2187 chain_size = le32_to_cpu(cp->sg[0].length); 2188 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2189 } 2190 2191 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2192 struct CommandList *c) 2193 { 2194 struct SGDescriptor *chain_sg, *chain_block; 2195 u64 temp64; 2196 u32 chain_len; 2197 2198 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2199 chain_block = h->cmd_sg_list[c->cmdindex]; 2200 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2201 chain_len = sizeof(*chain_sg) * 2202 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2203 chain_sg->Len = cpu_to_le32(chain_len); 2204 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2205 PCI_DMA_TODEVICE); 2206 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2207 /* prevent subsequent unmapping */ 2208 chain_sg->Addr = cpu_to_le64(0); 2209 return -1; 2210 } 2211 chain_sg->Addr = cpu_to_le64(temp64); 2212 return 0; 2213 } 2214 2215 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2216 struct CommandList *c) 2217 { 2218 struct SGDescriptor *chain_sg; 2219 2220 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2221 return; 2222 2223 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2224 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2225 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2226 } 2227 2228 2229 /* Decode the various types of errors on ioaccel2 path. 2230 * Return 1 for any error that should generate a RAID path retry. 2231 * Return 0 for errors that don't require a RAID path retry. 2232 */ 2233 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2234 struct CommandList *c, 2235 struct scsi_cmnd *cmd, 2236 struct io_accel2_cmd *c2, 2237 struct hpsa_scsi_dev_t *dev) 2238 { 2239 int data_len; 2240 int retry = 0; 2241 u32 ioaccel2_resid = 0; 2242 2243 switch (c2->error_data.serv_response) { 2244 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2245 switch (c2->error_data.status) { 2246 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2247 break; 2248 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2249 cmd->result |= SAM_STAT_CHECK_CONDITION; 2250 if (c2->error_data.data_present != 2251 IOACCEL2_SENSE_DATA_PRESENT) { 2252 memset(cmd->sense_buffer, 0, 2253 SCSI_SENSE_BUFFERSIZE); 2254 break; 2255 } 2256 /* copy the sense data */ 2257 data_len = c2->error_data.sense_data_len; 2258 if (data_len > SCSI_SENSE_BUFFERSIZE) 2259 data_len = SCSI_SENSE_BUFFERSIZE; 2260 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2261 data_len = 2262 sizeof(c2->error_data.sense_data_buff); 2263 memcpy(cmd->sense_buffer, 2264 c2->error_data.sense_data_buff, data_len); 2265 retry = 1; 2266 break; 2267 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2268 retry = 1; 2269 break; 2270 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2271 retry = 1; 2272 break; 2273 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2274 retry = 1; 2275 break; 2276 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2277 retry = 1; 2278 break; 2279 default: 2280 retry = 1; 2281 break; 2282 } 2283 break; 2284 case IOACCEL2_SERV_RESPONSE_FAILURE: 2285 switch (c2->error_data.status) { 2286 case IOACCEL2_STATUS_SR_IO_ERROR: 2287 case IOACCEL2_STATUS_SR_IO_ABORTED: 2288 case IOACCEL2_STATUS_SR_OVERRUN: 2289 retry = 1; 2290 break; 2291 case IOACCEL2_STATUS_SR_UNDERRUN: 2292 cmd->result = (DID_OK << 16); /* host byte */ 2293 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2294 ioaccel2_resid = get_unaligned_le32( 2295 &c2->error_data.resid_cnt[0]); 2296 scsi_set_resid(cmd, ioaccel2_resid); 2297 break; 2298 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2299 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2300 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2301 /* 2302 * Did an HBA disk disappear? We will eventually 2303 * get a state change event from the controller but 2304 * in the meantime, we need to tell the OS that the 2305 * HBA disk is no longer there and stop I/O 2306 * from going down. This allows the potential re-insert 2307 * of the disk to get the same device node. 2308 */ 2309 if (dev->physical_device && dev->expose_device) { 2310 cmd->result = DID_NO_CONNECT << 16; 2311 dev->removed = 1; 2312 h->drv_req_rescan = 1; 2313 dev_warn(&h->pdev->dev, 2314 "%s: device is gone!\n", __func__); 2315 } else 2316 /* 2317 * Retry by sending down the RAID path. 2318 * We will get an event from ctlr to 2319 * trigger rescan regardless. 2320 */ 2321 retry = 1; 2322 break; 2323 default: 2324 retry = 1; 2325 } 2326 break; 2327 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2328 break; 2329 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2330 break; 2331 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2332 retry = 1; 2333 break; 2334 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2335 break; 2336 default: 2337 retry = 1; 2338 break; 2339 } 2340 2341 return retry; /* retry on raid path? */ 2342 } 2343 2344 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2345 struct CommandList *c) 2346 { 2347 bool do_wake = false; 2348 2349 /* 2350 * Reset c->scsi_cmd here so that the reset handler will know 2351 * this command has completed. Then, check to see if the handler is 2352 * waiting for this command, and, if so, wake it. 2353 */ 2354 c->scsi_cmd = SCSI_CMD_IDLE; 2355 mb(); /* Declare command idle before checking for pending events. */ 2356 if (c->reset_pending) { 2357 unsigned long flags; 2358 struct hpsa_scsi_dev_t *dev; 2359 2360 /* 2361 * There appears to be a reset pending; lock the lock and 2362 * reconfirm. If so, then decrement the count of outstanding 2363 * commands and wake the reset command if this is the last one. 2364 */ 2365 spin_lock_irqsave(&h->lock, flags); 2366 dev = c->reset_pending; /* Re-fetch under the lock. */ 2367 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2368 do_wake = true; 2369 c->reset_pending = NULL; 2370 spin_unlock_irqrestore(&h->lock, flags); 2371 } 2372 2373 if (do_wake) 2374 wake_up_all(&h->event_sync_wait_queue); 2375 } 2376 2377 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2378 struct CommandList *c) 2379 { 2380 hpsa_cmd_resolve_events(h, c); 2381 cmd_tagged_free(h, c); 2382 } 2383 2384 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2385 struct CommandList *c, struct scsi_cmnd *cmd) 2386 { 2387 hpsa_cmd_resolve_and_free(h, c); 2388 if (cmd && cmd->scsi_done) 2389 cmd->scsi_done(cmd); 2390 } 2391 2392 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2393 { 2394 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2395 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2396 } 2397 2398 static void process_ioaccel2_completion(struct ctlr_info *h, 2399 struct CommandList *c, struct scsi_cmnd *cmd, 2400 struct hpsa_scsi_dev_t *dev) 2401 { 2402 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2403 2404 /* check for good status */ 2405 if (likely(c2->error_data.serv_response == 0 && 2406 c2->error_data.status == 0)) 2407 return hpsa_cmd_free_and_done(h, c, cmd); 2408 2409 /* 2410 * Any RAID offload error results in retry which will use 2411 * the normal I/O path so the controller can handle whatever's 2412 * wrong. 2413 */ 2414 if (is_logical_device(dev) && 2415 c2->error_data.serv_response == 2416 IOACCEL2_SERV_RESPONSE_FAILURE) { 2417 if (c2->error_data.status == 2418 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2419 dev->offload_enabled = 0; 2420 dev->offload_to_be_enabled = 0; 2421 } 2422 2423 return hpsa_retry_cmd(h, c); 2424 } 2425 2426 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2427 return hpsa_retry_cmd(h, c); 2428 2429 return hpsa_cmd_free_and_done(h, c, cmd); 2430 } 2431 2432 /* Returns 0 on success, < 0 otherwise. */ 2433 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2434 struct CommandList *cp) 2435 { 2436 u8 tmf_status = cp->err_info->ScsiStatus; 2437 2438 switch (tmf_status) { 2439 case CISS_TMF_COMPLETE: 2440 /* 2441 * CISS_TMF_COMPLETE never happens, instead, 2442 * ei->CommandStatus == 0 for this case. 2443 */ 2444 case CISS_TMF_SUCCESS: 2445 return 0; 2446 case CISS_TMF_INVALID_FRAME: 2447 case CISS_TMF_NOT_SUPPORTED: 2448 case CISS_TMF_FAILED: 2449 case CISS_TMF_WRONG_LUN: 2450 case CISS_TMF_OVERLAPPED_TAG: 2451 break; 2452 default: 2453 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2454 tmf_status); 2455 break; 2456 } 2457 return -tmf_status; 2458 } 2459 2460 static void complete_scsi_command(struct CommandList *cp) 2461 { 2462 struct scsi_cmnd *cmd; 2463 struct ctlr_info *h; 2464 struct ErrorInfo *ei; 2465 struct hpsa_scsi_dev_t *dev; 2466 struct io_accel2_cmd *c2; 2467 2468 u8 sense_key; 2469 u8 asc; /* additional sense code */ 2470 u8 ascq; /* additional sense code qualifier */ 2471 unsigned long sense_data_size; 2472 2473 ei = cp->err_info; 2474 cmd = cp->scsi_cmd; 2475 h = cp->h; 2476 2477 if (!cmd->device) { 2478 cmd->result = DID_NO_CONNECT << 16; 2479 return hpsa_cmd_free_and_done(h, cp, cmd); 2480 } 2481 2482 dev = cmd->device->hostdata; 2483 if (!dev) { 2484 cmd->result = DID_NO_CONNECT << 16; 2485 return hpsa_cmd_free_and_done(h, cp, cmd); 2486 } 2487 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2488 2489 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2490 if ((cp->cmd_type == CMD_SCSI) && 2491 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2492 hpsa_unmap_sg_chain_block(h, cp); 2493 2494 if ((cp->cmd_type == CMD_IOACCEL2) && 2495 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2496 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2497 2498 cmd->result = (DID_OK << 16); /* host byte */ 2499 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2500 2501 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2502 if (dev->physical_device && dev->expose_device && 2503 dev->removed) { 2504 cmd->result = DID_NO_CONNECT << 16; 2505 return hpsa_cmd_free_and_done(h, cp, cmd); 2506 } 2507 if (likely(cp->phys_disk != NULL)) 2508 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2509 } 2510 2511 /* 2512 * We check for lockup status here as it may be set for 2513 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2514 * fail_all_oustanding_cmds() 2515 */ 2516 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2517 /* DID_NO_CONNECT will prevent a retry */ 2518 cmd->result = DID_NO_CONNECT << 16; 2519 return hpsa_cmd_free_and_done(h, cp, cmd); 2520 } 2521 2522 if ((unlikely(hpsa_is_pending_event(cp)))) 2523 if (cp->reset_pending) 2524 return hpsa_cmd_free_and_done(h, cp, cmd); 2525 2526 if (cp->cmd_type == CMD_IOACCEL2) 2527 return process_ioaccel2_completion(h, cp, cmd, dev); 2528 2529 scsi_set_resid(cmd, ei->ResidualCnt); 2530 if (ei->CommandStatus == 0) 2531 return hpsa_cmd_free_and_done(h, cp, cmd); 2532 2533 /* For I/O accelerator commands, copy over some fields to the normal 2534 * CISS header used below for error handling. 2535 */ 2536 if (cp->cmd_type == CMD_IOACCEL1) { 2537 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2538 cp->Header.SGList = scsi_sg_count(cmd); 2539 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2540 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2541 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2542 cp->Header.tag = c->tag; 2543 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2544 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2545 2546 /* Any RAID offload error results in retry which will use 2547 * the normal I/O path so the controller can handle whatever's 2548 * wrong. 2549 */ 2550 if (is_logical_device(dev)) { 2551 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2552 dev->offload_enabled = 0; 2553 return hpsa_retry_cmd(h, cp); 2554 } 2555 } 2556 2557 /* an error has occurred */ 2558 switch (ei->CommandStatus) { 2559 2560 case CMD_TARGET_STATUS: 2561 cmd->result |= ei->ScsiStatus; 2562 /* copy the sense data */ 2563 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2564 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2565 else 2566 sense_data_size = sizeof(ei->SenseInfo); 2567 if (ei->SenseLen < sense_data_size) 2568 sense_data_size = ei->SenseLen; 2569 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2570 if (ei->ScsiStatus) 2571 decode_sense_data(ei->SenseInfo, sense_data_size, 2572 &sense_key, &asc, &ascq); 2573 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2574 if (sense_key == ABORTED_COMMAND) { 2575 cmd->result |= DID_SOFT_ERROR << 16; 2576 break; 2577 } 2578 break; 2579 } 2580 /* Problem was not a check condition 2581 * Pass it up to the upper layers... 2582 */ 2583 if (ei->ScsiStatus) { 2584 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2585 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2586 "Returning result: 0x%x\n", 2587 cp, ei->ScsiStatus, 2588 sense_key, asc, ascq, 2589 cmd->result); 2590 } else { /* scsi status is zero??? How??? */ 2591 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2592 "Returning no connection.\n", cp), 2593 2594 /* Ordinarily, this case should never happen, 2595 * but there is a bug in some released firmware 2596 * revisions that allows it to happen if, for 2597 * example, a 4100 backplane loses power and 2598 * the tape drive is in it. We assume that 2599 * it's a fatal error of some kind because we 2600 * can't show that it wasn't. We will make it 2601 * look like selection timeout since that is 2602 * the most common reason for this to occur, 2603 * and it's severe enough. 2604 */ 2605 2606 cmd->result = DID_NO_CONNECT << 16; 2607 } 2608 break; 2609 2610 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2611 break; 2612 case CMD_DATA_OVERRUN: 2613 dev_warn(&h->pdev->dev, 2614 "CDB %16phN data overrun\n", cp->Request.CDB); 2615 break; 2616 case CMD_INVALID: { 2617 /* print_bytes(cp, sizeof(*cp), 1, 0); 2618 print_cmd(cp); */ 2619 /* We get CMD_INVALID if you address a non-existent device 2620 * instead of a selection timeout (no response). You will 2621 * see this if you yank out a drive, then try to access it. 2622 * This is kind of a shame because it means that any other 2623 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2624 * missing target. */ 2625 cmd->result = DID_NO_CONNECT << 16; 2626 } 2627 break; 2628 case CMD_PROTOCOL_ERR: 2629 cmd->result = DID_ERROR << 16; 2630 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2631 cp->Request.CDB); 2632 break; 2633 case CMD_HARDWARE_ERR: 2634 cmd->result = DID_ERROR << 16; 2635 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2636 cp->Request.CDB); 2637 break; 2638 case CMD_CONNECTION_LOST: 2639 cmd->result = DID_ERROR << 16; 2640 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2641 cp->Request.CDB); 2642 break; 2643 case CMD_ABORTED: 2644 cmd->result = DID_ABORT << 16; 2645 break; 2646 case CMD_ABORT_FAILED: 2647 cmd->result = DID_ERROR << 16; 2648 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2649 cp->Request.CDB); 2650 break; 2651 case CMD_UNSOLICITED_ABORT: 2652 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2653 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2654 cp->Request.CDB); 2655 break; 2656 case CMD_TIMEOUT: 2657 cmd->result = DID_TIME_OUT << 16; 2658 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2659 cp->Request.CDB); 2660 break; 2661 case CMD_UNABORTABLE: 2662 cmd->result = DID_ERROR << 16; 2663 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2664 break; 2665 case CMD_TMF_STATUS: 2666 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2667 cmd->result = DID_ERROR << 16; 2668 break; 2669 case CMD_IOACCEL_DISABLED: 2670 /* This only handles the direct pass-through case since RAID 2671 * offload is handled above. Just attempt a retry. 2672 */ 2673 cmd->result = DID_SOFT_ERROR << 16; 2674 dev_warn(&h->pdev->dev, 2675 "cp %p had HP SSD Smart Path error\n", cp); 2676 break; 2677 default: 2678 cmd->result = DID_ERROR << 16; 2679 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2680 cp, ei->CommandStatus); 2681 } 2682 2683 return hpsa_cmd_free_and_done(h, cp, cmd); 2684 } 2685 2686 static void hpsa_pci_unmap(struct pci_dev *pdev, 2687 struct CommandList *c, int sg_used, int data_direction) 2688 { 2689 int i; 2690 2691 for (i = 0; i < sg_used; i++) 2692 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2693 le32_to_cpu(c->SG[i].Len), 2694 data_direction); 2695 } 2696 2697 static int hpsa_map_one(struct pci_dev *pdev, 2698 struct CommandList *cp, 2699 unsigned char *buf, 2700 size_t buflen, 2701 int data_direction) 2702 { 2703 u64 addr64; 2704 2705 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2706 cp->Header.SGList = 0; 2707 cp->Header.SGTotal = cpu_to_le16(0); 2708 return 0; 2709 } 2710 2711 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2712 if (dma_mapping_error(&pdev->dev, addr64)) { 2713 /* Prevent subsequent unmap of something never mapped */ 2714 cp->Header.SGList = 0; 2715 cp->Header.SGTotal = cpu_to_le16(0); 2716 return -1; 2717 } 2718 cp->SG[0].Addr = cpu_to_le64(addr64); 2719 cp->SG[0].Len = cpu_to_le32(buflen); 2720 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2721 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2722 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2723 return 0; 2724 } 2725 2726 #define NO_TIMEOUT ((unsigned long) -1) 2727 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2728 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2729 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2730 { 2731 DECLARE_COMPLETION_ONSTACK(wait); 2732 2733 c->waiting = &wait; 2734 __enqueue_cmd_and_start_io(h, c, reply_queue); 2735 if (timeout_msecs == NO_TIMEOUT) { 2736 /* TODO: get rid of this no-timeout thing */ 2737 wait_for_completion_io(&wait); 2738 return IO_OK; 2739 } 2740 if (!wait_for_completion_io_timeout(&wait, 2741 msecs_to_jiffies(timeout_msecs))) { 2742 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2743 return -ETIMEDOUT; 2744 } 2745 return IO_OK; 2746 } 2747 2748 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2749 int reply_queue, unsigned long timeout_msecs) 2750 { 2751 if (unlikely(lockup_detected(h))) { 2752 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2753 return IO_OK; 2754 } 2755 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2756 } 2757 2758 static u32 lockup_detected(struct ctlr_info *h) 2759 { 2760 int cpu; 2761 u32 rc, *lockup_detected; 2762 2763 cpu = get_cpu(); 2764 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2765 rc = *lockup_detected; 2766 put_cpu(); 2767 return rc; 2768 } 2769 2770 #define MAX_DRIVER_CMD_RETRIES 25 2771 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2772 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2773 { 2774 int backoff_time = 10, retry_count = 0; 2775 int rc; 2776 2777 do { 2778 memset(c->err_info, 0, sizeof(*c->err_info)); 2779 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2780 timeout_msecs); 2781 if (rc) 2782 break; 2783 retry_count++; 2784 if (retry_count > 3) { 2785 msleep(backoff_time); 2786 if (backoff_time < 1000) 2787 backoff_time *= 2; 2788 } 2789 } while ((check_for_unit_attention(h, c) || 2790 check_for_busy(h, c)) && 2791 retry_count <= MAX_DRIVER_CMD_RETRIES); 2792 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2793 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2794 rc = -EIO; 2795 return rc; 2796 } 2797 2798 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2799 struct CommandList *c) 2800 { 2801 const u8 *cdb = c->Request.CDB; 2802 const u8 *lun = c->Header.LUN.LunAddrBytes; 2803 2804 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2805 txt, lun, cdb); 2806 } 2807 2808 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2809 struct CommandList *cp) 2810 { 2811 const struct ErrorInfo *ei = cp->err_info; 2812 struct device *d = &cp->h->pdev->dev; 2813 u8 sense_key, asc, ascq; 2814 int sense_len; 2815 2816 switch (ei->CommandStatus) { 2817 case CMD_TARGET_STATUS: 2818 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2819 sense_len = sizeof(ei->SenseInfo); 2820 else 2821 sense_len = ei->SenseLen; 2822 decode_sense_data(ei->SenseInfo, sense_len, 2823 &sense_key, &asc, &ascq); 2824 hpsa_print_cmd(h, "SCSI status", cp); 2825 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2826 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2827 sense_key, asc, ascq); 2828 else 2829 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2830 if (ei->ScsiStatus == 0) 2831 dev_warn(d, "SCSI status is abnormally zero. " 2832 "(probably indicates selection timeout " 2833 "reported incorrectly due to a known " 2834 "firmware bug, circa July, 2001.)\n"); 2835 break; 2836 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2837 break; 2838 case CMD_DATA_OVERRUN: 2839 hpsa_print_cmd(h, "overrun condition", cp); 2840 break; 2841 case CMD_INVALID: { 2842 /* controller unfortunately reports SCSI passthru's 2843 * to non-existent targets as invalid commands. 2844 */ 2845 hpsa_print_cmd(h, "invalid command", cp); 2846 dev_warn(d, "probably means device no longer present\n"); 2847 } 2848 break; 2849 case CMD_PROTOCOL_ERR: 2850 hpsa_print_cmd(h, "protocol error", cp); 2851 break; 2852 case CMD_HARDWARE_ERR: 2853 hpsa_print_cmd(h, "hardware error", cp); 2854 break; 2855 case CMD_CONNECTION_LOST: 2856 hpsa_print_cmd(h, "connection lost", cp); 2857 break; 2858 case CMD_ABORTED: 2859 hpsa_print_cmd(h, "aborted", cp); 2860 break; 2861 case CMD_ABORT_FAILED: 2862 hpsa_print_cmd(h, "abort failed", cp); 2863 break; 2864 case CMD_UNSOLICITED_ABORT: 2865 hpsa_print_cmd(h, "unsolicited abort", cp); 2866 break; 2867 case CMD_TIMEOUT: 2868 hpsa_print_cmd(h, "timed out", cp); 2869 break; 2870 case CMD_UNABORTABLE: 2871 hpsa_print_cmd(h, "unabortable", cp); 2872 break; 2873 case CMD_CTLR_LOCKUP: 2874 hpsa_print_cmd(h, "controller lockup detected", cp); 2875 break; 2876 default: 2877 hpsa_print_cmd(h, "unknown status", cp); 2878 dev_warn(d, "Unknown command status %x\n", 2879 ei->CommandStatus); 2880 } 2881 } 2882 2883 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2884 u16 page, unsigned char *buf, 2885 unsigned char bufsize) 2886 { 2887 int rc = IO_OK; 2888 struct CommandList *c; 2889 struct ErrorInfo *ei; 2890 2891 c = cmd_alloc(h); 2892 2893 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2894 page, scsi3addr, TYPE_CMD)) { 2895 rc = -1; 2896 goto out; 2897 } 2898 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2899 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2900 if (rc) 2901 goto out; 2902 ei = c->err_info; 2903 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2904 hpsa_scsi_interpret_error(h, c); 2905 rc = -1; 2906 } 2907 out: 2908 cmd_free(h, c); 2909 return rc; 2910 } 2911 2912 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2913 u8 reset_type, int reply_queue) 2914 { 2915 int rc = IO_OK; 2916 struct CommandList *c; 2917 struct ErrorInfo *ei; 2918 2919 c = cmd_alloc(h); 2920 2921 2922 /* fill_cmd can't fail here, no data buffer to map. */ 2923 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2924 scsi3addr, TYPE_MSG); 2925 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 2926 if (rc) { 2927 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2928 goto out; 2929 } 2930 /* no unmap needed here because no data xfer. */ 2931 2932 ei = c->err_info; 2933 if (ei->CommandStatus != 0) { 2934 hpsa_scsi_interpret_error(h, c); 2935 rc = -1; 2936 } 2937 out: 2938 cmd_free(h, c); 2939 return rc; 2940 } 2941 2942 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2943 struct hpsa_scsi_dev_t *dev, 2944 unsigned char *scsi3addr) 2945 { 2946 int i; 2947 bool match = false; 2948 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2949 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2950 2951 if (hpsa_is_cmd_idle(c)) 2952 return false; 2953 2954 switch (c->cmd_type) { 2955 case CMD_SCSI: 2956 case CMD_IOCTL_PEND: 2957 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2958 sizeof(c->Header.LUN.LunAddrBytes)); 2959 break; 2960 2961 case CMD_IOACCEL1: 2962 case CMD_IOACCEL2: 2963 if (c->phys_disk == dev) { 2964 /* HBA mode match */ 2965 match = true; 2966 } else { 2967 /* Possible RAID mode -- check each phys dev. */ 2968 /* FIXME: Do we need to take out a lock here? If 2969 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2970 * instead. */ 2971 for (i = 0; i < dev->nphysical_disks && !match; i++) { 2972 /* FIXME: an alternate test might be 2973 * 2974 * match = dev->phys_disk[i]->ioaccel_handle 2975 * == c2->scsi_nexus; */ 2976 match = dev->phys_disk[i] == c->phys_disk; 2977 } 2978 } 2979 break; 2980 2981 case IOACCEL2_TMF: 2982 for (i = 0; i < dev->nphysical_disks && !match; i++) { 2983 match = dev->phys_disk[i]->ioaccel_handle == 2984 le32_to_cpu(ac->it_nexus); 2985 } 2986 break; 2987 2988 case 0: /* The command is in the middle of being initialized. */ 2989 match = false; 2990 break; 2991 2992 default: 2993 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2994 c->cmd_type); 2995 BUG(); 2996 } 2997 2998 return match; 2999 } 3000 3001 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3002 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3003 { 3004 int i; 3005 int rc = 0; 3006 3007 /* We can really only handle one reset at a time */ 3008 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3009 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3010 return -EINTR; 3011 } 3012 3013 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3014 3015 for (i = 0; i < h->nr_cmds; i++) { 3016 struct CommandList *c = h->cmd_pool + i; 3017 int refcount = atomic_inc_return(&c->refcount); 3018 3019 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3020 unsigned long flags; 3021 3022 /* 3023 * Mark the target command as having a reset pending, 3024 * then lock a lock so that the command cannot complete 3025 * while we're considering it. If the command is not 3026 * idle then count it; otherwise revoke the event. 3027 */ 3028 c->reset_pending = dev; 3029 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3030 if (!hpsa_is_cmd_idle(c)) 3031 atomic_inc(&dev->reset_cmds_out); 3032 else 3033 c->reset_pending = NULL; 3034 spin_unlock_irqrestore(&h->lock, flags); 3035 } 3036 3037 cmd_free(h, c); 3038 } 3039 3040 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3041 if (!rc) 3042 wait_event(h->event_sync_wait_queue, 3043 atomic_read(&dev->reset_cmds_out) == 0 || 3044 lockup_detected(h)); 3045 3046 if (unlikely(lockup_detected(h))) { 3047 dev_warn(&h->pdev->dev, 3048 "Controller lockup detected during reset wait\n"); 3049 rc = -ENODEV; 3050 } 3051 3052 if (unlikely(rc)) 3053 atomic_set(&dev->reset_cmds_out, 0); 3054 else 3055 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3056 3057 mutex_unlock(&h->reset_mutex); 3058 return rc; 3059 } 3060 3061 static void hpsa_get_raid_level(struct ctlr_info *h, 3062 unsigned char *scsi3addr, unsigned char *raid_level) 3063 { 3064 int rc; 3065 unsigned char *buf; 3066 3067 *raid_level = RAID_UNKNOWN; 3068 buf = kzalloc(64, GFP_KERNEL); 3069 if (!buf) 3070 return; 3071 3072 if (!hpsa_vpd_page_supported(h, scsi3addr, 3073 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3074 goto exit; 3075 3076 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3077 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3078 3079 if (rc == 0) 3080 *raid_level = buf[8]; 3081 if (*raid_level > RAID_UNKNOWN) 3082 *raid_level = RAID_UNKNOWN; 3083 exit: 3084 kfree(buf); 3085 return; 3086 } 3087 3088 #define HPSA_MAP_DEBUG 3089 #ifdef HPSA_MAP_DEBUG 3090 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3091 struct raid_map_data *map_buff) 3092 { 3093 struct raid_map_disk_data *dd = &map_buff->data[0]; 3094 int map, row, col; 3095 u16 map_cnt, row_cnt, disks_per_row; 3096 3097 if (rc != 0) 3098 return; 3099 3100 /* Show details only if debugging has been activated. */ 3101 if (h->raid_offload_debug < 2) 3102 return; 3103 3104 dev_info(&h->pdev->dev, "structure_size = %u\n", 3105 le32_to_cpu(map_buff->structure_size)); 3106 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3107 le32_to_cpu(map_buff->volume_blk_size)); 3108 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3109 le64_to_cpu(map_buff->volume_blk_cnt)); 3110 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3111 map_buff->phys_blk_shift); 3112 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3113 map_buff->parity_rotation_shift); 3114 dev_info(&h->pdev->dev, "strip_size = %u\n", 3115 le16_to_cpu(map_buff->strip_size)); 3116 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3117 le64_to_cpu(map_buff->disk_starting_blk)); 3118 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3119 le64_to_cpu(map_buff->disk_blk_cnt)); 3120 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3121 le16_to_cpu(map_buff->data_disks_per_row)); 3122 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3123 le16_to_cpu(map_buff->metadata_disks_per_row)); 3124 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3125 le16_to_cpu(map_buff->row_cnt)); 3126 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3127 le16_to_cpu(map_buff->layout_map_count)); 3128 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3129 le16_to_cpu(map_buff->flags)); 3130 dev_info(&h->pdev->dev, "encryption = %s\n", 3131 le16_to_cpu(map_buff->flags) & 3132 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3133 dev_info(&h->pdev->dev, "dekindex = %u\n", 3134 le16_to_cpu(map_buff->dekindex)); 3135 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3136 for (map = 0; map < map_cnt; map++) { 3137 dev_info(&h->pdev->dev, "Map%u:\n", map); 3138 row_cnt = le16_to_cpu(map_buff->row_cnt); 3139 for (row = 0; row < row_cnt; row++) { 3140 dev_info(&h->pdev->dev, " Row%u:\n", row); 3141 disks_per_row = 3142 le16_to_cpu(map_buff->data_disks_per_row); 3143 for (col = 0; col < disks_per_row; col++, dd++) 3144 dev_info(&h->pdev->dev, 3145 " D%02u: h=0x%04x xor=%u,%u\n", 3146 col, dd->ioaccel_handle, 3147 dd->xor_mult[0], dd->xor_mult[1]); 3148 disks_per_row = 3149 le16_to_cpu(map_buff->metadata_disks_per_row); 3150 for (col = 0; col < disks_per_row; col++, dd++) 3151 dev_info(&h->pdev->dev, 3152 " M%02u: h=0x%04x xor=%u,%u\n", 3153 col, dd->ioaccel_handle, 3154 dd->xor_mult[0], dd->xor_mult[1]); 3155 } 3156 } 3157 } 3158 #else 3159 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3160 __attribute__((unused)) int rc, 3161 __attribute__((unused)) struct raid_map_data *map_buff) 3162 { 3163 } 3164 #endif 3165 3166 static int hpsa_get_raid_map(struct ctlr_info *h, 3167 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3168 { 3169 int rc = 0; 3170 struct CommandList *c; 3171 struct ErrorInfo *ei; 3172 3173 c = cmd_alloc(h); 3174 3175 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3176 sizeof(this_device->raid_map), 0, 3177 scsi3addr, TYPE_CMD)) { 3178 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3179 cmd_free(h, c); 3180 return -1; 3181 } 3182 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3183 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3184 if (rc) 3185 goto out; 3186 ei = c->err_info; 3187 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3188 hpsa_scsi_interpret_error(h, c); 3189 rc = -1; 3190 goto out; 3191 } 3192 cmd_free(h, c); 3193 3194 /* @todo in the future, dynamically allocate RAID map memory */ 3195 if (le32_to_cpu(this_device->raid_map.structure_size) > 3196 sizeof(this_device->raid_map)) { 3197 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3198 rc = -1; 3199 } 3200 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3201 return rc; 3202 out: 3203 cmd_free(h, c); 3204 return rc; 3205 } 3206 3207 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3208 unsigned char scsi3addr[], u16 bmic_device_index, 3209 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3210 { 3211 int rc = IO_OK; 3212 struct CommandList *c; 3213 struct ErrorInfo *ei; 3214 3215 c = cmd_alloc(h); 3216 3217 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3218 0, RAID_CTLR_LUNID, TYPE_CMD); 3219 if (rc) 3220 goto out; 3221 3222 c->Request.CDB[2] = bmic_device_index & 0xff; 3223 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3224 3225 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3226 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3227 if (rc) 3228 goto out; 3229 ei = c->err_info; 3230 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3231 hpsa_scsi_interpret_error(h, c); 3232 rc = -1; 3233 } 3234 out: 3235 cmd_free(h, c); 3236 return rc; 3237 } 3238 3239 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3240 struct bmic_identify_controller *buf, size_t bufsize) 3241 { 3242 int rc = IO_OK; 3243 struct CommandList *c; 3244 struct ErrorInfo *ei; 3245 3246 c = cmd_alloc(h); 3247 3248 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3249 0, RAID_CTLR_LUNID, TYPE_CMD); 3250 if (rc) 3251 goto out; 3252 3253 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3254 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3255 if (rc) 3256 goto out; 3257 ei = c->err_info; 3258 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3259 hpsa_scsi_interpret_error(h, c); 3260 rc = -1; 3261 } 3262 out: 3263 cmd_free(h, c); 3264 return rc; 3265 } 3266 3267 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3268 unsigned char scsi3addr[], u16 bmic_device_index, 3269 struct bmic_identify_physical_device *buf, size_t bufsize) 3270 { 3271 int rc = IO_OK; 3272 struct CommandList *c; 3273 struct ErrorInfo *ei; 3274 3275 c = cmd_alloc(h); 3276 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3277 0, RAID_CTLR_LUNID, TYPE_CMD); 3278 if (rc) 3279 goto out; 3280 3281 c->Request.CDB[2] = bmic_device_index & 0xff; 3282 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3283 3284 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3285 DEFAULT_TIMEOUT); 3286 ei = c->err_info; 3287 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3288 hpsa_scsi_interpret_error(h, c); 3289 rc = -1; 3290 } 3291 out: 3292 cmd_free(h, c); 3293 3294 return rc; 3295 } 3296 3297 /* 3298 * get enclosure information 3299 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3300 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3301 * Uses id_physical_device to determine the box_index. 3302 */ 3303 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3304 unsigned char *scsi3addr, 3305 struct ReportExtendedLUNdata *rlep, int rle_index, 3306 struct hpsa_scsi_dev_t *encl_dev) 3307 { 3308 int rc = -1; 3309 struct CommandList *c = NULL; 3310 struct ErrorInfo *ei = NULL; 3311 struct bmic_sense_storage_box_params *bssbp = NULL; 3312 struct bmic_identify_physical_device *id_phys = NULL; 3313 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3314 u16 bmic_device_index = 0; 3315 3316 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3317 3318 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3319 rc = IO_OK; 3320 goto out; 3321 } 3322 3323 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3324 rc = IO_OK; 3325 goto out; 3326 } 3327 3328 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3329 if (!bssbp) 3330 goto out; 3331 3332 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3333 if (!id_phys) 3334 goto out; 3335 3336 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3337 id_phys, sizeof(*id_phys)); 3338 if (rc) { 3339 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3340 __func__, encl_dev->external, bmic_device_index); 3341 goto out; 3342 } 3343 3344 c = cmd_alloc(h); 3345 3346 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3347 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3348 3349 if (rc) 3350 goto out; 3351 3352 if (id_phys->phys_connector[1] == 'E') 3353 c->Request.CDB[5] = id_phys->box_index; 3354 else 3355 c->Request.CDB[5] = 0; 3356 3357 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3358 DEFAULT_TIMEOUT); 3359 if (rc) 3360 goto out; 3361 3362 ei = c->err_info; 3363 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3364 rc = -1; 3365 goto out; 3366 } 3367 3368 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3369 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3370 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3371 3372 rc = IO_OK; 3373 out: 3374 kfree(bssbp); 3375 kfree(id_phys); 3376 3377 if (c) 3378 cmd_free(h, c); 3379 3380 if (rc != IO_OK) 3381 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3382 "Error, could not get enclosure information\n"); 3383 } 3384 3385 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3386 unsigned char *scsi3addr) 3387 { 3388 struct ReportExtendedLUNdata *physdev; 3389 u32 nphysicals; 3390 u64 sa = 0; 3391 int i; 3392 3393 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3394 if (!physdev) 3395 return 0; 3396 3397 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3398 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3399 kfree(physdev); 3400 return 0; 3401 } 3402 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3403 3404 for (i = 0; i < nphysicals; i++) 3405 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3406 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3407 break; 3408 } 3409 3410 kfree(physdev); 3411 3412 return sa; 3413 } 3414 3415 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3416 struct hpsa_scsi_dev_t *dev) 3417 { 3418 int rc; 3419 u64 sa = 0; 3420 3421 if (is_hba_lunid(scsi3addr)) { 3422 struct bmic_sense_subsystem_info *ssi; 3423 3424 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3425 if (!ssi) 3426 return; 3427 3428 rc = hpsa_bmic_sense_subsystem_information(h, 3429 scsi3addr, 0, ssi, sizeof(*ssi)); 3430 if (rc == 0) { 3431 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3432 h->sas_address = sa; 3433 } 3434 3435 kfree(ssi); 3436 } else 3437 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3438 3439 dev->sas_address = sa; 3440 } 3441 3442 /* Get a device id from inquiry page 0x83 */ 3443 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3444 unsigned char scsi3addr[], u8 page) 3445 { 3446 int rc; 3447 int i; 3448 int pages; 3449 unsigned char *buf, bufsize; 3450 3451 buf = kzalloc(256, GFP_KERNEL); 3452 if (!buf) 3453 return false; 3454 3455 /* Get the size of the page list first */ 3456 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3457 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3458 buf, HPSA_VPD_HEADER_SZ); 3459 if (rc != 0) 3460 goto exit_unsupported; 3461 pages = buf[3]; 3462 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3463 bufsize = pages + HPSA_VPD_HEADER_SZ; 3464 else 3465 bufsize = 255; 3466 3467 /* Get the whole VPD page list */ 3468 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3469 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3470 buf, bufsize); 3471 if (rc != 0) 3472 goto exit_unsupported; 3473 3474 pages = buf[3]; 3475 for (i = 1; i <= pages; i++) 3476 if (buf[3 + i] == page) 3477 goto exit_supported; 3478 exit_unsupported: 3479 kfree(buf); 3480 return false; 3481 exit_supported: 3482 kfree(buf); 3483 return true; 3484 } 3485 3486 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3487 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3488 { 3489 int rc; 3490 unsigned char *buf; 3491 u8 ioaccel_status; 3492 3493 this_device->offload_config = 0; 3494 this_device->offload_enabled = 0; 3495 this_device->offload_to_be_enabled = 0; 3496 3497 buf = kzalloc(64, GFP_KERNEL); 3498 if (!buf) 3499 return; 3500 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3501 goto out; 3502 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3503 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3504 if (rc != 0) 3505 goto out; 3506 3507 #define IOACCEL_STATUS_BYTE 4 3508 #define OFFLOAD_CONFIGURED_BIT 0x01 3509 #define OFFLOAD_ENABLED_BIT 0x02 3510 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3511 this_device->offload_config = 3512 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3513 if (this_device->offload_config) { 3514 this_device->offload_enabled = 3515 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3516 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3517 this_device->offload_enabled = 0; 3518 } 3519 this_device->offload_to_be_enabled = this_device->offload_enabled; 3520 out: 3521 kfree(buf); 3522 return; 3523 } 3524 3525 /* Get the device id from inquiry page 0x83 */ 3526 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3527 unsigned char *device_id, int index, int buflen) 3528 { 3529 int rc; 3530 unsigned char *buf; 3531 3532 /* Does controller have VPD for device id? */ 3533 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3534 return 1; /* not supported */ 3535 3536 buf = kzalloc(64, GFP_KERNEL); 3537 if (!buf) 3538 return -ENOMEM; 3539 3540 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3541 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3542 if (rc == 0) { 3543 if (buflen > 16) 3544 buflen = 16; 3545 memcpy(device_id, &buf[8], buflen); 3546 } 3547 3548 kfree(buf); 3549 3550 return rc; /*0 - got id, otherwise, didn't */ 3551 } 3552 3553 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3554 void *buf, int bufsize, 3555 int extended_response) 3556 { 3557 int rc = IO_OK; 3558 struct CommandList *c; 3559 unsigned char scsi3addr[8]; 3560 struct ErrorInfo *ei; 3561 3562 c = cmd_alloc(h); 3563 3564 /* address the controller */ 3565 memset(scsi3addr, 0, sizeof(scsi3addr)); 3566 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3567 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3568 rc = -1; 3569 goto out; 3570 } 3571 if (extended_response) 3572 c->Request.CDB[1] = extended_response; 3573 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3574 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3575 if (rc) 3576 goto out; 3577 ei = c->err_info; 3578 if (ei->CommandStatus != 0 && 3579 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3580 hpsa_scsi_interpret_error(h, c); 3581 rc = -1; 3582 } else { 3583 struct ReportLUNdata *rld = buf; 3584 3585 if (rld->extended_response_flag != extended_response) { 3586 dev_err(&h->pdev->dev, 3587 "report luns requested format %u, got %u\n", 3588 extended_response, 3589 rld->extended_response_flag); 3590 rc = -1; 3591 } 3592 } 3593 out: 3594 cmd_free(h, c); 3595 return rc; 3596 } 3597 3598 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3599 struct ReportExtendedLUNdata *buf, int bufsize) 3600 { 3601 int rc; 3602 struct ReportLUNdata *lbuf; 3603 3604 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3605 HPSA_REPORT_PHYS_EXTENDED); 3606 if (!rc || !hpsa_allow_any) 3607 return rc; 3608 3609 /* REPORT PHYS EXTENDED is not supported */ 3610 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3611 if (!lbuf) 3612 return -ENOMEM; 3613 3614 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3615 if (!rc) { 3616 int i; 3617 u32 nphys; 3618 3619 /* Copy ReportLUNdata header */ 3620 memcpy(buf, lbuf, 8); 3621 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3622 for (i = 0; i < nphys; i++) 3623 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3624 } 3625 kfree(lbuf); 3626 return rc; 3627 } 3628 3629 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3630 struct ReportLUNdata *buf, int bufsize) 3631 { 3632 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3633 } 3634 3635 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3636 int bus, int target, int lun) 3637 { 3638 device->bus = bus; 3639 device->target = target; 3640 device->lun = lun; 3641 } 3642 3643 /* Use VPD inquiry to get details of volume status */ 3644 static int hpsa_get_volume_status(struct ctlr_info *h, 3645 unsigned char scsi3addr[]) 3646 { 3647 int rc; 3648 int status; 3649 int size; 3650 unsigned char *buf; 3651 3652 buf = kzalloc(64, GFP_KERNEL); 3653 if (!buf) 3654 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3655 3656 /* Does controller have VPD for logical volume status? */ 3657 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3658 goto exit_failed; 3659 3660 /* Get the size of the VPD return buffer */ 3661 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3662 buf, HPSA_VPD_HEADER_SZ); 3663 if (rc != 0) 3664 goto exit_failed; 3665 size = buf[3]; 3666 3667 /* Now get the whole VPD buffer */ 3668 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3669 buf, size + HPSA_VPD_HEADER_SZ); 3670 if (rc != 0) 3671 goto exit_failed; 3672 status = buf[4]; /* status byte */ 3673 3674 kfree(buf); 3675 return status; 3676 exit_failed: 3677 kfree(buf); 3678 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3679 } 3680 3681 /* Determine offline status of a volume. 3682 * Return either: 3683 * 0 (not offline) 3684 * 0xff (offline for unknown reasons) 3685 * # (integer code indicating one of several NOT READY states 3686 * describing why a volume is to be kept offline) 3687 */ 3688 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3689 unsigned char scsi3addr[]) 3690 { 3691 struct CommandList *c; 3692 unsigned char *sense; 3693 u8 sense_key, asc, ascq; 3694 int sense_len; 3695 int rc, ldstat = 0; 3696 u16 cmd_status; 3697 u8 scsi_status; 3698 #define ASC_LUN_NOT_READY 0x04 3699 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3700 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3701 3702 c = cmd_alloc(h); 3703 3704 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3705 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3706 DEFAULT_TIMEOUT); 3707 if (rc) { 3708 cmd_free(h, c); 3709 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3710 } 3711 sense = c->err_info->SenseInfo; 3712 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3713 sense_len = sizeof(c->err_info->SenseInfo); 3714 else 3715 sense_len = c->err_info->SenseLen; 3716 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3717 cmd_status = c->err_info->CommandStatus; 3718 scsi_status = c->err_info->ScsiStatus; 3719 cmd_free(h, c); 3720 3721 /* Determine the reason for not ready state */ 3722 ldstat = hpsa_get_volume_status(h, scsi3addr); 3723 3724 /* Keep volume offline in certain cases: */ 3725 switch (ldstat) { 3726 case HPSA_LV_FAILED: 3727 case HPSA_LV_UNDERGOING_ERASE: 3728 case HPSA_LV_NOT_AVAILABLE: 3729 case HPSA_LV_UNDERGOING_RPI: 3730 case HPSA_LV_PENDING_RPI: 3731 case HPSA_LV_ENCRYPTED_NO_KEY: 3732 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3733 case HPSA_LV_UNDERGOING_ENCRYPTION: 3734 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3735 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3736 return ldstat; 3737 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3738 /* If VPD status page isn't available, 3739 * use ASC/ASCQ to determine state 3740 */ 3741 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3742 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3743 return ldstat; 3744 break; 3745 default: 3746 break; 3747 } 3748 return HPSA_LV_OK; 3749 } 3750 3751 static int hpsa_update_device_info(struct ctlr_info *h, 3752 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3753 unsigned char *is_OBDR_device) 3754 { 3755 3756 #define OBDR_SIG_OFFSET 43 3757 #define OBDR_TAPE_SIG "$DR-10" 3758 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3759 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3760 3761 unsigned char *inq_buff; 3762 unsigned char *obdr_sig; 3763 int rc = 0; 3764 3765 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3766 if (!inq_buff) { 3767 rc = -ENOMEM; 3768 goto bail_out; 3769 } 3770 3771 /* Do an inquiry to the device to see what it is. */ 3772 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3773 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3774 dev_err(&h->pdev->dev, 3775 "%s: inquiry failed, device will be skipped.\n", 3776 __func__); 3777 rc = HPSA_INQUIRY_FAILED; 3778 goto bail_out; 3779 } 3780 3781 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3782 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3783 3784 this_device->devtype = (inq_buff[0] & 0x1f); 3785 memcpy(this_device->scsi3addr, scsi3addr, 8); 3786 memcpy(this_device->vendor, &inq_buff[8], 3787 sizeof(this_device->vendor)); 3788 memcpy(this_device->model, &inq_buff[16], 3789 sizeof(this_device->model)); 3790 this_device->rev = inq_buff[2]; 3791 memset(this_device->device_id, 0, 3792 sizeof(this_device->device_id)); 3793 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3794 sizeof(this_device->device_id))) 3795 dev_err(&h->pdev->dev, 3796 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3797 h->ctlr, __func__, 3798 h->scsi_host->host_no, 3799 this_device->target, this_device->lun, 3800 scsi_device_type(this_device->devtype), 3801 this_device->model); 3802 3803 if ((this_device->devtype == TYPE_DISK || 3804 this_device->devtype == TYPE_ZBC) && 3805 is_logical_dev_addr_mode(scsi3addr)) { 3806 unsigned char volume_offline; 3807 3808 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3809 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3810 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3811 volume_offline = hpsa_volume_offline(h, scsi3addr); 3812 this_device->volume_offline = volume_offline; 3813 if (volume_offline == HPSA_LV_FAILED) { 3814 rc = HPSA_LV_FAILED; 3815 dev_err(&h->pdev->dev, 3816 "%s: LV failed, device will be skipped.\n", 3817 __func__); 3818 goto bail_out; 3819 } 3820 } else { 3821 this_device->raid_level = RAID_UNKNOWN; 3822 this_device->offload_config = 0; 3823 this_device->offload_enabled = 0; 3824 this_device->offload_to_be_enabled = 0; 3825 this_device->hba_ioaccel_enabled = 0; 3826 this_device->volume_offline = 0; 3827 this_device->queue_depth = h->nr_cmds; 3828 } 3829 3830 if (this_device->external) 3831 this_device->queue_depth = EXTERNAL_QD; 3832 3833 if (is_OBDR_device) { 3834 /* See if this is a One-Button-Disaster-Recovery device 3835 * by looking for "$DR-10" at offset 43 in inquiry data. 3836 */ 3837 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3838 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3839 strncmp(obdr_sig, OBDR_TAPE_SIG, 3840 OBDR_SIG_LEN) == 0); 3841 } 3842 kfree(inq_buff); 3843 return 0; 3844 3845 bail_out: 3846 kfree(inq_buff); 3847 return rc; 3848 } 3849 3850 /* 3851 * Helper function to assign bus, target, lun mapping of devices. 3852 * Logical drive target and lun are assigned at this time, but 3853 * physical device lun and target assignment are deferred (assigned 3854 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3855 */ 3856 static void figure_bus_target_lun(struct ctlr_info *h, 3857 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3858 { 3859 u32 lunid = get_unaligned_le32(lunaddrbytes); 3860 3861 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3862 /* physical device, target and lun filled in later */ 3863 if (is_hba_lunid(lunaddrbytes)) { 3864 int bus = HPSA_HBA_BUS; 3865 3866 if (!device->rev) 3867 bus = HPSA_LEGACY_HBA_BUS; 3868 hpsa_set_bus_target_lun(device, 3869 bus, 0, lunid & 0x3fff); 3870 } else 3871 /* defer target, lun assignment for physical devices */ 3872 hpsa_set_bus_target_lun(device, 3873 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3874 return; 3875 } 3876 /* It's a logical device */ 3877 if (device->external) { 3878 hpsa_set_bus_target_lun(device, 3879 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3880 lunid & 0x00ff); 3881 return; 3882 } 3883 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3884 0, lunid & 0x3fff); 3885 } 3886 3887 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 3888 int i, int nphysicals, int nlocal_logicals) 3889 { 3890 /* In report logicals, local logicals are listed first, 3891 * then any externals. 3892 */ 3893 int logicals_start = nphysicals + (raid_ctlr_position == 0); 3894 3895 if (i == raid_ctlr_position) 3896 return 0; 3897 3898 if (i < logicals_start) 3899 return 0; 3900 3901 /* i is in logicals range, but still within local logicals */ 3902 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 3903 return 0; 3904 3905 return 1; /* it's an external lun */ 3906 } 3907 3908 /* 3909 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3910 * logdev. The number of luns in physdev and logdev are returned in 3911 * *nphysicals and *nlogicals, respectively. 3912 * Returns 0 on success, -1 otherwise. 3913 */ 3914 static int hpsa_gather_lun_info(struct ctlr_info *h, 3915 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 3916 struct ReportLUNdata *logdev, u32 *nlogicals) 3917 { 3918 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3919 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3920 return -1; 3921 } 3922 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3923 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 3924 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 3925 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3926 *nphysicals = HPSA_MAX_PHYS_LUN; 3927 } 3928 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3929 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3930 return -1; 3931 } 3932 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3933 /* Reject Logicals in excess of our max capability. */ 3934 if (*nlogicals > HPSA_MAX_LUN) { 3935 dev_warn(&h->pdev->dev, 3936 "maximum logical LUNs (%d) exceeded. " 3937 "%d LUNs ignored.\n", HPSA_MAX_LUN, 3938 *nlogicals - HPSA_MAX_LUN); 3939 *nlogicals = HPSA_MAX_LUN; 3940 } 3941 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3942 dev_warn(&h->pdev->dev, 3943 "maximum logical + physical LUNs (%d) exceeded. " 3944 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3945 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3946 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3947 } 3948 return 0; 3949 } 3950 3951 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 3952 int i, int nphysicals, int nlogicals, 3953 struct ReportExtendedLUNdata *physdev_list, 3954 struct ReportLUNdata *logdev_list) 3955 { 3956 /* Helper function, figure out where the LUN ID info is coming from 3957 * given index i, lists of physical and logical devices, where in 3958 * the list the raid controller is supposed to appear (first or last) 3959 */ 3960 3961 int logicals_start = nphysicals + (raid_ctlr_position == 0); 3962 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3963 3964 if (i == raid_ctlr_position) 3965 return RAID_CTLR_LUNID; 3966 3967 if (i < logicals_start) 3968 return &physdev_list->LUN[i - 3969 (raid_ctlr_position == 0)].lunid[0]; 3970 3971 if (i < last_device) 3972 return &logdev_list->LUN[i - nphysicals - 3973 (raid_ctlr_position == 0)][0]; 3974 BUG(); 3975 return NULL; 3976 } 3977 3978 /* get physical drive ioaccel handle and queue depth */ 3979 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 3980 struct hpsa_scsi_dev_t *dev, 3981 struct ReportExtendedLUNdata *rlep, int rle_index, 3982 struct bmic_identify_physical_device *id_phys) 3983 { 3984 int rc; 3985 struct ext_report_lun_entry *rle; 3986 3987 rle = &rlep->LUN[rle_index]; 3988 3989 dev->ioaccel_handle = rle->ioaccel_handle; 3990 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3991 dev->hba_ioaccel_enabled = 1; 3992 memset(id_phys, 0, sizeof(*id_phys)); 3993 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3994 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 3995 sizeof(*id_phys)); 3996 if (!rc) 3997 /* Reserve space for FW operations */ 3998 #define DRIVE_CMDS_RESERVED_FOR_FW 2 3999 #define DRIVE_QUEUE_DEPTH 7 4000 dev->queue_depth = 4001 le16_to_cpu(id_phys->current_queue_depth_limit) - 4002 DRIVE_CMDS_RESERVED_FOR_FW; 4003 else 4004 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4005 } 4006 4007 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4008 struct ReportExtendedLUNdata *rlep, int rle_index, 4009 struct bmic_identify_physical_device *id_phys) 4010 { 4011 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4012 4013 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4014 this_device->hba_ioaccel_enabled = 1; 4015 4016 memcpy(&this_device->active_path_index, 4017 &id_phys->active_path_number, 4018 sizeof(this_device->active_path_index)); 4019 memcpy(&this_device->path_map, 4020 &id_phys->redundant_path_present_map, 4021 sizeof(this_device->path_map)); 4022 memcpy(&this_device->box, 4023 &id_phys->alternate_paths_phys_box_on_port, 4024 sizeof(this_device->box)); 4025 memcpy(&this_device->phys_connector, 4026 &id_phys->alternate_paths_phys_connector, 4027 sizeof(this_device->phys_connector)); 4028 memcpy(&this_device->bay, 4029 &id_phys->phys_bay_in_box, 4030 sizeof(this_device->bay)); 4031 } 4032 4033 /* get number of local logical disks. */ 4034 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4035 struct bmic_identify_controller *id_ctlr, 4036 u32 *nlocals) 4037 { 4038 int rc; 4039 4040 if (!id_ctlr) { 4041 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4042 __func__); 4043 return -ENOMEM; 4044 } 4045 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4046 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4047 if (!rc) 4048 if (id_ctlr->configured_logical_drive_count < 256) 4049 *nlocals = id_ctlr->configured_logical_drive_count; 4050 else 4051 *nlocals = le16_to_cpu( 4052 id_ctlr->extended_logical_unit_count); 4053 else 4054 *nlocals = -1; 4055 return rc; 4056 } 4057 4058 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4059 { 4060 struct bmic_identify_physical_device *id_phys; 4061 bool is_spare = false; 4062 int rc; 4063 4064 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4065 if (!id_phys) 4066 return false; 4067 4068 rc = hpsa_bmic_id_physical_device(h, 4069 lunaddrbytes, 4070 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4071 id_phys, sizeof(*id_phys)); 4072 if (rc == 0) 4073 is_spare = (id_phys->more_flags >> 6) & 0x01; 4074 4075 kfree(id_phys); 4076 return is_spare; 4077 } 4078 4079 #define RPL_DEV_FLAG_NON_DISK 0x1 4080 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4081 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4082 4083 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4084 4085 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4086 struct ext_report_lun_entry *rle) 4087 { 4088 u8 device_flags; 4089 u8 device_type; 4090 4091 if (!MASKED_DEVICE(lunaddrbytes)) 4092 return false; 4093 4094 device_flags = rle->device_flags; 4095 device_type = rle->device_type; 4096 4097 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4098 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4099 return false; 4100 return true; 4101 } 4102 4103 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4104 return false; 4105 4106 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4107 return false; 4108 4109 /* 4110 * Spares may be spun down, we do not want to 4111 * do an Inquiry to a RAID set spare drive as 4112 * that would have them spun up, that is a 4113 * performance hit because I/O to the RAID device 4114 * stops while the spin up occurs which can take 4115 * over 50 seconds. 4116 */ 4117 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4118 return true; 4119 4120 return false; 4121 } 4122 4123 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4124 { 4125 /* the idea here is we could get notified 4126 * that some devices have changed, so we do a report 4127 * physical luns and report logical luns cmd, and adjust 4128 * our list of devices accordingly. 4129 * 4130 * The scsi3addr's of devices won't change so long as the 4131 * adapter is not reset. That means we can rescan and 4132 * tell which devices we already know about, vs. new 4133 * devices, vs. disappearing devices. 4134 */ 4135 struct ReportExtendedLUNdata *physdev_list = NULL; 4136 struct ReportLUNdata *logdev_list = NULL; 4137 struct bmic_identify_physical_device *id_phys = NULL; 4138 struct bmic_identify_controller *id_ctlr = NULL; 4139 u32 nphysicals = 0; 4140 u32 nlogicals = 0; 4141 u32 nlocal_logicals = 0; 4142 u32 ndev_allocated = 0; 4143 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4144 int ncurrent = 0; 4145 int i, n_ext_target_devs, ndevs_to_allocate; 4146 int raid_ctlr_position; 4147 bool physical_device; 4148 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4149 4150 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4151 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4152 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4153 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4154 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4155 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4156 4157 if (!currentsd || !physdev_list || !logdev_list || 4158 !tmpdevice || !id_phys || !id_ctlr) { 4159 dev_err(&h->pdev->dev, "out of memory\n"); 4160 goto out; 4161 } 4162 memset(lunzerobits, 0, sizeof(lunzerobits)); 4163 4164 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4165 4166 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4167 logdev_list, &nlogicals)) { 4168 h->drv_req_rescan = 1; 4169 goto out; 4170 } 4171 4172 /* Set number of local logicals (non PTRAID) */ 4173 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4174 dev_warn(&h->pdev->dev, 4175 "%s: Can't determine number of local logical devices.\n", 4176 __func__); 4177 } 4178 4179 /* We might see up to the maximum number of logical and physical disks 4180 * plus external target devices, and a device for the local RAID 4181 * controller. 4182 */ 4183 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4184 4185 /* Allocate the per device structures */ 4186 for (i = 0; i < ndevs_to_allocate; i++) { 4187 if (i >= HPSA_MAX_DEVICES) { 4188 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4189 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4190 ndevs_to_allocate - HPSA_MAX_DEVICES); 4191 break; 4192 } 4193 4194 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4195 if (!currentsd[i]) { 4196 h->drv_req_rescan = 1; 4197 goto out; 4198 } 4199 ndev_allocated++; 4200 } 4201 4202 if (is_scsi_rev_5(h)) 4203 raid_ctlr_position = 0; 4204 else 4205 raid_ctlr_position = nphysicals + nlogicals; 4206 4207 /* adjust our table of devices */ 4208 n_ext_target_devs = 0; 4209 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4210 u8 *lunaddrbytes, is_OBDR = 0; 4211 int rc = 0; 4212 int phys_dev_index = i - (raid_ctlr_position == 0); 4213 bool skip_device = false; 4214 4215 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4216 4217 /* Figure out where the LUN ID info is coming from */ 4218 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4219 i, nphysicals, nlogicals, physdev_list, logdev_list); 4220 4221 /* Determine if this is a lun from an external target array */ 4222 tmpdevice->external = 4223 figure_external_status(h, raid_ctlr_position, i, 4224 nphysicals, nlocal_logicals); 4225 4226 /* 4227 * Skip over some devices such as a spare. 4228 */ 4229 if (!tmpdevice->external && physical_device) { 4230 skip_device = hpsa_skip_device(h, lunaddrbytes, 4231 &physdev_list->LUN[phys_dev_index]); 4232 if (skip_device) 4233 continue; 4234 } 4235 4236 /* Get device type, vendor, model, device id */ 4237 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4238 &is_OBDR); 4239 if (rc == -ENOMEM) { 4240 dev_warn(&h->pdev->dev, 4241 "Out of memory, rescan deferred.\n"); 4242 h->drv_req_rescan = 1; 4243 goto out; 4244 } 4245 if (rc) { 4246 h->drv_req_rescan = 1; 4247 continue; 4248 } 4249 4250 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4251 this_device = currentsd[ncurrent]; 4252 4253 /* Turn on discovery_polling if there are ext target devices. 4254 * Event-based change notification is unreliable for those. 4255 */ 4256 if (!h->discovery_polling) { 4257 if (tmpdevice->external) { 4258 h->discovery_polling = 1; 4259 dev_info(&h->pdev->dev, 4260 "External target, activate discovery polling.\n"); 4261 } 4262 } 4263 4264 4265 *this_device = *tmpdevice; 4266 this_device->physical_device = physical_device; 4267 4268 /* 4269 * Expose all devices except for physical devices that 4270 * are masked. 4271 */ 4272 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4273 this_device->expose_device = 0; 4274 else 4275 this_device->expose_device = 1; 4276 4277 4278 /* 4279 * Get the SAS address for physical devices that are exposed. 4280 */ 4281 if (this_device->physical_device && this_device->expose_device) 4282 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4283 4284 switch (this_device->devtype) { 4285 case TYPE_ROM: 4286 /* We don't *really* support actual CD-ROM devices, 4287 * just "One Button Disaster Recovery" tape drive 4288 * which temporarily pretends to be a CD-ROM drive. 4289 * So we check that the device is really an OBDR tape 4290 * device by checking for "$DR-10" in bytes 43-48 of 4291 * the inquiry data. 4292 */ 4293 if (is_OBDR) 4294 ncurrent++; 4295 break; 4296 case TYPE_DISK: 4297 case TYPE_ZBC: 4298 if (this_device->physical_device) { 4299 /* The disk is in HBA mode. */ 4300 /* Never use RAID mapper in HBA mode. */ 4301 this_device->offload_enabled = 0; 4302 hpsa_get_ioaccel_drive_info(h, this_device, 4303 physdev_list, phys_dev_index, id_phys); 4304 hpsa_get_path_info(this_device, 4305 physdev_list, phys_dev_index, id_phys); 4306 } 4307 ncurrent++; 4308 break; 4309 case TYPE_TAPE: 4310 case TYPE_MEDIUM_CHANGER: 4311 ncurrent++; 4312 break; 4313 case TYPE_ENCLOSURE: 4314 if (!this_device->external) 4315 hpsa_get_enclosure_info(h, lunaddrbytes, 4316 physdev_list, phys_dev_index, 4317 this_device); 4318 ncurrent++; 4319 break; 4320 case TYPE_RAID: 4321 /* Only present the Smartarray HBA as a RAID controller. 4322 * If it's a RAID controller other than the HBA itself 4323 * (an external RAID controller, MSA500 or similar) 4324 * don't present it. 4325 */ 4326 if (!is_hba_lunid(lunaddrbytes)) 4327 break; 4328 ncurrent++; 4329 break; 4330 default: 4331 break; 4332 } 4333 if (ncurrent >= HPSA_MAX_DEVICES) 4334 break; 4335 } 4336 4337 if (h->sas_host == NULL) { 4338 int rc = 0; 4339 4340 rc = hpsa_add_sas_host(h); 4341 if (rc) { 4342 dev_warn(&h->pdev->dev, 4343 "Could not add sas host %d\n", rc); 4344 goto out; 4345 } 4346 } 4347 4348 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4349 out: 4350 kfree(tmpdevice); 4351 for (i = 0; i < ndev_allocated; i++) 4352 kfree(currentsd[i]); 4353 kfree(currentsd); 4354 kfree(physdev_list); 4355 kfree(logdev_list); 4356 kfree(id_ctlr); 4357 kfree(id_phys); 4358 } 4359 4360 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4361 struct scatterlist *sg) 4362 { 4363 u64 addr64 = (u64) sg_dma_address(sg); 4364 unsigned int len = sg_dma_len(sg); 4365 4366 desc->Addr = cpu_to_le64(addr64); 4367 desc->Len = cpu_to_le32(len); 4368 desc->Ext = 0; 4369 } 4370 4371 /* 4372 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4373 * dma mapping and fills in the scatter gather entries of the 4374 * hpsa command, cp. 4375 */ 4376 static int hpsa_scatter_gather(struct ctlr_info *h, 4377 struct CommandList *cp, 4378 struct scsi_cmnd *cmd) 4379 { 4380 struct scatterlist *sg; 4381 int use_sg, i, sg_limit, chained, last_sg; 4382 struct SGDescriptor *curr_sg; 4383 4384 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4385 4386 use_sg = scsi_dma_map(cmd); 4387 if (use_sg < 0) 4388 return use_sg; 4389 4390 if (!use_sg) 4391 goto sglist_finished; 4392 4393 /* 4394 * If the number of entries is greater than the max for a single list, 4395 * then we have a chained list; we will set up all but one entry in the 4396 * first list (the last entry is saved for link information); 4397 * otherwise, we don't have a chained list and we'll set up at each of 4398 * the entries in the one list. 4399 */ 4400 curr_sg = cp->SG; 4401 chained = use_sg > h->max_cmd_sg_entries; 4402 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4403 last_sg = scsi_sg_count(cmd) - 1; 4404 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4405 hpsa_set_sg_descriptor(curr_sg, sg); 4406 curr_sg++; 4407 } 4408 4409 if (chained) { 4410 /* 4411 * Continue with the chained list. Set curr_sg to the chained 4412 * list. Modify the limit to the total count less the entries 4413 * we've already set up. Resume the scan at the list entry 4414 * where the previous loop left off. 4415 */ 4416 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4417 sg_limit = use_sg - sg_limit; 4418 for_each_sg(sg, sg, sg_limit, i) { 4419 hpsa_set_sg_descriptor(curr_sg, sg); 4420 curr_sg++; 4421 } 4422 } 4423 4424 /* Back the pointer up to the last entry and mark it as "last". */ 4425 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4426 4427 if (use_sg + chained > h->maxSG) 4428 h->maxSG = use_sg + chained; 4429 4430 if (chained) { 4431 cp->Header.SGList = h->max_cmd_sg_entries; 4432 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4433 if (hpsa_map_sg_chain_block(h, cp)) { 4434 scsi_dma_unmap(cmd); 4435 return -1; 4436 } 4437 return 0; 4438 } 4439 4440 sglist_finished: 4441 4442 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4443 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4444 return 0; 4445 } 4446 4447 #define BUFLEN 128 4448 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4449 u8 *cdb, int cdb_len, 4450 const char *func) 4451 { 4452 char buf[BUFLEN]; 4453 int outlen; 4454 int i; 4455 4456 outlen = scnprintf(buf, BUFLEN, 4457 "%s: Blocking zero-length request: CDB:", func); 4458 for (i = 0; i < cdb_len; i++) 4459 outlen += scnprintf(buf+outlen, BUFLEN - outlen, 4460 "%02hhx", cdb[i]); 4461 dev_warn(&h->pdev->dev, "%s\n", buf); 4462 } 4463 4464 #define IO_ACCEL_INELIGIBLE 1 4465 /* zero-length transfers trigger hardware errors. */ 4466 static bool is_zero_length_transfer(u8 *cdb) 4467 { 4468 u32 block_cnt; 4469 4470 /* Block zero-length transfer sizes on certain commands. */ 4471 switch (cdb[0]) { 4472 case READ_10: 4473 case WRITE_10: 4474 case VERIFY: /* 0x2F */ 4475 case WRITE_VERIFY: /* 0x2E */ 4476 block_cnt = get_unaligned_be16(&cdb[7]); 4477 break; 4478 case READ_12: 4479 case WRITE_12: 4480 case VERIFY_12: /* 0xAF */ 4481 case WRITE_VERIFY_12: /* 0xAE */ 4482 block_cnt = get_unaligned_be32(&cdb[6]); 4483 break; 4484 case READ_16: 4485 case WRITE_16: 4486 case VERIFY_16: /* 0x8F */ 4487 block_cnt = get_unaligned_be32(&cdb[10]); 4488 break; 4489 default: 4490 return false; 4491 } 4492 4493 return block_cnt == 0; 4494 } 4495 4496 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4497 { 4498 int is_write = 0; 4499 u32 block; 4500 u32 block_cnt; 4501 4502 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4503 switch (cdb[0]) { 4504 case WRITE_6: 4505 case WRITE_12: 4506 is_write = 1; 4507 case READ_6: 4508 case READ_12: 4509 if (*cdb_len == 6) { 4510 block = (((cdb[1] & 0x1F) << 16) | 4511 (cdb[2] << 8) | 4512 cdb[3]); 4513 block_cnt = cdb[4]; 4514 if (block_cnt == 0) 4515 block_cnt = 256; 4516 } else { 4517 BUG_ON(*cdb_len != 12); 4518 block = get_unaligned_be32(&cdb[2]); 4519 block_cnt = get_unaligned_be32(&cdb[6]); 4520 } 4521 if (block_cnt > 0xffff) 4522 return IO_ACCEL_INELIGIBLE; 4523 4524 cdb[0] = is_write ? WRITE_10 : READ_10; 4525 cdb[1] = 0; 4526 cdb[2] = (u8) (block >> 24); 4527 cdb[3] = (u8) (block >> 16); 4528 cdb[4] = (u8) (block >> 8); 4529 cdb[5] = (u8) (block); 4530 cdb[6] = 0; 4531 cdb[7] = (u8) (block_cnt >> 8); 4532 cdb[8] = (u8) (block_cnt); 4533 cdb[9] = 0; 4534 *cdb_len = 10; 4535 break; 4536 } 4537 return 0; 4538 } 4539 4540 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4541 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4542 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4543 { 4544 struct scsi_cmnd *cmd = c->scsi_cmd; 4545 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4546 unsigned int len; 4547 unsigned int total_len = 0; 4548 struct scatterlist *sg; 4549 u64 addr64; 4550 int use_sg, i; 4551 struct SGDescriptor *curr_sg; 4552 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4553 4554 /* TODO: implement chaining support */ 4555 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4556 atomic_dec(&phys_disk->ioaccel_cmds_out); 4557 return IO_ACCEL_INELIGIBLE; 4558 } 4559 4560 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4561 4562 if (is_zero_length_transfer(cdb)) { 4563 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4564 atomic_dec(&phys_disk->ioaccel_cmds_out); 4565 return IO_ACCEL_INELIGIBLE; 4566 } 4567 4568 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4569 atomic_dec(&phys_disk->ioaccel_cmds_out); 4570 return IO_ACCEL_INELIGIBLE; 4571 } 4572 4573 c->cmd_type = CMD_IOACCEL1; 4574 4575 /* Adjust the DMA address to point to the accelerated command buffer */ 4576 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4577 (c->cmdindex * sizeof(*cp)); 4578 BUG_ON(c->busaddr & 0x0000007F); 4579 4580 use_sg = scsi_dma_map(cmd); 4581 if (use_sg < 0) { 4582 atomic_dec(&phys_disk->ioaccel_cmds_out); 4583 return use_sg; 4584 } 4585 4586 if (use_sg) { 4587 curr_sg = cp->SG; 4588 scsi_for_each_sg(cmd, sg, use_sg, i) { 4589 addr64 = (u64) sg_dma_address(sg); 4590 len = sg_dma_len(sg); 4591 total_len += len; 4592 curr_sg->Addr = cpu_to_le64(addr64); 4593 curr_sg->Len = cpu_to_le32(len); 4594 curr_sg->Ext = cpu_to_le32(0); 4595 curr_sg++; 4596 } 4597 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4598 4599 switch (cmd->sc_data_direction) { 4600 case DMA_TO_DEVICE: 4601 control |= IOACCEL1_CONTROL_DATA_OUT; 4602 break; 4603 case DMA_FROM_DEVICE: 4604 control |= IOACCEL1_CONTROL_DATA_IN; 4605 break; 4606 case DMA_NONE: 4607 control |= IOACCEL1_CONTROL_NODATAXFER; 4608 break; 4609 default: 4610 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4611 cmd->sc_data_direction); 4612 BUG(); 4613 break; 4614 } 4615 } else { 4616 control |= IOACCEL1_CONTROL_NODATAXFER; 4617 } 4618 4619 c->Header.SGList = use_sg; 4620 /* Fill out the command structure to submit */ 4621 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4622 cp->transfer_len = cpu_to_le32(total_len); 4623 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4624 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4625 cp->control = cpu_to_le32(control); 4626 memcpy(cp->CDB, cdb, cdb_len); 4627 memcpy(cp->CISS_LUN, scsi3addr, 8); 4628 /* Tag was already set at init time. */ 4629 enqueue_cmd_and_start_io(h, c); 4630 return 0; 4631 } 4632 4633 /* 4634 * Queue a command directly to a device behind the controller using the 4635 * I/O accelerator path. 4636 */ 4637 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4638 struct CommandList *c) 4639 { 4640 struct scsi_cmnd *cmd = c->scsi_cmd; 4641 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4642 4643 if (!dev) 4644 return -1; 4645 4646 c->phys_disk = dev; 4647 4648 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4649 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4650 } 4651 4652 /* 4653 * Set encryption parameters for the ioaccel2 request 4654 */ 4655 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4656 struct CommandList *c, struct io_accel2_cmd *cp) 4657 { 4658 struct scsi_cmnd *cmd = c->scsi_cmd; 4659 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4660 struct raid_map_data *map = &dev->raid_map; 4661 u64 first_block; 4662 4663 /* Are we doing encryption on this device */ 4664 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4665 return; 4666 /* Set the data encryption key index. */ 4667 cp->dekindex = map->dekindex; 4668 4669 /* Set the encryption enable flag, encoded into direction field. */ 4670 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4671 4672 /* Set encryption tweak values based on logical block address 4673 * If block size is 512, tweak value is LBA. 4674 * For other block sizes, tweak is (LBA * block size)/ 512) 4675 */ 4676 switch (cmd->cmnd[0]) { 4677 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4678 case READ_6: 4679 case WRITE_6: 4680 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4681 (cmd->cmnd[2] << 8) | 4682 cmd->cmnd[3]); 4683 break; 4684 case WRITE_10: 4685 case READ_10: 4686 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4687 case WRITE_12: 4688 case READ_12: 4689 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4690 break; 4691 case WRITE_16: 4692 case READ_16: 4693 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4694 break; 4695 default: 4696 dev_err(&h->pdev->dev, 4697 "ERROR: %s: size (0x%x) not supported for encryption\n", 4698 __func__, cmd->cmnd[0]); 4699 BUG(); 4700 break; 4701 } 4702 4703 if (le32_to_cpu(map->volume_blk_size) != 512) 4704 first_block = first_block * 4705 le32_to_cpu(map->volume_blk_size)/512; 4706 4707 cp->tweak_lower = cpu_to_le32(first_block); 4708 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4709 } 4710 4711 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4712 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4713 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4714 { 4715 struct scsi_cmnd *cmd = c->scsi_cmd; 4716 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4717 struct ioaccel2_sg_element *curr_sg; 4718 int use_sg, i; 4719 struct scatterlist *sg; 4720 u64 addr64; 4721 u32 len; 4722 u32 total_len = 0; 4723 4724 if (!cmd->device) 4725 return -1; 4726 4727 if (!cmd->device->hostdata) 4728 return -1; 4729 4730 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4731 4732 if (is_zero_length_transfer(cdb)) { 4733 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4734 atomic_dec(&phys_disk->ioaccel_cmds_out); 4735 return IO_ACCEL_INELIGIBLE; 4736 } 4737 4738 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4739 atomic_dec(&phys_disk->ioaccel_cmds_out); 4740 return IO_ACCEL_INELIGIBLE; 4741 } 4742 4743 c->cmd_type = CMD_IOACCEL2; 4744 /* Adjust the DMA address to point to the accelerated command buffer */ 4745 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4746 (c->cmdindex * sizeof(*cp)); 4747 BUG_ON(c->busaddr & 0x0000007F); 4748 4749 memset(cp, 0, sizeof(*cp)); 4750 cp->IU_type = IOACCEL2_IU_TYPE; 4751 4752 use_sg = scsi_dma_map(cmd); 4753 if (use_sg < 0) { 4754 atomic_dec(&phys_disk->ioaccel_cmds_out); 4755 return use_sg; 4756 } 4757 4758 if (use_sg) { 4759 curr_sg = cp->sg; 4760 if (use_sg > h->ioaccel_maxsg) { 4761 addr64 = le64_to_cpu( 4762 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4763 curr_sg->address = cpu_to_le64(addr64); 4764 curr_sg->length = 0; 4765 curr_sg->reserved[0] = 0; 4766 curr_sg->reserved[1] = 0; 4767 curr_sg->reserved[2] = 0; 4768 curr_sg->chain_indicator = 0x80; 4769 4770 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4771 } 4772 scsi_for_each_sg(cmd, sg, use_sg, i) { 4773 addr64 = (u64) sg_dma_address(sg); 4774 len = sg_dma_len(sg); 4775 total_len += len; 4776 curr_sg->address = cpu_to_le64(addr64); 4777 curr_sg->length = cpu_to_le32(len); 4778 curr_sg->reserved[0] = 0; 4779 curr_sg->reserved[1] = 0; 4780 curr_sg->reserved[2] = 0; 4781 curr_sg->chain_indicator = 0; 4782 curr_sg++; 4783 } 4784 4785 switch (cmd->sc_data_direction) { 4786 case DMA_TO_DEVICE: 4787 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4788 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4789 break; 4790 case DMA_FROM_DEVICE: 4791 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4792 cp->direction |= IOACCEL2_DIR_DATA_IN; 4793 break; 4794 case DMA_NONE: 4795 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4796 cp->direction |= IOACCEL2_DIR_NO_DATA; 4797 break; 4798 default: 4799 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4800 cmd->sc_data_direction); 4801 BUG(); 4802 break; 4803 } 4804 } else { 4805 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4806 cp->direction |= IOACCEL2_DIR_NO_DATA; 4807 } 4808 4809 /* Set encryption parameters, if necessary */ 4810 set_encrypt_ioaccel2(h, c, cp); 4811 4812 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4813 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4814 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4815 4816 cp->data_len = cpu_to_le32(total_len); 4817 cp->err_ptr = cpu_to_le64(c->busaddr + 4818 offsetof(struct io_accel2_cmd, error_data)); 4819 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4820 4821 /* fill in sg elements */ 4822 if (use_sg > h->ioaccel_maxsg) { 4823 cp->sg_count = 1; 4824 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4825 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4826 atomic_dec(&phys_disk->ioaccel_cmds_out); 4827 scsi_dma_unmap(cmd); 4828 return -1; 4829 } 4830 } else 4831 cp->sg_count = (u8) use_sg; 4832 4833 enqueue_cmd_and_start_io(h, c); 4834 return 0; 4835 } 4836 4837 /* 4838 * Queue a command to the correct I/O accelerator path. 4839 */ 4840 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4841 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4842 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4843 { 4844 if (!c->scsi_cmd->device) 4845 return -1; 4846 4847 if (!c->scsi_cmd->device->hostdata) 4848 return -1; 4849 4850 /* Try to honor the device's queue depth */ 4851 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4852 phys_disk->queue_depth) { 4853 atomic_dec(&phys_disk->ioaccel_cmds_out); 4854 return IO_ACCEL_INELIGIBLE; 4855 } 4856 if (h->transMethod & CFGTBL_Trans_io_accel1) 4857 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4858 cdb, cdb_len, scsi3addr, 4859 phys_disk); 4860 else 4861 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4862 cdb, cdb_len, scsi3addr, 4863 phys_disk); 4864 } 4865 4866 static void raid_map_helper(struct raid_map_data *map, 4867 int offload_to_mirror, u32 *map_index, u32 *current_group) 4868 { 4869 if (offload_to_mirror == 0) { 4870 /* use physical disk in the first mirrored group. */ 4871 *map_index %= le16_to_cpu(map->data_disks_per_row); 4872 return; 4873 } 4874 do { 4875 /* determine mirror group that *map_index indicates */ 4876 *current_group = *map_index / 4877 le16_to_cpu(map->data_disks_per_row); 4878 if (offload_to_mirror == *current_group) 4879 continue; 4880 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4881 /* select map index from next group */ 4882 *map_index += le16_to_cpu(map->data_disks_per_row); 4883 (*current_group)++; 4884 } else { 4885 /* select map index from first group */ 4886 *map_index %= le16_to_cpu(map->data_disks_per_row); 4887 *current_group = 0; 4888 } 4889 } while (offload_to_mirror != *current_group); 4890 } 4891 4892 /* 4893 * Attempt to perform offload RAID mapping for a logical volume I/O. 4894 */ 4895 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4896 struct CommandList *c) 4897 { 4898 struct scsi_cmnd *cmd = c->scsi_cmd; 4899 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4900 struct raid_map_data *map = &dev->raid_map; 4901 struct raid_map_disk_data *dd = &map->data[0]; 4902 int is_write = 0; 4903 u32 map_index; 4904 u64 first_block, last_block; 4905 u32 block_cnt; 4906 u32 blocks_per_row; 4907 u64 first_row, last_row; 4908 u32 first_row_offset, last_row_offset; 4909 u32 first_column, last_column; 4910 u64 r0_first_row, r0_last_row; 4911 u32 r5or6_blocks_per_row; 4912 u64 r5or6_first_row, r5or6_last_row; 4913 u32 r5or6_first_row_offset, r5or6_last_row_offset; 4914 u32 r5or6_first_column, r5or6_last_column; 4915 u32 total_disks_per_row; 4916 u32 stripesize; 4917 u32 first_group, last_group, current_group; 4918 u32 map_row; 4919 u32 disk_handle; 4920 u64 disk_block; 4921 u32 disk_block_cnt; 4922 u8 cdb[16]; 4923 u8 cdb_len; 4924 u16 strip_size; 4925 #if BITS_PER_LONG == 32 4926 u64 tmpdiv; 4927 #endif 4928 int offload_to_mirror; 4929 4930 if (!dev) 4931 return -1; 4932 4933 /* check for valid opcode, get LBA and block count */ 4934 switch (cmd->cmnd[0]) { 4935 case WRITE_6: 4936 is_write = 1; 4937 case READ_6: 4938 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4939 (cmd->cmnd[2] << 8) | 4940 cmd->cmnd[3]); 4941 block_cnt = cmd->cmnd[4]; 4942 if (block_cnt == 0) 4943 block_cnt = 256; 4944 break; 4945 case WRITE_10: 4946 is_write = 1; 4947 case READ_10: 4948 first_block = 4949 (((u64) cmd->cmnd[2]) << 24) | 4950 (((u64) cmd->cmnd[3]) << 16) | 4951 (((u64) cmd->cmnd[4]) << 8) | 4952 cmd->cmnd[5]; 4953 block_cnt = 4954 (((u32) cmd->cmnd[7]) << 8) | 4955 cmd->cmnd[8]; 4956 break; 4957 case WRITE_12: 4958 is_write = 1; 4959 case READ_12: 4960 first_block = 4961 (((u64) cmd->cmnd[2]) << 24) | 4962 (((u64) cmd->cmnd[3]) << 16) | 4963 (((u64) cmd->cmnd[4]) << 8) | 4964 cmd->cmnd[5]; 4965 block_cnt = 4966 (((u32) cmd->cmnd[6]) << 24) | 4967 (((u32) cmd->cmnd[7]) << 16) | 4968 (((u32) cmd->cmnd[8]) << 8) | 4969 cmd->cmnd[9]; 4970 break; 4971 case WRITE_16: 4972 is_write = 1; 4973 case READ_16: 4974 first_block = 4975 (((u64) cmd->cmnd[2]) << 56) | 4976 (((u64) cmd->cmnd[3]) << 48) | 4977 (((u64) cmd->cmnd[4]) << 40) | 4978 (((u64) cmd->cmnd[5]) << 32) | 4979 (((u64) cmd->cmnd[6]) << 24) | 4980 (((u64) cmd->cmnd[7]) << 16) | 4981 (((u64) cmd->cmnd[8]) << 8) | 4982 cmd->cmnd[9]; 4983 block_cnt = 4984 (((u32) cmd->cmnd[10]) << 24) | 4985 (((u32) cmd->cmnd[11]) << 16) | 4986 (((u32) cmd->cmnd[12]) << 8) | 4987 cmd->cmnd[13]; 4988 break; 4989 default: 4990 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4991 } 4992 last_block = first_block + block_cnt - 1; 4993 4994 /* check for write to non-RAID-0 */ 4995 if (is_write && dev->raid_level != 0) 4996 return IO_ACCEL_INELIGIBLE; 4997 4998 /* check for invalid block or wraparound */ 4999 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5000 last_block < first_block) 5001 return IO_ACCEL_INELIGIBLE; 5002 5003 /* calculate stripe information for the request */ 5004 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5005 le16_to_cpu(map->strip_size); 5006 strip_size = le16_to_cpu(map->strip_size); 5007 #if BITS_PER_LONG == 32 5008 tmpdiv = first_block; 5009 (void) do_div(tmpdiv, blocks_per_row); 5010 first_row = tmpdiv; 5011 tmpdiv = last_block; 5012 (void) do_div(tmpdiv, blocks_per_row); 5013 last_row = tmpdiv; 5014 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5015 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5016 tmpdiv = first_row_offset; 5017 (void) do_div(tmpdiv, strip_size); 5018 first_column = tmpdiv; 5019 tmpdiv = last_row_offset; 5020 (void) do_div(tmpdiv, strip_size); 5021 last_column = tmpdiv; 5022 #else 5023 first_row = first_block / blocks_per_row; 5024 last_row = last_block / blocks_per_row; 5025 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5026 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5027 first_column = first_row_offset / strip_size; 5028 last_column = last_row_offset / strip_size; 5029 #endif 5030 5031 /* if this isn't a single row/column then give to the controller */ 5032 if ((first_row != last_row) || (first_column != last_column)) 5033 return IO_ACCEL_INELIGIBLE; 5034 5035 /* proceeding with driver mapping */ 5036 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5037 le16_to_cpu(map->metadata_disks_per_row); 5038 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5039 le16_to_cpu(map->row_cnt); 5040 map_index = (map_row * total_disks_per_row) + first_column; 5041 5042 switch (dev->raid_level) { 5043 case HPSA_RAID_0: 5044 break; /* nothing special to do */ 5045 case HPSA_RAID_1: 5046 /* Handles load balance across RAID 1 members. 5047 * (2-drive R1 and R10 with even # of drives.) 5048 * Appropriate for SSDs, not optimal for HDDs 5049 */ 5050 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5051 if (dev->offload_to_mirror) 5052 map_index += le16_to_cpu(map->data_disks_per_row); 5053 dev->offload_to_mirror = !dev->offload_to_mirror; 5054 break; 5055 case HPSA_RAID_ADM: 5056 /* Handles N-way mirrors (R1-ADM) 5057 * and R10 with # of drives divisible by 3.) 5058 */ 5059 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5060 5061 offload_to_mirror = dev->offload_to_mirror; 5062 raid_map_helper(map, offload_to_mirror, 5063 &map_index, ¤t_group); 5064 /* set mirror group to use next time */ 5065 offload_to_mirror = 5066 (offload_to_mirror >= 5067 le16_to_cpu(map->layout_map_count) - 1) 5068 ? 0 : offload_to_mirror + 1; 5069 dev->offload_to_mirror = offload_to_mirror; 5070 /* Avoid direct use of dev->offload_to_mirror within this 5071 * function since multiple threads might simultaneously 5072 * increment it beyond the range of dev->layout_map_count -1. 5073 */ 5074 break; 5075 case HPSA_RAID_5: 5076 case HPSA_RAID_6: 5077 if (le16_to_cpu(map->layout_map_count) <= 1) 5078 break; 5079 5080 /* Verify first and last block are in same RAID group */ 5081 r5or6_blocks_per_row = 5082 le16_to_cpu(map->strip_size) * 5083 le16_to_cpu(map->data_disks_per_row); 5084 BUG_ON(r5or6_blocks_per_row == 0); 5085 stripesize = r5or6_blocks_per_row * 5086 le16_to_cpu(map->layout_map_count); 5087 #if BITS_PER_LONG == 32 5088 tmpdiv = first_block; 5089 first_group = do_div(tmpdiv, stripesize); 5090 tmpdiv = first_group; 5091 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5092 first_group = tmpdiv; 5093 tmpdiv = last_block; 5094 last_group = do_div(tmpdiv, stripesize); 5095 tmpdiv = last_group; 5096 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5097 last_group = tmpdiv; 5098 #else 5099 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5100 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5101 #endif 5102 if (first_group != last_group) 5103 return IO_ACCEL_INELIGIBLE; 5104 5105 /* Verify request is in a single row of RAID 5/6 */ 5106 #if BITS_PER_LONG == 32 5107 tmpdiv = first_block; 5108 (void) do_div(tmpdiv, stripesize); 5109 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5110 tmpdiv = last_block; 5111 (void) do_div(tmpdiv, stripesize); 5112 r5or6_last_row = r0_last_row = tmpdiv; 5113 #else 5114 first_row = r5or6_first_row = r0_first_row = 5115 first_block / stripesize; 5116 r5or6_last_row = r0_last_row = last_block / stripesize; 5117 #endif 5118 if (r5or6_first_row != r5or6_last_row) 5119 return IO_ACCEL_INELIGIBLE; 5120 5121 5122 /* Verify request is in a single column */ 5123 #if BITS_PER_LONG == 32 5124 tmpdiv = first_block; 5125 first_row_offset = do_div(tmpdiv, stripesize); 5126 tmpdiv = first_row_offset; 5127 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5128 r5or6_first_row_offset = first_row_offset; 5129 tmpdiv = last_block; 5130 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5131 tmpdiv = r5or6_last_row_offset; 5132 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5133 tmpdiv = r5or6_first_row_offset; 5134 (void) do_div(tmpdiv, map->strip_size); 5135 first_column = r5or6_first_column = tmpdiv; 5136 tmpdiv = r5or6_last_row_offset; 5137 (void) do_div(tmpdiv, map->strip_size); 5138 r5or6_last_column = tmpdiv; 5139 #else 5140 first_row_offset = r5or6_first_row_offset = 5141 (u32)((first_block % stripesize) % 5142 r5or6_blocks_per_row); 5143 5144 r5or6_last_row_offset = 5145 (u32)((last_block % stripesize) % 5146 r5or6_blocks_per_row); 5147 5148 first_column = r5or6_first_column = 5149 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5150 r5or6_last_column = 5151 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5152 #endif 5153 if (r5or6_first_column != r5or6_last_column) 5154 return IO_ACCEL_INELIGIBLE; 5155 5156 /* Request is eligible */ 5157 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5158 le16_to_cpu(map->row_cnt); 5159 5160 map_index = (first_group * 5161 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5162 (map_row * total_disks_per_row) + first_column; 5163 break; 5164 default: 5165 return IO_ACCEL_INELIGIBLE; 5166 } 5167 5168 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5169 return IO_ACCEL_INELIGIBLE; 5170 5171 c->phys_disk = dev->phys_disk[map_index]; 5172 if (!c->phys_disk) 5173 return IO_ACCEL_INELIGIBLE; 5174 5175 disk_handle = dd[map_index].ioaccel_handle; 5176 disk_block = le64_to_cpu(map->disk_starting_blk) + 5177 first_row * le16_to_cpu(map->strip_size) + 5178 (first_row_offset - first_column * 5179 le16_to_cpu(map->strip_size)); 5180 disk_block_cnt = block_cnt; 5181 5182 /* handle differing logical/physical block sizes */ 5183 if (map->phys_blk_shift) { 5184 disk_block <<= map->phys_blk_shift; 5185 disk_block_cnt <<= map->phys_blk_shift; 5186 } 5187 BUG_ON(disk_block_cnt > 0xffff); 5188 5189 /* build the new CDB for the physical disk I/O */ 5190 if (disk_block > 0xffffffff) { 5191 cdb[0] = is_write ? WRITE_16 : READ_16; 5192 cdb[1] = 0; 5193 cdb[2] = (u8) (disk_block >> 56); 5194 cdb[3] = (u8) (disk_block >> 48); 5195 cdb[4] = (u8) (disk_block >> 40); 5196 cdb[5] = (u8) (disk_block >> 32); 5197 cdb[6] = (u8) (disk_block >> 24); 5198 cdb[7] = (u8) (disk_block >> 16); 5199 cdb[8] = (u8) (disk_block >> 8); 5200 cdb[9] = (u8) (disk_block); 5201 cdb[10] = (u8) (disk_block_cnt >> 24); 5202 cdb[11] = (u8) (disk_block_cnt >> 16); 5203 cdb[12] = (u8) (disk_block_cnt >> 8); 5204 cdb[13] = (u8) (disk_block_cnt); 5205 cdb[14] = 0; 5206 cdb[15] = 0; 5207 cdb_len = 16; 5208 } else { 5209 cdb[0] = is_write ? WRITE_10 : READ_10; 5210 cdb[1] = 0; 5211 cdb[2] = (u8) (disk_block >> 24); 5212 cdb[3] = (u8) (disk_block >> 16); 5213 cdb[4] = (u8) (disk_block >> 8); 5214 cdb[5] = (u8) (disk_block); 5215 cdb[6] = 0; 5216 cdb[7] = (u8) (disk_block_cnt >> 8); 5217 cdb[8] = (u8) (disk_block_cnt); 5218 cdb[9] = 0; 5219 cdb_len = 10; 5220 } 5221 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5222 dev->scsi3addr, 5223 dev->phys_disk[map_index]); 5224 } 5225 5226 /* 5227 * Submit commands down the "normal" RAID stack path 5228 * All callers to hpsa_ciss_submit must check lockup_detected 5229 * beforehand, before (opt.) and after calling cmd_alloc 5230 */ 5231 static int hpsa_ciss_submit(struct ctlr_info *h, 5232 struct CommandList *c, struct scsi_cmnd *cmd, 5233 unsigned char scsi3addr[]) 5234 { 5235 cmd->host_scribble = (unsigned char *) c; 5236 c->cmd_type = CMD_SCSI; 5237 c->scsi_cmd = cmd; 5238 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5239 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5240 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5241 5242 /* Fill in the request block... */ 5243 5244 c->Request.Timeout = 0; 5245 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5246 c->Request.CDBLen = cmd->cmd_len; 5247 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5248 switch (cmd->sc_data_direction) { 5249 case DMA_TO_DEVICE: 5250 c->Request.type_attr_dir = 5251 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5252 break; 5253 case DMA_FROM_DEVICE: 5254 c->Request.type_attr_dir = 5255 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5256 break; 5257 case DMA_NONE: 5258 c->Request.type_attr_dir = 5259 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5260 break; 5261 case DMA_BIDIRECTIONAL: 5262 /* This can happen if a buggy application does a scsi passthru 5263 * and sets both inlen and outlen to non-zero. ( see 5264 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5265 */ 5266 5267 c->Request.type_attr_dir = 5268 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5269 /* This is technically wrong, and hpsa controllers should 5270 * reject it with CMD_INVALID, which is the most correct 5271 * response, but non-fibre backends appear to let it 5272 * slide by, and give the same results as if this field 5273 * were set correctly. Either way is acceptable for 5274 * our purposes here. 5275 */ 5276 5277 break; 5278 5279 default: 5280 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5281 cmd->sc_data_direction); 5282 BUG(); 5283 break; 5284 } 5285 5286 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5287 hpsa_cmd_resolve_and_free(h, c); 5288 return SCSI_MLQUEUE_HOST_BUSY; 5289 } 5290 enqueue_cmd_and_start_io(h, c); 5291 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5292 return 0; 5293 } 5294 5295 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5296 struct CommandList *c) 5297 { 5298 dma_addr_t cmd_dma_handle, err_dma_handle; 5299 5300 /* Zero out all of commandlist except the last field, refcount */ 5301 memset(c, 0, offsetof(struct CommandList, refcount)); 5302 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5303 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5304 c->err_info = h->errinfo_pool + index; 5305 memset(c->err_info, 0, sizeof(*c->err_info)); 5306 err_dma_handle = h->errinfo_pool_dhandle 5307 + index * sizeof(*c->err_info); 5308 c->cmdindex = index; 5309 c->busaddr = (u32) cmd_dma_handle; 5310 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5311 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5312 c->h = h; 5313 c->scsi_cmd = SCSI_CMD_IDLE; 5314 } 5315 5316 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5317 { 5318 int i; 5319 5320 for (i = 0; i < h->nr_cmds; i++) { 5321 struct CommandList *c = h->cmd_pool + i; 5322 5323 hpsa_cmd_init(h, i, c); 5324 atomic_set(&c->refcount, 0); 5325 } 5326 } 5327 5328 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5329 struct CommandList *c) 5330 { 5331 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5332 5333 BUG_ON(c->cmdindex != index); 5334 5335 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5336 memset(c->err_info, 0, sizeof(*c->err_info)); 5337 c->busaddr = (u32) cmd_dma_handle; 5338 } 5339 5340 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5341 struct CommandList *c, struct scsi_cmnd *cmd, 5342 unsigned char *scsi3addr) 5343 { 5344 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5345 int rc = IO_ACCEL_INELIGIBLE; 5346 5347 if (!dev) 5348 return SCSI_MLQUEUE_HOST_BUSY; 5349 5350 cmd->host_scribble = (unsigned char *) c; 5351 5352 if (dev->offload_enabled) { 5353 hpsa_cmd_init(h, c->cmdindex, c); 5354 c->cmd_type = CMD_SCSI; 5355 c->scsi_cmd = cmd; 5356 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5357 if (rc < 0) /* scsi_dma_map failed. */ 5358 rc = SCSI_MLQUEUE_HOST_BUSY; 5359 } else if (dev->hba_ioaccel_enabled) { 5360 hpsa_cmd_init(h, c->cmdindex, c); 5361 c->cmd_type = CMD_SCSI; 5362 c->scsi_cmd = cmd; 5363 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5364 if (rc < 0) /* scsi_dma_map failed. */ 5365 rc = SCSI_MLQUEUE_HOST_BUSY; 5366 } 5367 return rc; 5368 } 5369 5370 static void hpsa_command_resubmit_worker(struct work_struct *work) 5371 { 5372 struct scsi_cmnd *cmd; 5373 struct hpsa_scsi_dev_t *dev; 5374 struct CommandList *c = container_of(work, struct CommandList, work); 5375 5376 cmd = c->scsi_cmd; 5377 dev = cmd->device->hostdata; 5378 if (!dev) { 5379 cmd->result = DID_NO_CONNECT << 16; 5380 return hpsa_cmd_free_and_done(c->h, c, cmd); 5381 } 5382 if (c->reset_pending) 5383 return hpsa_cmd_free_and_done(c->h, c, cmd); 5384 if (c->cmd_type == CMD_IOACCEL2) { 5385 struct ctlr_info *h = c->h; 5386 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5387 int rc; 5388 5389 if (c2->error_data.serv_response == 5390 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5391 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5392 if (rc == 0) 5393 return; 5394 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5395 /* 5396 * If we get here, it means dma mapping failed. 5397 * Try again via scsi mid layer, which will 5398 * then get SCSI_MLQUEUE_HOST_BUSY. 5399 */ 5400 cmd->result = DID_IMM_RETRY << 16; 5401 return hpsa_cmd_free_and_done(h, c, cmd); 5402 } 5403 /* else, fall thru and resubmit down CISS path */ 5404 } 5405 } 5406 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5407 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5408 /* 5409 * If we get here, it means dma mapping failed. Try 5410 * again via scsi mid layer, which will then get 5411 * SCSI_MLQUEUE_HOST_BUSY. 5412 * 5413 * hpsa_ciss_submit will have already freed c 5414 * if it encountered a dma mapping failure. 5415 */ 5416 cmd->result = DID_IMM_RETRY << 16; 5417 cmd->scsi_done(cmd); 5418 } 5419 } 5420 5421 /* Running in struct Scsi_Host->host_lock less mode */ 5422 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5423 { 5424 struct ctlr_info *h; 5425 struct hpsa_scsi_dev_t *dev; 5426 unsigned char scsi3addr[8]; 5427 struct CommandList *c; 5428 int rc = 0; 5429 5430 /* Get the ptr to our adapter structure out of cmd->host. */ 5431 h = sdev_to_hba(cmd->device); 5432 5433 BUG_ON(cmd->request->tag < 0); 5434 5435 dev = cmd->device->hostdata; 5436 if (!dev) { 5437 cmd->result = DID_NO_CONNECT << 16; 5438 cmd->scsi_done(cmd); 5439 return 0; 5440 } 5441 5442 if (dev->removed) { 5443 cmd->result = DID_NO_CONNECT << 16; 5444 cmd->scsi_done(cmd); 5445 return 0; 5446 } 5447 5448 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5449 5450 if (unlikely(lockup_detected(h))) { 5451 cmd->result = DID_NO_CONNECT << 16; 5452 cmd->scsi_done(cmd); 5453 return 0; 5454 } 5455 c = cmd_tagged_alloc(h, cmd); 5456 5457 /* 5458 * Call alternate submit routine for I/O accelerated commands. 5459 * Retries always go down the normal I/O path. 5460 */ 5461 if (likely(cmd->retries == 0 && 5462 !blk_rq_is_passthrough(cmd->request) && 5463 h->acciopath_status)) { 5464 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5465 if (rc == 0) 5466 return 0; 5467 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5468 hpsa_cmd_resolve_and_free(h, c); 5469 return SCSI_MLQUEUE_HOST_BUSY; 5470 } 5471 } 5472 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5473 } 5474 5475 static void hpsa_scan_complete(struct ctlr_info *h) 5476 { 5477 unsigned long flags; 5478 5479 spin_lock_irqsave(&h->scan_lock, flags); 5480 h->scan_finished = 1; 5481 wake_up(&h->scan_wait_queue); 5482 spin_unlock_irqrestore(&h->scan_lock, flags); 5483 } 5484 5485 static void hpsa_scan_start(struct Scsi_Host *sh) 5486 { 5487 struct ctlr_info *h = shost_to_hba(sh); 5488 unsigned long flags; 5489 5490 /* 5491 * Don't let rescans be initiated on a controller known to be locked 5492 * up. If the controller locks up *during* a rescan, that thread is 5493 * probably hosed, but at least we can prevent new rescan threads from 5494 * piling up on a locked up controller. 5495 */ 5496 if (unlikely(lockup_detected(h))) 5497 return hpsa_scan_complete(h); 5498 5499 /* 5500 * If a scan is already waiting to run, no need to add another 5501 */ 5502 spin_lock_irqsave(&h->scan_lock, flags); 5503 if (h->scan_waiting) { 5504 spin_unlock_irqrestore(&h->scan_lock, flags); 5505 return; 5506 } 5507 5508 spin_unlock_irqrestore(&h->scan_lock, flags); 5509 5510 /* wait until any scan already in progress is finished. */ 5511 while (1) { 5512 spin_lock_irqsave(&h->scan_lock, flags); 5513 if (h->scan_finished) 5514 break; 5515 h->scan_waiting = 1; 5516 spin_unlock_irqrestore(&h->scan_lock, flags); 5517 wait_event(h->scan_wait_queue, h->scan_finished); 5518 /* Note: We don't need to worry about a race between this 5519 * thread and driver unload because the midlayer will 5520 * have incremented the reference count, so unload won't 5521 * happen if we're in here. 5522 */ 5523 } 5524 h->scan_finished = 0; /* mark scan as in progress */ 5525 h->scan_waiting = 0; 5526 spin_unlock_irqrestore(&h->scan_lock, flags); 5527 5528 if (unlikely(lockup_detected(h))) 5529 return hpsa_scan_complete(h); 5530 5531 /* 5532 * Do the scan after a reset completion 5533 */ 5534 spin_lock_irqsave(&h->reset_lock, flags); 5535 if (h->reset_in_progress) { 5536 h->drv_req_rescan = 1; 5537 spin_unlock_irqrestore(&h->reset_lock, flags); 5538 hpsa_scan_complete(h); 5539 return; 5540 } 5541 spin_unlock_irqrestore(&h->reset_lock, flags); 5542 5543 hpsa_update_scsi_devices(h); 5544 5545 hpsa_scan_complete(h); 5546 } 5547 5548 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5549 { 5550 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5551 5552 if (!logical_drive) 5553 return -ENODEV; 5554 5555 if (qdepth < 1) 5556 qdepth = 1; 5557 else if (qdepth > logical_drive->queue_depth) 5558 qdepth = logical_drive->queue_depth; 5559 5560 return scsi_change_queue_depth(sdev, qdepth); 5561 } 5562 5563 static int hpsa_scan_finished(struct Scsi_Host *sh, 5564 unsigned long elapsed_time) 5565 { 5566 struct ctlr_info *h = shost_to_hba(sh); 5567 unsigned long flags; 5568 int finished; 5569 5570 spin_lock_irqsave(&h->scan_lock, flags); 5571 finished = h->scan_finished; 5572 spin_unlock_irqrestore(&h->scan_lock, flags); 5573 return finished; 5574 } 5575 5576 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5577 { 5578 struct Scsi_Host *sh; 5579 5580 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5581 if (sh == NULL) { 5582 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5583 return -ENOMEM; 5584 } 5585 5586 sh->io_port = 0; 5587 sh->n_io_port = 0; 5588 sh->this_id = -1; 5589 sh->max_channel = 3; 5590 sh->max_cmd_len = MAX_COMMAND_SIZE; 5591 sh->max_lun = HPSA_MAX_LUN; 5592 sh->max_id = HPSA_MAX_LUN; 5593 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5594 sh->cmd_per_lun = sh->can_queue; 5595 sh->sg_tablesize = h->maxsgentries; 5596 sh->transportt = hpsa_sas_transport_template; 5597 sh->hostdata[0] = (unsigned long) h; 5598 sh->irq = pci_irq_vector(h->pdev, 0); 5599 sh->unique_id = sh->irq; 5600 5601 h->scsi_host = sh; 5602 return 0; 5603 } 5604 5605 static int hpsa_scsi_add_host(struct ctlr_info *h) 5606 { 5607 int rv; 5608 5609 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5610 if (rv) { 5611 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5612 return rv; 5613 } 5614 scsi_scan_host(h->scsi_host); 5615 return 0; 5616 } 5617 5618 /* 5619 * The block layer has already gone to the trouble of picking out a unique, 5620 * small-integer tag for this request. We use an offset from that value as 5621 * an index to select our command block. (The offset allows us to reserve the 5622 * low-numbered entries for our own uses.) 5623 */ 5624 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5625 { 5626 int idx = scmd->request->tag; 5627 5628 if (idx < 0) 5629 return idx; 5630 5631 /* Offset to leave space for internal cmds. */ 5632 return idx += HPSA_NRESERVED_CMDS; 5633 } 5634 5635 /* 5636 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5637 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5638 */ 5639 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5640 struct CommandList *c, unsigned char lunaddr[], 5641 int reply_queue) 5642 { 5643 int rc; 5644 5645 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5646 (void) fill_cmd(c, TEST_UNIT_READY, h, 5647 NULL, 0, 0, lunaddr, TYPE_CMD); 5648 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5649 if (rc) 5650 return rc; 5651 /* no unmap needed here because no data xfer. */ 5652 5653 /* Check if the unit is already ready. */ 5654 if (c->err_info->CommandStatus == CMD_SUCCESS) 5655 return 0; 5656 5657 /* 5658 * The first command sent after reset will receive "unit attention" to 5659 * indicate that the LUN has been reset...this is actually what we're 5660 * looking for (but, success is good too). 5661 */ 5662 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5663 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5664 (c->err_info->SenseInfo[2] == NO_SENSE || 5665 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5666 return 0; 5667 5668 return 1; 5669 } 5670 5671 /* 5672 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5673 * returns zero when the unit is ready, and non-zero when giving up. 5674 */ 5675 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5676 struct CommandList *c, 5677 unsigned char lunaddr[], int reply_queue) 5678 { 5679 int rc; 5680 int count = 0; 5681 int waittime = 1; /* seconds */ 5682 5683 /* Send test unit ready until device ready, or give up. */ 5684 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5685 5686 /* 5687 * Wait for a bit. do this first, because if we send 5688 * the TUR right away, the reset will just abort it. 5689 */ 5690 msleep(1000 * waittime); 5691 5692 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5693 if (!rc) 5694 break; 5695 5696 /* Increase wait time with each try, up to a point. */ 5697 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5698 waittime *= 2; 5699 5700 dev_warn(&h->pdev->dev, 5701 "waiting %d secs for device to become ready.\n", 5702 waittime); 5703 } 5704 5705 return rc; 5706 } 5707 5708 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5709 unsigned char lunaddr[], 5710 int reply_queue) 5711 { 5712 int first_queue; 5713 int last_queue; 5714 int rq; 5715 int rc = 0; 5716 struct CommandList *c; 5717 5718 c = cmd_alloc(h); 5719 5720 /* 5721 * If no specific reply queue was requested, then send the TUR 5722 * repeatedly, requesting a reply on each reply queue; otherwise execute 5723 * the loop exactly once using only the specified queue. 5724 */ 5725 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5726 first_queue = 0; 5727 last_queue = h->nreply_queues - 1; 5728 } else { 5729 first_queue = reply_queue; 5730 last_queue = reply_queue; 5731 } 5732 5733 for (rq = first_queue; rq <= last_queue; rq++) { 5734 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5735 if (rc) 5736 break; 5737 } 5738 5739 if (rc) 5740 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5741 else 5742 dev_warn(&h->pdev->dev, "device is ready.\n"); 5743 5744 cmd_free(h, c); 5745 return rc; 5746 } 5747 5748 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5749 * complaining. Doing a host- or bus-reset can't do anything good here. 5750 */ 5751 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5752 { 5753 int rc = SUCCESS; 5754 struct ctlr_info *h; 5755 struct hpsa_scsi_dev_t *dev; 5756 u8 reset_type; 5757 char msg[48]; 5758 unsigned long flags; 5759 5760 /* find the controller to which the command to be aborted was sent */ 5761 h = sdev_to_hba(scsicmd->device); 5762 if (h == NULL) /* paranoia */ 5763 return FAILED; 5764 5765 spin_lock_irqsave(&h->reset_lock, flags); 5766 h->reset_in_progress = 1; 5767 spin_unlock_irqrestore(&h->reset_lock, flags); 5768 5769 if (lockup_detected(h)) { 5770 rc = FAILED; 5771 goto return_reset_status; 5772 } 5773 5774 dev = scsicmd->device->hostdata; 5775 if (!dev) { 5776 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5777 rc = FAILED; 5778 goto return_reset_status; 5779 } 5780 5781 if (dev->devtype == TYPE_ENCLOSURE) { 5782 rc = SUCCESS; 5783 goto return_reset_status; 5784 } 5785 5786 /* if controller locked up, we can guarantee command won't complete */ 5787 if (lockup_detected(h)) { 5788 snprintf(msg, sizeof(msg), 5789 "cmd %d RESET FAILED, lockup detected", 5790 hpsa_get_cmd_index(scsicmd)); 5791 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5792 rc = FAILED; 5793 goto return_reset_status; 5794 } 5795 5796 /* this reset request might be the result of a lockup; check */ 5797 if (detect_controller_lockup(h)) { 5798 snprintf(msg, sizeof(msg), 5799 "cmd %d RESET FAILED, new lockup detected", 5800 hpsa_get_cmd_index(scsicmd)); 5801 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5802 rc = FAILED; 5803 goto return_reset_status; 5804 } 5805 5806 /* Do not attempt on controller */ 5807 if (is_hba_lunid(dev->scsi3addr)) { 5808 rc = SUCCESS; 5809 goto return_reset_status; 5810 } 5811 5812 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5813 reset_type = HPSA_DEVICE_RESET_MSG; 5814 else 5815 reset_type = HPSA_PHYS_TARGET_RESET; 5816 5817 sprintf(msg, "resetting %s", 5818 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5819 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5820 5821 /* send a reset to the SCSI LUN which the command was sent to */ 5822 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5823 DEFAULT_REPLY_QUEUE); 5824 if (rc == 0) 5825 rc = SUCCESS; 5826 else 5827 rc = FAILED; 5828 5829 sprintf(msg, "reset %s %s", 5830 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5831 rc == SUCCESS ? "completed successfully" : "failed"); 5832 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5833 5834 return_reset_status: 5835 spin_lock_irqsave(&h->reset_lock, flags); 5836 h->reset_in_progress = 0; 5837 spin_unlock_irqrestore(&h->reset_lock, flags); 5838 return rc; 5839 } 5840 5841 /* 5842 * For operations with an associated SCSI command, a command block is allocated 5843 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 5844 * block request tag as an index into a table of entries. cmd_tagged_free() is 5845 * the complement, although cmd_free() may be called instead. 5846 */ 5847 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 5848 struct scsi_cmnd *scmd) 5849 { 5850 int idx = hpsa_get_cmd_index(scmd); 5851 struct CommandList *c = h->cmd_pool + idx; 5852 5853 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 5854 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 5855 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 5856 /* The index value comes from the block layer, so if it's out of 5857 * bounds, it's probably not our bug. 5858 */ 5859 BUG(); 5860 } 5861 5862 atomic_inc(&c->refcount); 5863 if (unlikely(!hpsa_is_cmd_idle(c))) { 5864 /* 5865 * We expect that the SCSI layer will hand us a unique tag 5866 * value. Thus, there should never be a collision here between 5867 * two requests...because if the selected command isn't idle 5868 * then someone is going to be very disappointed. 5869 */ 5870 dev_err(&h->pdev->dev, 5871 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 5872 idx); 5873 if (c->scsi_cmd != NULL) 5874 scsi_print_command(c->scsi_cmd); 5875 scsi_print_command(scmd); 5876 } 5877 5878 hpsa_cmd_partial_init(h, idx, c); 5879 return c; 5880 } 5881 5882 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 5883 { 5884 /* 5885 * Release our reference to the block. We don't need to do anything 5886 * else to free it, because it is accessed by index. 5887 */ 5888 (void)atomic_dec(&c->refcount); 5889 } 5890 5891 /* 5892 * For operations that cannot sleep, a command block is allocated at init, 5893 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 5894 * which ones are free or in use. Lock must be held when calling this. 5895 * cmd_free() is the complement. 5896 * This function never gives up and returns NULL. If it hangs, 5897 * another thread must call cmd_free() to free some tags. 5898 */ 5899 5900 static struct CommandList *cmd_alloc(struct ctlr_info *h) 5901 { 5902 struct CommandList *c; 5903 int refcount, i; 5904 int offset = 0; 5905 5906 /* 5907 * There is some *extremely* small but non-zero chance that that 5908 * multiple threads could get in here, and one thread could 5909 * be scanning through the list of bits looking for a free 5910 * one, but the free ones are always behind him, and other 5911 * threads sneak in behind him and eat them before he can 5912 * get to them, so that while there is always a free one, a 5913 * very unlucky thread might be starved anyway, never able to 5914 * beat the other threads. In reality, this happens so 5915 * infrequently as to be indistinguishable from never. 5916 * 5917 * Note that we start allocating commands before the SCSI host structure 5918 * is initialized. Since the search starts at bit zero, this 5919 * all works, since we have at least one command structure available; 5920 * however, it means that the structures with the low indexes have to be 5921 * reserved for driver-initiated requests, while requests from the block 5922 * layer will use the higher indexes. 5923 */ 5924 5925 for (;;) { 5926 i = find_next_zero_bit(h->cmd_pool_bits, 5927 HPSA_NRESERVED_CMDS, 5928 offset); 5929 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 5930 offset = 0; 5931 continue; 5932 } 5933 c = h->cmd_pool + i; 5934 refcount = atomic_inc_return(&c->refcount); 5935 if (unlikely(refcount > 1)) { 5936 cmd_free(h, c); /* already in use */ 5937 offset = (i + 1) % HPSA_NRESERVED_CMDS; 5938 continue; 5939 } 5940 set_bit(i & (BITS_PER_LONG - 1), 5941 h->cmd_pool_bits + (i / BITS_PER_LONG)); 5942 break; /* it's ours now. */ 5943 } 5944 hpsa_cmd_partial_init(h, i, c); 5945 return c; 5946 } 5947 5948 /* 5949 * This is the complementary operation to cmd_alloc(). Note, however, in some 5950 * corner cases it may also be used to free blocks allocated by 5951 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 5952 * the clear-bit is harmless. 5953 */ 5954 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 5955 { 5956 if (atomic_dec_and_test(&c->refcount)) { 5957 int i; 5958 5959 i = c - h->cmd_pool; 5960 clear_bit(i & (BITS_PER_LONG - 1), 5961 h->cmd_pool_bits + (i / BITS_PER_LONG)); 5962 } 5963 } 5964 5965 #ifdef CONFIG_COMPAT 5966 5967 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 5968 void __user *arg) 5969 { 5970 IOCTL32_Command_struct __user *arg32 = 5971 (IOCTL32_Command_struct __user *) arg; 5972 IOCTL_Command_struct arg64; 5973 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 5974 int err; 5975 u32 cp; 5976 5977 memset(&arg64, 0, sizeof(arg64)); 5978 err = 0; 5979 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 5980 sizeof(arg64.LUN_info)); 5981 err |= copy_from_user(&arg64.Request, &arg32->Request, 5982 sizeof(arg64.Request)); 5983 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 5984 sizeof(arg64.error_info)); 5985 err |= get_user(arg64.buf_size, &arg32->buf_size); 5986 err |= get_user(cp, &arg32->buf); 5987 arg64.buf = compat_ptr(cp); 5988 err |= copy_to_user(p, &arg64, sizeof(arg64)); 5989 5990 if (err) 5991 return -EFAULT; 5992 5993 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 5994 if (err) 5995 return err; 5996 err |= copy_in_user(&arg32->error_info, &p->error_info, 5997 sizeof(arg32->error_info)); 5998 if (err) 5999 return -EFAULT; 6000 return err; 6001 } 6002 6003 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6004 int cmd, void __user *arg) 6005 { 6006 BIG_IOCTL32_Command_struct __user *arg32 = 6007 (BIG_IOCTL32_Command_struct __user *) arg; 6008 BIG_IOCTL_Command_struct arg64; 6009 BIG_IOCTL_Command_struct __user *p = 6010 compat_alloc_user_space(sizeof(arg64)); 6011 int err; 6012 u32 cp; 6013 6014 memset(&arg64, 0, sizeof(arg64)); 6015 err = 0; 6016 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6017 sizeof(arg64.LUN_info)); 6018 err |= copy_from_user(&arg64.Request, &arg32->Request, 6019 sizeof(arg64.Request)); 6020 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6021 sizeof(arg64.error_info)); 6022 err |= get_user(arg64.buf_size, &arg32->buf_size); 6023 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6024 err |= get_user(cp, &arg32->buf); 6025 arg64.buf = compat_ptr(cp); 6026 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6027 6028 if (err) 6029 return -EFAULT; 6030 6031 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6032 if (err) 6033 return err; 6034 err |= copy_in_user(&arg32->error_info, &p->error_info, 6035 sizeof(arg32->error_info)); 6036 if (err) 6037 return -EFAULT; 6038 return err; 6039 } 6040 6041 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6042 { 6043 switch (cmd) { 6044 case CCISS_GETPCIINFO: 6045 case CCISS_GETINTINFO: 6046 case CCISS_SETINTINFO: 6047 case CCISS_GETNODENAME: 6048 case CCISS_SETNODENAME: 6049 case CCISS_GETHEARTBEAT: 6050 case CCISS_GETBUSTYPES: 6051 case CCISS_GETFIRMVER: 6052 case CCISS_GETDRIVVER: 6053 case CCISS_REVALIDVOLS: 6054 case CCISS_DEREGDISK: 6055 case CCISS_REGNEWDISK: 6056 case CCISS_REGNEWD: 6057 case CCISS_RESCANDISK: 6058 case CCISS_GETLUNINFO: 6059 return hpsa_ioctl(dev, cmd, arg); 6060 6061 case CCISS_PASSTHRU32: 6062 return hpsa_ioctl32_passthru(dev, cmd, arg); 6063 case CCISS_BIG_PASSTHRU32: 6064 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6065 6066 default: 6067 return -ENOIOCTLCMD; 6068 } 6069 } 6070 #endif 6071 6072 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6073 { 6074 struct hpsa_pci_info pciinfo; 6075 6076 if (!argp) 6077 return -EINVAL; 6078 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6079 pciinfo.bus = h->pdev->bus->number; 6080 pciinfo.dev_fn = h->pdev->devfn; 6081 pciinfo.board_id = h->board_id; 6082 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6083 return -EFAULT; 6084 return 0; 6085 } 6086 6087 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6088 { 6089 DriverVer_type DriverVer; 6090 unsigned char vmaj, vmin, vsubmin; 6091 int rc; 6092 6093 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6094 &vmaj, &vmin, &vsubmin); 6095 if (rc != 3) { 6096 dev_info(&h->pdev->dev, "driver version string '%s' " 6097 "unrecognized.", HPSA_DRIVER_VERSION); 6098 vmaj = 0; 6099 vmin = 0; 6100 vsubmin = 0; 6101 } 6102 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6103 if (!argp) 6104 return -EINVAL; 6105 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6106 return -EFAULT; 6107 return 0; 6108 } 6109 6110 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6111 { 6112 IOCTL_Command_struct iocommand; 6113 struct CommandList *c; 6114 char *buff = NULL; 6115 u64 temp64; 6116 int rc = 0; 6117 6118 if (!argp) 6119 return -EINVAL; 6120 if (!capable(CAP_SYS_RAWIO)) 6121 return -EPERM; 6122 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6123 return -EFAULT; 6124 if ((iocommand.buf_size < 1) && 6125 (iocommand.Request.Type.Direction != XFER_NONE)) { 6126 return -EINVAL; 6127 } 6128 if (iocommand.buf_size > 0) { 6129 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6130 if (buff == NULL) 6131 return -ENOMEM; 6132 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6133 /* Copy the data into the buffer we created */ 6134 if (copy_from_user(buff, iocommand.buf, 6135 iocommand.buf_size)) { 6136 rc = -EFAULT; 6137 goto out_kfree; 6138 } 6139 } else { 6140 memset(buff, 0, iocommand.buf_size); 6141 } 6142 } 6143 c = cmd_alloc(h); 6144 6145 /* Fill in the command type */ 6146 c->cmd_type = CMD_IOCTL_PEND; 6147 c->scsi_cmd = SCSI_CMD_BUSY; 6148 /* Fill in Command Header */ 6149 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6150 if (iocommand.buf_size > 0) { /* buffer to fill */ 6151 c->Header.SGList = 1; 6152 c->Header.SGTotal = cpu_to_le16(1); 6153 } else { /* no buffers to fill */ 6154 c->Header.SGList = 0; 6155 c->Header.SGTotal = cpu_to_le16(0); 6156 } 6157 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6158 6159 /* Fill in Request block */ 6160 memcpy(&c->Request, &iocommand.Request, 6161 sizeof(c->Request)); 6162 6163 /* Fill in the scatter gather information */ 6164 if (iocommand.buf_size > 0) { 6165 temp64 = pci_map_single(h->pdev, buff, 6166 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6167 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6168 c->SG[0].Addr = cpu_to_le64(0); 6169 c->SG[0].Len = cpu_to_le32(0); 6170 rc = -ENOMEM; 6171 goto out; 6172 } 6173 c->SG[0].Addr = cpu_to_le64(temp64); 6174 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6175 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6176 } 6177 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6178 NO_TIMEOUT); 6179 if (iocommand.buf_size > 0) 6180 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6181 check_ioctl_unit_attention(h, c); 6182 if (rc) { 6183 rc = -EIO; 6184 goto out; 6185 } 6186 6187 /* Copy the error information out */ 6188 memcpy(&iocommand.error_info, c->err_info, 6189 sizeof(iocommand.error_info)); 6190 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6191 rc = -EFAULT; 6192 goto out; 6193 } 6194 if ((iocommand.Request.Type.Direction & XFER_READ) && 6195 iocommand.buf_size > 0) { 6196 /* Copy the data out of the buffer we created */ 6197 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6198 rc = -EFAULT; 6199 goto out; 6200 } 6201 } 6202 out: 6203 cmd_free(h, c); 6204 out_kfree: 6205 kfree(buff); 6206 return rc; 6207 } 6208 6209 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6210 { 6211 BIG_IOCTL_Command_struct *ioc; 6212 struct CommandList *c; 6213 unsigned char **buff = NULL; 6214 int *buff_size = NULL; 6215 u64 temp64; 6216 BYTE sg_used = 0; 6217 int status = 0; 6218 u32 left; 6219 u32 sz; 6220 BYTE __user *data_ptr; 6221 6222 if (!argp) 6223 return -EINVAL; 6224 if (!capable(CAP_SYS_RAWIO)) 6225 return -EPERM; 6226 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6227 if (!ioc) { 6228 status = -ENOMEM; 6229 goto cleanup1; 6230 } 6231 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6232 status = -EFAULT; 6233 goto cleanup1; 6234 } 6235 if ((ioc->buf_size < 1) && 6236 (ioc->Request.Type.Direction != XFER_NONE)) { 6237 status = -EINVAL; 6238 goto cleanup1; 6239 } 6240 /* Check kmalloc limits using all SGs */ 6241 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6242 status = -EINVAL; 6243 goto cleanup1; 6244 } 6245 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6246 status = -EINVAL; 6247 goto cleanup1; 6248 } 6249 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6250 if (!buff) { 6251 status = -ENOMEM; 6252 goto cleanup1; 6253 } 6254 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6255 if (!buff_size) { 6256 status = -ENOMEM; 6257 goto cleanup1; 6258 } 6259 left = ioc->buf_size; 6260 data_ptr = ioc->buf; 6261 while (left) { 6262 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6263 buff_size[sg_used] = sz; 6264 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6265 if (buff[sg_used] == NULL) { 6266 status = -ENOMEM; 6267 goto cleanup1; 6268 } 6269 if (ioc->Request.Type.Direction & XFER_WRITE) { 6270 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6271 status = -EFAULT; 6272 goto cleanup1; 6273 } 6274 } else 6275 memset(buff[sg_used], 0, sz); 6276 left -= sz; 6277 data_ptr += sz; 6278 sg_used++; 6279 } 6280 c = cmd_alloc(h); 6281 6282 c->cmd_type = CMD_IOCTL_PEND; 6283 c->scsi_cmd = SCSI_CMD_BUSY; 6284 c->Header.ReplyQueue = 0; 6285 c->Header.SGList = (u8) sg_used; 6286 c->Header.SGTotal = cpu_to_le16(sg_used); 6287 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6288 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6289 if (ioc->buf_size > 0) { 6290 int i; 6291 for (i = 0; i < sg_used; i++) { 6292 temp64 = pci_map_single(h->pdev, buff[i], 6293 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6294 if (dma_mapping_error(&h->pdev->dev, 6295 (dma_addr_t) temp64)) { 6296 c->SG[i].Addr = cpu_to_le64(0); 6297 c->SG[i].Len = cpu_to_le32(0); 6298 hpsa_pci_unmap(h->pdev, c, i, 6299 PCI_DMA_BIDIRECTIONAL); 6300 status = -ENOMEM; 6301 goto cleanup0; 6302 } 6303 c->SG[i].Addr = cpu_to_le64(temp64); 6304 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6305 c->SG[i].Ext = cpu_to_le32(0); 6306 } 6307 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6308 } 6309 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6310 NO_TIMEOUT); 6311 if (sg_used) 6312 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6313 check_ioctl_unit_attention(h, c); 6314 if (status) { 6315 status = -EIO; 6316 goto cleanup0; 6317 } 6318 6319 /* Copy the error information out */ 6320 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6321 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6322 status = -EFAULT; 6323 goto cleanup0; 6324 } 6325 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6326 int i; 6327 6328 /* Copy the data out of the buffer we created */ 6329 BYTE __user *ptr = ioc->buf; 6330 for (i = 0; i < sg_used; i++) { 6331 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6332 status = -EFAULT; 6333 goto cleanup0; 6334 } 6335 ptr += buff_size[i]; 6336 } 6337 } 6338 status = 0; 6339 cleanup0: 6340 cmd_free(h, c); 6341 cleanup1: 6342 if (buff) { 6343 int i; 6344 6345 for (i = 0; i < sg_used; i++) 6346 kfree(buff[i]); 6347 kfree(buff); 6348 } 6349 kfree(buff_size); 6350 kfree(ioc); 6351 return status; 6352 } 6353 6354 static void check_ioctl_unit_attention(struct ctlr_info *h, 6355 struct CommandList *c) 6356 { 6357 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6358 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6359 (void) check_for_unit_attention(h, c); 6360 } 6361 6362 /* 6363 * ioctl 6364 */ 6365 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6366 { 6367 struct ctlr_info *h; 6368 void __user *argp = (void __user *)arg; 6369 int rc; 6370 6371 h = sdev_to_hba(dev); 6372 6373 switch (cmd) { 6374 case CCISS_DEREGDISK: 6375 case CCISS_REGNEWDISK: 6376 case CCISS_REGNEWD: 6377 hpsa_scan_start(h->scsi_host); 6378 return 0; 6379 case CCISS_GETPCIINFO: 6380 return hpsa_getpciinfo_ioctl(h, argp); 6381 case CCISS_GETDRIVVER: 6382 return hpsa_getdrivver_ioctl(h, argp); 6383 case CCISS_PASSTHRU: 6384 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6385 return -EAGAIN; 6386 rc = hpsa_passthru_ioctl(h, argp); 6387 atomic_inc(&h->passthru_cmds_avail); 6388 return rc; 6389 case CCISS_BIG_PASSTHRU: 6390 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6391 return -EAGAIN; 6392 rc = hpsa_big_passthru_ioctl(h, argp); 6393 atomic_inc(&h->passthru_cmds_avail); 6394 return rc; 6395 default: 6396 return -ENOTTY; 6397 } 6398 } 6399 6400 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6401 u8 reset_type) 6402 { 6403 struct CommandList *c; 6404 6405 c = cmd_alloc(h); 6406 6407 /* fill_cmd can't fail here, no data buffer to map */ 6408 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6409 RAID_CTLR_LUNID, TYPE_MSG); 6410 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6411 c->waiting = NULL; 6412 enqueue_cmd_and_start_io(h, c); 6413 /* Don't wait for completion, the reset won't complete. Don't free 6414 * the command either. This is the last command we will send before 6415 * re-initializing everything, so it doesn't matter and won't leak. 6416 */ 6417 return; 6418 } 6419 6420 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6421 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6422 int cmd_type) 6423 { 6424 int pci_dir = XFER_NONE; 6425 6426 c->cmd_type = CMD_IOCTL_PEND; 6427 c->scsi_cmd = SCSI_CMD_BUSY; 6428 c->Header.ReplyQueue = 0; 6429 if (buff != NULL && size > 0) { 6430 c->Header.SGList = 1; 6431 c->Header.SGTotal = cpu_to_le16(1); 6432 } else { 6433 c->Header.SGList = 0; 6434 c->Header.SGTotal = cpu_to_le16(0); 6435 } 6436 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6437 6438 if (cmd_type == TYPE_CMD) { 6439 switch (cmd) { 6440 case HPSA_INQUIRY: 6441 /* are we trying to read a vital product page */ 6442 if (page_code & VPD_PAGE) { 6443 c->Request.CDB[1] = 0x01; 6444 c->Request.CDB[2] = (page_code & 0xff); 6445 } 6446 c->Request.CDBLen = 6; 6447 c->Request.type_attr_dir = 6448 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6449 c->Request.Timeout = 0; 6450 c->Request.CDB[0] = HPSA_INQUIRY; 6451 c->Request.CDB[4] = size & 0xFF; 6452 break; 6453 case HPSA_REPORT_LOG: 6454 case HPSA_REPORT_PHYS: 6455 /* Talking to controller so It's a physical command 6456 mode = 00 target = 0. Nothing to write. 6457 */ 6458 c->Request.CDBLen = 12; 6459 c->Request.type_attr_dir = 6460 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6461 c->Request.Timeout = 0; 6462 c->Request.CDB[0] = cmd; 6463 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6464 c->Request.CDB[7] = (size >> 16) & 0xFF; 6465 c->Request.CDB[8] = (size >> 8) & 0xFF; 6466 c->Request.CDB[9] = size & 0xFF; 6467 break; 6468 case BMIC_SENSE_DIAG_OPTIONS: 6469 c->Request.CDBLen = 16; 6470 c->Request.type_attr_dir = 6471 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6472 c->Request.Timeout = 0; 6473 /* Spec says this should be BMIC_WRITE */ 6474 c->Request.CDB[0] = BMIC_READ; 6475 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6476 break; 6477 case BMIC_SET_DIAG_OPTIONS: 6478 c->Request.CDBLen = 16; 6479 c->Request.type_attr_dir = 6480 TYPE_ATTR_DIR(cmd_type, 6481 ATTR_SIMPLE, XFER_WRITE); 6482 c->Request.Timeout = 0; 6483 c->Request.CDB[0] = BMIC_WRITE; 6484 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6485 break; 6486 case HPSA_CACHE_FLUSH: 6487 c->Request.CDBLen = 12; 6488 c->Request.type_attr_dir = 6489 TYPE_ATTR_DIR(cmd_type, 6490 ATTR_SIMPLE, XFER_WRITE); 6491 c->Request.Timeout = 0; 6492 c->Request.CDB[0] = BMIC_WRITE; 6493 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6494 c->Request.CDB[7] = (size >> 8) & 0xFF; 6495 c->Request.CDB[8] = size & 0xFF; 6496 break; 6497 case TEST_UNIT_READY: 6498 c->Request.CDBLen = 6; 6499 c->Request.type_attr_dir = 6500 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6501 c->Request.Timeout = 0; 6502 break; 6503 case HPSA_GET_RAID_MAP: 6504 c->Request.CDBLen = 12; 6505 c->Request.type_attr_dir = 6506 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6507 c->Request.Timeout = 0; 6508 c->Request.CDB[0] = HPSA_CISS_READ; 6509 c->Request.CDB[1] = cmd; 6510 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6511 c->Request.CDB[7] = (size >> 16) & 0xFF; 6512 c->Request.CDB[8] = (size >> 8) & 0xFF; 6513 c->Request.CDB[9] = size & 0xFF; 6514 break; 6515 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6516 c->Request.CDBLen = 10; 6517 c->Request.type_attr_dir = 6518 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6519 c->Request.Timeout = 0; 6520 c->Request.CDB[0] = BMIC_READ; 6521 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6522 c->Request.CDB[7] = (size >> 16) & 0xFF; 6523 c->Request.CDB[8] = (size >> 8) & 0xFF; 6524 break; 6525 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6526 c->Request.CDBLen = 10; 6527 c->Request.type_attr_dir = 6528 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6529 c->Request.Timeout = 0; 6530 c->Request.CDB[0] = BMIC_READ; 6531 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6532 c->Request.CDB[7] = (size >> 16) & 0xFF; 6533 c->Request.CDB[8] = (size >> 8) & 0XFF; 6534 break; 6535 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6536 c->Request.CDBLen = 10; 6537 c->Request.type_attr_dir = 6538 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6539 c->Request.Timeout = 0; 6540 c->Request.CDB[0] = BMIC_READ; 6541 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6542 c->Request.CDB[7] = (size >> 16) & 0xFF; 6543 c->Request.CDB[8] = (size >> 8) & 0XFF; 6544 break; 6545 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6546 c->Request.CDBLen = 10; 6547 c->Request.type_attr_dir = 6548 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6549 c->Request.Timeout = 0; 6550 c->Request.CDB[0] = BMIC_READ; 6551 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6552 c->Request.CDB[7] = (size >> 16) & 0xFF; 6553 c->Request.CDB[8] = (size >> 8) & 0XFF; 6554 break; 6555 case BMIC_IDENTIFY_CONTROLLER: 6556 c->Request.CDBLen = 10; 6557 c->Request.type_attr_dir = 6558 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6559 c->Request.Timeout = 0; 6560 c->Request.CDB[0] = BMIC_READ; 6561 c->Request.CDB[1] = 0; 6562 c->Request.CDB[2] = 0; 6563 c->Request.CDB[3] = 0; 6564 c->Request.CDB[4] = 0; 6565 c->Request.CDB[5] = 0; 6566 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6567 c->Request.CDB[7] = (size >> 16) & 0xFF; 6568 c->Request.CDB[8] = (size >> 8) & 0XFF; 6569 c->Request.CDB[9] = 0; 6570 break; 6571 default: 6572 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6573 BUG(); 6574 return -1; 6575 } 6576 } else if (cmd_type == TYPE_MSG) { 6577 switch (cmd) { 6578 6579 case HPSA_PHYS_TARGET_RESET: 6580 c->Request.CDBLen = 16; 6581 c->Request.type_attr_dir = 6582 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6583 c->Request.Timeout = 0; /* Don't time out */ 6584 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6585 c->Request.CDB[0] = HPSA_RESET; 6586 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6587 /* Physical target reset needs no control bytes 4-7*/ 6588 c->Request.CDB[4] = 0x00; 6589 c->Request.CDB[5] = 0x00; 6590 c->Request.CDB[6] = 0x00; 6591 c->Request.CDB[7] = 0x00; 6592 break; 6593 case HPSA_DEVICE_RESET_MSG: 6594 c->Request.CDBLen = 16; 6595 c->Request.type_attr_dir = 6596 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6597 c->Request.Timeout = 0; /* Don't time out */ 6598 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6599 c->Request.CDB[0] = cmd; 6600 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6601 /* If bytes 4-7 are zero, it means reset the */ 6602 /* LunID device */ 6603 c->Request.CDB[4] = 0x00; 6604 c->Request.CDB[5] = 0x00; 6605 c->Request.CDB[6] = 0x00; 6606 c->Request.CDB[7] = 0x00; 6607 break; 6608 default: 6609 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6610 cmd); 6611 BUG(); 6612 } 6613 } else { 6614 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6615 BUG(); 6616 } 6617 6618 switch (GET_DIR(c->Request.type_attr_dir)) { 6619 case XFER_READ: 6620 pci_dir = PCI_DMA_FROMDEVICE; 6621 break; 6622 case XFER_WRITE: 6623 pci_dir = PCI_DMA_TODEVICE; 6624 break; 6625 case XFER_NONE: 6626 pci_dir = PCI_DMA_NONE; 6627 break; 6628 default: 6629 pci_dir = PCI_DMA_BIDIRECTIONAL; 6630 } 6631 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6632 return -1; 6633 return 0; 6634 } 6635 6636 /* 6637 * Map (physical) PCI mem into (virtual) kernel space 6638 */ 6639 static void __iomem *remap_pci_mem(ulong base, ulong size) 6640 { 6641 ulong page_base = ((ulong) base) & PAGE_MASK; 6642 ulong page_offs = ((ulong) base) - page_base; 6643 void __iomem *page_remapped = ioremap_nocache(page_base, 6644 page_offs + size); 6645 6646 return page_remapped ? (page_remapped + page_offs) : NULL; 6647 } 6648 6649 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6650 { 6651 return h->access.command_completed(h, q); 6652 } 6653 6654 static inline bool interrupt_pending(struct ctlr_info *h) 6655 { 6656 return h->access.intr_pending(h); 6657 } 6658 6659 static inline long interrupt_not_for_us(struct ctlr_info *h) 6660 { 6661 return (h->access.intr_pending(h) == 0) || 6662 (h->interrupts_enabled == 0); 6663 } 6664 6665 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6666 u32 raw_tag) 6667 { 6668 if (unlikely(tag_index >= h->nr_cmds)) { 6669 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6670 return 1; 6671 } 6672 return 0; 6673 } 6674 6675 static inline void finish_cmd(struct CommandList *c) 6676 { 6677 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6678 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6679 || c->cmd_type == CMD_IOACCEL2)) 6680 complete_scsi_command(c); 6681 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6682 complete(c->waiting); 6683 } 6684 6685 /* process completion of an indexed ("direct lookup") command */ 6686 static inline void process_indexed_cmd(struct ctlr_info *h, 6687 u32 raw_tag) 6688 { 6689 u32 tag_index; 6690 struct CommandList *c; 6691 6692 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6693 if (!bad_tag(h, tag_index, raw_tag)) { 6694 c = h->cmd_pool + tag_index; 6695 finish_cmd(c); 6696 } 6697 } 6698 6699 /* Some controllers, like p400, will give us one interrupt 6700 * after a soft reset, even if we turned interrupts off. 6701 * Only need to check for this in the hpsa_xxx_discard_completions 6702 * functions. 6703 */ 6704 static int ignore_bogus_interrupt(struct ctlr_info *h) 6705 { 6706 if (likely(!reset_devices)) 6707 return 0; 6708 6709 if (likely(h->interrupts_enabled)) 6710 return 0; 6711 6712 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6713 "(known firmware bug.) Ignoring.\n"); 6714 6715 return 1; 6716 } 6717 6718 /* 6719 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6720 * Relies on (h-q[x] == x) being true for x such that 6721 * 0 <= x < MAX_REPLY_QUEUES. 6722 */ 6723 static struct ctlr_info *queue_to_hba(u8 *queue) 6724 { 6725 return container_of((queue - *queue), struct ctlr_info, q[0]); 6726 } 6727 6728 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6729 { 6730 struct ctlr_info *h = queue_to_hba(queue); 6731 u8 q = *(u8 *) queue; 6732 u32 raw_tag; 6733 6734 if (ignore_bogus_interrupt(h)) 6735 return IRQ_NONE; 6736 6737 if (interrupt_not_for_us(h)) 6738 return IRQ_NONE; 6739 h->last_intr_timestamp = get_jiffies_64(); 6740 while (interrupt_pending(h)) { 6741 raw_tag = get_next_completion(h, q); 6742 while (raw_tag != FIFO_EMPTY) 6743 raw_tag = next_command(h, q); 6744 } 6745 return IRQ_HANDLED; 6746 } 6747 6748 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6749 { 6750 struct ctlr_info *h = queue_to_hba(queue); 6751 u32 raw_tag; 6752 u8 q = *(u8 *) queue; 6753 6754 if (ignore_bogus_interrupt(h)) 6755 return IRQ_NONE; 6756 6757 h->last_intr_timestamp = get_jiffies_64(); 6758 raw_tag = get_next_completion(h, q); 6759 while (raw_tag != FIFO_EMPTY) 6760 raw_tag = next_command(h, q); 6761 return IRQ_HANDLED; 6762 } 6763 6764 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6765 { 6766 struct ctlr_info *h = queue_to_hba((u8 *) queue); 6767 u32 raw_tag; 6768 u8 q = *(u8 *) queue; 6769 6770 if (interrupt_not_for_us(h)) 6771 return IRQ_NONE; 6772 h->last_intr_timestamp = get_jiffies_64(); 6773 while (interrupt_pending(h)) { 6774 raw_tag = get_next_completion(h, q); 6775 while (raw_tag != FIFO_EMPTY) { 6776 process_indexed_cmd(h, raw_tag); 6777 raw_tag = next_command(h, q); 6778 } 6779 } 6780 return IRQ_HANDLED; 6781 } 6782 6783 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 6784 { 6785 struct ctlr_info *h = queue_to_hba(queue); 6786 u32 raw_tag; 6787 u8 q = *(u8 *) queue; 6788 6789 h->last_intr_timestamp = get_jiffies_64(); 6790 raw_tag = get_next_completion(h, q); 6791 while (raw_tag != FIFO_EMPTY) { 6792 process_indexed_cmd(h, raw_tag); 6793 raw_tag = next_command(h, q); 6794 } 6795 return IRQ_HANDLED; 6796 } 6797 6798 /* Send a message CDB to the firmware. Careful, this only works 6799 * in simple mode, not performant mode due to the tag lookup. 6800 * We only ever use this immediately after a controller reset. 6801 */ 6802 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6803 unsigned char type) 6804 { 6805 struct Command { 6806 struct CommandListHeader CommandHeader; 6807 struct RequestBlock Request; 6808 struct ErrDescriptor ErrorDescriptor; 6809 }; 6810 struct Command *cmd; 6811 static const size_t cmd_sz = sizeof(*cmd) + 6812 sizeof(cmd->ErrorDescriptor); 6813 dma_addr_t paddr64; 6814 __le32 paddr32; 6815 u32 tag; 6816 void __iomem *vaddr; 6817 int i, err; 6818 6819 vaddr = pci_ioremap_bar(pdev, 0); 6820 if (vaddr == NULL) 6821 return -ENOMEM; 6822 6823 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6824 * CCISS commands, so they must be allocated from the lower 4GiB of 6825 * memory. 6826 */ 6827 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 6828 if (err) { 6829 iounmap(vaddr); 6830 return err; 6831 } 6832 6833 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 6834 if (cmd == NULL) { 6835 iounmap(vaddr); 6836 return -ENOMEM; 6837 } 6838 6839 /* This must fit, because of the 32-bit consistent DMA mask. Also, 6840 * although there's no guarantee, we assume that the address is at 6841 * least 4-byte aligned (most likely, it's page-aligned). 6842 */ 6843 paddr32 = cpu_to_le32(paddr64); 6844 6845 cmd->CommandHeader.ReplyQueue = 0; 6846 cmd->CommandHeader.SGList = 0; 6847 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 6848 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 6849 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 6850 6851 cmd->Request.CDBLen = 16; 6852 cmd->Request.type_attr_dir = 6853 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 6854 cmd->Request.Timeout = 0; /* Don't time out */ 6855 cmd->Request.CDB[0] = opcode; 6856 cmd->Request.CDB[1] = type; 6857 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 6858 cmd->ErrorDescriptor.Addr = 6859 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 6860 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 6861 6862 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 6863 6864 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 6865 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 6866 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 6867 break; 6868 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 6869 } 6870 6871 iounmap(vaddr); 6872 6873 /* we leak the DMA buffer here ... no choice since the controller could 6874 * still complete the command. 6875 */ 6876 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 6877 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 6878 opcode, type); 6879 return -ETIMEDOUT; 6880 } 6881 6882 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 6883 6884 if (tag & HPSA_ERROR_BIT) { 6885 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 6886 opcode, type); 6887 return -EIO; 6888 } 6889 6890 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 6891 opcode, type); 6892 return 0; 6893 } 6894 6895 #define hpsa_noop(p) hpsa_message(p, 3, 0) 6896 6897 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 6898 void __iomem *vaddr, u32 use_doorbell) 6899 { 6900 6901 if (use_doorbell) { 6902 /* For everything after the P600, the PCI power state method 6903 * of resetting the controller doesn't work, so we have this 6904 * other way using the doorbell register. 6905 */ 6906 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 6907 writel(use_doorbell, vaddr + SA5_DOORBELL); 6908 6909 /* PMC hardware guys tell us we need a 10 second delay after 6910 * doorbell reset and before any attempt to talk to the board 6911 * at all to ensure that this actually works and doesn't fall 6912 * over in some weird corner cases. 6913 */ 6914 msleep(10000); 6915 } else { /* Try to do it the PCI power state way */ 6916 6917 /* Quoting from the Open CISS Specification: "The Power 6918 * Management Control/Status Register (CSR) controls the power 6919 * state of the device. The normal operating state is D0, 6920 * CSR=00h. The software off state is D3, CSR=03h. To reset 6921 * the controller, place the interface device in D3 then to D0, 6922 * this causes a secondary PCI reset which will reset the 6923 * controller." */ 6924 6925 int rc = 0; 6926 6927 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 6928 6929 /* enter the D3hot power management state */ 6930 rc = pci_set_power_state(pdev, PCI_D3hot); 6931 if (rc) 6932 return rc; 6933 6934 msleep(500); 6935 6936 /* enter the D0 power management state */ 6937 rc = pci_set_power_state(pdev, PCI_D0); 6938 if (rc) 6939 return rc; 6940 6941 /* 6942 * The P600 requires a small delay when changing states. 6943 * Otherwise we may think the board did not reset and we bail. 6944 * This for kdump only and is particular to the P600. 6945 */ 6946 msleep(500); 6947 } 6948 return 0; 6949 } 6950 6951 static void init_driver_version(char *driver_version, int len) 6952 { 6953 memset(driver_version, 0, len); 6954 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 6955 } 6956 6957 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 6958 { 6959 char *driver_version; 6960 int i, size = sizeof(cfgtable->driver_version); 6961 6962 driver_version = kmalloc(size, GFP_KERNEL); 6963 if (!driver_version) 6964 return -ENOMEM; 6965 6966 init_driver_version(driver_version, size); 6967 for (i = 0; i < size; i++) 6968 writeb(driver_version[i], &cfgtable->driver_version[i]); 6969 kfree(driver_version); 6970 return 0; 6971 } 6972 6973 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 6974 unsigned char *driver_ver) 6975 { 6976 int i; 6977 6978 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 6979 driver_ver[i] = readb(&cfgtable->driver_version[i]); 6980 } 6981 6982 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 6983 { 6984 6985 char *driver_ver, *old_driver_ver; 6986 int rc, size = sizeof(cfgtable->driver_version); 6987 6988 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 6989 if (!old_driver_ver) 6990 return -ENOMEM; 6991 driver_ver = old_driver_ver + size; 6992 6993 /* After a reset, the 32 bytes of "driver version" in the cfgtable 6994 * should have been changed, otherwise we know the reset failed. 6995 */ 6996 init_driver_version(old_driver_ver, size); 6997 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 6998 rc = !memcmp(driver_ver, old_driver_ver, size); 6999 kfree(old_driver_ver); 7000 return rc; 7001 } 7002 /* This does a hard reset of the controller using PCI power management 7003 * states or the using the doorbell register. 7004 */ 7005 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7006 { 7007 u64 cfg_offset; 7008 u32 cfg_base_addr; 7009 u64 cfg_base_addr_index; 7010 void __iomem *vaddr; 7011 unsigned long paddr; 7012 u32 misc_fw_support; 7013 int rc; 7014 struct CfgTable __iomem *cfgtable; 7015 u32 use_doorbell; 7016 u16 command_register; 7017 7018 /* For controllers as old as the P600, this is very nearly 7019 * the same thing as 7020 * 7021 * pci_save_state(pci_dev); 7022 * pci_set_power_state(pci_dev, PCI_D3hot); 7023 * pci_set_power_state(pci_dev, PCI_D0); 7024 * pci_restore_state(pci_dev); 7025 * 7026 * For controllers newer than the P600, the pci power state 7027 * method of resetting doesn't work so we have another way 7028 * using the doorbell register. 7029 */ 7030 7031 if (!ctlr_is_resettable(board_id)) { 7032 dev_warn(&pdev->dev, "Controller not resettable\n"); 7033 return -ENODEV; 7034 } 7035 7036 /* if controller is soft- but not hard resettable... */ 7037 if (!ctlr_is_hard_resettable(board_id)) 7038 return -ENOTSUPP; /* try soft reset later. */ 7039 7040 /* Save the PCI command register */ 7041 pci_read_config_word(pdev, 4, &command_register); 7042 pci_save_state(pdev); 7043 7044 /* find the first memory BAR, so we can find the cfg table */ 7045 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7046 if (rc) 7047 return rc; 7048 vaddr = remap_pci_mem(paddr, 0x250); 7049 if (!vaddr) 7050 return -ENOMEM; 7051 7052 /* find cfgtable in order to check if reset via doorbell is supported */ 7053 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7054 &cfg_base_addr_index, &cfg_offset); 7055 if (rc) 7056 goto unmap_vaddr; 7057 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7058 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7059 if (!cfgtable) { 7060 rc = -ENOMEM; 7061 goto unmap_vaddr; 7062 } 7063 rc = write_driver_ver_to_cfgtable(cfgtable); 7064 if (rc) 7065 goto unmap_cfgtable; 7066 7067 /* If reset via doorbell register is supported, use that. 7068 * There are two such methods. Favor the newest method. 7069 */ 7070 misc_fw_support = readl(&cfgtable->misc_fw_support); 7071 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7072 if (use_doorbell) { 7073 use_doorbell = DOORBELL_CTLR_RESET2; 7074 } else { 7075 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7076 if (use_doorbell) { 7077 dev_warn(&pdev->dev, 7078 "Soft reset not supported. Firmware update is required.\n"); 7079 rc = -ENOTSUPP; /* try soft reset */ 7080 goto unmap_cfgtable; 7081 } 7082 } 7083 7084 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7085 if (rc) 7086 goto unmap_cfgtable; 7087 7088 pci_restore_state(pdev); 7089 pci_write_config_word(pdev, 4, command_register); 7090 7091 /* Some devices (notably the HP Smart Array 5i Controller) 7092 need a little pause here */ 7093 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7094 7095 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7096 if (rc) { 7097 dev_warn(&pdev->dev, 7098 "Failed waiting for board to become ready after hard reset\n"); 7099 goto unmap_cfgtable; 7100 } 7101 7102 rc = controller_reset_failed(vaddr); 7103 if (rc < 0) 7104 goto unmap_cfgtable; 7105 if (rc) { 7106 dev_warn(&pdev->dev, "Unable to successfully reset " 7107 "controller. Will try soft reset.\n"); 7108 rc = -ENOTSUPP; 7109 } else { 7110 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7111 } 7112 7113 unmap_cfgtable: 7114 iounmap(cfgtable); 7115 7116 unmap_vaddr: 7117 iounmap(vaddr); 7118 return rc; 7119 } 7120 7121 /* 7122 * We cannot read the structure directly, for portability we must use 7123 * the io functions. 7124 * This is for debug only. 7125 */ 7126 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7127 { 7128 #ifdef HPSA_DEBUG 7129 int i; 7130 char temp_name[17]; 7131 7132 dev_info(dev, "Controller Configuration information\n"); 7133 dev_info(dev, "------------------------------------\n"); 7134 for (i = 0; i < 4; i++) 7135 temp_name[i] = readb(&(tb->Signature[i])); 7136 temp_name[4] = '\0'; 7137 dev_info(dev, " Signature = %s\n", temp_name); 7138 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7139 dev_info(dev, " Transport methods supported = 0x%x\n", 7140 readl(&(tb->TransportSupport))); 7141 dev_info(dev, " Transport methods active = 0x%x\n", 7142 readl(&(tb->TransportActive))); 7143 dev_info(dev, " Requested transport Method = 0x%x\n", 7144 readl(&(tb->HostWrite.TransportRequest))); 7145 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7146 readl(&(tb->HostWrite.CoalIntDelay))); 7147 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7148 readl(&(tb->HostWrite.CoalIntCount))); 7149 dev_info(dev, " Max outstanding commands = %d\n", 7150 readl(&(tb->CmdsOutMax))); 7151 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7152 for (i = 0; i < 16; i++) 7153 temp_name[i] = readb(&(tb->ServerName[i])); 7154 temp_name[16] = '\0'; 7155 dev_info(dev, " Server Name = %s\n", temp_name); 7156 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7157 readl(&(tb->HeartBeat))); 7158 #endif /* HPSA_DEBUG */ 7159 } 7160 7161 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7162 { 7163 int i, offset, mem_type, bar_type; 7164 7165 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7166 return 0; 7167 offset = 0; 7168 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7169 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7170 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7171 offset += 4; 7172 else { 7173 mem_type = pci_resource_flags(pdev, i) & 7174 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7175 switch (mem_type) { 7176 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7177 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7178 offset += 4; /* 32 bit */ 7179 break; 7180 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7181 offset += 8; 7182 break; 7183 default: /* reserved in PCI 2.2 */ 7184 dev_warn(&pdev->dev, 7185 "base address is invalid\n"); 7186 return -1; 7187 break; 7188 } 7189 } 7190 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7191 return i + 1; 7192 } 7193 return -1; 7194 } 7195 7196 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7197 { 7198 pci_free_irq_vectors(h->pdev); 7199 h->msix_vectors = 0; 7200 } 7201 7202 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7203 * controllers that are capable. If not, we use legacy INTx mode. 7204 */ 7205 static int hpsa_interrupt_mode(struct ctlr_info *h) 7206 { 7207 unsigned int flags = PCI_IRQ_LEGACY; 7208 int ret; 7209 7210 /* Some boards advertise MSI but don't really support it */ 7211 switch (h->board_id) { 7212 case 0x40700E11: 7213 case 0x40800E11: 7214 case 0x40820E11: 7215 case 0x40830E11: 7216 break; 7217 default: 7218 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7219 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7220 if (ret > 0) { 7221 h->msix_vectors = ret; 7222 return 0; 7223 } 7224 7225 flags |= PCI_IRQ_MSI; 7226 break; 7227 } 7228 7229 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7230 if (ret < 0) 7231 return ret; 7232 return 0; 7233 } 7234 7235 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7236 { 7237 int i; 7238 u32 subsystem_vendor_id, subsystem_device_id; 7239 7240 subsystem_vendor_id = pdev->subsystem_vendor; 7241 subsystem_device_id = pdev->subsystem_device; 7242 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7243 subsystem_vendor_id; 7244 7245 for (i = 0; i < ARRAY_SIZE(products); i++) 7246 if (*board_id == products[i].board_id) 7247 return i; 7248 7249 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7250 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7251 !hpsa_allow_any) { 7252 dev_warn(&pdev->dev, "unrecognized board ID: " 7253 "0x%08x, ignoring.\n", *board_id); 7254 return -ENODEV; 7255 } 7256 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7257 } 7258 7259 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7260 unsigned long *memory_bar) 7261 { 7262 int i; 7263 7264 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7265 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7266 /* addressing mode bits already removed */ 7267 *memory_bar = pci_resource_start(pdev, i); 7268 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7269 *memory_bar); 7270 return 0; 7271 } 7272 dev_warn(&pdev->dev, "no memory BAR found\n"); 7273 return -ENODEV; 7274 } 7275 7276 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7277 int wait_for_ready) 7278 { 7279 int i, iterations; 7280 u32 scratchpad; 7281 if (wait_for_ready) 7282 iterations = HPSA_BOARD_READY_ITERATIONS; 7283 else 7284 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7285 7286 for (i = 0; i < iterations; i++) { 7287 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7288 if (wait_for_ready) { 7289 if (scratchpad == HPSA_FIRMWARE_READY) 7290 return 0; 7291 } else { 7292 if (scratchpad != HPSA_FIRMWARE_READY) 7293 return 0; 7294 } 7295 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7296 } 7297 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7298 return -ENODEV; 7299 } 7300 7301 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7302 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7303 u64 *cfg_offset) 7304 { 7305 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7306 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7307 *cfg_base_addr &= (u32) 0x0000ffff; 7308 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7309 if (*cfg_base_addr_index == -1) { 7310 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7311 return -ENODEV; 7312 } 7313 return 0; 7314 } 7315 7316 static void hpsa_free_cfgtables(struct ctlr_info *h) 7317 { 7318 if (h->transtable) { 7319 iounmap(h->transtable); 7320 h->transtable = NULL; 7321 } 7322 if (h->cfgtable) { 7323 iounmap(h->cfgtable); 7324 h->cfgtable = NULL; 7325 } 7326 } 7327 7328 /* Find and map CISS config table and transfer table 7329 + * several items must be unmapped (freed) later 7330 + * */ 7331 static int hpsa_find_cfgtables(struct ctlr_info *h) 7332 { 7333 u64 cfg_offset; 7334 u32 cfg_base_addr; 7335 u64 cfg_base_addr_index; 7336 u32 trans_offset; 7337 int rc; 7338 7339 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7340 &cfg_base_addr_index, &cfg_offset); 7341 if (rc) 7342 return rc; 7343 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7344 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7345 if (!h->cfgtable) { 7346 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7347 return -ENOMEM; 7348 } 7349 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7350 if (rc) 7351 return rc; 7352 /* Find performant mode table. */ 7353 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7354 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7355 cfg_base_addr_index)+cfg_offset+trans_offset, 7356 sizeof(*h->transtable)); 7357 if (!h->transtable) { 7358 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7359 hpsa_free_cfgtables(h); 7360 return -ENOMEM; 7361 } 7362 return 0; 7363 } 7364 7365 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7366 { 7367 #define MIN_MAX_COMMANDS 16 7368 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7369 7370 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7371 7372 /* Limit commands in memory limited kdump scenario. */ 7373 if (reset_devices && h->max_commands > 32) 7374 h->max_commands = 32; 7375 7376 if (h->max_commands < MIN_MAX_COMMANDS) { 7377 dev_warn(&h->pdev->dev, 7378 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7379 h->max_commands, 7380 MIN_MAX_COMMANDS); 7381 h->max_commands = MIN_MAX_COMMANDS; 7382 } 7383 } 7384 7385 /* If the controller reports that the total max sg entries is greater than 512, 7386 * then we know that chained SG blocks work. (Original smart arrays did not 7387 * support chained SG blocks and would return zero for max sg entries.) 7388 */ 7389 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7390 { 7391 return h->maxsgentries > 512; 7392 } 7393 7394 /* Interrogate the hardware for some limits: 7395 * max commands, max SG elements without chaining, and with chaining, 7396 * SG chain block size, etc. 7397 */ 7398 static void hpsa_find_board_params(struct ctlr_info *h) 7399 { 7400 hpsa_get_max_perf_mode_cmds(h); 7401 h->nr_cmds = h->max_commands; 7402 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7403 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7404 if (hpsa_supports_chained_sg_blocks(h)) { 7405 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7406 h->max_cmd_sg_entries = 32; 7407 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7408 h->maxsgentries--; /* save one for chain pointer */ 7409 } else { 7410 /* 7411 * Original smart arrays supported at most 31 s/g entries 7412 * embedded inline in the command (trying to use more 7413 * would lock up the controller) 7414 */ 7415 h->max_cmd_sg_entries = 31; 7416 h->maxsgentries = 31; /* default to traditional values */ 7417 h->chainsize = 0; 7418 } 7419 7420 /* Find out what task management functions are supported and cache */ 7421 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7422 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7423 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7424 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7425 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7426 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7427 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7428 } 7429 7430 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7431 { 7432 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7433 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7434 return false; 7435 } 7436 return true; 7437 } 7438 7439 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7440 { 7441 u32 driver_support; 7442 7443 driver_support = readl(&(h->cfgtable->driver_support)); 7444 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7445 #ifdef CONFIG_X86 7446 driver_support |= ENABLE_SCSI_PREFETCH; 7447 #endif 7448 driver_support |= ENABLE_UNIT_ATTN; 7449 writel(driver_support, &(h->cfgtable->driver_support)); 7450 } 7451 7452 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7453 * in a prefetch beyond physical memory. 7454 */ 7455 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7456 { 7457 u32 dma_prefetch; 7458 7459 if (h->board_id != 0x3225103C) 7460 return; 7461 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7462 dma_prefetch |= 0x8000; 7463 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7464 } 7465 7466 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7467 { 7468 int i; 7469 u32 doorbell_value; 7470 unsigned long flags; 7471 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7472 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7473 spin_lock_irqsave(&h->lock, flags); 7474 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7475 spin_unlock_irqrestore(&h->lock, flags); 7476 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7477 goto done; 7478 /* delay and try again */ 7479 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7480 } 7481 return -ENODEV; 7482 done: 7483 return 0; 7484 } 7485 7486 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7487 { 7488 int i; 7489 u32 doorbell_value; 7490 unsigned long flags; 7491 7492 /* under certain very rare conditions, this can take awhile. 7493 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7494 * as we enter this code.) 7495 */ 7496 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7497 if (h->remove_in_progress) 7498 goto done; 7499 spin_lock_irqsave(&h->lock, flags); 7500 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7501 spin_unlock_irqrestore(&h->lock, flags); 7502 if (!(doorbell_value & CFGTBL_ChangeReq)) 7503 goto done; 7504 /* delay and try again */ 7505 msleep(MODE_CHANGE_WAIT_INTERVAL); 7506 } 7507 return -ENODEV; 7508 done: 7509 return 0; 7510 } 7511 7512 /* return -ENODEV or other reason on error, 0 on success */ 7513 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7514 { 7515 u32 trans_support; 7516 7517 trans_support = readl(&(h->cfgtable->TransportSupport)); 7518 if (!(trans_support & SIMPLE_MODE)) 7519 return -ENOTSUPP; 7520 7521 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7522 7523 /* Update the field, and then ring the doorbell */ 7524 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7525 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7526 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7527 if (hpsa_wait_for_mode_change_ack(h)) 7528 goto error; 7529 print_cfg_table(&h->pdev->dev, h->cfgtable); 7530 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7531 goto error; 7532 h->transMethod = CFGTBL_Trans_Simple; 7533 return 0; 7534 error: 7535 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7536 return -ENODEV; 7537 } 7538 7539 /* free items allocated or mapped by hpsa_pci_init */ 7540 static void hpsa_free_pci_init(struct ctlr_info *h) 7541 { 7542 hpsa_free_cfgtables(h); /* pci_init 4 */ 7543 iounmap(h->vaddr); /* pci_init 3 */ 7544 h->vaddr = NULL; 7545 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7546 /* 7547 * call pci_disable_device before pci_release_regions per 7548 * Documentation/PCI/pci.txt 7549 */ 7550 pci_disable_device(h->pdev); /* pci_init 1 */ 7551 pci_release_regions(h->pdev); /* pci_init 2 */ 7552 } 7553 7554 /* several items must be freed later */ 7555 static int hpsa_pci_init(struct ctlr_info *h) 7556 { 7557 int prod_index, err; 7558 7559 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7560 if (prod_index < 0) 7561 return prod_index; 7562 h->product_name = products[prod_index].product_name; 7563 h->access = *(products[prod_index].access); 7564 7565 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7566 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7567 7568 err = pci_enable_device(h->pdev); 7569 if (err) { 7570 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7571 pci_disable_device(h->pdev); 7572 return err; 7573 } 7574 7575 err = pci_request_regions(h->pdev, HPSA); 7576 if (err) { 7577 dev_err(&h->pdev->dev, 7578 "failed to obtain PCI resources\n"); 7579 pci_disable_device(h->pdev); 7580 return err; 7581 } 7582 7583 pci_set_master(h->pdev); 7584 7585 err = hpsa_interrupt_mode(h); 7586 if (err) 7587 goto clean1; 7588 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7589 if (err) 7590 goto clean2; /* intmode+region, pci */ 7591 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7592 if (!h->vaddr) { 7593 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7594 err = -ENOMEM; 7595 goto clean2; /* intmode+region, pci */ 7596 } 7597 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7598 if (err) 7599 goto clean3; /* vaddr, intmode+region, pci */ 7600 err = hpsa_find_cfgtables(h); 7601 if (err) 7602 goto clean3; /* vaddr, intmode+region, pci */ 7603 hpsa_find_board_params(h); 7604 7605 if (!hpsa_CISS_signature_present(h)) { 7606 err = -ENODEV; 7607 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7608 } 7609 hpsa_set_driver_support_bits(h); 7610 hpsa_p600_dma_prefetch_quirk(h); 7611 err = hpsa_enter_simple_mode(h); 7612 if (err) 7613 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7614 return 0; 7615 7616 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7617 hpsa_free_cfgtables(h); 7618 clean3: /* vaddr, intmode+region, pci */ 7619 iounmap(h->vaddr); 7620 h->vaddr = NULL; 7621 clean2: /* intmode+region, pci */ 7622 hpsa_disable_interrupt_mode(h); 7623 clean1: 7624 /* 7625 * call pci_disable_device before pci_release_regions per 7626 * Documentation/PCI/pci.txt 7627 */ 7628 pci_disable_device(h->pdev); 7629 pci_release_regions(h->pdev); 7630 return err; 7631 } 7632 7633 static void hpsa_hba_inquiry(struct ctlr_info *h) 7634 { 7635 int rc; 7636 7637 #define HBA_INQUIRY_BYTE_COUNT 64 7638 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7639 if (!h->hba_inquiry_data) 7640 return; 7641 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7642 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7643 if (rc != 0) { 7644 kfree(h->hba_inquiry_data); 7645 h->hba_inquiry_data = NULL; 7646 } 7647 } 7648 7649 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7650 { 7651 int rc, i; 7652 void __iomem *vaddr; 7653 7654 if (!reset_devices) 7655 return 0; 7656 7657 /* kdump kernel is loading, we don't know in which state is 7658 * the pci interface. The dev->enable_cnt is equal zero 7659 * so we call enable+disable, wait a while and switch it on. 7660 */ 7661 rc = pci_enable_device(pdev); 7662 if (rc) { 7663 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7664 return -ENODEV; 7665 } 7666 pci_disable_device(pdev); 7667 msleep(260); /* a randomly chosen number */ 7668 rc = pci_enable_device(pdev); 7669 if (rc) { 7670 dev_warn(&pdev->dev, "failed to enable device.\n"); 7671 return -ENODEV; 7672 } 7673 7674 pci_set_master(pdev); 7675 7676 vaddr = pci_ioremap_bar(pdev, 0); 7677 if (vaddr == NULL) { 7678 rc = -ENOMEM; 7679 goto out_disable; 7680 } 7681 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7682 iounmap(vaddr); 7683 7684 /* Reset the controller with a PCI power-cycle or via doorbell */ 7685 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7686 7687 /* -ENOTSUPP here means we cannot reset the controller 7688 * but it's already (and still) up and running in 7689 * "performant mode". Or, it might be 640x, which can't reset 7690 * due to concerns about shared bbwc between 6402/6404 pair. 7691 */ 7692 if (rc) 7693 goto out_disable; 7694 7695 /* Now try to get the controller to respond to a no-op */ 7696 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7697 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7698 if (hpsa_noop(pdev) == 0) 7699 break; 7700 else 7701 dev_warn(&pdev->dev, "no-op failed%s\n", 7702 (i < 11 ? "; re-trying" : "")); 7703 } 7704 7705 out_disable: 7706 7707 pci_disable_device(pdev); 7708 return rc; 7709 } 7710 7711 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7712 { 7713 kfree(h->cmd_pool_bits); 7714 h->cmd_pool_bits = NULL; 7715 if (h->cmd_pool) { 7716 pci_free_consistent(h->pdev, 7717 h->nr_cmds * sizeof(struct CommandList), 7718 h->cmd_pool, 7719 h->cmd_pool_dhandle); 7720 h->cmd_pool = NULL; 7721 h->cmd_pool_dhandle = 0; 7722 } 7723 if (h->errinfo_pool) { 7724 pci_free_consistent(h->pdev, 7725 h->nr_cmds * sizeof(struct ErrorInfo), 7726 h->errinfo_pool, 7727 h->errinfo_pool_dhandle); 7728 h->errinfo_pool = NULL; 7729 h->errinfo_pool_dhandle = 0; 7730 } 7731 } 7732 7733 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 7734 { 7735 h->cmd_pool_bits = kzalloc( 7736 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 7737 sizeof(unsigned long), GFP_KERNEL); 7738 h->cmd_pool = pci_alloc_consistent(h->pdev, 7739 h->nr_cmds * sizeof(*h->cmd_pool), 7740 &(h->cmd_pool_dhandle)); 7741 h->errinfo_pool = pci_alloc_consistent(h->pdev, 7742 h->nr_cmds * sizeof(*h->errinfo_pool), 7743 &(h->errinfo_pool_dhandle)); 7744 if ((h->cmd_pool_bits == NULL) 7745 || (h->cmd_pool == NULL) 7746 || (h->errinfo_pool == NULL)) { 7747 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 7748 goto clean_up; 7749 } 7750 hpsa_preinitialize_commands(h); 7751 return 0; 7752 clean_up: 7753 hpsa_free_cmd_pool(h); 7754 return -ENOMEM; 7755 } 7756 7757 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7758 static void hpsa_free_irqs(struct ctlr_info *h) 7759 { 7760 int i; 7761 7762 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7763 /* Single reply queue, only one irq to free */ 7764 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7765 h->q[h->intr_mode] = 0; 7766 return; 7767 } 7768 7769 for (i = 0; i < h->msix_vectors; i++) { 7770 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7771 h->q[i] = 0; 7772 } 7773 for (; i < MAX_REPLY_QUEUES; i++) 7774 h->q[i] = 0; 7775 } 7776 7777 /* returns 0 on success; cleans up and returns -Enn on error */ 7778 static int hpsa_request_irqs(struct ctlr_info *h, 7779 irqreturn_t (*msixhandler)(int, void *), 7780 irqreturn_t (*intxhandler)(int, void *)) 7781 { 7782 int rc, i; 7783 7784 /* 7785 * initialize h->q[x] = x so that interrupt handlers know which 7786 * queue to process. 7787 */ 7788 for (i = 0; i < MAX_REPLY_QUEUES; i++) 7789 h->q[i] = (u8) i; 7790 7791 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7792 /* If performant mode and MSI-X, use multiple reply queues */ 7793 for (i = 0; i < h->msix_vectors; i++) { 7794 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7795 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 7796 0, h->intrname[i], 7797 &h->q[i]); 7798 if (rc) { 7799 int j; 7800 7801 dev_err(&h->pdev->dev, 7802 "failed to get irq %d for %s\n", 7803 pci_irq_vector(h->pdev, i), h->devname); 7804 for (j = 0; j < i; j++) { 7805 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 7806 h->q[j] = 0; 7807 } 7808 for (; j < MAX_REPLY_QUEUES; j++) 7809 h->q[j] = 0; 7810 return rc; 7811 } 7812 } 7813 } else { 7814 /* Use single reply pool */ 7815 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 7816 sprintf(h->intrname[0], "%s-msi%s", h->devname, 7817 h->msix_vectors ? "x" : ""); 7818 rc = request_irq(pci_irq_vector(h->pdev, 0), 7819 msixhandler, 0, 7820 h->intrname[0], 7821 &h->q[h->intr_mode]); 7822 } else { 7823 sprintf(h->intrname[h->intr_mode], 7824 "%s-intx", h->devname); 7825 rc = request_irq(pci_irq_vector(h->pdev, 0), 7826 intxhandler, IRQF_SHARED, 7827 h->intrname[0], 7828 &h->q[h->intr_mode]); 7829 } 7830 } 7831 if (rc) { 7832 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 7833 pci_irq_vector(h->pdev, 0), h->devname); 7834 hpsa_free_irqs(h); 7835 return -ENODEV; 7836 } 7837 return 0; 7838 } 7839 7840 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 7841 { 7842 int rc; 7843 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 7844 7845 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 7846 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 7847 if (rc) { 7848 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 7849 return rc; 7850 } 7851 7852 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 7853 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7854 if (rc) { 7855 dev_warn(&h->pdev->dev, "Board failed to become ready " 7856 "after soft reset.\n"); 7857 return rc; 7858 } 7859 7860 return 0; 7861 } 7862 7863 static void hpsa_free_reply_queues(struct ctlr_info *h) 7864 { 7865 int i; 7866 7867 for (i = 0; i < h->nreply_queues; i++) { 7868 if (!h->reply_queue[i].head) 7869 continue; 7870 pci_free_consistent(h->pdev, 7871 h->reply_queue_size, 7872 h->reply_queue[i].head, 7873 h->reply_queue[i].busaddr); 7874 h->reply_queue[i].head = NULL; 7875 h->reply_queue[i].busaddr = 0; 7876 } 7877 h->reply_queue_size = 0; 7878 } 7879 7880 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 7881 { 7882 hpsa_free_performant_mode(h); /* init_one 7 */ 7883 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 7884 hpsa_free_cmd_pool(h); /* init_one 5 */ 7885 hpsa_free_irqs(h); /* init_one 4 */ 7886 scsi_host_put(h->scsi_host); /* init_one 3 */ 7887 h->scsi_host = NULL; /* init_one 3 */ 7888 hpsa_free_pci_init(h); /* init_one 2_5 */ 7889 free_percpu(h->lockup_detected); /* init_one 2 */ 7890 h->lockup_detected = NULL; /* init_one 2 */ 7891 if (h->resubmit_wq) { 7892 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 7893 h->resubmit_wq = NULL; 7894 } 7895 if (h->rescan_ctlr_wq) { 7896 destroy_workqueue(h->rescan_ctlr_wq); 7897 h->rescan_ctlr_wq = NULL; 7898 } 7899 kfree(h); /* init_one 1 */ 7900 } 7901 7902 /* Called when controller lockup detected. */ 7903 static void fail_all_outstanding_cmds(struct ctlr_info *h) 7904 { 7905 int i, refcount; 7906 struct CommandList *c; 7907 int failcount = 0; 7908 7909 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 7910 for (i = 0; i < h->nr_cmds; i++) { 7911 c = h->cmd_pool + i; 7912 refcount = atomic_inc_return(&c->refcount); 7913 if (refcount > 1) { 7914 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 7915 finish_cmd(c); 7916 atomic_dec(&h->commands_outstanding); 7917 failcount++; 7918 } 7919 cmd_free(h, c); 7920 } 7921 dev_warn(&h->pdev->dev, 7922 "failed %d commands in fail_all\n", failcount); 7923 } 7924 7925 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 7926 { 7927 int cpu; 7928 7929 for_each_online_cpu(cpu) { 7930 u32 *lockup_detected; 7931 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 7932 *lockup_detected = value; 7933 } 7934 wmb(); /* be sure the per-cpu variables are out to memory */ 7935 } 7936 7937 static void controller_lockup_detected(struct ctlr_info *h) 7938 { 7939 unsigned long flags; 7940 u32 lockup_detected; 7941 7942 h->access.set_intr_mask(h, HPSA_INTR_OFF); 7943 spin_lock_irqsave(&h->lock, flags); 7944 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 7945 if (!lockup_detected) { 7946 /* no heartbeat, but controller gave us a zero. */ 7947 dev_warn(&h->pdev->dev, 7948 "lockup detected after %d but scratchpad register is zero\n", 7949 h->heartbeat_sample_interval / HZ); 7950 lockup_detected = 0xffffffff; 7951 } 7952 set_lockup_detected_for_all_cpus(h, lockup_detected); 7953 spin_unlock_irqrestore(&h->lock, flags); 7954 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 7955 lockup_detected, h->heartbeat_sample_interval / HZ); 7956 pci_disable_device(h->pdev); 7957 fail_all_outstanding_cmds(h); 7958 } 7959 7960 static int detect_controller_lockup(struct ctlr_info *h) 7961 { 7962 u64 now; 7963 u32 heartbeat; 7964 unsigned long flags; 7965 7966 now = get_jiffies_64(); 7967 /* If we've received an interrupt recently, we're ok. */ 7968 if (time_after64(h->last_intr_timestamp + 7969 (h->heartbeat_sample_interval), now)) 7970 return false; 7971 7972 /* 7973 * If we've already checked the heartbeat recently, we're ok. 7974 * This could happen if someone sends us a signal. We 7975 * otherwise don't care about signals in this thread. 7976 */ 7977 if (time_after64(h->last_heartbeat_timestamp + 7978 (h->heartbeat_sample_interval), now)) 7979 return false; 7980 7981 /* If heartbeat has not changed since we last looked, we're not ok. */ 7982 spin_lock_irqsave(&h->lock, flags); 7983 heartbeat = readl(&h->cfgtable->HeartBeat); 7984 spin_unlock_irqrestore(&h->lock, flags); 7985 if (h->last_heartbeat == heartbeat) { 7986 controller_lockup_detected(h); 7987 return true; 7988 } 7989 7990 /* We're ok. */ 7991 h->last_heartbeat = heartbeat; 7992 h->last_heartbeat_timestamp = now; 7993 return false; 7994 } 7995 7996 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 7997 { 7998 int i; 7999 char *event_type; 8000 8001 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8002 return; 8003 8004 /* Ask the controller to clear the events we're handling. */ 8005 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8006 | CFGTBL_Trans_io_accel2)) && 8007 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8008 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8009 8010 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8011 event_type = "state change"; 8012 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8013 event_type = "configuration change"; 8014 /* Stop sending new RAID offload reqs via the IO accelerator */ 8015 scsi_block_requests(h->scsi_host); 8016 for (i = 0; i < h->ndevices; i++) { 8017 h->dev[i]->offload_enabled = 0; 8018 h->dev[i]->offload_to_be_enabled = 0; 8019 } 8020 hpsa_drain_accel_commands(h); 8021 /* Set 'accelerator path config change' bit */ 8022 dev_warn(&h->pdev->dev, 8023 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8024 h->events, event_type); 8025 writel(h->events, &(h->cfgtable->clear_event_notify)); 8026 /* Set the "clear event notify field update" bit 6 */ 8027 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8028 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8029 hpsa_wait_for_clear_event_notify_ack(h); 8030 scsi_unblock_requests(h->scsi_host); 8031 } else { 8032 /* Acknowledge controller notification events. */ 8033 writel(h->events, &(h->cfgtable->clear_event_notify)); 8034 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8035 hpsa_wait_for_clear_event_notify_ack(h); 8036 #if 0 8037 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8038 hpsa_wait_for_mode_change_ack(h); 8039 #endif 8040 } 8041 return; 8042 } 8043 8044 /* Check a register on the controller to see if there are configuration 8045 * changes (added/changed/removed logical drives, etc.) which mean that 8046 * we should rescan the controller for devices. 8047 * Also check flag for driver-initiated rescan. 8048 */ 8049 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8050 { 8051 if (h->drv_req_rescan) { 8052 h->drv_req_rescan = 0; 8053 return 1; 8054 } 8055 8056 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8057 return 0; 8058 8059 h->events = readl(&(h->cfgtable->event_notify)); 8060 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8061 } 8062 8063 /* 8064 * Check if any of the offline devices have become ready 8065 */ 8066 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8067 { 8068 unsigned long flags; 8069 struct offline_device_entry *d; 8070 struct list_head *this, *tmp; 8071 8072 spin_lock_irqsave(&h->offline_device_lock, flags); 8073 list_for_each_safe(this, tmp, &h->offline_device_list) { 8074 d = list_entry(this, struct offline_device_entry, 8075 offline_list); 8076 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8077 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8078 spin_lock_irqsave(&h->offline_device_lock, flags); 8079 list_del(&d->offline_list); 8080 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8081 return 1; 8082 } 8083 spin_lock_irqsave(&h->offline_device_lock, flags); 8084 } 8085 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8086 return 0; 8087 } 8088 8089 static int hpsa_luns_changed(struct ctlr_info *h) 8090 { 8091 int rc = 1; /* assume there are changes */ 8092 struct ReportLUNdata *logdev = NULL; 8093 8094 /* if we can't find out if lun data has changed, 8095 * assume that it has. 8096 */ 8097 8098 if (!h->lastlogicals) 8099 return rc; 8100 8101 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8102 if (!logdev) 8103 return rc; 8104 8105 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8106 dev_warn(&h->pdev->dev, 8107 "report luns failed, can't track lun changes.\n"); 8108 goto out; 8109 } 8110 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8111 dev_info(&h->pdev->dev, 8112 "Lun changes detected.\n"); 8113 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8114 goto out; 8115 } else 8116 rc = 0; /* no changes detected. */ 8117 out: 8118 kfree(logdev); 8119 return rc; 8120 } 8121 8122 static void hpsa_perform_rescan(struct ctlr_info *h) 8123 { 8124 struct Scsi_Host *sh = NULL; 8125 unsigned long flags; 8126 8127 /* 8128 * Do the scan after the reset 8129 */ 8130 spin_lock_irqsave(&h->reset_lock, flags); 8131 if (h->reset_in_progress) { 8132 h->drv_req_rescan = 1; 8133 spin_unlock_irqrestore(&h->reset_lock, flags); 8134 return; 8135 } 8136 spin_unlock_irqrestore(&h->reset_lock, flags); 8137 8138 sh = scsi_host_get(h->scsi_host); 8139 if (sh != NULL) { 8140 hpsa_scan_start(sh); 8141 scsi_host_put(sh); 8142 h->drv_req_rescan = 0; 8143 } 8144 } 8145 8146 /* 8147 * watch for controller events 8148 */ 8149 static void hpsa_event_monitor_worker(struct work_struct *work) 8150 { 8151 struct ctlr_info *h = container_of(to_delayed_work(work), 8152 struct ctlr_info, event_monitor_work); 8153 unsigned long flags; 8154 8155 spin_lock_irqsave(&h->lock, flags); 8156 if (h->remove_in_progress) { 8157 spin_unlock_irqrestore(&h->lock, flags); 8158 return; 8159 } 8160 spin_unlock_irqrestore(&h->lock, flags); 8161 8162 if (hpsa_ctlr_needs_rescan(h)) { 8163 hpsa_ack_ctlr_events(h); 8164 hpsa_perform_rescan(h); 8165 } 8166 8167 spin_lock_irqsave(&h->lock, flags); 8168 if (!h->remove_in_progress) 8169 schedule_delayed_work(&h->event_monitor_work, 8170 HPSA_EVENT_MONITOR_INTERVAL); 8171 spin_unlock_irqrestore(&h->lock, flags); 8172 } 8173 8174 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8175 { 8176 unsigned long flags; 8177 struct ctlr_info *h = container_of(to_delayed_work(work), 8178 struct ctlr_info, rescan_ctlr_work); 8179 8180 spin_lock_irqsave(&h->lock, flags); 8181 if (h->remove_in_progress) { 8182 spin_unlock_irqrestore(&h->lock, flags); 8183 return; 8184 } 8185 spin_unlock_irqrestore(&h->lock, flags); 8186 8187 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8188 hpsa_perform_rescan(h); 8189 } else if (h->discovery_polling) { 8190 hpsa_disable_rld_caching(h); 8191 if (hpsa_luns_changed(h)) { 8192 dev_info(&h->pdev->dev, 8193 "driver discovery polling rescan.\n"); 8194 hpsa_perform_rescan(h); 8195 } 8196 } 8197 spin_lock_irqsave(&h->lock, flags); 8198 if (!h->remove_in_progress) 8199 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8200 h->heartbeat_sample_interval); 8201 spin_unlock_irqrestore(&h->lock, flags); 8202 } 8203 8204 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8205 { 8206 unsigned long flags; 8207 struct ctlr_info *h = container_of(to_delayed_work(work), 8208 struct ctlr_info, monitor_ctlr_work); 8209 8210 detect_controller_lockup(h); 8211 if (lockup_detected(h)) 8212 return; 8213 8214 spin_lock_irqsave(&h->lock, flags); 8215 if (!h->remove_in_progress) 8216 schedule_delayed_work(&h->monitor_ctlr_work, 8217 h->heartbeat_sample_interval); 8218 spin_unlock_irqrestore(&h->lock, flags); 8219 } 8220 8221 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8222 char *name) 8223 { 8224 struct workqueue_struct *wq = NULL; 8225 8226 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8227 if (!wq) 8228 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8229 8230 return wq; 8231 } 8232 8233 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8234 { 8235 int dac, rc; 8236 struct ctlr_info *h; 8237 int try_soft_reset = 0; 8238 unsigned long flags; 8239 u32 board_id; 8240 8241 if (number_of_controllers == 0) 8242 printk(KERN_INFO DRIVER_NAME "\n"); 8243 8244 rc = hpsa_lookup_board_id(pdev, &board_id); 8245 if (rc < 0) { 8246 dev_warn(&pdev->dev, "Board ID not found\n"); 8247 return rc; 8248 } 8249 8250 rc = hpsa_init_reset_devices(pdev, board_id); 8251 if (rc) { 8252 if (rc != -ENOTSUPP) 8253 return rc; 8254 /* If the reset fails in a particular way (it has no way to do 8255 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8256 * a soft reset once we get the controller configured up to the 8257 * point that it can accept a command. 8258 */ 8259 try_soft_reset = 1; 8260 rc = 0; 8261 } 8262 8263 reinit_after_soft_reset: 8264 8265 /* Command structures must be aligned on a 32-byte boundary because 8266 * the 5 lower bits of the address are used by the hardware. and by 8267 * the driver. See comments in hpsa.h for more info. 8268 */ 8269 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8270 h = kzalloc(sizeof(*h), GFP_KERNEL); 8271 if (!h) { 8272 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8273 return -ENOMEM; 8274 } 8275 8276 h->pdev = pdev; 8277 8278 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8279 INIT_LIST_HEAD(&h->offline_device_list); 8280 spin_lock_init(&h->lock); 8281 spin_lock_init(&h->offline_device_lock); 8282 spin_lock_init(&h->scan_lock); 8283 spin_lock_init(&h->reset_lock); 8284 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8285 8286 /* Allocate and clear per-cpu variable lockup_detected */ 8287 h->lockup_detected = alloc_percpu(u32); 8288 if (!h->lockup_detected) { 8289 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8290 rc = -ENOMEM; 8291 goto clean1; /* aer/h */ 8292 } 8293 set_lockup_detected_for_all_cpus(h, 0); 8294 8295 rc = hpsa_pci_init(h); 8296 if (rc) 8297 goto clean2; /* lu, aer/h */ 8298 8299 /* relies on h-> settings made by hpsa_pci_init, including 8300 * interrupt_mode h->intr */ 8301 rc = hpsa_scsi_host_alloc(h); 8302 if (rc) 8303 goto clean2_5; /* pci, lu, aer/h */ 8304 8305 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8306 h->ctlr = number_of_controllers; 8307 number_of_controllers++; 8308 8309 /* configure PCI DMA stuff */ 8310 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8311 if (rc == 0) { 8312 dac = 1; 8313 } else { 8314 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8315 if (rc == 0) { 8316 dac = 0; 8317 } else { 8318 dev_err(&pdev->dev, "no suitable DMA available\n"); 8319 goto clean3; /* shost, pci, lu, aer/h */ 8320 } 8321 } 8322 8323 /* make sure the board interrupts are off */ 8324 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8325 8326 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8327 if (rc) 8328 goto clean3; /* shost, pci, lu, aer/h */ 8329 rc = hpsa_alloc_cmd_pool(h); 8330 if (rc) 8331 goto clean4; /* irq, shost, pci, lu, aer/h */ 8332 rc = hpsa_alloc_sg_chain_blocks(h); 8333 if (rc) 8334 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8335 init_waitqueue_head(&h->scan_wait_queue); 8336 init_waitqueue_head(&h->event_sync_wait_queue); 8337 mutex_init(&h->reset_mutex); 8338 h->scan_finished = 1; /* no scan currently in progress */ 8339 h->scan_waiting = 0; 8340 8341 pci_set_drvdata(pdev, h); 8342 h->ndevices = 0; 8343 8344 spin_lock_init(&h->devlock); 8345 rc = hpsa_put_ctlr_into_performant_mode(h); 8346 if (rc) 8347 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8348 8349 /* create the resubmit workqueue */ 8350 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8351 if (!h->rescan_ctlr_wq) { 8352 rc = -ENOMEM; 8353 goto clean7; 8354 } 8355 8356 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8357 if (!h->resubmit_wq) { 8358 rc = -ENOMEM; 8359 goto clean7; /* aer/h */ 8360 } 8361 8362 /* 8363 * At this point, the controller is ready to take commands. 8364 * Now, if reset_devices and the hard reset didn't work, try 8365 * the soft reset and see if that works. 8366 */ 8367 if (try_soft_reset) { 8368 8369 /* This is kind of gross. We may or may not get a completion 8370 * from the soft reset command, and if we do, then the value 8371 * from the fifo may or may not be valid. So, we wait 10 secs 8372 * after the reset throwing away any completions we get during 8373 * that time. Unregister the interrupt handler and register 8374 * fake ones to scoop up any residual completions. 8375 */ 8376 spin_lock_irqsave(&h->lock, flags); 8377 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8378 spin_unlock_irqrestore(&h->lock, flags); 8379 hpsa_free_irqs(h); 8380 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8381 hpsa_intx_discard_completions); 8382 if (rc) { 8383 dev_warn(&h->pdev->dev, 8384 "Failed to request_irq after soft reset.\n"); 8385 /* 8386 * cannot goto clean7 or free_irqs will be called 8387 * again. Instead, do its work 8388 */ 8389 hpsa_free_performant_mode(h); /* clean7 */ 8390 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8391 hpsa_free_cmd_pool(h); /* clean5 */ 8392 /* 8393 * skip hpsa_free_irqs(h) clean4 since that 8394 * was just called before request_irqs failed 8395 */ 8396 goto clean3; 8397 } 8398 8399 rc = hpsa_kdump_soft_reset(h); 8400 if (rc) 8401 /* Neither hard nor soft reset worked, we're hosed. */ 8402 goto clean7; 8403 8404 dev_info(&h->pdev->dev, "Board READY.\n"); 8405 dev_info(&h->pdev->dev, 8406 "Waiting for stale completions to drain.\n"); 8407 h->access.set_intr_mask(h, HPSA_INTR_ON); 8408 msleep(10000); 8409 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8410 8411 rc = controller_reset_failed(h->cfgtable); 8412 if (rc) 8413 dev_info(&h->pdev->dev, 8414 "Soft reset appears to have failed.\n"); 8415 8416 /* since the controller's reset, we have to go back and re-init 8417 * everything. Easiest to just forget what we've done and do it 8418 * all over again. 8419 */ 8420 hpsa_undo_allocations_after_kdump_soft_reset(h); 8421 try_soft_reset = 0; 8422 if (rc) 8423 /* don't goto clean, we already unallocated */ 8424 return -ENODEV; 8425 8426 goto reinit_after_soft_reset; 8427 } 8428 8429 /* Enable Accelerated IO path at driver layer */ 8430 h->acciopath_status = 1; 8431 /* Disable discovery polling.*/ 8432 h->discovery_polling = 0; 8433 8434 8435 /* Turn the interrupts on so we can service requests */ 8436 h->access.set_intr_mask(h, HPSA_INTR_ON); 8437 8438 hpsa_hba_inquiry(h); 8439 8440 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8441 if (!h->lastlogicals) 8442 dev_info(&h->pdev->dev, 8443 "Can't track change to report lun data\n"); 8444 8445 /* hook into SCSI subsystem */ 8446 rc = hpsa_scsi_add_host(h); 8447 if (rc) 8448 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8449 8450 /* Monitor the controller for firmware lockups */ 8451 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8452 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8453 schedule_delayed_work(&h->monitor_ctlr_work, 8454 h->heartbeat_sample_interval); 8455 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8456 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8457 h->heartbeat_sample_interval); 8458 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8459 schedule_delayed_work(&h->event_monitor_work, 8460 HPSA_EVENT_MONITOR_INTERVAL); 8461 return 0; 8462 8463 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8464 hpsa_free_performant_mode(h); 8465 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8466 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8467 hpsa_free_sg_chain_blocks(h); 8468 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8469 hpsa_free_cmd_pool(h); 8470 clean4: /* irq, shost, pci, lu, aer/h */ 8471 hpsa_free_irqs(h); 8472 clean3: /* shost, pci, lu, aer/h */ 8473 scsi_host_put(h->scsi_host); 8474 h->scsi_host = NULL; 8475 clean2_5: /* pci, lu, aer/h */ 8476 hpsa_free_pci_init(h); 8477 clean2: /* lu, aer/h */ 8478 if (h->lockup_detected) { 8479 free_percpu(h->lockup_detected); 8480 h->lockup_detected = NULL; 8481 } 8482 clean1: /* wq/aer/h */ 8483 if (h->resubmit_wq) { 8484 destroy_workqueue(h->resubmit_wq); 8485 h->resubmit_wq = NULL; 8486 } 8487 if (h->rescan_ctlr_wq) { 8488 destroy_workqueue(h->rescan_ctlr_wq); 8489 h->rescan_ctlr_wq = NULL; 8490 } 8491 kfree(h); 8492 return rc; 8493 } 8494 8495 static void hpsa_flush_cache(struct ctlr_info *h) 8496 { 8497 char *flush_buf; 8498 struct CommandList *c; 8499 int rc; 8500 8501 if (unlikely(lockup_detected(h))) 8502 return; 8503 flush_buf = kzalloc(4, GFP_KERNEL); 8504 if (!flush_buf) 8505 return; 8506 8507 c = cmd_alloc(h); 8508 8509 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8510 RAID_CTLR_LUNID, TYPE_CMD)) { 8511 goto out; 8512 } 8513 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8514 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8515 if (rc) 8516 goto out; 8517 if (c->err_info->CommandStatus != 0) 8518 out: 8519 dev_warn(&h->pdev->dev, 8520 "error flushing cache on controller\n"); 8521 cmd_free(h, c); 8522 kfree(flush_buf); 8523 } 8524 8525 /* Make controller gather fresh report lun data each time we 8526 * send down a report luns request 8527 */ 8528 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8529 { 8530 u32 *options; 8531 struct CommandList *c; 8532 int rc; 8533 8534 /* Don't bother trying to set diag options if locked up */ 8535 if (unlikely(h->lockup_detected)) 8536 return; 8537 8538 options = kzalloc(sizeof(*options), GFP_KERNEL); 8539 if (!options) 8540 return; 8541 8542 c = cmd_alloc(h); 8543 8544 /* first, get the current diag options settings */ 8545 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8546 RAID_CTLR_LUNID, TYPE_CMD)) 8547 goto errout; 8548 8549 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8550 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8551 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8552 goto errout; 8553 8554 /* Now, set the bit for disabling the RLD caching */ 8555 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8556 8557 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8558 RAID_CTLR_LUNID, TYPE_CMD)) 8559 goto errout; 8560 8561 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8562 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8563 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8564 goto errout; 8565 8566 /* Now verify that it got set: */ 8567 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8568 RAID_CTLR_LUNID, TYPE_CMD)) 8569 goto errout; 8570 8571 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8572 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8573 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8574 goto errout; 8575 8576 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8577 goto out; 8578 8579 errout: 8580 dev_err(&h->pdev->dev, 8581 "Error: failed to disable report lun data caching.\n"); 8582 out: 8583 cmd_free(h, c); 8584 kfree(options); 8585 } 8586 8587 static void hpsa_shutdown(struct pci_dev *pdev) 8588 { 8589 struct ctlr_info *h; 8590 8591 h = pci_get_drvdata(pdev); 8592 /* Turn board interrupts off and send the flush cache command 8593 * sendcmd will turn off interrupt, and send the flush... 8594 * To write all data in the battery backed cache to disks 8595 */ 8596 hpsa_flush_cache(h); 8597 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8598 hpsa_free_irqs(h); /* init_one 4 */ 8599 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8600 } 8601 8602 static void hpsa_free_device_info(struct ctlr_info *h) 8603 { 8604 int i; 8605 8606 for (i = 0; i < h->ndevices; i++) { 8607 kfree(h->dev[i]); 8608 h->dev[i] = NULL; 8609 } 8610 } 8611 8612 static void hpsa_remove_one(struct pci_dev *pdev) 8613 { 8614 struct ctlr_info *h; 8615 unsigned long flags; 8616 8617 if (pci_get_drvdata(pdev) == NULL) { 8618 dev_err(&pdev->dev, "unable to remove device\n"); 8619 return; 8620 } 8621 h = pci_get_drvdata(pdev); 8622 8623 /* Get rid of any controller monitoring work items */ 8624 spin_lock_irqsave(&h->lock, flags); 8625 h->remove_in_progress = 1; 8626 spin_unlock_irqrestore(&h->lock, flags); 8627 cancel_delayed_work_sync(&h->monitor_ctlr_work); 8628 cancel_delayed_work_sync(&h->rescan_ctlr_work); 8629 cancel_delayed_work_sync(&h->event_monitor_work); 8630 destroy_workqueue(h->rescan_ctlr_wq); 8631 destroy_workqueue(h->resubmit_wq); 8632 8633 /* 8634 * Call before disabling interrupts. 8635 * scsi_remove_host can trigger I/O operations especially 8636 * when multipath is enabled. There can be SYNCHRONIZE CACHE 8637 * operations which cannot complete and will hang the system. 8638 */ 8639 if (h->scsi_host) 8640 scsi_remove_host(h->scsi_host); /* init_one 8 */ 8641 /* includes hpsa_free_irqs - init_one 4 */ 8642 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8643 hpsa_shutdown(pdev); 8644 8645 hpsa_free_device_info(h); /* scan */ 8646 8647 kfree(h->hba_inquiry_data); /* init_one 10 */ 8648 h->hba_inquiry_data = NULL; /* init_one 10 */ 8649 hpsa_free_ioaccel2_sg_chain_blocks(h); 8650 hpsa_free_performant_mode(h); /* init_one 7 */ 8651 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8652 hpsa_free_cmd_pool(h); /* init_one 5 */ 8653 kfree(h->lastlogicals); 8654 8655 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8656 8657 scsi_host_put(h->scsi_host); /* init_one 3 */ 8658 h->scsi_host = NULL; /* init_one 3 */ 8659 8660 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8661 hpsa_free_pci_init(h); /* init_one 2.5 */ 8662 8663 free_percpu(h->lockup_detected); /* init_one 2 */ 8664 h->lockup_detected = NULL; /* init_one 2 */ 8665 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8666 8667 hpsa_delete_sas_host(h); 8668 8669 kfree(h); /* init_one 1 */ 8670 } 8671 8672 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8673 __attribute__((unused)) pm_message_t state) 8674 { 8675 return -ENOSYS; 8676 } 8677 8678 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8679 { 8680 return -ENOSYS; 8681 } 8682 8683 static struct pci_driver hpsa_pci_driver = { 8684 .name = HPSA, 8685 .probe = hpsa_init_one, 8686 .remove = hpsa_remove_one, 8687 .id_table = hpsa_pci_device_id, /* id_table */ 8688 .shutdown = hpsa_shutdown, 8689 .suspend = hpsa_suspend, 8690 .resume = hpsa_resume, 8691 }; 8692 8693 /* Fill in bucket_map[], given nsgs (the max number of 8694 * scatter gather elements supported) and bucket[], 8695 * which is an array of 8 integers. The bucket[] array 8696 * contains 8 different DMA transfer sizes (in 16 8697 * byte increments) which the controller uses to fetch 8698 * commands. This function fills in bucket_map[], which 8699 * maps a given number of scatter gather elements to one of 8700 * the 8 DMA transfer sizes. The point of it is to allow the 8701 * controller to only do as much DMA as needed to fetch the 8702 * command, with the DMA transfer size encoded in the lower 8703 * bits of the command address. 8704 */ 8705 static void calc_bucket_map(int bucket[], int num_buckets, 8706 int nsgs, int min_blocks, u32 *bucket_map) 8707 { 8708 int i, j, b, size; 8709 8710 /* Note, bucket_map must have nsgs+1 entries. */ 8711 for (i = 0; i <= nsgs; i++) { 8712 /* Compute size of a command with i SG entries */ 8713 size = i + min_blocks; 8714 b = num_buckets; /* Assume the biggest bucket */ 8715 /* Find the bucket that is just big enough */ 8716 for (j = 0; j < num_buckets; j++) { 8717 if (bucket[j] >= size) { 8718 b = j; 8719 break; 8720 } 8721 } 8722 /* for a command with i SG entries, use bucket b. */ 8723 bucket_map[i] = b; 8724 } 8725 } 8726 8727 /* 8728 * return -ENODEV on err, 0 on success (or no action) 8729 * allocates numerous items that must be freed later 8730 */ 8731 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8732 { 8733 int i; 8734 unsigned long register_value; 8735 unsigned long transMethod = CFGTBL_Trans_Performant | 8736 (trans_support & CFGTBL_Trans_use_short_tags) | 8737 CFGTBL_Trans_enable_directed_msix | 8738 (trans_support & (CFGTBL_Trans_io_accel1 | 8739 CFGTBL_Trans_io_accel2)); 8740 struct access_method access = SA5_performant_access; 8741 8742 /* This is a bit complicated. There are 8 registers on 8743 * the controller which we write to to tell it 8 different 8744 * sizes of commands which there may be. It's a way of 8745 * reducing the DMA done to fetch each command. Encoded into 8746 * each command's tag are 3 bits which communicate to the controller 8747 * which of the eight sizes that command fits within. The size of 8748 * each command depends on how many scatter gather entries there are. 8749 * Each SG entry requires 16 bytes. The eight registers are programmed 8750 * with the number of 16-byte blocks a command of that size requires. 8751 * The smallest command possible requires 5 such 16 byte blocks. 8752 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8753 * blocks. Note, this only extends to the SG entries contained 8754 * within the command block, and does not extend to chained blocks 8755 * of SG elements. bft[] contains the eight values we write to 8756 * the registers. They are not evenly distributed, but have more 8757 * sizes for small commands, and fewer sizes for larger commands. 8758 */ 8759 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8760 #define MIN_IOACCEL2_BFT_ENTRY 5 8761 #define HPSA_IOACCEL2_HEADER_SZ 4 8762 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8763 13, 14, 15, 16, 17, 18, 19, 8764 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8765 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8766 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8767 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8768 16 * MIN_IOACCEL2_BFT_ENTRY); 8769 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8770 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8771 /* 5 = 1 s/g entry or 4k 8772 * 6 = 2 s/g entry or 8k 8773 * 8 = 4 s/g entry or 16k 8774 * 10 = 6 s/g entry or 24k 8775 */ 8776 8777 /* If the controller supports either ioaccel method then 8778 * we can also use the RAID stack submit path that does not 8779 * perform the superfluous readl() after each command submission. 8780 */ 8781 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 8782 access = SA5_performant_access_no_read; 8783 8784 /* Controller spec: zero out this buffer. */ 8785 for (i = 0; i < h->nreply_queues; i++) 8786 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 8787 8788 bft[7] = SG_ENTRIES_IN_CMD + 4; 8789 calc_bucket_map(bft, ARRAY_SIZE(bft), 8790 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 8791 for (i = 0; i < 8; i++) 8792 writel(bft[i], &h->transtable->BlockFetch[i]); 8793 8794 /* size of controller ring buffer */ 8795 writel(h->max_commands, &h->transtable->RepQSize); 8796 writel(h->nreply_queues, &h->transtable->RepQCount); 8797 writel(0, &h->transtable->RepQCtrAddrLow32); 8798 writel(0, &h->transtable->RepQCtrAddrHigh32); 8799 8800 for (i = 0; i < h->nreply_queues; i++) { 8801 writel(0, &h->transtable->RepQAddr[i].upper); 8802 writel(h->reply_queue[i].busaddr, 8803 &h->transtable->RepQAddr[i].lower); 8804 } 8805 8806 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8807 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 8808 /* 8809 * enable outbound interrupt coalescing in accelerator mode; 8810 */ 8811 if (trans_support & CFGTBL_Trans_io_accel1) { 8812 access = SA5_ioaccel_mode1_access; 8813 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8814 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8815 } else 8816 if (trans_support & CFGTBL_Trans_io_accel2) 8817 access = SA5_ioaccel_mode2_access; 8818 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8819 if (hpsa_wait_for_mode_change_ack(h)) { 8820 dev_err(&h->pdev->dev, 8821 "performant mode problem - doorbell timeout\n"); 8822 return -ENODEV; 8823 } 8824 register_value = readl(&(h->cfgtable->TransportActive)); 8825 if (!(register_value & CFGTBL_Trans_Performant)) { 8826 dev_err(&h->pdev->dev, 8827 "performant mode problem - transport not active\n"); 8828 return -ENODEV; 8829 } 8830 /* Change the access methods to the performant access methods */ 8831 h->access = access; 8832 h->transMethod = transMethod; 8833 8834 if (!((trans_support & CFGTBL_Trans_io_accel1) || 8835 (trans_support & CFGTBL_Trans_io_accel2))) 8836 return 0; 8837 8838 if (trans_support & CFGTBL_Trans_io_accel1) { 8839 /* Set up I/O accelerator mode */ 8840 for (i = 0; i < h->nreply_queues; i++) { 8841 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 8842 h->reply_queue[i].current_entry = 8843 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 8844 } 8845 bft[7] = h->ioaccel_maxsg + 8; 8846 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 8847 h->ioaccel1_blockFetchTable); 8848 8849 /* initialize all reply queue entries to unused */ 8850 for (i = 0; i < h->nreply_queues; i++) 8851 memset(h->reply_queue[i].head, 8852 (u8) IOACCEL_MODE1_REPLY_UNUSED, 8853 h->reply_queue_size); 8854 8855 /* set all the constant fields in the accelerator command 8856 * frames once at init time to save CPU cycles later. 8857 */ 8858 for (i = 0; i < h->nr_cmds; i++) { 8859 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 8860 8861 cp->function = IOACCEL1_FUNCTION_SCSIIO; 8862 cp->err_info = (u32) (h->errinfo_pool_dhandle + 8863 (i * sizeof(struct ErrorInfo))); 8864 cp->err_info_len = sizeof(struct ErrorInfo); 8865 cp->sgl_offset = IOACCEL1_SGLOFFSET; 8866 cp->host_context_flags = 8867 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 8868 cp->timeout_sec = 0; 8869 cp->ReplyQueue = 0; 8870 cp->tag = 8871 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 8872 cp->host_addr = 8873 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 8874 (i * sizeof(struct io_accel1_cmd))); 8875 } 8876 } else if (trans_support & CFGTBL_Trans_io_accel2) { 8877 u64 cfg_offset, cfg_base_addr_index; 8878 u32 bft2_offset, cfg_base_addr; 8879 int rc; 8880 8881 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 8882 &cfg_base_addr_index, &cfg_offset); 8883 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 8884 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 8885 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 8886 4, h->ioaccel2_blockFetchTable); 8887 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 8888 BUILD_BUG_ON(offsetof(struct CfgTable, 8889 io_accel_request_size_offset) != 0xb8); 8890 h->ioaccel2_bft2_regs = 8891 remap_pci_mem(pci_resource_start(h->pdev, 8892 cfg_base_addr_index) + 8893 cfg_offset + bft2_offset, 8894 ARRAY_SIZE(bft2) * 8895 sizeof(*h->ioaccel2_bft2_regs)); 8896 for (i = 0; i < ARRAY_SIZE(bft2); i++) 8897 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 8898 } 8899 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8900 if (hpsa_wait_for_mode_change_ack(h)) { 8901 dev_err(&h->pdev->dev, 8902 "performant mode problem - enabling ioaccel mode\n"); 8903 return -ENODEV; 8904 } 8905 return 0; 8906 } 8907 8908 /* Free ioaccel1 mode command blocks and block fetch table */ 8909 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 8910 { 8911 if (h->ioaccel_cmd_pool) { 8912 pci_free_consistent(h->pdev, 8913 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 8914 h->ioaccel_cmd_pool, 8915 h->ioaccel_cmd_pool_dhandle); 8916 h->ioaccel_cmd_pool = NULL; 8917 h->ioaccel_cmd_pool_dhandle = 0; 8918 } 8919 kfree(h->ioaccel1_blockFetchTable); 8920 h->ioaccel1_blockFetchTable = NULL; 8921 } 8922 8923 /* Allocate ioaccel1 mode command blocks and block fetch table */ 8924 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 8925 { 8926 h->ioaccel_maxsg = 8927 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 8928 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 8929 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 8930 8931 /* Command structures must be aligned on a 128-byte boundary 8932 * because the 7 lower bits of the address are used by the 8933 * hardware. 8934 */ 8935 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 8936 IOACCEL1_COMMANDLIST_ALIGNMENT); 8937 h->ioaccel_cmd_pool = 8938 pci_alloc_consistent(h->pdev, 8939 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 8940 &(h->ioaccel_cmd_pool_dhandle)); 8941 8942 h->ioaccel1_blockFetchTable = 8943 kmalloc(((h->ioaccel_maxsg + 1) * 8944 sizeof(u32)), GFP_KERNEL); 8945 8946 if ((h->ioaccel_cmd_pool == NULL) || 8947 (h->ioaccel1_blockFetchTable == NULL)) 8948 goto clean_up; 8949 8950 memset(h->ioaccel_cmd_pool, 0, 8951 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 8952 return 0; 8953 8954 clean_up: 8955 hpsa_free_ioaccel1_cmd_and_bft(h); 8956 return -ENOMEM; 8957 } 8958 8959 /* Free ioaccel2 mode command blocks and block fetch table */ 8960 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 8961 { 8962 hpsa_free_ioaccel2_sg_chain_blocks(h); 8963 8964 if (h->ioaccel2_cmd_pool) { 8965 pci_free_consistent(h->pdev, 8966 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 8967 h->ioaccel2_cmd_pool, 8968 h->ioaccel2_cmd_pool_dhandle); 8969 h->ioaccel2_cmd_pool = NULL; 8970 h->ioaccel2_cmd_pool_dhandle = 0; 8971 } 8972 kfree(h->ioaccel2_blockFetchTable); 8973 h->ioaccel2_blockFetchTable = NULL; 8974 } 8975 8976 /* Allocate ioaccel2 mode command blocks and block fetch table */ 8977 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 8978 { 8979 int rc; 8980 8981 /* Allocate ioaccel2 mode command blocks and block fetch table */ 8982 8983 h->ioaccel_maxsg = 8984 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 8985 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 8986 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 8987 8988 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 8989 IOACCEL2_COMMANDLIST_ALIGNMENT); 8990 h->ioaccel2_cmd_pool = 8991 pci_alloc_consistent(h->pdev, 8992 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 8993 &(h->ioaccel2_cmd_pool_dhandle)); 8994 8995 h->ioaccel2_blockFetchTable = 8996 kmalloc(((h->ioaccel_maxsg + 1) * 8997 sizeof(u32)), GFP_KERNEL); 8998 8999 if ((h->ioaccel2_cmd_pool == NULL) || 9000 (h->ioaccel2_blockFetchTable == NULL)) { 9001 rc = -ENOMEM; 9002 goto clean_up; 9003 } 9004 9005 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9006 if (rc) 9007 goto clean_up; 9008 9009 memset(h->ioaccel2_cmd_pool, 0, 9010 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9011 return 0; 9012 9013 clean_up: 9014 hpsa_free_ioaccel2_cmd_and_bft(h); 9015 return rc; 9016 } 9017 9018 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9019 static void hpsa_free_performant_mode(struct ctlr_info *h) 9020 { 9021 kfree(h->blockFetchTable); 9022 h->blockFetchTable = NULL; 9023 hpsa_free_reply_queues(h); 9024 hpsa_free_ioaccel1_cmd_and_bft(h); 9025 hpsa_free_ioaccel2_cmd_and_bft(h); 9026 } 9027 9028 /* return -ENODEV on error, 0 on success (or no action) 9029 * allocates numerous items that must be freed later 9030 */ 9031 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9032 { 9033 u32 trans_support; 9034 unsigned long transMethod = CFGTBL_Trans_Performant | 9035 CFGTBL_Trans_use_short_tags; 9036 int i, rc; 9037 9038 if (hpsa_simple_mode) 9039 return 0; 9040 9041 trans_support = readl(&(h->cfgtable->TransportSupport)); 9042 if (!(trans_support & PERFORMANT_MODE)) 9043 return 0; 9044 9045 /* Check for I/O accelerator mode support */ 9046 if (trans_support & CFGTBL_Trans_io_accel1) { 9047 transMethod |= CFGTBL_Trans_io_accel1 | 9048 CFGTBL_Trans_enable_directed_msix; 9049 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9050 if (rc) 9051 return rc; 9052 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9053 transMethod |= CFGTBL_Trans_io_accel2 | 9054 CFGTBL_Trans_enable_directed_msix; 9055 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9056 if (rc) 9057 return rc; 9058 } 9059 9060 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9061 hpsa_get_max_perf_mode_cmds(h); 9062 /* Performant mode ring buffer and supporting data structures */ 9063 h->reply_queue_size = h->max_commands * sizeof(u64); 9064 9065 for (i = 0; i < h->nreply_queues; i++) { 9066 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9067 h->reply_queue_size, 9068 &(h->reply_queue[i].busaddr)); 9069 if (!h->reply_queue[i].head) { 9070 rc = -ENOMEM; 9071 goto clean1; /* rq, ioaccel */ 9072 } 9073 h->reply_queue[i].size = h->max_commands; 9074 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9075 h->reply_queue[i].current_entry = 0; 9076 } 9077 9078 /* Need a block fetch table for performant mode */ 9079 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9080 sizeof(u32)), GFP_KERNEL); 9081 if (!h->blockFetchTable) { 9082 rc = -ENOMEM; 9083 goto clean1; /* rq, ioaccel */ 9084 } 9085 9086 rc = hpsa_enter_performant_mode(h, trans_support); 9087 if (rc) 9088 goto clean2; /* bft, rq, ioaccel */ 9089 return 0; 9090 9091 clean2: /* bft, rq, ioaccel */ 9092 kfree(h->blockFetchTable); 9093 h->blockFetchTable = NULL; 9094 clean1: /* rq, ioaccel */ 9095 hpsa_free_reply_queues(h); 9096 hpsa_free_ioaccel1_cmd_and_bft(h); 9097 hpsa_free_ioaccel2_cmd_and_bft(h); 9098 return rc; 9099 } 9100 9101 static int is_accelerated_cmd(struct CommandList *c) 9102 { 9103 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9104 } 9105 9106 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9107 { 9108 struct CommandList *c = NULL; 9109 int i, accel_cmds_out; 9110 int refcount; 9111 9112 do { /* wait for all outstanding ioaccel commands to drain out */ 9113 accel_cmds_out = 0; 9114 for (i = 0; i < h->nr_cmds; i++) { 9115 c = h->cmd_pool + i; 9116 refcount = atomic_inc_return(&c->refcount); 9117 if (refcount > 1) /* Command is allocated */ 9118 accel_cmds_out += is_accelerated_cmd(c); 9119 cmd_free(h, c); 9120 } 9121 if (accel_cmds_out <= 0) 9122 break; 9123 msleep(100); 9124 } while (1); 9125 } 9126 9127 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9128 struct hpsa_sas_port *hpsa_sas_port) 9129 { 9130 struct hpsa_sas_phy *hpsa_sas_phy; 9131 struct sas_phy *phy; 9132 9133 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9134 if (!hpsa_sas_phy) 9135 return NULL; 9136 9137 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9138 hpsa_sas_port->next_phy_index); 9139 if (!phy) { 9140 kfree(hpsa_sas_phy); 9141 return NULL; 9142 } 9143 9144 hpsa_sas_port->next_phy_index++; 9145 hpsa_sas_phy->phy = phy; 9146 hpsa_sas_phy->parent_port = hpsa_sas_port; 9147 9148 return hpsa_sas_phy; 9149 } 9150 9151 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9152 { 9153 struct sas_phy *phy = hpsa_sas_phy->phy; 9154 9155 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9156 sas_phy_free(phy); 9157 if (hpsa_sas_phy->added_to_port) 9158 list_del(&hpsa_sas_phy->phy_list_entry); 9159 kfree(hpsa_sas_phy); 9160 } 9161 9162 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9163 { 9164 int rc; 9165 struct hpsa_sas_port *hpsa_sas_port; 9166 struct sas_phy *phy; 9167 struct sas_identify *identify; 9168 9169 hpsa_sas_port = hpsa_sas_phy->parent_port; 9170 phy = hpsa_sas_phy->phy; 9171 9172 identify = &phy->identify; 9173 memset(identify, 0, sizeof(*identify)); 9174 identify->sas_address = hpsa_sas_port->sas_address; 9175 identify->device_type = SAS_END_DEVICE; 9176 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9177 identify->target_port_protocols = SAS_PROTOCOL_STP; 9178 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9179 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9180 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9181 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9182 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9183 9184 rc = sas_phy_add(hpsa_sas_phy->phy); 9185 if (rc) 9186 return rc; 9187 9188 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9189 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9190 &hpsa_sas_port->phy_list_head); 9191 hpsa_sas_phy->added_to_port = true; 9192 9193 return 0; 9194 } 9195 9196 static int 9197 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9198 struct sas_rphy *rphy) 9199 { 9200 struct sas_identify *identify; 9201 9202 identify = &rphy->identify; 9203 identify->sas_address = hpsa_sas_port->sas_address; 9204 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9205 identify->target_port_protocols = SAS_PROTOCOL_STP; 9206 9207 return sas_rphy_add(rphy); 9208 } 9209 9210 static struct hpsa_sas_port 9211 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9212 u64 sas_address) 9213 { 9214 int rc; 9215 struct hpsa_sas_port *hpsa_sas_port; 9216 struct sas_port *port; 9217 9218 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9219 if (!hpsa_sas_port) 9220 return NULL; 9221 9222 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9223 hpsa_sas_port->parent_node = hpsa_sas_node; 9224 9225 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9226 if (!port) 9227 goto free_hpsa_port; 9228 9229 rc = sas_port_add(port); 9230 if (rc) 9231 goto free_sas_port; 9232 9233 hpsa_sas_port->port = port; 9234 hpsa_sas_port->sas_address = sas_address; 9235 list_add_tail(&hpsa_sas_port->port_list_entry, 9236 &hpsa_sas_node->port_list_head); 9237 9238 return hpsa_sas_port; 9239 9240 free_sas_port: 9241 sas_port_free(port); 9242 free_hpsa_port: 9243 kfree(hpsa_sas_port); 9244 9245 return NULL; 9246 } 9247 9248 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9249 { 9250 struct hpsa_sas_phy *hpsa_sas_phy; 9251 struct hpsa_sas_phy *next; 9252 9253 list_for_each_entry_safe(hpsa_sas_phy, next, 9254 &hpsa_sas_port->phy_list_head, phy_list_entry) 9255 hpsa_free_sas_phy(hpsa_sas_phy); 9256 9257 sas_port_delete(hpsa_sas_port->port); 9258 list_del(&hpsa_sas_port->port_list_entry); 9259 kfree(hpsa_sas_port); 9260 } 9261 9262 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9263 { 9264 struct hpsa_sas_node *hpsa_sas_node; 9265 9266 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9267 if (hpsa_sas_node) { 9268 hpsa_sas_node->parent_dev = parent_dev; 9269 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9270 } 9271 9272 return hpsa_sas_node; 9273 } 9274 9275 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9276 { 9277 struct hpsa_sas_port *hpsa_sas_port; 9278 struct hpsa_sas_port *next; 9279 9280 if (!hpsa_sas_node) 9281 return; 9282 9283 list_for_each_entry_safe(hpsa_sas_port, next, 9284 &hpsa_sas_node->port_list_head, port_list_entry) 9285 hpsa_free_sas_port(hpsa_sas_port); 9286 9287 kfree(hpsa_sas_node); 9288 } 9289 9290 static struct hpsa_scsi_dev_t 9291 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9292 struct sas_rphy *rphy) 9293 { 9294 int i; 9295 struct hpsa_scsi_dev_t *device; 9296 9297 for (i = 0; i < h->ndevices; i++) { 9298 device = h->dev[i]; 9299 if (!device->sas_port) 9300 continue; 9301 if (device->sas_port->rphy == rphy) 9302 return device; 9303 } 9304 9305 return NULL; 9306 } 9307 9308 static int hpsa_add_sas_host(struct ctlr_info *h) 9309 { 9310 int rc; 9311 struct device *parent_dev; 9312 struct hpsa_sas_node *hpsa_sas_node; 9313 struct hpsa_sas_port *hpsa_sas_port; 9314 struct hpsa_sas_phy *hpsa_sas_phy; 9315 9316 parent_dev = &h->scsi_host->shost_gendev; 9317 9318 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9319 if (!hpsa_sas_node) 9320 return -ENOMEM; 9321 9322 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9323 if (!hpsa_sas_port) { 9324 rc = -ENODEV; 9325 goto free_sas_node; 9326 } 9327 9328 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9329 if (!hpsa_sas_phy) { 9330 rc = -ENODEV; 9331 goto free_sas_port; 9332 } 9333 9334 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9335 if (rc) 9336 goto free_sas_phy; 9337 9338 h->sas_host = hpsa_sas_node; 9339 9340 return 0; 9341 9342 free_sas_phy: 9343 hpsa_free_sas_phy(hpsa_sas_phy); 9344 free_sas_port: 9345 hpsa_free_sas_port(hpsa_sas_port); 9346 free_sas_node: 9347 hpsa_free_sas_node(hpsa_sas_node); 9348 9349 return rc; 9350 } 9351 9352 static void hpsa_delete_sas_host(struct ctlr_info *h) 9353 { 9354 hpsa_free_sas_node(h->sas_host); 9355 } 9356 9357 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9358 struct hpsa_scsi_dev_t *device) 9359 { 9360 int rc; 9361 struct hpsa_sas_port *hpsa_sas_port; 9362 struct sas_rphy *rphy; 9363 9364 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9365 if (!hpsa_sas_port) 9366 return -ENOMEM; 9367 9368 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9369 if (!rphy) { 9370 rc = -ENODEV; 9371 goto free_sas_port; 9372 } 9373 9374 hpsa_sas_port->rphy = rphy; 9375 device->sas_port = hpsa_sas_port; 9376 9377 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9378 if (rc) 9379 goto free_sas_port; 9380 9381 return 0; 9382 9383 free_sas_port: 9384 hpsa_free_sas_port(hpsa_sas_port); 9385 device->sas_port = NULL; 9386 9387 return rc; 9388 } 9389 9390 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9391 { 9392 if (device->sas_port) { 9393 hpsa_free_sas_port(device->sas_port); 9394 device->sas_port = NULL; 9395 } 9396 } 9397 9398 static int 9399 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9400 { 9401 return 0; 9402 } 9403 9404 static int 9405 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9406 { 9407 *identifier = 0; 9408 return 0; 9409 } 9410 9411 static int 9412 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9413 { 9414 return -ENXIO; 9415 } 9416 9417 static int 9418 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9419 { 9420 return 0; 9421 } 9422 9423 static int 9424 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9425 { 9426 return 0; 9427 } 9428 9429 static int 9430 hpsa_sas_phy_setup(struct sas_phy *phy) 9431 { 9432 return 0; 9433 } 9434 9435 static void 9436 hpsa_sas_phy_release(struct sas_phy *phy) 9437 { 9438 } 9439 9440 static int 9441 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9442 { 9443 return -EINVAL; 9444 } 9445 9446 /* SMP = Serial Management Protocol */ 9447 static int 9448 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9449 struct request *req) 9450 { 9451 return -EINVAL; 9452 } 9453 9454 static struct sas_function_template hpsa_sas_transport_functions = { 9455 .get_linkerrors = hpsa_sas_get_linkerrors, 9456 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9457 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9458 .phy_reset = hpsa_sas_phy_reset, 9459 .phy_enable = hpsa_sas_phy_enable, 9460 .phy_setup = hpsa_sas_phy_setup, 9461 .phy_release = hpsa_sas_phy_release, 9462 .set_phy_speed = hpsa_sas_phy_speed, 9463 .smp_handler = hpsa_sas_smp_handler, 9464 }; 9465 9466 /* 9467 * This is it. Register the PCI driver information for the cards we control 9468 * the OS will call our registered routines when it finds one of our cards. 9469 */ 9470 static int __init hpsa_init(void) 9471 { 9472 int rc; 9473 9474 hpsa_sas_transport_template = 9475 sas_attach_transport(&hpsa_sas_transport_functions); 9476 if (!hpsa_sas_transport_template) 9477 return -ENODEV; 9478 9479 rc = pci_register_driver(&hpsa_pci_driver); 9480 9481 if (rc) 9482 sas_release_transport(hpsa_sas_transport_template); 9483 9484 return rc; 9485 } 9486 9487 static void __exit hpsa_cleanup(void) 9488 { 9489 pci_unregister_driver(&hpsa_pci_driver); 9490 sas_release_transport(hpsa_sas_transport_template); 9491 } 9492 9493 static void __attribute__((unused)) verify_offsets(void) 9494 { 9495 #define VERIFY_OFFSET(member, offset) \ 9496 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9497 9498 VERIFY_OFFSET(structure_size, 0); 9499 VERIFY_OFFSET(volume_blk_size, 4); 9500 VERIFY_OFFSET(volume_blk_cnt, 8); 9501 VERIFY_OFFSET(phys_blk_shift, 16); 9502 VERIFY_OFFSET(parity_rotation_shift, 17); 9503 VERIFY_OFFSET(strip_size, 18); 9504 VERIFY_OFFSET(disk_starting_blk, 20); 9505 VERIFY_OFFSET(disk_blk_cnt, 28); 9506 VERIFY_OFFSET(data_disks_per_row, 36); 9507 VERIFY_OFFSET(metadata_disks_per_row, 38); 9508 VERIFY_OFFSET(row_cnt, 40); 9509 VERIFY_OFFSET(layout_map_count, 42); 9510 VERIFY_OFFSET(flags, 44); 9511 VERIFY_OFFSET(dekindex, 46); 9512 /* VERIFY_OFFSET(reserved, 48 */ 9513 VERIFY_OFFSET(data, 64); 9514 9515 #undef VERIFY_OFFSET 9516 9517 #define VERIFY_OFFSET(member, offset) \ 9518 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9519 9520 VERIFY_OFFSET(IU_type, 0); 9521 VERIFY_OFFSET(direction, 1); 9522 VERIFY_OFFSET(reply_queue, 2); 9523 /* VERIFY_OFFSET(reserved1, 3); */ 9524 VERIFY_OFFSET(scsi_nexus, 4); 9525 VERIFY_OFFSET(Tag, 8); 9526 VERIFY_OFFSET(cdb, 16); 9527 VERIFY_OFFSET(cciss_lun, 32); 9528 VERIFY_OFFSET(data_len, 40); 9529 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9530 VERIFY_OFFSET(sg_count, 45); 9531 /* VERIFY_OFFSET(reserved3 */ 9532 VERIFY_OFFSET(err_ptr, 48); 9533 VERIFY_OFFSET(err_len, 56); 9534 /* VERIFY_OFFSET(reserved4 */ 9535 VERIFY_OFFSET(sg, 64); 9536 9537 #undef VERIFY_OFFSET 9538 9539 #define VERIFY_OFFSET(member, offset) \ 9540 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9541 9542 VERIFY_OFFSET(dev_handle, 0x00); 9543 VERIFY_OFFSET(reserved1, 0x02); 9544 VERIFY_OFFSET(function, 0x03); 9545 VERIFY_OFFSET(reserved2, 0x04); 9546 VERIFY_OFFSET(err_info, 0x0C); 9547 VERIFY_OFFSET(reserved3, 0x10); 9548 VERIFY_OFFSET(err_info_len, 0x12); 9549 VERIFY_OFFSET(reserved4, 0x13); 9550 VERIFY_OFFSET(sgl_offset, 0x14); 9551 VERIFY_OFFSET(reserved5, 0x15); 9552 VERIFY_OFFSET(transfer_len, 0x1C); 9553 VERIFY_OFFSET(reserved6, 0x20); 9554 VERIFY_OFFSET(io_flags, 0x24); 9555 VERIFY_OFFSET(reserved7, 0x26); 9556 VERIFY_OFFSET(LUN, 0x34); 9557 VERIFY_OFFSET(control, 0x3C); 9558 VERIFY_OFFSET(CDB, 0x40); 9559 VERIFY_OFFSET(reserved8, 0x50); 9560 VERIFY_OFFSET(host_context_flags, 0x60); 9561 VERIFY_OFFSET(timeout_sec, 0x62); 9562 VERIFY_OFFSET(ReplyQueue, 0x64); 9563 VERIFY_OFFSET(reserved9, 0x65); 9564 VERIFY_OFFSET(tag, 0x68); 9565 VERIFY_OFFSET(host_addr, 0x70); 9566 VERIFY_OFFSET(CISS_LUN, 0x78); 9567 VERIFY_OFFSET(SG, 0x78 + 8); 9568 #undef VERIFY_OFFSET 9569 } 9570 9571 module_init(hpsa_init); 9572 module_exit(hpsa_cleanup); 9573