1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries 4 * Copyright 2016 Microsemi Corporation 5 * Copyright 2014-2015 PMC-Sierra, Inc. 6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 15 * NON INFRINGEMENT. See the GNU General Public License for more details. 16 * 17 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 18 * 19 */ 20 21 #include <linux/module.h> 22 #include <linux/interrupt.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.20-200" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 /* How long to wait before giving up on a command */ 77 #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ) 78 79 /* Embedded module documentation macros - see modules.h */ 80 MODULE_AUTHOR("Hewlett-Packard Company"); 81 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 82 HPSA_DRIVER_VERSION); 83 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 84 MODULE_VERSION(HPSA_DRIVER_VERSION); 85 MODULE_LICENSE("GPL"); 86 MODULE_ALIAS("cciss"); 87 88 static int hpsa_simple_mode; 89 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 90 MODULE_PARM_DESC(hpsa_simple_mode, 91 "Use 'simple mode' rather than 'performant mode'"); 92 93 /* define the PCI info for the cards we can control */ 94 static const struct pci_device_id hpsa_pci_device_id[] = { 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 136 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 142 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 146 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 147 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 148 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 150 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 151 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 152 {0,} 153 }; 154 155 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 156 157 /* board_id = Subsystem Device ID & Vendor ID 158 * product = Marketing Name for the board 159 * access = Address of the struct of function pointers 160 */ 161 static struct board_type products[] = { 162 {0x40700E11, "Smart Array 5300", &SA5A_access}, 163 {0x40800E11, "Smart Array 5i", &SA5B_access}, 164 {0x40820E11, "Smart Array 532", &SA5B_access}, 165 {0x40830E11, "Smart Array 5312", &SA5B_access}, 166 {0x409A0E11, "Smart Array 641", &SA5A_access}, 167 {0x409B0E11, "Smart Array 642", &SA5A_access}, 168 {0x409C0E11, "Smart Array 6400", &SA5A_access}, 169 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 170 {0x40910E11, "Smart Array 6i", &SA5A_access}, 171 {0x3225103C, "Smart Array P600", &SA5A_access}, 172 {0x3223103C, "Smart Array P800", &SA5A_access}, 173 {0x3234103C, "Smart Array P400", &SA5A_access}, 174 {0x3235103C, "Smart Array P400i", &SA5A_access}, 175 {0x3211103C, "Smart Array E200i", &SA5A_access}, 176 {0x3212103C, "Smart Array E200", &SA5A_access}, 177 {0x3213103C, "Smart Array E200i", &SA5A_access}, 178 {0x3214103C, "Smart Array E200i", &SA5A_access}, 179 {0x3215103C, "Smart Array E200i", &SA5A_access}, 180 {0x3237103C, "Smart Array E500", &SA5A_access}, 181 {0x323D103C, "Smart Array P700m", &SA5A_access}, 182 {0x3241103C, "Smart Array P212", &SA5_access}, 183 {0x3243103C, "Smart Array P410", &SA5_access}, 184 {0x3245103C, "Smart Array P410i", &SA5_access}, 185 {0x3247103C, "Smart Array P411", &SA5_access}, 186 {0x3249103C, "Smart Array P812", &SA5_access}, 187 {0x324A103C, "Smart Array P712m", &SA5_access}, 188 {0x324B103C, "Smart Array P711m", &SA5_access}, 189 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 190 {0x3350103C, "Smart Array P222", &SA5_access}, 191 {0x3351103C, "Smart Array P420", &SA5_access}, 192 {0x3352103C, "Smart Array P421", &SA5_access}, 193 {0x3353103C, "Smart Array P822", &SA5_access}, 194 {0x3354103C, "Smart Array P420i", &SA5_access}, 195 {0x3355103C, "Smart Array P220i", &SA5_access}, 196 {0x3356103C, "Smart Array P721m", &SA5_access}, 197 {0x1920103C, "Smart Array P430i", &SA5_access}, 198 {0x1921103C, "Smart Array P830i", &SA5_access}, 199 {0x1922103C, "Smart Array P430", &SA5_access}, 200 {0x1923103C, "Smart Array P431", &SA5_access}, 201 {0x1924103C, "Smart Array P830", &SA5_access}, 202 {0x1925103C, "Smart Array P831", &SA5_access}, 203 {0x1926103C, "Smart Array P731m", &SA5_access}, 204 {0x1928103C, "Smart Array P230i", &SA5_access}, 205 {0x1929103C, "Smart Array P530", &SA5_access}, 206 {0x21BD103C, "Smart Array P244br", &SA5_access}, 207 {0x21BE103C, "Smart Array P741m", &SA5_access}, 208 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 209 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 210 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 211 {0x21C2103C, "Smart Array P440", &SA5_access}, 212 {0x21C3103C, "Smart Array P441", &SA5_access}, 213 {0x21C4103C, "Smart Array", &SA5_access}, 214 {0x21C5103C, "Smart Array P841", &SA5_access}, 215 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 216 {0x21C7103C, "Smart HBA H240", &SA5_access}, 217 {0x21C8103C, "Smart HBA H241", &SA5_access}, 218 {0x21C9103C, "Smart Array", &SA5_access}, 219 {0x21CA103C, "Smart Array P246br", &SA5_access}, 220 {0x21CB103C, "Smart Array P840", &SA5_access}, 221 {0x21CC103C, "Smart Array", &SA5_access}, 222 {0x21CD103C, "Smart Array", &SA5_access}, 223 {0x21CE103C, "Smart HBA", &SA5_access}, 224 {0x05809005, "SmartHBA-SA", &SA5_access}, 225 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 226 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 227 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 228 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 229 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 230 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 231 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 232 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 233 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 234 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 235 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 236 }; 237 238 static struct scsi_transport_template *hpsa_sas_transport_template; 239 static int hpsa_add_sas_host(struct ctlr_info *h); 240 static void hpsa_delete_sas_host(struct ctlr_info *h); 241 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 242 struct hpsa_scsi_dev_t *device); 243 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 244 static struct hpsa_scsi_dev_t 245 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 246 struct sas_rphy *rphy); 247 248 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 249 static const struct scsi_cmnd hpsa_cmd_busy; 250 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 251 static const struct scsi_cmnd hpsa_cmd_idle; 252 static int number_of_controllers; 253 254 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 255 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 256 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 257 void __user *arg); 258 static int hpsa_passthru_ioctl(struct ctlr_info *h, 259 IOCTL_Command_struct *iocommand); 260 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, 261 BIG_IOCTL_Command_struct *ioc); 262 263 #ifdef CONFIG_COMPAT 264 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 265 void __user *arg); 266 #endif 267 268 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 269 static struct CommandList *cmd_alloc(struct ctlr_info *h); 270 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 271 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 272 struct scsi_cmnd *scmd); 273 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 274 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 275 int cmd_type); 276 static void hpsa_free_cmd_pool(struct ctlr_info *h); 277 #define VPD_PAGE (1 << 8) 278 #define HPSA_SIMPLE_ERROR_BITS 0x03 279 280 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 281 static void hpsa_scan_start(struct Scsi_Host *); 282 static int hpsa_scan_finished(struct Scsi_Host *sh, 283 unsigned long elapsed_time); 284 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 285 286 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 287 static int hpsa_slave_alloc(struct scsi_device *sdev); 288 static int hpsa_slave_configure(struct scsi_device *sdev); 289 static void hpsa_slave_destroy(struct scsi_device *sdev); 290 291 static void hpsa_update_scsi_devices(struct ctlr_info *h); 292 static int check_for_unit_attention(struct ctlr_info *h, 293 struct CommandList *c); 294 static void check_ioctl_unit_attention(struct ctlr_info *h, 295 struct CommandList *c); 296 /* performant mode helper functions */ 297 static void calc_bucket_map(int *bucket, int num_buckets, 298 int nsgs, int min_blocks, u32 *bucket_map); 299 static void hpsa_free_performant_mode(struct ctlr_info *h); 300 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 301 static inline u32 next_command(struct ctlr_info *h, u8 q); 302 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 303 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 304 u64 *cfg_offset); 305 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 306 unsigned long *memory_bar); 307 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 308 bool *legacy_board); 309 static int wait_for_device_to_become_ready(struct ctlr_info *h, 310 unsigned char lunaddr[], 311 int reply_queue); 312 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 313 int wait_for_ready); 314 static inline void finish_cmd(struct CommandList *c); 315 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 316 #define BOARD_NOT_READY 0 317 #define BOARD_READY 1 318 static void hpsa_drain_accel_commands(struct ctlr_info *h); 319 static void hpsa_flush_cache(struct ctlr_info *h); 320 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 321 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 322 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 323 static void hpsa_command_resubmit_worker(struct work_struct *work); 324 static u32 lockup_detected(struct ctlr_info *h); 325 static int detect_controller_lockup(struct ctlr_info *h); 326 static void hpsa_disable_rld_caching(struct ctlr_info *h); 327 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 328 struct ReportExtendedLUNdata *buf, int bufsize); 329 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 330 unsigned char scsi3addr[], u8 page); 331 static int hpsa_luns_changed(struct ctlr_info *h); 332 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 333 struct hpsa_scsi_dev_t *dev, 334 unsigned char *scsi3addr); 335 336 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 337 { 338 unsigned long *priv = shost_priv(sdev->host); 339 return (struct ctlr_info *) *priv; 340 } 341 342 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 343 { 344 unsigned long *priv = shost_priv(sh); 345 return (struct ctlr_info *) *priv; 346 } 347 348 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 349 { 350 return c->scsi_cmd == SCSI_CMD_IDLE; 351 } 352 353 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 354 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 355 u8 *sense_key, u8 *asc, u8 *ascq) 356 { 357 struct scsi_sense_hdr sshdr; 358 bool rc; 359 360 *sense_key = -1; 361 *asc = -1; 362 *ascq = -1; 363 364 if (sense_data_len < 1) 365 return; 366 367 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 368 if (rc) { 369 *sense_key = sshdr.sense_key; 370 *asc = sshdr.asc; 371 *ascq = sshdr.ascq; 372 } 373 } 374 375 static int check_for_unit_attention(struct ctlr_info *h, 376 struct CommandList *c) 377 { 378 u8 sense_key, asc, ascq; 379 int sense_len; 380 381 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 382 sense_len = sizeof(c->err_info->SenseInfo); 383 else 384 sense_len = c->err_info->SenseLen; 385 386 decode_sense_data(c->err_info->SenseInfo, sense_len, 387 &sense_key, &asc, &ascq); 388 if (sense_key != UNIT_ATTENTION || asc == 0xff) 389 return 0; 390 391 switch (asc) { 392 case STATE_CHANGED: 393 dev_warn(&h->pdev->dev, 394 "%s: a state change detected, command retried\n", 395 h->devname); 396 break; 397 case LUN_FAILED: 398 dev_warn(&h->pdev->dev, 399 "%s: LUN failure detected\n", h->devname); 400 break; 401 case REPORT_LUNS_CHANGED: 402 dev_warn(&h->pdev->dev, 403 "%s: report LUN data changed\n", h->devname); 404 /* 405 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 406 * target (array) devices. 407 */ 408 break; 409 case POWER_OR_RESET: 410 dev_warn(&h->pdev->dev, 411 "%s: a power on or device reset detected\n", 412 h->devname); 413 break; 414 case UNIT_ATTENTION_CLEARED: 415 dev_warn(&h->pdev->dev, 416 "%s: unit attention cleared by another initiator\n", 417 h->devname); 418 break; 419 default: 420 dev_warn(&h->pdev->dev, 421 "%s: unknown unit attention detected\n", 422 h->devname); 423 break; 424 } 425 return 1; 426 } 427 428 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 429 { 430 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 431 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 432 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 433 return 0; 434 dev_warn(&h->pdev->dev, HPSA "device busy"); 435 return 1; 436 } 437 438 static u32 lockup_detected(struct ctlr_info *h); 439 static ssize_t host_show_lockup_detected(struct device *dev, 440 struct device_attribute *attr, char *buf) 441 { 442 int ld; 443 struct ctlr_info *h; 444 struct Scsi_Host *shost = class_to_shost(dev); 445 446 h = shost_to_hba(shost); 447 ld = lockup_detected(h); 448 449 return sprintf(buf, "ld=%d\n", ld); 450 } 451 452 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 453 struct device_attribute *attr, 454 const char *buf, size_t count) 455 { 456 int status, len; 457 struct ctlr_info *h; 458 struct Scsi_Host *shost = class_to_shost(dev); 459 char tmpbuf[10]; 460 461 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 462 return -EACCES; 463 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 464 strncpy(tmpbuf, buf, len); 465 tmpbuf[len] = '\0'; 466 if (sscanf(tmpbuf, "%d", &status) != 1) 467 return -EINVAL; 468 h = shost_to_hba(shost); 469 h->acciopath_status = !!status; 470 dev_warn(&h->pdev->dev, 471 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 472 h->acciopath_status ? "enabled" : "disabled"); 473 return count; 474 } 475 476 static ssize_t host_store_raid_offload_debug(struct device *dev, 477 struct device_attribute *attr, 478 const char *buf, size_t count) 479 { 480 int debug_level, len; 481 struct ctlr_info *h; 482 struct Scsi_Host *shost = class_to_shost(dev); 483 char tmpbuf[10]; 484 485 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 486 return -EACCES; 487 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 488 strncpy(tmpbuf, buf, len); 489 tmpbuf[len] = '\0'; 490 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 491 return -EINVAL; 492 if (debug_level < 0) 493 debug_level = 0; 494 h = shost_to_hba(shost); 495 h->raid_offload_debug = debug_level; 496 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 497 h->raid_offload_debug); 498 return count; 499 } 500 501 static ssize_t host_store_rescan(struct device *dev, 502 struct device_attribute *attr, 503 const char *buf, size_t count) 504 { 505 struct ctlr_info *h; 506 struct Scsi_Host *shost = class_to_shost(dev); 507 h = shost_to_hba(shost); 508 hpsa_scan_start(h->scsi_host); 509 return count; 510 } 511 512 static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device) 513 { 514 device->offload_enabled = 0; 515 device->offload_to_be_enabled = 0; 516 } 517 518 static ssize_t host_show_firmware_revision(struct device *dev, 519 struct device_attribute *attr, char *buf) 520 { 521 struct ctlr_info *h; 522 struct Scsi_Host *shost = class_to_shost(dev); 523 unsigned char *fwrev; 524 525 h = shost_to_hba(shost); 526 if (!h->hba_inquiry_data) 527 return 0; 528 fwrev = &h->hba_inquiry_data[32]; 529 return snprintf(buf, 20, "%c%c%c%c\n", 530 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 531 } 532 533 static ssize_t host_show_commands_outstanding(struct device *dev, 534 struct device_attribute *attr, char *buf) 535 { 536 struct Scsi_Host *shost = class_to_shost(dev); 537 struct ctlr_info *h = shost_to_hba(shost); 538 539 return snprintf(buf, 20, "%d\n", 540 atomic_read(&h->commands_outstanding)); 541 } 542 543 static ssize_t host_show_transport_mode(struct device *dev, 544 struct device_attribute *attr, char *buf) 545 { 546 struct ctlr_info *h; 547 struct Scsi_Host *shost = class_to_shost(dev); 548 549 h = shost_to_hba(shost); 550 return snprintf(buf, 20, "%s\n", 551 h->transMethod & CFGTBL_Trans_Performant ? 552 "performant" : "simple"); 553 } 554 555 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 556 struct device_attribute *attr, char *buf) 557 { 558 struct ctlr_info *h; 559 struct Scsi_Host *shost = class_to_shost(dev); 560 561 h = shost_to_hba(shost); 562 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 563 (h->acciopath_status == 1) ? "enabled" : "disabled"); 564 } 565 566 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 567 static u32 unresettable_controller[] = { 568 0x324a103C, /* Smart Array P712m */ 569 0x324b103C, /* Smart Array P711m */ 570 0x3223103C, /* Smart Array P800 */ 571 0x3234103C, /* Smart Array P400 */ 572 0x3235103C, /* Smart Array P400i */ 573 0x3211103C, /* Smart Array E200i */ 574 0x3212103C, /* Smart Array E200 */ 575 0x3213103C, /* Smart Array E200i */ 576 0x3214103C, /* Smart Array E200i */ 577 0x3215103C, /* Smart Array E200i */ 578 0x3237103C, /* Smart Array E500 */ 579 0x323D103C, /* Smart Array P700m */ 580 0x40800E11, /* Smart Array 5i */ 581 0x409C0E11, /* Smart Array 6400 */ 582 0x409D0E11, /* Smart Array 6400 EM */ 583 0x40700E11, /* Smart Array 5300 */ 584 0x40820E11, /* Smart Array 532 */ 585 0x40830E11, /* Smart Array 5312 */ 586 0x409A0E11, /* Smart Array 641 */ 587 0x409B0E11, /* Smart Array 642 */ 588 0x40910E11, /* Smart Array 6i */ 589 }; 590 591 /* List of controllers which cannot even be soft reset */ 592 static u32 soft_unresettable_controller[] = { 593 0x40800E11, /* Smart Array 5i */ 594 0x40700E11, /* Smart Array 5300 */ 595 0x40820E11, /* Smart Array 532 */ 596 0x40830E11, /* Smart Array 5312 */ 597 0x409A0E11, /* Smart Array 641 */ 598 0x409B0E11, /* Smart Array 642 */ 599 0x40910E11, /* Smart Array 6i */ 600 /* Exclude 640x boards. These are two pci devices in one slot 601 * which share a battery backed cache module. One controls the 602 * cache, the other accesses the cache through the one that controls 603 * it. If we reset the one controlling the cache, the other will 604 * likely not be happy. Just forbid resetting this conjoined mess. 605 * The 640x isn't really supported by hpsa anyway. 606 */ 607 0x409C0E11, /* Smart Array 6400 */ 608 0x409D0E11, /* Smart Array 6400 EM */ 609 }; 610 611 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 612 { 613 int i; 614 615 for (i = 0; i < nelems; i++) 616 if (a[i] == board_id) 617 return 1; 618 return 0; 619 } 620 621 static int ctlr_is_hard_resettable(u32 board_id) 622 { 623 return !board_id_in_array(unresettable_controller, 624 ARRAY_SIZE(unresettable_controller), board_id); 625 } 626 627 static int ctlr_is_soft_resettable(u32 board_id) 628 { 629 return !board_id_in_array(soft_unresettable_controller, 630 ARRAY_SIZE(soft_unresettable_controller), board_id); 631 } 632 633 static int ctlr_is_resettable(u32 board_id) 634 { 635 return ctlr_is_hard_resettable(board_id) || 636 ctlr_is_soft_resettable(board_id); 637 } 638 639 static ssize_t host_show_resettable(struct device *dev, 640 struct device_attribute *attr, char *buf) 641 { 642 struct ctlr_info *h; 643 struct Scsi_Host *shost = class_to_shost(dev); 644 645 h = shost_to_hba(shost); 646 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 647 } 648 649 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 650 { 651 return (scsi3addr[3] & 0xC0) == 0x40; 652 } 653 654 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 655 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 656 }; 657 #define HPSA_RAID_0 0 658 #define HPSA_RAID_4 1 659 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 660 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 661 #define HPSA_RAID_51 4 662 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 663 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 664 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 665 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 666 667 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 668 { 669 return !device->physical_device; 670 } 671 672 static ssize_t raid_level_show(struct device *dev, 673 struct device_attribute *attr, char *buf) 674 { 675 ssize_t l = 0; 676 unsigned char rlevel; 677 struct ctlr_info *h; 678 struct scsi_device *sdev; 679 struct hpsa_scsi_dev_t *hdev; 680 unsigned long flags; 681 682 sdev = to_scsi_device(dev); 683 h = sdev_to_hba(sdev); 684 spin_lock_irqsave(&h->lock, flags); 685 hdev = sdev->hostdata; 686 if (!hdev) { 687 spin_unlock_irqrestore(&h->lock, flags); 688 return -ENODEV; 689 } 690 691 /* Is this even a logical drive? */ 692 if (!is_logical_device(hdev)) { 693 spin_unlock_irqrestore(&h->lock, flags); 694 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 695 return l; 696 } 697 698 rlevel = hdev->raid_level; 699 spin_unlock_irqrestore(&h->lock, flags); 700 if (rlevel > RAID_UNKNOWN) 701 rlevel = RAID_UNKNOWN; 702 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 703 return l; 704 } 705 706 static ssize_t lunid_show(struct device *dev, 707 struct device_attribute *attr, char *buf) 708 { 709 struct ctlr_info *h; 710 struct scsi_device *sdev; 711 struct hpsa_scsi_dev_t *hdev; 712 unsigned long flags; 713 unsigned char lunid[8]; 714 715 sdev = to_scsi_device(dev); 716 h = sdev_to_hba(sdev); 717 spin_lock_irqsave(&h->lock, flags); 718 hdev = sdev->hostdata; 719 if (!hdev) { 720 spin_unlock_irqrestore(&h->lock, flags); 721 return -ENODEV; 722 } 723 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 724 spin_unlock_irqrestore(&h->lock, flags); 725 return snprintf(buf, 20, "0x%8phN\n", lunid); 726 } 727 728 static ssize_t unique_id_show(struct device *dev, 729 struct device_attribute *attr, char *buf) 730 { 731 struct ctlr_info *h; 732 struct scsi_device *sdev; 733 struct hpsa_scsi_dev_t *hdev; 734 unsigned long flags; 735 unsigned char sn[16]; 736 737 sdev = to_scsi_device(dev); 738 h = sdev_to_hba(sdev); 739 spin_lock_irqsave(&h->lock, flags); 740 hdev = sdev->hostdata; 741 if (!hdev) { 742 spin_unlock_irqrestore(&h->lock, flags); 743 return -ENODEV; 744 } 745 memcpy(sn, hdev->device_id, sizeof(sn)); 746 spin_unlock_irqrestore(&h->lock, flags); 747 return snprintf(buf, 16 * 2 + 2, 748 "%02X%02X%02X%02X%02X%02X%02X%02X" 749 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 750 sn[0], sn[1], sn[2], sn[3], 751 sn[4], sn[5], sn[6], sn[7], 752 sn[8], sn[9], sn[10], sn[11], 753 sn[12], sn[13], sn[14], sn[15]); 754 } 755 756 static ssize_t sas_address_show(struct device *dev, 757 struct device_attribute *attr, char *buf) 758 { 759 struct ctlr_info *h; 760 struct scsi_device *sdev; 761 struct hpsa_scsi_dev_t *hdev; 762 unsigned long flags; 763 u64 sas_address; 764 765 sdev = to_scsi_device(dev); 766 h = sdev_to_hba(sdev); 767 spin_lock_irqsave(&h->lock, flags); 768 hdev = sdev->hostdata; 769 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 770 spin_unlock_irqrestore(&h->lock, flags); 771 return -ENODEV; 772 } 773 sas_address = hdev->sas_address; 774 spin_unlock_irqrestore(&h->lock, flags); 775 776 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 777 } 778 779 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 780 struct device_attribute *attr, char *buf) 781 { 782 struct ctlr_info *h; 783 struct scsi_device *sdev; 784 struct hpsa_scsi_dev_t *hdev; 785 unsigned long flags; 786 int offload_enabled; 787 788 sdev = to_scsi_device(dev); 789 h = sdev_to_hba(sdev); 790 spin_lock_irqsave(&h->lock, flags); 791 hdev = sdev->hostdata; 792 if (!hdev) { 793 spin_unlock_irqrestore(&h->lock, flags); 794 return -ENODEV; 795 } 796 offload_enabled = hdev->offload_enabled; 797 spin_unlock_irqrestore(&h->lock, flags); 798 799 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 800 return snprintf(buf, 20, "%d\n", offload_enabled); 801 else 802 return snprintf(buf, 40, "%s\n", 803 "Not applicable for a controller"); 804 } 805 806 #define MAX_PATHS 8 807 static ssize_t path_info_show(struct device *dev, 808 struct device_attribute *attr, char *buf) 809 { 810 struct ctlr_info *h; 811 struct scsi_device *sdev; 812 struct hpsa_scsi_dev_t *hdev; 813 unsigned long flags; 814 int i; 815 int output_len = 0; 816 u8 box; 817 u8 bay; 818 u8 path_map_index = 0; 819 char *active; 820 unsigned char phys_connector[2]; 821 822 sdev = to_scsi_device(dev); 823 h = sdev_to_hba(sdev); 824 spin_lock_irqsave(&h->devlock, flags); 825 hdev = sdev->hostdata; 826 if (!hdev) { 827 spin_unlock_irqrestore(&h->devlock, flags); 828 return -ENODEV; 829 } 830 831 bay = hdev->bay; 832 for (i = 0; i < MAX_PATHS; i++) { 833 path_map_index = 1<<i; 834 if (i == hdev->active_path_index) 835 active = "Active"; 836 else if (hdev->path_map & path_map_index) 837 active = "Inactive"; 838 else 839 continue; 840 841 output_len += scnprintf(buf + output_len, 842 PAGE_SIZE - output_len, 843 "[%d:%d:%d:%d] %20.20s ", 844 h->scsi_host->host_no, 845 hdev->bus, hdev->target, hdev->lun, 846 scsi_device_type(hdev->devtype)); 847 848 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 849 output_len += scnprintf(buf + output_len, 850 PAGE_SIZE - output_len, 851 "%s\n", active); 852 continue; 853 } 854 855 box = hdev->box[i]; 856 memcpy(&phys_connector, &hdev->phys_connector[i], 857 sizeof(phys_connector)); 858 if (phys_connector[0] < '0') 859 phys_connector[0] = '0'; 860 if (phys_connector[1] < '0') 861 phys_connector[1] = '0'; 862 output_len += scnprintf(buf + output_len, 863 PAGE_SIZE - output_len, 864 "PORT: %.2s ", 865 phys_connector); 866 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 867 hdev->expose_device) { 868 if (box == 0 || box == 0xFF) { 869 output_len += scnprintf(buf + output_len, 870 PAGE_SIZE - output_len, 871 "BAY: %hhu %s\n", 872 bay, active); 873 } else { 874 output_len += scnprintf(buf + output_len, 875 PAGE_SIZE - output_len, 876 "BOX: %hhu BAY: %hhu %s\n", 877 box, bay, active); 878 } 879 } else if (box != 0 && box != 0xFF) { 880 output_len += scnprintf(buf + output_len, 881 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 882 box, active); 883 } else 884 output_len += scnprintf(buf + output_len, 885 PAGE_SIZE - output_len, "%s\n", active); 886 } 887 888 spin_unlock_irqrestore(&h->devlock, flags); 889 return output_len; 890 } 891 892 static ssize_t host_show_ctlr_num(struct device *dev, 893 struct device_attribute *attr, char *buf) 894 { 895 struct ctlr_info *h; 896 struct Scsi_Host *shost = class_to_shost(dev); 897 898 h = shost_to_hba(shost); 899 return snprintf(buf, 20, "%d\n", h->ctlr); 900 } 901 902 static ssize_t host_show_legacy_board(struct device *dev, 903 struct device_attribute *attr, char *buf) 904 { 905 struct ctlr_info *h; 906 struct Scsi_Host *shost = class_to_shost(dev); 907 908 h = shost_to_hba(shost); 909 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 910 } 911 912 static DEVICE_ATTR_RO(raid_level); 913 static DEVICE_ATTR_RO(lunid); 914 static DEVICE_ATTR_RO(unique_id); 915 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 916 static DEVICE_ATTR_RO(sas_address); 917 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 918 host_show_hp_ssd_smart_path_enabled, NULL); 919 static DEVICE_ATTR_RO(path_info); 920 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 921 host_show_hp_ssd_smart_path_status, 922 host_store_hp_ssd_smart_path_status); 923 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 924 host_store_raid_offload_debug); 925 static DEVICE_ATTR(firmware_revision, S_IRUGO, 926 host_show_firmware_revision, NULL); 927 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 928 host_show_commands_outstanding, NULL); 929 static DEVICE_ATTR(transport_mode, S_IRUGO, 930 host_show_transport_mode, NULL); 931 static DEVICE_ATTR(resettable, S_IRUGO, 932 host_show_resettable, NULL); 933 static DEVICE_ATTR(lockup_detected, S_IRUGO, 934 host_show_lockup_detected, NULL); 935 static DEVICE_ATTR(ctlr_num, S_IRUGO, 936 host_show_ctlr_num, NULL); 937 static DEVICE_ATTR(legacy_board, S_IRUGO, 938 host_show_legacy_board, NULL); 939 940 static struct device_attribute *hpsa_sdev_attrs[] = { 941 &dev_attr_raid_level, 942 &dev_attr_lunid, 943 &dev_attr_unique_id, 944 &dev_attr_hp_ssd_smart_path_enabled, 945 &dev_attr_path_info, 946 &dev_attr_sas_address, 947 NULL, 948 }; 949 950 static struct device_attribute *hpsa_shost_attrs[] = { 951 &dev_attr_rescan, 952 &dev_attr_firmware_revision, 953 &dev_attr_commands_outstanding, 954 &dev_attr_transport_mode, 955 &dev_attr_resettable, 956 &dev_attr_hp_ssd_smart_path_status, 957 &dev_attr_raid_offload_debug, 958 &dev_attr_lockup_detected, 959 &dev_attr_ctlr_num, 960 &dev_attr_legacy_board, 961 NULL, 962 }; 963 964 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 965 HPSA_MAX_CONCURRENT_PASSTHRUS) 966 967 static struct scsi_host_template hpsa_driver_template = { 968 .module = THIS_MODULE, 969 .name = HPSA, 970 .proc_name = HPSA, 971 .queuecommand = hpsa_scsi_queue_command, 972 .scan_start = hpsa_scan_start, 973 .scan_finished = hpsa_scan_finished, 974 .change_queue_depth = hpsa_change_queue_depth, 975 .this_id = -1, 976 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 977 .ioctl = hpsa_ioctl, 978 .slave_alloc = hpsa_slave_alloc, 979 .slave_configure = hpsa_slave_configure, 980 .slave_destroy = hpsa_slave_destroy, 981 #ifdef CONFIG_COMPAT 982 .compat_ioctl = hpsa_compat_ioctl, 983 #endif 984 .sdev_attrs = hpsa_sdev_attrs, 985 .shost_attrs = hpsa_shost_attrs, 986 .max_sectors = 2048, 987 .no_write_same = 1, 988 }; 989 990 static inline u32 next_command(struct ctlr_info *h, u8 q) 991 { 992 u32 a; 993 struct reply_queue_buffer *rq = &h->reply_queue[q]; 994 995 if (h->transMethod & CFGTBL_Trans_io_accel1) 996 return h->access.command_completed(h, q); 997 998 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 999 return h->access.command_completed(h, q); 1000 1001 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 1002 a = rq->head[rq->current_entry]; 1003 rq->current_entry++; 1004 atomic_dec(&h->commands_outstanding); 1005 } else { 1006 a = FIFO_EMPTY; 1007 } 1008 /* Check for wraparound */ 1009 if (rq->current_entry == h->max_commands) { 1010 rq->current_entry = 0; 1011 rq->wraparound ^= 1; 1012 } 1013 return a; 1014 } 1015 1016 /* 1017 * There are some special bits in the bus address of the 1018 * command that we have to set for the controller to know 1019 * how to process the command: 1020 * 1021 * Normal performant mode: 1022 * bit 0: 1 means performant mode, 0 means simple mode. 1023 * bits 1-3 = block fetch table entry 1024 * bits 4-6 = command type (== 0) 1025 * 1026 * ioaccel1 mode: 1027 * bit 0 = "performant mode" bit. 1028 * bits 1-3 = block fetch table entry 1029 * bits 4-6 = command type (== 110) 1030 * (command type is needed because ioaccel1 mode 1031 * commands are submitted through the same register as normal 1032 * mode commands, so this is how the controller knows whether 1033 * the command is normal mode or ioaccel1 mode.) 1034 * 1035 * ioaccel2 mode: 1036 * bit 0 = "performant mode" bit. 1037 * bits 1-4 = block fetch table entry (note extra bit) 1038 * bits 4-6 = not needed, because ioaccel2 mode has 1039 * a separate special register for submitting commands. 1040 */ 1041 1042 /* 1043 * set_performant_mode: Modify the tag for cciss performant 1044 * set bit 0 for pull model, bits 3-1 for block fetch 1045 * register number 1046 */ 1047 #define DEFAULT_REPLY_QUEUE (-1) 1048 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1049 int reply_queue) 1050 { 1051 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1052 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1053 if (unlikely(!h->msix_vectors)) 1054 return; 1055 c->Header.ReplyQueue = reply_queue; 1056 } 1057 } 1058 1059 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1060 struct CommandList *c, 1061 int reply_queue) 1062 { 1063 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1064 1065 /* 1066 * Tell the controller to post the reply to the queue for this 1067 * processor. This seems to give the best I/O throughput. 1068 */ 1069 cp->ReplyQueue = reply_queue; 1070 /* 1071 * Set the bits in the address sent down to include: 1072 * - performant mode bit (bit 0) 1073 * - pull count (bits 1-3) 1074 * - command type (bits 4-6) 1075 */ 1076 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1077 IOACCEL1_BUSADDR_CMDTYPE; 1078 } 1079 1080 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1081 struct CommandList *c, 1082 int reply_queue) 1083 { 1084 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1085 &h->ioaccel2_cmd_pool[c->cmdindex]; 1086 1087 /* Tell the controller to post the reply to the queue for this 1088 * processor. This seems to give the best I/O throughput. 1089 */ 1090 cp->reply_queue = reply_queue; 1091 /* Set the bits in the address sent down to include: 1092 * - performant mode bit not used in ioaccel mode 2 1093 * - pull count (bits 0-3) 1094 * - command type isn't needed for ioaccel2 1095 */ 1096 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1097 } 1098 1099 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1100 struct CommandList *c, 1101 int reply_queue) 1102 { 1103 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1104 1105 /* 1106 * Tell the controller to post the reply to the queue for this 1107 * processor. This seems to give the best I/O throughput. 1108 */ 1109 cp->reply_queue = reply_queue; 1110 /* 1111 * Set the bits in the address sent down to include: 1112 * - performant mode bit not used in ioaccel mode 2 1113 * - pull count (bits 0-3) 1114 * - command type isn't needed for ioaccel2 1115 */ 1116 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1117 } 1118 1119 static int is_firmware_flash_cmd(u8 *cdb) 1120 { 1121 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1122 } 1123 1124 /* 1125 * During firmware flash, the heartbeat register may not update as frequently 1126 * as it should. So we dial down lockup detection during firmware flash. and 1127 * dial it back up when firmware flash completes. 1128 */ 1129 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1130 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1131 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1132 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1133 struct CommandList *c) 1134 { 1135 if (!is_firmware_flash_cmd(c->Request.CDB)) 1136 return; 1137 atomic_inc(&h->firmware_flash_in_progress); 1138 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1139 } 1140 1141 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1142 struct CommandList *c) 1143 { 1144 if (is_firmware_flash_cmd(c->Request.CDB) && 1145 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1146 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1147 } 1148 1149 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1150 struct CommandList *c, int reply_queue) 1151 { 1152 dial_down_lockup_detection_during_fw_flash(h, c); 1153 atomic_inc(&h->commands_outstanding); 1154 if (c->device) 1155 atomic_inc(&c->device->commands_outstanding); 1156 1157 reply_queue = h->reply_map[raw_smp_processor_id()]; 1158 switch (c->cmd_type) { 1159 case CMD_IOACCEL1: 1160 set_ioaccel1_performant_mode(h, c, reply_queue); 1161 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1162 break; 1163 case CMD_IOACCEL2: 1164 set_ioaccel2_performant_mode(h, c, reply_queue); 1165 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1166 break; 1167 case IOACCEL2_TMF: 1168 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1169 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1170 break; 1171 default: 1172 set_performant_mode(h, c, reply_queue); 1173 h->access.submit_command(h, c); 1174 } 1175 } 1176 1177 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1178 { 1179 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1180 } 1181 1182 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1183 { 1184 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1185 } 1186 1187 static inline int is_scsi_rev_5(struct ctlr_info *h) 1188 { 1189 if (!h->hba_inquiry_data) 1190 return 0; 1191 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1192 return 1; 1193 return 0; 1194 } 1195 1196 static int hpsa_find_target_lun(struct ctlr_info *h, 1197 unsigned char scsi3addr[], int bus, int *target, int *lun) 1198 { 1199 /* finds an unused bus, target, lun for a new physical device 1200 * assumes h->devlock is held 1201 */ 1202 int i, found = 0; 1203 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1204 1205 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1206 1207 for (i = 0; i < h->ndevices; i++) { 1208 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1209 __set_bit(h->dev[i]->target, lun_taken); 1210 } 1211 1212 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1213 if (i < HPSA_MAX_DEVICES) { 1214 /* *bus = 1; */ 1215 *target = i; 1216 *lun = 0; 1217 found = 1; 1218 } 1219 return !found; 1220 } 1221 1222 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1223 struct hpsa_scsi_dev_t *dev, char *description) 1224 { 1225 #define LABEL_SIZE 25 1226 char label[LABEL_SIZE]; 1227 1228 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1229 return; 1230 1231 switch (dev->devtype) { 1232 case TYPE_RAID: 1233 snprintf(label, LABEL_SIZE, "controller"); 1234 break; 1235 case TYPE_ENCLOSURE: 1236 snprintf(label, LABEL_SIZE, "enclosure"); 1237 break; 1238 case TYPE_DISK: 1239 case TYPE_ZBC: 1240 if (dev->external) 1241 snprintf(label, LABEL_SIZE, "external"); 1242 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1243 snprintf(label, LABEL_SIZE, "%s", 1244 raid_label[PHYSICAL_DRIVE]); 1245 else 1246 snprintf(label, LABEL_SIZE, "RAID-%s", 1247 dev->raid_level > RAID_UNKNOWN ? "?" : 1248 raid_label[dev->raid_level]); 1249 break; 1250 case TYPE_ROM: 1251 snprintf(label, LABEL_SIZE, "rom"); 1252 break; 1253 case TYPE_TAPE: 1254 snprintf(label, LABEL_SIZE, "tape"); 1255 break; 1256 case TYPE_MEDIUM_CHANGER: 1257 snprintf(label, LABEL_SIZE, "changer"); 1258 break; 1259 default: 1260 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1261 break; 1262 } 1263 1264 dev_printk(level, &h->pdev->dev, 1265 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1266 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1267 description, 1268 scsi_device_type(dev->devtype), 1269 dev->vendor, 1270 dev->model, 1271 label, 1272 dev->offload_config ? '+' : '-', 1273 dev->offload_to_be_enabled ? '+' : '-', 1274 dev->expose_device); 1275 } 1276 1277 /* Add an entry into h->dev[] array. */ 1278 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1279 struct hpsa_scsi_dev_t *device, 1280 struct hpsa_scsi_dev_t *added[], int *nadded) 1281 { 1282 /* assumes h->devlock is held */ 1283 int n = h->ndevices; 1284 int i; 1285 unsigned char addr1[8], addr2[8]; 1286 struct hpsa_scsi_dev_t *sd; 1287 1288 if (n >= HPSA_MAX_DEVICES) { 1289 dev_err(&h->pdev->dev, "too many devices, some will be " 1290 "inaccessible.\n"); 1291 return -1; 1292 } 1293 1294 /* physical devices do not have lun or target assigned until now. */ 1295 if (device->lun != -1) 1296 /* Logical device, lun is already assigned. */ 1297 goto lun_assigned; 1298 1299 /* If this device a non-zero lun of a multi-lun device 1300 * byte 4 of the 8-byte LUN addr will contain the logical 1301 * unit no, zero otherwise. 1302 */ 1303 if (device->scsi3addr[4] == 0) { 1304 /* This is not a non-zero lun of a multi-lun device */ 1305 if (hpsa_find_target_lun(h, device->scsi3addr, 1306 device->bus, &device->target, &device->lun) != 0) 1307 return -1; 1308 goto lun_assigned; 1309 } 1310 1311 /* This is a non-zero lun of a multi-lun device. 1312 * Search through our list and find the device which 1313 * has the same 8 byte LUN address, excepting byte 4 and 5. 1314 * Assign the same bus and target for this new LUN. 1315 * Use the logical unit number from the firmware. 1316 */ 1317 memcpy(addr1, device->scsi3addr, 8); 1318 addr1[4] = 0; 1319 addr1[5] = 0; 1320 for (i = 0; i < n; i++) { 1321 sd = h->dev[i]; 1322 memcpy(addr2, sd->scsi3addr, 8); 1323 addr2[4] = 0; 1324 addr2[5] = 0; 1325 /* differ only in byte 4 and 5? */ 1326 if (memcmp(addr1, addr2, 8) == 0) { 1327 device->bus = sd->bus; 1328 device->target = sd->target; 1329 device->lun = device->scsi3addr[4]; 1330 break; 1331 } 1332 } 1333 if (device->lun == -1) { 1334 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1335 " suspect firmware bug or unsupported hardware " 1336 "configuration.\n"); 1337 return -1; 1338 } 1339 1340 lun_assigned: 1341 1342 h->dev[n] = device; 1343 h->ndevices++; 1344 added[*nadded] = device; 1345 (*nadded)++; 1346 hpsa_show_dev_msg(KERN_INFO, h, device, 1347 device->expose_device ? "added" : "masked"); 1348 return 0; 1349 } 1350 1351 /* 1352 * Called during a scan operation. 1353 * 1354 * Update an entry in h->dev[] array. 1355 */ 1356 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1357 int entry, struct hpsa_scsi_dev_t *new_entry) 1358 { 1359 /* assumes h->devlock is held */ 1360 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1361 1362 /* Raid level changed. */ 1363 h->dev[entry]->raid_level = new_entry->raid_level; 1364 1365 /* 1366 * ioacccel_handle may have changed for a dual domain disk 1367 */ 1368 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1369 1370 /* Raid offload parameters changed. Careful about the ordering. */ 1371 if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 1372 /* 1373 * if drive is newly offload_enabled, we want to copy the 1374 * raid map data first. If previously offload_enabled and 1375 * offload_config were set, raid map data had better be 1376 * the same as it was before. If raid map data has changed 1377 * then it had better be the case that 1378 * h->dev[entry]->offload_enabled is currently 0. 1379 */ 1380 h->dev[entry]->raid_map = new_entry->raid_map; 1381 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1382 } 1383 if (new_entry->offload_to_be_enabled) { 1384 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1385 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1386 } 1387 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1388 h->dev[entry]->offload_config = new_entry->offload_config; 1389 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1390 h->dev[entry]->queue_depth = new_entry->queue_depth; 1391 1392 /* 1393 * We can turn off ioaccel offload now, but need to delay turning 1394 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 1395 * can't do that until all the devices are updated. 1396 */ 1397 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1398 1399 /* 1400 * turn ioaccel off immediately if told to do so. 1401 */ 1402 if (!new_entry->offload_to_be_enabled) 1403 h->dev[entry]->offload_enabled = 0; 1404 1405 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1406 } 1407 1408 /* Replace an entry from h->dev[] array. */ 1409 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1410 int entry, struct hpsa_scsi_dev_t *new_entry, 1411 struct hpsa_scsi_dev_t *added[], int *nadded, 1412 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1413 { 1414 /* assumes h->devlock is held */ 1415 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1416 removed[*nremoved] = h->dev[entry]; 1417 (*nremoved)++; 1418 1419 /* 1420 * New physical devices won't have target/lun assigned yet 1421 * so we need to preserve the values in the slot we are replacing. 1422 */ 1423 if (new_entry->target == -1) { 1424 new_entry->target = h->dev[entry]->target; 1425 new_entry->lun = h->dev[entry]->lun; 1426 } 1427 1428 h->dev[entry] = new_entry; 1429 added[*nadded] = new_entry; 1430 (*nadded)++; 1431 1432 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1433 } 1434 1435 /* Remove an entry from h->dev[] array. */ 1436 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1437 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1438 { 1439 /* assumes h->devlock is held */ 1440 int i; 1441 struct hpsa_scsi_dev_t *sd; 1442 1443 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1444 1445 sd = h->dev[entry]; 1446 removed[*nremoved] = h->dev[entry]; 1447 (*nremoved)++; 1448 1449 for (i = entry; i < h->ndevices-1; i++) 1450 h->dev[i] = h->dev[i+1]; 1451 h->ndevices--; 1452 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1453 } 1454 1455 #define SCSI3ADDR_EQ(a, b) ( \ 1456 (a)[7] == (b)[7] && \ 1457 (a)[6] == (b)[6] && \ 1458 (a)[5] == (b)[5] && \ 1459 (a)[4] == (b)[4] && \ 1460 (a)[3] == (b)[3] && \ 1461 (a)[2] == (b)[2] && \ 1462 (a)[1] == (b)[1] && \ 1463 (a)[0] == (b)[0]) 1464 1465 static void fixup_botched_add(struct ctlr_info *h, 1466 struct hpsa_scsi_dev_t *added) 1467 { 1468 /* called when scsi_add_device fails in order to re-adjust 1469 * h->dev[] to match the mid layer's view. 1470 */ 1471 unsigned long flags; 1472 int i, j; 1473 1474 spin_lock_irqsave(&h->lock, flags); 1475 for (i = 0; i < h->ndevices; i++) { 1476 if (h->dev[i] == added) { 1477 for (j = i; j < h->ndevices-1; j++) 1478 h->dev[j] = h->dev[j+1]; 1479 h->ndevices--; 1480 break; 1481 } 1482 } 1483 spin_unlock_irqrestore(&h->lock, flags); 1484 kfree(added); 1485 } 1486 1487 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1488 struct hpsa_scsi_dev_t *dev2) 1489 { 1490 /* we compare everything except lun and target as these 1491 * are not yet assigned. Compare parts likely 1492 * to differ first 1493 */ 1494 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1495 sizeof(dev1->scsi3addr)) != 0) 1496 return 0; 1497 if (memcmp(dev1->device_id, dev2->device_id, 1498 sizeof(dev1->device_id)) != 0) 1499 return 0; 1500 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1501 return 0; 1502 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1503 return 0; 1504 if (dev1->devtype != dev2->devtype) 1505 return 0; 1506 if (dev1->bus != dev2->bus) 1507 return 0; 1508 return 1; 1509 } 1510 1511 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1512 struct hpsa_scsi_dev_t *dev2) 1513 { 1514 /* Device attributes that can change, but don't mean 1515 * that the device is a different device, nor that the OS 1516 * needs to be told anything about the change. 1517 */ 1518 if (dev1->raid_level != dev2->raid_level) 1519 return 1; 1520 if (dev1->offload_config != dev2->offload_config) 1521 return 1; 1522 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1523 return 1; 1524 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1525 if (dev1->queue_depth != dev2->queue_depth) 1526 return 1; 1527 /* 1528 * This can happen for dual domain devices. An active 1529 * path change causes the ioaccel handle to change 1530 * 1531 * for example note the handle differences between p0 and p1 1532 * Device WWN ,WWN hash,Handle 1533 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1534 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1535 */ 1536 if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1537 return 1; 1538 return 0; 1539 } 1540 1541 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1542 * and return needle location in *index. If scsi3addr matches, but not 1543 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1544 * location in *index. 1545 * In the case of a minor device attribute change, such as RAID level, just 1546 * return DEVICE_UPDATED, along with the updated device's location in index. 1547 * If needle not found, return DEVICE_NOT_FOUND. 1548 */ 1549 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1550 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1551 int *index) 1552 { 1553 int i; 1554 #define DEVICE_NOT_FOUND 0 1555 #define DEVICE_CHANGED 1 1556 #define DEVICE_SAME 2 1557 #define DEVICE_UPDATED 3 1558 if (needle == NULL) 1559 return DEVICE_NOT_FOUND; 1560 1561 for (i = 0; i < haystack_size; i++) { 1562 if (haystack[i] == NULL) /* previously removed. */ 1563 continue; 1564 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1565 *index = i; 1566 if (device_is_the_same(needle, haystack[i])) { 1567 if (device_updated(needle, haystack[i])) 1568 return DEVICE_UPDATED; 1569 return DEVICE_SAME; 1570 } else { 1571 /* Keep offline devices offline */ 1572 if (needle->volume_offline) 1573 return DEVICE_NOT_FOUND; 1574 return DEVICE_CHANGED; 1575 } 1576 } 1577 } 1578 *index = -1; 1579 return DEVICE_NOT_FOUND; 1580 } 1581 1582 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1583 unsigned char scsi3addr[]) 1584 { 1585 struct offline_device_entry *device; 1586 unsigned long flags; 1587 1588 /* Check to see if device is already on the list */ 1589 spin_lock_irqsave(&h->offline_device_lock, flags); 1590 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1591 if (memcmp(device->scsi3addr, scsi3addr, 1592 sizeof(device->scsi3addr)) == 0) { 1593 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1594 return; 1595 } 1596 } 1597 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1598 1599 /* Device is not on the list, add it. */ 1600 device = kmalloc(sizeof(*device), GFP_KERNEL); 1601 if (!device) 1602 return; 1603 1604 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1605 spin_lock_irqsave(&h->offline_device_lock, flags); 1606 list_add_tail(&device->offline_list, &h->offline_device_list); 1607 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1608 } 1609 1610 /* Print a message explaining various offline volume states */ 1611 static void hpsa_show_volume_status(struct ctlr_info *h, 1612 struct hpsa_scsi_dev_t *sd) 1613 { 1614 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1615 dev_info(&h->pdev->dev, 1616 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1617 h->scsi_host->host_no, 1618 sd->bus, sd->target, sd->lun); 1619 switch (sd->volume_offline) { 1620 case HPSA_LV_OK: 1621 break; 1622 case HPSA_LV_UNDERGOING_ERASE: 1623 dev_info(&h->pdev->dev, 1624 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1625 h->scsi_host->host_no, 1626 sd->bus, sd->target, sd->lun); 1627 break; 1628 case HPSA_LV_NOT_AVAILABLE: 1629 dev_info(&h->pdev->dev, 1630 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1631 h->scsi_host->host_no, 1632 sd->bus, sd->target, sd->lun); 1633 break; 1634 case HPSA_LV_UNDERGOING_RPI: 1635 dev_info(&h->pdev->dev, 1636 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1637 h->scsi_host->host_no, 1638 sd->bus, sd->target, sd->lun); 1639 break; 1640 case HPSA_LV_PENDING_RPI: 1641 dev_info(&h->pdev->dev, 1642 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1643 h->scsi_host->host_no, 1644 sd->bus, sd->target, sd->lun); 1645 break; 1646 case HPSA_LV_ENCRYPTED_NO_KEY: 1647 dev_info(&h->pdev->dev, 1648 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1649 h->scsi_host->host_no, 1650 sd->bus, sd->target, sd->lun); 1651 break; 1652 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1653 dev_info(&h->pdev->dev, 1654 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1655 h->scsi_host->host_no, 1656 sd->bus, sd->target, sd->lun); 1657 break; 1658 case HPSA_LV_UNDERGOING_ENCRYPTION: 1659 dev_info(&h->pdev->dev, 1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1661 h->scsi_host->host_no, 1662 sd->bus, sd->target, sd->lun); 1663 break; 1664 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1665 dev_info(&h->pdev->dev, 1666 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1667 h->scsi_host->host_no, 1668 sd->bus, sd->target, sd->lun); 1669 break; 1670 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1671 dev_info(&h->pdev->dev, 1672 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1673 h->scsi_host->host_no, 1674 sd->bus, sd->target, sd->lun); 1675 break; 1676 case HPSA_LV_PENDING_ENCRYPTION: 1677 dev_info(&h->pdev->dev, 1678 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1679 h->scsi_host->host_no, 1680 sd->bus, sd->target, sd->lun); 1681 break; 1682 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1683 dev_info(&h->pdev->dev, 1684 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1685 h->scsi_host->host_no, 1686 sd->bus, sd->target, sd->lun); 1687 break; 1688 } 1689 } 1690 1691 /* 1692 * Figure the list of physical drive pointers for a logical drive with 1693 * raid offload configured. 1694 */ 1695 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1696 struct hpsa_scsi_dev_t *dev[], int ndevices, 1697 struct hpsa_scsi_dev_t *logical_drive) 1698 { 1699 struct raid_map_data *map = &logical_drive->raid_map; 1700 struct raid_map_disk_data *dd = &map->data[0]; 1701 int i, j; 1702 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1703 le16_to_cpu(map->metadata_disks_per_row); 1704 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1705 le16_to_cpu(map->layout_map_count) * 1706 total_disks_per_row; 1707 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1708 total_disks_per_row; 1709 int qdepth; 1710 1711 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1712 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1713 1714 logical_drive->nphysical_disks = nraid_map_entries; 1715 1716 qdepth = 0; 1717 for (i = 0; i < nraid_map_entries; i++) { 1718 logical_drive->phys_disk[i] = NULL; 1719 if (!logical_drive->offload_config) 1720 continue; 1721 for (j = 0; j < ndevices; j++) { 1722 if (dev[j] == NULL) 1723 continue; 1724 if (dev[j]->devtype != TYPE_DISK && 1725 dev[j]->devtype != TYPE_ZBC) 1726 continue; 1727 if (is_logical_device(dev[j])) 1728 continue; 1729 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1730 continue; 1731 1732 logical_drive->phys_disk[i] = dev[j]; 1733 if (i < nphys_disk) 1734 qdepth = min(h->nr_cmds, qdepth + 1735 logical_drive->phys_disk[i]->queue_depth); 1736 break; 1737 } 1738 1739 /* 1740 * This can happen if a physical drive is removed and 1741 * the logical drive is degraded. In that case, the RAID 1742 * map data will refer to a physical disk which isn't actually 1743 * present. And in that case offload_enabled should already 1744 * be 0, but we'll turn it off here just in case 1745 */ 1746 if (!logical_drive->phys_disk[i]) { 1747 dev_warn(&h->pdev->dev, 1748 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1749 __func__, 1750 h->scsi_host->host_no, logical_drive->bus, 1751 logical_drive->target, logical_drive->lun); 1752 hpsa_turn_off_ioaccel_for_device(logical_drive); 1753 logical_drive->queue_depth = 8; 1754 } 1755 } 1756 if (nraid_map_entries) 1757 /* 1758 * This is correct for reads, too high for full stripe writes, 1759 * way too high for partial stripe writes 1760 */ 1761 logical_drive->queue_depth = qdepth; 1762 else { 1763 if (logical_drive->external) 1764 logical_drive->queue_depth = EXTERNAL_QD; 1765 else 1766 logical_drive->queue_depth = h->nr_cmds; 1767 } 1768 } 1769 1770 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1771 struct hpsa_scsi_dev_t *dev[], int ndevices) 1772 { 1773 int i; 1774 1775 for (i = 0; i < ndevices; i++) { 1776 if (dev[i] == NULL) 1777 continue; 1778 if (dev[i]->devtype != TYPE_DISK && 1779 dev[i]->devtype != TYPE_ZBC) 1780 continue; 1781 if (!is_logical_device(dev[i])) 1782 continue; 1783 1784 /* 1785 * If offload is currently enabled, the RAID map and 1786 * phys_disk[] assignment *better* not be changing 1787 * because we would be changing ioaccel phsy_disk[] pointers 1788 * on a ioaccel volume processing I/O requests. 1789 * 1790 * If an ioaccel volume status changed, initially because it was 1791 * re-configured and thus underwent a transformation, or 1792 * a drive failed, we would have received a state change 1793 * request and ioaccel should have been turned off. When the 1794 * transformation completes, we get another state change 1795 * request to turn ioaccel back on. In this case, we need 1796 * to update the ioaccel information. 1797 * 1798 * Thus: If it is not currently enabled, but will be after 1799 * the scan completes, make sure the ioaccel pointers 1800 * are up to date. 1801 */ 1802 1803 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 1804 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1805 } 1806 } 1807 1808 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1809 { 1810 int rc = 0; 1811 1812 if (!h->scsi_host) 1813 return 1; 1814 1815 if (is_logical_device(device)) /* RAID */ 1816 rc = scsi_add_device(h->scsi_host, device->bus, 1817 device->target, device->lun); 1818 else /* HBA */ 1819 rc = hpsa_add_sas_device(h->sas_host, device); 1820 1821 return rc; 1822 } 1823 1824 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1825 struct hpsa_scsi_dev_t *dev) 1826 { 1827 int i; 1828 int count = 0; 1829 1830 for (i = 0; i < h->nr_cmds; i++) { 1831 struct CommandList *c = h->cmd_pool + i; 1832 int refcount = atomic_inc_return(&c->refcount); 1833 1834 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1835 dev->scsi3addr)) { 1836 unsigned long flags; 1837 1838 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1839 if (!hpsa_is_cmd_idle(c)) 1840 ++count; 1841 spin_unlock_irqrestore(&h->lock, flags); 1842 } 1843 1844 cmd_free(h, c); 1845 } 1846 1847 return count; 1848 } 1849 1850 #define NUM_WAIT 20 1851 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1852 struct hpsa_scsi_dev_t *device) 1853 { 1854 int cmds = 0; 1855 int waits = 0; 1856 int num_wait = NUM_WAIT; 1857 1858 if (device->external) 1859 num_wait = HPSA_EH_PTRAID_TIMEOUT; 1860 1861 while (1) { 1862 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1863 if (cmds == 0) 1864 break; 1865 if (++waits > num_wait) 1866 break; 1867 msleep(1000); 1868 } 1869 1870 if (waits > num_wait) { 1871 dev_warn(&h->pdev->dev, 1872 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n", 1873 __func__, 1874 h->scsi_host->host_no, 1875 device->bus, device->target, device->lun, cmds); 1876 } 1877 } 1878 1879 static void hpsa_remove_device(struct ctlr_info *h, 1880 struct hpsa_scsi_dev_t *device) 1881 { 1882 struct scsi_device *sdev = NULL; 1883 1884 if (!h->scsi_host) 1885 return; 1886 1887 /* 1888 * Allow for commands to drain 1889 */ 1890 device->removed = 1; 1891 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1892 1893 if (is_logical_device(device)) { /* RAID */ 1894 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1895 device->target, device->lun); 1896 if (sdev) { 1897 scsi_remove_device(sdev); 1898 scsi_device_put(sdev); 1899 } else { 1900 /* 1901 * We don't expect to get here. Future commands 1902 * to this device will get a selection timeout as 1903 * if the device were gone. 1904 */ 1905 hpsa_show_dev_msg(KERN_WARNING, h, device, 1906 "didn't find device for removal."); 1907 } 1908 } else { /* HBA */ 1909 1910 hpsa_remove_sas_device(device); 1911 } 1912 } 1913 1914 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1915 struct hpsa_scsi_dev_t *sd[], int nsds) 1916 { 1917 /* sd contains scsi3 addresses and devtypes, and inquiry 1918 * data. This function takes what's in sd to be the current 1919 * reality and updates h->dev[] to reflect that reality. 1920 */ 1921 int i, entry, device_change, changes = 0; 1922 struct hpsa_scsi_dev_t *csd; 1923 unsigned long flags; 1924 struct hpsa_scsi_dev_t **added, **removed; 1925 int nadded, nremoved; 1926 1927 /* 1928 * A reset can cause a device status to change 1929 * re-schedule the scan to see what happened. 1930 */ 1931 spin_lock_irqsave(&h->reset_lock, flags); 1932 if (h->reset_in_progress) { 1933 h->drv_req_rescan = 1; 1934 spin_unlock_irqrestore(&h->reset_lock, flags); 1935 return; 1936 } 1937 spin_unlock_irqrestore(&h->reset_lock, flags); 1938 1939 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 1940 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1941 1942 if (!added || !removed) { 1943 dev_warn(&h->pdev->dev, "out of memory in " 1944 "adjust_hpsa_scsi_table\n"); 1945 goto free_and_out; 1946 } 1947 1948 spin_lock_irqsave(&h->devlock, flags); 1949 1950 /* find any devices in h->dev[] that are not in 1951 * sd[] and remove them from h->dev[], and for any 1952 * devices which have changed, remove the old device 1953 * info and add the new device info. 1954 * If minor device attributes change, just update 1955 * the existing device structure. 1956 */ 1957 i = 0; 1958 nremoved = 0; 1959 nadded = 0; 1960 while (i < h->ndevices) { 1961 csd = h->dev[i]; 1962 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1963 if (device_change == DEVICE_NOT_FOUND) { 1964 changes++; 1965 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1966 continue; /* remove ^^^, hence i not incremented */ 1967 } else if (device_change == DEVICE_CHANGED) { 1968 changes++; 1969 hpsa_scsi_replace_entry(h, i, sd[entry], 1970 added, &nadded, removed, &nremoved); 1971 /* Set it to NULL to prevent it from being freed 1972 * at the bottom of hpsa_update_scsi_devices() 1973 */ 1974 sd[entry] = NULL; 1975 } else if (device_change == DEVICE_UPDATED) { 1976 hpsa_scsi_update_entry(h, i, sd[entry]); 1977 } 1978 i++; 1979 } 1980 1981 /* Now, make sure every device listed in sd[] is also 1982 * listed in h->dev[], adding them if they aren't found 1983 */ 1984 1985 for (i = 0; i < nsds; i++) { 1986 if (!sd[i]) /* if already added above. */ 1987 continue; 1988 1989 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1990 * as the SCSI mid-layer does not handle such devices well. 1991 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1992 * at 160Hz, and prevents the system from coming up. 1993 */ 1994 if (sd[i]->volume_offline) { 1995 hpsa_show_volume_status(h, sd[i]); 1996 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1997 continue; 1998 } 1999 2000 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 2001 h->ndevices, &entry); 2002 if (device_change == DEVICE_NOT_FOUND) { 2003 changes++; 2004 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 2005 break; 2006 sd[i] = NULL; /* prevent from being freed later. */ 2007 } else if (device_change == DEVICE_CHANGED) { 2008 /* should never happen... */ 2009 changes++; 2010 dev_warn(&h->pdev->dev, 2011 "device unexpectedly changed.\n"); 2012 /* but if it does happen, we just ignore that device */ 2013 } 2014 } 2015 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 2016 2017 /* 2018 * Now that h->dev[]->phys_disk[] is coherent, we can enable 2019 * any logical drives that need it enabled. 2020 * 2021 * The raid map should be current by now. 2022 * 2023 * We are updating the device list used for I/O requests. 2024 */ 2025 for (i = 0; i < h->ndevices; i++) { 2026 if (h->dev[i] == NULL) 2027 continue; 2028 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 2029 } 2030 2031 spin_unlock_irqrestore(&h->devlock, flags); 2032 2033 /* Monitor devices which are in one of several NOT READY states to be 2034 * brought online later. This must be done without holding h->devlock, 2035 * so don't touch h->dev[] 2036 */ 2037 for (i = 0; i < nsds; i++) { 2038 if (!sd[i]) /* if already added above. */ 2039 continue; 2040 if (sd[i]->volume_offline) 2041 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 2042 } 2043 2044 /* Don't notify scsi mid layer of any changes the first time through 2045 * (or if there are no changes) scsi_scan_host will do it later the 2046 * first time through. 2047 */ 2048 if (!changes) 2049 goto free_and_out; 2050 2051 /* Notify scsi mid layer of any removed devices */ 2052 for (i = 0; i < nremoved; i++) { 2053 if (removed[i] == NULL) 2054 continue; 2055 if (removed[i]->expose_device) 2056 hpsa_remove_device(h, removed[i]); 2057 kfree(removed[i]); 2058 removed[i] = NULL; 2059 } 2060 2061 /* Notify scsi mid layer of any added devices */ 2062 for (i = 0; i < nadded; i++) { 2063 int rc = 0; 2064 2065 if (added[i] == NULL) 2066 continue; 2067 if (!(added[i]->expose_device)) 2068 continue; 2069 rc = hpsa_add_device(h, added[i]); 2070 if (!rc) 2071 continue; 2072 dev_warn(&h->pdev->dev, 2073 "addition failed %d, device not added.", rc); 2074 /* now we have to remove it from h->dev, 2075 * since it didn't get added to scsi mid layer 2076 */ 2077 fixup_botched_add(h, added[i]); 2078 h->drv_req_rescan = 1; 2079 } 2080 2081 free_and_out: 2082 kfree(added); 2083 kfree(removed); 2084 } 2085 2086 /* 2087 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2088 * Assume's h->devlock is held. 2089 */ 2090 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2091 int bus, int target, int lun) 2092 { 2093 int i; 2094 struct hpsa_scsi_dev_t *sd; 2095 2096 for (i = 0; i < h->ndevices; i++) { 2097 sd = h->dev[i]; 2098 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2099 return sd; 2100 } 2101 return NULL; 2102 } 2103 2104 static int hpsa_slave_alloc(struct scsi_device *sdev) 2105 { 2106 struct hpsa_scsi_dev_t *sd = NULL; 2107 unsigned long flags; 2108 struct ctlr_info *h; 2109 2110 h = sdev_to_hba(sdev); 2111 spin_lock_irqsave(&h->devlock, flags); 2112 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2113 struct scsi_target *starget; 2114 struct sas_rphy *rphy; 2115 2116 starget = scsi_target(sdev); 2117 rphy = target_to_rphy(starget); 2118 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2119 if (sd) { 2120 sd->target = sdev_id(sdev); 2121 sd->lun = sdev->lun; 2122 } 2123 } 2124 if (!sd) 2125 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2126 sdev_id(sdev), sdev->lun); 2127 2128 if (sd && sd->expose_device) { 2129 atomic_set(&sd->ioaccel_cmds_out, 0); 2130 sdev->hostdata = sd; 2131 } else 2132 sdev->hostdata = NULL; 2133 spin_unlock_irqrestore(&h->devlock, flags); 2134 return 0; 2135 } 2136 2137 /* configure scsi device based on internal per-device structure */ 2138 #define CTLR_TIMEOUT (120 * HZ) 2139 static int hpsa_slave_configure(struct scsi_device *sdev) 2140 { 2141 struct hpsa_scsi_dev_t *sd; 2142 int queue_depth; 2143 2144 sd = sdev->hostdata; 2145 sdev->no_uld_attach = !sd || !sd->expose_device; 2146 2147 if (sd) { 2148 sd->was_removed = 0; 2149 queue_depth = sd->queue_depth != 0 ? 2150 sd->queue_depth : sdev->host->can_queue; 2151 if (sd->external) { 2152 queue_depth = EXTERNAL_QD; 2153 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT; 2154 blk_queue_rq_timeout(sdev->request_queue, 2155 HPSA_EH_PTRAID_TIMEOUT); 2156 } 2157 if (is_hba_lunid(sd->scsi3addr)) { 2158 sdev->eh_timeout = CTLR_TIMEOUT; 2159 blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT); 2160 } 2161 } else { 2162 queue_depth = sdev->host->can_queue; 2163 } 2164 2165 scsi_change_queue_depth(sdev, queue_depth); 2166 2167 return 0; 2168 } 2169 2170 static void hpsa_slave_destroy(struct scsi_device *sdev) 2171 { 2172 struct hpsa_scsi_dev_t *hdev = NULL; 2173 2174 hdev = sdev->hostdata; 2175 2176 if (hdev) 2177 hdev->was_removed = 1; 2178 } 2179 2180 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2181 { 2182 int i; 2183 2184 if (!h->ioaccel2_cmd_sg_list) 2185 return; 2186 for (i = 0; i < h->nr_cmds; i++) { 2187 kfree(h->ioaccel2_cmd_sg_list[i]); 2188 h->ioaccel2_cmd_sg_list[i] = NULL; 2189 } 2190 kfree(h->ioaccel2_cmd_sg_list); 2191 h->ioaccel2_cmd_sg_list = NULL; 2192 } 2193 2194 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2195 { 2196 int i; 2197 2198 if (h->chainsize <= 0) 2199 return 0; 2200 2201 h->ioaccel2_cmd_sg_list = 2202 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2203 GFP_KERNEL); 2204 if (!h->ioaccel2_cmd_sg_list) 2205 return -ENOMEM; 2206 for (i = 0; i < h->nr_cmds; i++) { 2207 h->ioaccel2_cmd_sg_list[i] = 2208 kmalloc_array(h->maxsgentries, 2209 sizeof(*h->ioaccel2_cmd_sg_list[i]), 2210 GFP_KERNEL); 2211 if (!h->ioaccel2_cmd_sg_list[i]) 2212 goto clean; 2213 } 2214 return 0; 2215 2216 clean: 2217 hpsa_free_ioaccel2_sg_chain_blocks(h); 2218 return -ENOMEM; 2219 } 2220 2221 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2222 { 2223 int i; 2224 2225 if (!h->cmd_sg_list) 2226 return; 2227 for (i = 0; i < h->nr_cmds; i++) { 2228 kfree(h->cmd_sg_list[i]); 2229 h->cmd_sg_list[i] = NULL; 2230 } 2231 kfree(h->cmd_sg_list); 2232 h->cmd_sg_list = NULL; 2233 } 2234 2235 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2236 { 2237 int i; 2238 2239 if (h->chainsize <= 0) 2240 return 0; 2241 2242 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 2243 GFP_KERNEL); 2244 if (!h->cmd_sg_list) 2245 return -ENOMEM; 2246 2247 for (i = 0; i < h->nr_cmds; i++) { 2248 h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 2249 sizeof(*h->cmd_sg_list[i]), 2250 GFP_KERNEL); 2251 if (!h->cmd_sg_list[i]) 2252 goto clean; 2253 2254 } 2255 return 0; 2256 2257 clean: 2258 hpsa_free_sg_chain_blocks(h); 2259 return -ENOMEM; 2260 } 2261 2262 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2263 struct io_accel2_cmd *cp, struct CommandList *c) 2264 { 2265 struct ioaccel2_sg_element *chain_block; 2266 u64 temp64; 2267 u32 chain_size; 2268 2269 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2270 chain_size = le32_to_cpu(cp->sg[0].length); 2271 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 2272 DMA_TO_DEVICE); 2273 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2274 /* prevent subsequent unmapping */ 2275 cp->sg->address = 0; 2276 return -1; 2277 } 2278 cp->sg->address = cpu_to_le64(temp64); 2279 return 0; 2280 } 2281 2282 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2283 struct io_accel2_cmd *cp) 2284 { 2285 struct ioaccel2_sg_element *chain_sg; 2286 u64 temp64; 2287 u32 chain_size; 2288 2289 chain_sg = cp->sg; 2290 temp64 = le64_to_cpu(chain_sg->address); 2291 chain_size = le32_to_cpu(cp->sg[0].length); 2292 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2293 } 2294 2295 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2296 struct CommandList *c) 2297 { 2298 struct SGDescriptor *chain_sg, *chain_block; 2299 u64 temp64; 2300 u32 chain_len; 2301 2302 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2303 chain_block = h->cmd_sg_list[c->cmdindex]; 2304 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2305 chain_len = sizeof(*chain_sg) * 2306 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2307 chain_sg->Len = cpu_to_le32(chain_len); 2308 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 2309 DMA_TO_DEVICE); 2310 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2311 /* prevent subsequent unmapping */ 2312 chain_sg->Addr = cpu_to_le64(0); 2313 return -1; 2314 } 2315 chain_sg->Addr = cpu_to_le64(temp64); 2316 return 0; 2317 } 2318 2319 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2320 struct CommandList *c) 2321 { 2322 struct SGDescriptor *chain_sg; 2323 2324 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2325 return; 2326 2327 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2328 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 2329 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 2330 } 2331 2332 2333 /* Decode the various types of errors on ioaccel2 path. 2334 * Return 1 for any error that should generate a RAID path retry. 2335 * Return 0 for errors that don't require a RAID path retry. 2336 */ 2337 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2338 struct CommandList *c, 2339 struct scsi_cmnd *cmd, 2340 struct io_accel2_cmd *c2, 2341 struct hpsa_scsi_dev_t *dev) 2342 { 2343 int data_len; 2344 int retry = 0; 2345 u32 ioaccel2_resid = 0; 2346 2347 switch (c2->error_data.serv_response) { 2348 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2349 switch (c2->error_data.status) { 2350 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2351 if (cmd) 2352 cmd->result = 0; 2353 break; 2354 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2355 cmd->result |= SAM_STAT_CHECK_CONDITION; 2356 if (c2->error_data.data_present != 2357 IOACCEL2_SENSE_DATA_PRESENT) { 2358 memset(cmd->sense_buffer, 0, 2359 SCSI_SENSE_BUFFERSIZE); 2360 break; 2361 } 2362 /* copy the sense data */ 2363 data_len = c2->error_data.sense_data_len; 2364 if (data_len > SCSI_SENSE_BUFFERSIZE) 2365 data_len = SCSI_SENSE_BUFFERSIZE; 2366 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2367 data_len = 2368 sizeof(c2->error_data.sense_data_buff); 2369 memcpy(cmd->sense_buffer, 2370 c2->error_data.sense_data_buff, data_len); 2371 retry = 1; 2372 break; 2373 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2374 retry = 1; 2375 break; 2376 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2377 retry = 1; 2378 break; 2379 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2380 retry = 1; 2381 break; 2382 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2383 retry = 1; 2384 break; 2385 default: 2386 retry = 1; 2387 break; 2388 } 2389 break; 2390 case IOACCEL2_SERV_RESPONSE_FAILURE: 2391 switch (c2->error_data.status) { 2392 case IOACCEL2_STATUS_SR_IO_ERROR: 2393 case IOACCEL2_STATUS_SR_IO_ABORTED: 2394 case IOACCEL2_STATUS_SR_OVERRUN: 2395 retry = 1; 2396 break; 2397 case IOACCEL2_STATUS_SR_UNDERRUN: 2398 cmd->result = (DID_OK << 16); /* host byte */ 2399 ioaccel2_resid = get_unaligned_le32( 2400 &c2->error_data.resid_cnt[0]); 2401 scsi_set_resid(cmd, ioaccel2_resid); 2402 break; 2403 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2404 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2405 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2406 /* 2407 * Did an HBA disk disappear? We will eventually 2408 * get a state change event from the controller but 2409 * in the meantime, we need to tell the OS that the 2410 * HBA disk is no longer there and stop I/O 2411 * from going down. This allows the potential re-insert 2412 * of the disk to get the same device node. 2413 */ 2414 if (dev->physical_device && dev->expose_device) { 2415 cmd->result = DID_NO_CONNECT << 16; 2416 dev->removed = 1; 2417 h->drv_req_rescan = 1; 2418 dev_warn(&h->pdev->dev, 2419 "%s: device is gone!\n", __func__); 2420 } else 2421 /* 2422 * Retry by sending down the RAID path. 2423 * We will get an event from ctlr to 2424 * trigger rescan regardless. 2425 */ 2426 retry = 1; 2427 break; 2428 default: 2429 retry = 1; 2430 } 2431 break; 2432 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2433 break; 2434 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2435 break; 2436 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2437 retry = 1; 2438 break; 2439 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2440 break; 2441 default: 2442 retry = 1; 2443 break; 2444 } 2445 2446 if (dev->in_reset) 2447 retry = 0; 2448 2449 return retry; /* retry on raid path? */ 2450 } 2451 2452 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2453 struct CommandList *c) 2454 { 2455 struct hpsa_scsi_dev_t *dev = c->device; 2456 2457 /* 2458 * Reset c->scsi_cmd here so that the reset handler will know 2459 * this command has completed. Then, check to see if the handler is 2460 * waiting for this command, and, if so, wake it. 2461 */ 2462 c->scsi_cmd = SCSI_CMD_IDLE; 2463 mb(); /* Declare command idle before checking for pending events. */ 2464 if (dev) { 2465 atomic_dec(&dev->commands_outstanding); 2466 if (dev->in_reset && 2467 atomic_read(&dev->commands_outstanding) <= 0) 2468 wake_up_all(&h->event_sync_wait_queue); 2469 } 2470 } 2471 2472 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2473 struct CommandList *c) 2474 { 2475 hpsa_cmd_resolve_events(h, c); 2476 cmd_tagged_free(h, c); 2477 } 2478 2479 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2480 struct CommandList *c, struct scsi_cmnd *cmd) 2481 { 2482 hpsa_cmd_resolve_and_free(h, c); 2483 if (cmd && cmd->scsi_done) 2484 cmd->scsi_done(cmd); 2485 } 2486 2487 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2488 { 2489 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2490 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2491 } 2492 2493 static void process_ioaccel2_completion(struct ctlr_info *h, 2494 struct CommandList *c, struct scsi_cmnd *cmd, 2495 struct hpsa_scsi_dev_t *dev) 2496 { 2497 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2498 2499 /* check for good status */ 2500 if (likely(c2->error_data.serv_response == 0 && 2501 c2->error_data.status == 0)) { 2502 cmd->result = 0; 2503 return hpsa_cmd_free_and_done(h, c, cmd); 2504 } 2505 2506 /* 2507 * Any RAID offload error results in retry which will use 2508 * the normal I/O path so the controller can handle whatever is 2509 * wrong. 2510 */ 2511 if (is_logical_device(dev) && 2512 c2->error_data.serv_response == 2513 IOACCEL2_SERV_RESPONSE_FAILURE) { 2514 if (c2->error_data.status == 2515 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2516 hpsa_turn_off_ioaccel_for_device(dev); 2517 } 2518 2519 if (dev->in_reset) { 2520 cmd->result = DID_RESET << 16; 2521 return hpsa_cmd_free_and_done(h, c, cmd); 2522 } 2523 2524 return hpsa_retry_cmd(h, c); 2525 } 2526 2527 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2528 return hpsa_retry_cmd(h, c); 2529 2530 return hpsa_cmd_free_and_done(h, c, cmd); 2531 } 2532 2533 /* Returns 0 on success, < 0 otherwise. */ 2534 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2535 struct CommandList *cp) 2536 { 2537 u8 tmf_status = cp->err_info->ScsiStatus; 2538 2539 switch (tmf_status) { 2540 case CISS_TMF_COMPLETE: 2541 /* 2542 * CISS_TMF_COMPLETE never happens, instead, 2543 * ei->CommandStatus == 0 for this case. 2544 */ 2545 case CISS_TMF_SUCCESS: 2546 return 0; 2547 case CISS_TMF_INVALID_FRAME: 2548 case CISS_TMF_NOT_SUPPORTED: 2549 case CISS_TMF_FAILED: 2550 case CISS_TMF_WRONG_LUN: 2551 case CISS_TMF_OVERLAPPED_TAG: 2552 break; 2553 default: 2554 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2555 tmf_status); 2556 break; 2557 } 2558 return -tmf_status; 2559 } 2560 2561 static void complete_scsi_command(struct CommandList *cp) 2562 { 2563 struct scsi_cmnd *cmd; 2564 struct ctlr_info *h; 2565 struct ErrorInfo *ei; 2566 struct hpsa_scsi_dev_t *dev; 2567 struct io_accel2_cmd *c2; 2568 2569 u8 sense_key; 2570 u8 asc; /* additional sense code */ 2571 u8 ascq; /* additional sense code qualifier */ 2572 unsigned long sense_data_size; 2573 2574 ei = cp->err_info; 2575 cmd = cp->scsi_cmd; 2576 h = cp->h; 2577 2578 if (!cmd->device) { 2579 cmd->result = DID_NO_CONNECT << 16; 2580 return hpsa_cmd_free_and_done(h, cp, cmd); 2581 } 2582 2583 dev = cmd->device->hostdata; 2584 if (!dev) { 2585 cmd->result = DID_NO_CONNECT << 16; 2586 return hpsa_cmd_free_and_done(h, cp, cmd); 2587 } 2588 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2589 2590 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2591 if ((cp->cmd_type == CMD_SCSI) && 2592 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2593 hpsa_unmap_sg_chain_block(h, cp); 2594 2595 if ((cp->cmd_type == CMD_IOACCEL2) && 2596 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2597 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2598 2599 cmd->result = (DID_OK << 16); /* host byte */ 2600 2601 /* SCSI command has already been cleaned up in SML */ 2602 if (dev->was_removed) { 2603 hpsa_cmd_resolve_and_free(h, cp); 2604 return; 2605 } 2606 2607 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2608 if (dev->physical_device && dev->expose_device && 2609 dev->removed) { 2610 cmd->result = DID_NO_CONNECT << 16; 2611 return hpsa_cmd_free_and_done(h, cp, cmd); 2612 } 2613 if (likely(cp->phys_disk != NULL)) 2614 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2615 } 2616 2617 /* 2618 * We check for lockup status here as it may be set for 2619 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2620 * fail_all_oustanding_cmds() 2621 */ 2622 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2623 /* DID_NO_CONNECT will prevent a retry */ 2624 cmd->result = DID_NO_CONNECT << 16; 2625 return hpsa_cmd_free_and_done(h, cp, cmd); 2626 } 2627 2628 if (cp->cmd_type == CMD_IOACCEL2) 2629 return process_ioaccel2_completion(h, cp, cmd, dev); 2630 2631 scsi_set_resid(cmd, ei->ResidualCnt); 2632 if (ei->CommandStatus == 0) 2633 return hpsa_cmd_free_and_done(h, cp, cmd); 2634 2635 /* For I/O accelerator commands, copy over some fields to the normal 2636 * CISS header used below for error handling. 2637 */ 2638 if (cp->cmd_type == CMD_IOACCEL1) { 2639 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2640 cp->Header.SGList = scsi_sg_count(cmd); 2641 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2642 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2643 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2644 cp->Header.tag = c->tag; 2645 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2646 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2647 2648 /* Any RAID offload error results in retry which will use 2649 * the normal I/O path so the controller can handle whatever's 2650 * wrong. 2651 */ 2652 if (is_logical_device(dev)) { 2653 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2654 dev->offload_enabled = 0; 2655 return hpsa_retry_cmd(h, cp); 2656 } 2657 } 2658 2659 /* an error has occurred */ 2660 switch (ei->CommandStatus) { 2661 2662 case CMD_TARGET_STATUS: 2663 cmd->result |= ei->ScsiStatus; 2664 /* copy the sense data */ 2665 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2666 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2667 else 2668 sense_data_size = sizeof(ei->SenseInfo); 2669 if (ei->SenseLen < sense_data_size) 2670 sense_data_size = ei->SenseLen; 2671 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2672 if (ei->ScsiStatus) 2673 decode_sense_data(ei->SenseInfo, sense_data_size, 2674 &sense_key, &asc, &ascq); 2675 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2676 switch (sense_key) { 2677 case ABORTED_COMMAND: 2678 cmd->result |= DID_SOFT_ERROR << 16; 2679 break; 2680 case UNIT_ATTENTION: 2681 if (asc == 0x3F && ascq == 0x0E) 2682 h->drv_req_rescan = 1; 2683 break; 2684 case ILLEGAL_REQUEST: 2685 if (asc == 0x25 && ascq == 0x00) { 2686 dev->removed = 1; 2687 cmd->result = DID_NO_CONNECT << 16; 2688 } 2689 break; 2690 } 2691 break; 2692 } 2693 /* Problem was not a check condition 2694 * Pass it up to the upper layers... 2695 */ 2696 if (ei->ScsiStatus) { 2697 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2698 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2699 "Returning result: 0x%x\n", 2700 cp, ei->ScsiStatus, 2701 sense_key, asc, ascq, 2702 cmd->result); 2703 } else { /* scsi status is zero??? How??? */ 2704 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2705 "Returning no connection.\n", cp), 2706 2707 /* Ordinarily, this case should never happen, 2708 * but there is a bug in some released firmware 2709 * revisions that allows it to happen if, for 2710 * example, a 4100 backplane loses power and 2711 * the tape drive is in it. We assume that 2712 * it's a fatal error of some kind because we 2713 * can't show that it wasn't. We will make it 2714 * look like selection timeout since that is 2715 * the most common reason for this to occur, 2716 * and it's severe enough. 2717 */ 2718 2719 cmd->result = DID_NO_CONNECT << 16; 2720 } 2721 break; 2722 2723 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2724 break; 2725 case CMD_DATA_OVERRUN: 2726 dev_warn(&h->pdev->dev, 2727 "CDB %16phN data overrun\n", cp->Request.CDB); 2728 break; 2729 case CMD_INVALID: { 2730 /* print_bytes(cp, sizeof(*cp), 1, 0); 2731 print_cmd(cp); */ 2732 /* We get CMD_INVALID if you address a non-existent device 2733 * instead of a selection timeout (no response). You will 2734 * see this if you yank out a drive, then try to access it. 2735 * This is kind of a shame because it means that any other 2736 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2737 * missing target. */ 2738 cmd->result = DID_NO_CONNECT << 16; 2739 } 2740 break; 2741 case CMD_PROTOCOL_ERR: 2742 cmd->result = DID_ERROR << 16; 2743 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2744 cp->Request.CDB); 2745 break; 2746 case CMD_HARDWARE_ERR: 2747 cmd->result = DID_ERROR << 16; 2748 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2749 cp->Request.CDB); 2750 break; 2751 case CMD_CONNECTION_LOST: 2752 cmd->result = DID_ERROR << 16; 2753 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2754 cp->Request.CDB); 2755 break; 2756 case CMD_ABORTED: 2757 cmd->result = DID_ABORT << 16; 2758 break; 2759 case CMD_ABORT_FAILED: 2760 cmd->result = DID_ERROR << 16; 2761 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2762 cp->Request.CDB); 2763 break; 2764 case CMD_UNSOLICITED_ABORT: 2765 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2766 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2767 cp->Request.CDB); 2768 break; 2769 case CMD_TIMEOUT: 2770 cmd->result = DID_TIME_OUT << 16; 2771 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2772 cp->Request.CDB); 2773 break; 2774 case CMD_UNABORTABLE: 2775 cmd->result = DID_ERROR << 16; 2776 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2777 break; 2778 case CMD_TMF_STATUS: 2779 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2780 cmd->result = DID_ERROR << 16; 2781 break; 2782 case CMD_IOACCEL_DISABLED: 2783 /* This only handles the direct pass-through case since RAID 2784 * offload is handled above. Just attempt a retry. 2785 */ 2786 cmd->result = DID_SOFT_ERROR << 16; 2787 dev_warn(&h->pdev->dev, 2788 "cp %p had HP SSD Smart Path error\n", cp); 2789 break; 2790 default: 2791 cmd->result = DID_ERROR << 16; 2792 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2793 cp, ei->CommandStatus); 2794 } 2795 2796 return hpsa_cmd_free_and_done(h, cp, cmd); 2797 } 2798 2799 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 2800 int sg_used, enum dma_data_direction data_direction) 2801 { 2802 int i; 2803 2804 for (i = 0; i < sg_used; i++) 2805 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 2806 le32_to_cpu(c->SG[i].Len), 2807 data_direction); 2808 } 2809 2810 static int hpsa_map_one(struct pci_dev *pdev, 2811 struct CommandList *cp, 2812 unsigned char *buf, 2813 size_t buflen, 2814 enum dma_data_direction data_direction) 2815 { 2816 u64 addr64; 2817 2818 if (buflen == 0 || data_direction == DMA_NONE) { 2819 cp->Header.SGList = 0; 2820 cp->Header.SGTotal = cpu_to_le16(0); 2821 return 0; 2822 } 2823 2824 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2825 if (dma_mapping_error(&pdev->dev, addr64)) { 2826 /* Prevent subsequent unmap of something never mapped */ 2827 cp->Header.SGList = 0; 2828 cp->Header.SGTotal = cpu_to_le16(0); 2829 return -1; 2830 } 2831 cp->SG[0].Addr = cpu_to_le64(addr64); 2832 cp->SG[0].Len = cpu_to_le32(buflen); 2833 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2834 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2835 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2836 return 0; 2837 } 2838 2839 #define NO_TIMEOUT ((unsigned long) -1) 2840 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2841 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2842 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2843 { 2844 DECLARE_COMPLETION_ONSTACK(wait); 2845 2846 c->waiting = &wait; 2847 __enqueue_cmd_and_start_io(h, c, reply_queue); 2848 if (timeout_msecs == NO_TIMEOUT) { 2849 /* TODO: get rid of this no-timeout thing */ 2850 wait_for_completion_io(&wait); 2851 return IO_OK; 2852 } 2853 if (!wait_for_completion_io_timeout(&wait, 2854 msecs_to_jiffies(timeout_msecs))) { 2855 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2856 return -ETIMEDOUT; 2857 } 2858 return IO_OK; 2859 } 2860 2861 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2862 int reply_queue, unsigned long timeout_msecs) 2863 { 2864 if (unlikely(lockup_detected(h))) { 2865 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2866 return IO_OK; 2867 } 2868 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2869 } 2870 2871 static u32 lockup_detected(struct ctlr_info *h) 2872 { 2873 int cpu; 2874 u32 rc, *lockup_detected; 2875 2876 cpu = get_cpu(); 2877 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2878 rc = *lockup_detected; 2879 put_cpu(); 2880 return rc; 2881 } 2882 2883 #define MAX_DRIVER_CMD_RETRIES 25 2884 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2885 struct CommandList *c, enum dma_data_direction data_direction, 2886 unsigned long timeout_msecs) 2887 { 2888 int backoff_time = 10, retry_count = 0; 2889 int rc; 2890 2891 do { 2892 memset(c->err_info, 0, sizeof(*c->err_info)); 2893 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2894 timeout_msecs); 2895 if (rc) 2896 break; 2897 retry_count++; 2898 if (retry_count > 3) { 2899 msleep(backoff_time); 2900 if (backoff_time < 1000) 2901 backoff_time *= 2; 2902 } 2903 } while ((check_for_unit_attention(h, c) || 2904 check_for_busy(h, c)) && 2905 retry_count <= MAX_DRIVER_CMD_RETRIES); 2906 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2907 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2908 rc = -EIO; 2909 return rc; 2910 } 2911 2912 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2913 struct CommandList *c) 2914 { 2915 const u8 *cdb = c->Request.CDB; 2916 const u8 *lun = c->Header.LUN.LunAddrBytes; 2917 2918 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2919 txt, lun, cdb); 2920 } 2921 2922 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2923 struct CommandList *cp) 2924 { 2925 const struct ErrorInfo *ei = cp->err_info; 2926 struct device *d = &cp->h->pdev->dev; 2927 u8 sense_key, asc, ascq; 2928 int sense_len; 2929 2930 switch (ei->CommandStatus) { 2931 case CMD_TARGET_STATUS: 2932 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2933 sense_len = sizeof(ei->SenseInfo); 2934 else 2935 sense_len = ei->SenseLen; 2936 decode_sense_data(ei->SenseInfo, sense_len, 2937 &sense_key, &asc, &ascq); 2938 hpsa_print_cmd(h, "SCSI status", cp); 2939 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2940 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2941 sense_key, asc, ascq); 2942 else 2943 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2944 if (ei->ScsiStatus == 0) 2945 dev_warn(d, "SCSI status is abnormally zero. " 2946 "(probably indicates selection timeout " 2947 "reported incorrectly due to a known " 2948 "firmware bug, circa July, 2001.)\n"); 2949 break; 2950 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2951 break; 2952 case CMD_DATA_OVERRUN: 2953 hpsa_print_cmd(h, "overrun condition", cp); 2954 break; 2955 case CMD_INVALID: { 2956 /* controller unfortunately reports SCSI passthru's 2957 * to non-existent targets as invalid commands. 2958 */ 2959 hpsa_print_cmd(h, "invalid command", cp); 2960 dev_warn(d, "probably means device no longer present\n"); 2961 } 2962 break; 2963 case CMD_PROTOCOL_ERR: 2964 hpsa_print_cmd(h, "protocol error", cp); 2965 break; 2966 case CMD_HARDWARE_ERR: 2967 hpsa_print_cmd(h, "hardware error", cp); 2968 break; 2969 case CMD_CONNECTION_LOST: 2970 hpsa_print_cmd(h, "connection lost", cp); 2971 break; 2972 case CMD_ABORTED: 2973 hpsa_print_cmd(h, "aborted", cp); 2974 break; 2975 case CMD_ABORT_FAILED: 2976 hpsa_print_cmd(h, "abort failed", cp); 2977 break; 2978 case CMD_UNSOLICITED_ABORT: 2979 hpsa_print_cmd(h, "unsolicited abort", cp); 2980 break; 2981 case CMD_TIMEOUT: 2982 hpsa_print_cmd(h, "timed out", cp); 2983 break; 2984 case CMD_UNABORTABLE: 2985 hpsa_print_cmd(h, "unabortable", cp); 2986 break; 2987 case CMD_CTLR_LOCKUP: 2988 hpsa_print_cmd(h, "controller lockup detected", cp); 2989 break; 2990 default: 2991 hpsa_print_cmd(h, "unknown status", cp); 2992 dev_warn(d, "Unknown command status %x\n", 2993 ei->CommandStatus); 2994 } 2995 } 2996 2997 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2998 u8 page, u8 *buf, size_t bufsize) 2999 { 3000 int rc = IO_OK; 3001 struct CommandList *c; 3002 struct ErrorInfo *ei; 3003 3004 c = cmd_alloc(h); 3005 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 3006 page, scsi3addr, TYPE_CMD)) { 3007 rc = -1; 3008 goto out; 3009 } 3010 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3011 NO_TIMEOUT); 3012 if (rc) 3013 goto out; 3014 ei = c->err_info; 3015 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3016 hpsa_scsi_interpret_error(h, c); 3017 rc = -1; 3018 } 3019 out: 3020 cmd_free(h, c); 3021 return rc; 3022 } 3023 3024 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 3025 u8 *scsi3addr) 3026 { 3027 u8 *buf; 3028 u64 sa = 0; 3029 int rc = 0; 3030 3031 buf = kzalloc(1024, GFP_KERNEL); 3032 if (!buf) 3033 return 0; 3034 3035 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 3036 buf, 1024); 3037 3038 if (rc) 3039 goto out; 3040 3041 sa = get_unaligned_be64(buf+12); 3042 3043 out: 3044 kfree(buf); 3045 return sa; 3046 } 3047 3048 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3049 u16 page, unsigned char *buf, 3050 unsigned char bufsize) 3051 { 3052 int rc = IO_OK; 3053 struct CommandList *c; 3054 struct ErrorInfo *ei; 3055 3056 c = cmd_alloc(h); 3057 3058 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3059 page, scsi3addr, TYPE_CMD)) { 3060 rc = -1; 3061 goto out; 3062 } 3063 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3064 NO_TIMEOUT); 3065 if (rc) 3066 goto out; 3067 ei = c->err_info; 3068 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3069 hpsa_scsi_interpret_error(h, c); 3070 rc = -1; 3071 } 3072 out: 3073 cmd_free(h, c); 3074 return rc; 3075 } 3076 3077 static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3078 u8 reset_type, int reply_queue) 3079 { 3080 int rc = IO_OK; 3081 struct CommandList *c; 3082 struct ErrorInfo *ei; 3083 3084 c = cmd_alloc(h); 3085 c->device = dev; 3086 3087 /* fill_cmd can't fail here, no data buffer to map. */ 3088 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG); 3089 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 3090 if (rc) { 3091 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 3092 goto out; 3093 } 3094 /* no unmap needed here because no data xfer. */ 3095 3096 ei = c->err_info; 3097 if (ei->CommandStatus != 0) { 3098 hpsa_scsi_interpret_error(h, c); 3099 rc = -1; 3100 } 3101 out: 3102 cmd_free(h, c); 3103 return rc; 3104 } 3105 3106 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3107 struct hpsa_scsi_dev_t *dev, 3108 unsigned char *scsi3addr) 3109 { 3110 int i; 3111 bool match = false; 3112 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3113 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3114 3115 if (hpsa_is_cmd_idle(c)) 3116 return false; 3117 3118 switch (c->cmd_type) { 3119 case CMD_SCSI: 3120 case CMD_IOCTL_PEND: 3121 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3122 sizeof(c->Header.LUN.LunAddrBytes)); 3123 break; 3124 3125 case CMD_IOACCEL1: 3126 case CMD_IOACCEL2: 3127 if (c->phys_disk == dev) { 3128 /* HBA mode match */ 3129 match = true; 3130 } else { 3131 /* Possible RAID mode -- check each phys dev. */ 3132 /* FIXME: Do we need to take out a lock here? If 3133 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3134 * instead. */ 3135 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3136 /* FIXME: an alternate test might be 3137 * 3138 * match = dev->phys_disk[i]->ioaccel_handle 3139 * == c2->scsi_nexus; */ 3140 match = dev->phys_disk[i] == c->phys_disk; 3141 } 3142 } 3143 break; 3144 3145 case IOACCEL2_TMF: 3146 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3147 match = dev->phys_disk[i]->ioaccel_handle == 3148 le32_to_cpu(ac->it_nexus); 3149 } 3150 break; 3151 3152 case 0: /* The command is in the middle of being initialized. */ 3153 match = false; 3154 break; 3155 3156 default: 3157 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3158 c->cmd_type); 3159 BUG(); 3160 } 3161 3162 return match; 3163 } 3164 3165 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3166 u8 reset_type, int reply_queue) 3167 { 3168 int rc = 0; 3169 3170 /* We can really only handle one reset at a time */ 3171 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3172 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3173 return -EINTR; 3174 } 3175 3176 rc = hpsa_send_reset(h, dev, reset_type, reply_queue); 3177 if (!rc) { 3178 /* incremented by sending the reset request */ 3179 atomic_dec(&dev->commands_outstanding); 3180 wait_event(h->event_sync_wait_queue, 3181 atomic_read(&dev->commands_outstanding) <= 0 || 3182 lockup_detected(h)); 3183 } 3184 3185 if (unlikely(lockup_detected(h))) { 3186 dev_warn(&h->pdev->dev, 3187 "Controller lockup detected during reset wait\n"); 3188 rc = -ENODEV; 3189 } 3190 3191 if (!rc) 3192 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0); 3193 3194 mutex_unlock(&h->reset_mutex); 3195 return rc; 3196 } 3197 3198 static void hpsa_get_raid_level(struct ctlr_info *h, 3199 unsigned char *scsi3addr, unsigned char *raid_level) 3200 { 3201 int rc; 3202 unsigned char *buf; 3203 3204 *raid_level = RAID_UNKNOWN; 3205 buf = kzalloc(64, GFP_KERNEL); 3206 if (!buf) 3207 return; 3208 3209 if (!hpsa_vpd_page_supported(h, scsi3addr, 3210 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3211 goto exit; 3212 3213 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3214 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3215 3216 if (rc == 0) 3217 *raid_level = buf[8]; 3218 if (*raid_level > RAID_UNKNOWN) 3219 *raid_level = RAID_UNKNOWN; 3220 exit: 3221 kfree(buf); 3222 return; 3223 } 3224 3225 #define HPSA_MAP_DEBUG 3226 #ifdef HPSA_MAP_DEBUG 3227 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3228 struct raid_map_data *map_buff) 3229 { 3230 struct raid_map_disk_data *dd = &map_buff->data[0]; 3231 int map, row, col; 3232 u16 map_cnt, row_cnt, disks_per_row; 3233 3234 if (rc != 0) 3235 return; 3236 3237 /* Show details only if debugging has been activated. */ 3238 if (h->raid_offload_debug < 2) 3239 return; 3240 3241 dev_info(&h->pdev->dev, "structure_size = %u\n", 3242 le32_to_cpu(map_buff->structure_size)); 3243 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3244 le32_to_cpu(map_buff->volume_blk_size)); 3245 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3246 le64_to_cpu(map_buff->volume_blk_cnt)); 3247 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3248 map_buff->phys_blk_shift); 3249 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3250 map_buff->parity_rotation_shift); 3251 dev_info(&h->pdev->dev, "strip_size = %u\n", 3252 le16_to_cpu(map_buff->strip_size)); 3253 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3254 le64_to_cpu(map_buff->disk_starting_blk)); 3255 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3256 le64_to_cpu(map_buff->disk_blk_cnt)); 3257 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3258 le16_to_cpu(map_buff->data_disks_per_row)); 3259 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3260 le16_to_cpu(map_buff->metadata_disks_per_row)); 3261 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3262 le16_to_cpu(map_buff->row_cnt)); 3263 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3264 le16_to_cpu(map_buff->layout_map_count)); 3265 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3266 le16_to_cpu(map_buff->flags)); 3267 dev_info(&h->pdev->dev, "encryption = %s\n", 3268 le16_to_cpu(map_buff->flags) & 3269 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3270 dev_info(&h->pdev->dev, "dekindex = %u\n", 3271 le16_to_cpu(map_buff->dekindex)); 3272 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3273 for (map = 0; map < map_cnt; map++) { 3274 dev_info(&h->pdev->dev, "Map%u:\n", map); 3275 row_cnt = le16_to_cpu(map_buff->row_cnt); 3276 for (row = 0; row < row_cnt; row++) { 3277 dev_info(&h->pdev->dev, " Row%u:\n", row); 3278 disks_per_row = 3279 le16_to_cpu(map_buff->data_disks_per_row); 3280 for (col = 0; col < disks_per_row; col++, dd++) 3281 dev_info(&h->pdev->dev, 3282 " D%02u: h=0x%04x xor=%u,%u\n", 3283 col, dd->ioaccel_handle, 3284 dd->xor_mult[0], dd->xor_mult[1]); 3285 disks_per_row = 3286 le16_to_cpu(map_buff->metadata_disks_per_row); 3287 for (col = 0; col < disks_per_row; col++, dd++) 3288 dev_info(&h->pdev->dev, 3289 " M%02u: h=0x%04x xor=%u,%u\n", 3290 col, dd->ioaccel_handle, 3291 dd->xor_mult[0], dd->xor_mult[1]); 3292 } 3293 } 3294 } 3295 #else 3296 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3297 __attribute__((unused)) int rc, 3298 __attribute__((unused)) struct raid_map_data *map_buff) 3299 { 3300 } 3301 #endif 3302 3303 static int hpsa_get_raid_map(struct ctlr_info *h, 3304 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3305 { 3306 int rc = 0; 3307 struct CommandList *c; 3308 struct ErrorInfo *ei; 3309 3310 c = cmd_alloc(h); 3311 3312 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3313 sizeof(this_device->raid_map), 0, 3314 scsi3addr, TYPE_CMD)) { 3315 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3316 cmd_free(h, c); 3317 return -1; 3318 } 3319 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3320 NO_TIMEOUT); 3321 if (rc) 3322 goto out; 3323 ei = c->err_info; 3324 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3325 hpsa_scsi_interpret_error(h, c); 3326 rc = -1; 3327 goto out; 3328 } 3329 cmd_free(h, c); 3330 3331 /* @todo in the future, dynamically allocate RAID map memory */ 3332 if (le32_to_cpu(this_device->raid_map.structure_size) > 3333 sizeof(this_device->raid_map)) { 3334 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3335 rc = -1; 3336 } 3337 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3338 return rc; 3339 out: 3340 cmd_free(h, c); 3341 return rc; 3342 } 3343 3344 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3345 unsigned char scsi3addr[], u16 bmic_device_index, 3346 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3347 { 3348 int rc = IO_OK; 3349 struct CommandList *c; 3350 struct ErrorInfo *ei; 3351 3352 c = cmd_alloc(h); 3353 3354 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3355 0, RAID_CTLR_LUNID, TYPE_CMD); 3356 if (rc) 3357 goto out; 3358 3359 c->Request.CDB[2] = bmic_device_index & 0xff; 3360 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3361 3362 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3363 NO_TIMEOUT); 3364 if (rc) 3365 goto out; 3366 ei = c->err_info; 3367 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3368 hpsa_scsi_interpret_error(h, c); 3369 rc = -1; 3370 } 3371 out: 3372 cmd_free(h, c); 3373 return rc; 3374 } 3375 3376 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3377 struct bmic_identify_controller *buf, size_t bufsize) 3378 { 3379 int rc = IO_OK; 3380 struct CommandList *c; 3381 struct ErrorInfo *ei; 3382 3383 c = cmd_alloc(h); 3384 3385 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3386 0, RAID_CTLR_LUNID, TYPE_CMD); 3387 if (rc) 3388 goto out; 3389 3390 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3391 NO_TIMEOUT); 3392 if (rc) 3393 goto out; 3394 ei = c->err_info; 3395 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3396 hpsa_scsi_interpret_error(h, c); 3397 rc = -1; 3398 } 3399 out: 3400 cmd_free(h, c); 3401 return rc; 3402 } 3403 3404 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3405 unsigned char scsi3addr[], u16 bmic_device_index, 3406 struct bmic_identify_physical_device *buf, size_t bufsize) 3407 { 3408 int rc = IO_OK; 3409 struct CommandList *c; 3410 struct ErrorInfo *ei; 3411 3412 c = cmd_alloc(h); 3413 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3414 0, RAID_CTLR_LUNID, TYPE_CMD); 3415 if (rc) 3416 goto out; 3417 3418 c->Request.CDB[2] = bmic_device_index & 0xff; 3419 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3420 3421 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3422 NO_TIMEOUT); 3423 ei = c->err_info; 3424 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3425 hpsa_scsi_interpret_error(h, c); 3426 rc = -1; 3427 } 3428 out: 3429 cmd_free(h, c); 3430 3431 return rc; 3432 } 3433 3434 /* 3435 * get enclosure information 3436 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3437 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3438 * Uses id_physical_device to determine the box_index. 3439 */ 3440 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3441 unsigned char *scsi3addr, 3442 struct ReportExtendedLUNdata *rlep, int rle_index, 3443 struct hpsa_scsi_dev_t *encl_dev) 3444 { 3445 int rc = -1; 3446 struct CommandList *c = NULL; 3447 struct ErrorInfo *ei = NULL; 3448 struct bmic_sense_storage_box_params *bssbp = NULL; 3449 struct bmic_identify_physical_device *id_phys = NULL; 3450 struct ext_report_lun_entry *rle; 3451 u16 bmic_device_index = 0; 3452 3453 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN) 3454 return; 3455 3456 rle = &rlep->LUN[rle_index]; 3457 3458 encl_dev->eli = 3459 hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3460 3461 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3462 3463 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3464 rc = IO_OK; 3465 goto out; 3466 } 3467 3468 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3469 rc = IO_OK; 3470 goto out; 3471 } 3472 3473 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3474 if (!bssbp) 3475 goto out; 3476 3477 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3478 if (!id_phys) 3479 goto out; 3480 3481 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3482 id_phys, sizeof(*id_phys)); 3483 if (rc) { 3484 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3485 __func__, encl_dev->external, bmic_device_index); 3486 goto out; 3487 } 3488 3489 c = cmd_alloc(h); 3490 3491 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3492 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3493 3494 if (rc) 3495 goto out; 3496 3497 if (id_phys->phys_connector[1] == 'E') 3498 c->Request.CDB[5] = id_phys->box_index; 3499 else 3500 c->Request.CDB[5] = 0; 3501 3502 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3503 NO_TIMEOUT); 3504 if (rc) 3505 goto out; 3506 3507 ei = c->err_info; 3508 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3509 rc = -1; 3510 goto out; 3511 } 3512 3513 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3514 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3515 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3516 3517 rc = IO_OK; 3518 out: 3519 kfree(bssbp); 3520 kfree(id_phys); 3521 3522 if (c) 3523 cmd_free(h, c); 3524 3525 if (rc != IO_OK) 3526 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3527 "Error, could not get enclosure information"); 3528 } 3529 3530 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3531 unsigned char *scsi3addr) 3532 { 3533 struct ReportExtendedLUNdata *physdev; 3534 u32 nphysicals; 3535 u64 sa = 0; 3536 int i; 3537 3538 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3539 if (!physdev) 3540 return 0; 3541 3542 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3543 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3544 kfree(physdev); 3545 return 0; 3546 } 3547 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3548 3549 for (i = 0; i < nphysicals; i++) 3550 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3551 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3552 break; 3553 } 3554 3555 kfree(physdev); 3556 3557 return sa; 3558 } 3559 3560 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3561 struct hpsa_scsi_dev_t *dev) 3562 { 3563 int rc; 3564 u64 sa = 0; 3565 3566 if (is_hba_lunid(scsi3addr)) { 3567 struct bmic_sense_subsystem_info *ssi; 3568 3569 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3570 if (!ssi) 3571 return; 3572 3573 rc = hpsa_bmic_sense_subsystem_information(h, 3574 scsi3addr, 0, ssi, sizeof(*ssi)); 3575 if (rc == 0) { 3576 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3577 h->sas_address = sa; 3578 } 3579 3580 kfree(ssi); 3581 } else 3582 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3583 3584 dev->sas_address = sa; 3585 } 3586 3587 static void hpsa_ext_ctrl_present(struct ctlr_info *h, 3588 struct ReportExtendedLUNdata *physdev) 3589 { 3590 u32 nphysicals; 3591 int i; 3592 3593 if (h->discovery_polling) 3594 return; 3595 3596 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 3597 3598 for (i = 0; i < nphysicals; i++) { 3599 if (physdev->LUN[i].device_type == 3600 BMIC_DEVICE_TYPE_CONTROLLER 3601 && !is_hba_lunid(physdev->LUN[i].lunid)) { 3602 dev_info(&h->pdev->dev, 3603 "External controller present, activate discovery polling and disable rld caching\n"); 3604 hpsa_disable_rld_caching(h); 3605 h->discovery_polling = 1; 3606 break; 3607 } 3608 } 3609 } 3610 3611 /* Get a device id from inquiry page 0x83 */ 3612 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3613 unsigned char scsi3addr[], u8 page) 3614 { 3615 int rc; 3616 int i; 3617 int pages; 3618 unsigned char *buf, bufsize; 3619 3620 buf = kzalloc(256, GFP_KERNEL); 3621 if (!buf) 3622 return false; 3623 3624 /* Get the size of the page list first */ 3625 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3626 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3627 buf, HPSA_VPD_HEADER_SZ); 3628 if (rc != 0) 3629 goto exit_unsupported; 3630 pages = buf[3]; 3631 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3632 bufsize = pages + HPSA_VPD_HEADER_SZ; 3633 else 3634 bufsize = 255; 3635 3636 /* Get the whole VPD page list */ 3637 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3638 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3639 buf, bufsize); 3640 if (rc != 0) 3641 goto exit_unsupported; 3642 3643 pages = buf[3]; 3644 for (i = 1; i <= pages; i++) 3645 if (buf[3 + i] == page) 3646 goto exit_supported; 3647 exit_unsupported: 3648 kfree(buf); 3649 return false; 3650 exit_supported: 3651 kfree(buf); 3652 return true; 3653 } 3654 3655 /* 3656 * Called during a scan operation. 3657 * Sets ioaccel status on the new device list, not the existing device list 3658 * 3659 * The device list used during I/O will be updated later in 3660 * adjust_hpsa_scsi_table. 3661 */ 3662 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3663 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3664 { 3665 int rc; 3666 unsigned char *buf; 3667 u8 ioaccel_status; 3668 3669 this_device->offload_config = 0; 3670 this_device->offload_enabled = 0; 3671 this_device->offload_to_be_enabled = 0; 3672 3673 buf = kzalloc(64, GFP_KERNEL); 3674 if (!buf) 3675 return; 3676 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3677 goto out; 3678 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3679 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3680 if (rc != 0) 3681 goto out; 3682 3683 #define IOACCEL_STATUS_BYTE 4 3684 #define OFFLOAD_CONFIGURED_BIT 0x01 3685 #define OFFLOAD_ENABLED_BIT 0x02 3686 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3687 this_device->offload_config = 3688 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3689 if (this_device->offload_config) { 3690 bool offload_enabled = 3691 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3692 /* 3693 * Check to see if offload can be enabled. 3694 */ 3695 if (offload_enabled) { 3696 rc = hpsa_get_raid_map(h, scsi3addr, this_device); 3697 if (rc) /* could not load raid_map */ 3698 goto out; 3699 this_device->offload_to_be_enabled = 1; 3700 } 3701 } 3702 3703 out: 3704 kfree(buf); 3705 return; 3706 } 3707 3708 /* Get the device id from inquiry page 0x83 */ 3709 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3710 unsigned char *device_id, int index, int buflen) 3711 { 3712 int rc; 3713 unsigned char *buf; 3714 3715 /* Does controller have VPD for device id? */ 3716 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3717 return 1; /* not supported */ 3718 3719 buf = kzalloc(64, GFP_KERNEL); 3720 if (!buf) 3721 return -ENOMEM; 3722 3723 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3724 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3725 if (rc == 0) { 3726 if (buflen > 16) 3727 buflen = 16; 3728 memcpy(device_id, &buf[8], buflen); 3729 } 3730 3731 kfree(buf); 3732 3733 return rc; /*0 - got id, otherwise, didn't */ 3734 } 3735 3736 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3737 void *buf, int bufsize, 3738 int extended_response) 3739 { 3740 int rc = IO_OK; 3741 struct CommandList *c; 3742 unsigned char scsi3addr[8]; 3743 struct ErrorInfo *ei; 3744 3745 c = cmd_alloc(h); 3746 3747 /* address the controller */ 3748 memset(scsi3addr, 0, sizeof(scsi3addr)); 3749 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3750 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3751 rc = -EAGAIN; 3752 goto out; 3753 } 3754 if (extended_response) 3755 c->Request.CDB[1] = extended_response; 3756 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3757 NO_TIMEOUT); 3758 if (rc) 3759 goto out; 3760 ei = c->err_info; 3761 if (ei->CommandStatus != 0 && 3762 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3763 hpsa_scsi_interpret_error(h, c); 3764 rc = -EIO; 3765 } else { 3766 struct ReportLUNdata *rld = buf; 3767 3768 if (rld->extended_response_flag != extended_response) { 3769 if (!h->legacy_board) { 3770 dev_err(&h->pdev->dev, 3771 "report luns requested format %u, got %u\n", 3772 extended_response, 3773 rld->extended_response_flag); 3774 rc = -EINVAL; 3775 } else 3776 rc = -EOPNOTSUPP; 3777 } 3778 } 3779 out: 3780 cmd_free(h, c); 3781 return rc; 3782 } 3783 3784 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3785 struct ReportExtendedLUNdata *buf, int bufsize) 3786 { 3787 int rc; 3788 struct ReportLUNdata *lbuf; 3789 3790 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3791 HPSA_REPORT_PHYS_EXTENDED); 3792 if (!rc || rc != -EOPNOTSUPP) 3793 return rc; 3794 3795 /* REPORT PHYS EXTENDED is not supported */ 3796 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3797 if (!lbuf) 3798 return -ENOMEM; 3799 3800 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3801 if (!rc) { 3802 int i; 3803 u32 nphys; 3804 3805 /* Copy ReportLUNdata header */ 3806 memcpy(buf, lbuf, 8); 3807 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3808 for (i = 0; i < nphys; i++) 3809 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3810 } 3811 kfree(lbuf); 3812 return rc; 3813 } 3814 3815 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3816 struct ReportLUNdata *buf, int bufsize) 3817 { 3818 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3819 } 3820 3821 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3822 int bus, int target, int lun) 3823 { 3824 device->bus = bus; 3825 device->target = target; 3826 device->lun = lun; 3827 } 3828 3829 /* Use VPD inquiry to get details of volume status */ 3830 static int hpsa_get_volume_status(struct ctlr_info *h, 3831 unsigned char scsi3addr[]) 3832 { 3833 int rc; 3834 int status; 3835 int size; 3836 unsigned char *buf; 3837 3838 buf = kzalloc(64, GFP_KERNEL); 3839 if (!buf) 3840 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3841 3842 /* Does controller have VPD for logical volume status? */ 3843 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3844 goto exit_failed; 3845 3846 /* Get the size of the VPD return buffer */ 3847 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3848 buf, HPSA_VPD_HEADER_SZ); 3849 if (rc != 0) 3850 goto exit_failed; 3851 size = buf[3]; 3852 3853 /* Now get the whole VPD buffer */ 3854 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3855 buf, size + HPSA_VPD_HEADER_SZ); 3856 if (rc != 0) 3857 goto exit_failed; 3858 status = buf[4]; /* status byte */ 3859 3860 kfree(buf); 3861 return status; 3862 exit_failed: 3863 kfree(buf); 3864 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3865 } 3866 3867 /* Determine offline status of a volume. 3868 * Return either: 3869 * 0 (not offline) 3870 * 0xff (offline for unknown reasons) 3871 * # (integer code indicating one of several NOT READY states 3872 * describing why a volume is to be kept offline) 3873 */ 3874 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3875 unsigned char scsi3addr[]) 3876 { 3877 struct CommandList *c; 3878 unsigned char *sense; 3879 u8 sense_key, asc, ascq; 3880 int sense_len; 3881 int rc, ldstat = 0; 3882 #define ASC_LUN_NOT_READY 0x04 3883 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3884 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3885 3886 c = cmd_alloc(h); 3887 3888 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3889 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3890 NO_TIMEOUT); 3891 if (rc) { 3892 cmd_free(h, c); 3893 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3894 } 3895 sense = c->err_info->SenseInfo; 3896 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3897 sense_len = sizeof(c->err_info->SenseInfo); 3898 else 3899 sense_len = c->err_info->SenseLen; 3900 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3901 cmd_free(h, c); 3902 3903 /* Determine the reason for not ready state */ 3904 ldstat = hpsa_get_volume_status(h, scsi3addr); 3905 3906 /* Keep volume offline in certain cases: */ 3907 switch (ldstat) { 3908 case HPSA_LV_FAILED: 3909 case HPSA_LV_UNDERGOING_ERASE: 3910 case HPSA_LV_NOT_AVAILABLE: 3911 case HPSA_LV_UNDERGOING_RPI: 3912 case HPSA_LV_PENDING_RPI: 3913 case HPSA_LV_ENCRYPTED_NO_KEY: 3914 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3915 case HPSA_LV_UNDERGOING_ENCRYPTION: 3916 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3917 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3918 return ldstat; 3919 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3920 /* If VPD status page isn't available, 3921 * use ASC/ASCQ to determine state 3922 */ 3923 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3924 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3925 return ldstat; 3926 break; 3927 default: 3928 break; 3929 } 3930 return HPSA_LV_OK; 3931 } 3932 3933 static int hpsa_update_device_info(struct ctlr_info *h, 3934 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3935 unsigned char *is_OBDR_device) 3936 { 3937 3938 #define OBDR_SIG_OFFSET 43 3939 #define OBDR_TAPE_SIG "$DR-10" 3940 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3941 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3942 3943 unsigned char *inq_buff; 3944 unsigned char *obdr_sig; 3945 int rc = 0; 3946 3947 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3948 if (!inq_buff) { 3949 rc = -ENOMEM; 3950 goto bail_out; 3951 } 3952 3953 /* Do an inquiry to the device to see what it is. */ 3954 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3955 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3956 dev_err(&h->pdev->dev, 3957 "%s: inquiry failed, device will be skipped.\n", 3958 __func__); 3959 rc = HPSA_INQUIRY_FAILED; 3960 goto bail_out; 3961 } 3962 3963 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3964 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3965 3966 this_device->devtype = (inq_buff[0] & 0x1f); 3967 memcpy(this_device->scsi3addr, scsi3addr, 8); 3968 memcpy(this_device->vendor, &inq_buff[8], 3969 sizeof(this_device->vendor)); 3970 memcpy(this_device->model, &inq_buff[16], 3971 sizeof(this_device->model)); 3972 this_device->rev = inq_buff[2]; 3973 memset(this_device->device_id, 0, 3974 sizeof(this_device->device_id)); 3975 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3976 sizeof(this_device->device_id)) < 0) { 3977 dev_err(&h->pdev->dev, 3978 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n", 3979 h->ctlr, __func__, 3980 h->scsi_host->host_no, 3981 this_device->bus, this_device->target, 3982 this_device->lun, 3983 scsi_device_type(this_device->devtype), 3984 this_device->model); 3985 rc = HPSA_LV_FAILED; 3986 goto bail_out; 3987 } 3988 3989 if ((this_device->devtype == TYPE_DISK || 3990 this_device->devtype == TYPE_ZBC) && 3991 is_logical_dev_addr_mode(scsi3addr)) { 3992 unsigned char volume_offline; 3993 3994 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3995 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3996 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3997 volume_offline = hpsa_volume_offline(h, scsi3addr); 3998 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 3999 h->legacy_board) { 4000 /* 4001 * Legacy boards might not support volume status 4002 */ 4003 dev_info(&h->pdev->dev, 4004 "C0:T%d:L%d Volume status not available, assuming online.\n", 4005 this_device->target, this_device->lun); 4006 volume_offline = 0; 4007 } 4008 this_device->volume_offline = volume_offline; 4009 if (volume_offline == HPSA_LV_FAILED) { 4010 rc = HPSA_LV_FAILED; 4011 dev_err(&h->pdev->dev, 4012 "%s: LV failed, device will be skipped.\n", 4013 __func__); 4014 goto bail_out; 4015 } 4016 } else { 4017 this_device->raid_level = RAID_UNKNOWN; 4018 this_device->offload_config = 0; 4019 hpsa_turn_off_ioaccel_for_device(this_device); 4020 this_device->hba_ioaccel_enabled = 0; 4021 this_device->volume_offline = 0; 4022 this_device->queue_depth = h->nr_cmds; 4023 } 4024 4025 if (this_device->external) 4026 this_device->queue_depth = EXTERNAL_QD; 4027 4028 if (is_OBDR_device) { 4029 /* See if this is a One-Button-Disaster-Recovery device 4030 * by looking for "$DR-10" at offset 43 in inquiry data. 4031 */ 4032 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 4033 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 4034 strncmp(obdr_sig, OBDR_TAPE_SIG, 4035 OBDR_SIG_LEN) == 0); 4036 } 4037 kfree(inq_buff); 4038 return 0; 4039 4040 bail_out: 4041 kfree(inq_buff); 4042 return rc; 4043 } 4044 4045 /* 4046 * Helper function to assign bus, target, lun mapping of devices. 4047 * Logical drive target and lun are assigned at this time, but 4048 * physical device lun and target assignment are deferred (assigned 4049 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4050 */ 4051 static void figure_bus_target_lun(struct ctlr_info *h, 4052 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4053 { 4054 u32 lunid = get_unaligned_le32(lunaddrbytes); 4055 4056 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 4057 /* physical device, target and lun filled in later */ 4058 if (is_hba_lunid(lunaddrbytes)) { 4059 int bus = HPSA_HBA_BUS; 4060 4061 if (!device->rev) 4062 bus = HPSA_LEGACY_HBA_BUS; 4063 hpsa_set_bus_target_lun(device, 4064 bus, 0, lunid & 0x3fff); 4065 } else 4066 /* defer target, lun assignment for physical devices */ 4067 hpsa_set_bus_target_lun(device, 4068 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 4069 return; 4070 } 4071 /* It's a logical device */ 4072 if (device->external) { 4073 hpsa_set_bus_target_lun(device, 4074 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4075 lunid & 0x00ff); 4076 return; 4077 } 4078 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4079 0, lunid & 0x3fff); 4080 } 4081 4082 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4083 int i, int nphysicals, int nlocal_logicals) 4084 { 4085 /* In report logicals, local logicals are listed first, 4086 * then any externals. 4087 */ 4088 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4089 4090 if (i == raid_ctlr_position) 4091 return 0; 4092 4093 if (i < logicals_start) 4094 return 0; 4095 4096 /* i is in logicals range, but still within local logicals */ 4097 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4098 return 0; 4099 4100 return 1; /* it's an external lun */ 4101 } 4102 4103 /* 4104 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4105 * logdev. The number of luns in physdev and logdev are returned in 4106 * *nphysicals and *nlogicals, respectively. 4107 * Returns 0 on success, -1 otherwise. 4108 */ 4109 static int hpsa_gather_lun_info(struct ctlr_info *h, 4110 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4111 struct ReportLUNdata *logdev, u32 *nlogicals) 4112 { 4113 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4114 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4115 return -1; 4116 } 4117 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4118 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4119 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4120 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4121 *nphysicals = HPSA_MAX_PHYS_LUN; 4122 } 4123 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4124 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4125 return -1; 4126 } 4127 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4128 /* Reject Logicals in excess of our max capability. */ 4129 if (*nlogicals > HPSA_MAX_LUN) { 4130 dev_warn(&h->pdev->dev, 4131 "maximum logical LUNs (%d) exceeded. " 4132 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4133 *nlogicals - HPSA_MAX_LUN); 4134 *nlogicals = HPSA_MAX_LUN; 4135 } 4136 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4137 dev_warn(&h->pdev->dev, 4138 "maximum logical + physical LUNs (%d) exceeded. " 4139 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4140 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4141 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4142 } 4143 return 0; 4144 } 4145 4146 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4147 int i, int nphysicals, int nlogicals, 4148 struct ReportExtendedLUNdata *physdev_list, 4149 struct ReportLUNdata *logdev_list) 4150 { 4151 /* Helper function, figure out where the LUN ID info is coming from 4152 * given index i, lists of physical and logical devices, where in 4153 * the list the raid controller is supposed to appear (first or last) 4154 */ 4155 4156 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4157 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4158 4159 if (i == raid_ctlr_position) 4160 return RAID_CTLR_LUNID; 4161 4162 if (i < logicals_start) 4163 return &physdev_list->LUN[i - 4164 (raid_ctlr_position == 0)].lunid[0]; 4165 4166 if (i < last_device) 4167 return &logdev_list->LUN[i - nphysicals - 4168 (raid_ctlr_position == 0)][0]; 4169 BUG(); 4170 return NULL; 4171 } 4172 4173 /* get physical drive ioaccel handle and queue depth */ 4174 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4175 struct hpsa_scsi_dev_t *dev, 4176 struct ReportExtendedLUNdata *rlep, int rle_index, 4177 struct bmic_identify_physical_device *id_phys) 4178 { 4179 int rc; 4180 struct ext_report_lun_entry *rle; 4181 4182 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN) 4183 return; 4184 4185 rle = &rlep->LUN[rle_index]; 4186 4187 dev->ioaccel_handle = rle->ioaccel_handle; 4188 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4189 dev->hba_ioaccel_enabled = 1; 4190 memset(id_phys, 0, sizeof(*id_phys)); 4191 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4192 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4193 sizeof(*id_phys)); 4194 if (!rc) 4195 /* Reserve space for FW operations */ 4196 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4197 #define DRIVE_QUEUE_DEPTH 7 4198 dev->queue_depth = 4199 le16_to_cpu(id_phys->current_queue_depth_limit) - 4200 DRIVE_CMDS_RESERVED_FOR_FW; 4201 else 4202 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4203 } 4204 4205 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4206 struct ReportExtendedLUNdata *rlep, int rle_index, 4207 struct bmic_identify_physical_device *id_phys) 4208 { 4209 struct ext_report_lun_entry *rle; 4210 4211 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN) 4212 return; 4213 4214 rle = &rlep->LUN[rle_index]; 4215 4216 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4217 this_device->hba_ioaccel_enabled = 1; 4218 4219 memcpy(&this_device->active_path_index, 4220 &id_phys->active_path_number, 4221 sizeof(this_device->active_path_index)); 4222 memcpy(&this_device->path_map, 4223 &id_phys->redundant_path_present_map, 4224 sizeof(this_device->path_map)); 4225 memcpy(&this_device->box, 4226 &id_phys->alternate_paths_phys_box_on_port, 4227 sizeof(this_device->box)); 4228 memcpy(&this_device->phys_connector, 4229 &id_phys->alternate_paths_phys_connector, 4230 sizeof(this_device->phys_connector)); 4231 memcpy(&this_device->bay, 4232 &id_phys->phys_bay_in_box, 4233 sizeof(this_device->bay)); 4234 } 4235 4236 /* get number of local logical disks. */ 4237 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4238 struct bmic_identify_controller *id_ctlr, 4239 u32 *nlocals) 4240 { 4241 int rc; 4242 4243 if (!id_ctlr) { 4244 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4245 __func__); 4246 return -ENOMEM; 4247 } 4248 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4249 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4250 if (!rc) 4251 if (id_ctlr->configured_logical_drive_count < 255) 4252 *nlocals = id_ctlr->configured_logical_drive_count; 4253 else 4254 *nlocals = le16_to_cpu( 4255 id_ctlr->extended_logical_unit_count); 4256 else 4257 *nlocals = -1; 4258 return rc; 4259 } 4260 4261 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4262 { 4263 struct bmic_identify_physical_device *id_phys; 4264 bool is_spare = false; 4265 int rc; 4266 4267 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4268 if (!id_phys) 4269 return false; 4270 4271 rc = hpsa_bmic_id_physical_device(h, 4272 lunaddrbytes, 4273 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4274 id_phys, sizeof(*id_phys)); 4275 if (rc == 0) 4276 is_spare = (id_phys->more_flags >> 6) & 0x01; 4277 4278 kfree(id_phys); 4279 return is_spare; 4280 } 4281 4282 #define RPL_DEV_FLAG_NON_DISK 0x1 4283 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4284 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4285 4286 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4287 4288 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4289 struct ext_report_lun_entry *rle) 4290 { 4291 u8 device_flags; 4292 u8 device_type; 4293 4294 if (!MASKED_DEVICE(lunaddrbytes)) 4295 return false; 4296 4297 device_flags = rle->device_flags; 4298 device_type = rle->device_type; 4299 4300 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4301 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4302 return false; 4303 return true; 4304 } 4305 4306 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4307 return false; 4308 4309 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4310 return false; 4311 4312 /* 4313 * Spares may be spun down, we do not want to 4314 * do an Inquiry to a RAID set spare drive as 4315 * that would have them spun up, that is a 4316 * performance hit because I/O to the RAID device 4317 * stops while the spin up occurs which can take 4318 * over 50 seconds. 4319 */ 4320 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4321 return true; 4322 4323 return false; 4324 } 4325 4326 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4327 { 4328 /* the idea here is we could get notified 4329 * that some devices have changed, so we do a report 4330 * physical luns and report logical luns cmd, and adjust 4331 * our list of devices accordingly. 4332 * 4333 * The scsi3addr's of devices won't change so long as the 4334 * adapter is not reset. That means we can rescan and 4335 * tell which devices we already know about, vs. new 4336 * devices, vs. disappearing devices. 4337 */ 4338 struct ReportExtendedLUNdata *physdev_list = NULL; 4339 struct ReportLUNdata *logdev_list = NULL; 4340 struct bmic_identify_physical_device *id_phys = NULL; 4341 struct bmic_identify_controller *id_ctlr = NULL; 4342 u32 nphysicals = 0; 4343 u32 nlogicals = 0; 4344 u32 nlocal_logicals = 0; 4345 u32 ndev_allocated = 0; 4346 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4347 int ncurrent = 0; 4348 int i, ndevs_to_allocate; 4349 int raid_ctlr_position; 4350 bool physical_device; 4351 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4352 4353 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 4354 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4355 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4356 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4357 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4358 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4359 4360 if (!currentsd || !physdev_list || !logdev_list || 4361 !tmpdevice || !id_phys || !id_ctlr) { 4362 dev_err(&h->pdev->dev, "out of memory\n"); 4363 goto out; 4364 } 4365 memset(lunzerobits, 0, sizeof(lunzerobits)); 4366 4367 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4368 4369 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4370 logdev_list, &nlogicals)) { 4371 h->drv_req_rescan = 1; 4372 goto out; 4373 } 4374 4375 /* Set number of local logicals (non PTRAID) */ 4376 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4377 dev_warn(&h->pdev->dev, 4378 "%s: Can't determine number of local logical devices.\n", 4379 __func__); 4380 } 4381 4382 /* We might see up to the maximum number of logical and physical disks 4383 * plus external target devices, and a device for the local RAID 4384 * controller. 4385 */ 4386 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4387 4388 hpsa_ext_ctrl_present(h, physdev_list); 4389 4390 /* Allocate the per device structures */ 4391 for (i = 0; i < ndevs_to_allocate; i++) { 4392 if (i >= HPSA_MAX_DEVICES) { 4393 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4394 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4395 ndevs_to_allocate - HPSA_MAX_DEVICES); 4396 break; 4397 } 4398 4399 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4400 if (!currentsd[i]) { 4401 h->drv_req_rescan = 1; 4402 goto out; 4403 } 4404 ndev_allocated++; 4405 } 4406 4407 if (is_scsi_rev_5(h)) 4408 raid_ctlr_position = 0; 4409 else 4410 raid_ctlr_position = nphysicals + nlogicals; 4411 4412 /* adjust our table of devices */ 4413 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4414 u8 *lunaddrbytes, is_OBDR = 0; 4415 int rc = 0; 4416 int phys_dev_index = i - (raid_ctlr_position == 0); 4417 bool skip_device = false; 4418 4419 memset(tmpdevice, 0, sizeof(*tmpdevice)); 4420 4421 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4422 4423 /* Figure out where the LUN ID info is coming from */ 4424 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4425 i, nphysicals, nlogicals, physdev_list, logdev_list); 4426 4427 /* Determine if this is a lun from an external target array */ 4428 tmpdevice->external = 4429 figure_external_status(h, raid_ctlr_position, i, 4430 nphysicals, nlocal_logicals); 4431 4432 /* 4433 * Skip over some devices such as a spare. 4434 */ 4435 if (phys_dev_index >= 0 && !tmpdevice->external && 4436 physical_device) { 4437 skip_device = hpsa_skip_device(h, lunaddrbytes, 4438 &physdev_list->LUN[phys_dev_index]); 4439 if (skip_device) 4440 continue; 4441 } 4442 4443 /* Get device type, vendor, model, device id, raid_map */ 4444 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4445 &is_OBDR); 4446 if (rc == -ENOMEM) { 4447 dev_warn(&h->pdev->dev, 4448 "Out of memory, rescan deferred.\n"); 4449 h->drv_req_rescan = 1; 4450 goto out; 4451 } 4452 if (rc) { 4453 h->drv_req_rescan = 1; 4454 continue; 4455 } 4456 4457 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4458 this_device = currentsd[ncurrent]; 4459 4460 *this_device = *tmpdevice; 4461 this_device->physical_device = physical_device; 4462 4463 /* 4464 * Expose all devices except for physical devices that 4465 * are masked. 4466 */ 4467 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4468 this_device->expose_device = 0; 4469 else 4470 this_device->expose_device = 1; 4471 4472 4473 /* 4474 * Get the SAS address for physical devices that are exposed. 4475 */ 4476 if (this_device->physical_device && this_device->expose_device) 4477 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4478 4479 switch (this_device->devtype) { 4480 case TYPE_ROM: 4481 /* We don't *really* support actual CD-ROM devices, 4482 * just "One Button Disaster Recovery" tape drive 4483 * which temporarily pretends to be a CD-ROM drive. 4484 * So we check that the device is really an OBDR tape 4485 * device by checking for "$DR-10" in bytes 43-48 of 4486 * the inquiry data. 4487 */ 4488 if (is_OBDR) 4489 ncurrent++; 4490 break; 4491 case TYPE_DISK: 4492 case TYPE_ZBC: 4493 if (this_device->physical_device) { 4494 /* The disk is in HBA mode. */ 4495 /* Never use RAID mapper in HBA mode. */ 4496 this_device->offload_enabled = 0; 4497 hpsa_get_ioaccel_drive_info(h, this_device, 4498 physdev_list, phys_dev_index, id_phys); 4499 hpsa_get_path_info(this_device, 4500 physdev_list, phys_dev_index, id_phys); 4501 } 4502 ncurrent++; 4503 break; 4504 case TYPE_TAPE: 4505 case TYPE_MEDIUM_CHANGER: 4506 ncurrent++; 4507 break; 4508 case TYPE_ENCLOSURE: 4509 if (!this_device->external) 4510 hpsa_get_enclosure_info(h, lunaddrbytes, 4511 physdev_list, phys_dev_index, 4512 this_device); 4513 ncurrent++; 4514 break; 4515 case TYPE_RAID: 4516 /* Only present the Smartarray HBA as a RAID controller. 4517 * If it's a RAID controller other than the HBA itself 4518 * (an external RAID controller, MSA500 or similar) 4519 * don't present it. 4520 */ 4521 if (!is_hba_lunid(lunaddrbytes)) 4522 break; 4523 ncurrent++; 4524 break; 4525 default: 4526 break; 4527 } 4528 if (ncurrent >= HPSA_MAX_DEVICES) 4529 break; 4530 } 4531 4532 if (h->sas_host == NULL) { 4533 int rc = 0; 4534 4535 rc = hpsa_add_sas_host(h); 4536 if (rc) { 4537 dev_warn(&h->pdev->dev, 4538 "Could not add sas host %d\n", rc); 4539 goto out; 4540 } 4541 } 4542 4543 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4544 out: 4545 kfree(tmpdevice); 4546 for (i = 0; i < ndev_allocated; i++) 4547 kfree(currentsd[i]); 4548 kfree(currentsd); 4549 kfree(physdev_list); 4550 kfree(logdev_list); 4551 kfree(id_ctlr); 4552 kfree(id_phys); 4553 } 4554 4555 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4556 struct scatterlist *sg) 4557 { 4558 u64 addr64 = (u64) sg_dma_address(sg); 4559 unsigned int len = sg_dma_len(sg); 4560 4561 desc->Addr = cpu_to_le64(addr64); 4562 desc->Len = cpu_to_le32(len); 4563 desc->Ext = 0; 4564 } 4565 4566 /* 4567 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4568 * dma mapping and fills in the scatter gather entries of the 4569 * hpsa command, cp. 4570 */ 4571 static int hpsa_scatter_gather(struct ctlr_info *h, 4572 struct CommandList *cp, 4573 struct scsi_cmnd *cmd) 4574 { 4575 struct scatterlist *sg; 4576 int use_sg, i, sg_limit, chained; 4577 struct SGDescriptor *curr_sg; 4578 4579 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4580 4581 use_sg = scsi_dma_map(cmd); 4582 if (use_sg < 0) 4583 return use_sg; 4584 4585 if (!use_sg) 4586 goto sglist_finished; 4587 4588 /* 4589 * If the number of entries is greater than the max for a single list, 4590 * then we have a chained list; we will set up all but one entry in the 4591 * first list (the last entry is saved for link information); 4592 * otherwise, we don't have a chained list and we'll set up at each of 4593 * the entries in the one list. 4594 */ 4595 curr_sg = cp->SG; 4596 chained = use_sg > h->max_cmd_sg_entries; 4597 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4598 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4599 hpsa_set_sg_descriptor(curr_sg, sg); 4600 curr_sg++; 4601 } 4602 4603 if (chained) { 4604 /* 4605 * Continue with the chained list. Set curr_sg to the chained 4606 * list. Modify the limit to the total count less the entries 4607 * we've already set up. Resume the scan at the list entry 4608 * where the previous loop left off. 4609 */ 4610 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4611 sg_limit = use_sg - sg_limit; 4612 for_each_sg(sg, sg, sg_limit, i) { 4613 hpsa_set_sg_descriptor(curr_sg, sg); 4614 curr_sg++; 4615 } 4616 } 4617 4618 /* Back the pointer up to the last entry and mark it as "last". */ 4619 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4620 4621 if (use_sg + chained > h->maxSG) 4622 h->maxSG = use_sg + chained; 4623 4624 if (chained) { 4625 cp->Header.SGList = h->max_cmd_sg_entries; 4626 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4627 if (hpsa_map_sg_chain_block(h, cp)) { 4628 scsi_dma_unmap(cmd); 4629 return -1; 4630 } 4631 return 0; 4632 } 4633 4634 sglist_finished: 4635 4636 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4637 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4638 return 0; 4639 } 4640 4641 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4642 u8 *cdb, int cdb_len, 4643 const char *func) 4644 { 4645 dev_warn(&h->pdev->dev, 4646 "%s: Blocking zero-length request: CDB:%*phN\n", 4647 func, cdb_len, cdb); 4648 } 4649 4650 #define IO_ACCEL_INELIGIBLE 1 4651 /* zero-length transfers trigger hardware errors. */ 4652 static bool is_zero_length_transfer(u8 *cdb) 4653 { 4654 u32 block_cnt; 4655 4656 /* Block zero-length transfer sizes on certain commands. */ 4657 switch (cdb[0]) { 4658 case READ_10: 4659 case WRITE_10: 4660 case VERIFY: /* 0x2F */ 4661 case WRITE_VERIFY: /* 0x2E */ 4662 block_cnt = get_unaligned_be16(&cdb[7]); 4663 break; 4664 case READ_12: 4665 case WRITE_12: 4666 case VERIFY_12: /* 0xAF */ 4667 case WRITE_VERIFY_12: /* 0xAE */ 4668 block_cnt = get_unaligned_be32(&cdb[6]); 4669 break; 4670 case READ_16: 4671 case WRITE_16: 4672 case VERIFY_16: /* 0x8F */ 4673 block_cnt = get_unaligned_be32(&cdb[10]); 4674 break; 4675 default: 4676 return false; 4677 } 4678 4679 return block_cnt == 0; 4680 } 4681 4682 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4683 { 4684 int is_write = 0; 4685 u32 block; 4686 u32 block_cnt; 4687 4688 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4689 switch (cdb[0]) { 4690 case WRITE_6: 4691 case WRITE_12: 4692 is_write = 1; 4693 fallthrough; 4694 case READ_6: 4695 case READ_12: 4696 if (*cdb_len == 6) { 4697 block = (((cdb[1] & 0x1F) << 16) | 4698 (cdb[2] << 8) | 4699 cdb[3]); 4700 block_cnt = cdb[4]; 4701 if (block_cnt == 0) 4702 block_cnt = 256; 4703 } else { 4704 BUG_ON(*cdb_len != 12); 4705 block = get_unaligned_be32(&cdb[2]); 4706 block_cnt = get_unaligned_be32(&cdb[6]); 4707 } 4708 if (block_cnt > 0xffff) 4709 return IO_ACCEL_INELIGIBLE; 4710 4711 cdb[0] = is_write ? WRITE_10 : READ_10; 4712 cdb[1] = 0; 4713 cdb[2] = (u8) (block >> 24); 4714 cdb[3] = (u8) (block >> 16); 4715 cdb[4] = (u8) (block >> 8); 4716 cdb[5] = (u8) (block); 4717 cdb[6] = 0; 4718 cdb[7] = (u8) (block_cnt >> 8); 4719 cdb[8] = (u8) (block_cnt); 4720 cdb[9] = 0; 4721 *cdb_len = 10; 4722 break; 4723 } 4724 return 0; 4725 } 4726 4727 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4728 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4729 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4730 { 4731 struct scsi_cmnd *cmd = c->scsi_cmd; 4732 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4733 unsigned int len; 4734 unsigned int total_len = 0; 4735 struct scatterlist *sg; 4736 u64 addr64; 4737 int use_sg, i; 4738 struct SGDescriptor *curr_sg; 4739 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4740 4741 /* TODO: implement chaining support */ 4742 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4743 atomic_dec(&phys_disk->ioaccel_cmds_out); 4744 return IO_ACCEL_INELIGIBLE; 4745 } 4746 4747 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4748 4749 if (is_zero_length_transfer(cdb)) { 4750 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4751 atomic_dec(&phys_disk->ioaccel_cmds_out); 4752 return IO_ACCEL_INELIGIBLE; 4753 } 4754 4755 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4756 atomic_dec(&phys_disk->ioaccel_cmds_out); 4757 return IO_ACCEL_INELIGIBLE; 4758 } 4759 4760 c->cmd_type = CMD_IOACCEL1; 4761 4762 /* Adjust the DMA address to point to the accelerated command buffer */ 4763 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4764 (c->cmdindex * sizeof(*cp)); 4765 BUG_ON(c->busaddr & 0x0000007F); 4766 4767 use_sg = scsi_dma_map(cmd); 4768 if (use_sg < 0) { 4769 atomic_dec(&phys_disk->ioaccel_cmds_out); 4770 return use_sg; 4771 } 4772 4773 if (use_sg) { 4774 curr_sg = cp->SG; 4775 scsi_for_each_sg(cmd, sg, use_sg, i) { 4776 addr64 = (u64) sg_dma_address(sg); 4777 len = sg_dma_len(sg); 4778 total_len += len; 4779 curr_sg->Addr = cpu_to_le64(addr64); 4780 curr_sg->Len = cpu_to_le32(len); 4781 curr_sg->Ext = cpu_to_le32(0); 4782 curr_sg++; 4783 } 4784 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4785 4786 switch (cmd->sc_data_direction) { 4787 case DMA_TO_DEVICE: 4788 control |= IOACCEL1_CONTROL_DATA_OUT; 4789 break; 4790 case DMA_FROM_DEVICE: 4791 control |= IOACCEL1_CONTROL_DATA_IN; 4792 break; 4793 case DMA_NONE: 4794 control |= IOACCEL1_CONTROL_NODATAXFER; 4795 break; 4796 default: 4797 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4798 cmd->sc_data_direction); 4799 BUG(); 4800 break; 4801 } 4802 } else { 4803 control |= IOACCEL1_CONTROL_NODATAXFER; 4804 } 4805 4806 c->Header.SGList = use_sg; 4807 /* Fill out the command structure to submit */ 4808 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4809 cp->transfer_len = cpu_to_le32(total_len); 4810 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4811 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4812 cp->control = cpu_to_le32(control); 4813 memcpy(cp->CDB, cdb, cdb_len); 4814 memcpy(cp->CISS_LUN, scsi3addr, 8); 4815 /* Tag was already set at init time. */ 4816 enqueue_cmd_and_start_io(h, c); 4817 return 0; 4818 } 4819 4820 /* 4821 * Queue a command directly to a device behind the controller using the 4822 * I/O accelerator path. 4823 */ 4824 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4825 struct CommandList *c) 4826 { 4827 struct scsi_cmnd *cmd = c->scsi_cmd; 4828 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4829 4830 if (!dev) 4831 return -1; 4832 4833 c->phys_disk = dev; 4834 4835 if (dev->in_reset) 4836 return -1; 4837 4838 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4839 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4840 } 4841 4842 /* 4843 * Set encryption parameters for the ioaccel2 request 4844 */ 4845 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4846 struct CommandList *c, struct io_accel2_cmd *cp) 4847 { 4848 struct scsi_cmnd *cmd = c->scsi_cmd; 4849 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4850 struct raid_map_data *map = &dev->raid_map; 4851 u64 first_block; 4852 4853 /* Are we doing encryption on this device */ 4854 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4855 return; 4856 /* Set the data encryption key index. */ 4857 cp->dekindex = map->dekindex; 4858 4859 /* Set the encryption enable flag, encoded into direction field. */ 4860 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4861 4862 /* Set encryption tweak values based on logical block address 4863 * If block size is 512, tweak value is LBA. 4864 * For other block sizes, tweak is (LBA * block size)/ 512) 4865 */ 4866 switch (cmd->cmnd[0]) { 4867 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4868 case READ_6: 4869 case WRITE_6: 4870 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4871 (cmd->cmnd[2] << 8) | 4872 cmd->cmnd[3]); 4873 break; 4874 case WRITE_10: 4875 case READ_10: 4876 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4877 case WRITE_12: 4878 case READ_12: 4879 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4880 break; 4881 case WRITE_16: 4882 case READ_16: 4883 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4884 break; 4885 default: 4886 dev_err(&h->pdev->dev, 4887 "ERROR: %s: size (0x%x) not supported for encryption\n", 4888 __func__, cmd->cmnd[0]); 4889 BUG(); 4890 break; 4891 } 4892 4893 if (le32_to_cpu(map->volume_blk_size) != 512) 4894 first_block = first_block * 4895 le32_to_cpu(map->volume_blk_size)/512; 4896 4897 cp->tweak_lower = cpu_to_le32(first_block); 4898 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4899 } 4900 4901 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4902 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4903 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4904 { 4905 struct scsi_cmnd *cmd = c->scsi_cmd; 4906 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4907 struct ioaccel2_sg_element *curr_sg; 4908 int use_sg, i; 4909 struct scatterlist *sg; 4910 u64 addr64; 4911 u32 len; 4912 u32 total_len = 0; 4913 4914 if (!cmd->device) 4915 return -1; 4916 4917 if (!cmd->device->hostdata) 4918 return -1; 4919 4920 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4921 4922 if (is_zero_length_transfer(cdb)) { 4923 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4924 atomic_dec(&phys_disk->ioaccel_cmds_out); 4925 return IO_ACCEL_INELIGIBLE; 4926 } 4927 4928 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4929 atomic_dec(&phys_disk->ioaccel_cmds_out); 4930 return IO_ACCEL_INELIGIBLE; 4931 } 4932 4933 c->cmd_type = CMD_IOACCEL2; 4934 /* Adjust the DMA address to point to the accelerated command buffer */ 4935 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4936 (c->cmdindex * sizeof(*cp)); 4937 BUG_ON(c->busaddr & 0x0000007F); 4938 4939 memset(cp, 0, sizeof(*cp)); 4940 cp->IU_type = IOACCEL2_IU_TYPE; 4941 4942 use_sg = scsi_dma_map(cmd); 4943 if (use_sg < 0) { 4944 atomic_dec(&phys_disk->ioaccel_cmds_out); 4945 return use_sg; 4946 } 4947 4948 if (use_sg) { 4949 curr_sg = cp->sg; 4950 if (use_sg > h->ioaccel_maxsg) { 4951 addr64 = le64_to_cpu( 4952 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4953 curr_sg->address = cpu_to_le64(addr64); 4954 curr_sg->length = 0; 4955 curr_sg->reserved[0] = 0; 4956 curr_sg->reserved[1] = 0; 4957 curr_sg->reserved[2] = 0; 4958 curr_sg->chain_indicator = IOACCEL2_CHAIN; 4959 4960 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4961 } 4962 scsi_for_each_sg(cmd, sg, use_sg, i) { 4963 addr64 = (u64) sg_dma_address(sg); 4964 len = sg_dma_len(sg); 4965 total_len += len; 4966 curr_sg->address = cpu_to_le64(addr64); 4967 curr_sg->length = cpu_to_le32(len); 4968 curr_sg->reserved[0] = 0; 4969 curr_sg->reserved[1] = 0; 4970 curr_sg->reserved[2] = 0; 4971 curr_sg->chain_indicator = 0; 4972 curr_sg++; 4973 } 4974 4975 /* 4976 * Set the last s/g element bit 4977 */ 4978 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG; 4979 4980 switch (cmd->sc_data_direction) { 4981 case DMA_TO_DEVICE: 4982 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4983 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4984 break; 4985 case DMA_FROM_DEVICE: 4986 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4987 cp->direction |= IOACCEL2_DIR_DATA_IN; 4988 break; 4989 case DMA_NONE: 4990 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4991 cp->direction |= IOACCEL2_DIR_NO_DATA; 4992 break; 4993 default: 4994 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4995 cmd->sc_data_direction); 4996 BUG(); 4997 break; 4998 } 4999 } else { 5000 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 5001 cp->direction |= IOACCEL2_DIR_NO_DATA; 5002 } 5003 5004 /* Set encryption parameters, if necessary */ 5005 set_encrypt_ioaccel2(h, c, cp); 5006 5007 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 5008 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 5009 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 5010 5011 cp->data_len = cpu_to_le32(total_len); 5012 cp->err_ptr = cpu_to_le64(c->busaddr + 5013 offsetof(struct io_accel2_cmd, error_data)); 5014 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 5015 5016 /* fill in sg elements */ 5017 if (use_sg > h->ioaccel_maxsg) { 5018 cp->sg_count = 1; 5019 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 5020 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 5021 atomic_dec(&phys_disk->ioaccel_cmds_out); 5022 scsi_dma_unmap(cmd); 5023 return -1; 5024 } 5025 } else 5026 cp->sg_count = (u8) use_sg; 5027 5028 if (phys_disk->in_reset) { 5029 cmd->result = DID_RESET << 16; 5030 return -1; 5031 } 5032 5033 enqueue_cmd_and_start_io(h, c); 5034 return 0; 5035 } 5036 5037 /* 5038 * Queue a command to the correct I/O accelerator path. 5039 */ 5040 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5041 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 5042 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5043 { 5044 if (!c->scsi_cmd->device) 5045 return -1; 5046 5047 if (!c->scsi_cmd->device->hostdata) 5048 return -1; 5049 5050 if (phys_disk->in_reset) 5051 return -1; 5052 5053 /* Try to honor the device's queue depth */ 5054 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 5055 phys_disk->queue_depth) { 5056 atomic_dec(&phys_disk->ioaccel_cmds_out); 5057 return IO_ACCEL_INELIGIBLE; 5058 } 5059 if (h->transMethod & CFGTBL_Trans_io_accel1) 5060 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 5061 cdb, cdb_len, scsi3addr, 5062 phys_disk); 5063 else 5064 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 5065 cdb, cdb_len, scsi3addr, 5066 phys_disk); 5067 } 5068 5069 static void raid_map_helper(struct raid_map_data *map, 5070 int offload_to_mirror, u32 *map_index, u32 *current_group) 5071 { 5072 if (offload_to_mirror == 0) { 5073 /* use physical disk in the first mirrored group. */ 5074 *map_index %= le16_to_cpu(map->data_disks_per_row); 5075 return; 5076 } 5077 do { 5078 /* determine mirror group that *map_index indicates */ 5079 *current_group = *map_index / 5080 le16_to_cpu(map->data_disks_per_row); 5081 if (offload_to_mirror == *current_group) 5082 continue; 5083 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 5084 /* select map index from next group */ 5085 *map_index += le16_to_cpu(map->data_disks_per_row); 5086 (*current_group)++; 5087 } else { 5088 /* select map index from first group */ 5089 *map_index %= le16_to_cpu(map->data_disks_per_row); 5090 *current_group = 0; 5091 } 5092 } while (offload_to_mirror != *current_group); 5093 } 5094 5095 /* 5096 * Attempt to perform offload RAID mapping for a logical volume I/O. 5097 */ 5098 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5099 struct CommandList *c) 5100 { 5101 struct scsi_cmnd *cmd = c->scsi_cmd; 5102 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5103 struct raid_map_data *map = &dev->raid_map; 5104 struct raid_map_disk_data *dd = &map->data[0]; 5105 int is_write = 0; 5106 u32 map_index; 5107 u64 first_block, last_block; 5108 u32 block_cnt; 5109 u32 blocks_per_row; 5110 u64 first_row, last_row; 5111 u32 first_row_offset, last_row_offset; 5112 u32 first_column, last_column; 5113 u64 r0_first_row, r0_last_row; 5114 u32 r5or6_blocks_per_row; 5115 u64 r5or6_first_row, r5or6_last_row; 5116 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5117 u32 r5or6_first_column, r5or6_last_column; 5118 u32 total_disks_per_row; 5119 u32 stripesize; 5120 u32 first_group, last_group, current_group; 5121 u32 map_row; 5122 u32 disk_handle; 5123 u64 disk_block; 5124 u32 disk_block_cnt; 5125 u8 cdb[16]; 5126 u8 cdb_len; 5127 u16 strip_size; 5128 #if BITS_PER_LONG == 32 5129 u64 tmpdiv; 5130 #endif 5131 int offload_to_mirror; 5132 5133 if (!dev) 5134 return -1; 5135 5136 if (dev->in_reset) 5137 return -1; 5138 5139 /* check for valid opcode, get LBA and block count */ 5140 switch (cmd->cmnd[0]) { 5141 case WRITE_6: 5142 is_write = 1; 5143 fallthrough; 5144 case READ_6: 5145 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5146 (cmd->cmnd[2] << 8) | 5147 cmd->cmnd[3]); 5148 block_cnt = cmd->cmnd[4]; 5149 if (block_cnt == 0) 5150 block_cnt = 256; 5151 break; 5152 case WRITE_10: 5153 is_write = 1; 5154 fallthrough; 5155 case READ_10: 5156 first_block = 5157 (((u64) cmd->cmnd[2]) << 24) | 5158 (((u64) cmd->cmnd[3]) << 16) | 5159 (((u64) cmd->cmnd[4]) << 8) | 5160 cmd->cmnd[5]; 5161 block_cnt = 5162 (((u32) cmd->cmnd[7]) << 8) | 5163 cmd->cmnd[8]; 5164 break; 5165 case WRITE_12: 5166 is_write = 1; 5167 fallthrough; 5168 case READ_12: 5169 first_block = 5170 (((u64) cmd->cmnd[2]) << 24) | 5171 (((u64) cmd->cmnd[3]) << 16) | 5172 (((u64) cmd->cmnd[4]) << 8) | 5173 cmd->cmnd[5]; 5174 block_cnt = 5175 (((u32) cmd->cmnd[6]) << 24) | 5176 (((u32) cmd->cmnd[7]) << 16) | 5177 (((u32) cmd->cmnd[8]) << 8) | 5178 cmd->cmnd[9]; 5179 break; 5180 case WRITE_16: 5181 is_write = 1; 5182 fallthrough; 5183 case READ_16: 5184 first_block = 5185 (((u64) cmd->cmnd[2]) << 56) | 5186 (((u64) cmd->cmnd[3]) << 48) | 5187 (((u64) cmd->cmnd[4]) << 40) | 5188 (((u64) cmd->cmnd[5]) << 32) | 5189 (((u64) cmd->cmnd[6]) << 24) | 5190 (((u64) cmd->cmnd[7]) << 16) | 5191 (((u64) cmd->cmnd[8]) << 8) | 5192 cmd->cmnd[9]; 5193 block_cnt = 5194 (((u32) cmd->cmnd[10]) << 24) | 5195 (((u32) cmd->cmnd[11]) << 16) | 5196 (((u32) cmd->cmnd[12]) << 8) | 5197 cmd->cmnd[13]; 5198 break; 5199 default: 5200 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5201 } 5202 last_block = first_block + block_cnt - 1; 5203 5204 /* check for write to non-RAID-0 */ 5205 if (is_write && dev->raid_level != 0) 5206 return IO_ACCEL_INELIGIBLE; 5207 5208 /* check for invalid block or wraparound */ 5209 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5210 last_block < first_block) 5211 return IO_ACCEL_INELIGIBLE; 5212 5213 /* calculate stripe information for the request */ 5214 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5215 le16_to_cpu(map->strip_size); 5216 strip_size = le16_to_cpu(map->strip_size); 5217 #if BITS_PER_LONG == 32 5218 tmpdiv = first_block; 5219 (void) do_div(tmpdiv, blocks_per_row); 5220 first_row = tmpdiv; 5221 tmpdiv = last_block; 5222 (void) do_div(tmpdiv, blocks_per_row); 5223 last_row = tmpdiv; 5224 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5225 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5226 tmpdiv = first_row_offset; 5227 (void) do_div(tmpdiv, strip_size); 5228 first_column = tmpdiv; 5229 tmpdiv = last_row_offset; 5230 (void) do_div(tmpdiv, strip_size); 5231 last_column = tmpdiv; 5232 #else 5233 first_row = first_block / blocks_per_row; 5234 last_row = last_block / blocks_per_row; 5235 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5236 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5237 first_column = first_row_offset / strip_size; 5238 last_column = last_row_offset / strip_size; 5239 #endif 5240 5241 /* if this isn't a single row/column then give to the controller */ 5242 if ((first_row != last_row) || (first_column != last_column)) 5243 return IO_ACCEL_INELIGIBLE; 5244 5245 /* proceeding with driver mapping */ 5246 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5247 le16_to_cpu(map->metadata_disks_per_row); 5248 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5249 le16_to_cpu(map->row_cnt); 5250 map_index = (map_row * total_disks_per_row) + first_column; 5251 5252 switch (dev->raid_level) { 5253 case HPSA_RAID_0: 5254 break; /* nothing special to do */ 5255 case HPSA_RAID_1: 5256 /* Handles load balance across RAID 1 members. 5257 * (2-drive R1 and R10 with even # of drives.) 5258 * Appropriate for SSDs, not optimal for HDDs 5259 * Ensure we have the correct raid_map. 5260 */ 5261 if (le16_to_cpu(map->layout_map_count) != 2) { 5262 hpsa_turn_off_ioaccel_for_device(dev); 5263 return IO_ACCEL_INELIGIBLE; 5264 } 5265 if (dev->offload_to_mirror) 5266 map_index += le16_to_cpu(map->data_disks_per_row); 5267 dev->offload_to_mirror = !dev->offload_to_mirror; 5268 break; 5269 case HPSA_RAID_ADM: 5270 /* Handles N-way mirrors (R1-ADM) 5271 * and R10 with # of drives divisible by 3.) 5272 * Ensure we have the correct raid_map. 5273 */ 5274 if (le16_to_cpu(map->layout_map_count) != 3) { 5275 hpsa_turn_off_ioaccel_for_device(dev); 5276 return IO_ACCEL_INELIGIBLE; 5277 } 5278 5279 offload_to_mirror = dev->offload_to_mirror; 5280 raid_map_helper(map, offload_to_mirror, 5281 &map_index, ¤t_group); 5282 /* set mirror group to use next time */ 5283 offload_to_mirror = 5284 (offload_to_mirror >= 5285 le16_to_cpu(map->layout_map_count) - 1) 5286 ? 0 : offload_to_mirror + 1; 5287 dev->offload_to_mirror = offload_to_mirror; 5288 /* Avoid direct use of dev->offload_to_mirror within this 5289 * function since multiple threads might simultaneously 5290 * increment it beyond the range of dev->layout_map_count -1. 5291 */ 5292 break; 5293 case HPSA_RAID_5: 5294 case HPSA_RAID_6: 5295 if (le16_to_cpu(map->layout_map_count) <= 1) 5296 break; 5297 5298 /* Verify first and last block are in same RAID group */ 5299 r5or6_blocks_per_row = 5300 le16_to_cpu(map->strip_size) * 5301 le16_to_cpu(map->data_disks_per_row); 5302 if (r5or6_blocks_per_row == 0) { 5303 hpsa_turn_off_ioaccel_for_device(dev); 5304 return IO_ACCEL_INELIGIBLE; 5305 } 5306 stripesize = r5or6_blocks_per_row * 5307 le16_to_cpu(map->layout_map_count); 5308 #if BITS_PER_LONG == 32 5309 tmpdiv = first_block; 5310 first_group = do_div(tmpdiv, stripesize); 5311 tmpdiv = first_group; 5312 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5313 first_group = tmpdiv; 5314 tmpdiv = last_block; 5315 last_group = do_div(tmpdiv, stripesize); 5316 tmpdiv = last_group; 5317 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5318 last_group = tmpdiv; 5319 #else 5320 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5321 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5322 #endif 5323 if (first_group != last_group) 5324 return IO_ACCEL_INELIGIBLE; 5325 5326 /* Verify request is in a single row of RAID 5/6 */ 5327 #if BITS_PER_LONG == 32 5328 tmpdiv = first_block; 5329 (void) do_div(tmpdiv, stripesize); 5330 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5331 tmpdiv = last_block; 5332 (void) do_div(tmpdiv, stripesize); 5333 r5or6_last_row = r0_last_row = tmpdiv; 5334 #else 5335 first_row = r5or6_first_row = r0_first_row = 5336 first_block / stripesize; 5337 r5or6_last_row = r0_last_row = last_block / stripesize; 5338 #endif 5339 if (r5or6_first_row != r5or6_last_row) 5340 return IO_ACCEL_INELIGIBLE; 5341 5342 5343 /* Verify request is in a single column */ 5344 #if BITS_PER_LONG == 32 5345 tmpdiv = first_block; 5346 first_row_offset = do_div(tmpdiv, stripesize); 5347 tmpdiv = first_row_offset; 5348 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5349 r5or6_first_row_offset = first_row_offset; 5350 tmpdiv = last_block; 5351 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5352 tmpdiv = r5or6_last_row_offset; 5353 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5354 tmpdiv = r5or6_first_row_offset; 5355 (void) do_div(tmpdiv, map->strip_size); 5356 first_column = r5or6_first_column = tmpdiv; 5357 tmpdiv = r5or6_last_row_offset; 5358 (void) do_div(tmpdiv, map->strip_size); 5359 r5or6_last_column = tmpdiv; 5360 #else 5361 first_row_offset = r5or6_first_row_offset = 5362 (u32)((first_block % stripesize) % 5363 r5or6_blocks_per_row); 5364 5365 r5or6_last_row_offset = 5366 (u32)((last_block % stripesize) % 5367 r5or6_blocks_per_row); 5368 5369 first_column = r5or6_first_column = 5370 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5371 r5or6_last_column = 5372 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5373 #endif 5374 if (r5or6_first_column != r5or6_last_column) 5375 return IO_ACCEL_INELIGIBLE; 5376 5377 /* Request is eligible */ 5378 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5379 le16_to_cpu(map->row_cnt); 5380 5381 map_index = (first_group * 5382 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5383 (map_row * total_disks_per_row) + first_column; 5384 break; 5385 default: 5386 return IO_ACCEL_INELIGIBLE; 5387 } 5388 5389 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5390 return IO_ACCEL_INELIGIBLE; 5391 5392 c->phys_disk = dev->phys_disk[map_index]; 5393 if (!c->phys_disk) 5394 return IO_ACCEL_INELIGIBLE; 5395 5396 disk_handle = dd[map_index].ioaccel_handle; 5397 disk_block = le64_to_cpu(map->disk_starting_blk) + 5398 first_row * le16_to_cpu(map->strip_size) + 5399 (first_row_offset - first_column * 5400 le16_to_cpu(map->strip_size)); 5401 disk_block_cnt = block_cnt; 5402 5403 /* handle differing logical/physical block sizes */ 5404 if (map->phys_blk_shift) { 5405 disk_block <<= map->phys_blk_shift; 5406 disk_block_cnt <<= map->phys_blk_shift; 5407 } 5408 BUG_ON(disk_block_cnt > 0xffff); 5409 5410 /* build the new CDB for the physical disk I/O */ 5411 if (disk_block > 0xffffffff) { 5412 cdb[0] = is_write ? WRITE_16 : READ_16; 5413 cdb[1] = 0; 5414 cdb[2] = (u8) (disk_block >> 56); 5415 cdb[3] = (u8) (disk_block >> 48); 5416 cdb[4] = (u8) (disk_block >> 40); 5417 cdb[5] = (u8) (disk_block >> 32); 5418 cdb[6] = (u8) (disk_block >> 24); 5419 cdb[7] = (u8) (disk_block >> 16); 5420 cdb[8] = (u8) (disk_block >> 8); 5421 cdb[9] = (u8) (disk_block); 5422 cdb[10] = (u8) (disk_block_cnt >> 24); 5423 cdb[11] = (u8) (disk_block_cnt >> 16); 5424 cdb[12] = (u8) (disk_block_cnt >> 8); 5425 cdb[13] = (u8) (disk_block_cnt); 5426 cdb[14] = 0; 5427 cdb[15] = 0; 5428 cdb_len = 16; 5429 } else { 5430 cdb[0] = is_write ? WRITE_10 : READ_10; 5431 cdb[1] = 0; 5432 cdb[2] = (u8) (disk_block >> 24); 5433 cdb[3] = (u8) (disk_block >> 16); 5434 cdb[4] = (u8) (disk_block >> 8); 5435 cdb[5] = (u8) (disk_block); 5436 cdb[6] = 0; 5437 cdb[7] = (u8) (disk_block_cnt >> 8); 5438 cdb[8] = (u8) (disk_block_cnt); 5439 cdb[9] = 0; 5440 cdb_len = 10; 5441 } 5442 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5443 dev->scsi3addr, 5444 dev->phys_disk[map_index]); 5445 } 5446 5447 /* 5448 * Submit commands down the "normal" RAID stack path 5449 * All callers to hpsa_ciss_submit must check lockup_detected 5450 * beforehand, before (opt.) and after calling cmd_alloc 5451 */ 5452 static int hpsa_ciss_submit(struct ctlr_info *h, 5453 struct CommandList *c, struct scsi_cmnd *cmd, 5454 struct hpsa_scsi_dev_t *dev) 5455 { 5456 cmd->host_scribble = (unsigned char *) c; 5457 c->cmd_type = CMD_SCSI; 5458 c->scsi_cmd = cmd; 5459 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5460 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8); 5461 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5462 5463 /* Fill in the request block... */ 5464 5465 c->Request.Timeout = 0; 5466 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5467 c->Request.CDBLen = cmd->cmd_len; 5468 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5469 switch (cmd->sc_data_direction) { 5470 case DMA_TO_DEVICE: 5471 c->Request.type_attr_dir = 5472 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5473 break; 5474 case DMA_FROM_DEVICE: 5475 c->Request.type_attr_dir = 5476 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5477 break; 5478 case DMA_NONE: 5479 c->Request.type_attr_dir = 5480 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5481 break; 5482 case DMA_BIDIRECTIONAL: 5483 /* This can happen if a buggy application does a scsi passthru 5484 * and sets both inlen and outlen to non-zero. ( see 5485 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5486 */ 5487 5488 c->Request.type_attr_dir = 5489 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5490 /* This is technically wrong, and hpsa controllers should 5491 * reject it with CMD_INVALID, which is the most correct 5492 * response, but non-fibre backends appear to let it 5493 * slide by, and give the same results as if this field 5494 * were set correctly. Either way is acceptable for 5495 * our purposes here. 5496 */ 5497 5498 break; 5499 5500 default: 5501 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5502 cmd->sc_data_direction); 5503 BUG(); 5504 break; 5505 } 5506 5507 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5508 hpsa_cmd_resolve_and_free(h, c); 5509 return SCSI_MLQUEUE_HOST_BUSY; 5510 } 5511 5512 if (dev->in_reset) { 5513 hpsa_cmd_resolve_and_free(h, c); 5514 return SCSI_MLQUEUE_HOST_BUSY; 5515 } 5516 5517 c->device = dev; 5518 5519 enqueue_cmd_and_start_io(h, c); 5520 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5521 return 0; 5522 } 5523 5524 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5525 struct CommandList *c) 5526 { 5527 dma_addr_t cmd_dma_handle, err_dma_handle; 5528 5529 /* Zero out all of commandlist except the last field, refcount */ 5530 memset(c, 0, offsetof(struct CommandList, refcount)); 5531 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5532 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5533 c->err_info = h->errinfo_pool + index; 5534 memset(c->err_info, 0, sizeof(*c->err_info)); 5535 err_dma_handle = h->errinfo_pool_dhandle 5536 + index * sizeof(*c->err_info); 5537 c->cmdindex = index; 5538 c->busaddr = (u32) cmd_dma_handle; 5539 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5540 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5541 c->h = h; 5542 c->scsi_cmd = SCSI_CMD_IDLE; 5543 } 5544 5545 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5546 { 5547 int i; 5548 5549 for (i = 0; i < h->nr_cmds; i++) { 5550 struct CommandList *c = h->cmd_pool + i; 5551 5552 hpsa_cmd_init(h, i, c); 5553 atomic_set(&c->refcount, 0); 5554 } 5555 } 5556 5557 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5558 struct CommandList *c) 5559 { 5560 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5561 5562 BUG_ON(c->cmdindex != index); 5563 5564 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5565 memset(c->err_info, 0, sizeof(*c->err_info)); 5566 c->busaddr = (u32) cmd_dma_handle; 5567 } 5568 5569 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5570 struct CommandList *c, struct scsi_cmnd *cmd) 5571 { 5572 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5573 int rc = IO_ACCEL_INELIGIBLE; 5574 5575 if (!dev) 5576 return SCSI_MLQUEUE_HOST_BUSY; 5577 5578 if (dev->in_reset) 5579 return SCSI_MLQUEUE_HOST_BUSY; 5580 5581 if (hpsa_simple_mode) 5582 return IO_ACCEL_INELIGIBLE; 5583 5584 cmd->host_scribble = (unsigned char *) c; 5585 5586 if (dev->offload_enabled) { 5587 hpsa_cmd_init(h, c->cmdindex, c); 5588 c->cmd_type = CMD_SCSI; 5589 c->scsi_cmd = cmd; 5590 c->device = dev; 5591 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5592 if (rc < 0) /* scsi_dma_map failed. */ 5593 rc = SCSI_MLQUEUE_HOST_BUSY; 5594 } else if (dev->hba_ioaccel_enabled) { 5595 hpsa_cmd_init(h, c->cmdindex, c); 5596 c->cmd_type = CMD_SCSI; 5597 c->scsi_cmd = cmd; 5598 c->device = dev; 5599 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5600 if (rc < 0) /* scsi_dma_map failed. */ 5601 rc = SCSI_MLQUEUE_HOST_BUSY; 5602 } 5603 return rc; 5604 } 5605 5606 static void hpsa_command_resubmit_worker(struct work_struct *work) 5607 { 5608 struct scsi_cmnd *cmd; 5609 struct hpsa_scsi_dev_t *dev; 5610 struct CommandList *c = container_of(work, struct CommandList, work); 5611 5612 cmd = c->scsi_cmd; 5613 dev = cmd->device->hostdata; 5614 if (!dev) { 5615 cmd->result = DID_NO_CONNECT << 16; 5616 return hpsa_cmd_free_and_done(c->h, c, cmd); 5617 } 5618 5619 if (dev->in_reset) { 5620 cmd->result = DID_RESET << 16; 5621 return hpsa_cmd_free_and_done(c->h, c, cmd); 5622 } 5623 5624 if (c->cmd_type == CMD_IOACCEL2) { 5625 struct ctlr_info *h = c->h; 5626 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5627 int rc; 5628 5629 if (c2->error_data.serv_response == 5630 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5631 rc = hpsa_ioaccel_submit(h, c, cmd); 5632 if (rc == 0) 5633 return; 5634 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5635 /* 5636 * If we get here, it means dma mapping failed. 5637 * Try again via scsi mid layer, which will 5638 * then get SCSI_MLQUEUE_HOST_BUSY. 5639 */ 5640 cmd->result = DID_IMM_RETRY << 16; 5641 return hpsa_cmd_free_and_done(h, c, cmd); 5642 } 5643 /* else, fall thru and resubmit down CISS path */ 5644 } 5645 } 5646 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5647 if (hpsa_ciss_submit(c->h, c, cmd, dev)) { 5648 /* 5649 * If we get here, it means dma mapping failed. Try 5650 * again via scsi mid layer, which will then get 5651 * SCSI_MLQUEUE_HOST_BUSY. 5652 * 5653 * hpsa_ciss_submit will have already freed c 5654 * if it encountered a dma mapping failure. 5655 */ 5656 cmd->result = DID_IMM_RETRY << 16; 5657 cmd->scsi_done(cmd); 5658 } 5659 } 5660 5661 /* Running in struct Scsi_Host->host_lock less mode */ 5662 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5663 { 5664 struct ctlr_info *h; 5665 struct hpsa_scsi_dev_t *dev; 5666 struct CommandList *c; 5667 int rc = 0; 5668 5669 /* Get the ptr to our adapter structure out of cmd->host. */ 5670 h = sdev_to_hba(cmd->device); 5671 5672 BUG_ON(cmd->request->tag < 0); 5673 5674 dev = cmd->device->hostdata; 5675 if (!dev) { 5676 cmd->result = DID_NO_CONNECT << 16; 5677 cmd->scsi_done(cmd); 5678 return 0; 5679 } 5680 5681 if (dev->removed) { 5682 cmd->result = DID_NO_CONNECT << 16; 5683 cmd->scsi_done(cmd); 5684 return 0; 5685 } 5686 5687 if (unlikely(lockup_detected(h))) { 5688 cmd->result = DID_NO_CONNECT << 16; 5689 cmd->scsi_done(cmd); 5690 return 0; 5691 } 5692 5693 if (dev->in_reset) 5694 return SCSI_MLQUEUE_DEVICE_BUSY; 5695 5696 c = cmd_tagged_alloc(h, cmd); 5697 if (c == NULL) 5698 return SCSI_MLQUEUE_DEVICE_BUSY; 5699 5700 /* 5701 * This is necessary because the SML doesn't zero out this field during 5702 * error recovery. 5703 */ 5704 cmd->result = 0; 5705 5706 /* 5707 * Call alternate submit routine for I/O accelerated commands. 5708 * Retries always go down the normal I/O path. 5709 */ 5710 if (likely(cmd->retries == 0 && 5711 !blk_rq_is_passthrough(cmd->request) && 5712 h->acciopath_status)) { 5713 rc = hpsa_ioaccel_submit(h, c, cmd); 5714 if (rc == 0) 5715 return 0; 5716 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5717 hpsa_cmd_resolve_and_free(h, c); 5718 return SCSI_MLQUEUE_HOST_BUSY; 5719 } 5720 } 5721 return hpsa_ciss_submit(h, c, cmd, dev); 5722 } 5723 5724 static void hpsa_scan_complete(struct ctlr_info *h) 5725 { 5726 unsigned long flags; 5727 5728 spin_lock_irqsave(&h->scan_lock, flags); 5729 h->scan_finished = 1; 5730 wake_up(&h->scan_wait_queue); 5731 spin_unlock_irqrestore(&h->scan_lock, flags); 5732 } 5733 5734 static void hpsa_scan_start(struct Scsi_Host *sh) 5735 { 5736 struct ctlr_info *h = shost_to_hba(sh); 5737 unsigned long flags; 5738 5739 /* 5740 * Don't let rescans be initiated on a controller known to be locked 5741 * up. If the controller locks up *during* a rescan, that thread is 5742 * probably hosed, but at least we can prevent new rescan threads from 5743 * piling up on a locked up controller. 5744 */ 5745 if (unlikely(lockup_detected(h))) 5746 return hpsa_scan_complete(h); 5747 5748 /* 5749 * If a scan is already waiting to run, no need to add another 5750 */ 5751 spin_lock_irqsave(&h->scan_lock, flags); 5752 if (h->scan_waiting) { 5753 spin_unlock_irqrestore(&h->scan_lock, flags); 5754 return; 5755 } 5756 5757 spin_unlock_irqrestore(&h->scan_lock, flags); 5758 5759 /* wait until any scan already in progress is finished. */ 5760 while (1) { 5761 spin_lock_irqsave(&h->scan_lock, flags); 5762 if (h->scan_finished) 5763 break; 5764 h->scan_waiting = 1; 5765 spin_unlock_irqrestore(&h->scan_lock, flags); 5766 wait_event(h->scan_wait_queue, h->scan_finished); 5767 /* Note: We don't need to worry about a race between this 5768 * thread and driver unload because the midlayer will 5769 * have incremented the reference count, so unload won't 5770 * happen if we're in here. 5771 */ 5772 } 5773 h->scan_finished = 0; /* mark scan as in progress */ 5774 h->scan_waiting = 0; 5775 spin_unlock_irqrestore(&h->scan_lock, flags); 5776 5777 if (unlikely(lockup_detected(h))) 5778 return hpsa_scan_complete(h); 5779 5780 /* 5781 * Do the scan after a reset completion 5782 */ 5783 spin_lock_irqsave(&h->reset_lock, flags); 5784 if (h->reset_in_progress) { 5785 h->drv_req_rescan = 1; 5786 spin_unlock_irqrestore(&h->reset_lock, flags); 5787 hpsa_scan_complete(h); 5788 return; 5789 } 5790 spin_unlock_irqrestore(&h->reset_lock, flags); 5791 5792 hpsa_update_scsi_devices(h); 5793 5794 hpsa_scan_complete(h); 5795 } 5796 5797 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5798 { 5799 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5800 5801 if (!logical_drive) 5802 return -ENODEV; 5803 5804 if (qdepth < 1) 5805 qdepth = 1; 5806 else if (qdepth > logical_drive->queue_depth) 5807 qdepth = logical_drive->queue_depth; 5808 5809 return scsi_change_queue_depth(sdev, qdepth); 5810 } 5811 5812 static int hpsa_scan_finished(struct Scsi_Host *sh, 5813 unsigned long elapsed_time) 5814 { 5815 struct ctlr_info *h = shost_to_hba(sh); 5816 unsigned long flags; 5817 int finished; 5818 5819 spin_lock_irqsave(&h->scan_lock, flags); 5820 finished = h->scan_finished; 5821 spin_unlock_irqrestore(&h->scan_lock, flags); 5822 return finished; 5823 } 5824 5825 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5826 { 5827 struct Scsi_Host *sh; 5828 5829 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5830 if (sh == NULL) { 5831 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5832 return -ENOMEM; 5833 } 5834 5835 sh->io_port = 0; 5836 sh->n_io_port = 0; 5837 sh->this_id = -1; 5838 sh->max_channel = 3; 5839 sh->max_cmd_len = MAX_COMMAND_SIZE; 5840 sh->max_lun = HPSA_MAX_LUN; 5841 sh->max_id = HPSA_MAX_LUN; 5842 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5843 sh->cmd_per_lun = sh->can_queue; 5844 sh->sg_tablesize = h->maxsgentries; 5845 sh->transportt = hpsa_sas_transport_template; 5846 sh->hostdata[0] = (unsigned long) h; 5847 sh->irq = pci_irq_vector(h->pdev, 0); 5848 sh->unique_id = sh->irq; 5849 5850 h->scsi_host = sh; 5851 return 0; 5852 } 5853 5854 static int hpsa_scsi_add_host(struct ctlr_info *h) 5855 { 5856 int rv; 5857 5858 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5859 if (rv) { 5860 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5861 return rv; 5862 } 5863 scsi_scan_host(h->scsi_host); 5864 return 0; 5865 } 5866 5867 /* 5868 * The block layer has already gone to the trouble of picking out a unique, 5869 * small-integer tag for this request. We use an offset from that value as 5870 * an index to select our command block. (The offset allows us to reserve the 5871 * low-numbered entries for our own uses.) 5872 */ 5873 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5874 { 5875 int idx = scmd->request->tag; 5876 5877 if (idx < 0) 5878 return idx; 5879 5880 /* Offset to leave space for internal cmds. */ 5881 return idx += HPSA_NRESERVED_CMDS; 5882 } 5883 5884 /* 5885 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5886 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5887 */ 5888 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5889 struct CommandList *c, unsigned char lunaddr[], 5890 int reply_queue) 5891 { 5892 int rc; 5893 5894 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5895 (void) fill_cmd(c, TEST_UNIT_READY, h, 5896 NULL, 0, 0, lunaddr, TYPE_CMD); 5897 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 5898 if (rc) 5899 return rc; 5900 /* no unmap needed here because no data xfer. */ 5901 5902 /* Check if the unit is already ready. */ 5903 if (c->err_info->CommandStatus == CMD_SUCCESS) 5904 return 0; 5905 5906 /* 5907 * The first command sent after reset will receive "unit attention" to 5908 * indicate that the LUN has been reset...this is actually what we're 5909 * looking for (but, success is good too). 5910 */ 5911 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5912 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5913 (c->err_info->SenseInfo[2] == NO_SENSE || 5914 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5915 return 0; 5916 5917 return 1; 5918 } 5919 5920 /* 5921 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5922 * returns zero when the unit is ready, and non-zero when giving up. 5923 */ 5924 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5925 struct CommandList *c, 5926 unsigned char lunaddr[], int reply_queue) 5927 { 5928 int rc; 5929 int count = 0; 5930 int waittime = 1; /* seconds */ 5931 5932 /* Send test unit ready until device ready, or give up. */ 5933 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5934 5935 /* 5936 * Wait for a bit. do this first, because if we send 5937 * the TUR right away, the reset will just abort it. 5938 */ 5939 msleep(1000 * waittime); 5940 5941 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5942 if (!rc) 5943 break; 5944 5945 /* Increase wait time with each try, up to a point. */ 5946 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5947 waittime *= 2; 5948 5949 dev_warn(&h->pdev->dev, 5950 "waiting %d secs for device to become ready.\n", 5951 waittime); 5952 } 5953 5954 return rc; 5955 } 5956 5957 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5958 unsigned char lunaddr[], 5959 int reply_queue) 5960 { 5961 int first_queue; 5962 int last_queue; 5963 int rq; 5964 int rc = 0; 5965 struct CommandList *c; 5966 5967 c = cmd_alloc(h); 5968 5969 /* 5970 * If no specific reply queue was requested, then send the TUR 5971 * repeatedly, requesting a reply on each reply queue; otherwise execute 5972 * the loop exactly once using only the specified queue. 5973 */ 5974 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5975 first_queue = 0; 5976 last_queue = h->nreply_queues - 1; 5977 } else { 5978 first_queue = reply_queue; 5979 last_queue = reply_queue; 5980 } 5981 5982 for (rq = first_queue; rq <= last_queue; rq++) { 5983 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5984 if (rc) 5985 break; 5986 } 5987 5988 if (rc) 5989 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5990 else 5991 dev_warn(&h->pdev->dev, "device is ready.\n"); 5992 5993 cmd_free(h, c); 5994 return rc; 5995 } 5996 5997 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5998 * complaining. Doing a host- or bus-reset can't do anything good here. 5999 */ 6000 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 6001 { 6002 int rc = SUCCESS; 6003 int i; 6004 struct ctlr_info *h; 6005 struct hpsa_scsi_dev_t *dev = NULL; 6006 u8 reset_type; 6007 char msg[48]; 6008 unsigned long flags; 6009 6010 /* find the controller to which the command to be aborted was sent */ 6011 h = sdev_to_hba(scsicmd->device); 6012 if (h == NULL) /* paranoia */ 6013 return FAILED; 6014 6015 spin_lock_irqsave(&h->reset_lock, flags); 6016 h->reset_in_progress = 1; 6017 spin_unlock_irqrestore(&h->reset_lock, flags); 6018 6019 if (lockup_detected(h)) { 6020 rc = FAILED; 6021 goto return_reset_status; 6022 } 6023 6024 dev = scsicmd->device->hostdata; 6025 if (!dev) { 6026 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 6027 rc = FAILED; 6028 goto return_reset_status; 6029 } 6030 6031 if (dev->devtype == TYPE_ENCLOSURE) { 6032 rc = SUCCESS; 6033 goto return_reset_status; 6034 } 6035 6036 /* if controller locked up, we can guarantee command won't complete */ 6037 if (lockup_detected(h)) { 6038 snprintf(msg, sizeof(msg), 6039 "cmd %d RESET FAILED, lockup detected", 6040 hpsa_get_cmd_index(scsicmd)); 6041 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6042 rc = FAILED; 6043 goto return_reset_status; 6044 } 6045 6046 /* this reset request might be the result of a lockup; check */ 6047 if (detect_controller_lockup(h)) { 6048 snprintf(msg, sizeof(msg), 6049 "cmd %d RESET FAILED, new lockup detected", 6050 hpsa_get_cmd_index(scsicmd)); 6051 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6052 rc = FAILED; 6053 goto return_reset_status; 6054 } 6055 6056 /* Do not attempt on controller */ 6057 if (is_hba_lunid(dev->scsi3addr)) { 6058 rc = SUCCESS; 6059 goto return_reset_status; 6060 } 6061 6062 if (is_logical_dev_addr_mode(dev->scsi3addr)) 6063 reset_type = HPSA_DEVICE_RESET_MSG; 6064 else 6065 reset_type = HPSA_PHYS_TARGET_RESET; 6066 6067 sprintf(msg, "resetting %s", 6068 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 6069 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6070 6071 /* 6072 * wait to see if any commands will complete before sending reset 6073 */ 6074 dev->in_reset = true; /* block any new cmds from OS for this device */ 6075 for (i = 0; i < 10; i++) { 6076 if (atomic_read(&dev->commands_outstanding) > 0) 6077 msleep(1000); 6078 else 6079 break; 6080 } 6081 6082 /* send a reset to the SCSI LUN which the command was sent to */ 6083 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE); 6084 if (rc == 0) 6085 rc = SUCCESS; 6086 else 6087 rc = FAILED; 6088 6089 sprintf(msg, "reset %s %s", 6090 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 6091 rc == SUCCESS ? "completed successfully" : "failed"); 6092 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6093 6094 return_reset_status: 6095 spin_lock_irqsave(&h->reset_lock, flags); 6096 h->reset_in_progress = 0; 6097 if (dev) 6098 dev->in_reset = false; 6099 spin_unlock_irqrestore(&h->reset_lock, flags); 6100 return rc; 6101 } 6102 6103 /* 6104 * For operations with an associated SCSI command, a command block is allocated 6105 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6106 * block request tag as an index into a table of entries. cmd_tagged_free() is 6107 * the complement, although cmd_free() may be called instead. 6108 */ 6109 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6110 struct scsi_cmnd *scmd) 6111 { 6112 int idx = hpsa_get_cmd_index(scmd); 6113 struct CommandList *c = h->cmd_pool + idx; 6114 6115 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6116 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6117 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6118 /* The index value comes from the block layer, so if it's out of 6119 * bounds, it's probably not our bug. 6120 */ 6121 BUG(); 6122 } 6123 6124 if (unlikely(!hpsa_is_cmd_idle(c))) { 6125 /* 6126 * We expect that the SCSI layer will hand us a unique tag 6127 * value. Thus, there should never be a collision here between 6128 * two requests...because if the selected command isn't idle 6129 * then someone is going to be very disappointed. 6130 */ 6131 if (idx != h->last_collision_tag) { /* Print once per tag */ 6132 dev_warn(&h->pdev->dev, 6133 "%s: tag collision (tag=%d)\n", __func__, idx); 6134 if (scmd) 6135 scsi_print_command(scmd); 6136 h->last_collision_tag = idx; 6137 } 6138 return NULL; 6139 } 6140 6141 atomic_inc(&c->refcount); 6142 6143 hpsa_cmd_partial_init(h, idx, c); 6144 return c; 6145 } 6146 6147 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6148 { 6149 /* 6150 * Release our reference to the block. We don't need to do anything 6151 * else to free it, because it is accessed by index. 6152 */ 6153 (void)atomic_dec(&c->refcount); 6154 } 6155 6156 /* 6157 * For operations that cannot sleep, a command block is allocated at init, 6158 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6159 * which ones are free or in use. Lock must be held when calling this. 6160 * cmd_free() is the complement. 6161 * This function never gives up and returns NULL. If it hangs, 6162 * another thread must call cmd_free() to free some tags. 6163 */ 6164 6165 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6166 { 6167 struct CommandList *c; 6168 int refcount, i; 6169 int offset = 0; 6170 6171 /* 6172 * There is some *extremely* small but non-zero chance that that 6173 * multiple threads could get in here, and one thread could 6174 * be scanning through the list of bits looking for a free 6175 * one, but the free ones are always behind him, and other 6176 * threads sneak in behind him and eat them before he can 6177 * get to them, so that while there is always a free one, a 6178 * very unlucky thread might be starved anyway, never able to 6179 * beat the other threads. In reality, this happens so 6180 * infrequently as to be indistinguishable from never. 6181 * 6182 * Note that we start allocating commands before the SCSI host structure 6183 * is initialized. Since the search starts at bit zero, this 6184 * all works, since we have at least one command structure available; 6185 * however, it means that the structures with the low indexes have to be 6186 * reserved for driver-initiated requests, while requests from the block 6187 * layer will use the higher indexes. 6188 */ 6189 6190 for (;;) { 6191 i = find_next_zero_bit(h->cmd_pool_bits, 6192 HPSA_NRESERVED_CMDS, 6193 offset); 6194 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6195 offset = 0; 6196 continue; 6197 } 6198 c = h->cmd_pool + i; 6199 refcount = atomic_inc_return(&c->refcount); 6200 if (unlikely(refcount > 1)) { 6201 cmd_free(h, c); /* already in use */ 6202 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6203 continue; 6204 } 6205 set_bit(i & (BITS_PER_LONG - 1), 6206 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6207 break; /* it's ours now. */ 6208 } 6209 hpsa_cmd_partial_init(h, i, c); 6210 c->device = NULL; 6211 return c; 6212 } 6213 6214 /* 6215 * This is the complementary operation to cmd_alloc(). Note, however, in some 6216 * corner cases it may also be used to free blocks allocated by 6217 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6218 * the clear-bit is harmless. 6219 */ 6220 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6221 { 6222 if (atomic_dec_and_test(&c->refcount)) { 6223 int i; 6224 6225 i = c - h->cmd_pool; 6226 clear_bit(i & (BITS_PER_LONG - 1), 6227 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6228 } 6229 } 6230 6231 #ifdef CONFIG_COMPAT 6232 6233 static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd, 6234 void __user *arg) 6235 { 6236 struct ctlr_info *h = sdev_to_hba(dev); 6237 IOCTL32_Command_struct __user *arg32 = arg; 6238 IOCTL_Command_struct arg64; 6239 int err; 6240 u32 cp; 6241 6242 if (!arg) 6243 return -EINVAL; 6244 6245 memset(&arg64, 0, sizeof(arg64)); 6246 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf))) 6247 return -EFAULT; 6248 if (get_user(cp, &arg32->buf)) 6249 return -EFAULT; 6250 arg64.buf = compat_ptr(cp); 6251 6252 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6253 return -EAGAIN; 6254 err = hpsa_passthru_ioctl(h, &arg64); 6255 atomic_inc(&h->passthru_cmds_avail); 6256 if (err) 6257 return err; 6258 if (copy_to_user(&arg32->error_info, &arg64.error_info, 6259 sizeof(arg32->error_info))) 6260 return -EFAULT; 6261 return 0; 6262 } 6263 6264 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6265 unsigned int cmd, void __user *arg) 6266 { 6267 struct ctlr_info *h = sdev_to_hba(dev); 6268 BIG_IOCTL32_Command_struct __user *arg32 = arg; 6269 BIG_IOCTL_Command_struct arg64; 6270 int err; 6271 u32 cp; 6272 6273 if (!arg) 6274 return -EINVAL; 6275 memset(&arg64, 0, sizeof(arg64)); 6276 if (copy_from_user(&arg64, arg32, 6277 offsetof(BIG_IOCTL32_Command_struct, buf))) 6278 return -EFAULT; 6279 if (get_user(cp, &arg32->buf)) 6280 return -EFAULT; 6281 arg64.buf = compat_ptr(cp); 6282 6283 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6284 return -EAGAIN; 6285 err = hpsa_big_passthru_ioctl(h, &arg64); 6286 atomic_inc(&h->passthru_cmds_avail); 6287 if (err) 6288 return err; 6289 if (copy_to_user(&arg32->error_info, &arg64.error_info, 6290 sizeof(arg32->error_info))) 6291 return -EFAULT; 6292 return 0; 6293 } 6294 6295 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 6296 void __user *arg) 6297 { 6298 switch (cmd) { 6299 case CCISS_GETPCIINFO: 6300 case CCISS_GETINTINFO: 6301 case CCISS_SETINTINFO: 6302 case CCISS_GETNODENAME: 6303 case CCISS_SETNODENAME: 6304 case CCISS_GETHEARTBEAT: 6305 case CCISS_GETBUSTYPES: 6306 case CCISS_GETFIRMVER: 6307 case CCISS_GETDRIVVER: 6308 case CCISS_REVALIDVOLS: 6309 case CCISS_DEREGDISK: 6310 case CCISS_REGNEWDISK: 6311 case CCISS_REGNEWD: 6312 case CCISS_RESCANDISK: 6313 case CCISS_GETLUNINFO: 6314 return hpsa_ioctl(dev, cmd, arg); 6315 6316 case CCISS_PASSTHRU32: 6317 return hpsa_ioctl32_passthru(dev, cmd, arg); 6318 case CCISS_BIG_PASSTHRU32: 6319 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6320 6321 default: 6322 return -ENOIOCTLCMD; 6323 } 6324 } 6325 #endif 6326 6327 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6328 { 6329 struct hpsa_pci_info pciinfo; 6330 6331 if (!argp) 6332 return -EINVAL; 6333 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6334 pciinfo.bus = h->pdev->bus->number; 6335 pciinfo.dev_fn = h->pdev->devfn; 6336 pciinfo.board_id = h->board_id; 6337 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6338 return -EFAULT; 6339 return 0; 6340 } 6341 6342 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6343 { 6344 DriverVer_type DriverVer; 6345 unsigned char vmaj, vmin, vsubmin; 6346 int rc; 6347 6348 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6349 &vmaj, &vmin, &vsubmin); 6350 if (rc != 3) { 6351 dev_info(&h->pdev->dev, "driver version string '%s' " 6352 "unrecognized.", HPSA_DRIVER_VERSION); 6353 vmaj = 0; 6354 vmin = 0; 6355 vsubmin = 0; 6356 } 6357 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6358 if (!argp) 6359 return -EINVAL; 6360 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6361 return -EFAULT; 6362 return 0; 6363 } 6364 6365 static int hpsa_passthru_ioctl(struct ctlr_info *h, 6366 IOCTL_Command_struct *iocommand) 6367 { 6368 struct CommandList *c; 6369 char *buff = NULL; 6370 u64 temp64; 6371 int rc = 0; 6372 6373 if (!capable(CAP_SYS_RAWIO)) 6374 return -EPERM; 6375 if ((iocommand->buf_size < 1) && 6376 (iocommand->Request.Type.Direction != XFER_NONE)) { 6377 return -EINVAL; 6378 } 6379 if (iocommand->buf_size > 0) { 6380 buff = kmalloc(iocommand->buf_size, GFP_KERNEL); 6381 if (buff == NULL) 6382 return -ENOMEM; 6383 if (iocommand->Request.Type.Direction & XFER_WRITE) { 6384 /* Copy the data into the buffer we created */ 6385 if (copy_from_user(buff, iocommand->buf, 6386 iocommand->buf_size)) { 6387 rc = -EFAULT; 6388 goto out_kfree; 6389 } 6390 } else { 6391 memset(buff, 0, iocommand->buf_size); 6392 } 6393 } 6394 c = cmd_alloc(h); 6395 6396 /* Fill in the command type */ 6397 c->cmd_type = CMD_IOCTL_PEND; 6398 c->scsi_cmd = SCSI_CMD_BUSY; 6399 /* Fill in Command Header */ 6400 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6401 if (iocommand->buf_size > 0) { /* buffer to fill */ 6402 c->Header.SGList = 1; 6403 c->Header.SGTotal = cpu_to_le16(1); 6404 } else { /* no buffers to fill */ 6405 c->Header.SGList = 0; 6406 c->Header.SGTotal = cpu_to_le16(0); 6407 } 6408 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN)); 6409 6410 /* Fill in Request block */ 6411 memcpy(&c->Request, &iocommand->Request, 6412 sizeof(c->Request)); 6413 6414 /* Fill in the scatter gather information */ 6415 if (iocommand->buf_size > 0) { 6416 temp64 = dma_map_single(&h->pdev->dev, buff, 6417 iocommand->buf_size, DMA_BIDIRECTIONAL); 6418 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6419 c->SG[0].Addr = cpu_to_le64(0); 6420 c->SG[0].Len = cpu_to_le32(0); 6421 rc = -ENOMEM; 6422 goto out; 6423 } 6424 c->SG[0].Addr = cpu_to_le64(temp64); 6425 c->SG[0].Len = cpu_to_le32(iocommand->buf_size); 6426 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6427 } 6428 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6429 NO_TIMEOUT); 6430 if (iocommand->buf_size > 0) 6431 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6432 check_ioctl_unit_attention(h, c); 6433 if (rc) { 6434 rc = -EIO; 6435 goto out; 6436 } 6437 6438 /* Copy the error information out */ 6439 memcpy(&iocommand->error_info, c->err_info, 6440 sizeof(iocommand->error_info)); 6441 if ((iocommand->Request.Type.Direction & XFER_READ) && 6442 iocommand->buf_size > 0) { 6443 /* Copy the data out of the buffer we created */ 6444 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) { 6445 rc = -EFAULT; 6446 goto out; 6447 } 6448 } 6449 out: 6450 cmd_free(h, c); 6451 out_kfree: 6452 kfree(buff); 6453 return rc; 6454 } 6455 6456 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, 6457 BIG_IOCTL_Command_struct *ioc) 6458 { 6459 struct CommandList *c; 6460 unsigned char **buff = NULL; 6461 int *buff_size = NULL; 6462 u64 temp64; 6463 BYTE sg_used = 0; 6464 int status = 0; 6465 u32 left; 6466 u32 sz; 6467 BYTE __user *data_ptr; 6468 6469 if (!capable(CAP_SYS_RAWIO)) 6470 return -EPERM; 6471 6472 if ((ioc->buf_size < 1) && 6473 (ioc->Request.Type.Direction != XFER_NONE)) 6474 return -EINVAL; 6475 /* Check kmalloc limits using all SGs */ 6476 if (ioc->malloc_size > MAX_KMALLOC_SIZE) 6477 return -EINVAL; 6478 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) 6479 return -EINVAL; 6480 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6481 if (!buff) { 6482 status = -ENOMEM; 6483 goto cleanup1; 6484 } 6485 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6486 if (!buff_size) { 6487 status = -ENOMEM; 6488 goto cleanup1; 6489 } 6490 left = ioc->buf_size; 6491 data_ptr = ioc->buf; 6492 while (left) { 6493 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6494 buff_size[sg_used] = sz; 6495 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6496 if (buff[sg_used] == NULL) { 6497 status = -ENOMEM; 6498 goto cleanup1; 6499 } 6500 if (ioc->Request.Type.Direction & XFER_WRITE) { 6501 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6502 status = -EFAULT; 6503 goto cleanup1; 6504 } 6505 } else 6506 memset(buff[sg_used], 0, sz); 6507 left -= sz; 6508 data_ptr += sz; 6509 sg_used++; 6510 } 6511 c = cmd_alloc(h); 6512 6513 c->cmd_type = CMD_IOCTL_PEND; 6514 c->scsi_cmd = SCSI_CMD_BUSY; 6515 c->Header.ReplyQueue = 0; 6516 c->Header.SGList = (u8) sg_used; 6517 c->Header.SGTotal = cpu_to_le16(sg_used); 6518 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6519 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6520 if (ioc->buf_size > 0) { 6521 int i; 6522 for (i = 0; i < sg_used; i++) { 6523 temp64 = dma_map_single(&h->pdev->dev, buff[i], 6524 buff_size[i], DMA_BIDIRECTIONAL); 6525 if (dma_mapping_error(&h->pdev->dev, 6526 (dma_addr_t) temp64)) { 6527 c->SG[i].Addr = cpu_to_le64(0); 6528 c->SG[i].Len = cpu_to_le32(0); 6529 hpsa_pci_unmap(h->pdev, c, i, 6530 DMA_BIDIRECTIONAL); 6531 status = -ENOMEM; 6532 goto cleanup0; 6533 } 6534 c->SG[i].Addr = cpu_to_le64(temp64); 6535 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6536 c->SG[i].Ext = cpu_to_le32(0); 6537 } 6538 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6539 } 6540 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6541 NO_TIMEOUT); 6542 if (sg_used) 6543 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6544 check_ioctl_unit_attention(h, c); 6545 if (status) { 6546 status = -EIO; 6547 goto cleanup0; 6548 } 6549 6550 /* Copy the error information out */ 6551 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6552 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6553 int i; 6554 6555 /* Copy the data out of the buffer we created */ 6556 BYTE __user *ptr = ioc->buf; 6557 for (i = 0; i < sg_used; i++) { 6558 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6559 status = -EFAULT; 6560 goto cleanup0; 6561 } 6562 ptr += buff_size[i]; 6563 } 6564 } 6565 status = 0; 6566 cleanup0: 6567 cmd_free(h, c); 6568 cleanup1: 6569 if (buff) { 6570 int i; 6571 6572 for (i = 0; i < sg_used; i++) 6573 kfree(buff[i]); 6574 kfree(buff); 6575 } 6576 kfree(buff_size); 6577 return status; 6578 } 6579 6580 static void check_ioctl_unit_attention(struct ctlr_info *h, 6581 struct CommandList *c) 6582 { 6583 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6584 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6585 (void) check_for_unit_attention(h, c); 6586 } 6587 6588 /* 6589 * ioctl 6590 */ 6591 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 6592 void __user *argp) 6593 { 6594 struct ctlr_info *h = sdev_to_hba(dev); 6595 int rc; 6596 6597 switch (cmd) { 6598 case CCISS_DEREGDISK: 6599 case CCISS_REGNEWDISK: 6600 case CCISS_REGNEWD: 6601 hpsa_scan_start(h->scsi_host); 6602 return 0; 6603 case CCISS_GETPCIINFO: 6604 return hpsa_getpciinfo_ioctl(h, argp); 6605 case CCISS_GETDRIVVER: 6606 return hpsa_getdrivver_ioctl(h, argp); 6607 case CCISS_PASSTHRU: { 6608 IOCTL_Command_struct iocommand; 6609 6610 if (!argp) 6611 return -EINVAL; 6612 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6613 return -EFAULT; 6614 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6615 return -EAGAIN; 6616 rc = hpsa_passthru_ioctl(h, &iocommand); 6617 atomic_inc(&h->passthru_cmds_avail); 6618 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand))) 6619 rc = -EFAULT; 6620 return rc; 6621 } 6622 case CCISS_BIG_PASSTHRU: { 6623 BIG_IOCTL_Command_struct ioc; 6624 if (!argp) 6625 return -EINVAL; 6626 if (copy_from_user(&ioc, argp, sizeof(ioc))) 6627 return -EFAULT; 6628 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6629 return -EAGAIN; 6630 rc = hpsa_big_passthru_ioctl(h, &ioc); 6631 atomic_inc(&h->passthru_cmds_avail); 6632 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc))) 6633 rc = -EFAULT; 6634 return rc; 6635 } 6636 default: 6637 return -ENOTTY; 6638 } 6639 } 6640 6641 static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type) 6642 { 6643 struct CommandList *c; 6644 6645 c = cmd_alloc(h); 6646 6647 /* fill_cmd can't fail here, no data buffer to map */ 6648 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6649 RAID_CTLR_LUNID, TYPE_MSG); 6650 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6651 c->waiting = NULL; 6652 enqueue_cmd_and_start_io(h, c); 6653 /* Don't wait for completion, the reset won't complete. Don't free 6654 * the command either. This is the last command we will send before 6655 * re-initializing everything, so it doesn't matter and won't leak. 6656 */ 6657 return; 6658 } 6659 6660 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6661 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6662 int cmd_type) 6663 { 6664 enum dma_data_direction dir = DMA_NONE; 6665 6666 c->cmd_type = CMD_IOCTL_PEND; 6667 c->scsi_cmd = SCSI_CMD_BUSY; 6668 c->Header.ReplyQueue = 0; 6669 if (buff != NULL && size > 0) { 6670 c->Header.SGList = 1; 6671 c->Header.SGTotal = cpu_to_le16(1); 6672 } else { 6673 c->Header.SGList = 0; 6674 c->Header.SGTotal = cpu_to_le16(0); 6675 } 6676 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6677 6678 if (cmd_type == TYPE_CMD) { 6679 switch (cmd) { 6680 case HPSA_INQUIRY: 6681 /* are we trying to read a vital product page */ 6682 if (page_code & VPD_PAGE) { 6683 c->Request.CDB[1] = 0x01; 6684 c->Request.CDB[2] = (page_code & 0xff); 6685 } 6686 c->Request.CDBLen = 6; 6687 c->Request.type_attr_dir = 6688 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6689 c->Request.Timeout = 0; 6690 c->Request.CDB[0] = HPSA_INQUIRY; 6691 c->Request.CDB[4] = size & 0xFF; 6692 break; 6693 case RECEIVE_DIAGNOSTIC: 6694 c->Request.CDBLen = 6; 6695 c->Request.type_attr_dir = 6696 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6697 c->Request.Timeout = 0; 6698 c->Request.CDB[0] = cmd; 6699 c->Request.CDB[1] = 1; 6700 c->Request.CDB[2] = 1; 6701 c->Request.CDB[3] = (size >> 8) & 0xFF; 6702 c->Request.CDB[4] = size & 0xFF; 6703 break; 6704 case HPSA_REPORT_LOG: 6705 case HPSA_REPORT_PHYS: 6706 /* Talking to controller so It's a physical command 6707 mode = 00 target = 0. Nothing to write. 6708 */ 6709 c->Request.CDBLen = 12; 6710 c->Request.type_attr_dir = 6711 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6712 c->Request.Timeout = 0; 6713 c->Request.CDB[0] = cmd; 6714 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6715 c->Request.CDB[7] = (size >> 16) & 0xFF; 6716 c->Request.CDB[8] = (size >> 8) & 0xFF; 6717 c->Request.CDB[9] = size & 0xFF; 6718 break; 6719 case BMIC_SENSE_DIAG_OPTIONS: 6720 c->Request.CDBLen = 16; 6721 c->Request.type_attr_dir = 6722 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6723 c->Request.Timeout = 0; 6724 /* Spec says this should be BMIC_WRITE */ 6725 c->Request.CDB[0] = BMIC_READ; 6726 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6727 break; 6728 case BMIC_SET_DIAG_OPTIONS: 6729 c->Request.CDBLen = 16; 6730 c->Request.type_attr_dir = 6731 TYPE_ATTR_DIR(cmd_type, 6732 ATTR_SIMPLE, XFER_WRITE); 6733 c->Request.Timeout = 0; 6734 c->Request.CDB[0] = BMIC_WRITE; 6735 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6736 break; 6737 case HPSA_CACHE_FLUSH: 6738 c->Request.CDBLen = 12; 6739 c->Request.type_attr_dir = 6740 TYPE_ATTR_DIR(cmd_type, 6741 ATTR_SIMPLE, XFER_WRITE); 6742 c->Request.Timeout = 0; 6743 c->Request.CDB[0] = BMIC_WRITE; 6744 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6745 c->Request.CDB[7] = (size >> 8) & 0xFF; 6746 c->Request.CDB[8] = size & 0xFF; 6747 break; 6748 case TEST_UNIT_READY: 6749 c->Request.CDBLen = 6; 6750 c->Request.type_attr_dir = 6751 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6752 c->Request.Timeout = 0; 6753 break; 6754 case HPSA_GET_RAID_MAP: 6755 c->Request.CDBLen = 12; 6756 c->Request.type_attr_dir = 6757 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6758 c->Request.Timeout = 0; 6759 c->Request.CDB[0] = HPSA_CISS_READ; 6760 c->Request.CDB[1] = cmd; 6761 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6762 c->Request.CDB[7] = (size >> 16) & 0xFF; 6763 c->Request.CDB[8] = (size >> 8) & 0xFF; 6764 c->Request.CDB[9] = size & 0xFF; 6765 break; 6766 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6767 c->Request.CDBLen = 10; 6768 c->Request.type_attr_dir = 6769 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6770 c->Request.Timeout = 0; 6771 c->Request.CDB[0] = BMIC_READ; 6772 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6773 c->Request.CDB[7] = (size >> 16) & 0xFF; 6774 c->Request.CDB[8] = (size >> 8) & 0xFF; 6775 break; 6776 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6777 c->Request.CDBLen = 10; 6778 c->Request.type_attr_dir = 6779 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6780 c->Request.Timeout = 0; 6781 c->Request.CDB[0] = BMIC_READ; 6782 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6783 c->Request.CDB[7] = (size >> 16) & 0xFF; 6784 c->Request.CDB[8] = (size >> 8) & 0XFF; 6785 break; 6786 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6787 c->Request.CDBLen = 10; 6788 c->Request.type_attr_dir = 6789 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6790 c->Request.Timeout = 0; 6791 c->Request.CDB[0] = BMIC_READ; 6792 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6793 c->Request.CDB[7] = (size >> 16) & 0xFF; 6794 c->Request.CDB[8] = (size >> 8) & 0XFF; 6795 break; 6796 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6797 c->Request.CDBLen = 10; 6798 c->Request.type_attr_dir = 6799 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6800 c->Request.Timeout = 0; 6801 c->Request.CDB[0] = BMIC_READ; 6802 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6803 c->Request.CDB[7] = (size >> 16) & 0xFF; 6804 c->Request.CDB[8] = (size >> 8) & 0XFF; 6805 break; 6806 case BMIC_IDENTIFY_CONTROLLER: 6807 c->Request.CDBLen = 10; 6808 c->Request.type_attr_dir = 6809 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6810 c->Request.Timeout = 0; 6811 c->Request.CDB[0] = BMIC_READ; 6812 c->Request.CDB[1] = 0; 6813 c->Request.CDB[2] = 0; 6814 c->Request.CDB[3] = 0; 6815 c->Request.CDB[4] = 0; 6816 c->Request.CDB[5] = 0; 6817 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6818 c->Request.CDB[7] = (size >> 16) & 0xFF; 6819 c->Request.CDB[8] = (size >> 8) & 0XFF; 6820 c->Request.CDB[9] = 0; 6821 break; 6822 default: 6823 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6824 BUG(); 6825 } 6826 } else if (cmd_type == TYPE_MSG) { 6827 switch (cmd) { 6828 6829 case HPSA_PHYS_TARGET_RESET: 6830 c->Request.CDBLen = 16; 6831 c->Request.type_attr_dir = 6832 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6833 c->Request.Timeout = 0; /* Don't time out */ 6834 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6835 c->Request.CDB[0] = HPSA_RESET; 6836 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6837 /* Physical target reset needs no control bytes 4-7*/ 6838 c->Request.CDB[4] = 0x00; 6839 c->Request.CDB[5] = 0x00; 6840 c->Request.CDB[6] = 0x00; 6841 c->Request.CDB[7] = 0x00; 6842 break; 6843 case HPSA_DEVICE_RESET_MSG: 6844 c->Request.CDBLen = 16; 6845 c->Request.type_attr_dir = 6846 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6847 c->Request.Timeout = 0; /* Don't time out */ 6848 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6849 c->Request.CDB[0] = cmd; 6850 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6851 /* If bytes 4-7 are zero, it means reset the */ 6852 /* LunID device */ 6853 c->Request.CDB[4] = 0x00; 6854 c->Request.CDB[5] = 0x00; 6855 c->Request.CDB[6] = 0x00; 6856 c->Request.CDB[7] = 0x00; 6857 break; 6858 default: 6859 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6860 cmd); 6861 BUG(); 6862 } 6863 } else { 6864 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6865 BUG(); 6866 } 6867 6868 switch (GET_DIR(c->Request.type_attr_dir)) { 6869 case XFER_READ: 6870 dir = DMA_FROM_DEVICE; 6871 break; 6872 case XFER_WRITE: 6873 dir = DMA_TO_DEVICE; 6874 break; 6875 case XFER_NONE: 6876 dir = DMA_NONE; 6877 break; 6878 default: 6879 dir = DMA_BIDIRECTIONAL; 6880 } 6881 if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6882 return -1; 6883 return 0; 6884 } 6885 6886 /* 6887 * Map (physical) PCI mem into (virtual) kernel space 6888 */ 6889 static void __iomem *remap_pci_mem(ulong base, ulong size) 6890 { 6891 ulong page_base = ((ulong) base) & PAGE_MASK; 6892 ulong page_offs = ((ulong) base) - page_base; 6893 void __iomem *page_remapped = ioremap(page_base, 6894 page_offs + size); 6895 6896 return page_remapped ? (page_remapped + page_offs) : NULL; 6897 } 6898 6899 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6900 { 6901 return h->access.command_completed(h, q); 6902 } 6903 6904 static inline bool interrupt_pending(struct ctlr_info *h) 6905 { 6906 return h->access.intr_pending(h); 6907 } 6908 6909 static inline long interrupt_not_for_us(struct ctlr_info *h) 6910 { 6911 return (h->access.intr_pending(h) == 0) || 6912 (h->interrupts_enabled == 0); 6913 } 6914 6915 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6916 u32 raw_tag) 6917 { 6918 if (unlikely(tag_index >= h->nr_cmds)) { 6919 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6920 return 1; 6921 } 6922 return 0; 6923 } 6924 6925 static inline void finish_cmd(struct CommandList *c) 6926 { 6927 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6928 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6929 || c->cmd_type == CMD_IOACCEL2)) 6930 complete_scsi_command(c); 6931 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6932 complete(c->waiting); 6933 } 6934 6935 /* process completion of an indexed ("direct lookup") command */ 6936 static inline void process_indexed_cmd(struct ctlr_info *h, 6937 u32 raw_tag) 6938 { 6939 u32 tag_index; 6940 struct CommandList *c; 6941 6942 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6943 if (!bad_tag(h, tag_index, raw_tag)) { 6944 c = h->cmd_pool + tag_index; 6945 finish_cmd(c); 6946 } 6947 } 6948 6949 /* Some controllers, like p400, will give us one interrupt 6950 * after a soft reset, even if we turned interrupts off. 6951 * Only need to check for this in the hpsa_xxx_discard_completions 6952 * functions. 6953 */ 6954 static int ignore_bogus_interrupt(struct ctlr_info *h) 6955 { 6956 if (likely(!reset_devices)) 6957 return 0; 6958 6959 if (likely(h->interrupts_enabled)) 6960 return 0; 6961 6962 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6963 "(known firmware bug.) Ignoring.\n"); 6964 6965 return 1; 6966 } 6967 6968 /* 6969 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6970 * Relies on (h-q[x] == x) being true for x such that 6971 * 0 <= x < MAX_REPLY_QUEUES. 6972 */ 6973 static struct ctlr_info *queue_to_hba(u8 *queue) 6974 { 6975 return container_of((queue - *queue), struct ctlr_info, q[0]); 6976 } 6977 6978 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6979 { 6980 struct ctlr_info *h = queue_to_hba(queue); 6981 u8 q = *(u8 *) queue; 6982 u32 raw_tag; 6983 6984 if (ignore_bogus_interrupt(h)) 6985 return IRQ_NONE; 6986 6987 if (interrupt_not_for_us(h)) 6988 return IRQ_NONE; 6989 h->last_intr_timestamp = get_jiffies_64(); 6990 while (interrupt_pending(h)) { 6991 raw_tag = get_next_completion(h, q); 6992 while (raw_tag != FIFO_EMPTY) 6993 raw_tag = next_command(h, q); 6994 } 6995 return IRQ_HANDLED; 6996 } 6997 6998 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6999 { 7000 struct ctlr_info *h = queue_to_hba(queue); 7001 u32 raw_tag; 7002 u8 q = *(u8 *) queue; 7003 7004 if (ignore_bogus_interrupt(h)) 7005 return IRQ_NONE; 7006 7007 h->last_intr_timestamp = get_jiffies_64(); 7008 raw_tag = get_next_completion(h, q); 7009 while (raw_tag != FIFO_EMPTY) 7010 raw_tag = next_command(h, q); 7011 return IRQ_HANDLED; 7012 } 7013 7014 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7015 { 7016 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7017 u32 raw_tag; 7018 u8 q = *(u8 *) queue; 7019 7020 if (interrupt_not_for_us(h)) 7021 return IRQ_NONE; 7022 h->last_intr_timestamp = get_jiffies_64(); 7023 while (interrupt_pending(h)) { 7024 raw_tag = get_next_completion(h, q); 7025 while (raw_tag != FIFO_EMPTY) { 7026 process_indexed_cmd(h, raw_tag); 7027 raw_tag = next_command(h, q); 7028 } 7029 } 7030 return IRQ_HANDLED; 7031 } 7032 7033 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7034 { 7035 struct ctlr_info *h = queue_to_hba(queue); 7036 u32 raw_tag; 7037 u8 q = *(u8 *) queue; 7038 7039 h->last_intr_timestamp = get_jiffies_64(); 7040 raw_tag = get_next_completion(h, q); 7041 while (raw_tag != FIFO_EMPTY) { 7042 process_indexed_cmd(h, raw_tag); 7043 raw_tag = next_command(h, q); 7044 } 7045 return IRQ_HANDLED; 7046 } 7047 7048 /* Send a message CDB to the firmware. Careful, this only works 7049 * in simple mode, not performant mode due to the tag lookup. 7050 * We only ever use this immediately after a controller reset. 7051 */ 7052 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7053 unsigned char type) 7054 { 7055 struct Command { 7056 struct CommandListHeader CommandHeader; 7057 struct RequestBlock Request; 7058 struct ErrDescriptor ErrorDescriptor; 7059 }; 7060 struct Command *cmd; 7061 static const size_t cmd_sz = sizeof(*cmd) + 7062 sizeof(cmd->ErrorDescriptor); 7063 dma_addr_t paddr64; 7064 __le32 paddr32; 7065 u32 tag; 7066 void __iomem *vaddr; 7067 int i, err; 7068 7069 vaddr = pci_ioremap_bar(pdev, 0); 7070 if (vaddr == NULL) 7071 return -ENOMEM; 7072 7073 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7074 * CCISS commands, so they must be allocated from the lower 4GiB of 7075 * memory. 7076 */ 7077 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 7078 if (err) { 7079 iounmap(vaddr); 7080 return err; 7081 } 7082 7083 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 7084 if (cmd == NULL) { 7085 iounmap(vaddr); 7086 return -ENOMEM; 7087 } 7088 7089 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7090 * although there's no guarantee, we assume that the address is at 7091 * least 4-byte aligned (most likely, it's page-aligned). 7092 */ 7093 paddr32 = cpu_to_le32(paddr64); 7094 7095 cmd->CommandHeader.ReplyQueue = 0; 7096 cmd->CommandHeader.SGList = 0; 7097 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7098 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7099 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7100 7101 cmd->Request.CDBLen = 16; 7102 cmd->Request.type_attr_dir = 7103 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7104 cmd->Request.Timeout = 0; /* Don't time out */ 7105 cmd->Request.CDB[0] = opcode; 7106 cmd->Request.CDB[1] = type; 7107 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7108 cmd->ErrorDescriptor.Addr = 7109 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7110 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7111 7112 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7113 7114 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7115 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7116 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7117 break; 7118 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7119 } 7120 7121 iounmap(vaddr); 7122 7123 /* we leak the DMA buffer here ... no choice since the controller could 7124 * still complete the command. 7125 */ 7126 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7127 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7128 opcode, type); 7129 return -ETIMEDOUT; 7130 } 7131 7132 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7133 7134 if (tag & HPSA_ERROR_BIT) { 7135 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7136 opcode, type); 7137 return -EIO; 7138 } 7139 7140 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7141 opcode, type); 7142 return 0; 7143 } 7144 7145 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7146 7147 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7148 void __iomem *vaddr, u32 use_doorbell) 7149 { 7150 7151 if (use_doorbell) { 7152 /* For everything after the P600, the PCI power state method 7153 * of resetting the controller doesn't work, so we have this 7154 * other way using the doorbell register. 7155 */ 7156 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7157 writel(use_doorbell, vaddr + SA5_DOORBELL); 7158 7159 /* PMC hardware guys tell us we need a 10 second delay after 7160 * doorbell reset and before any attempt to talk to the board 7161 * at all to ensure that this actually works and doesn't fall 7162 * over in some weird corner cases. 7163 */ 7164 msleep(10000); 7165 } else { /* Try to do it the PCI power state way */ 7166 7167 /* Quoting from the Open CISS Specification: "The Power 7168 * Management Control/Status Register (CSR) controls the power 7169 * state of the device. The normal operating state is D0, 7170 * CSR=00h. The software off state is D3, CSR=03h. To reset 7171 * the controller, place the interface device in D3 then to D0, 7172 * this causes a secondary PCI reset which will reset the 7173 * controller." */ 7174 7175 int rc = 0; 7176 7177 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7178 7179 /* enter the D3hot power management state */ 7180 rc = pci_set_power_state(pdev, PCI_D3hot); 7181 if (rc) 7182 return rc; 7183 7184 msleep(500); 7185 7186 /* enter the D0 power management state */ 7187 rc = pci_set_power_state(pdev, PCI_D0); 7188 if (rc) 7189 return rc; 7190 7191 /* 7192 * The P600 requires a small delay when changing states. 7193 * Otherwise we may think the board did not reset and we bail. 7194 * This for kdump only and is particular to the P600. 7195 */ 7196 msleep(500); 7197 } 7198 return 0; 7199 } 7200 7201 static void init_driver_version(char *driver_version, int len) 7202 { 7203 memset(driver_version, 0, len); 7204 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7205 } 7206 7207 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7208 { 7209 char *driver_version; 7210 int i, size = sizeof(cfgtable->driver_version); 7211 7212 driver_version = kmalloc(size, GFP_KERNEL); 7213 if (!driver_version) 7214 return -ENOMEM; 7215 7216 init_driver_version(driver_version, size); 7217 for (i = 0; i < size; i++) 7218 writeb(driver_version[i], &cfgtable->driver_version[i]); 7219 kfree(driver_version); 7220 return 0; 7221 } 7222 7223 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7224 unsigned char *driver_ver) 7225 { 7226 int i; 7227 7228 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7229 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7230 } 7231 7232 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7233 { 7234 7235 char *driver_ver, *old_driver_ver; 7236 int rc, size = sizeof(cfgtable->driver_version); 7237 7238 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7239 if (!old_driver_ver) 7240 return -ENOMEM; 7241 driver_ver = old_driver_ver + size; 7242 7243 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7244 * should have been changed, otherwise we know the reset failed. 7245 */ 7246 init_driver_version(old_driver_ver, size); 7247 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7248 rc = !memcmp(driver_ver, old_driver_ver, size); 7249 kfree(old_driver_ver); 7250 return rc; 7251 } 7252 /* This does a hard reset of the controller using PCI power management 7253 * states or the using the doorbell register. 7254 */ 7255 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7256 { 7257 u64 cfg_offset; 7258 u32 cfg_base_addr; 7259 u64 cfg_base_addr_index; 7260 void __iomem *vaddr; 7261 unsigned long paddr; 7262 u32 misc_fw_support; 7263 int rc; 7264 struct CfgTable __iomem *cfgtable; 7265 u32 use_doorbell; 7266 u16 command_register; 7267 7268 /* For controllers as old as the P600, this is very nearly 7269 * the same thing as 7270 * 7271 * pci_save_state(pci_dev); 7272 * pci_set_power_state(pci_dev, PCI_D3hot); 7273 * pci_set_power_state(pci_dev, PCI_D0); 7274 * pci_restore_state(pci_dev); 7275 * 7276 * For controllers newer than the P600, the pci power state 7277 * method of resetting doesn't work so we have another way 7278 * using the doorbell register. 7279 */ 7280 7281 if (!ctlr_is_resettable(board_id)) { 7282 dev_warn(&pdev->dev, "Controller not resettable\n"); 7283 return -ENODEV; 7284 } 7285 7286 /* if controller is soft- but not hard resettable... */ 7287 if (!ctlr_is_hard_resettable(board_id)) 7288 return -ENOTSUPP; /* try soft reset later. */ 7289 7290 /* Save the PCI command register */ 7291 pci_read_config_word(pdev, 4, &command_register); 7292 pci_save_state(pdev); 7293 7294 /* find the first memory BAR, so we can find the cfg table */ 7295 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7296 if (rc) 7297 return rc; 7298 vaddr = remap_pci_mem(paddr, 0x250); 7299 if (!vaddr) 7300 return -ENOMEM; 7301 7302 /* find cfgtable in order to check if reset via doorbell is supported */ 7303 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7304 &cfg_base_addr_index, &cfg_offset); 7305 if (rc) 7306 goto unmap_vaddr; 7307 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7308 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7309 if (!cfgtable) { 7310 rc = -ENOMEM; 7311 goto unmap_vaddr; 7312 } 7313 rc = write_driver_ver_to_cfgtable(cfgtable); 7314 if (rc) 7315 goto unmap_cfgtable; 7316 7317 /* If reset via doorbell register is supported, use that. 7318 * There are two such methods. Favor the newest method. 7319 */ 7320 misc_fw_support = readl(&cfgtable->misc_fw_support); 7321 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7322 if (use_doorbell) { 7323 use_doorbell = DOORBELL_CTLR_RESET2; 7324 } else { 7325 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7326 if (use_doorbell) { 7327 dev_warn(&pdev->dev, 7328 "Soft reset not supported. Firmware update is required.\n"); 7329 rc = -ENOTSUPP; /* try soft reset */ 7330 goto unmap_cfgtable; 7331 } 7332 } 7333 7334 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7335 if (rc) 7336 goto unmap_cfgtable; 7337 7338 pci_restore_state(pdev); 7339 pci_write_config_word(pdev, 4, command_register); 7340 7341 /* Some devices (notably the HP Smart Array 5i Controller) 7342 need a little pause here */ 7343 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7344 7345 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7346 if (rc) { 7347 dev_warn(&pdev->dev, 7348 "Failed waiting for board to become ready after hard reset\n"); 7349 goto unmap_cfgtable; 7350 } 7351 7352 rc = controller_reset_failed(vaddr); 7353 if (rc < 0) 7354 goto unmap_cfgtable; 7355 if (rc) { 7356 dev_warn(&pdev->dev, "Unable to successfully reset " 7357 "controller. Will try soft reset.\n"); 7358 rc = -ENOTSUPP; 7359 } else { 7360 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7361 } 7362 7363 unmap_cfgtable: 7364 iounmap(cfgtable); 7365 7366 unmap_vaddr: 7367 iounmap(vaddr); 7368 return rc; 7369 } 7370 7371 /* 7372 * We cannot read the structure directly, for portability we must use 7373 * the io functions. 7374 * This is for debug only. 7375 */ 7376 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7377 { 7378 #ifdef HPSA_DEBUG 7379 int i; 7380 char temp_name[17]; 7381 7382 dev_info(dev, "Controller Configuration information\n"); 7383 dev_info(dev, "------------------------------------\n"); 7384 for (i = 0; i < 4; i++) 7385 temp_name[i] = readb(&(tb->Signature[i])); 7386 temp_name[4] = '\0'; 7387 dev_info(dev, " Signature = %s\n", temp_name); 7388 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7389 dev_info(dev, " Transport methods supported = 0x%x\n", 7390 readl(&(tb->TransportSupport))); 7391 dev_info(dev, " Transport methods active = 0x%x\n", 7392 readl(&(tb->TransportActive))); 7393 dev_info(dev, " Requested transport Method = 0x%x\n", 7394 readl(&(tb->HostWrite.TransportRequest))); 7395 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7396 readl(&(tb->HostWrite.CoalIntDelay))); 7397 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7398 readl(&(tb->HostWrite.CoalIntCount))); 7399 dev_info(dev, " Max outstanding commands = %d\n", 7400 readl(&(tb->CmdsOutMax))); 7401 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7402 for (i = 0; i < 16; i++) 7403 temp_name[i] = readb(&(tb->ServerName[i])); 7404 temp_name[16] = '\0'; 7405 dev_info(dev, " Server Name = %s\n", temp_name); 7406 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7407 readl(&(tb->HeartBeat))); 7408 #endif /* HPSA_DEBUG */ 7409 } 7410 7411 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7412 { 7413 int i, offset, mem_type, bar_type; 7414 7415 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7416 return 0; 7417 offset = 0; 7418 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7419 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7420 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7421 offset += 4; 7422 else { 7423 mem_type = pci_resource_flags(pdev, i) & 7424 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7425 switch (mem_type) { 7426 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7427 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7428 offset += 4; /* 32 bit */ 7429 break; 7430 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7431 offset += 8; 7432 break; 7433 default: /* reserved in PCI 2.2 */ 7434 dev_warn(&pdev->dev, 7435 "base address is invalid\n"); 7436 return -1; 7437 } 7438 } 7439 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7440 return i + 1; 7441 } 7442 return -1; 7443 } 7444 7445 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7446 { 7447 pci_free_irq_vectors(h->pdev); 7448 h->msix_vectors = 0; 7449 } 7450 7451 static void hpsa_setup_reply_map(struct ctlr_info *h) 7452 { 7453 const struct cpumask *mask; 7454 unsigned int queue, cpu; 7455 7456 for (queue = 0; queue < h->msix_vectors; queue++) { 7457 mask = pci_irq_get_affinity(h->pdev, queue); 7458 if (!mask) 7459 goto fallback; 7460 7461 for_each_cpu(cpu, mask) 7462 h->reply_map[cpu] = queue; 7463 } 7464 return; 7465 7466 fallback: 7467 for_each_possible_cpu(cpu) 7468 h->reply_map[cpu] = 0; 7469 } 7470 7471 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7472 * controllers that are capable. If not, we use legacy INTx mode. 7473 */ 7474 static int hpsa_interrupt_mode(struct ctlr_info *h) 7475 { 7476 unsigned int flags = PCI_IRQ_LEGACY; 7477 int ret; 7478 7479 /* Some boards advertise MSI but don't really support it */ 7480 switch (h->board_id) { 7481 case 0x40700E11: 7482 case 0x40800E11: 7483 case 0x40820E11: 7484 case 0x40830E11: 7485 break; 7486 default: 7487 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7488 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7489 if (ret > 0) { 7490 h->msix_vectors = ret; 7491 return 0; 7492 } 7493 7494 flags |= PCI_IRQ_MSI; 7495 break; 7496 } 7497 7498 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7499 if (ret < 0) 7500 return ret; 7501 return 0; 7502 } 7503 7504 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7505 bool *legacy_board) 7506 { 7507 int i; 7508 u32 subsystem_vendor_id, subsystem_device_id; 7509 7510 subsystem_vendor_id = pdev->subsystem_vendor; 7511 subsystem_device_id = pdev->subsystem_device; 7512 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7513 subsystem_vendor_id; 7514 7515 if (legacy_board) 7516 *legacy_board = false; 7517 for (i = 0; i < ARRAY_SIZE(products); i++) 7518 if (*board_id == products[i].board_id) { 7519 if (products[i].access != &SA5A_access && 7520 products[i].access != &SA5B_access) 7521 return i; 7522 dev_warn(&pdev->dev, 7523 "legacy board ID: 0x%08x\n", 7524 *board_id); 7525 if (legacy_board) 7526 *legacy_board = true; 7527 return i; 7528 } 7529 7530 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7531 if (legacy_board) 7532 *legacy_board = true; 7533 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7534 } 7535 7536 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7537 unsigned long *memory_bar) 7538 { 7539 int i; 7540 7541 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7542 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7543 /* addressing mode bits already removed */ 7544 *memory_bar = pci_resource_start(pdev, i); 7545 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7546 *memory_bar); 7547 return 0; 7548 } 7549 dev_warn(&pdev->dev, "no memory BAR found\n"); 7550 return -ENODEV; 7551 } 7552 7553 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7554 int wait_for_ready) 7555 { 7556 int i, iterations; 7557 u32 scratchpad; 7558 if (wait_for_ready) 7559 iterations = HPSA_BOARD_READY_ITERATIONS; 7560 else 7561 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7562 7563 for (i = 0; i < iterations; i++) { 7564 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7565 if (wait_for_ready) { 7566 if (scratchpad == HPSA_FIRMWARE_READY) 7567 return 0; 7568 } else { 7569 if (scratchpad != HPSA_FIRMWARE_READY) 7570 return 0; 7571 } 7572 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7573 } 7574 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7575 return -ENODEV; 7576 } 7577 7578 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7579 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7580 u64 *cfg_offset) 7581 { 7582 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7583 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7584 *cfg_base_addr &= (u32) 0x0000ffff; 7585 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7586 if (*cfg_base_addr_index == -1) { 7587 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7588 return -ENODEV; 7589 } 7590 return 0; 7591 } 7592 7593 static void hpsa_free_cfgtables(struct ctlr_info *h) 7594 { 7595 if (h->transtable) { 7596 iounmap(h->transtable); 7597 h->transtable = NULL; 7598 } 7599 if (h->cfgtable) { 7600 iounmap(h->cfgtable); 7601 h->cfgtable = NULL; 7602 } 7603 } 7604 7605 /* Find and map CISS config table and transfer table 7606 + * several items must be unmapped (freed) later 7607 + * */ 7608 static int hpsa_find_cfgtables(struct ctlr_info *h) 7609 { 7610 u64 cfg_offset; 7611 u32 cfg_base_addr; 7612 u64 cfg_base_addr_index; 7613 u32 trans_offset; 7614 int rc; 7615 7616 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7617 &cfg_base_addr_index, &cfg_offset); 7618 if (rc) 7619 return rc; 7620 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7621 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7622 if (!h->cfgtable) { 7623 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7624 return -ENOMEM; 7625 } 7626 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7627 if (rc) 7628 return rc; 7629 /* Find performant mode table. */ 7630 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7631 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7632 cfg_base_addr_index)+cfg_offset+trans_offset, 7633 sizeof(*h->transtable)); 7634 if (!h->transtable) { 7635 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7636 hpsa_free_cfgtables(h); 7637 return -ENOMEM; 7638 } 7639 return 0; 7640 } 7641 7642 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7643 { 7644 #define MIN_MAX_COMMANDS 16 7645 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7646 7647 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7648 7649 /* Limit commands in memory limited kdump scenario. */ 7650 if (reset_devices && h->max_commands > 32) 7651 h->max_commands = 32; 7652 7653 if (h->max_commands < MIN_MAX_COMMANDS) { 7654 dev_warn(&h->pdev->dev, 7655 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7656 h->max_commands, 7657 MIN_MAX_COMMANDS); 7658 h->max_commands = MIN_MAX_COMMANDS; 7659 } 7660 } 7661 7662 /* If the controller reports that the total max sg entries is greater than 512, 7663 * then we know that chained SG blocks work. (Original smart arrays did not 7664 * support chained SG blocks and would return zero for max sg entries.) 7665 */ 7666 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7667 { 7668 return h->maxsgentries > 512; 7669 } 7670 7671 /* Interrogate the hardware for some limits: 7672 * max commands, max SG elements without chaining, and with chaining, 7673 * SG chain block size, etc. 7674 */ 7675 static void hpsa_find_board_params(struct ctlr_info *h) 7676 { 7677 hpsa_get_max_perf_mode_cmds(h); 7678 h->nr_cmds = h->max_commands; 7679 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7680 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7681 if (hpsa_supports_chained_sg_blocks(h)) { 7682 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7683 h->max_cmd_sg_entries = 32; 7684 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7685 h->maxsgentries--; /* save one for chain pointer */ 7686 } else { 7687 /* 7688 * Original smart arrays supported at most 31 s/g entries 7689 * embedded inline in the command (trying to use more 7690 * would lock up the controller) 7691 */ 7692 h->max_cmd_sg_entries = 31; 7693 h->maxsgentries = 31; /* default to traditional values */ 7694 h->chainsize = 0; 7695 } 7696 7697 /* Find out what task management functions are supported and cache */ 7698 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7699 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7700 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7701 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7702 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7703 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7704 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7705 } 7706 7707 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7708 { 7709 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7710 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7711 return false; 7712 } 7713 return true; 7714 } 7715 7716 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7717 { 7718 u32 driver_support; 7719 7720 driver_support = readl(&(h->cfgtable->driver_support)); 7721 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7722 #ifdef CONFIG_X86 7723 driver_support |= ENABLE_SCSI_PREFETCH; 7724 #endif 7725 driver_support |= ENABLE_UNIT_ATTN; 7726 writel(driver_support, &(h->cfgtable->driver_support)); 7727 } 7728 7729 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7730 * in a prefetch beyond physical memory. 7731 */ 7732 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7733 { 7734 u32 dma_prefetch; 7735 7736 if (h->board_id != 0x3225103C) 7737 return; 7738 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7739 dma_prefetch |= 0x8000; 7740 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7741 } 7742 7743 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7744 { 7745 int i; 7746 u32 doorbell_value; 7747 unsigned long flags; 7748 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7749 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7750 spin_lock_irqsave(&h->lock, flags); 7751 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7752 spin_unlock_irqrestore(&h->lock, flags); 7753 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7754 goto done; 7755 /* delay and try again */ 7756 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7757 } 7758 return -ENODEV; 7759 done: 7760 return 0; 7761 } 7762 7763 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7764 { 7765 int i; 7766 u32 doorbell_value; 7767 unsigned long flags; 7768 7769 /* under certain very rare conditions, this can take awhile. 7770 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7771 * as we enter this code.) 7772 */ 7773 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7774 if (h->remove_in_progress) 7775 goto done; 7776 spin_lock_irqsave(&h->lock, flags); 7777 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7778 spin_unlock_irqrestore(&h->lock, flags); 7779 if (!(doorbell_value & CFGTBL_ChangeReq)) 7780 goto done; 7781 /* delay and try again */ 7782 msleep(MODE_CHANGE_WAIT_INTERVAL); 7783 } 7784 return -ENODEV; 7785 done: 7786 return 0; 7787 } 7788 7789 /* return -ENODEV or other reason on error, 0 on success */ 7790 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7791 { 7792 u32 trans_support; 7793 7794 trans_support = readl(&(h->cfgtable->TransportSupport)); 7795 if (!(trans_support & SIMPLE_MODE)) 7796 return -ENOTSUPP; 7797 7798 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7799 7800 /* Update the field, and then ring the doorbell */ 7801 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7802 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7803 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7804 if (hpsa_wait_for_mode_change_ack(h)) 7805 goto error; 7806 print_cfg_table(&h->pdev->dev, h->cfgtable); 7807 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7808 goto error; 7809 h->transMethod = CFGTBL_Trans_Simple; 7810 return 0; 7811 error: 7812 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7813 return -ENODEV; 7814 } 7815 7816 /* free items allocated or mapped by hpsa_pci_init */ 7817 static void hpsa_free_pci_init(struct ctlr_info *h) 7818 { 7819 hpsa_free_cfgtables(h); /* pci_init 4 */ 7820 iounmap(h->vaddr); /* pci_init 3 */ 7821 h->vaddr = NULL; 7822 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7823 /* 7824 * call pci_disable_device before pci_release_regions per 7825 * Documentation/driver-api/pci/pci.rst 7826 */ 7827 pci_disable_device(h->pdev); /* pci_init 1 */ 7828 pci_release_regions(h->pdev); /* pci_init 2 */ 7829 } 7830 7831 /* several items must be freed later */ 7832 static int hpsa_pci_init(struct ctlr_info *h) 7833 { 7834 int prod_index, err; 7835 bool legacy_board; 7836 7837 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7838 if (prod_index < 0) 7839 return prod_index; 7840 h->product_name = products[prod_index].product_name; 7841 h->access = *(products[prod_index].access); 7842 h->legacy_board = legacy_board; 7843 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7844 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7845 7846 err = pci_enable_device(h->pdev); 7847 if (err) { 7848 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7849 pci_disable_device(h->pdev); 7850 return err; 7851 } 7852 7853 err = pci_request_regions(h->pdev, HPSA); 7854 if (err) { 7855 dev_err(&h->pdev->dev, 7856 "failed to obtain PCI resources\n"); 7857 pci_disable_device(h->pdev); 7858 return err; 7859 } 7860 7861 pci_set_master(h->pdev); 7862 7863 err = hpsa_interrupt_mode(h); 7864 if (err) 7865 goto clean1; 7866 7867 /* setup mapping between CPU and reply queue */ 7868 hpsa_setup_reply_map(h); 7869 7870 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7871 if (err) 7872 goto clean2; /* intmode+region, pci */ 7873 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7874 if (!h->vaddr) { 7875 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7876 err = -ENOMEM; 7877 goto clean2; /* intmode+region, pci */ 7878 } 7879 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7880 if (err) 7881 goto clean3; /* vaddr, intmode+region, pci */ 7882 err = hpsa_find_cfgtables(h); 7883 if (err) 7884 goto clean3; /* vaddr, intmode+region, pci */ 7885 hpsa_find_board_params(h); 7886 7887 if (!hpsa_CISS_signature_present(h)) { 7888 err = -ENODEV; 7889 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7890 } 7891 hpsa_set_driver_support_bits(h); 7892 hpsa_p600_dma_prefetch_quirk(h); 7893 err = hpsa_enter_simple_mode(h); 7894 if (err) 7895 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7896 return 0; 7897 7898 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7899 hpsa_free_cfgtables(h); 7900 clean3: /* vaddr, intmode+region, pci */ 7901 iounmap(h->vaddr); 7902 h->vaddr = NULL; 7903 clean2: /* intmode+region, pci */ 7904 hpsa_disable_interrupt_mode(h); 7905 clean1: 7906 /* 7907 * call pci_disable_device before pci_release_regions per 7908 * Documentation/driver-api/pci/pci.rst 7909 */ 7910 pci_disable_device(h->pdev); 7911 pci_release_regions(h->pdev); 7912 return err; 7913 } 7914 7915 static void hpsa_hba_inquiry(struct ctlr_info *h) 7916 { 7917 int rc; 7918 7919 #define HBA_INQUIRY_BYTE_COUNT 64 7920 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7921 if (!h->hba_inquiry_data) 7922 return; 7923 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7924 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7925 if (rc != 0) { 7926 kfree(h->hba_inquiry_data); 7927 h->hba_inquiry_data = NULL; 7928 } 7929 } 7930 7931 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7932 { 7933 int rc, i; 7934 void __iomem *vaddr; 7935 7936 if (!reset_devices) 7937 return 0; 7938 7939 /* kdump kernel is loading, we don't know in which state is 7940 * the pci interface. The dev->enable_cnt is equal zero 7941 * so we call enable+disable, wait a while and switch it on. 7942 */ 7943 rc = pci_enable_device(pdev); 7944 if (rc) { 7945 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7946 return -ENODEV; 7947 } 7948 pci_disable_device(pdev); 7949 msleep(260); /* a randomly chosen number */ 7950 rc = pci_enable_device(pdev); 7951 if (rc) { 7952 dev_warn(&pdev->dev, "failed to enable device.\n"); 7953 return -ENODEV; 7954 } 7955 7956 pci_set_master(pdev); 7957 7958 vaddr = pci_ioremap_bar(pdev, 0); 7959 if (vaddr == NULL) { 7960 rc = -ENOMEM; 7961 goto out_disable; 7962 } 7963 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7964 iounmap(vaddr); 7965 7966 /* Reset the controller with a PCI power-cycle or via doorbell */ 7967 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7968 7969 /* -ENOTSUPP here means we cannot reset the controller 7970 * but it's already (and still) up and running in 7971 * "performant mode". Or, it might be 640x, which can't reset 7972 * due to concerns about shared bbwc between 6402/6404 pair. 7973 */ 7974 if (rc) 7975 goto out_disable; 7976 7977 /* Now try to get the controller to respond to a no-op */ 7978 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7979 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7980 if (hpsa_noop(pdev) == 0) 7981 break; 7982 else 7983 dev_warn(&pdev->dev, "no-op failed%s\n", 7984 (i < 11 ? "; re-trying" : "")); 7985 } 7986 7987 out_disable: 7988 7989 pci_disable_device(pdev); 7990 return rc; 7991 } 7992 7993 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7994 { 7995 kfree(h->cmd_pool_bits); 7996 h->cmd_pool_bits = NULL; 7997 if (h->cmd_pool) { 7998 dma_free_coherent(&h->pdev->dev, 7999 h->nr_cmds * sizeof(struct CommandList), 8000 h->cmd_pool, 8001 h->cmd_pool_dhandle); 8002 h->cmd_pool = NULL; 8003 h->cmd_pool_dhandle = 0; 8004 } 8005 if (h->errinfo_pool) { 8006 dma_free_coherent(&h->pdev->dev, 8007 h->nr_cmds * sizeof(struct ErrorInfo), 8008 h->errinfo_pool, 8009 h->errinfo_pool_dhandle); 8010 h->errinfo_pool = NULL; 8011 h->errinfo_pool_dhandle = 0; 8012 } 8013 } 8014 8015 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8016 { 8017 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG), 8018 sizeof(unsigned long), 8019 GFP_KERNEL); 8020 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 8021 h->nr_cmds * sizeof(*h->cmd_pool), 8022 &h->cmd_pool_dhandle, GFP_KERNEL); 8023 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 8024 h->nr_cmds * sizeof(*h->errinfo_pool), 8025 &h->errinfo_pool_dhandle, GFP_KERNEL); 8026 if ((h->cmd_pool_bits == NULL) 8027 || (h->cmd_pool == NULL) 8028 || (h->errinfo_pool == NULL)) { 8029 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8030 goto clean_up; 8031 } 8032 hpsa_preinitialize_commands(h); 8033 return 0; 8034 clean_up: 8035 hpsa_free_cmd_pool(h); 8036 return -ENOMEM; 8037 } 8038 8039 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8040 static void hpsa_free_irqs(struct ctlr_info *h) 8041 { 8042 int i; 8043 int irq_vector = 0; 8044 8045 if (hpsa_simple_mode) 8046 irq_vector = h->intr_mode; 8047 8048 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8049 /* Single reply queue, only one irq to free */ 8050 free_irq(pci_irq_vector(h->pdev, irq_vector), 8051 &h->q[h->intr_mode]); 8052 h->q[h->intr_mode] = 0; 8053 return; 8054 } 8055 8056 for (i = 0; i < h->msix_vectors; i++) { 8057 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8058 h->q[i] = 0; 8059 } 8060 for (; i < MAX_REPLY_QUEUES; i++) 8061 h->q[i] = 0; 8062 } 8063 8064 /* returns 0 on success; cleans up and returns -Enn on error */ 8065 static int hpsa_request_irqs(struct ctlr_info *h, 8066 irqreturn_t (*msixhandler)(int, void *), 8067 irqreturn_t (*intxhandler)(int, void *)) 8068 { 8069 int rc, i; 8070 int irq_vector = 0; 8071 8072 if (hpsa_simple_mode) 8073 irq_vector = h->intr_mode; 8074 8075 /* 8076 * initialize h->q[x] = x so that interrupt handlers know which 8077 * queue to process. 8078 */ 8079 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8080 h->q[i] = (u8) i; 8081 8082 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8083 /* If performant mode and MSI-X, use multiple reply queues */ 8084 for (i = 0; i < h->msix_vectors; i++) { 8085 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8086 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8087 0, h->intrname[i], 8088 &h->q[i]); 8089 if (rc) { 8090 int j; 8091 8092 dev_err(&h->pdev->dev, 8093 "failed to get irq %d for %s\n", 8094 pci_irq_vector(h->pdev, i), h->devname); 8095 for (j = 0; j < i; j++) { 8096 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8097 h->q[j] = 0; 8098 } 8099 for (; j < MAX_REPLY_QUEUES; j++) 8100 h->q[j] = 0; 8101 return rc; 8102 } 8103 } 8104 } else { 8105 /* Use single reply pool */ 8106 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8107 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8108 h->msix_vectors ? "x" : ""); 8109 rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 8110 msixhandler, 0, 8111 h->intrname[0], 8112 &h->q[h->intr_mode]); 8113 } else { 8114 sprintf(h->intrname[h->intr_mode], 8115 "%s-intx", h->devname); 8116 rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 8117 intxhandler, IRQF_SHARED, 8118 h->intrname[0], 8119 &h->q[h->intr_mode]); 8120 } 8121 } 8122 if (rc) { 8123 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8124 pci_irq_vector(h->pdev, irq_vector), h->devname); 8125 hpsa_free_irqs(h); 8126 return -ENODEV; 8127 } 8128 return 0; 8129 } 8130 8131 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8132 { 8133 int rc; 8134 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER); 8135 8136 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8137 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8138 if (rc) { 8139 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8140 return rc; 8141 } 8142 8143 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8144 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8145 if (rc) { 8146 dev_warn(&h->pdev->dev, "Board failed to become ready " 8147 "after soft reset.\n"); 8148 return rc; 8149 } 8150 8151 return 0; 8152 } 8153 8154 static void hpsa_free_reply_queues(struct ctlr_info *h) 8155 { 8156 int i; 8157 8158 for (i = 0; i < h->nreply_queues; i++) { 8159 if (!h->reply_queue[i].head) 8160 continue; 8161 dma_free_coherent(&h->pdev->dev, 8162 h->reply_queue_size, 8163 h->reply_queue[i].head, 8164 h->reply_queue[i].busaddr); 8165 h->reply_queue[i].head = NULL; 8166 h->reply_queue[i].busaddr = 0; 8167 } 8168 h->reply_queue_size = 0; 8169 } 8170 8171 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8172 { 8173 hpsa_free_performant_mode(h); /* init_one 7 */ 8174 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8175 hpsa_free_cmd_pool(h); /* init_one 5 */ 8176 hpsa_free_irqs(h); /* init_one 4 */ 8177 scsi_host_put(h->scsi_host); /* init_one 3 */ 8178 h->scsi_host = NULL; /* init_one 3 */ 8179 hpsa_free_pci_init(h); /* init_one 2_5 */ 8180 free_percpu(h->lockup_detected); /* init_one 2 */ 8181 h->lockup_detected = NULL; /* init_one 2 */ 8182 if (h->resubmit_wq) { 8183 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8184 h->resubmit_wq = NULL; 8185 } 8186 if (h->rescan_ctlr_wq) { 8187 destroy_workqueue(h->rescan_ctlr_wq); 8188 h->rescan_ctlr_wq = NULL; 8189 } 8190 if (h->monitor_ctlr_wq) { 8191 destroy_workqueue(h->monitor_ctlr_wq); 8192 h->monitor_ctlr_wq = NULL; 8193 } 8194 8195 kfree(h); /* init_one 1 */ 8196 } 8197 8198 /* Called when controller lockup detected. */ 8199 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8200 { 8201 int i, refcount; 8202 struct CommandList *c; 8203 int failcount = 0; 8204 8205 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8206 for (i = 0; i < h->nr_cmds; i++) { 8207 c = h->cmd_pool + i; 8208 refcount = atomic_inc_return(&c->refcount); 8209 if (refcount > 1) { 8210 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8211 finish_cmd(c); 8212 atomic_dec(&h->commands_outstanding); 8213 failcount++; 8214 } 8215 cmd_free(h, c); 8216 } 8217 dev_warn(&h->pdev->dev, 8218 "failed %d commands in fail_all\n", failcount); 8219 } 8220 8221 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8222 { 8223 int cpu; 8224 8225 for_each_online_cpu(cpu) { 8226 u32 *lockup_detected; 8227 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8228 *lockup_detected = value; 8229 } 8230 wmb(); /* be sure the per-cpu variables are out to memory */ 8231 } 8232 8233 static void controller_lockup_detected(struct ctlr_info *h) 8234 { 8235 unsigned long flags; 8236 u32 lockup_detected; 8237 8238 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8239 spin_lock_irqsave(&h->lock, flags); 8240 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8241 if (!lockup_detected) { 8242 /* no heartbeat, but controller gave us a zero. */ 8243 dev_warn(&h->pdev->dev, 8244 "lockup detected after %d but scratchpad register is zero\n", 8245 h->heartbeat_sample_interval / HZ); 8246 lockup_detected = 0xffffffff; 8247 } 8248 set_lockup_detected_for_all_cpus(h, lockup_detected); 8249 spin_unlock_irqrestore(&h->lock, flags); 8250 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8251 lockup_detected, h->heartbeat_sample_interval / HZ); 8252 if (lockup_detected == 0xffff0000) { 8253 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8254 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8255 } 8256 pci_disable_device(h->pdev); 8257 fail_all_outstanding_cmds(h); 8258 } 8259 8260 static int detect_controller_lockup(struct ctlr_info *h) 8261 { 8262 u64 now; 8263 u32 heartbeat; 8264 unsigned long flags; 8265 8266 now = get_jiffies_64(); 8267 /* If we've received an interrupt recently, we're ok. */ 8268 if (time_after64(h->last_intr_timestamp + 8269 (h->heartbeat_sample_interval), now)) 8270 return false; 8271 8272 /* 8273 * If we've already checked the heartbeat recently, we're ok. 8274 * This could happen if someone sends us a signal. We 8275 * otherwise don't care about signals in this thread. 8276 */ 8277 if (time_after64(h->last_heartbeat_timestamp + 8278 (h->heartbeat_sample_interval), now)) 8279 return false; 8280 8281 /* If heartbeat has not changed since we last looked, we're not ok. */ 8282 spin_lock_irqsave(&h->lock, flags); 8283 heartbeat = readl(&h->cfgtable->HeartBeat); 8284 spin_unlock_irqrestore(&h->lock, flags); 8285 if (h->last_heartbeat == heartbeat) { 8286 controller_lockup_detected(h); 8287 return true; 8288 } 8289 8290 /* We're ok. */ 8291 h->last_heartbeat = heartbeat; 8292 h->last_heartbeat_timestamp = now; 8293 return false; 8294 } 8295 8296 /* 8297 * Set ioaccel status for all ioaccel volumes. 8298 * 8299 * Called from monitor controller worker (hpsa_event_monitor_worker) 8300 * 8301 * A Volume (or Volumes that comprise an Array set) may be undergoing a 8302 * transformation, so we will be turning off ioaccel for all volumes that 8303 * make up the Array. 8304 */ 8305 static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8306 { 8307 int rc; 8308 int i; 8309 u8 ioaccel_status; 8310 unsigned char *buf; 8311 struct hpsa_scsi_dev_t *device; 8312 8313 if (!h) 8314 return; 8315 8316 buf = kmalloc(64, GFP_KERNEL); 8317 if (!buf) 8318 return; 8319 8320 /* 8321 * Run through current device list used during I/O requests. 8322 */ 8323 for (i = 0; i < h->ndevices; i++) { 8324 int offload_to_be_enabled = 0; 8325 int offload_config = 0; 8326 8327 device = h->dev[i]; 8328 8329 if (!device) 8330 continue; 8331 if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8332 HPSA_VPD_LV_IOACCEL_STATUS)) 8333 continue; 8334 8335 memset(buf, 0, 64); 8336 8337 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8338 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8339 buf, 64); 8340 if (rc != 0) 8341 continue; 8342 8343 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8344 8345 /* 8346 * Check if offload is still configured on 8347 */ 8348 offload_config = 8349 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8350 /* 8351 * If offload is configured on, check to see if ioaccel 8352 * needs to be enabled. 8353 */ 8354 if (offload_config) 8355 offload_to_be_enabled = 8356 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8357 8358 /* 8359 * If ioaccel is to be re-enabled, re-enable later during the 8360 * scan operation so the driver can get a fresh raidmap 8361 * before turning ioaccel back on. 8362 */ 8363 if (offload_to_be_enabled) 8364 continue; 8365 8366 /* 8367 * Immediately turn off ioaccel for any volume the 8368 * controller tells us to. Some of the reasons could be: 8369 * transformation - change to the LVs of an Array. 8370 * degraded volume - component failure 8371 */ 8372 hpsa_turn_off_ioaccel_for_device(device); 8373 } 8374 8375 kfree(buf); 8376 } 8377 8378 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8379 { 8380 char *event_type; 8381 8382 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8383 return; 8384 8385 /* Ask the controller to clear the events we're handling. */ 8386 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8387 | CFGTBL_Trans_io_accel2)) && 8388 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8389 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8390 8391 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8392 event_type = "state change"; 8393 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8394 event_type = "configuration change"; 8395 /* Stop sending new RAID offload reqs via the IO accelerator */ 8396 scsi_block_requests(h->scsi_host); 8397 hpsa_set_ioaccel_status(h); 8398 hpsa_drain_accel_commands(h); 8399 /* Set 'accelerator path config change' bit */ 8400 dev_warn(&h->pdev->dev, 8401 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8402 h->events, event_type); 8403 writel(h->events, &(h->cfgtable->clear_event_notify)); 8404 /* Set the "clear event notify field update" bit 6 */ 8405 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8406 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8407 hpsa_wait_for_clear_event_notify_ack(h); 8408 scsi_unblock_requests(h->scsi_host); 8409 } else { 8410 /* Acknowledge controller notification events. */ 8411 writel(h->events, &(h->cfgtable->clear_event_notify)); 8412 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8413 hpsa_wait_for_clear_event_notify_ack(h); 8414 } 8415 return; 8416 } 8417 8418 /* Check a register on the controller to see if there are configuration 8419 * changes (added/changed/removed logical drives, etc.) which mean that 8420 * we should rescan the controller for devices. 8421 * Also check flag for driver-initiated rescan. 8422 */ 8423 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8424 { 8425 if (h->drv_req_rescan) { 8426 h->drv_req_rescan = 0; 8427 return 1; 8428 } 8429 8430 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8431 return 0; 8432 8433 h->events = readl(&(h->cfgtable->event_notify)); 8434 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8435 } 8436 8437 /* 8438 * Check if any of the offline devices have become ready 8439 */ 8440 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8441 { 8442 unsigned long flags; 8443 struct offline_device_entry *d; 8444 struct list_head *this, *tmp; 8445 8446 spin_lock_irqsave(&h->offline_device_lock, flags); 8447 list_for_each_safe(this, tmp, &h->offline_device_list) { 8448 d = list_entry(this, struct offline_device_entry, 8449 offline_list); 8450 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8451 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8452 spin_lock_irqsave(&h->offline_device_lock, flags); 8453 list_del(&d->offline_list); 8454 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8455 return 1; 8456 } 8457 spin_lock_irqsave(&h->offline_device_lock, flags); 8458 } 8459 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8460 return 0; 8461 } 8462 8463 static int hpsa_luns_changed(struct ctlr_info *h) 8464 { 8465 int rc = 1; /* assume there are changes */ 8466 struct ReportLUNdata *logdev = NULL; 8467 8468 /* if we can't find out if lun data has changed, 8469 * assume that it has. 8470 */ 8471 8472 if (!h->lastlogicals) 8473 return rc; 8474 8475 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8476 if (!logdev) 8477 return rc; 8478 8479 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8480 dev_warn(&h->pdev->dev, 8481 "report luns failed, can't track lun changes.\n"); 8482 goto out; 8483 } 8484 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8485 dev_info(&h->pdev->dev, 8486 "Lun changes detected.\n"); 8487 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8488 goto out; 8489 } else 8490 rc = 0; /* no changes detected. */ 8491 out: 8492 kfree(logdev); 8493 return rc; 8494 } 8495 8496 static void hpsa_perform_rescan(struct ctlr_info *h) 8497 { 8498 struct Scsi_Host *sh = NULL; 8499 unsigned long flags; 8500 8501 /* 8502 * Do the scan after the reset 8503 */ 8504 spin_lock_irqsave(&h->reset_lock, flags); 8505 if (h->reset_in_progress) { 8506 h->drv_req_rescan = 1; 8507 spin_unlock_irqrestore(&h->reset_lock, flags); 8508 return; 8509 } 8510 spin_unlock_irqrestore(&h->reset_lock, flags); 8511 8512 sh = scsi_host_get(h->scsi_host); 8513 if (sh != NULL) { 8514 hpsa_scan_start(sh); 8515 scsi_host_put(sh); 8516 h->drv_req_rescan = 0; 8517 } 8518 } 8519 8520 /* 8521 * watch for controller events 8522 */ 8523 static void hpsa_event_monitor_worker(struct work_struct *work) 8524 { 8525 struct ctlr_info *h = container_of(to_delayed_work(work), 8526 struct ctlr_info, event_monitor_work); 8527 unsigned long flags; 8528 8529 spin_lock_irqsave(&h->lock, flags); 8530 if (h->remove_in_progress) { 8531 spin_unlock_irqrestore(&h->lock, flags); 8532 return; 8533 } 8534 spin_unlock_irqrestore(&h->lock, flags); 8535 8536 if (hpsa_ctlr_needs_rescan(h)) { 8537 hpsa_ack_ctlr_events(h); 8538 hpsa_perform_rescan(h); 8539 } 8540 8541 spin_lock_irqsave(&h->lock, flags); 8542 if (!h->remove_in_progress) 8543 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work, 8544 HPSA_EVENT_MONITOR_INTERVAL); 8545 spin_unlock_irqrestore(&h->lock, flags); 8546 } 8547 8548 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8549 { 8550 unsigned long flags; 8551 struct ctlr_info *h = container_of(to_delayed_work(work), 8552 struct ctlr_info, rescan_ctlr_work); 8553 8554 spin_lock_irqsave(&h->lock, flags); 8555 if (h->remove_in_progress) { 8556 spin_unlock_irqrestore(&h->lock, flags); 8557 return; 8558 } 8559 spin_unlock_irqrestore(&h->lock, flags); 8560 8561 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8562 hpsa_perform_rescan(h); 8563 } else if (h->discovery_polling) { 8564 if (hpsa_luns_changed(h)) { 8565 dev_info(&h->pdev->dev, 8566 "driver discovery polling rescan.\n"); 8567 hpsa_perform_rescan(h); 8568 } 8569 } 8570 spin_lock_irqsave(&h->lock, flags); 8571 if (!h->remove_in_progress) 8572 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8573 h->heartbeat_sample_interval); 8574 spin_unlock_irqrestore(&h->lock, flags); 8575 } 8576 8577 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8578 { 8579 unsigned long flags; 8580 struct ctlr_info *h = container_of(to_delayed_work(work), 8581 struct ctlr_info, monitor_ctlr_work); 8582 8583 detect_controller_lockup(h); 8584 if (lockup_detected(h)) 8585 return; 8586 8587 spin_lock_irqsave(&h->lock, flags); 8588 if (!h->remove_in_progress) 8589 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work, 8590 h->heartbeat_sample_interval); 8591 spin_unlock_irqrestore(&h->lock, flags); 8592 } 8593 8594 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8595 char *name) 8596 { 8597 struct workqueue_struct *wq = NULL; 8598 8599 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8600 if (!wq) 8601 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8602 8603 return wq; 8604 } 8605 8606 static void hpda_free_ctlr_info(struct ctlr_info *h) 8607 { 8608 kfree(h->reply_map); 8609 kfree(h); 8610 } 8611 8612 static struct ctlr_info *hpda_alloc_ctlr_info(void) 8613 { 8614 struct ctlr_info *h; 8615 8616 h = kzalloc(sizeof(*h), GFP_KERNEL); 8617 if (!h) 8618 return NULL; 8619 8620 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 8621 if (!h->reply_map) { 8622 kfree(h); 8623 return NULL; 8624 } 8625 return h; 8626 } 8627 8628 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8629 { 8630 int rc; 8631 struct ctlr_info *h; 8632 int try_soft_reset = 0; 8633 unsigned long flags; 8634 u32 board_id; 8635 8636 if (number_of_controllers == 0) 8637 printk(KERN_INFO DRIVER_NAME "\n"); 8638 8639 rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 8640 if (rc < 0) { 8641 dev_warn(&pdev->dev, "Board ID not found\n"); 8642 return rc; 8643 } 8644 8645 rc = hpsa_init_reset_devices(pdev, board_id); 8646 if (rc) { 8647 if (rc != -ENOTSUPP) 8648 return rc; 8649 /* If the reset fails in a particular way (it has no way to do 8650 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8651 * a soft reset once we get the controller configured up to the 8652 * point that it can accept a command. 8653 */ 8654 try_soft_reset = 1; 8655 rc = 0; 8656 } 8657 8658 reinit_after_soft_reset: 8659 8660 /* Command structures must be aligned on a 32-byte boundary because 8661 * the 5 lower bits of the address are used by the hardware. and by 8662 * the driver. See comments in hpsa.h for more info. 8663 */ 8664 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8665 h = hpda_alloc_ctlr_info(); 8666 if (!h) { 8667 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8668 return -ENOMEM; 8669 } 8670 8671 h->pdev = pdev; 8672 8673 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8674 INIT_LIST_HEAD(&h->offline_device_list); 8675 spin_lock_init(&h->lock); 8676 spin_lock_init(&h->offline_device_lock); 8677 spin_lock_init(&h->scan_lock); 8678 spin_lock_init(&h->reset_lock); 8679 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8680 8681 /* Allocate and clear per-cpu variable lockup_detected */ 8682 h->lockup_detected = alloc_percpu(u32); 8683 if (!h->lockup_detected) { 8684 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8685 rc = -ENOMEM; 8686 goto clean1; /* aer/h */ 8687 } 8688 set_lockup_detected_for_all_cpus(h, 0); 8689 8690 rc = hpsa_pci_init(h); 8691 if (rc) 8692 goto clean2; /* lu, aer/h */ 8693 8694 /* relies on h-> settings made by hpsa_pci_init, including 8695 * interrupt_mode h->intr */ 8696 rc = hpsa_scsi_host_alloc(h); 8697 if (rc) 8698 goto clean2_5; /* pci, lu, aer/h */ 8699 8700 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8701 h->ctlr = number_of_controllers; 8702 number_of_controllers++; 8703 8704 /* configure PCI DMA stuff */ 8705 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 8706 if (rc != 0) { 8707 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 8708 if (rc != 0) { 8709 dev_err(&pdev->dev, "no suitable DMA available\n"); 8710 goto clean3; /* shost, pci, lu, aer/h */ 8711 } 8712 } 8713 8714 /* make sure the board interrupts are off */ 8715 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8716 8717 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8718 if (rc) 8719 goto clean3; /* shost, pci, lu, aer/h */ 8720 rc = hpsa_alloc_cmd_pool(h); 8721 if (rc) 8722 goto clean4; /* irq, shost, pci, lu, aer/h */ 8723 rc = hpsa_alloc_sg_chain_blocks(h); 8724 if (rc) 8725 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8726 init_waitqueue_head(&h->scan_wait_queue); 8727 init_waitqueue_head(&h->event_sync_wait_queue); 8728 mutex_init(&h->reset_mutex); 8729 h->scan_finished = 1; /* no scan currently in progress */ 8730 h->scan_waiting = 0; 8731 8732 pci_set_drvdata(pdev, h); 8733 h->ndevices = 0; 8734 8735 spin_lock_init(&h->devlock); 8736 rc = hpsa_put_ctlr_into_performant_mode(h); 8737 if (rc) 8738 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8739 8740 /* create the resubmit workqueue */ 8741 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8742 if (!h->rescan_ctlr_wq) { 8743 rc = -ENOMEM; 8744 goto clean7; 8745 } 8746 8747 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8748 if (!h->resubmit_wq) { 8749 rc = -ENOMEM; 8750 goto clean7; /* aer/h */ 8751 } 8752 8753 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor"); 8754 if (!h->monitor_ctlr_wq) { 8755 rc = -ENOMEM; 8756 goto clean7; 8757 } 8758 8759 /* 8760 * At this point, the controller is ready to take commands. 8761 * Now, if reset_devices and the hard reset didn't work, try 8762 * the soft reset and see if that works. 8763 */ 8764 if (try_soft_reset) { 8765 8766 /* This is kind of gross. We may or may not get a completion 8767 * from the soft reset command, and if we do, then the value 8768 * from the fifo may or may not be valid. So, we wait 10 secs 8769 * after the reset throwing away any completions we get during 8770 * that time. Unregister the interrupt handler and register 8771 * fake ones to scoop up any residual completions. 8772 */ 8773 spin_lock_irqsave(&h->lock, flags); 8774 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8775 spin_unlock_irqrestore(&h->lock, flags); 8776 hpsa_free_irqs(h); 8777 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8778 hpsa_intx_discard_completions); 8779 if (rc) { 8780 dev_warn(&h->pdev->dev, 8781 "Failed to request_irq after soft reset.\n"); 8782 /* 8783 * cannot goto clean7 or free_irqs will be called 8784 * again. Instead, do its work 8785 */ 8786 hpsa_free_performant_mode(h); /* clean7 */ 8787 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8788 hpsa_free_cmd_pool(h); /* clean5 */ 8789 /* 8790 * skip hpsa_free_irqs(h) clean4 since that 8791 * was just called before request_irqs failed 8792 */ 8793 goto clean3; 8794 } 8795 8796 rc = hpsa_kdump_soft_reset(h); 8797 if (rc) 8798 /* Neither hard nor soft reset worked, we're hosed. */ 8799 goto clean7; 8800 8801 dev_info(&h->pdev->dev, "Board READY.\n"); 8802 dev_info(&h->pdev->dev, 8803 "Waiting for stale completions to drain.\n"); 8804 h->access.set_intr_mask(h, HPSA_INTR_ON); 8805 msleep(10000); 8806 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8807 8808 rc = controller_reset_failed(h->cfgtable); 8809 if (rc) 8810 dev_info(&h->pdev->dev, 8811 "Soft reset appears to have failed.\n"); 8812 8813 /* since the controller's reset, we have to go back and re-init 8814 * everything. Easiest to just forget what we've done and do it 8815 * all over again. 8816 */ 8817 hpsa_undo_allocations_after_kdump_soft_reset(h); 8818 try_soft_reset = 0; 8819 if (rc) 8820 /* don't goto clean, we already unallocated */ 8821 return -ENODEV; 8822 8823 goto reinit_after_soft_reset; 8824 } 8825 8826 /* Enable Accelerated IO path at driver layer */ 8827 h->acciopath_status = 1; 8828 /* Disable discovery polling.*/ 8829 h->discovery_polling = 0; 8830 8831 8832 /* Turn the interrupts on so we can service requests */ 8833 h->access.set_intr_mask(h, HPSA_INTR_ON); 8834 8835 hpsa_hba_inquiry(h); 8836 8837 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8838 if (!h->lastlogicals) 8839 dev_info(&h->pdev->dev, 8840 "Can't track change to report lun data\n"); 8841 8842 /* hook into SCSI subsystem */ 8843 rc = hpsa_scsi_add_host(h); 8844 if (rc) 8845 goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8846 8847 /* Monitor the controller for firmware lockups */ 8848 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8849 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8850 schedule_delayed_work(&h->monitor_ctlr_work, 8851 h->heartbeat_sample_interval); 8852 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8853 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8854 h->heartbeat_sample_interval); 8855 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8856 schedule_delayed_work(&h->event_monitor_work, 8857 HPSA_EVENT_MONITOR_INTERVAL); 8858 return 0; 8859 8860 clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8861 kfree(h->lastlogicals); 8862 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8863 hpsa_free_performant_mode(h); 8864 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8865 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8866 hpsa_free_sg_chain_blocks(h); 8867 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8868 hpsa_free_cmd_pool(h); 8869 clean4: /* irq, shost, pci, lu, aer/h */ 8870 hpsa_free_irqs(h); 8871 clean3: /* shost, pci, lu, aer/h */ 8872 scsi_host_put(h->scsi_host); 8873 h->scsi_host = NULL; 8874 clean2_5: /* pci, lu, aer/h */ 8875 hpsa_free_pci_init(h); 8876 clean2: /* lu, aer/h */ 8877 if (h->lockup_detected) { 8878 free_percpu(h->lockup_detected); 8879 h->lockup_detected = NULL; 8880 } 8881 clean1: /* wq/aer/h */ 8882 if (h->resubmit_wq) { 8883 destroy_workqueue(h->resubmit_wq); 8884 h->resubmit_wq = NULL; 8885 } 8886 if (h->rescan_ctlr_wq) { 8887 destroy_workqueue(h->rescan_ctlr_wq); 8888 h->rescan_ctlr_wq = NULL; 8889 } 8890 if (h->monitor_ctlr_wq) { 8891 destroy_workqueue(h->monitor_ctlr_wq); 8892 h->monitor_ctlr_wq = NULL; 8893 } 8894 kfree(h); 8895 return rc; 8896 } 8897 8898 static void hpsa_flush_cache(struct ctlr_info *h) 8899 { 8900 char *flush_buf; 8901 struct CommandList *c; 8902 int rc; 8903 8904 if (unlikely(lockup_detected(h))) 8905 return; 8906 flush_buf = kzalloc(4, GFP_KERNEL); 8907 if (!flush_buf) 8908 return; 8909 8910 c = cmd_alloc(h); 8911 8912 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8913 RAID_CTLR_LUNID, TYPE_CMD)) { 8914 goto out; 8915 } 8916 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8917 DEFAULT_TIMEOUT); 8918 if (rc) 8919 goto out; 8920 if (c->err_info->CommandStatus != 0) 8921 out: 8922 dev_warn(&h->pdev->dev, 8923 "error flushing cache on controller\n"); 8924 cmd_free(h, c); 8925 kfree(flush_buf); 8926 } 8927 8928 /* Make controller gather fresh report lun data each time we 8929 * send down a report luns request 8930 */ 8931 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8932 { 8933 u32 *options; 8934 struct CommandList *c; 8935 int rc; 8936 8937 /* Don't bother trying to set diag options if locked up */ 8938 if (unlikely(h->lockup_detected)) 8939 return; 8940 8941 options = kzalloc(sizeof(*options), GFP_KERNEL); 8942 if (!options) 8943 return; 8944 8945 c = cmd_alloc(h); 8946 8947 /* first, get the current diag options settings */ 8948 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8949 RAID_CTLR_LUNID, TYPE_CMD)) 8950 goto errout; 8951 8952 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8953 NO_TIMEOUT); 8954 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8955 goto errout; 8956 8957 /* Now, set the bit for disabling the RLD caching */ 8958 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8959 8960 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8961 RAID_CTLR_LUNID, TYPE_CMD)) 8962 goto errout; 8963 8964 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8965 NO_TIMEOUT); 8966 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8967 goto errout; 8968 8969 /* Now verify that it got set: */ 8970 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8971 RAID_CTLR_LUNID, TYPE_CMD)) 8972 goto errout; 8973 8974 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8975 NO_TIMEOUT); 8976 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8977 goto errout; 8978 8979 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8980 goto out; 8981 8982 errout: 8983 dev_err(&h->pdev->dev, 8984 "Error: failed to disable report lun data caching.\n"); 8985 out: 8986 cmd_free(h, c); 8987 kfree(options); 8988 } 8989 8990 static void __hpsa_shutdown(struct pci_dev *pdev) 8991 { 8992 struct ctlr_info *h; 8993 8994 h = pci_get_drvdata(pdev); 8995 /* Turn board interrupts off and send the flush cache command 8996 * sendcmd will turn off interrupt, and send the flush... 8997 * To write all data in the battery backed cache to disks 8998 */ 8999 hpsa_flush_cache(h); 9000 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9001 hpsa_free_irqs(h); /* init_one 4 */ 9002 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9003 } 9004 9005 static void hpsa_shutdown(struct pci_dev *pdev) 9006 { 9007 __hpsa_shutdown(pdev); 9008 pci_disable_device(pdev); 9009 } 9010 9011 static void hpsa_free_device_info(struct ctlr_info *h) 9012 { 9013 int i; 9014 9015 for (i = 0; i < h->ndevices; i++) { 9016 kfree(h->dev[i]); 9017 h->dev[i] = NULL; 9018 } 9019 } 9020 9021 static void hpsa_remove_one(struct pci_dev *pdev) 9022 { 9023 struct ctlr_info *h; 9024 unsigned long flags; 9025 9026 if (pci_get_drvdata(pdev) == NULL) { 9027 dev_err(&pdev->dev, "unable to remove device\n"); 9028 return; 9029 } 9030 h = pci_get_drvdata(pdev); 9031 9032 /* Get rid of any controller monitoring work items */ 9033 spin_lock_irqsave(&h->lock, flags); 9034 h->remove_in_progress = 1; 9035 spin_unlock_irqrestore(&h->lock, flags); 9036 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9037 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9038 cancel_delayed_work_sync(&h->event_monitor_work); 9039 destroy_workqueue(h->rescan_ctlr_wq); 9040 destroy_workqueue(h->resubmit_wq); 9041 destroy_workqueue(h->monitor_ctlr_wq); 9042 9043 hpsa_delete_sas_host(h); 9044 9045 /* 9046 * Call before disabling interrupts. 9047 * scsi_remove_host can trigger I/O operations especially 9048 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9049 * operations which cannot complete and will hang the system. 9050 */ 9051 if (h->scsi_host) 9052 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9053 /* includes hpsa_free_irqs - init_one 4 */ 9054 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9055 __hpsa_shutdown(pdev); 9056 9057 hpsa_free_device_info(h); /* scan */ 9058 9059 kfree(h->hba_inquiry_data); /* init_one 10 */ 9060 h->hba_inquiry_data = NULL; /* init_one 10 */ 9061 hpsa_free_ioaccel2_sg_chain_blocks(h); 9062 hpsa_free_performant_mode(h); /* init_one 7 */ 9063 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9064 hpsa_free_cmd_pool(h); /* init_one 5 */ 9065 kfree(h->lastlogicals); 9066 9067 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9068 9069 scsi_host_put(h->scsi_host); /* init_one 3 */ 9070 h->scsi_host = NULL; /* init_one 3 */ 9071 9072 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9073 hpsa_free_pci_init(h); /* init_one 2.5 */ 9074 9075 free_percpu(h->lockup_detected); /* init_one 2 */ 9076 h->lockup_detected = NULL; /* init_one 2 */ 9077 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9078 9079 hpda_free_ctlr_info(h); /* init_one 1 */ 9080 } 9081 9082 static int __maybe_unused hpsa_suspend( 9083 __attribute__((unused)) struct device *dev) 9084 { 9085 return -ENOSYS; 9086 } 9087 9088 static int __maybe_unused hpsa_resume 9089 (__attribute__((unused)) struct device *dev) 9090 { 9091 return -ENOSYS; 9092 } 9093 9094 static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume); 9095 9096 static struct pci_driver hpsa_pci_driver = { 9097 .name = HPSA, 9098 .probe = hpsa_init_one, 9099 .remove = hpsa_remove_one, 9100 .id_table = hpsa_pci_device_id, /* id_table */ 9101 .shutdown = hpsa_shutdown, 9102 .driver.pm = &hpsa_pm_ops, 9103 }; 9104 9105 /* Fill in bucket_map[], given nsgs (the max number of 9106 * scatter gather elements supported) and bucket[], 9107 * which is an array of 8 integers. The bucket[] array 9108 * contains 8 different DMA transfer sizes (in 16 9109 * byte increments) which the controller uses to fetch 9110 * commands. This function fills in bucket_map[], which 9111 * maps a given number of scatter gather elements to one of 9112 * the 8 DMA transfer sizes. The point of it is to allow the 9113 * controller to only do as much DMA as needed to fetch the 9114 * command, with the DMA transfer size encoded in the lower 9115 * bits of the command address. 9116 */ 9117 static void calc_bucket_map(int bucket[], int num_buckets, 9118 int nsgs, int min_blocks, u32 *bucket_map) 9119 { 9120 int i, j, b, size; 9121 9122 /* Note, bucket_map must have nsgs+1 entries. */ 9123 for (i = 0; i <= nsgs; i++) { 9124 /* Compute size of a command with i SG entries */ 9125 size = i + min_blocks; 9126 b = num_buckets; /* Assume the biggest bucket */ 9127 /* Find the bucket that is just big enough */ 9128 for (j = 0; j < num_buckets; j++) { 9129 if (bucket[j] >= size) { 9130 b = j; 9131 break; 9132 } 9133 } 9134 /* for a command with i SG entries, use bucket b. */ 9135 bucket_map[i] = b; 9136 } 9137 } 9138 9139 /* 9140 * return -ENODEV on err, 0 on success (or no action) 9141 * allocates numerous items that must be freed later 9142 */ 9143 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9144 { 9145 int i; 9146 unsigned long register_value; 9147 unsigned long transMethod = CFGTBL_Trans_Performant | 9148 (trans_support & CFGTBL_Trans_use_short_tags) | 9149 CFGTBL_Trans_enable_directed_msix | 9150 (trans_support & (CFGTBL_Trans_io_accel1 | 9151 CFGTBL_Trans_io_accel2)); 9152 struct access_method access = SA5_performant_access; 9153 9154 /* This is a bit complicated. There are 8 registers on 9155 * the controller which we write to to tell it 8 different 9156 * sizes of commands which there may be. It's a way of 9157 * reducing the DMA done to fetch each command. Encoded into 9158 * each command's tag are 3 bits which communicate to the controller 9159 * which of the eight sizes that command fits within. The size of 9160 * each command depends on how many scatter gather entries there are. 9161 * Each SG entry requires 16 bytes. The eight registers are programmed 9162 * with the number of 16-byte blocks a command of that size requires. 9163 * The smallest command possible requires 5 such 16 byte blocks. 9164 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9165 * blocks. Note, this only extends to the SG entries contained 9166 * within the command block, and does not extend to chained blocks 9167 * of SG elements. bft[] contains the eight values we write to 9168 * the registers. They are not evenly distributed, but have more 9169 * sizes for small commands, and fewer sizes for larger commands. 9170 */ 9171 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9172 #define MIN_IOACCEL2_BFT_ENTRY 5 9173 #define HPSA_IOACCEL2_HEADER_SZ 4 9174 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9175 13, 14, 15, 16, 17, 18, 19, 9176 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9177 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9178 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9179 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9180 16 * MIN_IOACCEL2_BFT_ENTRY); 9181 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9182 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9183 /* 5 = 1 s/g entry or 4k 9184 * 6 = 2 s/g entry or 8k 9185 * 8 = 4 s/g entry or 16k 9186 * 10 = 6 s/g entry or 24k 9187 */ 9188 9189 /* If the controller supports either ioaccel method then 9190 * we can also use the RAID stack submit path that does not 9191 * perform the superfluous readl() after each command submission. 9192 */ 9193 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9194 access = SA5_performant_access_no_read; 9195 9196 /* Controller spec: zero out this buffer. */ 9197 for (i = 0; i < h->nreply_queues; i++) 9198 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9199 9200 bft[7] = SG_ENTRIES_IN_CMD + 4; 9201 calc_bucket_map(bft, ARRAY_SIZE(bft), 9202 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9203 for (i = 0; i < 8; i++) 9204 writel(bft[i], &h->transtable->BlockFetch[i]); 9205 9206 /* size of controller ring buffer */ 9207 writel(h->max_commands, &h->transtable->RepQSize); 9208 writel(h->nreply_queues, &h->transtable->RepQCount); 9209 writel(0, &h->transtable->RepQCtrAddrLow32); 9210 writel(0, &h->transtable->RepQCtrAddrHigh32); 9211 9212 for (i = 0; i < h->nreply_queues; i++) { 9213 writel(0, &h->transtable->RepQAddr[i].upper); 9214 writel(h->reply_queue[i].busaddr, 9215 &h->transtable->RepQAddr[i].lower); 9216 } 9217 9218 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9219 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9220 /* 9221 * enable outbound interrupt coalescing in accelerator mode; 9222 */ 9223 if (trans_support & CFGTBL_Trans_io_accel1) { 9224 access = SA5_ioaccel_mode1_access; 9225 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9226 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9227 } else 9228 if (trans_support & CFGTBL_Trans_io_accel2) 9229 access = SA5_ioaccel_mode2_access; 9230 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9231 if (hpsa_wait_for_mode_change_ack(h)) { 9232 dev_err(&h->pdev->dev, 9233 "performant mode problem - doorbell timeout\n"); 9234 return -ENODEV; 9235 } 9236 register_value = readl(&(h->cfgtable->TransportActive)); 9237 if (!(register_value & CFGTBL_Trans_Performant)) { 9238 dev_err(&h->pdev->dev, 9239 "performant mode problem - transport not active\n"); 9240 return -ENODEV; 9241 } 9242 /* Change the access methods to the performant access methods */ 9243 h->access = access; 9244 h->transMethod = transMethod; 9245 9246 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9247 (trans_support & CFGTBL_Trans_io_accel2))) 9248 return 0; 9249 9250 if (trans_support & CFGTBL_Trans_io_accel1) { 9251 /* Set up I/O accelerator mode */ 9252 for (i = 0; i < h->nreply_queues; i++) { 9253 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9254 h->reply_queue[i].current_entry = 9255 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9256 } 9257 bft[7] = h->ioaccel_maxsg + 8; 9258 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9259 h->ioaccel1_blockFetchTable); 9260 9261 /* initialize all reply queue entries to unused */ 9262 for (i = 0; i < h->nreply_queues; i++) 9263 memset(h->reply_queue[i].head, 9264 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9265 h->reply_queue_size); 9266 9267 /* set all the constant fields in the accelerator command 9268 * frames once at init time to save CPU cycles later. 9269 */ 9270 for (i = 0; i < h->nr_cmds; i++) { 9271 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9272 9273 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9274 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9275 (i * sizeof(struct ErrorInfo))); 9276 cp->err_info_len = sizeof(struct ErrorInfo); 9277 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9278 cp->host_context_flags = 9279 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9280 cp->timeout_sec = 0; 9281 cp->ReplyQueue = 0; 9282 cp->tag = 9283 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9284 cp->host_addr = 9285 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9286 (i * sizeof(struct io_accel1_cmd))); 9287 } 9288 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9289 u64 cfg_offset, cfg_base_addr_index; 9290 u32 bft2_offset, cfg_base_addr; 9291 9292 hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9293 &cfg_base_addr_index, &cfg_offset); 9294 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9295 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9296 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9297 4, h->ioaccel2_blockFetchTable); 9298 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9299 BUILD_BUG_ON(offsetof(struct CfgTable, 9300 io_accel_request_size_offset) != 0xb8); 9301 h->ioaccel2_bft2_regs = 9302 remap_pci_mem(pci_resource_start(h->pdev, 9303 cfg_base_addr_index) + 9304 cfg_offset + bft2_offset, 9305 ARRAY_SIZE(bft2) * 9306 sizeof(*h->ioaccel2_bft2_regs)); 9307 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9308 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9309 } 9310 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9311 if (hpsa_wait_for_mode_change_ack(h)) { 9312 dev_err(&h->pdev->dev, 9313 "performant mode problem - enabling ioaccel mode\n"); 9314 return -ENODEV; 9315 } 9316 return 0; 9317 } 9318 9319 /* Free ioaccel1 mode command blocks and block fetch table */ 9320 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9321 { 9322 if (h->ioaccel_cmd_pool) { 9323 dma_free_coherent(&h->pdev->dev, 9324 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9325 h->ioaccel_cmd_pool, 9326 h->ioaccel_cmd_pool_dhandle); 9327 h->ioaccel_cmd_pool = NULL; 9328 h->ioaccel_cmd_pool_dhandle = 0; 9329 } 9330 kfree(h->ioaccel1_blockFetchTable); 9331 h->ioaccel1_blockFetchTable = NULL; 9332 } 9333 9334 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9335 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9336 { 9337 h->ioaccel_maxsg = 9338 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9339 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9340 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9341 9342 /* Command structures must be aligned on a 128-byte boundary 9343 * because the 7 lower bits of the address are used by the 9344 * hardware. 9345 */ 9346 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9347 IOACCEL1_COMMANDLIST_ALIGNMENT); 9348 h->ioaccel_cmd_pool = 9349 dma_alloc_coherent(&h->pdev->dev, 9350 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9351 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9352 9353 h->ioaccel1_blockFetchTable = 9354 kmalloc(((h->ioaccel_maxsg + 1) * 9355 sizeof(u32)), GFP_KERNEL); 9356 9357 if ((h->ioaccel_cmd_pool == NULL) || 9358 (h->ioaccel1_blockFetchTable == NULL)) 9359 goto clean_up; 9360 9361 memset(h->ioaccel_cmd_pool, 0, 9362 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9363 return 0; 9364 9365 clean_up: 9366 hpsa_free_ioaccel1_cmd_and_bft(h); 9367 return -ENOMEM; 9368 } 9369 9370 /* Free ioaccel2 mode command blocks and block fetch table */ 9371 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9372 { 9373 hpsa_free_ioaccel2_sg_chain_blocks(h); 9374 9375 if (h->ioaccel2_cmd_pool) { 9376 dma_free_coherent(&h->pdev->dev, 9377 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9378 h->ioaccel2_cmd_pool, 9379 h->ioaccel2_cmd_pool_dhandle); 9380 h->ioaccel2_cmd_pool = NULL; 9381 h->ioaccel2_cmd_pool_dhandle = 0; 9382 } 9383 kfree(h->ioaccel2_blockFetchTable); 9384 h->ioaccel2_blockFetchTable = NULL; 9385 } 9386 9387 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9388 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9389 { 9390 int rc; 9391 9392 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9393 9394 h->ioaccel_maxsg = 9395 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9396 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9397 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9398 9399 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9400 IOACCEL2_COMMANDLIST_ALIGNMENT); 9401 h->ioaccel2_cmd_pool = 9402 dma_alloc_coherent(&h->pdev->dev, 9403 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9404 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9405 9406 h->ioaccel2_blockFetchTable = 9407 kmalloc(((h->ioaccel_maxsg + 1) * 9408 sizeof(u32)), GFP_KERNEL); 9409 9410 if ((h->ioaccel2_cmd_pool == NULL) || 9411 (h->ioaccel2_blockFetchTable == NULL)) { 9412 rc = -ENOMEM; 9413 goto clean_up; 9414 } 9415 9416 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9417 if (rc) 9418 goto clean_up; 9419 9420 memset(h->ioaccel2_cmd_pool, 0, 9421 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9422 return 0; 9423 9424 clean_up: 9425 hpsa_free_ioaccel2_cmd_and_bft(h); 9426 return rc; 9427 } 9428 9429 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9430 static void hpsa_free_performant_mode(struct ctlr_info *h) 9431 { 9432 kfree(h->blockFetchTable); 9433 h->blockFetchTable = NULL; 9434 hpsa_free_reply_queues(h); 9435 hpsa_free_ioaccel1_cmd_and_bft(h); 9436 hpsa_free_ioaccel2_cmd_and_bft(h); 9437 } 9438 9439 /* return -ENODEV on error, 0 on success (or no action) 9440 * allocates numerous items that must be freed later 9441 */ 9442 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9443 { 9444 u32 trans_support; 9445 unsigned long transMethod = CFGTBL_Trans_Performant | 9446 CFGTBL_Trans_use_short_tags; 9447 int i, rc; 9448 9449 if (hpsa_simple_mode) 9450 return 0; 9451 9452 trans_support = readl(&(h->cfgtable->TransportSupport)); 9453 if (!(trans_support & PERFORMANT_MODE)) 9454 return 0; 9455 9456 /* Check for I/O accelerator mode support */ 9457 if (trans_support & CFGTBL_Trans_io_accel1) { 9458 transMethod |= CFGTBL_Trans_io_accel1 | 9459 CFGTBL_Trans_enable_directed_msix; 9460 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9461 if (rc) 9462 return rc; 9463 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9464 transMethod |= CFGTBL_Trans_io_accel2 | 9465 CFGTBL_Trans_enable_directed_msix; 9466 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9467 if (rc) 9468 return rc; 9469 } 9470 9471 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9472 hpsa_get_max_perf_mode_cmds(h); 9473 /* Performant mode ring buffer and supporting data structures */ 9474 h->reply_queue_size = h->max_commands * sizeof(u64); 9475 9476 for (i = 0; i < h->nreply_queues; i++) { 9477 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9478 h->reply_queue_size, 9479 &h->reply_queue[i].busaddr, 9480 GFP_KERNEL); 9481 if (!h->reply_queue[i].head) { 9482 rc = -ENOMEM; 9483 goto clean1; /* rq, ioaccel */ 9484 } 9485 h->reply_queue[i].size = h->max_commands; 9486 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9487 h->reply_queue[i].current_entry = 0; 9488 } 9489 9490 /* Need a block fetch table for performant mode */ 9491 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9492 sizeof(u32)), GFP_KERNEL); 9493 if (!h->blockFetchTable) { 9494 rc = -ENOMEM; 9495 goto clean1; /* rq, ioaccel */ 9496 } 9497 9498 rc = hpsa_enter_performant_mode(h, trans_support); 9499 if (rc) 9500 goto clean2; /* bft, rq, ioaccel */ 9501 return 0; 9502 9503 clean2: /* bft, rq, ioaccel */ 9504 kfree(h->blockFetchTable); 9505 h->blockFetchTable = NULL; 9506 clean1: /* rq, ioaccel */ 9507 hpsa_free_reply_queues(h); 9508 hpsa_free_ioaccel1_cmd_and_bft(h); 9509 hpsa_free_ioaccel2_cmd_and_bft(h); 9510 return rc; 9511 } 9512 9513 static int is_accelerated_cmd(struct CommandList *c) 9514 { 9515 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9516 } 9517 9518 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9519 { 9520 struct CommandList *c = NULL; 9521 int i, accel_cmds_out; 9522 int refcount; 9523 9524 do { /* wait for all outstanding ioaccel commands to drain out */ 9525 accel_cmds_out = 0; 9526 for (i = 0; i < h->nr_cmds; i++) { 9527 c = h->cmd_pool + i; 9528 refcount = atomic_inc_return(&c->refcount); 9529 if (refcount > 1) /* Command is allocated */ 9530 accel_cmds_out += is_accelerated_cmd(c); 9531 cmd_free(h, c); 9532 } 9533 if (accel_cmds_out <= 0) 9534 break; 9535 msleep(100); 9536 } while (1); 9537 } 9538 9539 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9540 struct hpsa_sas_port *hpsa_sas_port) 9541 { 9542 struct hpsa_sas_phy *hpsa_sas_phy; 9543 struct sas_phy *phy; 9544 9545 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9546 if (!hpsa_sas_phy) 9547 return NULL; 9548 9549 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9550 hpsa_sas_port->next_phy_index); 9551 if (!phy) { 9552 kfree(hpsa_sas_phy); 9553 return NULL; 9554 } 9555 9556 hpsa_sas_port->next_phy_index++; 9557 hpsa_sas_phy->phy = phy; 9558 hpsa_sas_phy->parent_port = hpsa_sas_port; 9559 9560 return hpsa_sas_phy; 9561 } 9562 9563 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9564 { 9565 struct sas_phy *phy = hpsa_sas_phy->phy; 9566 9567 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9568 if (hpsa_sas_phy->added_to_port) 9569 list_del(&hpsa_sas_phy->phy_list_entry); 9570 sas_phy_delete(phy); 9571 kfree(hpsa_sas_phy); 9572 } 9573 9574 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9575 { 9576 int rc; 9577 struct hpsa_sas_port *hpsa_sas_port; 9578 struct sas_phy *phy; 9579 struct sas_identify *identify; 9580 9581 hpsa_sas_port = hpsa_sas_phy->parent_port; 9582 phy = hpsa_sas_phy->phy; 9583 9584 identify = &phy->identify; 9585 memset(identify, 0, sizeof(*identify)); 9586 identify->sas_address = hpsa_sas_port->sas_address; 9587 identify->device_type = SAS_END_DEVICE; 9588 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9589 identify->target_port_protocols = SAS_PROTOCOL_STP; 9590 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9591 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9592 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9593 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9594 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9595 9596 rc = sas_phy_add(hpsa_sas_phy->phy); 9597 if (rc) 9598 return rc; 9599 9600 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9601 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9602 &hpsa_sas_port->phy_list_head); 9603 hpsa_sas_phy->added_to_port = true; 9604 9605 return 0; 9606 } 9607 9608 static int 9609 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9610 struct sas_rphy *rphy) 9611 { 9612 struct sas_identify *identify; 9613 9614 identify = &rphy->identify; 9615 identify->sas_address = hpsa_sas_port->sas_address; 9616 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9617 identify->target_port_protocols = SAS_PROTOCOL_STP; 9618 9619 return sas_rphy_add(rphy); 9620 } 9621 9622 static struct hpsa_sas_port 9623 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9624 u64 sas_address) 9625 { 9626 int rc; 9627 struct hpsa_sas_port *hpsa_sas_port; 9628 struct sas_port *port; 9629 9630 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9631 if (!hpsa_sas_port) 9632 return NULL; 9633 9634 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9635 hpsa_sas_port->parent_node = hpsa_sas_node; 9636 9637 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9638 if (!port) 9639 goto free_hpsa_port; 9640 9641 rc = sas_port_add(port); 9642 if (rc) 9643 goto free_sas_port; 9644 9645 hpsa_sas_port->port = port; 9646 hpsa_sas_port->sas_address = sas_address; 9647 list_add_tail(&hpsa_sas_port->port_list_entry, 9648 &hpsa_sas_node->port_list_head); 9649 9650 return hpsa_sas_port; 9651 9652 free_sas_port: 9653 sas_port_free(port); 9654 free_hpsa_port: 9655 kfree(hpsa_sas_port); 9656 9657 return NULL; 9658 } 9659 9660 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9661 { 9662 struct hpsa_sas_phy *hpsa_sas_phy; 9663 struct hpsa_sas_phy *next; 9664 9665 list_for_each_entry_safe(hpsa_sas_phy, next, 9666 &hpsa_sas_port->phy_list_head, phy_list_entry) 9667 hpsa_free_sas_phy(hpsa_sas_phy); 9668 9669 sas_port_delete(hpsa_sas_port->port); 9670 list_del(&hpsa_sas_port->port_list_entry); 9671 kfree(hpsa_sas_port); 9672 } 9673 9674 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9675 { 9676 struct hpsa_sas_node *hpsa_sas_node; 9677 9678 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9679 if (hpsa_sas_node) { 9680 hpsa_sas_node->parent_dev = parent_dev; 9681 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9682 } 9683 9684 return hpsa_sas_node; 9685 } 9686 9687 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9688 { 9689 struct hpsa_sas_port *hpsa_sas_port; 9690 struct hpsa_sas_port *next; 9691 9692 if (!hpsa_sas_node) 9693 return; 9694 9695 list_for_each_entry_safe(hpsa_sas_port, next, 9696 &hpsa_sas_node->port_list_head, port_list_entry) 9697 hpsa_free_sas_port(hpsa_sas_port); 9698 9699 kfree(hpsa_sas_node); 9700 } 9701 9702 static struct hpsa_scsi_dev_t 9703 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9704 struct sas_rphy *rphy) 9705 { 9706 int i; 9707 struct hpsa_scsi_dev_t *device; 9708 9709 for (i = 0; i < h->ndevices; i++) { 9710 device = h->dev[i]; 9711 if (!device->sas_port) 9712 continue; 9713 if (device->sas_port->rphy == rphy) 9714 return device; 9715 } 9716 9717 return NULL; 9718 } 9719 9720 static int hpsa_add_sas_host(struct ctlr_info *h) 9721 { 9722 int rc; 9723 struct device *parent_dev; 9724 struct hpsa_sas_node *hpsa_sas_node; 9725 struct hpsa_sas_port *hpsa_sas_port; 9726 struct hpsa_sas_phy *hpsa_sas_phy; 9727 9728 parent_dev = &h->scsi_host->shost_dev; 9729 9730 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9731 if (!hpsa_sas_node) 9732 return -ENOMEM; 9733 9734 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9735 if (!hpsa_sas_port) { 9736 rc = -ENODEV; 9737 goto free_sas_node; 9738 } 9739 9740 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9741 if (!hpsa_sas_phy) { 9742 rc = -ENODEV; 9743 goto free_sas_port; 9744 } 9745 9746 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9747 if (rc) 9748 goto free_sas_phy; 9749 9750 h->sas_host = hpsa_sas_node; 9751 9752 return 0; 9753 9754 free_sas_phy: 9755 hpsa_free_sas_phy(hpsa_sas_phy); 9756 free_sas_port: 9757 hpsa_free_sas_port(hpsa_sas_port); 9758 free_sas_node: 9759 hpsa_free_sas_node(hpsa_sas_node); 9760 9761 return rc; 9762 } 9763 9764 static void hpsa_delete_sas_host(struct ctlr_info *h) 9765 { 9766 hpsa_free_sas_node(h->sas_host); 9767 } 9768 9769 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9770 struct hpsa_scsi_dev_t *device) 9771 { 9772 int rc; 9773 struct hpsa_sas_port *hpsa_sas_port; 9774 struct sas_rphy *rphy; 9775 9776 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9777 if (!hpsa_sas_port) 9778 return -ENOMEM; 9779 9780 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9781 if (!rphy) { 9782 rc = -ENODEV; 9783 goto free_sas_port; 9784 } 9785 9786 hpsa_sas_port->rphy = rphy; 9787 device->sas_port = hpsa_sas_port; 9788 9789 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9790 if (rc) 9791 goto free_sas_port; 9792 9793 return 0; 9794 9795 free_sas_port: 9796 hpsa_free_sas_port(hpsa_sas_port); 9797 device->sas_port = NULL; 9798 9799 return rc; 9800 } 9801 9802 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9803 { 9804 if (device->sas_port) { 9805 hpsa_free_sas_port(device->sas_port); 9806 device->sas_port = NULL; 9807 } 9808 } 9809 9810 static int 9811 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9812 { 9813 return 0; 9814 } 9815 9816 static int 9817 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9818 { 9819 struct Scsi_Host *shost = phy_to_shost(rphy); 9820 struct ctlr_info *h; 9821 struct hpsa_scsi_dev_t *sd; 9822 9823 if (!shost) 9824 return -ENXIO; 9825 9826 h = shost_to_hba(shost); 9827 9828 if (!h) 9829 return -ENXIO; 9830 9831 sd = hpsa_find_device_by_sas_rphy(h, rphy); 9832 if (!sd) 9833 return -ENXIO; 9834 9835 *identifier = sd->eli; 9836 9837 return 0; 9838 } 9839 9840 static int 9841 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9842 { 9843 return -ENXIO; 9844 } 9845 9846 static int 9847 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9848 { 9849 return 0; 9850 } 9851 9852 static int 9853 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9854 { 9855 return 0; 9856 } 9857 9858 static int 9859 hpsa_sas_phy_setup(struct sas_phy *phy) 9860 { 9861 return 0; 9862 } 9863 9864 static void 9865 hpsa_sas_phy_release(struct sas_phy *phy) 9866 { 9867 } 9868 9869 static int 9870 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9871 { 9872 return -EINVAL; 9873 } 9874 9875 static struct sas_function_template hpsa_sas_transport_functions = { 9876 .get_linkerrors = hpsa_sas_get_linkerrors, 9877 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9878 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9879 .phy_reset = hpsa_sas_phy_reset, 9880 .phy_enable = hpsa_sas_phy_enable, 9881 .phy_setup = hpsa_sas_phy_setup, 9882 .phy_release = hpsa_sas_phy_release, 9883 .set_phy_speed = hpsa_sas_phy_speed, 9884 }; 9885 9886 /* 9887 * This is it. Register the PCI driver information for the cards we control 9888 * the OS will call our registered routines when it finds one of our cards. 9889 */ 9890 static int __init hpsa_init(void) 9891 { 9892 int rc; 9893 9894 hpsa_sas_transport_template = 9895 sas_attach_transport(&hpsa_sas_transport_functions); 9896 if (!hpsa_sas_transport_template) 9897 return -ENODEV; 9898 9899 rc = pci_register_driver(&hpsa_pci_driver); 9900 9901 if (rc) 9902 sas_release_transport(hpsa_sas_transport_template); 9903 9904 return rc; 9905 } 9906 9907 static void __exit hpsa_cleanup(void) 9908 { 9909 pci_unregister_driver(&hpsa_pci_driver); 9910 sas_release_transport(hpsa_sas_transport_template); 9911 } 9912 9913 static void __attribute__((unused)) verify_offsets(void) 9914 { 9915 #define VERIFY_OFFSET(member, offset) \ 9916 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9917 9918 VERIFY_OFFSET(structure_size, 0); 9919 VERIFY_OFFSET(volume_blk_size, 4); 9920 VERIFY_OFFSET(volume_blk_cnt, 8); 9921 VERIFY_OFFSET(phys_blk_shift, 16); 9922 VERIFY_OFFSET(parity_rotation_shift, 17); 9923 VERIFY_OFFSET(strip_size, 18); 9924 VERIFY_OFFSET(disk_starting_blk, 20); 9925 VERIFY_OFFSET(disk_blk_cnt, 28); 9926 VERIFY_OFFSET(data_disks_per_row, 36); 9927 VERIFY_OFFSET(metadata_disks_per_row, 38); 9928 VERIFY_OFFSET(row_cnt, 40); 9929 VERIFY_OFFSET(layout_map_count, 42); 9930 VERIFY_OFFSET(flags, 44); 9931 VERIFY_OFFSET(dekindex, 46); 9932 /* VERIFY_OFFSET(reserved, 48 */ 9933 VERIFY_OFFSET(data, 64); 9934 9935 #undef VERIFY_OFFSET 9936 9937 #define VERIFY_OFFSET(member, offset) \ 9938 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9939 9940 VERIFY_OFFSET(IU_type, 0); 9941 VERIFY_OFFSET(direction, 1); 9942 VERIFY_OFFSET(reply_queue, 2); 9943 /* VERIFY_OFFSET(reserved1, 3); */ 9944 VERIFY_OFFSET(scsi_nexus, 4); 9945 VERIFY_OFFSET(Tag, 8); 9946 VERIFY_OFFSET(cdb, 16); 9947 VERIFY_OFFSET(cciss_lun, 32); 9948 VERIFY_OFFSET(data_len, 40); 9949 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9950 VERIFY_OFFSET(sg_count, 45); 9951 /* VERIFY_OFFSET(reserved3 */ 9952 VERIFY_OFFSET(err_ptr, 48); 9953 VERIFY_OFFSET(err_len, 56); 9954 /* VERIFY_OFFSET(reserved4 */ 9955 VERIFY_OFFSET(sg, 64); 9956 9957 #undef VERIFY_OFFSET 9958 9959 #define VERIFY_OFFSET(member, offset) \ 9960 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9961 9962 VERIFY_OFFSET(dev_handle, 0x00); 9963 VERIFY_OFFSET(reserved1, 0x02); 9964 VERIFY_OFFSET(function, 0x03); 9965 VERIFY_OFFSET(reserved2, 0x04); 9966 VERIFY_OFFSET(err_info, 0x0C); 9967 VERIFY_OFFSET(reserved3, 0x10); 9968 VERIFY_OFFSET(err_info_len, 0x12); 9969 VERIFY_OFFSET(reserved4, 0x13); 9970 VERIFY_OFFSET(sgl_offset, 0x14); 9971 VERIFY_OFFSET(reserved5, 0x15); 9972 VERIFY_OFFSET(transfer_len, 0x1C); 9973 VERIFY_OFFSET(reserved6, 0x20); 9974 VERIFY_OFFSET(io_flags, 0x24); 9975 VERIFY_OFFSET(reserved7, 0x26); 9976 VERIFY_OFFSET(LUN, 0x34); 9977 VERIFY_OFFSET(control, 0x3C); 9978 VERIFY_OFFSET(CDB, 0x40); 9979 VERIFY_OFFSET(reserved8, 0x50); 9980 VERIFY_OFFSET(host_context_flags, 0x60); 9981 VERIFY_OFFSET(timeout_sec, 0x62); 9982 VERIFY_OFFSET(ReplyQueue, 0x64); 9983 VERIFY_OFFSET(reserved9, 0x65); 9984 VERIFY_OFFSET(tag, 0x68); 9985 VERIFY_OFFSET(host_addr, 0x70); 9986 VERIFY_OFFSET(CISS_LUN, 0x78); 9987 VERIFY_OFFSET(SG, 0x78 + 8); 9988 #undef VERIFY_OFFSET 9989 } 9990 9991 module_init(hpsa_init); 9992 module_exit(hpsa_cleanup); 9993