1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.20-125" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 MODULE_ALIAS("cciss"); 85 86 static int hpsa_simple_mode; 87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 88 MODULE_PARM_DESC(hpsa_simple_mode, 89 "Use 'simple mode' rather than 'performant mode'"); 90 91 /* define the PCI info for the cards we can control */ 92 static const struct pci_device_id hpsa_pci_device_id[] = { 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 150 {0,} 151 }; 152 153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 154 155 /* board_id = Subsystem Device ID & Vendor ID 156 * product = Marketing Name for the board 157 * access = Address of the struct of function pointers 158 */ 159 static struct board_type products[] = { 160 {0x40700E11, "Smart Array 5300", &SA5A_access}, 161 {0x40800E11, "Smart Array 5i", &SA5B_access}, 162 {0x40820E11, "Smart Array 532", &SA5B_access}, 163 {0x40830E11, "Smart Array 5312", &SA5B_access}, 164 {0x409A0E11, "Smart Array 641", &SA5A_access}, 165 {0x409B0E11, "Smart Array 642", &SA5A_access}, 166 {0x409C0E11, "Smart Array 6400", &SA5A_access}, 167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 168 {0x40910E11, "Smart Array 6i", &SA5A_access}, 169 {0x3225103C, "Smart Array P600", &SA5A_access}, 170 {0x3223103C, "Smart Array P800", &SA5A_access}, 171 {0x3234103C, "Smart Array P400", &SA5A_access}, 172 {0x3235103C, "Smart Array P400i", &SA5A_access}, 173 {0x3211103C, "Smart Array E200i", &SA5A_access}, 174 {0x3212103C, "Smart Array E200", &SA5A_access}, 175 {0x3213103C, "Smart Array E200i", &SA5A_access}, 176 {0x3214103C, "Smart Array E200i", &SA5A_access}, 177 {0x3215103C, "Smart Array E200i", &SA5A_access}, 178 {0x3237103C, "Smart Array E500", &SA5A_access}, 179 {0x323D103C, "Smart Array P700m", &SA5A_access}, 180 {0x3241103C, "Smart Array P212", &SA5_access}, 181 {0x3243103C, "Smart Array P410", &SA5_access}, 182 {0x3245103C, "Smart Array P410i", &SA5_access}, 183 {0x3247103C, "Smart Array P411", &SA5_access}, 184 {0x3249103C, "Smart Array P812", &SA5_access}, 185 {0x324A103C, "Smart Array P712m", &SA5_access}, 186 {0x324B103C, "Smart Array P711m", &SA5_access}, 187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 188 {0x3350103C, "Smart Array P222", &SA5_access}, 189 {0x3351103C, "Smart Array P420", &SA5_access}, 190 {0x3352103C, "Smart Array P421", &SA5_access}, 191 {0x3353103C, "Smart Array P822", &SA5_access}, 192 {0x3354103C, "Smart Array P420i", &SA5_access}, 193 {0x3355103C, "Smart Array P220i", &SA5_access}, 194 {0x3356103C, "Smart Array P721m", &SA5_access}, 195 {0x1920103C, "Smart Array P430i", &SA5_access}, 196 {0x1921103C, "Smart Array P830i", &SA5_access}, 197 {0x1922103C, "Smart Array P430", &SA5_access}, 198 {0x1923103C, "Smart Array P431", &SA5_access}, 199 {0x1924103C, "Smart Array P830", &SA5_access}, 200 {0x1925103C, "Smart Array P831", &SA5_access}, 201 {0x1926103C, "Smart Array P731m", &SA5_access}, 202 {0x1928103C, "Smart Array P230i", &SA5_access}, 203 {0x1929103C, "Smart Array P530", &SA5_access}, 204 {0x21BD103C, "Smart Array P244br", &SA5_access}, 205 {0x21BE103C, "Smart Array P741m", &SA5_access}, 206 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 207 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 208 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 209 {0x21C2103C, "Smart Array P440", &SA5_access}, 210 {0x21C3103C, "Smart Array P441", &SA5_access}, 211 {0x21C4103C, "Smart Array", &SA5_access}, 212 {0x21C5103C, "Smart Array P841", &SA5_access}, 213 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 214 {0x21C7103C, "Smart HBA H240", &SA5_access}, 215 {0x21C8103C, "Smart HBA H241", &SA5_access}, 216 {0x21C9103C, "Smart Array", &SA5_access}, 217 {0x21CA103C, "Smart Array P246br", &SA5_access}, 218 {0x21CB103C, "Smart Array P840", &SA5_access}, 219 {0x21CC103C, "Smart Array", &SA5_access}, 220 {0x21CD103C, "Smart Array", &SA5_access}, 221 {0x21CE103C, "Smart HBA", &SA5_access}, 222 {0x05809005, "SmartHBA-SA", &SA5_access}, 223 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 225 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 226 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 233 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 234 }; 235 236 static struct scsi_transport_template *hpsa_sas_transport_template; 237 static int hpsa_add_sas_host(struct ctlr_info *h); 238 static void hpsa_delete_sas_host(struct ctlr_info *h); 239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 240 struct hpsa_scsi_dev_t *device); 241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 242 static struct hpsa_scsi_dev_t 243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 244 struct sas_rphy *rphy); 245 246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 247 static const struct scsi_cmnd hpsa_cmd_busy; 248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 249 static const struct scsi_cmnd hpsa_cmd_idle; 250 static int number_of_controllers; 251 252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 254 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 255 void __user *arg); 256 257 #ifdef CONFIG_COMPAT 258 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 259 void __user *arg); 260 #endif 261 262 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 263 static struct CommandList *cmd_alloc(struct ctlr_info *h); 264 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 265 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 266 struct scsi_cmnd *scmd); 267 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 268 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 269 int cmd_type); 270 static void hpsa_free_cmd_pool(struct ctlr_info *h); 271 #define VPD_PAGE (1 << 8) 272 #define HPSA_SIMPLE_ERROR_BITS 0x03 273 274 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 275 static void hpsa_scan_start(struct Scsi_Host *); 276 static int hpsa_scan_finished(struct Scsi_Host *sh, 277 unsigned long elapsed_time); 278 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 279 280 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 281 static int hpsa_slave_alloc(struct scsi_device *sdev); 282 static int hpsa_slave_configure(struct scsi_device *sdev); 283 static void hpsa_slave_destroy(struct scsi_device *sdev); 284 285 static void hpsa_update_scsi_devices(struct ctlr_info *h); 286 static int check_for_unit_attention(struct ctlr_info *h, 287 struct CommandList *c); 288 static void check_ioctl_unit_attention(struct ctlr_info *h, 289 struct CommandList *c); 290 /* performant mode helper functions */ 291 static void calc_bucket_map(int *bucket, int num_buckets, 292 int nsgs, int min_blocks, u32 *bucket_map); 293 static void hpsa_free_performant_mode(struct ctlr_info *h); 294 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 295 static inline u32 next_command(struct ctlr_info *h, u8 q); 296 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 297 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 298 u64 *cfg_offset); 299 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 300 unsigned long *memory_bar); 301 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 302 bool *legacy_board); 303 static int wait_for_device_to_become_ready(struct ctlr_info *h, 304 unsigned char lunaddr[], 305 int reply_queue); 306 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 307 int wait_for_ready); 308 static inline void finish_cmd(struct CommandList *c); 309 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 310 #define BOARD_NOT_READY 0 311 #define BOARD_READY 1 312 static void hpsa_drain_accel_commands(struct ctlr_info *h); 313 static void hpsa_flush_cache(struct ctlr_info *h); 314 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 315 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 316 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 317 static void hpsa_command_resubmit_worker(struct work_struct *work); 318 static u32 lockup_detected(struct ctlr_info *h); 319 static int detect_controller_lockup(struct ctlr_info *h); 320 static void hpsa_disable_rld_caching(struct ctlr_info *h); 321 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 322 struct ReportExtendedLUNdata *buf, int bufsize); 323 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 324 unsigned char scsi3addr[], u8 page); 325 static int hpsa_luns_changed(struct ctlr_info *h); 326 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 327 struct hpsa_scsi_dev_t *dev, 328 unsigned char *scsi3addr); 329 330 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 331 { 332 unsigned long *priv = shost_priv(sdev->host); 333 return (struct ctlr_info *) *priv; 334 } 335 336 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 337 { 338 unsigned long *priv = shost_priv(sh); 339 return (struct ctlr_info *) *priv; 340 } 341 342 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 343 { 344 return c->scsi_cmd == SCSI_CMD_IDLE; 345 } 346 347 static inline bool hpsa_is_pending_event(struct CommandList *c) 348 { 349 return c->reset_pending; 350 } 351 352 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 353 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 354 u8 *sense_key, u8 *asc, u8 *ascq) 355 { 356 struct scsi_sense_hdr sshdr; 357 bool rc; 358 359 *sense_key = -1; 360 *asc = -1; 361 *ascq = -1; 362 363 if (sense_data_len < 1) 364 return; 365 366 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 367 if (rc) { 368 *sense_key = sshdr.sense_key; 369 *asc = sshdr.asc; 370 *ascq = sshdr.ascq; 371 } 372 } 373 374 static int check_for_unit_attention(struct ctlr_info *h, 375 struct CommandList *c) 376 { 377 u8 sense_key, asc, ascq; 378 int sense_len; 379 380 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 381 sense_len = sizeof(c->err_info->SenseInfo); 382 else 383 sense_len = c->err_info->SenseLen; 384 385 decode_sense_data(c->err_info->SenseInfo, sense_len, 386 &sense_key, &asc, &ascq); 387 if (sense_key != UNIT_ATTENTION || asc == 0xff) 388 return 0; 389 390 switch (asc) { 391 case STATE_CHANGED: 392 dev_warn(&h->pdev->dev, 393 "%s: a state change detected, command retried\n", 394 h->devname); 395 break; 396 case LUN_FAILED: 397 dev_warn(&h->pdev->dev, 398 "%s: LUN failure detected\n", h->devname); 399 break; 400 case REPORT_LUNS_CHANGED: 401 dev_warn(&h->pdev->dev, 402 "%s: report LUN data changed\n", h->devname); 403 /* 404 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 405 * target (array) devices. 406 */ 407 break; 408 case POWER_OR_RESET: 409 dev_warn(&h->pdev->dev, 410 "%s: a power on or device reset detected\n", 411 h->devname); 412 break; 413 case UNIT_ATTENTION_CLEARED: 414 dev_warn(&h->pdev->dev, 415 "%s: unit attention cleared by another initiator\n", 416 h->devname); 417 break; 418 default: 419 dev_warn(&h->pdev->dev, 420 "%s: unknown unit attention detected\n", 421 h->devname); 422 break; 423 } 424 return 1; 425 } 426 427 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 428 { 429 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 430 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 431 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 432 return 0; 433 dev_warn(&h->pdev->dev, HPSA "device busy"); 434 return 1; 435 } 436 437 static u32 lockup_detected(struct ctlr_info *h); 438 static ssize_t host_show_lockup_detected(struct device *dev, 439 struct device_attribute *attr, char *buf) 440 { 441 int ld; 442 struct ctlr_info *h; 443 struct Scsi_Host *shost = class_to_shost(dev); 444 445 h = shost_to_hba(shost); 446 ld = lockup_detected(h); 447 448 return sprintf(buf, "ld=%d\n", ld); 449 } 450 451 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 452 struct device_attribute *attr, 453 const char *buf, size_t count) 454 { 455 int status, len; 456 struct ctlr_info *h; 457 struct Scsi_Host *shost = class_to_shost(dev); 458 char tmpbuf[10]; 459 460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 461 return -EACCES; 462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 463 strncpy(tmpbuf, buf, len); 464 tmpbuf[len] = '\0'; 465 if (sscanf(tmpbuf, "%d", &status) != 1) 466 return -EINVAL; 467 h = shost_to_hba(shost); 468 h->acciopath_status = !!status; 469 dev_warn(&h->pdev->dev, 470 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 471 h->acciopath_status ? "enabled" : "disabled"); 472 return count; 473 } 474 475 static ssize_t host_store_raid_offload_debug(struct device *dev, 476 struct device_attribute *attr, 477 const char *buf, size_t count) 478 { 479 int debug_level, len; 480 struct ctlr_info *h; 481 struct Scsi_Host *shost = class_to_shost(dev); 482 char tmpbuf[10]; 483 484 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 485 return -EACCES; 486 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 487 strncpy(tmpbuf, buf, len); 488 tmpbuf[len] = '\0'; 489 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 490 return -EINVAL; 491 if (debug_level < 0) 492 debug_level = 0; 493 h = shost_to_hba(shost); 494 h->raid_offload_debug = debug_level; 495 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 496 h->raid_offload_debug); 497 return count; 498 } 499 500 static ssize_t host_store_rescan(struct device *dev, 501 struct device_attribute *attr, 502 const char *buf, size_t count) 503 { 504 struct ctlr_info *h; 505 struct Scsi_Host *shost = class_to_shost(dev); 506 h = shost_to_hba(shost); 507 hpsa_scan_start(h->scsi_host); 508 return count; 509 } 510 511 static ssize_t host_show_firmware_revision(struct device *dev, 512 struct device_attribute *attr, char *buf) 513 { 514 struct ctlr_info *h; 515 struct Scsi_Host *shost = class_to_shost(dev); 516 unsigned char *fwrev; 517 518 h = shost_to_hba(shost); 519 if (!h->hba_inquiry_data) 520 return 0; 521 fwrev = &h->hba_inquiry_data[32]; 522 return snprintf(buf, 20, "%c%c%c%c\n", 523 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 524 } 525 526 static ssize_t host_show_commands_outstanding(struct device *dev, 527 struct device_attribute *attr, char *buf) 528 { 529 struct Scsi_Host *shost = class_to_shost(dev); 530 struct ctlr_info *h = shost_to_hba(shost); 531 532 return snprintf(buf, 20, "%d\n", 533 atomic_read(&h->commands_outstanding)); 534 } 535 536 static ssize_t host_show_transport_mode(struct device *dev, 537 struct device_attribute *attr, char *buf) 538 { 539 struct ctlr_info *h; 540 struct Scsi_Host *shost = class_to_shost(dev); 541 542 h = shost_to_hba(shost); 543 return snprintf(buf, 20, "%s\n", 544 h->transMethod & CFGTBL_Trans_Performant ? 545 "performant" : "simple"); 546 } 547 548 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 549 struct device_attribute *attr, char *buf) 550 { 551 struct ctlr_info *h; 552 struct Scsi_Host *shost = class_to_shost(dev); 553 554 h = shost_to_hba(shost); 555 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 556 (h->acciopath_status == 1) ? "enabled" : "disabled"); 557 } 558 559 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 560 static u32 unresettable_controller[] = { 561 0x324a103C, /* Smart Array P712m */ 562 0x324b103C, /* Smart Array P711m */ 563 0x3223103C, /* Smart Array P800 */ 564 0x3234103C, /* Smart Array P400 */ 565 0x3235103C, /* Smart Array P400i */ 566 0x3211103C, /* Smart Array E200i */ 567 0x3212103C, /* Smart Array E200 */ 568 0x3213103C, /* Smart Array E200i */ 569 0x3214103C, /* Smart Array E200i */ 570 0x3215103C, /* Smart Array E200i */ 571 0x3237103C, /* Smart Array E500 */ 572 0x323D103C, /* Smart Array P700m */ 573 0x40800E11, /* Smart Array 5i */ 574 0x409C0E11, /* Smart Array 6400 */ 575 0x409D0E11, /* Smart Array 6400 EM */ 576 0x40700E11, /* Smart Array 5300 */ 577 0x40820E11, /* Smart Array 532 */ 578 0x40830E11, /* Smart Array 5312 */ 579 0x409A0E11, /* Smart Array 641 */ 580 0x409B0E11, /* Smart Array 642 */ 581 0x40910E11, /* Smart Array 6i */ 582 }; 583 584 /* List of controllers which cannot even be soft reset */ 585 static u32 soft_unresettable_controller[] = { 586 0x40800E11, /* Smart Array 5i */ 587 0x40700E11, /* Smart Array 5300 */ 588 0x40820E11, /* Smart Array 532 */ 589 0x40830E11, /* Smart Array 5312 */ 590 0x409A0E11, /* Smart Array 641 */ 591 0x409B0E11, /* Smart Array 642 */ 592 0x40910E11, /* Smart Array 6i */ 593 /* Exclude 640x boards. These are two pci devices in one slot 594 * which share a battery backed cache module. One controls the 595 * cache, the other accesses the cache through the one that controls 596 * it. If we reset the one controlling the cache, the other will 597 * likely not be happy. Just forbid resetting this conjoined mess. 598 * The 640x isn't really supported by hpsa anyway. 599 */ 600 0x409C0E11, /* Smart Array 6400 */ 601 0x409D0E11, /* Smart Array 6400 EM */ 602 }; 603 604 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 605 { 606 int i; 607 608 for (i = 0; i < nelems; i++) 609 if (a[i] == board_id) 610 return 1; 611 return 0; 612 } 613 614 static int ctlr_is_hard_resettable(u32 board_id) 615 { 616 return !board_id_in_array(unresettable_controller, 617 ARRAY_SIZE(unresettable_controller), board_id); 618 } 619 620 static int ctlr_is_soft_resettable(u32 board_id) 621 { 622 return !board_id_in_array(soft_unresettable_controller, 623 ARRAY_SIZE(soft_unresettable_controller), board_id); 624 } 625 626 static int ctlr_is_resettable(u32 board_id) 627 { 628 return ctlr_is_hard_resettable(board_id) || 629 ctlr_is_soft_resettable(board_id); 630 } 631 632 static ssize_t host_show_resettable(struct device *dev, 633 struct device_attribute *attr, char *buf) 634 { 635 struct ctlr_info *h; 636 struct Scsi_Host *shost = class_to_shost(dev); 637 638 h = shost_to_hba(shost); 639 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 640 } 641 642 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 643 { 644 return (scsi3addr[3] & 0xC0) == 0x40; 645 } 646 647 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 648 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 649 }; 650 #define HPSA_RAID_0 0 651 #define HPSA_RAID_4 1 652 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 653 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 654 #define HPSA_RAID_51 4 655 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 656 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 657 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 658 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 659 660 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 661 { 662 return !device->physical_device; 663 } 664 665 static ssize_t raid_level_show(struct device *dev, 666 struct device_attribute *attr, char *buf) 667 { 668 ssize_t l = 0; 669 unsigned char rlevel; 670 struct ctlr_info *h; 671 struct scsi_device *sdev; 672 struct hpsa_scsi_dev_t *hdev; 673 unsigned long flags; 674 675 sdev = to_scsi_device(dev); 676 h = sdev_to_hba(sdev); 677 spin_lock_irqsave(&h->lock, flags); 678 hdev = sdev->hostdata; 679 if (!hdev) { 680 spin_unlock_irqrestore(&h->lock, flags); 681 return -ENODEV; 682 } 683 684 /* Is this even a logical drive? */ 685 if (!is_logical_device(hdev)) { 686 spin_unlock_irqrestore(&h->lock, flags); 687 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 688 return l; 689 } 690 691 rlevel = hdev->raid_level; 692 spin_unlock_irqrestore(&h->lock, flags); 693 if (rlevel > RAID_UNKNOWN) 694 rlevel = RAID_UNKNOWN; 695 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 696 return l; 697 } 698 699 static ssize_t lunid_show(struct device *dev, 700 struct device_attribute *attr, char *buf) 701 { 702 struct ctlr_info *h; 703 struct scsi_device *sdev; 704 struct hpsa_scsi_dev_t *hdev; 705 unsigned long flags; 706 unsigned char lunid[8]; 707 708 sdev = to_scsi_device(dev); 709 h = sdev_to_hba(sdev); 710 spin_lock_irqsave(&h->lock, flags); 711 hdev = sdev->hostdata; 712 if (!hdev) { 713 spin_unlock_irqrestore(&h->lock, flags); 714 return -ENODEV; 715 } 716 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 717 spin_unlock_irqrestore(&h->lock, flags); 718 return snprintf(buf, 20, "0x%8phN\n", lunid); 719 } 720 721 static ssize_t unique_id_show(struct device *dev, 722 struct device_attribute *attr, char *buf) 723 { 724 struct ctlr_info *h; 725 struct scsi_device *sdev; 726 struct hpsa_scsi_dev_t *hdev; 727 unsigned long flags; 728 unsigned char sn[16]; 729 730 sdev = to_scsi_device(dev); 731 h = sdev_to_hba(sdev); 732 spin_lock_irqsave(&h->lock, flags); 733 hdev = sdev->hostdata; 734 if (!hdev) { 735 spin_unlock_irqrestore(&h->lock, flags); 736 return -ENODEV; 737 } 738 memcpy(sn, hdev->device_id, sizeof(sn)); 739 spin_unlock_irqrestore(&h->lock, flags); 740 return snprintf(buf, 16 * 2 + 2, 741 "%02X%02X%02X%02X%02X%02X%02X%02X" 742 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 743 sn[0], sn[1], sn[2], sn[3], 744 sn[4], sn[5], sn[6], sn[7], 745 sn[8], sn[9], sn[10], sn[11], 746 sn[12], sn[13], sn[14], sn[15]); 747 } 748 749 static ssize_t sas_address_show(struct device *dev, 750 struct device_attribute *attr, char *buf) 751 { 752 struct ctlr_info *h; 753 struct scsi_device *sdev; 754 struct hpsa_scsi_dev_t *hdev; 755 unsigned long flags; 756 u64 sas_address; 757 758 sdev = to_scsi_device(dev); 759 h = sdev_to_hba(sdev); 760 spin_lock_irqsave(&h->lock, flags); 761 hdev = sdev->hostdata; 762 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 763 spin_unlock_irqrestore(&h->lock, flags); 764 return -ENODEV; 765 } 766 sas_address = hdev->sas_address; 767 spin_unlock_irqrestore(&h->lock, flags); 768 769 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 770 } 771 772 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 773 struct device_attribute *attr, char *buf) 774 { 775 struct ctlr_info *h; 776 struct scsi_device *sdev; 777 struct hpsa_scsi_dev_t *hdev; 778 unsigned long flags; 779 int offload_enabled; 780 781 sdev = to_scsi_device(dev); 782 h = sdev_to_hba(sdev); 783 spin_lock_irqsave(&h->lock, flags); 784 hdev = sdev->hostdata; 785 if (!hdev) { 786 spin_unlock_irqrestore(&h->lock, flags); 787 return -ENODEV; 788 } 789 offload_enabled = hdev->offload_enabled; 790 spin_unlock_irqrestore(&h->lock, flags); 791 792 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 793 return snprintf(buf, 20, "%d\n", offload_enabled); 794 else 795 return snprintf(buf, 40, "%s\n", 796 "Not applicable for a controller"); 797 } 798 799 #define MAX_PATHS 8 800 static ssize_t path_info_show(struct device *dev, 801 struct device_attribute *attr, char *buf) 802 { 803 struct ctlr_info *h; 804 struct scsi_device *sdev; 805 struct hpsa_scsi_dev_t *hdev; 806 unsigned long flags; 807 int i; 808 int output_len = 0; 809 u8 box; 810 u8 bay; 811 u8 path_map_index = 0; 812 char *active; 813 unsigned char phys_connector[2]; 814 815 sdev = to_scsi_device(dev); 816 h = sdev_to_hba(sdev); 817 spin_lock_irqsave(&h->devlock, flags); 818 hdev = sdev->hostdata; 819 if (!hdev) { 820 spin_unlock_irqrestore(&h->devlock, flags); 821 return -ENODEV; 822 } 823 824 bay = hdev->bay; 825 for (i = 0; i < MAX_PATHS; i++) { 826 path_map_index = 1<<i; 827 if (i == hdev->active_path_index) 828 active = "Active"; 829 else if (hdev->path_map & path_map_index) 830 active = "Inactive"; 831 else 832 continue; 833 834 output_len += scnprintf(buf + output_len, 835 PAGE_SIZE - output_len, 836 "[%d:%d:%d:%d] %20.20s ", 837 h->scsi_host->host_no, 838 hdev->bus, hdev->target, hdev->lun, 839 scsi_device_type(hdev->devtype)); 840 841 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 842 output_len += scnprintf(buf + output_len, 843 PAGE_SIZE - output_len, 844 "%s\n", active); 845 continue; 846 } 847 848 box = hdev->box[i]; 849 memcpy(&phys_connector, &hdev->phys_connector[i], 850 sizeof(phys_connector)); 851 if (phys_connector[0] < '0') 852 phys_connector[0] = '0'; 853 if (phys_connector[1] < '0') 854 phys_connector[1] = '0'; 855 output_len += scnprintf(buf + output_len, 856 PAGE_SIZE - output_len, 857 "PORT: %.2s ", 858 phys_connector); 859 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 860 hdev->expose_device) { 861 if (box == 0 || box == 0xFF) { 862 output_len += scnprintf(buf + output_len, 863 PAGE_SIZE - output_len, 864 "BAY: %hhu %s\n", 865 bay, active); 866 } else { 867 output_len += scnprintf(buf + output_len, 868 PAGE_SIZE - output_len, 869 "BOX: %hhu BAY: %hhu %s\n", 870 box, bay, active); 871 } 872 } else if (box != 0 && box != 0xFF) { 873 output_len += scnprintf(buf + output_len, 874 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 875 box, active); 876 } else 877 output_len += scnprintf(buf + output_len, 878 PAGE_SIZE - output_len, "%s\n", active); 879 } 880 881 spin_unlock_irqrestore(&h->devlock, flags); 882 return output_len; 883 } 884 885 static ssize_t host_show_ctlr_num(struct device *dev, 886 struct device_attribute *attr, char *buf) 887 { 888 struct ctlr_info *h; 889 struct Scsi_Host *shost = class_to_shost(dev); 890 891 h = shost_to_hba(shost); 892 return snprintf(buf, 20, "%d\n", h->ctlr); 893 } 894 895 static ssize_t host_show_legacy_board(struct device *dev, 896 struct device_attribute *attr, char *buf) 897 { 898 struct ctlr_info *h; 899 struct Scsi_Host *shost = class_to_shost(dev); 900 901 h = shost_to_hba(shost); 902 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 903 } 904 905 static DEVICE_ATTR_RO(raid_level); 906 static DEVICE_ATTR_RO(lunid); 907 static DEVICE_ATTR_RO(unique_id); 908 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 909 static DEVICE_ATTR_RO(sas_address); 910 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 911 host_show_hp_ssd_smart_path_enabled, NULL); 912 static DEVICE_ATTR_RO(path_info); 913 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 914 host_show_hp_ssd_smart_path_status, 915 host_store_hp_ssd_smart_path_status); 916 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 917 host_store_raid_offload_debug); 918 static DEVICE_ATTR(firmware_revision, S_IRUGO, 919 host_show_firmware_revision, NULL); 920 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 921 host_show_commands_outstanding, NULL); 922 static DEVICE_ATTR(transport_mode, S_IRUGO, 923 host_show_transport_mode, NULL); 924 static DEVICE_ATTR(resettable, S_IRUGO, 925 host_show_resettable, NULL); 926 static DEVICE_ATTR(lockup_detected, S_IRUGO, 927 host_show_lockup_detected, NULL); 928 static DEVICE_ATTR(ctlr_num, S_IRUGO, 929 host_show_ctlr_num, NULL); 930 static DEVICE_ATTR(legacy_board, S_IRUGO, 931 host_show_legacy_board, NULL); 932 933 static struct device_attribute *hpsa_sdev_attrs[] = { 934 &dev_attr_raid_level, 935 &dev_attr_lunid, 936 &dev_attr_unique_id, 937 &dev_attr_hp_ssd_smart_path_enabled, 938 &dev_attr_path_info, 939 &dev_attr_sas_address, 940 NULL, 941 }; 942 943 static struct device_attribute *hpsa_shost_attrs[] = { 944 &dev_attr_rescan, 945 &dev_attr_firmware_revision, 946 &dev_attr_commands_outstanding, 947 &dev_attr_transport_mode, 948 &dev_attr_resettable, 949 &dev_attr_hp_ssd_smart_path_status, 950 &dev_attr_raid_offload_debug, 951 &dev_attr_lockup_detected, 952 &dev_attr_ctlr_num, 953 &dev_attr_legacy_board, 954 NULL, 955 }; 956 957 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 958 HPSA_MAX_CONCURRENT_PASSTHRUS) 959 960 static struct scsi_host_template hpsa_driver_template = { 961 .module = THIS_MODULE, 962 .name = HPSA, 963 .proc_name = HPSA, 964 .queuecommand = hpsa_scsi_queue_command, 965 .scan_start = hpsa_scan_start, 966 .scan_finished = hpsa_scan_finished, 967 .change_queue_depth = hpsa_change_queue_depth, 968 .this_id = -1, 969 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 970 .ioctl = hpsa_ioctl, 971 .slave_alloc = hpsa_slave_alloc, 972 .slave_configure = hpsa_slave_configure, 973 .slave_destroy = hpsa_slave_destroy, 974 #ifdef CONFIG_COMPAT 975 .compat_ioctl = hpsa_compat_ioctl, 976 #endif 977 .sdev_attrs = hpsa_sdev_attrs, 978 .shost_attrs = hpsa_shost_attrs, 979 .max_sectors = 2048, 980 .no_write_same = 1, 981 }; 982 983 static inline u32 next_command(struct ctlr_info *h, u8 q) 984 { 985 u32 a; 986 struct reply_queue_buffer *rq = &h->reply_queue[q]; 987 988 if (h->transMethod & CFGTBL_Trans_io_accel1) 989 return h->access.command_completed(h, q); 990 991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 992 return h->access.command_completed(h, q); 993 994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 995 a = rq->head[rq->current_entry]; 996 rq->current_entry++; 997 atomic_dec(&h->commands_outstanding); 998 } else { 999 a = FIFO_EMPTY; 1000 } 1001 /* Check for wraparound */ 1002 if (rq->current_entry == h->max_commands) { 1003 rq->current_entry = 0; 1004 rq->wraparound ^= 1; 1005 } 1006 return a; 1007 } 1008 1009 /* 1010 * There are some special bits in the bus address of the 1011 * command that we have to set for the controller to know 1012 * how to process the command: 1013 * 1014 * Normal performant mode: 1015 * bit 0: 1 means performant mode, 0 means simple mode. 1016 * bits 1-3 = block fetch table entry 1017 * bits 4-6 = command type (== 0) 1018 * 1019 * ioaccel1 mode: 1020 * bit 0 = "performant mode" bit. 1021 * bits 1-3 = block fetch table entry 1022 * bits 4-6 = command type (== 110) 1023 * (command type is needed because ioaccel1 mode 1024 * commands are submitted through the same register as normal 1025 * mode commands, so this is how the controller knows whether 1026 * the command is normal mode or ioaccel1 mode.) 1027 * 1028 * ioaccel2 mode: 1029 * bit 0 = "performant mode" bit. 1030 * bits 1-4 = block fetch table entry (note extra bit) 1031 * bits 4-6 = not needed, because ioaccel2 mode has 1032 * a separate special register for submitting commands. 1033 */ 1034 1035 /* 1036 * set_performant_mode: Modify the tag for cciss performant 1037 * set bit 0 for pull model, bits 3-1 for block fetch 1038 * register number 1039 */ 1040 #define DEFAULT_REPLY_QUEUE (-1) 1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1042 int reply_queue) 1043 { 1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1046 if (unlikely(!h->msix_vectors)) 1047 return; 1048 c->Header.ReplyQueue = reply_queue; 1049 } 1050 } 1051 1052 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1053 struct CommandList *c, 1054 int reply_queue) 1055 { 1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1057 1058 /* 1059 * Tell the controller to post the reply to the queue for this 1060 * processor. This seems to give the best I/O throughput. 1061 */ 1062 cp->ReplyQueue = reply_queue; 1063 /* 1064 * Set the bits in the address sent down to include: 1065 * - performant mode bit (bit 0) 1066 * - pull count (bits 1-3) 1067 * - command type (bits 4-6) 1068 */ 1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1070 IOACCEL1_BUSADDR_CMDTYPE; 1071 } 1072 1073 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1074 struct CommandList *c, 1075 int reply_queue) 1076 { 1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1078 &h->ioaccel2_cmd_pool[c->cmdindex]; 1079 1080 /* Tell the controller to post the reply to the queue for this 1081 * processor. This seems to give the best I/O throughput. 1082 */ 1083 cp->reply_queue = reply_queue; 1084 /* Set the bits in the address sent down to include: 1085 * - performant mode bit not used in ioaccel mode 2 1086 * - pull count (bits 0-3) 1087 * - command type isn't needed for ioaccel2 1088 */ 1089 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1090 } 1091 1092 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1093 struct CommandList *c, 1094 int reply_queue) 1095 { 1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1097 1098 /* 1099 * Tell the controller to post the reply to the queue for this 1100 * processor. This seems to give the best I/O throughput. 1101 */ 1102 cp->reply_queue = reply_queue; 1103 /* 1104 * Set the bits in the address sent down to include: 1105 * - performant mode bit not used in ioaccel mode 2 1106 * - pull count (bits 0-3) 1107 * - command type isn't needed for ioaccel2 1108 */ 1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1110 } 1111 1112 static int is_firmware_flash_cmd(u8 *cdb) 1113 { 1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1115 } 1116 1117 /* 1118 * During firmware flash, the heartbeat register may not update as frequently 1119 * as it should. So we dial down lockup detection during firmware flash. and 1120 * dial it back up when firmware flash completes. 1121 */ 1122 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1123 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1124 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1125 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1126 struct CommandList *c) 1127 { 1128 if (!is_firmware_flash_cmd(c->Request.CDB)) 1129 return; 1130 atomic_inc(&h->firmware_flash_in_progress); 1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1132 } 1133 1134 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1135 struct CommandList *c) 1136 { 1137 if (is_firmware_flash_cmd(c->Request.CDB) && 1138 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1140 } 1141 1142 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1143 struct CommandList *c, int reply_queue) 1144 { 1145 dial_down_lockup_detection_during_fw_flash(h, c); 1146 atomic_inc(&h->commands_outstanding); 1147 1148 reply_queue = h->reply_map[raw_smp_processor_id()]; 1149 switch (c->cmd_type) { 1150 case CMD_IOACCEL1: 1151 set_ioaccel1_performant_mode(h, c, reply_queue); 1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1153 break; 1154 case CMD_IOACCEL2: 1155 set_ioaccel2_performant_mode(h, c, reply_queue); 1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1157 break; 1158 case IOACCEL2_TMF: 1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1161 break; 1162 default: 1163 set_performant_mode(h, c, reply_queue); 1164 h->access.submit_command(h, c); 1165 } 1166 } 1167 1168 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1169 { 1170 if (unlikely(hpsa_is_pending_event(c))) 1171 return finish_cmd(c); 1172 1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1174 } 1175 1176 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1177 { 1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1179 } 1180 1181 static inline int is_scsi_rev_5(struct ctlr_info *h) 1182 { 1183 if (!h->hba_inquiry_data) 1184 return 0; 1185 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1186 return 1; 1187 return 0; 1188 } 1189 1190 static int hpsa_find_target_lun(struct ctlr_info *h, 1191 unsigned char scsi3addr[], int bus, int *target, int *lun) 1192 { 1193 /* finds an unused bus, target, lun for a new physical device 1194 * assumes h->devlock is held 1195 */ 1196 int i, found = 0; 1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1198 1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1200 1201 for (i = 0; i < h->ndevices; i++) { 1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1203 __set_bit(h->dev[i]->target, lun_taken); 1204 } 1205 1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1207 if (i < HPSA_MAX_DEVICES) { 1208 /* *bus = 1; */ 1209 *target = i; 1210 *lun = 0; 1211 found = 1; 1212 } 1213 return !found; 1214 } 1215 1216 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1217 struct hpsa_scsi_dev_t *dev, char *description) 1218 { 1219 #define LABEL_SIZE 25 1220 char label[LABEL_SIZE]; 1221 1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1223 return; 1224 1225 switch (dev->devtype) { 1226 case TYPE_RAID: 1227 snprintf(label, LABEL_SIZE, "controller"); 1228 break; 1229 case TYPE_ENCLOSURE: 1230 snprintf(label, LABEL_SIZE, "enclosure"); 1231 break; 1232 case TYPE_DISK: 1233 case TYPE_ZBC: 1234 if (dev->external) 1235 snprintf(label, LABEL_SIZE, "external"); 1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1237 snprintf(label, LABEL_SIZE, "%s", 1238 raid_label[PHYSICAL_DRIVE]); 1239 else 1240 snprintf(label, LABEL_SIZE, "RAID-%s", 1241 dev->raid_level > RAID_UNKNOWN ? "?" : 1242 raid_label[dev->raid_level]); 1243 break; 1244 case TYPE_ROM: 1245 snprintf(label, LABEL_SIZE, "rom"); 1246 break; 1247 case TYPE_TAPE: 1248 snprintf(label, LABEL_SIZE, "tape"); 1249 break; 1250 case TYPE_MEDIUM_CHANGER: 1251 snprintf(label, LABEL_SIZE, "changer"); 1252 break; 1253 default: 1254 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1255 break; 1256 } 1257 1258 dev_printk(level, &h->pdev->dev, 1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1261 description, 1262 scsi_device_type(dev->devtype), 1263 dev->vendor, 1264 dev->model, 1265 label, 1266 dev->offload_config ? '+' : '-', 1267 dev->offload_to_be_enabled ? '+' : '-', 1268 dev->expose_device); 1269 } 1270 1271 /* Add an entry into h->dev[] array. */ 1272 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1273 struct hpsa_scsi_dev_t *device, 1274 struct hpsa_scsi_dev_t *added[], int *nadded) 1275 { 1276 /* assumes h->devlock is held */ 1277 int n = h->ndevices; 1278 int i; 1279 unsigned char addr1[8], addr2[8]; 1280 struct hpsa_scsi_dev_t *sd; 1281 1282 if (n >= HPSA_MAX_DEVICES) { 1283 dev_err(&h->pdev->dev, "too many devices, some will be " 1284 "inaccessible.\n"); 1285 return -1; 1286 } 1287 1288 /* physical devices do not have lun or target assigned until now. */ 1289 if (device->lun != -1) 1290 /* Logical device, lun is already assigned. */ 1291 goto lun_assigned; 1292 1293 /* If this device a non-zero lun of a multi-lun device 1294 * byte 4 of the 8-byte LUN addr will contain the logical 1295 * unit no, zero otherwise. 1296 */ 1297 if (device->scsi3addr[4] == 0) { 1298 /* This is not a non-zero lun of a multi-lun device */ 1299 if (hpsa_find_target_lun(h, device->scsi3addr, 1300 device->bus, &device->target, &device->lun) != 0) 1301 return -1; 1302 goto lun_assigned; 1303 } 1304 1305 /* This is a non-zero lun of a multi-lun device. 1306 * Search through our list and find the device which 1307 * has the same 8 byte LUN address, excepting byte 4 and 5. 1308 * Assign the same bus and target for this new LUN. 1309 * Use the logical unit number from the firmware. 1310 */ 1311 memcpy(addr1, device->scsi3addr, 8); 1312 addr1[4] = 0; 1313 addr1[5] = 0; 1314 for (i = 0; i < n; i++) { 1315 sd = h->dev[i]; 1316 memcpy(addr2, sd->scsi3addr, 8); 1317 addr2[4] = 0; 1318 addr2[5] = 0; 1319 /* differ only in byte 4 and 5? */ 1320 if (memcmp(addr1, addr2, 8) == 0) { 1321 device->bus = sd->bus; 1322 device->target = sd->target; 1323 device->lun = device->scsi3addr[4]; 1324 break; 1325 } 1326 } 1327 if (device->lun == -1) { 1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1329 " suspect firmware bug or unsupported hardware " 1330 "configuration.\n"); 1331 return -1; 1332 } 1333 1334 lun_assigned: 1335 1336 h->dev[n] = device; 1337 h->ndevices++; 1338 added[*nadded] = device; 1339 (*nadded)++; 1340 hpsa_show_dev_msg(KERN_INFO, h, device, 1341 device->expose_device ? "added" : "masked"); 1342 return 0; 1343 } 1344 1345 /* 1346 * Called during a scan operation. 1347 * 1348 * Update an entry in h->dev[] array. 1349 */ 1350 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1351 int entry, struct hpsa_scsi_dev_t *new_entry) 1352 { 1353 /* assumes h->devlock is held */ 1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1355 1356 /* Raid level changed. */ 1357 h->dev[entry]->raid_level = new_entry->raid_level; 1358 1359 /* 1360 * ioacccel_handle may have changed for a dual domain disk 1361 */ 1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1363 1364 /* Raid offload parameters changed. Careful about the ordering. */ 1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 1366 /* 1367 * if drive is newly offload_enabled, we want to copy the 1368 * raid map data first. If previously offload_enabled and 1369 * offload_config were set, raid map data had better be 1370 * the same as it was before. If raid map data has changed 1371 * then it had better be the case that 1372 * h->dev[entry]->offload_enabled is currently 0. 1373 */ 1374 h->dev[entry]->raid_map = new_entry->raid_map; 1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1376 } 1377 if (new_entry->offload_to_be_enabled) { 1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1379 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1380 } 1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1382 h->dev[entry]->offload_config = new_entry->offload_config; 1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1384 h->dev[entry]->queue_depth = new_entry->queue_depth; 1385 1386 /* 1387 * We can turn off ioaccel offload now, but need to delay turning 1388 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 1389 * can't do that until all the devices are updated. 1390 */ 1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1392 1393 /* 1394 * turn ioaccel off immediately if told to do so. 1395 */ 1396 if (!new_entry->offload_to_be_enabled) 1397 h->dev[entry]->offload_enabled = 0; 1398 1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1400 } 1401 1402 /* Replace an entry from h->dev[] array. */ 1403 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1404 int entry, struct hpsa_scsi_dev_t *new_entry, 1405 struct hpsa_scsi_dev_t *added[], int *nadded, 1406 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1407 { 1408 /* assumes h->devlock is held */ 1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1410 removed[*nremoved] = h->dev[entry]; 1411 (*nremoved)++; 1412 1413 /* 1414 * New physical devices won't have target/lun assigned yet 1415 * so we need to preserve the values in the slot we are replacing. 1416 */ 1417 if (new_entry->target == -1) { 1418 new_entry->target = h->dev[entry]->target; 1419 new_entry->lun = h->dev[entry]->lun; 1420 } 1421 1422 h->dev[entry] = new_entry; 1423 added[*nadded] = new_entry; 1424 (*nadded)++; 1425 1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1427 } 1428 1429 /* Remove an entry from h->dev[] array. */ 1430 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1431 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1432 { 1433 /* assumes h->devlock is held */ 1434 int i; 1435 struct hpsa_scsi_dev_t *sd; 1436 1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1438 1439 sd = h->dev[entry]; 1440 removed[*nremoved] = h->dev[entry]; 1441 (*nremoved)++; 1442 1443 for (i = entry; i < h->ndevices-1; i++) 1444 h->dev[i] = h->dev[i+1]; 1445 h->ndevices--; 1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1447 } 1448 1449 #define SCSI3ADDR_EQ(a, b) ( \ 1450 (a)[7] == (b)[7] && \ 1451 (a)[6] == (b)[6] && \ 1452 (a)[5] == (b)[5] && \ 1453 (a)[4] == (b)[4] && \ 1454 (a)[3] == (b)[3] && \ 1455 (a)[2] == (b)[2] && \ 1456 (a)[1] == (b)[1] && \ 1457 (a)[0] == (b)[0]) 1458 1459 static void fixup_botched_add(struct ctlr_info *h, 1460 struct hpsa_scsi_dev_t *added) 1461 { 1462 /* called when scsi_add_device fails in order to re-adjust 1463 * h->dev[] to match the mid layer's view. 1464 */ 1465 unsigned long flags; 1466 int i, j; 1467 1468 spin_lock_irqsave(&h->lock, flags); 1469 for (i = 0; i < h->ndevices; i++) { 1470 if (h->dev[i] == added) { 1471 for (j = i; j < h->ndevices-1; j++) 1472 h->dev[j] = h->dev[j+1]; 1473 h->ndevices--; 1474 break; 1475 } 1476 } 1477 spin_unlock_irqrestore(&h->lock, flags); 1478 kfree(added); 1479 } 1480 1481 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1482 struct hpsa_scsi_dev_t *dev2) 1483 { 1484 /* we compare everything except lun and target as these 1485 * are not yet assigned. Compare parts likely 1486 * to differ first 1487 */ 1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1489 sizeof(dev1->scsi3addr)) != 0) 1490 return 0; 1491 if (memcmp(dev1->device_id, dev2->device_id, 1492 sizeof(dev1->device_id)) != 0) 1493 return 0; 1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1495 return 0; 1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1497 return 0; 1498 if (dev1->devtype != dev2->devtype) 1499 return 0; 1500 if (dev1->bus != dev2->bus) 1501 return 0; 1502 return 1; 1503 } 1504 1505 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1506 struct hpsa_scsi_dev_t *dev2) 1507 { 1508 /* Device attributes that can change, but don't mean 1509 * that the device is a different device, nor that the OS 1510 * needs to be told anything about the change. 1511 */ 1512 if (dev1->raid_level != dev2->raid_level) 1513 return 1; 1514 if (dev1->offload_config != dev2->offload_config) 1515 return 1; 1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1517 return 1; 1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1519 if (dev1->queue_depth != dev2->queue_depth) 1520 return 1; 1521 /* 1522 * This can happen for dual domain devices. An active 1523 * path change causes the ioaccel handle to change 1524 * 1525 * for example note the handle differences between p0 and p1 1526 * Device WWN ,WWN hash,Handle 1527 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1528 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1529 */ 1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1531 return 1; 1532 return 0; 1533 } 1534 1535 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1536 * and return needle location in *index. If scsi3addr matches, but not 1537 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1538 * location in *index. 1539 * In the case of a minor device attribute change, such as RAID level, just 1540 * return DEVICE_UPDATED, along with the updated device's location in index. 1541 * If needle not found, return DEVICE_NOT_FOUND. 1542 */ 1543 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1545 int *index) 1546 { 1547 int i; 1548 #define DEVICE_NOT_FOUND 0 1549 #define DEVICE_CHANGED 1 1550 #define DEVICE_SAME 2 1551 #define DEVICE_UPDATED 3 1552 if (needle == NULL) 1553 return DEVICE_NOT_FOUND; 1554 1555 for (i = 0; i < haystack_size; i++) { 1556 if (haystack[i] == NULL) /* previously removed. */ 1557 continue; 1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1559 *index = i; 1560 if (device_is_the_same(needle, haystack[i])) { 1561 if (device_updated(needle, haystack[i])) 1562 return DEVICE_UPDATED; 1563 return DEVICE_SAME; 1564 } else { 1565 /* Keep offline devices offline */ 1566 if (needle->volume_offline) 1567 return DEVICE_NOT_FOUND; 1568 return DEVICE_CHANGED; 1569 } 1570 } 1571 } 1572 *index = -1; 1573 return DEVICE_NOT_FOUND; 1574 } 1575 1576 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1577 unsigned char scsi3addr[]) 1578 { 1579 struct offline_device_entry *device; 1580 unsigned long flags; 1581 1582 /* Check to see if device is already on the list */ 1583 spin_lock_irqsave(&h->offline_device_lock, flags); 1584 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1585 if (memcmp(device->scsi3addr, scsi3addr, 1586 sizeof(device->scsi3addr)) == 0) { 1587 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1588 return; 1589 } 1590 } 1591 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1592 1593 /* Device is not on the list, add it. */ 1594 device = kmalloc(sizeof(*device), GFP_KERNEL); 1595 if (!device) 1596 return; 1597 1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1599 spin_lock_irqsave(&h->offline_device_lock, flags); 1600 list_add_tail(&device->offline_list, &h->offline_device_list); 1601 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1602 } 1603 1604 /* Print a message explaining various offline volume states */ 1605 static void hpsa_show_volume_status(struct ctlr_info *h, 1606 struct hpsa_scsi_dev_t *sd) 1607 { 1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1609 dev_info(&h->pdev->dev, 1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1611 h->scsi_host->host_no, 1612 sd->bus, sd->target, sd->lun); 1613 switch (sd->volume_offline) { 1614 case HPSA_LV_OK: 1615 break; 1616 case HPSA_LV_UNDERGOING_ERASE: 1617 dev_info(&h->pdev->dev, 1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1619 h->scsi_host->host_no, 1620 sd->bus, sd->target, sd->lun); 1621 break; 1622 case HPSA_LV_NOT_AVAILABLE: 1623 dev_info(&h->pdev->dev, 1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1625 h->scsi_host->host_no, 1626 sd->bus, sd->target, sd->lun); 1627 break; 1628 case HPSA_LV_UNDERGOING_RPI: 1629 dev_info(&h->pdev->dev, 1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1631 h->scsi_host->host_no, 1632 sd->bus, sd->target, sd->lun); 1633 break; 1634 case HPSA_LV_PENDING_RPI: 1635 dev_info(&h->pdev->dev, 1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1637 h->scsi_host->host_no, 1638 sd->bus, sd->target, sd->lun); 1639 break; 1640 case HPSA_LV_ENCRYPTED_NO_KEY: 1641 dev_info(&h->pdev->dev, 1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1643 h->scsi_host->host_no, 1644 sd->bus, sd->target, sd->lun); 1645 break; 1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1647 dev_info(&h->pdev->dev, 1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1649 h->scsi_host->host_no, 1650 sd->bus, sd->target, sd->lun); 1651 break; 1652 case HPSA_LV_UNDERGOING_ENCRYPTION: 1653 dev_info(&h->pdev->dev, 1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1655 h->scsi_host->host_no, 1656 sd->bus, sd->target, sd->lun); 1657 break; 1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1659 dev_info(&h->pdev->dev, 1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1661 h->scsi_host->host_no, 1662 sd->bus, sd->target, sd->lun); 1663 break; 1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1665 dev_info(&h->pdev->dev, 1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1667 h->scsi_host->host_no, 1668 sd->bus, sd->target, sd->lun); 1669 break; 1670 case HPSA_LV_PENDING_ENCRYPTION: 1671 dev_info(&h->pdev->dev, 1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1673 h->scsi_host->host_no, 1674 sd->bus, sd->target, sd->lun); 1675 break; 1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1677 dev_info(&h->pdev->dev, 1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1679 h->scsi_host->host_no, 1680 sd->bus, sd->target, sd->lun); 1681 break; 1682 } 1683 } 1684 1685 /* 1686 * Figure the list of physical drive pointers for a logical drive with 1687 * raid offload configured. 1688 */ 1689 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1690 struct hpsa_scsi_dev_t *dev[], int ndevices, 1691 struct hpsa_scsi_dev_t *logical_drive) 1692 { 1693 struct raid_map_data *map = &logical_drive->raid_map; 1694 struct raid_map_disk_data *dd = &map->data[0]; 1695 int i, j; 1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1697 le16_to_cpu(map->metadata_disks_per_row); 1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1699 le16_to_cpu(map->layout_map_count) * 1700 total_disks_per_row; 1701 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1702 total_disks_per_row; 1703 int qdepth; 1704 1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1707 1708 logical_drive->nphysical_disks = nraid_map_entries; 1709 1710 qdepth = 0; 1711 for (i = 0; i < nraid_map_entries; i++) { 1712 logical_drive->phys_disk[i] = NULL; 1713 if (!logical_drive->offload_config) 1714 continue; 1715 for (j = 0; j < ndevices; j++) { 1716 if (dev[j] == NULL) 1717 continue; 1718 if (dev[j]->devtype != TYPE_DISK && 1719 dev[j]->devtype != TYPE_ZBC) 1720 continue; 1721 if (is_logical_device(dev[j])) 1722 continue; 1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1724 continue; 1725 1726 logical_drive->phys_disk[i] = dev[j]; 1727 if (i < nphys_disk) 1728 qdepth = min(h->nr_cmds, qdepth + 1729 logical_drive->phys_disk[i]->queue_depth); 1730 break; 1731 } 1732 1733 /* 1734 * This can happen if a physical drive is removed and 1735 * the logical drive is degraded. In that case, the RAID 1736 * map data will refer to a physical disk which isn't actually 1737 * present. And in that case offload_enabled should already 1738 * be 0, but we'll turn it off here just in case 1739 */ 1740 if (!logical_drive->phys_disk[i]) { 1741 dev_warn(&h->pdev->dev, 1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1743 __func__, 1744 h->scsi_host->host_no, logical_drive->bus, 1745 logical_drive->target, logical_drive->lun); 1746 logical_drive->offload_enabled = 0; 1747 logical_drive->offload_to_be_enabled = 0; 1748 logical_drive->queue_depth = 8; 1749 } 1750 } 1751 if (nraid_map_entries) 1752 /* 1753 * This is correct for reads, too high for full stripe writes, 1754 * way too high for partial stripe writes 1755 */ 1756 logical_drive->queue_depth = qdepth; 1757 else { 1758 if (logical_drive->external) 1759 logical_drive->queue_depth = EXTERNAL_QD; 1760 else 1761 logical_drive->queue_depth = h->nr_cmds; 1762 } 1763 } 1764 1765 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1766 struct hpsa_scsi_dev_t *dev[], int ndevices) 1767 { 1768 int i; 1769 1770 for (i = 0; i < ndevices; i++) { 1771 if (dev[i] == NULL) 1772 continue; 1773 if (dev[i]->devtype != TYPE_DISK && 1774 dev[i]->devtype != TYPE_ZBC) 1775 continue; 1776 if (!is_logical_device(dev[i])) 1777 continue; 1778 1779 /* 1780 * If offload is currently enabled, the RAID map and 1781 * phys_disk[] assignment *better* not be changing 1782 * because we would be changing ioaccel phsy_disk[] pointers 1783 * on a ioaccel volume processing I/O requests. 1784 * 1785 * If an ioaccel volume status changed, initially because it was 1786 * re-configured and thus underwent a transformation, or 1787 * a drive failed, we would have received a state change 1788 * request and ioaccel should have been turned off. When the 1789 * transformation completes, we get another state change 1790 * request to turn ioaccel back on. In this case, we need 1791 * to update the ioaccel information. 1792 * 1793 * Thus: If it is not currently enabled, but will be after 1794 * the scan completes, make sure the ioaccel pointers 1795 * are up to date. 1796 */ 1797 1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1800 } 1801 } 1802 1803 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1804 { 1805 int rc = 0; 1806 1807 if (!h->scsi_host) 1808 return 1; 1809 1810 if (is_logical_device(device)) /* RAID */ 1811 rc = scsi_add_device(h->scsi_host, device->bus, 1812 device->target, device->lun); 1813 else /* HBA */ 1814 rc = hpsa_add_sas_device(h->sas_host, device); 1815 1816 return rc; 1817 } 1818 1819 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1820 struct hpsa_scsi_dev_t *dev) 1821 { 1822 int i; 1823 int count = 0; 1824 1825 for (i = 0; i < h->nr_cmds; i++) { 1826 struct CommandList *c = h->cmd_pool + i; 1827 int refcount = atomic_inc_return(&c->refcount); 1828 1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1830 dev->scsi3addr)) { 1831 unsigned long flags; 1832 1833 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1834 if (!hpsa_is_cmd_idle(c)) 1835 ++count; 1836 spin_unlock_irqrestore(&h->lock, flags); 1837 } 1838 1839 cmd_free(h, c); 1840 } 1841 1842 return count; 1843 } 1844 1845 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1846 struct hpsa_scsi_dev_t *device) 1847 { 1848 int cmds = 0; 1849 int waits = 0; 1850 1851 while (1) { 1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1853 if (cmds == 0) 1854 break; 1855 if (++waits > 20) 1856 break; 1857 msleep(1000); 1858 } 1859 1860 if (waits > 20) 1861 dev_warn(&h->pdev->dev, 1862 "%s: removing device with %d outstanding commands!\n", 1863 __func__, cmds); 1864 } 1865 1866 static void hpsa_remove_device(struct ctlr_info *h, 1867 struct hpsa_scsi_dev_t *device) 1868 { 1869 struct scsi_device *sdev = NULL; 1870 1871 if (!h->scsi_host) 1872 return; 1873 1874 /* 1875 * Allow for commands to drain 1876 */ 1877 device->removed = 1; 1878 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1879 1880 if (is_logical_device(device)) { /* RAID */ 1881 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1882 device->target, device->lun); 1883 if (sdev) { 1884 scsi_remove_device(sdev); 1885 scsi_device_put(sdev); 1886 } else { 1887 /* 1888 * We don't expect to get here. Future commands 1889 * to this device will get a selection timeout as 1890 * if the device were gone. 1891 */ 1892 hpsa_show_dev_msg(KERN_WARNING, h, device, 1893 "didn't find device for removal."); 1894 } 1895 } else { /* HBA */ 1896 1897 hpsa_remove_sas_device(device); 1898 } 1899 } 1900 1901 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1902 struct hpsa_scsi_dev_t *sd[], int nsds) 1903 { 1904 /* sd contains scsi3 addresses and devtypes, and inquiry 1905 * data. This function takes what's in sd to be the current 1906 * reality and updates h->dev[] to reflect that reality. 1907 */ 1908 int i, entry, device_change, changes = 0; 1909 struct hpsa_scsi_dev_t *csd; 1910 unsigned long flags; 1911 struct hpsa_scsi_dev_t **added, **removed; 1912 int nadded, nremoved; 1913 1914 /* 1915 * A reset can cause a device status to change 1916 * re-schedule the scan to see what happened. 1917 */ 1918 spin_lock_irqsave(&h->reset_lock, flags); 1919 if (h->reset_in_progress) { 1920 h->drv_req_rescan = 1; 1921 spin_unlock_irqrestore(&h->reset_lock, flags); 1922 return; 1923 } 1924 spin_unlock_irqrestore(&h->reset_lock, flags); 1925 1926 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 1927 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1928 1929 if (!added || !removed) { 1930 dev_warn(&h->pdev->dev, "out of memory in " 1931 "adjust_hpsa_scsi_table\n"); 1932 goto free_and_out; 1933 } 1934 1935 spin_lock_irqsave(&h->devlock, flags); 1936 1937 /* find any devices in h->dev[] that are not in 1938 * sd[] and remove them from h->dev[], and for any 1939 * devices which have changed, remove the old device 1940 * info and add the new device info. 1941 * If minor device attributes change, just update 1942 * the existing device structure. 1943 */ 1944 i = 0; 1945 nremoved = 0; 1946 nadded = 0; 1947 while (i < h->ndevices) { 1948 csd = h->dev[i]; 1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1950 if (device_change == DEVICE_NOT_FOUND) { 1951 changes++; 1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1953 continue; /* remove ^^^, hence i not incremented */ 1954 } else if (device_change == DEVICE_CHANGED) { 1955 changes++; 1956 hpsa_scsi_replace_entry(h, i, sd[entry], 1957 added, &nadded, removed, &nremoved); 1958 /* Set it to NULL to prevent it from being freed 1959 * at the bottom of hpsa_update_scsi_devices() 1960 */ 1961 sd[entry] = NULL; 1962 } else if (device_change == DEVICE_UPDATED) { 1963 hpsa_scsi_update_entry(h, i, sd[entry]); 1964 } 1965 i++; 1966 } 1967 1968 /* Now, make sure every device listed in sd[] is also 1969 * listed in h->dev[], adding them if they aren't found 1970 */ 1971 1972 for (i = 0; i < nsds; i++) { 1973 if (!sd[i]) /* if already added above. */ 1974 continue; 1975 1976 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1977 * as the SCSI mid-layer does not handle such devices well. 1978 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1979 * at 160Hz, and prevents the system from coming up. 1980 */ 1981 if (sd[i]->volume_offline) { 1982 hpsa_show_volume_status(h, sd[i]); 1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1984 continue; 1985 } 1986 1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1988 h->ndevices, &entry); 1989 if (device_change == DEVICE_NOT_FOUND) { 1990 changes++; 1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1992 break; 1993 sd[i] = NULL; /* prevent from being freed later. */ 1994 } else if (device_change == DEVICE_CHANGED) { 1995 /* should never happen... */ 1996 changes++; 1997 dev_warn(&h->pdev->dev, 1998 "device unexpectedly changed.\n"); 1999 /* but if it does happen, we just ignore that device */ 2000 } 2001 } 2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 2003 2004 /* 2005 * Now that h->dev[]->phys_disk[] is coherent, we can enable 2006 * any logical drives that need it enabled. 2007 * 2008 * The raid map should be current by now. 2009 * 2010 * We are updating the device list used for I/O requests. 2011 */ 2012 for (i = 0; i < h->ndevices; i++) { 2013 if (h->dev[i] == NULL) 2014 continue; 2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 2016 } 2017 2018 spin_unlock_irqrestore(&h->devlock, flags); 2019 2020 /* Monitor devices which are in one of several NOT READY states to be 2021 * brought online later. This must be done without holding h->devlock, 2022 * so don't touch h->dev[] 2023 */ 2024 for (i = 0; i < nsds; i++) { 2025 if (!sd[i]) /* if already added above. */ 2026 continue; 2027 if (sd[i]->volume_offline) 2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 2029 } 2030 2031 /* Don't notify scsi mid layer of any changes the first time through 2032 * (or if there are no changes) scsi_scan_host will do it later the 2033 * first time through. 2034 */ 2035 if (!changes) 2036 goto free_and_out; 2037 2038 /* Notify scsi mid layer of any removed devices */ 2039 for (i = 0; i < nremoved; i++) { 2040 if (removed[i] == NULL) 2041 continue; 2042 if (removed[i]->expose_device) 2043 hpsa_remove_device(h, removed[i]); 2044 kfree(removed[i]); 2045 removed[i] = NULL; 2046 } 2047 2048 /* Notify scsi mid layer of any added devices */ 2049 for (i = 0; i < nadded; i++) { 2050 int rc = 0; 2051 2052 if (added[i] == NULL) 2053 continue; 2054 if (!(added[i]->expose_device)) 2055 continue; 2056 rc = hpsa_add_device(h, added[i]); 2057 if (!rc) 2058 continue; 2059 dev_warn(&h->pdev->dev, 2060 "addition failed %d, device not added.", rc); 2061 /* now we have to remove it from h->dev, 2062 * since it didn't get added to scsi mid layer 2063 */ 2064 fixup_botched_add(h, added[i]); 2065 h->drv_req_rescan = 1; 2066 } 2067 2068 free_and_out: 2069 kfree(added); 2070 kfree(removed); 2071 } 2072 2073 /* 2074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2075 * Assume's h->devlock is held. 2076 */ 2077 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2078 int bus, int target, int lun) 2079 { 2080 int i; 2081 struct hpsa_scsi_dev_t *sd; 2082 2083 for (i = 0; i < h->ndevices; i++) { 2084 sd = h->dev[i]; 2085 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2086 return sd; 2087 } 2088 return NULL; 2089 } 2090 2091 static int hpsa_slave_alloc(struct scsi_device *sdev) 2092 { 2093 struct hpsa_scsi_dev_t *sd = NULL; 2094 unsigned long flags; 2095 struct ctlr_info *h; 2096 2097 h = sdev_to_hba(sdev); 2098 spin_lock_irqsave(&h->devlock, flags); 2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2100 struct scsi_target *starget; 2101 struct sas_rphy *rphy; 2102 2103 starget = scsi_target(sdev); 2104 rphy = target_to_rphy(starget); 2105 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2106 if (sd) { 2107 sd->target = sdev_id(sdev); 2108 sd->lun = sdev->lun; 2109 } 2110 } 2111 if (!sd) 2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2113 sdev_id(sdev), sdev->lun); 2114 2115 if (sd && sd->expose_device) { 2116 atomic_set(&sd->ioaccel_cmds_out, 0); 2117 sdev->hostdata = sd; 2118 } else 2119 sdev->hostdata = NULL; 2120 spin_unlock_irqrestore(&h->devlock, flags); 2121 return 0; 2122 } 2123 2124 /* configure scsi device based on internal per-device structure */ 2125 static int hpsa_slave_configure(struct scsi_device *sdev) 2126 { 2127 struct hpsa_scsi_dev_t *sd; 2128 int queue_depth; 2129 2130 sd = sdev->hostdata; 2131 sdev->no_uld_attach = !sd || !sd->expose_device; 2132 2133 if (sd) { 2134 if (sd->external) 2135 queue_depth = EXTERNAL_QD; 2136 else 2137 queue_depth = sd->queue_depth != 0 ? 2138 sd->queue_depth : sdev->host->can_queue; 2139 } else 2140 queue_depth = sdev->host->can_queue; 2141 2142 scsi_change_queue_depth(sdev, queue_depth); 2143 2144 return 0; 2145 } 2146 2147 static void hpsa_slave_destroy(struct scsi_device *sdev) 2148 { 2149 /* nothing to do. */ 2150 } 2151 2152 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2153 { 2154 int i; 2155 2156 if (!h->ioaccel2_cmd_sg_list) 2157 return; 2158 for (i = 0; i < h->nr_cmds; i++) { 2159 kfree(h->ioaccel2_cmd_sg_list[i]); 2160 h->ioaccel2_cmd_sg_list[i] = NULL; 2161 } 2162 kfree(h->ioaccel2_cmd_sg_list); 2163 h->ioaccel2_cmd_sg_list = NULL; 2164 } 2165 2166 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2167 { 2168 int i; 2169 2170 if (h->chainsize <= 0) 2171 return 0; 2172 2173 h->ioaccel2_cmd_sg_list = 2174 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2175 GFP_KERNEL); 2176 if (!h->ioaccel2_cmd_sg_list) 2177 return -ENOMEM; 2178 for (i = 0; i < h->nr_cmds; i++) { 2179 h->ioaccel2_cmd_sg_list[i] = 2180 kmalloc_array(h->maxsgentries, 2181 sizeof(*h->ioaccel2_cmd_sg_list[i]), 2182 GFP_KERNEL); 2183 if (!h->ioaccel2_cmd_sg_list[i]) 2184 goto clean; 2185 } 2186 return 0; 2187 2188 clean: 2189 hpsa_free_ioaccel2_sg_chain_blocks(h); 2190 return -ENOMEM; 2191 } 2192 2193 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2194 { 2195 int i; 2196 2197 if (!h->cmd_sg_list) 2198 return; 2199 for (i = 0; i < h->nr_cmds; i++) { 2200 kfree(h->cmd_sg_list[i]); 2201 h->cmd_sg_list[i] = NULL; 2202 } 2203 kfree(h->cmd_sg_list); 2204 h->cmd_sg_list = NULL; 2205 } 2206 2207 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2208 { 2209 int i; 2210 2211 if (h->chainsize <= 0) 2212 return 0; 2213 2214 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 2215 GFP_KERNEL); 2216 if (!h->cmd_sg_list) 2217 return -ENOMEM; 2218 2219 for (i = 0; i < h->nr_cmds; i++) { 2220 h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 2221 sizeof(*h->cmd_sg_list[i]), 2222 GFP_KERNEL); 2223 if (!h->cmd_sg_list[i]) 2224 goto clean; 2225 2226 } 2227 return 0; 2228 2229 clean: 2230 hpsa_free_sg_chain_blocks(h); 2231 return -ENOMEM; 2232 } 2233 2234 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2235 struct io_accel2_cmd *cp, struct CommandList *c) 2236 { 2237 struct ioaccel2_sg_element *chain_block; 2238 u64 temp64; 2239 u32 chain_size; 2240 2241 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2242 chain_size = le32_to_cpu(cp->sg[0].length); 2243 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 2244 DMA_TO_DEVICE); 2245 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2246 /* prevent subsequent unmapping */ 2247 cp->sg->address = 0; 2248 return -1; 2249 } 2250 cp->sg->address = cpu_to_le64(temp64); 2251 return 0; 2252 } 2253 2254 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2255 struct io_accel2_cmd *cp) 2256 { 2257 struct ioaccel2_sg_element *chain_sg; 2258 u64 temp64; 2259 u32 chain_size; 2260 2261 chain_sg = cp->sg; 2262 temp64 = le64_to_cpu(chain_sg->address); 2263 chain_size = le32_to_cpu(cp->sg[0].length); 2264 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2265 } 2266 2267 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2268 struct CommandList *c) 2269 { 2270 struct SGDescriptor *chain_sg, *chain_block; 2271 u64 temp64; 2272 u32 chain_len; 2273 2274 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2275 chain_block = h->cmd_sg_list[c->cmdindex]; 2276 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2277 chain_len = sizeof(*chain_sg) * 2278 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2279 chain_sg->Len = cpu_to_le32(chain_len); 2280 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 2281 DMA_TO_DEVICE); 2282 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2283 /* prevent subsequent unmapping */ 2284 chain_sg->Addr = cpu_to_le64(0); 2285 return -1; 2286 } 2287 chain_sg->Addr = cpu_to_le64(temp64); 2288 return 0; 2289 } 2290 2291 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2292 struct CommandList *c) 2293 { 2294 struct SGDescriptor *chain_sg; 2295 2296 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2297 return; 2298 2299 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2300 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 2301 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 2302 } 2303 2304 2305 /* Decode the various types of errors on ioaccel2 path. 2306 * Return 1 for any error that should generate a RAID path retry. 2307 * Return 0 for errors that don't require a RAID path retry. 2308 */ 2309 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2310 struct CommandList *c, 2311 struct scsi_cmnd *cmd, 2312 struct io_accel2_cmd *c2, 2313 struct hpsa_scsi_dev_t *dev) 2314 { 2315 int data_len; 2316 int retry = 0; 2317 u32 ioaccel2_resid = 0; 2318 2319 switch (c2->error_data.serv_response) { 2320 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2321 switch (c2->error_data.status) { 2322 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2323 break; 2324 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2325 cmd->result |= SAM_STAT_CHECK_CONDITION; 2326 if (c2->error_data.data_present != 2327 IOACCEL2_SENSE_DATA_PRESENT) { 2328 memset(cmd->sense_buffer, 0, 2329 SCSI_SENSE_BUFFERSIZE); 2330 break; 2331 } 2332 /* copy the sense data */ 2333 data_len = c2->error_data.sense_data_len; 2334 if (data_len > SCSI_SENSE_BUFFERSIZE) 2335 data_len = SCSI_SENSE_BUFFERSIZE; 2336 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2337 data_len = 2338 sizeof(c2->error_data.sense_data_buff); 2339 memcpy(cmd->sense_buffer, 2340 c2->error_data.sense_data_buff, data_len); 2341 retry = 1; 2342 break; 2343 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2344 retry = 1; 2345 break; 2346 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2347 retry = 1; 2348 break; 2349 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2350 retry = 1; 2351 break; 2352 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2353 retry = 1; 2354 break; 2355 default: 2356 retry = 1; 2357 break; 2358 } 2359 break; 2360 case IOACCEL2_SERV_RESPONSE_FAILURE: 2361 switch (c2->error_data.status) { 2362 case IOACCEL2_STATUS_SR_IO_ERROR: 2363 case IOACCEL2_STATUS_SR_IO_ABORTED: 2364 case IOACCEL2_STATUS_SR_OVERRUN: 2365 retry = 1; 2366 break; 2367 case IOACCEL2_STATUS_SR_UNDERRUN: 2368 cmd->result = (DID_OK << 16); /* host byte */ 2369 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2370 ioaccel2_resid = get_unaligned_le32( 2371 &c2->error_data.resid_cnt[0]); 2372 scsi_set_resid(cmd, ioaccel2_resid); 2373 break; 2374 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2375 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2376 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2377 /* 2378 * Did an HBA disk disappear? We will eventually 2379 * get a state change event from the controller but 2380 * in the meantime, we need to tell the OS that the 2381 * HBA disk is no longer there and stop I/O 2382 * from going down. This allows the potential re-insert 2383 * of the disk to get the same device node. 2384 */ 2385 if (dev->physical_device && dev->expose_device) { 2386 cmd->result = DID_NO_CONNECT << 16; 2387 dev->removed = 1; 2388 h->drv_req_rescan = 1; 2389 dev_warn(&h->pdev->dev, 2390 "%s: device is gone!\n", __func__); 2391 } else 2392 /* 2393 * Retry by sending down the RAID path. 2394 * We will get an event from ctlr to 2395 * trigger rescan regardless. 2396 */ 2397 retry = 1; 2398 break; 2399 default: 2400 retry = 1; 2401 } 2402 break; 2403 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2404 break; 2405 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2406 break; 2407 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2408 retry = 1; 2409 break; 2410 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2411 break; 2412 default: 2413 retry = 1; 2414 break; 2415 } 2416 2417 return retry; /* retry on raid path? */ 2418 } 2419 2420 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2421 struct CommandList *c) 2422 { 2423 bool do_wake = false; 2424 2425 /* 2426 * Reset c->scsi_cmd here so that the reset handler will know 2427 * this command has completed. Then, check to see if the handler is 2428 * waiting for this command, and, if so, wake it. 2429 */ 2430 c->scsi_cmd = SCSI_CMD_IDLE; 2431 mb(); /* Declare command idle before checking for pending events. */ 2432 if (c->reset_pending) { 2433 unsigned long flags; 2434 struct hpsa_scsi_dev_t *dev; 2435 2436 /* 2437 * There appears to be a reset pending; lock the lock and 2438 * reconfirm. If so, then decrement the count of outstanding 2439 * commands and wake the reset command if this is the last one. 2440 */ 2441 spin_lock_irqsave(&h->lock, flags); 2442 dev = c->reset_pending; /* Re-fetch under the lock. */ 2443 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2444 do_wake = true; 2445 c->reset_pending = NULL; 2446 spin_unlock_irqrestore(&h->lock, flags); 2447 } 2448 2449 if (do_wake) 2450 wake_up_all(&h->event_sync_wait_queue); 2451 } 2452 2453 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2454 struct CommandList *c) 2455 { 2456 hpsa_cmd_resolve_events(h, c); 2457 cmd_tagged_free(h, c); 2458 } 2459 2460 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2461 struct CommandList *c, struct scsi_cmnd *cmd) 2462 { 2463 hpsa_cmd_resolve_and_free(h, c); 2464 if (cmd && cmd->scsi_done) 2465 cmd->scsi_done(cmd); 2466 } 2467 2468 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2469 { 2470 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2471 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2472 } 2473 2474 static void process_ioaccel2_completion(struct ctlr_info *h, 2475 struct CommandList *c, struct scsi_cmnd *cmd, 2476 struct hpsa_scsi_dev_t *dev) 2477 { 2478 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2479 2480 /* check for good status */ 2481 if (likely(c2->error_data.serv_response == 0 && 2482 c2->error_data.status == 0)) 2483 return hpsa_cmd_free_and_done(h, c, cmd); 2484 2485 /* 2486 * Any RAID offload error results in retry which will use 2487 * the normal I/O path so the controller can handle whatever is 2488 * wrong. 2489 */ 2490 if (is_logical_device(dev) && 2491 c2->error_data.serv_response == 2492 IOACCEL2_SERV_RESPONSE_FAILURE) { 2493 if (c2->error_data.status == 2494 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2495 dev->offload_enabled = 0; 2496 dev->offload_to_be_enabled = 0; 2497 } 2498 2499 return hpsa_retry_cmd(h, c); 2500 } 2501 2502 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2503 return hpsa_retry_cmd(h, c); 2504 2505 return hpsa_cmd_free_and_done(h, c, cmd); 2506 } 2507 2508 /* Returns 0 on success, < 0 otherwise. */ 2509 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2510 struct CommandList *cp) 2511 { 2512 u8 tmf_status = cp->err_info->ScsiStatus; 2513 2514 switch (tmf_status) { 2515 case CISS_TMF_COMPLETE: 2516 /* 2517 * CISS_TMF_COMPLETE never happens, instead, 2518 * ei->CommandStatus == 0 for this case. 2519 */ 2520 case CISS_TMF_SUCCESS: 2521 return 0; 2522 case CISS_TMF_INVALID_FRAME: 2523 case CISS_TMF_NOT_SUPPORTED: 2524 case CISS_TMF_FAILED: 2525 case CISS_TMF_WRONG_LUN: 2526 case CISS_TMF_OVERLAPPED_TAG: 2527 break; 2528 default: 2529 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2530 tmf_status); 2531 break; 2532 } 2533 return -tmf_status; 2534 } 2535 2536 static void complete_scsi_command(struct CommandList *cp) 2537 { 2538 struct scsi_cmnd *cmd; 2539 struct ctlr_info *h; 2540 struct ErrorInfo *ei; 2541 struct hpsa_scsi_dev_t *dev; 2542 struct io_accel2_cmd *c2; 2543 2544 u8 sense_key; 2545 u8 asc; /* additional sense code */ 2546 u8 ascq; /* additional sense code qualifier */ 2547 unsigned long sense_data_size; 2548 2549 ei = cp->err_info; 2550 cmd = cp->scsi_cmd; 2551 h = cp->h; 2552 2553 if (!cmd->device) { 2554 cmd->result = DID_NO_CONNECT << 16; 2555 return hpsa_cmd_free_and_done(h, cp, cmd); 2556 } 2557 2558 dev = cmd->device->hostdata; 2559 if (!dev) { 2560 cmd->result = DID_NO_CONNECT << 16; 2561 return hpsa_cmd_free_and_done(h, cp, cmd); 2562 } 2563 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2564 2565 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2566 if ((cp->cmd_type == CMD_SCSI) && 2567 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2568 hpsa_unmap_sg_chain_block(h, cp); 2569 2570 if ((cp->cmd_type == CMD_IOACCEL2) && 2571 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2572 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2573 2574 cmd->result = (DID_OK << 16); /* host byte */ 2575 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2576 2577 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2578 if (dev->physical_device && dev->expose_device && 2579 dev->removed) { 2580 cmd->result = DID_NO_CONNECT << 16; 2581 return hpsa_cmd_free_and_done(h, cp, cmd); 2582 } 2583 if (likely(cp->phys_disk != NULL)) 2584 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2585 } 2586 2587 /* 2588 * We check for lockup status here as it may be set for 2589 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2590 * fail_all_oustanding_cmds() 2591 */ 2592 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2593 /* DID_NO_CONNECT will prevent a retry */ 2594 cmd->result = DID_NO_CONNECT << 16; 2595 return hpsa_cmd_free_and_done(h, cp, cmd); 2596 } 2597 2598 if ((unlikely(hpsa_is_pending_event(cp)))) 2599 if (cp->reset_pending) 2600 return hpsa_cmd_free_and_done(h, cp, cmd); 2601 2602 if (cp->cmd_type == CMD_IOACCEL2) 2603 return process_ioaccel2_completion(h, cp, cmd, dev); 2604 2605 scsi_set_resid(cmd, ei->ResidualCnt); 2606 if (ei->CommandStatus == 0) 2607 return hpsa_cmd_free_and_done(h, cp, cmd); 2608 2609 /* For I/O accelerator commands, copy over some fields to the normal 2610 * CISS header used below for error handling. 2611 */ 2612 if (cp->cmd_type == CMD_IOACCEL1) { 2613 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2614 cp->Header.SGList = scsi_sg_count(cmd); 2615 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2616 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2617 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2618 cp->Header.tag = c->tag; 2619 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2620 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2621 2622 /* Any RAID offload error results in retry which will use 2623 * the normal I/O path so the controller can handle whatever's 2624 * wrong. 2625 */ 2626 if (is_logical_device(dev)) { 2627 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2628 dev->offload_enabled = 0; 2629 return hpsa_retry_cmd(h, cp); 2630 } 2631 } 2632 2633 /* an error has occurred */ 2634 switch (ei->CommandStatus) { 2635 2636 case CMD_TARGET_STATUS: 2637 cmd->result |= ei->ScsiStatus; 2638 /* copy the sense data */ 2639 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2640 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2641 else 2642 sense_data_size = sizeof(ei->SenseInfo); 2643 if (ei->SenseLen < sense_data_size) 2644 sense_data_size = ei->SenseLen; 2645 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2646 if (ei->ScsiStatus) 2647 decode_sense_data(ei->SenseInfo, sense_data_size, 2648 &sense_key, &asc, &ascq); 2649 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2650 if (sense_key == ABORTED_COMMAND) { 2651 cmd->result |= DID_SOFT_ERROR << 16; 2652 break; 2653 } 2654 break; 2655 } 2656 /* Problem was not a check condition 2657 * Pass it up to the upper layers... 2658 */ 2659 if (ei->ScsiStatus) { 2660 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2661 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2662 "Returning result: 0x%x\n", 2663 cp, ei->ScsiStatus, 2664 sense_key, asc, ascq, 2665 cmd->result); 2666 } else { /* scsi status is zero??? How??? */ 2667 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2668 "Returning no connection.\n", cp), 2669 2670 /* Ordinarily, this case should never happen, 2671 * but there is a bug in some released firmware 2672 * revisions that allows it to happen if, for 2673 * example, a 4100 backplane loses power and 2674 * the tape drive is in it. We assume that 2675 * it's a fatal error of some kind because we 2676 * can't show that it wasn't. We will make it 2677 * look like selection timeout since that is 2678 * the most common reason for this to occur, 2679 * and it's severe enough. 2680 */ 2681 2682 cmd->result = DID_NO_CONNECT << 16; 2683 } 2684 break; 2685 2686 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2687 break; 2688 case CMD_DATA_OVERRUN: 2689 dev_warn(&h->pdev->dev, 2690 "CDB %16phN data overrun\n", cp->Request.CDB); 2691 break; 2692 case CMD_INVALID: { 2693 /* print_bytes(cp, sizeof(*cp), 1, 0); 2694 print_cmd(cp); */ 2695 /* We get CMD_INVALID if you address a non-existent device 2696 * instead of a selection timeout (no response). You will 2697 * see this if you yank out a drive, then try to access it. 2698 * This is kind of a shame because it means that any other 2699 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2700 * missing target. */ 2701 cmd->result = DID_NO_CONNECT << 16; 2702 } 2703 break; 2704 case CMD_PROTOCOL_ERR: 2705 cmd->result = DID_ERROR << 16; 2706 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2707 cp->Request.CDB); 2708 break; 2709 case CMD_HARDWARE_ERR: 2710 cmd->result = DID_ERROR << 16; 2711 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2712 cp->Request.CDB); 2713 break; 2714 case CMD_CONNECTION_LOST: 2715 cmd->result = DID_ERROR << 16; 2716 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2717 cp->Request.CDB); 2718 break; 2719 case CMD_ABORTED: 2720 cmd->result = DID_ABORT << 16; 2721 break; 2722 case CMD_ABORT_FAILED: 2723 cmd->result = DID_ERROR << 16; 2724 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2725 cp->Request.CDB); 2726 break; 2727 case CMD_UNSOLICITED_ABORT: 2728 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2729 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2730 cp->Request.CDB); 2731 break; 2732 case CMD_TIMEOUT: 2733 cmd->result = DID_TIME_OUT << 16; 2734 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2735 cp->Request.CDB); 2736 break; 2737 case CMD_UNABORTABLE: 2738 cmd->result = DID_ERROR << 16; 2739 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2740 break; 2741 case CMD_TMF_STATUS: 2742 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2743 cmd->result = DID_ERROR << 16; 2744 break; 2745 case CMD_IOACCEL_DISABLED: 2746 /* This only handles the direct pass-through case since RAID 2747 * offload is handled above. Just attempt a retry. 2748 */ 2749 cmd->result = DID_SOFT_ERROR << 16; 2750 dev_warn(&h->pdev->dev, 2751 "cp %p had HP SSD Smart Path error\n", cp); 2752 break; 2753 default: 2754 cmd->result = DID_ERROR << 16; 2755 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2756 cp, ei->CommandStatus); 2757 } 2758 2759 return hpsa_cmd_free_and_done(h, cp, cmd); 2760 } 2761 2762 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 2763 int sg_used, enum dma_data_direction data_direction) 2764 { 2765 int i; 2766 2767 for (i = 0; i < sg_used; i++) 2768 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 2769 le32_to_cpu(c->SG[i].Len), 2770 data_direction); 2771 } 2772 2773 static int hpsa_map_one(struct pci_dev *pdev, 2774 struct CommandList *cp, 2775 unsigned char *buf, 2776 size_t buflen, 2777 enum dma_data_direction data_direction) 2778 { 2779 u64 addr64; 2780 2781 if (buflen == 0 || data_direction == DMA_NONE) { 2782 cp->Header.SGList = 0; 2783 cp->Header.SGTotal = cpu_to_le16(0); 2784 return 0; 2785 } 2786 2787 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2788 if (dma_mapping_error(&pdev->dev, addr64)) { 2789 /* Prevent subsequent unmap of something never mapped */ 2790 cp->Header.SGList = 0; 2791 cp->Header.SGTotal = cpu_to_le16(0); 2792 return -1; 2793 } 2794 cp->SG[0].Addr = cpu_to_le64(addr64); 2795 cp->SG[0].Len = cpu_to_le32(buflen); 2796 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2797 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2798 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2799 return 0; 2800 } 2801 2802 #define NO_TIMEOUT ((unsigned long) -1) 2803 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2804 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2805 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2806 { 2807 DECLARE_COMPLETION_ONSTACK(wait); 2808 2809 c->waiting = &wait; 2810 __enqueue_cmd_and_start_io(h, c, reply_queue); 2811 if (timeout_msecs == NO_TIMEOUT) { 2812 /* TODO: get rid of this no-timeout thing */ 2813 wait_for_completion_io(&wait); 2814 return IO_OK; 2815 } 2816 if (!wait_for_completion_io_timeout(&wait, 2817 msecs_to_jiffies(timeout_msecs))) { 2818 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2819 return -ETIMEDOUT; 2820 } 2821 return IO_OK; 2822 } 2823 2824 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2825 int reply_queue, unsigned long timeout_msecs) 2826 { 2827 if (unlikely(lockup_detected(h))) { 2828 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2829 return IO_OK; 2830 } 2831 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2832 } 2833 2834 static u32 lockup_detected(struct ctlr_info *h) 2835 { 2836 int cpu; 2837 u32 rc, *lockup_detected; 2838 2839 cpu = get_cpu(); 2840 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2841 rc = *lockup_detected; 2842 put_cpu(); 2843 return rc; 2844 } 2845 2846 #define MAX_DRIVER_CMD_RETRIES 25 2847 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2848 struct CommandList *c, enum dma_data_direction data_direction, 2849 unsigned long timeout_msecs) 2850 { 2851 int backoff_time = 10, retry_count = 0; 2852 int rc; 2853 2854 do { 2855 memset(c->err_info, 0, sizeof(*c->err_info)); 2856 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2857 timeout_msecs); 2858 if (rc) 2859 break; 2860 retry_count++; 2861 if (retry_count > 3) { 2862 msleep(backoff_time); 2863 if (backoff_time < 1000) 2864 backoff_time *= 2; 2865 } 2866 } while ((check_for_unit_attention(h, c) || 2867 check_for_busy(h, c)) && 2868 retry_count <= MAX_DRIVER_CMD_RETRIES); 2869 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2870 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2871 rc = -EIO; 2872 return rc; 2873 } 2874 2875 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2876 struct CommandList *c) 2877 { 2878 const u8 *cdb = c->Request.CDB; 2879 const u8 *lun = c->Header.LUN.LunAddrBytes; 2880 2881 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2882 txt, lun, cdb); 2883 } 2884 2885 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2886 struct CommandList *cp) 2887 { 2888 const struct ErrorInfo *ei = cp->err_info; 2889 struct device *d = &cp->h->pdev->dev; 2890 u8 sense_key, asc, ascq; 2891 int sense_len; 2892 2893 switch (ei->CommandStatus) { 2894 case CMD_TARGET_STATUS: 2895 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2896 sense_len = sizeof(ei->SenseInfo); 2897 else 2898 sense_len = ei->SenseLen; 2899 decode_sense_data(ei->SenseInfo, sense_len, 2900 &sense_key, &asc, &ascq); 2901 hpsa_print_cmd(h, "SCSI status", cp); 2902 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2903 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2904 sense_key, asc, ascq); 2905 else 2906 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2907 if (ei->ScsiStatus == 0) 2908 dev_warn(d, "SCSI status is abnormally zero. " 2909 "(probably indicates selection timeout " 2910 "reported incorrectly due to a known " 2911 "firmware bug, circa July, 2001.)\n"); 2912 break; 2913 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2914 break; 2915 case CMD_DATA_OVERRUN: 2916 hpsa_print_cmd(h, "overrun condition", cp); 2917 break; 2918 case CMD_INVALID: { 2919 /* controller unfortunately reports SCSI passthru's 2920 * to non-existent targets as invalid commands. 2921 */ 2922 hpsa_print_cmd(h, "invalid command", cp); 2923 dev_warn(d, "probably means device no longer present\n"); 2924 } 2925 break; 2926 case CMD_PROTOCOL_ERR: 2927 hpsa_print_cmd(h, "protocol error", cp); 2928 break; 2929 case CMD_HARDWARE_ERR: 2930 hpsa_print_cmd(h, "hardware error", cp); 2931 break; 2932 case CMD_CONNECTION_LOST: 2933 hpsa_print_cmd(h, "connection lost", cp); 2934 break; 2935 case CMD_ABORTED: 2936 hpsa_print_cmd(h, "aborted", cp); 2937 break; 2938 case CMD_ABORT_FAILED: 2939 hpsa_print_cmd(h, "abort failed", cp); 2940 break; 2941 case CMD_UNSOLICITED_ABORT: 2942 hpsa_print_cmd(h, "unsolicited abort", cp); 2943 break; 2944 case CMD_TIMEOUT: 2945 hpsa_print_cmd(h, "timed out", cp); 2946 break; 2947 case CMD_UNABORTABLE: 2948 hpsa_print_cmd(h, "unabortable", cp); 2949 break; 2950 case CMD_CTLR_LOCKUP: 2951 hpsa_print_cmd(h, "controller lockup detected", cp); 2952 break; 2953 default: 2954 hpsa_print_cmd(h, "unknown status", cp); 2955 dev_warn(d, "Unknown command status %x\n", 2956 ei->CommandStatus); 2957 } 2958 } 2959 2960 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2961 u8 page, u8 *buf, size_t bufsize) 2962 { 2963 int rc = IO_OK; 2964 struct CommandList *c; 2965 struct ErrorInfo *ei; 2966 2967 c = cmd_alloc(h); 2968 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 2969 page, scsi3addr, TYPE_CMD)) { 2970 rc = -1; 2971 goto out; 2972 } 2973 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 2974 NO_TIMEOUT); 2975 if (rc) 2976 goto out; 2977 ei = c->err_info; 2978 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2979 hpsa_scsi_interpret_error(h, c); 2980 rc = -1; 2981 } 2982 out: 2983 cmd_free(h, c); 2984 return rc; 2985 } 2986 2987 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 2988 u8 *scsi3addr) 2989 { 2990 u8 *buf; 2991 u64 sa = 0; 2992 int rc = 0; 2993 2994 buf = kzalloc(1024, GFP_KERNEL); 2995 if (!buf) 2996 return 0; 2997 2998 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 2999 buf, 1024); 3000 3001 if (rc) 3002 goto out; 3003 3004 sa = get_unaligned_be64(buf+12); 3005 3006 out: 3007 kfree(buf); 3008 return sa; 3009 } 3010 3011 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3012 u16 page, unsigned char *buf, 3013 unsigned char bufsize) 3014 { 3015 int rc = IO_OK; 3016 struct CommandList *c; 3017 struct ErrorInfo *ei; 3018 3019 c = cmd_alloc(h); 3020 3021 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3022 page, scsi3addr, TYPE_CMD)) { 3023 rc = -1; 3024 goto out; 3025 } 3026 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3027 NO_TIMEOUT); 3028 if (rc) 3029 goto out; 3030 ei = c->err_info; 3031 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3032 hpsa_scsi_interpret_error(h, c); 3033 rc = -1; 3034 } 3035 out: 3036 cmd_free(h, c); 3037 return rc; 3038 } 3039 3040 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 3041 u8 reset_type, int reply_queue) 3042 { 3043 int rc = IO_OK; 3044 struct CommandList *c; 3045 struct ErrorInfo *ei; 3046 3047 c = cmd_alloc(h); 3048 3049 3050 /* fill_cmd can't fail here, no data buffer to map. */ 3051 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 3052 scsi3addr, TYPE_MSG); 3053 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 3054 if (rc) { 3055 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 3056 goto out; 3057 } 3058 /* no unmap needed here because no data xfer. */ 3059 3060 ei = c->err_info; 3061 if (ei->CommandStatus != 0) { 3062 hpsa_scsi_interpret_error(h, c); 3063 rc = -1; 3064 } 3065 out: 3066 cmd_free(h, c); 3067 return rc; 3068 } 3069 3070 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3071 struct hpsa_scsi_dev_t *dev, 3072 unsigned char *scsi3addr) 3073 { 3074 int i; 3075 bool match = false; 3076 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3077 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3078 3079 if (hpsa_is_cmd_idle(c)) 3080 return false; 3081 3082 switch (c->cmd_type) { 3083 case CMD_SCSI: 3084 case CMD_IOCTL_PEND: 3085 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3086 sizeof(c->Header.LUN.LunAddrBytes)); 3087 break; 3088 3089 case CMD_IOACCEL1: 3090 case CMD_IOACCEL2: 3091 if (c->phys_disk == dev) { 3092 /* HBA mode match */ 3093 match = true; 3094 } else { 3095 /* Possible RAID mode -- check each phys dev. */ 3096 /* FIXME: Do we need to take out a lock here? If 3097 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3098 * instead. */ 3099 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3100 /* FIXME: an alternate test might be 3101 * 3102 * match = dev->phys_disk[i]->ioaccel_handle 3103 * == c2->scsi_nexus; */ 3104 match = dev->phys_disk[i] == c->phys_disk; 3105 } 3106 } 3107 break; 3108 3109 case IOACCEL2_TMF: 3110 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3111 match = dev->phys_disk[i]->ioaccel_handle == 3112 le32_to_cpu(ac->it_nexus); 3113 } 3114 break; 3115 3116 case 0: /* The command is in the middle of being initialized. */ 3117 match = false; 3118 break; 3119 3120 default: 3121 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3122 c->cmd_type); 3123 BUG(); 3124 } 3125 3126 return match; 3127 } 3128 3129 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3130 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3131 { 3132 int i; 3133 int rc = 0; 3134 3135 /* We can really only handle one reset at a time */ 3136 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3137 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3138 return -EINTR; 3139 } 3140 3141 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3142 3143 for (i = 0; i < h->nr_cmds; i++) { 3144 struct CommandList *c = h->cmd_pool + i; 3145 int refcount = atomic_inc_return(&c->refcount); 3146 3147 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3148 unsigned long flags; 3149 3150 /* 3151 * Mark the target command as having a reset pending, 3152 * then lock a lock so that the command cannot complete 3153 * while we're considering it. If the command is not 3154 * idle then count it; otherwise revoke the event. 3155 */ 3156 c->reset_pending = dev; 3157 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3158 if (!hpsa_is_cmd_idle(c)) 3159 atomic_inc(&dev->reset_cmds_out); 3160 else 3161 c->reset_pending = NULL; 3162 spin_unlock_irqrestore(&h->lock, flags); 3163 } 3164 3165 cmd_free(h, c); 3166 } 3167 3168 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3169 if (!rc) 3170 wait_event(h->event_sync_wait_queue, 3171 atomic_read(&dev->reset_cmds_out) == 0 || 3172 lockup_detected(h)); 3173 3174 if (unlikely(lockup_detected(h))) { 3175 dev_warn(&h->pdev->dev, 3176 "Controller lockup detected during reset wait\n"); 3177 rc = -ENODEV; 3178 } 3179 3180 if (unlikely(rc)) 3181 atomic_set(&dev->reset_cmds_out, 0); 3182 else 3183 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3184 3185 mutex_unlock(&h->reset_mutex); 3186 return rc; 3187 } 3188 3189 static void hpsa_get_raid_level(struct ctlr_info *h, 3190 unsigned char *scsi3addr, unsigned char *raid_level) 3191 { 3192 int rc; 3193 unsigned char *buf; 3194 3195 *raid_level = RAID_UNKNOWN; 3196 buf = kzalloc(64, GFP_KERNEL); 3197 if (!buf) 3198 return; 3199 3200 if (!hpsa_vpd_page_supported(h, scsi3addr, 3201 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3202 goto exit; 3203 3204 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3205 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3206 3207 if (rc == 0) 3208 *raid_level = buf[8]; 3209 if (*raid_level > RAID_UNKNOWN) 3210 *raid_level = RAID_UNKNOWN; 3211 exit: 3212 kfree(buf); 3213 return; 3214 } 3215 3216 #define HPSA_MAP_DEBUG 3217 #ifdef HPSA_MAP_DEBUG 3218 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3219 struct raid_map_data *map_buff) 3220 { 3221 struct raid_map_disk_data *dd = &map_buff->data[0]; 3222 int map, row, col; 3223 u16 map_cnt, row_cnt, disks_per_row; 3224 3225 if (rc != 0) 3226 return; 3227 3228 /* Show details only if debugging has been activated. */ 3229 if (h->raid_offload_debug < 2) 3230 return; 3231 3232 dev_info(&h->pdev->dev, "structure_size = %u\n", 3233 le32_to_cpu(map_buff->structure_size)); 3234 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3235 le32_to_cpu(map_buff->volume_blk_size)); 3236 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3237 le64_to_cpu(map_buff->volume_blk_cnt)); 3238 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3239 map_buff->phys_blk_shift); 3240 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3241 map_buff->parity_rotation_shift); 3242 dev_info(&h->pdev->dev, "strip_size = %u\n", 3243 le16_to_cpu(map_buff->strip_size)); 3244 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3245 le64_to_cpu(map_buff->disk_starting_blk)); 3246 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3247 le64_to_cpu(map_buff->disk_blk_cnt)); 3248 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3249 le16_to_cpu(map_buff->data_disks_per_row)); 3250 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3251 le16_to_cpu(map_buff->metadata_disks_per_row)); 3252 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3253 le16_to_cpu(map_buff->row_cnt)); 3254 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3255 le16_to_cpu(map_buff->layout_map_count)); 3256 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3257 le16_to_cpu(map_buff->flags)); 3258 dev_info(&h->pdev->dev, "encryption = %s\n", 3259 le16_to_cpu(map_buff->flags) & 3260 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3261 dev_info(&h->pdev->dev, "dekindex = %u\n", 3262 le16_to_cpu(map_buff->dekindex)); 3263 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3264 for (map = 0; map < map_cnt; map++) { 3265 dev_info(&h->pdev->dev, "Map%u:\n", map); 3266 row_cnt = le16_to_cpu(map_buff->row_cnt); 3267 for (row = 0; row < row_cnt; row++) { 3268 dev_info(&h->pdev->dev, " Row%u:\n", row); 3269 disks_per_row = 3270 le16_to_cpu(map_buff->data_disks_per_row); 3271 for (col = 0; col < disks_per_row; col++, dd++) 3272 dev_info(&h->pdev->dev, 3273 " D%02u: h=0x%04x xor=%u,%u\n", 3274 col, dd->ioaccel_handle, 3275 dd->xor_mult[0], dd->xor_mult[1]); 3276 disks_per_row = 3277 le16_to_cpu(map_buff->metadata_disks_per_row); 3278 for (col = 0; col < disks_per_row; col++, dd++) 3279 dev_info(&h->pdev->dev, 3280 " M%02u: h=0x%04x xor=%u,%u\n", 3281 col, dd->ioaccel_handle, 3282 dd->xor_mult[0], dd->xor_mult[1]); 3283 } 3284 } 3285 } 3286 #else 3287 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3288 __attribute__((unused)) int rc, 3289 __attribute__((unused)) struct raid_map_data *map_buff) 3290 { 3291 } 3292 #endif 3293 3294 static int hpsa_get_raid_map(struct ctlr_info *h, 3295 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3296 { 3297 int rc = 0; 3298 struct CommandList *c; 3299 struct ErrorInfo *ei; 3300 3301 c = cmd_alloc(h); 3302 3303 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3304 sizeof(this_device->raid_map), 0, 3305 scsi3addr, TYPE_CMD)) { 3306 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3307 cmd_free(h, c); 3308 return -1; 3309 } 3310 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3311 NO_TIMEOUT); 3312 if (rc) 3313 goto out; 3314 ei = c->err_info; 3315 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3316 hpsa_scsi_interpret_error(h, c); 3317 rc = -1; 3318 goto out; 3319 } 3320 cmd_free(h, c); 3321 3322 /* @todo in the future, dynamically allocate RAID map memory */ 3323 if (le32_to_cpu(this_device->raid_map.structure_size) > 3324 sizeof(this_device->raid_map)) { 3325 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3326 rc = -1; 3327 } 3328 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3329 return rc; 3330 out: 3331 cmd_free(h, c); 3332 return rc; 3333 } 3334 3335 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3336 unsigned char scsi3addr[], u16 bmic_device_index, 3337 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3338 { 3339 int rc = IO_OK; 3340 struct CommandList *c; 3341 struct ErrorInfo *ei; 3342 3343 c = cmd_alloc(h); 3344 3345 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3346 0, RAID_CTLR_LUNID, TYPE_CMD); 3347 if (rc) 3348 goto out; 3349 3350 c->Request.CDB[2] = bmic_device_index & 0xff; 3351 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3352 3353 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3354 NO_TIMEOUT); 3355 if (rc) 3356 goto out; 3357 ei = c->err_info; 3358 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3359 hpsa_scsi_interpret_error(h, c); 3360 rc = -1; 3361 } 3362 out: 3363 cmd_free(h, c); 3364 return rc; 3365 } 3366 3367 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3368 struct bmic_identify_controller *buf, size_t bufsize) 3369 { 3370 int rc = IO_OK; 3371 struct CommandList *c; 3372 struct ErrorInfo *ei; 3373 3374 c = cmd_alloc(h); 3375 3376 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3377 0, RAID_CTLR_LUNID, TYPE_CMD); 3378 if (rc) 3379 goto out; 3380 3381 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3382 NO_TIMEOUT); 3383 if (rc) 3384 goto out; 3385 ei = c->err_info; 3386 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3387 hpsa_scsi_interpret_error(h, c); 3388 rc = -1; 3389 } 3390 out: 3391 cmd_free(h, c); 3392 return rc; 3393 } 3394 3395 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3396 unsigned char scsi3addr[], u16 bmic_device_index, 3397 struct bmic_identify_physical_device *buf, size_t bufsize) 3398 { 3399 int rc = IO_OK; 3400 struct CommandList *c; 3401 struct ErrorInfo *ei; 3402 3403 c = cmd_alloc(h); 3404 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3405 0, RAID_CTLR_LUNID, TYPE_CMD); 3406 if (rc) 3407 goto out; 3408 3409 c->Request.CDB[2] = bmic_device_index & 0xff; 3410 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3411 3412 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3413 NO_TIMEOUT); 3414 ei = c->err_info; 3415 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3416 hpsa_scsi_interpret_error(h, c); 3417 rc = -1; 3418 } 3419 out: 3420 cmd_free(h, c); 3421 3422 return rc; 3423 } 3424 3425 /* 3426 * get enclosure information 3427 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3428 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3429 * Uses id_physical_device to determine the box_index. 3430 */ 3431 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3432 unsigned char *scsi3addr, 3433 struct ReportExtendedLUNdata *rlep, int rle_index, 3434 struct hpsa_scsi_dev_t *encl_dev) 3435 { 3436 int rc = -1; 3437 struct CommandList *c = NULL; 3438 struct ErrorInfo *ei = NULL; 3439 struct bmic_sense_storage_box_params *bssbp = NULL; 3440 struct bmic_identify_physical_device *id_phys = NULL; 3441 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3442 u16 bmic_device_index = 0; 3443 3444 encl_dev->eli = 3445 hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3446 3447 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3448 3449 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3450 rc = IO_OK; 3451 goto out; 3452 } 3453 3454 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3455 rc = IO_OK; 3456 goto out; 3457 } 3458 3459 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3460 if (!bssbp) 3461 goto out; 3462 3463 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3464 if (!id_phys) 3465 goto out; 3466 3467 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3468 id_phys, sizeof(*id_phys)); 3469 if (rc) { 3470 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3471 __func__, encl_dev->external, bmic_device_index); 3472 goto out; 3473 } 3474 3475 c = cmd_alloc(h); 3476 3477 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3478 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3479 3480 if (rc) 3481 goto out; 3482 3483 if (id_phys->phys_connector[1] == 'E') 3484 c->Request.CDB[5] = id_phys->box_index; 3485 else 3486 c->Request.CDB[5] = 0; 3487 3488 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3489 NO_TIMEOUT); 3490 if (rc) 3491 goto out; 3492 3493 ei = c->err_info; 3494 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3495 rc = -1; 3496 goto out; 3497 } 3498 3499 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3500 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3501 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3502 3503 rc = IO_OK; 3504 out: 3505 kfree(bssbp); 3506 kfree(id_phys); 3507 3508 if (c) 3509 cmd_free(h, c); 3510 3511 if (rc != IO_OK) 3512 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3513 "Error, could not get enclosure information"); 3514 } 3515 3516 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3517 unsigned char *scsi3addr) 3518 { 3519 struct ReportExtendedLUNdata *physdev; 3520 u32 nphysicals; 3521 u64 sa = 0; 3522 int i; 3523 3524 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3525 if (!physdev) 3526 return 0; 3527 3528 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3529 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3530 kfree(physdev); 3531 return 0; 3532 } 3533 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3534 3535 for (i = 0; i < nphysicals; i++) 3536 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3537 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3538 break; 3539 } 3540 3541 kfree(physdev); 3542 3543 return sa; 3544 } 3545 3546 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3547 struct hpsa_scsi_dev_t *dev) 3548 { 3549 int rc; 3550 u64 sa = 0; 3551 3552 if (is_hba_lunid(scsi3addr)) { 3553 struct bmic_sense_subsystem_info *ssi; 3554 3555 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3556 if (!ssi) 3557 return; 3558 3559 rc = hpsa_bmic_sense_subsystem_information(h, 3560 scsi3addr, 0, ssi, sizeof(*ssi)); 3561 if (rc == 0) { 3562 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3563 h->sas_address = sa; 3564 } 3565 3566 kfree(ssi); 3567 } else 3568 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3569 3570 dev->sas_address = sa; 3571 } 3572 3573 static void hpsa_ext_ctrl_present(struct ctlr_info *h, 3574 struct ReportExtendedLUNdata *physdev) 3575 { 3576 u32 nphysicals; 3577 int i; 3578 3579 if (h->discovery_polling) 3580 return; 3581 3582 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 3583 3584 for (i = 0; i < nphysicals; i++) { 3585 if (physdev->LUN[i].device_type == 3586 BMIC_DEVICE_TYPE_CONTROLLER 3587 && !is_hba_lunid(physdev->LUN[i].lunid)) { 3588 dev_info(&h->pdev->dev, 3589 "External controller present, activate discovery polling and disable rld caching\n"); 3590 hpsa_disable_rld_caching(h); 3591 h->discovery_polling = 1; 3592 break; 3593 } 3594 } 3595 } 3596 3597 /* Get a device id from inquiry page 0x83 */ 3598 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3599 unsigned char scsi3addr[], u8 page) 3600 { 3601 int rc; 3602 int i; 3603 int pages; 3604 unsigned char *buf, bufsize; 3605 3606 buf = kzalloc(256, GFP_KERNEL); 3607 if (!buf) 3608 return false; 3609 3610 /* Get the size of the page list first */ 3611 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3612 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3613 buf, HPSA_VPD_HEADER_SZ); 3614 if (rc != 0) 3615 goto exit_unsupported; 3616 pages = buf[3]; 3617 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3618 bufsize = pages + HPSA_VPD_HEADER_SZ; 3619 else 3620 bufsize = 255; 3621 3622 /* Get the whole VPD page list */ 3623 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3624 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3625 buf, bufsize); 3626 if (rc != 0) 3627 goto exit_unsupported; 3628 3629 pages = buf[3]; 3630 for (i = 1; i <= pages; i++) 3631 if (buf[3 + i] == page) 3632 goto exit_supported; 3633 exit_unsupported: 3634 kfree(buf); 3635 return false; 3636 exit_supported: 3637 kfree(buf); 3638 return true; 3639 } 3640 3641 /* 3642 * Called during a scan operation. 3643 * Sets ioaccel status on the new device list, not the existing device list 3644 * 3645 * The device list used during I/O will be updated later in 3646 * adjust_hpsa_scsi_table. 3647 */ 3648 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3649 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3650 { 3651 int rc; 3652 unsigned char *buf; 3653 u8 ioaccel_status; 3654 3655 this_device->offload_config = 0; 3656 this_device->offload_enabled = 0; 3657 this_device->offload_to_be_enabled = 0; 3658 3659 buf = kzalloc(64, GFP_KERNEL); 3660 if (!buf) 3661 return; 3662 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3663 goto out; 3664 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3665 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3666 if (rc != 0) 3667 goto out; 3668 3669 #define IOACCEL_STATUS_BYTE 4 3670 #define OFFLOAD_CONFIGURED_BIT 0x01 3671 #define OFFLOAD_ENABLED_BIT 0x02 3672 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3673 this_device->offload_config = 3674 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3675 if (this_device->offload_config) { 3676 this_device->offload_to_be_enabled = 3677 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3678 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3679 this_device->offload_to_be_enabled = 0; 3680 } 3681 3682 out: 3683 kfree(buf); 3684 return; 3685 } 3686 3687 /* Get the device id from inquiry page 0x83 */ 3688 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3689 unsigned char *device_id, int index, int buflen) 3690 { 3691 int rc; 3692 unsigned char *buf; 3693 3694 /* Does controller have VPD for device id? */ 3695 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3696 return 1; /* not supported */ 3697 3698 buf = kzalloc(64, GFP_KERNEL); 3699 if (!buf) 3700 return -ENOMEM; 3701 3702 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3703 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3704 if (rc == 0) { 3705 if (buflen > 16) 3706 buflen = 16; 3707 memcpy(device_id, &buf[8], buflen); 3708 } 3709 3710 kfree(buf); 3711 3712 return rc; /*0 - got id, otherwise, didn't */ 3713 } 3714 3715 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3716 void *buf, int bufsize, 3717 int extended_response) 3718 { 3719 int rc = IO_OK; 3720 struct CommandList *c; 3721 unsigned char scsi3addr[8]; 3722 struct ErrorInfo *ei; 3723 3724 c = cmd_alloc(h); 3725 3726 /* address the controller */ 3727 memset(scsi3addr, 0, sizeof(scsi3addr)); 3728 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3729 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3730 rc = -EAGAIN; 3731 goto out; 3732 } 3733 if (extended_response) 3734 c->Request.CDB[1] = extended_response; 3735 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3736 NO_TIMEOUT); 3737 if (rc) 3738 goto out; 3739 ei = c->err_info; 3740 if (ei->CommandStatus != 0 && 3741 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3742 hpsa_scsi_interpret_error(h, c); 3743 rc = -EIO; 3744 } else { 3745 struct ReportLUNdata *rld = buf; 3746 3747 if (rld->extended_response_flag != extended_response) { 3748 if (!h->legacy_board) { 3749 dev_err(&h->pdev->dev, 3750 "report luns requested format %u, got %u\n", 3751 extended_response, 3752 rld->extended_response_flag); 3753 rc = -EINVAL; 3754 } else 3755 rc = -EOPNOTSUPP; 3756 } 3757 } 3758 out: 3759 cmd_free(h, c); 3760 return rc; 3761 } 3762 3763 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3764 struct ReportExtendedLUNdata *buf, int bufsize) 3765 { 3766 int rc; 3767 struct ReportLUNdata *lbuf; 3768 3769 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3770 HPSA_REPORT_PHYS_EXTENDED); 3771 if (!rc || rc != -EOPNOTSUPP) 3772 return rc; 3773 3774 /* REPORT PHYS EXTENDED is not supported */ 3775 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3776 if (!lbuf) 3777 return -ENOMEM; 3778 3779 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3780 if (!rc) { 3781 int i; 3782 u32 nphys; 3783 3784 /* Copy ReportLUNdata header */ 3785 memcpy(buf, lbuf, 8); 3786 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3787 for (i = 0; i < nphys; i++) 3788 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3789 } 3790 kfree(lbuf); 3791 return rc; 3792 } 3793 3794 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3795 struct ReportLUNdata *buf, int bufsize) 3796 { 3797 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3798 } 3799 3800 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3801 int bus, int target, int lun) 3802 { 3803 device->bus = bus; 3804 device->target = target; 3805 device->lun = lun; 3806 } 3807 3808 /* Use VPD inquiry to get details of volume status */ 3809 static int hpsa_get_volume_status(struct ctlr_info *h, 3810 unsigned char scsi3addr[]) 3811 { 3812 int rc; 3813 int status; 3814 int size; 3815 unsigned char *buf; 3816 3817 buf = kzalloc(64, GFP_KERNEL); 3818 if (!buf) 3819 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3820 3821 /* Does controller have VPD for logical volume status? */ 3822 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3823 goto exit_failed; 3824 3825 /* Get the size of the VPD return buffer */ 3826 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3827 buf, HPSA_VPD_HEADER_SZ); 3828 if (rc != 0) 3829 goto exit_failed; 3830 size = buf[3]; 3831 3832 /* Now get the whole VPD buffer */ 3833 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3834 buf, size + HPSA_VPD_HEADER_SZ); 3835 if (rc != 0) 3836 goto exit_failed; 3837 status = buf[4]; /* status byte */ 3838 3839 kfree(buf); 3840 return status; 3841 exit_failed: 3842 kfree(buf); 3843 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3844 } 3845 3846 /* Determine offline status of a volume. 3847 * Return either: 3848 * 0 (not offline) 3849 * 0xff (offline for unknown reasons) 3850 * # (integer code indicating one of several NOT READY states 3851 * describing why a volume is to be kept offline) 3852 */ 3853 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3854 unsigned char scsi3addr[]) 3855 { 3856 struct CommandList *c; 3857 unsigned char *sense; 3858 u8 sense_key, asc, ascq; 3859 int sense_len; 3860 int rc, ldstat = 0; 3861 u16 cmd_status; 3862 u8 scsi_status; 3863 #define ASC_LUN_NOT_READY 0x04 3864 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3865 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3866 3867 c = cmd_alloc(h); 3868 3869 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3870 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3871 NO_TIMEOUT); 3872 if (rc) { 3873 cmd_free(h, c); 3874 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3875 } 3876 sense = c->err_info->SenseInfo; 3877 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3878 sense_len = sizeof(c->err_info->SenseInfo); 3879 else 3880 sense_len = c->err_info->SenseLen; 3881 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3882 cmd_status = c->err_info->CommandStatus; 3883 scsi_status = c->err_info->ScsiStatus; 3884 cmd_free(h, c); 3885 3886 /* Determine the reason for not ready state */ 3887 ldstat = hpsa_get_volume_status(h, scsi3addr); 3888 3889 /* Keep volume offline in certain cases: */ 3890 switch (ldstat) { 3891 case HPSA_LV_FAILED: 3892 case HPSA_LV_UNDERGOING_ERASE: 3893 case HPSA_LV_NOT_AVAILABLE: 3894 case HPSA_LV_UNDERGOING_RPI: 3895 case HPSA_LV_PENDING_RPI: 3896 case HPSA_LV_ENCRYPTED_NO_KEY: 3897 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3898 case HPSA_LV_UNDERGOING_ENCRYPTION: 3899 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3900 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3901 return ldstat; 3902 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3903 /* If VPD status page isn't available, 3904 * use ASC/ASCQ to determine state 3905 */ 3906 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3907 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3908 return ldstat; 3909 break; 3910 default: 3911 break; 3912 } 3913 return HPSA_LV_OK; 3914 } 3915 3916 static int hpsa_update_device_info(struct ctlr_info *h, 3917 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3918 unsigned char *is_OBDR_device) 3919 { 3920 3921 #define OBDR_SIG_OFFSET 43 3922 #define OBDR_TAPE_SIG "$DR-10" 3923 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3924 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3925 3926 unsigned char *inq_buff; 3927 unsigned char *obdr_sig; 3928 int rc = 0; 3929 3930 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3931 if (!inq_buff) { 3932 rc = -ENOMEM; 3933 goto bail_out; 3934 } 3935 3936 /* Do an inquiry to the device to see what it is. */ 3937 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3938 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3939 dev_err(&h->pdev->dev, 3940 "%s: inquiry failed, device will be skipped.\n", 3941 __func__); 3942 rc = HPSA_INQUIRY_FAILED; 3943 goto bail_out; 3944 } 3945 3946 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3947 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3948 3949 this_device->devtype = (inq_buff[0] & 0x1f); 3950 memcpy(this_device->scsi3addr, scsi3addr, 8); 3951 memcpy(this_device->vendor, &inq_buff[8], 3952 sizeof(this_device->vendor)); 3953 memcpy(this_device->model, &inq_buff[16], 3954 sizeof(this_device->model)); 3955 this_device->rev = inq_buff[2]; 3956 memset(this_device->device_id, 0, 3957 sizeof(this_device->device_id)); 3958 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3959 sizeof(this_device->device_id)) < 0) 3960 dev_err(&h->pdev->dev, 3961 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3962 h->ctlr, __func__, 3963 h->scsi_host->host_no, 3964 this_device->target, this_device->lun, 3965 scsi_device_type(this_device->devtype), 3966 this_device->model); 3967 3968 if ((this_device->devtype == TYPE_DISK || 3969 this_device->devtype == TYPE_ZBC) && 3970 is_logical_dev_addr_mode(scsi3addr)) { 3971 unsigned char volume_offline; 3972 3973 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3974 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3975 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3976 volume_offline = hpsa_volume_offline(h, scsi3addr); 3977 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 3978 h->legacy_board) { 3979 /* 3980 * Legacy boards might not support volume status 3981 */ 3982 dev_info(&h->pdev->dev, 3983 "C0:T%d:L%d Volume status not available, assuming online.\n", 3984 this_device->target, this_device->lun); 3985 volume_offline = 0; 3986 } 3987 this_device->volume_offline = volume_offline; 3988 if (volume_offline == HPSA_LV_FAILED) { 3989 rc = HPSA_LV_FAILED; 3990 dev_err(&h->pdev->dev, 3991 "%s: LV failed, device will be skipped.\n", 3992 __func__); 3993 goto bail_out; 3994 } 3995 } else { 3996 this_device->raid_level = RAID_UNKNOWN; 3997 this_device->offload_config = 0; 3998 this_device->offload_enabled = 0; 3999 this_device->offload_to_be_enabled = 0; 4000 this_device->hba_ioaccel_enabled = 0; 4001 this_device->volume_offline = 0; 4002 this_device->queue_depth = h->nr_cmds; 4003 } 4004 4005 if (this_device->external) 4006 this_device->queue_depth = EXTERNAL_QD; 4007 4008 if (is_OBDR_device) { 4009 /* See if this is a One-Button-Disaster-Recovery device 4010 * by looking for "$DR-10" at offset 43 in inquiry data. 4011 */ 4012 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 4013 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 4014 strncmp(obdr_sig, OBDR_TAPE_SIG, 4015 OBDR_SIG_LEN) == 0); 4016 } 4017 kfree(inq_buff); 4018 return 0; 4019 4020 bail_out: 4021 kfree(inq_buff); 4022 return rc; 4023 } 4024 4025 /* 4026 * Helper function to assign bus, target, lun mapping of devices. 4027 * Logical drive target and lun are assigned at this time, but 4028 * physical device lun and target assignment are deferred (assigned 4029 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4030 */ 4031 static void figure_bus_target_lun(struct ctlr_info *h, 4032 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4033 { 4034 u32 lunid = get_unaligned_le32(lunaddrbytes); 4035 4036 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 4037 /* physical device, target and lun filled in later */ 4038 if (is_hba_lunid(lunaddrbytes)) { 4039 int bus = HPSA_HBA_BUS; 4040 4041 if (!device->rev) 4042 bus = HPSA_LEGACY_HBA_BUS; 4043 hpsa_set_bus_target_lun(device, 4044 bus, 0, lunid & 0x3fff); 4045 } else 4046 /* defer target, lun assignment for physical devices */ 4047 hpsa_set_bus_target_lun(device, 4048 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 4049 return; 4050 } 4051 /* It's a logical device */ 4052 if (device->external) { 4053 hpsa_set_bus_target_lun(device, 4054 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4055 lunid & 0x00ff); 4056 return; 4057 } 4058 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4059 0, lunid & 0x3fff); 4060 } 4061 4062 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4063 int i, int nphysicals, int nlocal_logicals) 4064 { 4065 /* In report logicals, local logicals are listed first, 4066 * then any externals. 4067 */ 4068 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4069 4070 if (i == raid_ctlr_position) 4071 return 0; 4072 4073 if (i < logicals_start) 4074 return 0; 4075 4076 /* i is in logicals range, but still within local logicals */ 4077 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4078 return 0; 4079 4080 return 1; /* it's an external lun */ 4081 } 4082 4083 /* 4084 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4085 * logdev. The number of luns in physdev and logdev are returned in 4086 * *nphysicals and *nlogicals, respectively. 4087 * Returns 0 on success, -1 otherwise. 4088 */ 4089 static int hpsa_gather_lun_info(struct ctlr_info *h, 4090 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4091 struct ReportLUNdata *logdev, u32 *nlogicals) 4092 { 4093 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4094 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4095 return -1; 4096 } 4097 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4098 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4099 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4100 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4101 *nphysicals = HPSA_MAX_PHYS_LUN; 4102 } 4103 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4104 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4105 return -1; 4106 } 4107 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4108 /* Reject Logicals in excess of our max capability. */ 4109 if (*nlogicals > HPSA_MAX_LUN) { 4110 dev_warn(&h->pdev->dev, 4111 "maximum logical LUNs (%d) exceeded. " 4112 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4113 *nlogicals - HPSA_MAX_LUN); 4114 *nlogicals = HPSA_MAX_LUN; 4115 } 4116 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4117 dev_warn(&h->pdev->dev, 4118 "maximum logical + physical LUNs (%d) exceeded. " 4119 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4120 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4121 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4122 } 4123 return 0; 4124 } 4125 4126 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4127 int i, int nphysicals, int nlogicals, 4128 struct ReportExtendedLUNdata *physdev_list, 4129 struct ReportLUNdata *logdev_list) 4130 { 4131 /* Helper function, figure out where the LUN ID info is coming from 4132 * given index i, lists of physical and logical devices, where in 4133 * the list the raid controller is supposed to appear (first or last) 4134 */ 4135 4136 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4137 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4138 4139 if (i == raid_ctlr_position) 4140 return RAID_CTLR_LUNID; 4141 4142 if (i < logicals_start) 4143 return &physdev_list->LUN[i - 4144 (raid_ctlr_position == 0)].lunid[0]; 4145 4146 if (i < last_device) 4147 return &logdev_list->LUN[i - nphysicals - 4148 (raid_ctlr_position == 0)][0]; 4149 BUG(); 4150 return NULL; 4151 } 4152 4153 /* get physical drive ioaccel handle and queue depth */ 4154 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4155 struct hpsa_scsi_dev_t *dev, 4156 struct ReportExtendedLUNdata *rlep, int rle_index, 4157 struct bmic_identify_physical_device *id_phys) 4158 { 4159 int rc; 4160 struct ext_report_lun_entry *rle; 4161 4162 rle = &rlep->LUN[rle_index]; 4163 4164 dev->ioaccel_handle = rle->ioaccel_handle; 4165 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4166 dev->hba_ioaccel_enabled = 1; 4167 memset(id_phys, 0, sizeof(*id_phys)); 4168 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4169 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4170 sizeof(*id_phys)); 4171 if (!rc) 4172 /* Reserve space for FW operations */ 4173 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4174 #define DRIVE_QUEUE_DEPTH 7 4175 dev->queue_depth = 4176 le16_to_cpu(id_phys->current_queue_depth_limit) - 4177 DRIVE_CMDS_RESERVED_FOR_FW; 4178 else 4179 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4180 } 4181 4182 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4183 struct ReportExtendedLUNdata *rlep, int rle_index, 4184 struct bmic_identify_physical_device *id_phys) 4185 { 4186 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4187 4188 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4189 this_device->hba_ioaccel_enabled = 1; 4190 4191 memcpy(&this_device->active_path_index, 4192 &id_phys->active_path_number, 4193 sizeof(this_device->active_path_index)); 4194 memcpy(&this_device->path_map, 4195 &id_phys->redundant_path_present_map, 4196 sizeof(this_device->path_map)); 4197 memcpy(&this_device->box, 4198 &id_phys->alternate_paths_phys_box_on_port, 4199 sizeof(this_device->box)); 4200 memcpy(&this_device->phys_connector, 4201 &id_phys->alternate_paths_phys_connector, 4202 sizeof(this_device->phys_connector)); 4203 memcpy(&this_device->bay, 4204 &id_phys->phys_bay_in_box, 4205 sizeof(this_device->bay)); 4206 } 4207 4208 /* get number of local logical disks. */ 4209 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4210 struct bmic_identify_controller *id_ctlr, 4211 u32 *nlocals) 4212 { 4213 int rc; 4214 4215 if (!id_ctlr) { 4216 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4217 __func__); 4218 return -ENOMEM; 4219 } 4220 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4221 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4222 if (!rc) 4223 if (id_ctlr->configured_logical_drive_count < 255) 4224 *nlocals = id_ctlr->configured_logical_drive_count; 4225 else 4226 *nlocals = le16_to_cpu( 4227 id_ctlr->extended_logical_unit_count); 4228 else 4229 *nlocals = -1; 4230 return rc; 4231 } 4232 4233 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4234 { 4235 struct bmic_identify_physical_device *id_phys; 4236 bool is_spare = false; 4237 int rc; 4238 4239 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4240 if (!id_phys) 4241 return false; 4242 4243 rc = hpsa_bmic_id_physical_device(h, 4244 lunaddrbytes, 4245 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4246 id_phys, sizeof(*id_phys)); 4247 if (rc == 0) 4248 is_spare = (id_phys->more_flags >> 6) & 0x01; 4249 4250 kfree(id_phys); 4251 return is_spare; 4252 } 4253 4254 #define RPL_DEV_FLAG_NON_DISK 0x1 4255 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4256 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4257 4258 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4259 4260 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4261 struct ext_report_lun_entry *rle) 4262 { 4263 u8 device_flags; 4264 u8 device_type; 4265 4266 if (!MASKED_DEVICE(lunaddrbytes)) 4267 return false; 4268 4269 device_flags = rle->device_flags; 4270 device_type = rle->device_type; 4271 4272 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4273 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4274 return false; 4275 return true; 4276 } 4277 4278 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4279 return false; 4280 4281 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4282 return false; 4283 4284 /* 4285 * Spares may be spun down, we do not want to 4286 * do an Inquiry to a RAID set spare drive as 4287 * that would have them spun up, that is a 4288 * performance hit because I/O to the RAID device 4289 * stops while the spin up occurs which can take 4290 * over 50 seconds. 4291 */ 4292 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4293 return true; 4294 4295 return false; 4296 } 4297 4298 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4299 { 4300 /* the idea here is we could get notified 4301 * that some devices have changed, so we do a report 4302 * physical luns and report logical luns cmd, and adjust 4303 * our list of devices accordingly. 4304 * 4305 * The scsi3addr's of devices won't change so long as the 4306 * adapter is not reset. That means we can rescan and 4307 * tell which devices we already know about, vs. new 4308 * devices, vs. disappearing devices. 4309 */ 4310 struct ReportExtendedLUNdata *physdev_list = NULL; 4311 struct ReportLUNdata *logdev_list = NULL; 4312 struct bmic_identify_physical_device *id_phys = NULL; 4313 struct bmic_identify_controller *id_ctlr = NULL; 4314 u32 nphysicals = 0; 4315 u32 nlogicals = 0; 4316 u32 nlocal_logicals = 0; 4317 u32 ndev_allocated = 0; 4318 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4319 int ncurrent = 0; 4320 int i, n_ext_target_devs, ndevs_to_allocate; 4321 int raid_ctlr_position; 4322 bool physical_device; 4323 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4324 4325 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 4326 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4327 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4328 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4329 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4330 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4331 4332 if (!currentsd || !physdev_list || !logdev_list || 4333 !tmpdevice || !id_phys || !id_ctlr) { 4334 dev_err(&h->pdev->dev, "out of memory\n"); 4335 goto out; 4336 } 4337 memset(lunzerobits, 0, sizeof(lunzerobits)); 4338 4339 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4340 4341 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4342 logdev_list, &nlogicals)) { 4343 h->drv_req_rescan = 1; 4344 goto out; 4345 } 4346 4347 /* Set number of local logicals (non PTRAID) */ 4348 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4349 dev_warn(&h->pdev->dev, 4350 "%s: Can't determine number of local logical devices.\n", 4351 __func__); 4352 } 4353 4354 /* We might see up to the maximum number of logical and physical disks 4355 * plus external target devices, and a device for the local RAID 4356 * controller. 4357 */ 4358 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4359 4360 hpsa_ext_ctrl_present(h, physdev_list); 4361 4362 /* Allocate the per device structures */ 4363 for (i = 0; i < ndevs_to_allocate; i++) { 4364 if (i >= HPSA_MAX_DEVICES) { 4365 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4366 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4367 ndevs_to_allocate - HPSA_MAX_DEVICES); 4368 break; 4369 } 4370 4371 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4372 if (!currentsd[i]) { 4373 h->drv_req_rescan = 1; 4374 goto out; 4375 } 4376 ndev_allocated++; 4377 } 4378 4379 if (is_scsi_rev_5(h)) 4380 raid_ctlr_position = 0; 4381 else 4382 raid_ctlr_position = nphysicals + nlogicals; 4383 4384 /* adjust our table of devices */ 4385 n_ext_target_devs = 0; 4386 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4387 u8 *lunaddrbytes, is_OBDR = 0; 4388 int rc = 0; 4389 int phys_dev_index = i - (raid_ctlr_position == 0); 4390 bool skip_device = false; 4391 4392 memset(tmpdevice, 0, sizeof(*tmpdevice)); 4393 4394 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4395 4396 /* Figure out where the LUN ID info is coming from */ 4397 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4398 i, nphysicals, nlogicals, physdev_list, logdev_list); 4399 4400 /* Determine if this is a lun from an external target array */ 4401 tmpdevice->external = 4402 figure_external_status(h, raid_ctlr_position, i, 4403 nphysicals, nlocal_logicals); 4404 4405 /* 4406 * Skip over some devices such as a spare. 4407 */ 4408 if (!tmpdevice->external && physical_device) { 4409 skip_device = hpsa_skip_device(h, lunaddrbytes, 4410 &physdev_list->LUN[phys_dev_index]); 4411 if (skip_device) 4412 continue; 4413 } 4414 4415 /* Get device type, vendor, model, device id, raid_map */ 4416 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4417 &is_OBDR); 4418 if (rc == -ENOMEM) { 4419 dev_warn(&h->pdev->dev, 4420 "Out of memory, rescan deferred.\n"); 4421 h->drv_req_rescan = 1; 4422 goto out; 4423 } 4424 if (rc) { 4425 h->drv_req_rescan = 1; 4426 continue; 4427 } 4428 4429 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4430 this_device = currentsd[ncurrent]; 4431 4432 *this_device = *tmpdevice; 4433 this_device->physical_device = physical_device; 4434 4435 /* 4436 * Expose all devices except for physical devices that 4437 * are masked. 4438 */ 4439 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4440 this_device->expose_device = 0; 4441 else 4442 this_device->expose_device = 1; 4443 4444 4445 /* 4446 * Get the SAS address for physical devices that are exposed. 4447 */ 4448 if (this_device->physical_device && this_device->expose_device) 4449 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4450 4451 switch (this_device->devtype) { 4452 case TYPE_ROM: 4453 /* We don't *really* support actual CD-ROM devices, 4454 * just "One Button Disaster Recovery" tape drive 4455 * which temporarily pretends to be a CD-ROM drive. 4456 * So we check that the device is really an OBDR tape 4457 * device by checking for "$DR-10" in bytes 43-48 of 4458 * the inquiry data. 4459 */ 4460 if (is_OBDR) 4461 ncurrent++; 4462 break; 4463 case TYPE_DISK: 4464 case TYPE_ZBC: 4465 if (this_device->physical_device) { 4466 /* The disk is in HBA mode. */ 4467 /* Never use RAID mapper in HBA mode. */ 4468 this_device->offload_enabled = 0; 4469 hpsa_get_ioaccel_drive_info(h, this_device, 4470 physdev_list, phys_dev_index, id_phys); 4471 hpsa_get_path_info(this_device, 4472 physdev_list, phys_dev_index, id_phys); 4473 } 4474 ncurrent++; 4475 break; 4476 case TYPE_TAPE: 4477 case TYPE_MEDIUM_CHANGER: 4478 ncurrent++; 4479 break; 4480 case TYPE_ENCLOSURE: 4481 if (!this_device->external) 4482 hpsa_get_enclosure_info(h, lunaddrbytes, 4483 physdev_list, phys_dev_index, 4484 this_device); 4485 ncurrent++; 4486 break; 4487 case TYPE_RAID: 4488 /* Only present the Smartarray HBA as a RAID controller. 4489 * If it's a RAID controller other than the HBA itself 4490 * (an external RAID controller, MSA500 or similar) 4491 * don't present it. 4492 */ 4493 if (!is_hba_lunid(lunaddrbytes)) 4494 break; 4495 ncurrent++; 4496 break; 4497 default: 4498 break; 4499 } 4500 if (ncurrent >= HPSA_MAX_DEVICES) 4501 break; 4502 } 4503 4504 if (h->sas_host == NULL) { 4505 int rc = 0; 4506 4507 rc = hpsa_add_sas_host(h); 4508 if (rc) { 4509 dev_warn(&h->pdev->dev, 4510 "Could not add sas host %d\n", rc); 4511 goto out; 4512 } 4513 } 4514 4515 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4516 out: 4517 kfree(tmpdevice); 4518 for (i = 0; i < ndev_allocated; i++) 4519 kfree(currentsd[i]); 4520 kfree(currentsd); 4521 kfree(physdev_list); 4522 kfree(logdev_list); 4523 kfree(id_ctlr); 4524 kfree(id_phys); 4525 } 4526 4527 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4528 struct scatterlist *sg) 4529 { 4530 u64 addr64 = (u64) sg_dma_address(sg); 4531 unsigned int len = sg_dma_len(sg); 4532 4533 desc->Addr = cpu_to_le64(addr64); 4534 desc->Len = cpu_to_le32(len); 4535 desc->Ext = 0; 4536 } 4537 4538 /* 4539 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4540 * dma mapping and fills in the scatter gather entries of the 4541 * hpsa command, cp. 4542 */ 4543 static int hpsa_scatter_gather(struct ctlr_info *h, 4544 struct CommandList *cp, 4545 struct scsi_cmnd *cmd) 4546 { 4547 struct scatterlist *sg; 4548 int use_sg, i, sg_limit, chained, last_sg; 4549 struct SGDescriptor *curr_sg; 4550 4551 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4552 4553 use_sg = scsi_dma_map(cmd); 4554 if (use_sg < 0) 4555 return use_sg; 4556 4557 if (!use_sg) 4558 goto sglist_finished; 4559 4560 /* 4561 * If the number of entries is greater than the max for a single list, 4562 * then we have a chained list; we will set up all but one entry in the 4563 * first list (the last entry is saved for link information); 4564 * otherwise, we don't have a chained list and we'll set up at each of 4565 * the entries in the one list. 4566 */ 4567 curr_sg = cp->SG; 4568 chained = use_sg > h->max_cmd_sg_entries; 4569 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4570 last_sg = scsi_sg_count(cmd) - 1; 4571 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4572 hpsa_set_sg_descriptor(curr_sg, sg); 4573 curr_sg++; 4574 } 4575 4576 if (chained) { 4577 /* 4578 * Continue with the chained list. Set curr_sg to the chained 4579 * list. Modify the limit to the total count less the entries 4580 * we've already set up. Resume the scan at the list entry 4581 * where the previous loop left off. 4582 */ 4583 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4584 sg_limit = use_sg - sg_limit; 4585 for_each_sg(sg, sg, sg_limit, i) { 4586 hpsa_set_sg_descriptor(curr_sg, sg); 4587 curr_sg++; 4588 } 4589 } 4590 4591 /* Back the pointer up to the last entry and mark it as "last". */ 4592 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4593 4594 if (use_sg + chained > h->maxSG) 4595 h->maxSG = use_sg + chained; 4596 4597 if (chained) { 4598 cp->Header.SGList = h->max_cmd_sg_entries; 4599 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4600 if (hpsa_map_sg_chain_block(h, cp)) { 4601 scsi_dma_unmap(cmd); 4602 return -1; 4603 } 4604 return 0; 4605 } 4606 4607 sglist_finished: 4608 4609 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4610 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4611 return 0; 4612 } 4613 4614 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4615 u8 *cdb, int cdb_len, 4616 const char *func) 4617 { 4618 dev_warn(&h->pdev->dev, 4619 "%s: Blocking zero-length request: CDB:%*phN\n", 4620 func, cdb_len, cdb); 4621 } 4622 4623 #define IO_ACCEL_INELIGIBLE 1 4624 /* zero-length transfers trigger hardware errors. */ 4625 static bool is_zero_length_transfer(u8 *cdb) 4626 { 4627 u32 block_cnt; 4628 4629 /* Block zero-length transfer sizes on certain commands. */ 4630 switch (cdb[0]) { 4631 case READ_10: 4632 case WRITE_10: 4633 case VERIFY: /* 0x2F */ 4634 case WRITE_VERIFY: /* 0x2E */ 4635 block_cnt = get_unaligned_be16(&cdb[7]); 4636 break; 4637 case READ_12: 4638 case WRITE_12: 4639 case VERIFY_12: /* 0xAF */ 4640 case WRITE_VERIFY_12: /* 0xAE */ 4641 block_cnt = get_unaligned_be32(&cdb[6]); 4642 break; 4643 case READ_16: 4644 case WRITE_16: 4645 case VERIFY_16: /* 0x8F */ 4646 block_cnt = get_unaligned_be32(&cdb[10]); 4647 break; 4648 default: 4649 return false; 4650 } 4651 4652 return block_cnt == 0; 4653 } 4654 4655 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4656 { 4657 int is_write = 0; 4658 u32 block; 4659 u32 block_cnt; 4660 4661 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4662 switch (cdb[0]) { 4663 case WRITE_6: 4664 case WRITE_12: 4665 is_write = 1; 4666 /* fall through */ 4667 case READ_6: 4668 case READ_12: 4669 if (*cdb_len == 6) { 4670 block = (((cdb[1] & 0x1F) << 16) | 4671 (cdb[2] << 8) | 4672 cdb[3]); 4673 block_cnt = cdb[4]; 4674 if (block_cnt == 0) 4675 block_cnt = 256; 4676 } else { 4677 BUG_ON(*cdb_len != 12); 4678 block = get_unaligned_be32(&cdb[2]); 4679 block_cnt = get_unaligned_be32(&cdb[6]); 4680 } 4681 if (block_cnt > 0xffff) 4682 return IO_ACCEL_INELIGIBLE; 4683 4684 cdb[0] = is_write ? WRITE_10 : READ_10; 4685 cdb[1] = 0; 4686 cdb[2] = (u8) (block >> 24); 4687 cdb[3] = (u8) (block >> 16); 4688 cdb[4] = (u8) (block >> 8); 4689 cdb[5] = (u8) (block); 4690 cdb[6] = 0; 4691 cdb[7] = (u8) (block_cnt >> 8); 4692 cdb[8] = (u8) (block_cnt); 4693 cdb[9] = 0; 4694 *cdb_len = 10; 4695 break; 4696 } 4697 return 0; 4698 } 4699 4700 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4701 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4702 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4703 { 4704 struct scsi_cmnd *cmd = c->scsi_cmd; 4705 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4706 unsigned int len; 4707 unsigned int total_len = 0; 4708 struct scatterlist *sg; 4709 u64 addr64; 4710 int use_sg, i; 4711 struct SGDescriptor *curr_sg; 4712 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4713 4714 /* TODO: implement chaining support */ 4715 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4716 atomic_dec(&phys_disk->ioaccel_cmds_out); 4717 return IO_ACCEL_INELIGIBLE; 4718 } 4719 4720 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4721 4722 if (is_zero_length_transfer(cdb)) { 4723 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4724 atomic_dec(&phys_disk->ioaccel_cmds_out); 4725 return IO_ACCEL_INELIGIBLE; 4726 } 4727 4728 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4729 atomic_dec(&phys_disk->ioaccel_cmds_out); 4730 return IO_ACCEL_INELIGIBLE; 4731 } 4732 4733 c->cmd_type = CMD_IOACCEL1; 4734 4735 /* Adjust the DMA address to point to the accelerated command buffer */ 4736 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4737 (c->cmdindex * sizeof(*cp)); 4738 BUG_ON(c->busaddr & 0x0000007F); 4739 4740 use_sg = scsi_dma_map(cmd); 4741 if (use_sg < 0) { 4742 atomic_dec(&phys_disk->ioaccel_cmds_out); 4743 return use_sg; 4744 } 4745 4746 if (use_sg) { 4747 curr_sg = cp->SG; 4748 scsi_for_each_sg(cmd, sg, use_sg, i) { 4749 addr64 = (u64) sg_dma_address(sg); 4750 len = sg_dma_len(sg); 4751 total_len += len; 4752 curr_sg->Addr = cpu_to_le64(addr64); 4753 curr_sg->Len = cpu_to_le32(len); 4754 curr_sg->Ext = cpu_to_le32(0); 4755 curr_sg++; 4756 } 4757 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4758 4759 switch (cmd->sc_data_direction) { 4760 case DMA_TO_DEVICE: 4761 control |= IOACCEL1_CONTROL_DATA_OUT; 4762 break; 4763 case DMA_FROM_DEVICE: 4764 control |= IOACCEL1_CONTROL_DATA_IN; 4765 break; 4766 case DMA_NONE: 4767 control |= IOACCEL1_CONTROL_NODATAXFER; 4768 break; 4769 default: 4770 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4771 cmd->sc_data_direction); 4772 BUG(); 4773 break; 4774 } 4775 } else { 4776 control |= IOACCEL1_CONTROL_NODATAXFER; 4777 } 4778 4779 c->Header.SGList = use_sg; 4780 /* Fill out the command structure to submit */ 4781 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4782 cp->transfer_len = cpu_to_le32(total_len); 4783 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4784 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4785 cp->control = cpu_to_le32(control); 4786 memcpy(cp->CDB, cdb, cdb_len); 4787 memcpy(cp->CISS_LUN, scsi3addr, 8); 4788 /* Tag was already set at init time. */ 4789 enqueue_cmd_and_start_io(h, c); 4790 return 0; 4791 } 4792 4793 /* 4794 * Queue a command directly to a device behind the controller using the 4795 * I/O accelerator path. 4796 */ 4797 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4798 struct CommandList *c) 4799 { 4800 struct scsi_cmnd *cmd = c->scsi_cmd; 4801 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4802 4803 if (!dev) 4804 return -1; 4805 4806 c->phys_disk = dev; 4807 4808 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4809 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4810 } 4811 4812 /* 4813 * Set encryption parameters for the ioaccel2 request 4814 */ 4815 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4816 struct CommandList *c, struct io_accel2_cmd *cp) 4817 { 4818 struct scsi_cmnd *cmd = c->scsi_cmd; 4819 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4820 struct raid_map_data *map = &dev->raid_map; 4821 u64 first_block; 4822 4823 /* Are we doing encryption on this device */ 4824 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4825 return; 4826 /* Set the data encryption key index. */ 4827 cp->dekindex = map->dekindex; 4828 4829 /* Set the encryption enable flag, encoded into direction field. */ 4830 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4831 4832 /* Set encryption tweak values based on logical block address 4833 * If block size is 512, tweak value is LBA. 4834 * For other block sizes, tweak is (LBA * block size)/ 512) 4835 */ 4836 switch (cmd->cmnd[0]) { 4837 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4838 case READ_6: 4839 case WRITE_6: 4840 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4841 (cmd->cmnd[2] << 8) | 4842 cmd->cmnd[3]); 4843 break; 4844 case WRITE_10: 4845 case READ_10: 4846 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4847 case WRITE_12: 4848 case READ_12: 4849 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4850 break; 4851 case WRITE_16: 4852 case READ_16: 4853 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4854 break; 4855 default: 4856 dev_err(&h->pdev->dev, 4857 "ERROR: %s: size (0x%x) not supported for encryption\n", 4858 __func__, cmd->cmnd[0]); 4859 BUG(); 4860 break; 4861 } 4862 4863 if (le32_to_cpu(map->volume_blk_size) != 512) 4864 first_block = first_block * 4865 le32_to_cpu(map->volume_blk_size)/512; 4866 4867 cp->tweak_lower = cpu_to_le32(first_block); 4868 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4869 } 4870 4871 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4872 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4873 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4874 { 4875 struct scsi_cmnd *cmd = c->scsi_cmd; 4876 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4877 struct ioaccel2_sg_element *curr_sg; 4878 int use_sg, i; 4879 struct scatterlist *sg; 4880 u64 addr64; 4881 u32 len; 4882 u32 total_len = 0; 4883 4884 if (!cmd->device) 4885 return -1; 4886 4887 if (!cmd->device->hostdata) 4888 return -1; 4889 4890 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4891 4892 if (is_zero_length_transfer(cdb)) { 4893 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4894 atomic_dec(&phys_disk->ioaccel_cmds_out); 4895 return IO_ACCEL_INELIGIBLE; 4896 } 4897 4898 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4899 atomic_dec(&phys_disk->ioaccel_cmds_out); 4900 return IO_ACCEL_INELIGIBLE; 4901 } 4902 4903 c->cmd_type = CMD_IOACCEL2; 4904 /* Adjust the DMA address to point to the accelerated command buffer */ 4905 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4906 (c->cmdindex * sizeof(*cp)); 4907 BUG_ON(c->busaddr & 0x0000007F); 4908 4909 memset(cp, 0, sizeof(*cp)); 4910 cp->IU_type = IOACCEL2_IU_TYPE; 4911 4912 use_sg = scsi_dma_map(cmd); 4913 if (use_sg < 0) { 4914 atomic_dec(&phys_disk->ioaccel_cmds_out); 4915 return use_sg; 4916 } 4917 4918 if (use_sg) { 4919 curr_sg = cp->sg; 4920 if (use_sg > h->ioaccel_maxsg) { 4921 addr64 = le64_to_cpu( 4922 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4923 curr_sg->address = cpu_to_le64(addr64); 4924 curr_sg->length = 0; 4925 curr_sg->reserved[0] = 0; 4926 curr_sg->reserved[1] = 0; 4927 curr_sg->reserved[2] = 0; 4928 curr_sg->chain_indicator = 0x80; 4929 4930 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4931 } 4932 scsi_for_each_sg(cmd, sg, use_sg, i) { 4933 addr64 = (u64) sg_dma_address(sg); 4934 len = sg_dma_len(sg); 4935 total_len += len; 4936 curr_sg->address = cpu_to_le64(addr64); 4937 curr_sg->length = cpu_to_le32(len); 4938 curr_sg->reserved[0] = 0; 4939 curr_sg->reserved[1] = 0; 4940 curr_sg->reserved[2] = 0; 4941 curr_sg->chain_indicator = 0; 4942 curr_sg++; 4943 } 4944 4945 switch (cmd->sc_data_direction) { 4946 case DMA_TO_DEVICE: 4947 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4948 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4949 break; 4950 case DMA_FROM_DEVICE: 4951 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4952 cp->direction |= IOACCEL2_DIR_DATA_IN; 4953 break; 4954 case DMA_NONE: 4955 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4956 cp->direction |= IOACCEL2_DIR_NO_DATA; 4957 break; 4958 default: 4959 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4960 cmd->sc_data_direction); 4961 BUG(); 4962 break; 4963 } 4964 } else { 4965 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4966 cp->direction |= IOACCEL2_DIR_NO_DATA; 4967 } 4968 4969 /* Set encryption parameters, if necessary */ 4970 set_encrypt_ioaccel2(h, c, cp); 4971 4972 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4973 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4974 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4975 4976 cp->data_len = cpu_to_le32(total_len); 4977 cp->err_ptr = cpu_to_le64(c->busaddr + 4978 offsetof(struct io_accel2_cmd, error_data)); 4979 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4980 4981 /* fill in sg elements */ 4982 if (use_sg > h->ioaccel_maxsg) { 4983 cp->sg_count = 1; 4984 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4985 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4986 atomic_dec(&phys_disk->ioaccel_cmds_out); 4987 scsi_dma_unmap(cmd); 4988 return -1; 4989 } 4990 } else 4991 cp->sg_count = (u8) use_sg; 4992 4993 enqueue_cmd_and_start_io(h, c); 4994 return 0; 4995 } 4996 4997 /* 4998 * Queue a command to the correct I/O accelerator path. 4999 */ 5000 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5001 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 5002 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5003 { 5004 if (!c->scsi_cmd->device) 5005 return -1; 5006 5007 if (!c->scsi_cmd->device->hostdata) 5008 return -1; 5009 5010 /* Try to honor the device's queue depth */ 5011 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 5012 phys_disk->queue_depth) { 5013 atomic_dec(&phys_disk->ioaccel_cmds_out); 5014 return IO_ACCEL_INELIGIBLE; 5015 } 5016 if (h->transMethod & CFGTBL_Trans_io_accel1) 5017 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 5018 cdb, cdb_len, scsi3addr, 5019 phys_disk); 5020 else 5021 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 5022 cdb, cdb_len, scsi3addr, 5023 phys_disk); 5024 } 5025 5026 static void raid_map_helper(struct raid_map_data *map, 5027 int offload_to_mirror, u32 *map_index, u32 *current_group) 5028 { 5029 if (offload_to_mirror == 0) { 5030 /* use physical disk in the first mirrored group. */ 5031 *map_index %= le16_to_cpu(map->data_disks_per_row); 5032 return; 5033 } 5034 do { 5035 /* determine mirror group that *map_index indicates */ 5036 *current_group = *map_index / 5037 le16_to_cpu(map->data_disks_per_row); 5038 if (offload_to_mirror == *current_group) 5039 continue; 5040 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 5041 /* select map index from next group */ 5042 *map_index += le16_to_cpu(map->data_disks_per_row); 5043 (*current_group)++; 5044 } else { 5045 /* select map index from first group */ 5046 *map_index %= le16_to_cpu(map->data_disks_per_row); 5047 *current_group = 0; 5048 } 5049 } while (offload_to_mirror != *current_group); 5050 } 5051 5052 /* 5053 * Attempt to perform offload RAID mapping for a logical volume I/O. 5054 */ 5055 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5056 struct CommandList *c) 5057 { 5058 struct scsi_cmnd *cmd = c->scsi_cmd; 5059 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5060 struct raid_map_data *map = &dev->raid_map; 5061 struct raid_map_disk_data *dd = &map->data[0]; 5062 int is_write = 0; 5063 u32 map_index; 5064 u64 first_block, last_block; 5065 u32 block_cnt; 5066 u32 blocks_per_row; 5067 u64 first_row, last_row; 5068 u32 first_row_offset, last_row_offset; 5069 u32 first_column, last_column; 5070 u64 r0_first_row, r0_last_row; 5071 u32 r5or6_blocks_per_row; 5072 u64 r5or6_first_row, r5or6_last_row; 5073 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5074 u32 r5or6_first_column, r5or6_last_column; 5075 u32 total_disks_per_row; 5076 u32 stripesize; 5077 u32 first_group, last_group, current_group; 5078 u32 map_row; 5079 u32 disk_handle; 5080 u64 disk_block; 5081 u32 disk_block_cnt; 5082 u8 cdb[16]; 5083 u8 cdb_len; 5084 u16 strip_size; 5085 #if BITS_PER_LONG == 32 5086 u64 tmpdiv; 5087 #endif 5088 int offload_to_mirror; 5089 5090 if (!dev) 5091 return -1; 5092 5093 /* check for valid opcode, get LBA and block count */ 5094 switch (cmd->cmnd[0]) { 5095 case WRITE_6: 5096 is_write = 1; 5097 /* fall through */ 5098 case READ_6: 5099 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5100 (cmd->cmnd[2] << 8) | 5101 cmd->cmnd[3]); 5102 block_cnt = cmd->cmnd[4]; 5103 if (block_cnt == 0) 5104 block_cnt = 256; 5105 break; 5106 case WRITE_10: 5107 is_write = 1; 5108 /* fall through */ 5109 case READ_10: 5110 first_block = 5111 (((u64) cmd->cmnd[2]) << 24) | 5112 (((u64) cmd->cmnd[3]) << 16) | 5113 (((u64) cmd->cmnd[4]) << 8) | 5114 cmd->cmnd[5]; 5115 block_cnt = 5116 (((u32) cmd->cmnd[7]) << 8) | 5117 cmd->cmnd[8]; 5118 break; 5119 case WRITE_12: 5120 is_write = 1; 5121 /* fall through */ 5122 case READ_12: 5123 first_block = 5124 (((u64) cmd->cmnd[2]) << 24) | 5125 (((u64) cmd->cmnd[3]) << 16) | 5126 (((u64) cmd->cmnd[4]) << 8) | 5127 cmd->cmnd[5]; 5128 block_cnt = 5129 (((u32) cmd->cmnd[6]) << 24) | 5130 (((u32) cmd->cmnd[7]) << 16) | 5131 (((u32) cmd->cmnd[8]) << 8) | 5132 cmd->cmnd[9]; 5133 break; 5134 case WRITE_16: 5135 is_write = 1; 5136 /* fall through */ 5137 case READ_16: 5138 first_block = 5139 (((u64) cmd->cmnd[2]) << 56) | 5140 (((u64) cmd->cmnd[3]) << 48) | 5141 (((u64) cmd->cmnd[4]) << 40) | 5142 (((u64) cmd->cmnd[5]) << 32) | 5143 (((u64) cmd->cmnd[6]) << 24) | 5144 (((u64) cmd->cmnd[7]) << 16) | 5145 (((u64) cmd->cmnd[8]) << 8) | 5146 cmd->cmnd[9]; 5147 block_cnt = 5148 (((u32) cmd->cmnd[10]) << 24) | 5149 (((u32) cmd->cmnd[11]) << 16) | 5150 (((u32) cmd->cmnd[12]) << 8) | 5151 cmd->cmnd[13]; 5152 break; 5153 default: 5154 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5155 } 5156 last_block = first_block + block_cnt - 1; 5157 5158 /* check for write to non-RAID-0 */ 5159 if (is_write && dev->raid_level != 0) 5160 return IO_ACCEL_INELIGIBLE; 5161 5162 /* check for invalid block or wraparound */ 5163 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5164 last_block < first_block) 5165 return IO_ACCEL_INELIGIBLE; 5166 5167 /* calculate stripe information for the request */ 5168 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5169 le16_to_cpu(map->strip_size); 5170 strip_size = le16_to_cpu(map->strip_size); 5171 #if BITS_PER_LONG == 32 5172 tmpdiv = first_block; 5173 (void) do_div(tmpdiv, blocks_per_row); 5174 first_row = tmpdiv; 5175 tmpdiv = last_block; 5176 (void) do_div(tmpdiv, blocks_per_row); 5177 last_row = tmpdiv; 5178 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5179 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5180 tmpdiv = first_row_offset; 5181 (void) do_div(tmpdiv, strip_size); 5182 first_column = tmpdiv; 5183 tmpdiv = last_row_offset; 5184 (void) do_div(tmpdiv, strip_size); 5185 last_column = tmpdiv; 5186 #else 5187 first_row = first_block / blocks_per_row; 5188 last_row = last_block / blocks_per_row; 5189 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5190 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5191 first_column = first_row_offset / strip_size; 5192 last_column = last_row_offset / strip_size; 5193 #endif 5194 5195 /* if this isn't a single row/column then give to the controller */ 5196 if ((first_row != last_row) || (first_column != last_column)) 5197 return IO_ACCEL_INELIGIBLE; 5198 5199 /* proceeding with driver mapping */ 5200 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5201 le16_to_cpu(map->metadata_disks_per_row); 5202 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5203 le16_to_cpu(map->row_cnt); 5204 map_index = (map_row * total_disks_per_row) + first_column; 5205 5206 switch (dev->raid_level) { 5207 case HPSA_RAID_0: 5208 break; /* nothing special to do */ 5209 case HPSA_RAID_1: 5210 /* Handles load balance across RAID 1 members. 5211 * (2-drive R1 and R10 with even # of drives.) 5212 * Appropriate for SSDs, not optimal for HDDs 5213 */ 5214 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5215 if (dev->offload_to_mirror) 5216 map_index += le16_to_cpu(map->data_disks_per_row); 5217 dev->offload_to_mirror = !dev->offload_to_mirror; 5218 break; 5219 case HPSA_RAID_ADM: 5220 /* Handles N-way mirrors (R1-ADM) 5221 * and R10 with # of drives divisible by 3.) 5222 */ 5223 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5224 5225 offload_to_mirror = dev->offload_to_mirror; 5226 raid_map_helper(map, offload_to_mirror, 5227 &map_index, ¤t_group); 5228 /* set mirror group to use next time */ 5229 offload_to_mirror = 5230 (offload_to_mirror >= 5231 le16_to_cpu(map->layout_map_count) - 1) 5232 ? 0 : offload_to_mirror + 1; 5233 dev->offload_to_mirror = offload_to_mirror; 5234 /* Avoid direct use of dev->offload_to_mirror within this 5235 * function since multiple threads might simultaneously 5236 * increment it beyond the range of dev->layout_map_count -1. 5237 */ 5238 break; 5239 case HPSA_RAID_5: 5240 case HPSA_RAID_6: 5241 if (le16_to_cpu(map->layout_map_count) <= 1) 5242 break; 5243 5244 /* Verify first and last block are in same RAID group */ 5245 r5or6_blocks_per_row = 5246 le16_to_cpu(map->strip_size) * 5247 le16_to_cpu(map->data_disks_per_row); 5248 BUG_ON(r5or6_blocks_per_row == 0); 5249 stripesize = r5or6_blocks_per_row * 5250 le16_to_cpu(map->layout_map_count); 5251 #if BITS_PER_LONG == 32 5252 tmpdiv = first_block; 5253 first_group = do_div(tmpdiv, stripesize); 5254 tmpdiv = first_group; 5255 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5256 first_group = tmpdiv; 5257 tmpdiv = last_block; 5258 last_group = do_div(tmpdiv, stripesize); 5259 tmpdiv = last_group; 5260 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5261 last_group = tmpdiv; 5262 #else 5263 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5264 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5265 #endif 5266 if (first_group != last_group) 5267 return IO_ACCEL_INELIGIBLE; 5268 5269 /* Verify request is in a single row of RAID 5/6 */ 5270 #if BITS_PER_LONG == 32 5271 tmpdiv = first_block; 5272 (void) do_div(tmpdiv, stripesize); 5273 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5274 tmpdiv = last_block; 5275 (void) do_div(tmpdiv, stripesize); 5276 r5or6_last_row = r0_last_row = tmpdiv; 5277 #else 5278 first_row = r5or6_first_row = r0_first_row = 5279 first_block / stripesize; 5280 r5or6_last_row = r0_last_row = last_block / stripesize; 5281 #endif 5282 if (r5or6_first_row != r5or6_last_row) 5283 return IO_ACCEL_INELIGIBLE; 5284 5285 5286 /* Verify request is in a single column */ 5287 #if BITS_PER_LONG == 32 5288 tmpdiv = first_block; 5289 first_row_offset = do_div(tmpdiv, stripesize); 5290 tmpdiv = first_row_offset; 5291 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5292 r5or6_first_row_offset = first_row_offset; 5293 tmpdiv = last_block; 5294 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5295 tmpdiv = r5or6_last_row_offset; 5296 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5297 tmpdiv = r5or6_first_row_offset; 5298 (void) do_div(tmpdiv, map->strip_size); 5299 first_column = r5or6_first_column = tmpdiv; 5300 tmpdiv = r5or6_last_row_offset; 5301 (void) do_div(tmpdiv, map->strip_size); 5302 r5or6_last_column = tmpdiv; 5303 #else 5304 first_row_offset = r5or6_first_row_offset = 5305 (u32)((first_block % stripesize) % 5306 r5or6_blocks_per_row); 5307 5308 r5or6_last_row_offset = 5309 (u32)((last_block % stripesize) % 5310 r5or6_blocks_per_row); 5311 5312 first_column = r5or6_first_column = 5313 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5314 r5or6_last_column = 5315 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5316 #endif 5317 if (r5or6_first_column != r5or6_last_column) 5318 return IO_ACCEL_INELIGIBLE; 5319 5320 /* Request is eligible */ 5321 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5322 le16_to_cpu(map->row_cnt); 5323 5324 map_index = (first_group * 5325 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5326 (map_row * total_disks_per_row) + first_column; 5327 break; 5328 default: 5329 return IO_ACCEL_INELIGIBLE; 5330 } 5331 5332 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5333 return IO_ACCEL_INELIGIBLE; 5334 5335 c->phys_disk = dev->phys_disk[map_index]; 5336 if (!c->phys_disk) 5337 return IO_ACCEL_INELIGIBLE; 5338 5339 disk_handle = dd[map_index].ioaccel_handle; 5340 disk_block = le64_to_cpu(map->disk_starting_blk) + 5341 first_row * le16_to_cpu(map->strip_size) + 5342 (first_row_offset - first_column * 5343 le16_to_cpu(map->strip_size)); 5344 disk_block_cnt = block_cnt; 5345 5346 /* handle differing logical/physical block sizes */ 5347 if (map->phys_blk_shift) { 5348 disk_block <<= map->phys_blk_shift; 5349 disk_block_cnt <<= map->phys_blk_shift; 5350 } 5351 BUG_ON(disk_block_cnt > 0xffff); 5352 5353 /* build the new CDB for the physical disk I/O */ 5354 if (disk_block > 0xffffffff) { 5355 cdb[0] = is_write ? WRITE_16 : READ_16; 5356 cdb[1] = 0; 5357 cdb[2] = (u8) (disk_block >> 56); 5358 cdb[3] = (u8) (disk_block >> 48); 5359 cdb[4] = (u8) (disk_block >> 40); 5360 cdb[5] = (u8) (disk_block >> 32); 5361 cdb[6] = (u8) (disk_block >> 24); 5362 cdb[7] = (u8) (disk_block >> 16); 5363 cdb[8] = (u8) (disk_block >> 8); 5364 cdb[9] = (u8) (disk_block); 5365 cdb[10] = (u8) (disk_block_cnt >> 24); 5366 cdb[11] = (u8) (disk_block_cnt >> 16); 5367 cdb[12] = (u8) (disk_block_cnt >> 8); 5368 cdb[13] = (u8) (disk_block_cnt); 5369 cdb[14] = 0; 5370 cdb[15] = 0; 5371 cdb_len = 16; 5372 } else { 5373 cdb[0] = is_write ? WRITE_10 : READ_10; 5374 cdb[1] = 0; 5375 cdb[2] = (u8) (disk_block >> 24); 5376 cdb[3] = (u8) (disk_block >> 16); 5377 cdb[4] = (u8) (disk_block >> 8); 5378 cdb[5] = (u8) (disk_block); 5379 cdb[6] = 0; 5380 cdb[7] = (u8) (disk_block_cnt >> 8); 5381 cdb[8] = (u8) (disk_block_cnt); 5382 cdb[9] = 0; 5383 cdb_len = 10; 5384 } 5385 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5386 dev->scsi3addr, 5387 dev->phys_disk[map_index]); 5388 } 5389 5390 /* 5391 * Submit commands down the "normal" RAID stack path 5392 * All callers to hpsa_ciss_submit must check lockup_detected 5393 * beforehand, before (opt.) and after calling cmd_alloc 5394 */ 5395 static int hpsa_ciss_submit(struct ctlr_info *h, 5396 struct CommandList *c, struct scsi_cmnd *cmd, 5397 unsigned char scsi3addr[]) 5398 { 5399 cmd->host_scribble = (unsigned char *) c; 5400 c->cmd_type = CMD_SCSI; 5401 c->scsi_cmd = cmd; 5402 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5403 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5404 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5405 5406 /* Fill in the request block... */ 5407 5408 c->Request.Timeout = 0; 5409 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5410 c->Request.CDBLen = cmd->cmd_len; 5411 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5412 switch (cmd->sc_data_direction) { 5413 case DMA_TO_DEVICE: 5414 c->Request.type_attr_dir = 5415 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5416 break; 5417 case DMA_FROM_DEVICE: 5418 c->Request.type_attr_dir = 5419 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5420 break; 5421 case DMA_NONE: 5422 c->Request.type_attr_dir = 5423 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5424 break; 5425 case DMA_BIDIRECTIONAL: 5426 /* This can happen if a buggy application does a scsi passthru 5427 * and sets both inlen and outlen to non-zero. ( see 5428 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5429 */ 5430 5431 c->Request.type_attr_dir = 5432 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5433 /* This is technically wrong, and hpsa controllers should 5434 * reject it with CMD_INVALID, which is the most correct 5435 * response, but non-fibre backends appear to let it 5436 * slide by, and give the same results as if this field 5437 * were set correctly. Either way is acceptable for 5438 * our purposes here. 5439 */ 5440 5441 break; 5442 5443 default: 5444 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5445 cmd->sc_data_direction); 5446 BUG(); 5447 break; 5448 } 5449 5450 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5451 hpsa_cmd_resolve_and_free(h, c); 5452 return SCSI_MLQUEUE_HOST_BUSY; 5453 } 5454 enqueue_cmd_and_start_io(h, c); 5455 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5456 return 0; 5457 } 5458 5459 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5460 struct CommandList *c) 5461 { 5462 dma_addr_t cmd_dma_handle, err_dma_handle; 5463 5464 /* Zero out all of commandlist except the last field, refcount */ 5465 memset(c, 0, offsetof(struct CommandList, refcount)); 5466 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5467 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5468 c->err_info = h->errinfo_pool + index; 5469 memset(c->err_info, 0, sizeof(*c->err_info)); 5470 err_dma_handle = h->errinfo_pool_dhandle 5471 + index * sizeof(*c->err_info); 5472 c->cmdindex = index; 5473 c->busaddr = (u32) cmd_dma_handle; 5474 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5475 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5476 c->h = h; 5477 c->scsi_cmd = SCSI_CMD_IDLE; 5478 } 5479 5480 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5481 { 5482 int i; 5483 5484 for (i = 0; i < h->nr_cmds; i++) { 5485 struct CommandList *c = h->cmd_pool + i; 5486 5487 hpsa_cmd_init(h, i, c); 5488 atomic_set(&c->refcount, 0); 5489 } 5490 } 5491 5492 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5493 struct CommandList *c) 5494 { 5495 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5496 5497 BUG_ON(c->cmdindex != index); 5498 5499 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5500 memset(c->err_info, 0, sizeof(*c->err_info)); 5501 c->busaddr = (u32) cmd_dma_handle; 5502 } 5503 5504 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5505 struct CommandList *c, struct scsi_cmnd *cmd, 5506 unsigned char *scsi3addr) 5507 { 5508 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5509 int rc = IO_ACCEL_INELIGIBLE; 5510 5511 if (!dev) 5512 return SCSI_MLQUEUE_HOST_BUSY; 5513 5514 cmd->host_scribble = (unsigned char *) c; 5515 5516 if (dev->offload_enabled) { 5517 hpsa_cmd_init(h, c->cmdindex, c); 5518 c->cmd_type = CMD_SCSI; 5519 c->scsi_cmd = cmd; 5520 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5521 if (rc < 0) /* scsi_dma_map failed. */ 5522 rc = SCSI_MLQUEUE_HOST_BUSY; 5523 } else if (dev->hba_ioaccel_enabled) { 5524 hpsa_cmd_init(h, c->cmdindex, c); 5525 c->cmd_type = CMD_SCSI; 5526 c->scsi_cmd = cmd; 5527 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5528 if (rc < 0) /* scsi_dma_map failed. */ 5529 rc = SCSI_MLQUEUE_HOST_BUSY; 5530 } 5531 return rc; 5532 } 5533 5534 static void hpsa_command_resubmit_worker(struct work_struct *work) 5535 { 5536 struct scsi_cmnd *cmd; 5537 struct hpsa_scsi_dev_t *dev; 5538 struct CommandList *c = container_of(work, struct CommandList, work); 5539 5540 cmd = c->scsi_cmd; 5541 dev = cmd->device->hostdata; 5542 if (!dev) { 5543 cmd->result = DID_NO_CONNECT << 16; 5544 return hpsa_cmd_free_and_done(c->h, c, cmd); 5545 } 5546 if (c->reset_pending) 5547 return hpsa_cmd_free_and_done(c->h, c, cmd); 5548 if (c->cmd_type == CMD_IOACCEL2) { 5549 struct ctlr_info *h = c->h; 5550 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5551 int rc; 5552 5553 if (c2->error_data.serv_response == 5554 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5555 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5556 if (rc == 0) 5557 return; 5558 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5559 /* 5560 * If we get here, it means dma mapping failed. 5561 * Try again via scsi mid layer, which will 5562 * then get SCSI_MLQUEUE_HOST_BUSY. 5563 */ 5564 cmd->result = DID_IMM_RETRY << 16; 5565 return hpsa_cmd_free_and_done(h, c, cmd); 5566 } 5567 /* else, fall thru and resubmit down CISS path */ 5568 } 5569 } 5570 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5571 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5572 /* 5573 * If we get here, it means dma mapping failed. Try 5574 * again via scsi mid layer, which will then get 5575 * SCSI_MLQUEUE_HOST_BUSY. 5576 * 5577 * hpsa_ciss_submit will have already freed c 5578 * if it encountered a dma mapping failure. 5579 */ 5580 cmd->result = DID_IMM_RETRY << 16; 5581 cmd->scsi_done(cmd); 5582 } 5583 } 5584 5585 /* Running in struct Scsi_Host->host_lock less mode */ 5586 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5587 { 5588 struct ctlr_info *h; 5589 struct hpsa_scsi_dev_t *dev; 5590 unsigned char scsi3addr[8]; 5591 struct CommandList *c; 5592 int rc = 0; 5593 5594 /* Get the ptr to our adapter structure out of cmd->host. */ 5595 h = sdev_to_hba(cmd->device); 5596 5597 BUG_ON(cmd->request->tag < 0); 5598 5599 dev = cmd->device->hostdata; 5600 if (!dev) { 5601 cmd->result = DID_NO_CONNECT << 16; 5602 cmd->scsi_done(cmd); 5603 return 0; 5604 } 5605 5606 if (dev->removed) { 5607 cmd->result = DID_NO_CONNECT << 16; 5608 cmd->scsi_done(cmd); 5609 return 0; 5610 } 5611 5612 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5613 5614 if (unlikely(lockup_detected(h))) { 5615 cmd->result = DID_NO_CONNECT << 16; 5616 cmd->scsi_done(cmd); 5617 return 0; 5618 } 5619 c = cmd_tagged_alloc(h, cmd); 5620 5621 /* 5622 * Call alternate submit routine for I/O accelerated commands. 5623 * Retries always go down the normal I/O path. 5624 */ 5625 if (likely(cmd->retries == 0 && 5626 !blk_rq_is_passthrough(cmd->request) && 5627 h->acciopath_status)) { 5628 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5629 if (rc == 0) 5630 return 0; 5631 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5632 hpsa_cmd_resolve_and_free(h, c); 5633 return SCSI_MLQUEUE_HOST_BUSY; 5634 } 5635 } 5636 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5637 } 5638 5639 static void hpsa_scan_complete(struct ctlr_info *h) 5640 { 5641 unsigned long flags; 5642 5643 spin_lock_irqsave(&h->scan_lock, flags); 5644 h->scan_finished = 1; 5645 wake_up(&h->scan_wait_queue); 5646 spin_unlock_irqrestore(&h->scan_lock, flags); 5647 } 5648 5649 static void hpsa_scan_start(struct Scsi_Host *sh) 5650 { 5651 struct ctlr_info *h = shost_to_hba(sh); 5652 unsigned long flags; 5653 5654 /* 5655 * Don't let rescans be initiated on a controller known to be locked 5656 * up. If the controller locks up *during* a rescan, that thread is 5657 * probably hosed, but at least we can prevent new rescan threads from 5658 * piling up on a locked up controller. 5659 */ 5660 if (unlikely(lockup_detected(h))) 5661 return hpsa_scan_complete(h); 5662 5663 /* 5664 * If a scan is already waiting to run, no need to add another 5665 */ 5666 spin_lock_irqsave(&h->scan_lock, flags); 5667 if (h->scan_waiting) { 5668 spin_unlock_irqrestore(&h->scan_lock, flags); 5669 return; 5670 } 5671 5672 spin_unlock_irqrestore(&h->scan_lock, flags); 5673 5674 /* wait until any scan already in progress is finished. */ 5675 while (1) { 5676 spin_lock_irqsave(&h->scan_lock, flags); 5677 if (h->scan_finished) 5678 break; 5679 h->scan_waiting = 1; 5680 spin_unlock_irqrestore(&h->scan_lock, flags); 5681 wait_event(h->scan_wait_queue, h->scan_finished); 5682 /* Note: We don't need to worry about a race between this 5683 * thread and driver unload because the midlayer will 5684 * have incremented the reference count, so unload won't 5685 * happen if we're in here. 5686 */ 5687 } 5688 h->scan_finished = 0; /* mark scan as in progress */ 5689 h->scan_waiting = 0; 5690 spin_unlock_irqrestore(&h->scan_lock, flags); 5691 5692 if (unlikely(lockup_detected(h))) 5693 return hpsa_scan_complete(h); 5694 5695 /* 5696 * Do the scan after a reset completion 5697 */ 5698 spin_lock_irqsave(&h->reset_lock, flags); 5699 if (h->reset_in_progress) { 5700 h->drv_req_rescan = 1; 5701 spin_unlock_irqrestore(&h->reset_lock, flags); 5702 hpsa_scan_complete(h); 5703 return; 5704 } 5705 spin_unlock_irqrestore(&h->reset_lock, flags); 5706 5707 hpsa_update_scsi_devices(h); 5708 5709 hpsa_scan_complete(h); 5710 } 5711 5712 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5713 { 5714 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5715 5716 if (!logical_drive) 5717 return -ENODEV; 5718 5719 if (qdepth < 1) 5720 qdepth = 1; 5721 else if (qdepth > logical_drive->queue_depth) 5722 qdepth = logical_drive->queue_depth; 5723 5724 return scsi_change_queue_depth(sdev, qdepth); 5725 } 5726 5727 static int hpsa_scan_finished(struct Scsi_Host *sh, 5728 unsigned long elapsed_time) 5729 { 5730 struct ctlr_info *h = shost_to_hba(sh); 5731 unsigned long flags; 5732 int finished; 5733 5734 spin_lock_irqsave(&h->scan_lock, flags); 5735 finished = h->scan_finished; 5736 spin_unlock_irqrestore(&h->scan_lock, flags); 5737 return finished; 5738 } 5739 5740 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5741 { 5742 struct Scsi_Host *sh; 5743 5744 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5745 if (sh == NULL) { 5746 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5747 return -ENOMEM; 5748 } 5749 5750 sh->io_port = 0; 5751 sh->n_io_port = 0; 5752 sh->this_id = -1; 5753 sh->max_channel = 3; 5754 sh->max_cmd_len = MAX_COMMAND_SIZE; 5755 sh->max_lun = HPSA_MAX_LUN; 5756 sh->max_id = HPSA_MAX_LUN; 5757 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5758 sh->cmd_per_lun = sh->can_queue; 5759 sh->sg_tablesize = h->maxsgentries; 5760 sh->transportt = hpsa_sas_transport_template; 5761 sh->hostdata[0] = (unsigned long) h; 5762 sh->irq = pci_irq_vector(h->pdev, 0); 5763 sh->unique_id = sh->irq; 5764 5765 h->scsi_host = sh; 5766 return 0; 5767 } 5768 5769 static int hpsa_scsi_add_host(struct ctlr_info *h) 5770 { 5771 int rv; 5772 5773 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5774 if (rv) { 5775 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5776 return rv; 5777 } 5778 scsi_scan_host(h->scsi_host); 5779 return 0; 5780 } 5781 5782 /* 5783 * The block layer has already gone to the trouble of picking out a unique, 5784 * small-integer tag for this request. We use an offset from that value as 5785 * an index to select our command block. (The offset allows us to reserve the 5786 * low-numbered entries for our own uses.) 5787 */ 5788 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5789 { 5790 int idx = scmd->request->tag; 5791 5792 if (idx < 0) 5793 return idx; 5794 5795 /* Offset to leave space for internal cmds. */ 5796 return idx += HPSA_NRESERVED_CMDS; 5797 } 5798 5799 /* 5800 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5801 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5802 */ 5803 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5804 struct CommandList *c, unsigned char lunaddr[], 5805 int reply_queue) 5806 { 5807 int rc; 5808 5809 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5810 (void) fill_cmd(c, TEST_UNIT_READY, h, 5811 NULL, 0, 0, lunaddr, TYPE_CMD); 5812 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5813 if (rc) 5814 return rc; 5815 /* no unmap needed here because no data xfer. */ 5816 5817 /* Check if the unit is already ready. */ 5818 if (c->err_info->CommandStatus == CMD_SUCCESS) 5819 return 0; 5820 5821 /* 5822 * The first command sent after reset will receive "unit attention" to 5823 * indicate that the LUN has been reset...this is actually what we're 5824 * looking for (but, success is good too). 5825 */ 5826 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5827 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5828 (c->err_info->SenseInfo[2] == NO_SENSE || 5829 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5830 return 0; 5831 5832 return 1; 5833 } 5834 5835 /* 5836 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5837 * returns zero when the unit is ready, and non-zero when giving up. 5838 */ 5839 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5840 struct CommandList *c, 5841 unsigned char lunaddr[], int reply_queue) 5842 { 5843 int rc; 5844 int count = 0; 5845 int waittime = 1; /* seconds */ 5846 5847 /* Send test unit ready until device ready, or give up. */ 5848 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5849 5850 /* 5851 * Wait for a bit. do this first, because if we send 5852 * the TUR right away, the reset will just abort it. 5853 */ 5854 msleep(1000 * waittime); 5855 5856 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5857 if (!rc) 5858 break; 5859 5860 /* Increase wait time with each try, up to a point. */ 5861 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5862 waittime *= 2; 5863 5864 dev_warn(&h->pdev->dev, 5865 "waiting %d secs for device to become ready.\n", 5866 waittime); 5867 } 5868 5869 return rc; 5870 } 5871 5872 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5873 unsigned char lunaddr[], 5874 int reply_queue) 5875 { 5876 int first_queue; 5877 int last_queue; 5878 int rq; 5879 int rc = 0; 5880 struct CommandList *c; 5881 5882 c = cmd_alloc(h); 5883 5884 /* 5885 * If no specific reply queue was requested, then send the TUR 5886 * repeatedly, requesting a reply on each reply queue; otherwise execute 5887 * the loop exactly once using only the specified queue. 5888 */ 5889 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5890 first_queue = 0; 5891 last_queue = h->nreply_queues - 1; 5892 } else { 5893 first_queue = reply_queue; 5894 last_queue = reply_queue; 5895 } 5896 5897 for (rq = first_queue; rq <= last_queue; rq++) { 5898 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5899 if (rc) 5900 break; 5901 } 5902 5903 if (rc) 5904 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5905 else 5906 dev_warn(&h->pdev->dev, "device is ready.\n"); 5907 5908 cmd_free(h, c); 5909 return rc; 5910 } 5911 5912 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5913 * complaining. Doing a host- or bus-reset can't do anything good here. 5914 */ 5915 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5916 { 5917 int rc = SUCCESS; 5918 struct ctlr_info *h; 5919 struct hpsa_scsi_dev_t *dev; 5920 u8 reset_type; 5921 char msg[48]; 5922 unsigned long flags; 5923 5924 /* find the controller to which the command to be aborted was sent */ 5925 h = sdev_to_hba(scsicmd->device); 5926 if (h == NULL) /* paranoia */ 5927 return FAILED; 5928 5929 spin_lock_irqsave(&h->reset_lock, flags); 5930 h->reset_in_progress = 1; 5931 spin_unlock_irqrestore(&h->reset_lock, flags); 5932 5933 if (lockup_detected(h)) { 5934 rc = FAILED; 5935 goto return_reset_status; 5936 } 5937 5938 dev = scsicmd->device->hostdata; 5939 if (!dev) { 5940 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5941 rc = FAILED; 5942 goto return_reset_status; 5943 } 5944 5945 if (dev->devtype == TYPE_ENCLOSURE) { 5946 rc = SUCCESS; 5947 goto return_reset_status; 5948 } 5949 5950 /* if controller locked up, we can guarantee command won't complete */ 5951 if (lockup_detected(h)) { 5952 snprintf(msg, sizeof(msg), 5953 "cmd %d RESET FAILED, lockup detected", 5954 hpsa_get_cmd_index(scsicmd)); 5955 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5956 rc = FAILED; 5957 goto return_reset_status; 5958 } 5959 5960 /* this reset request might be the result of a lockup; check */ 5961 if (detect_controller_lockup(h)) { 5962 snprintf(msg, sizeof(msg), 5963 "cmd %d RESET FAILED, new lockup detected", 5964 hpsa_get_cmd_index(scsicmd)); 5965 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5966 rc = FAILED; 5967 goto return_reset_status; 5968 } 5969 5970 /* Do not attempt on controller */ 5971 if (is_hba_lunid(dev->scsi3addr)) { 5972 rc = SUCCESS; 5973 goto return_reset_status; 5974 } 5975 5976 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5977 reset_type = HPSA_DEVICE_RESET_MSG; 5978 else 5979 reset_type = HPSA_PHYS_TARGET_RESET; 5980 5981 sprintf(msg, "resetting %s", 5982 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5983 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5984 5985 /* send a reset to the SCSI LUN which the command was sent to */ 5986 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5987 DEFAULT_REPLY_QUEUE); 5988 if (rc == 0) 5989 rc = SUCCESS; 5990 else 5991 rc = FAILED; 5992 5993 sprintf(msg, "reset %s %s", 5994 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5995 rc == SUCCESS ? "completed successfully" : "failed"); 5996 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5997 5998 return_reset_status: 5999 spin_lock_irqsave(&h->reset_lock, flags); 6000 h->reset_in_progress = 0; 6001 spin_unlock_irqrestore(&h->reset_lock, flags); 6002 return rc; 6003 } 6004 6005 /* 6006 * For operations with an associated SCSI command, a command block is allocated 6007 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6008 * block request tag as an index into a table of entries. cmd_tagged_free() is 6009 * the complement, although cmd_free() may be called instead. 6010 */ 6011 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6012 struct scsi_cmnd *scmd) 6013 { 6014 int idx = hpsa_get_cmd_index(scmd); 6015 struct CommandList *c = h->cmd_pool + idx; 6016 6017 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6018 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6019 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6020 /* The index value comes from the block layer, so if it's out of 6021 * bounds, it's probably not our bug. 6022 */ 6023 BUG(); 6024 } 6025 6026 atomic_inc(&c->refcount); 6027 if (unlikely(!hpsa_is_cmd_idle(c))) { 6028 /* 6029 * We expect that the SCSI layer will hand us a unique tag 6030 * value. Thus, there should never be a collision here between 6031 * two requests...because if the selected command isn't idle 6032 * then someone is going to be very disappointed. 6033 */ 6034 dev_err(&h->pdev->dev, 6035 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6036 idx); 6037 if (c->scsi_cmd != NULL) 6038 scsi_print_command(c->scsi_cmd); 6039 scsi_print_command(scmd); 6040 } 6041 6042 hpsa_cmd_partial_init(h, idx, c); 6043 return c; 6044 } 6045 6046 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6047 { 6048 /* 6049 * Release our reference to the block. We don't need to do anything 6050 * else to free it, because it is accessed by index. 6051 */ 6052 (void)atomic_dec(&c->refcount); 6053 } 6054 6055 /* 6056 * For operations that cannot sleep, a command block is allocated at init, 6057 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6058 * which ones are free or in use. Lock must be held when calling this. 6059 * cmd_free() is the complement. 6060 * This function never gives up and returns NULL. If it hangs, 6061 * another thread must call cmd_free() to free some tags. 6062 */ 6063 6064 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6065 { 6066 struct CommandList *c; 6067 int refcount, i; 6068 int offset = 0; 6069 6070 /* 6071 * There is some *extremely* small but non-zero chance that that 6072 * multiple threads could get in here, and one thread could 6073 * be scanning through the list of bits looking for a free 6074 * one, but the free ones are always behind him, and other 6075 * threads sneak in behind him and eat them before he can 6076 * get to them, so that while there is always a free one, a 6077 * very unlucky thread might be starved anyway, never able to 6078 * beat the other threads. In reality, this happens so 6079 * infrequently as to be indistinguishable from never. 6080 * 6081 * Note that we start allocating commands before the SCSI host structure 6082 * is initialized. Since the search starts at bit zero, this 6083 * all works, since we have at least one command structure available; 6084 * however, it means that the structures with the low indexes have to be 6085 * reserved for driver-initiated requests, while requests from the block 6086 * layer will use the higher indexes. 6087 */ 6088 6089 for (;;) { 6090 i = find_next_zero_bit(h->cmd_pool_bits, 6091 HPSA_NRESERVED_CMDS, 6092 offset); 6093 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6094 offset = 0; 6095 continue; 6096 } 6097 c = h->cmd_pool + i; 6098 refcount = atomic_inc_return(&c->refcount); 6099 if (unlikely(refcount > 1)) { 6100 cmd_free(h, c); /* already in use */ 6101 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6102 continue; 6103 } 6104 set_bit(i & (BITS_PER_LONG - 1), 6105 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6106 break; /* it's ours now. */ 6107 } 6108 hpsa_cmd_partial_init(h, i, c); 6109 return c; 6110 } 6111 6112 /* 6113 * This is the complementary operation to cmd_alloc(). Note, however, in some 6114 * corner cases it may also be used to free blocks allocated by 6115 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6116 * the clear-bit is harmless. 6117 */ 6118 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6119 { 6120 if (atomic_dec_and_test(&c->refcount)) { 6121 int i; 6122 6123 i = c - h->cmd_pool; 6124 clear_bit(i & (BITS_PER_LONG - 1), 6125 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6126 } 6127 } 6128 6129 #ifdef CONFIG_COMPAT 6130 6131 static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd, 6132 void __user *arg) 6133 { 6134 IOCTL32_Command_struct __user *arg32 = 6135 (IOCTL32_Command_struct __user *) arg; 6136 IOCTL_Command_struct arg64; 6137 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6138 int err; 6139 u32 cp; 6140 6141 memset(&arg64, 0, sizeof(arg64)); 6142 err = 0; 6143 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6144 sizeof(arg64.LUN_info)); 6145 err |= copy_from_user(&arg64.Request, &arg32->Request, 6146 sizeof(arg64.Request)); 6147 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6148 sizeof(arg64.error_info)); 6149 err |= get_user(arg64.buf_size, &arg32->buf_size); 6150 err |= get_user(cp, &arg32->buf); 6151 arg64.buf = compat_ptr(cp); 6152 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6153 6154 if (err) 6155 return -EFAULT; 6156 6157 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6158 if (err) 6159 return err; 6160 err |= copy_in_user(&arg32->error_info, &p->error_info, 6161 sizeof(arg32->error_info)); 6162 if (err) 6163 return -EFAULT; 6164 return err; 6165 } 6166 6167 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6168 unsigned int cmd, void __user *arg) 6169 { 6170 BIG_IOCTL32_Command_struct __user *arg32 = 6171 (BIG_IOCTL32_Command_struct __user *) arg; 6172 BIG_IOCTL_Command_struct arg64; 6173 BIG_IOCTL_Command_struct __user *p = 6174 compat_alloc_user_space(sizeof(arg64)); 6175 int err; 6176 u32 cp; 6177 6178 memset(&arg64, 0, sizeof(arg64)); 6179 err = 0; 6180 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6181 sizeof(arg64.LUN_info)); 6182 err |= copy_from_user(&arg64.Request, &arg32->Request, 6183 sizeof(arg64.Request)); 6184 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6185 sizeof(arg64.error_info)); 6186 err |= get_user(arg64.buf_size, &arg32->buf_size); 6187 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6188 err |= get_user(cp, &arg32->buf); 6189 arg64.buf = compat_ptr(cp); 6190 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6191 6192 if (err) 6193 return -EFAULT; 6194 6195 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6196 if (err) 6197 return err; 6198 err |= copy_in_user(&arg32->error_info, &p->error_info, 6199 sizeof(arg32->error_info)); 6200 if (err) 6201 return -EFAULT; 6202 return err; 6203 } 6204 6205 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 6206 void __user *arg) 6207 { 6208 switch (cmd) { 6209 case CCISS_GETPCIINFO: 6210 case CCISS_GETINTINFO: 6211 case CCISS_SETINTINFO: 6212 case CCISS_GETNODENAME: 6213 case CCISS_SETNODENAME: 6214 case CCISS_GETHEARTBEAT: 6215 case CCISS_GETBUSTYPES: 6216 case CCISS_GETFIRMVER: 6217 case CCISS_GETDRIVVER: 6218 case CCISS_REVALIDVOLS: 6219 case CCISS_DEREGDISK: 6220 case CCISS_REGNEWDISK: 6221 case CCISS_REGNEWD: 6222 case CCISS_RESCANDISK: 6223 case CCISS_GETLUNINFO: 6224 return hpsa_ioctl(dev, cmd, arg); 6225 6226 case CCISS_PASSTHRU32: 6227 return hpsa_ioctl32_passthru(dev, cmd, arg); 6228 case CCISS_BIG_PASSTHRU32: 6229 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6230 6231 default: 6232 return -ENOIOCTLCMD; 6233 } 6234 } 6235 #endif 6236 6237 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6238 { 6239 struct hpsa_pci_info pciinfo; 6240 6241 if (!argp) 6242 return -EINVAL; 6243 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6244 pciinfo.bus = h->pdev->bus->number; 6245 pciinfo.dev_fn = h->pdev->devfn; 6246 pciinfo.board_id = h->board_id; 6247 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6248 return -EFAULT; 6249 return 0; 6250 } 6251 6252 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6253 { 6254 DriverVer_type DriverVer; 6255 unsigned char vmaj, vmin, vsubmin; 6256 int rc; 6257 6258 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6259 &vmaj, &vmin, &vsubmin); 6260 if (rc != 3) { 6261 dev_info(&h->pdev->dev, "driver version string '%s' " 6262 "unrecognized.", HPSA_DRIVER_VERSION); 6263 vmaj = 0; 6264 vmin = 0; 6265 vsubmin = 0; 6266 } 6267 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6268 if (!argp) 6269 return -EINVAL; 6270 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6271 return -EFAULT; 6272 return 0; 6273 } 6274 6275 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6276 { 6277 IOCTL_Command_struct iocommand; 6278 struct CommandList *c; 6279 char *buff = NULL; 6280 u64 temp64; 6281 int rc = 0; 6282 6283 if (!argp) 6284 return -EINVAL; 6285 if (!capable(CAP_SYS_RAWIO)) 6286 return -EPERM; 6287 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6288 return -EFAULT; 6289 if ((iocommand.buf_size < 1) && 6290 (iocommand.Request.Type.Direction != XFER_NONE)) { 6291 return -EINVAL; 6292 } 6293 if (iocommand.buf_size > 0) { 6294 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6295 if (buff == NULL) 6296 return -ENOMEM; 6297 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6298 /* Copy the data into the buffer we created */ 6299 if (copy_from_user(buff, iocommand.buf, 6300 iocommand.buf_size)) { 6301 rc = -EFAULT; 6302 goto out_kfree; 6303 } 6304 } else { 6305 memset(buff, 0, iocommand.buf_size); 6306 } 6307 } 6308 c = cmd_alloc(h); 6309 6310 /* Fill in the command type */ 6311 c->cmd_type = CMD_IOCTL_PEND; 6312 c->scsi_cmd = SCSI_CMD_BUSY; 6313 /* Fill in Command Header */ 6314 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6315 if (iocommand.buf_size > 0) { /* buffer to fill */ 6316 c->Header.SGList = 1; 6317 c->Header.SGTotal = cpu_to_le16(1); 6318 } else { /* no buffers to fill */ 6319 c->Header.SGList = 0; 6320 c->Header.SGTotal = cpu_to_le16(0); 6321 } 6322 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6323 6324 /* Fill in Request block */ 6325 memcpy(&c->Request, &iocommand.Request, 6326 sizeof(c->Request)); 6327 6328 /* Fill in the scatter gather information */ 6329 if (iocommand.buf_size > 0) { 6330 temp64 = dma_map_single(&h->pdev->dev, buff, 6331 iocommand.buf_size, DMA_BIDIRECTIONAL); 6332 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6333 c->SG[0].Addr = cpu_to_le64(0); 6334 c->SG[0].Len = cpu_to_le32(0); 6335 rc = -ENOMEM; 6336 goto out; 6337 } 6338 c->SG[0].Addr = cpu_to_le64(temp64); 6339 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6340 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6341 } 6342 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6343 NO_TIMEOUT); 6344 if (iocommand.buf_size > 0) 6345 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6346 check_ioctl_unit_attention(h, c); 6347 if (rc) { 6348 rc = -EIO; 6349 goto out; 6350 } 6351 6352 /* Copy the error information out */ 6353 memcpy(&iocommand.error_info, c->err_info, 6354 sizeof(iocommand.error_info)); 6355 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6356 rc = -EFAULT; 6357 goto out; 6358 } 6359 if ((iocommand.Request.Type.Direction & XFER_READ) && 6360 iocommand.buf_size > 0) { 6361 /* Copy the data out of the buffer we created */ 6362 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6363 rc = -EFAULT; 6364 goto out; 6365 } 6366 } 6367 out: 6368 cmd_free(h, c); 6369 out_kfree: 6370 kfree(buff); 6371 return rc; 6372 } 6373 6374 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6375 { 6376 BIG_IOCTL_Command_struct *ioc; 6377 struct CommandList *c; 6378 unsigned char **buff = NULL; 6379 int *buff_size = NULL; 6380 u64 temp64; 6381 BYTE sg_used = 0; 6382 int status = 0; 6383 u32 left; 6384 u32 sz; 6385 BYTE __user *data_ptr; 6386 6387 if (!argp) 6388 return -EINVAL; 6389 if (!capable(CAP_SYS_RAWIO)) 6390 return -EPERM; 6391 ioc = vmemdup_user(argp, sizeof(*ioc)); 6392 if (IS_ERR(ioc)) { 6393 status = PTR_ERR(ioc); 6394 goto cleanup1; 6395 } 6396 if ((ioc->buf_size < 1) && 6397 (ioc->Request.Type.Direction != XFER_NONE)) { 6398 status = -EINVAL; 6399 goto cleanup1; 6400 } 6401 /* Check kmalloc limits using all SGs */ 6402 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6403 status = -EINVAL; 6404 goto cleanup1; 6405 } 6406 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6407 status = -EINVAL; 6408 goto cleanup1; 6409 } 6410 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6411 if (!buff) { 6412 status = -ENOMEM; 6413 goto cleanup1; 6414 } 6415 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6416 if (!buff_size) { 6417 status = -ENOMEM; 6418 goto cleanup1; 6419 } 6420 left = ioc->buf_size; 6421 data_ptr = ioc->buf; 6422 while (left) { 6423 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6424 buff_size[sg_used] = sz; 6425 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6426 if (buff[sg_used] == NULL) { 6427 status = -ENOMEM; 6428 goto cleanup1; 6429 } 6430 if (ioc->Request.Type.Direction & XFER_WRITE) { 6431 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6432 status = -EFAULT; 6433 goto cleanup1; 6434 } 6435 } else 6436 memset(buff[sg_used], 0, sz); 6437 left -= sz; 6438 data_ptr += sz; 6439 sg_used++; 6440 } 6441 c = cmd_alloc(h); 6442 6443 c->cmd_type = CMD_IOCTL_PEND; 6444 c->scsi_cmd = SCSI_CMD_BUSY; 6445 c->Header.ReplyQueue = 0; 6446 c->Header.SGList = (u8) sg_used; 6447 c->Header.SGTotal = cpu_to_le16(sg_used); 6448 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6449 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6450 if (ioc->buf_size > 0) { 6451 int i; 6452 for (i = 0; i < sg_used; i++) { 6453 temp64 = dma_map_single(&h->pdev->dev, buff[i], 6454 buff_size[i], DMA_BIDIRECTIONAL); 6455 if (dma_mapping_error(&h->pdev->dev, 6456 (dma_addr_t) temp64)) { 6457 c->SG[i].Addr = cpu_to_le64(0); 6458 c->SG[i].Len = cpu_to_le32(0); 6459 hpsa_pci_unmap(h->pdev, c, i, 6460 DMA_BIDIRECTIONAL); 6461 status = -ENOMEM; 6462 goto cleanup0; 6463 } 6464 c->SG[i].Addr = cpu_to_le64(temp64); 6465 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6466 c->SG[i].Ext = cpu_to_le32(0); 6467 } 6468 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6469 } 6470 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6471 NO_TIMEOUT); 6472 if (sg_used) 6473 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6474 check_ioctl_unit_attention(h, c); 6475 if (status) { 6476 status = -EIO; 6477 goto cleanup0; 6478 } 6479 6480 /* Copy the error information out */ 6481 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6482 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6483 status = -EFAULT; 6484 goto cleanup0; 6485 } 6486 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6487 int i; 6488 6489 /* Copy the data out of the buffer we created */ 6490 BYTE __user *ptr = ioc->buf; 6491 for (i = 0; i < sg_used; i++) { 6492 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6493 status = -EFAULT; 6494 goto cleanup0; 6495 } 6496 ptr += buff_size[i]; 6497 } 6498 } 6499 status = 0; 6500 cleanup0: 6501 cmd_free(h, c); 6502 cleanup1: 6503 if (buff) { 6504 int i; 6505 6506 for (i = 0; i < sg_used; i++) 6507 kfree(buff[i]); 6508 kfree(buff); 6509 } 6510 kfree(buff_size); 6511 kvfree(ioc); 6512 return status; 6513 } 6514 6515 static void check_ioctl_unit_attention(struct ctlr_info *h, 6516 struct CommandList *c) 6517 { 6518 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6519 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6520 (void) check_for_unit_attention(h, c); 6521 } 6522 6523 /* 6524 * ioctl 6525 */ 6526 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 6527 void __user *arg) 6528 { 6529 struct ctlr_info *h; 6530 void __user *argp = (void __user *)arg; 6531 int rc; 6532 6533 h = sdev_to_hba(dev); 6534 6535 switch (cmd) { 6536 case CCISS_DEREGDISK: 6537 case CCISS_REGNEWDISK: 6538 case CCISS_REGNEWD: 6539 hpsa_scan_start(h->scsi_host); 6540 return 0; 6541 case CCISS_GETPCIINFO: 6542 return hpsa_getpciinfo_ioctl(h, argp); 6543 case CCISS_GETDRIVVER: 6544 return hpsa_getdrivver_ioctl(h, argp); 6545 case CCISS_PASSTHRU: 6546 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6547 return -EAGAIN; 6548 rc = hpsa_passthru_ioctl(h, argp); 6549 atomic_inc(&h->passthru_cmds_avail); 6550 return rc; 6551 case CCISS_BIG_PASSTHRU: 6552 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6553 return -EAGAIN; 6554 rc = hpsa_big_passthru_ioctl(h, argp); 6555 atomic_inc(&h->passthru_cmds_avail); 6556 return rc; 6557 default: 6558 return -ENOTTY; 6559 } 6560 } 6561 6562 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6563 u8 reset_type) 6564 { 6565 struct CommandList *c; 6566 6567 c = cmd_alloc(h); 6568 6569 /* fill_cmd can't fail here, no data buffer to map */ 6570 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6571 RAID_CTLR_LUNID, TYPE_MSG); 6572 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6573 c->waiting = NULL; 6574 enqueue_cmd_and_start_io(h, c); 6575 /* Don't wait for completion, the reset won't complete. Don't free 6576 * the command either. This is the last command we will send before 6577 * re-initializing everything, so it doesn't matter and won't leak. 6578 */ 6579 return; 6580 } 6581 6582 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6583 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6584 int cmd_type) 6585 { 6586 enum dma_data_direction dir = DMA_NONE; 6587 6588 c->cmd_type = CMD_IOCTL_PEND; 6589 c->scsi_cmd = SCSI_CMD_BUSY; 6590 c->Header.ReplyQueue = 0; 6591 if (buff != NULL && size > 0) { 6592 c->Header.SGList = 1; 6593 c->Header.SGTotal = cpu_to_le16(1); 6594 } else { 6595 c->Header.SGList = 0; 6596 c->Header.SGTotal = cpu_to_le16(0); 6597 } 6598 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6599 6600 if (cmd_type == TYPE_CMD) { 6601 switch (cmd) { 6602 case HPSA_INQUIRY: 6603 /* are we trying to read a vital product page */ 6604 if (page_code & VPD_PAGE) { 6605 c->Request.CDB[1] = 0x01; 6606 c->Request.CDB[2] = (page_code & 0xff); 6607 } 6608 c->Request.CDBLen = 6; 6609 c->Request.type_attr_dir = 6610 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6611 c->Request.Timeout = 0; 6612 c->Request.CDB[0] = HPSA_INQUIRY; 6613 c->Request.CDB[4] = size & 0xFF; 6614 break; 6615 case RECEIVE_DIAGNOSTIC: 6616 c->Request.CDBLen = 6; 6617 c->Request.type_attr_dir = 6618 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6619 c->Request.Timeout = 0; 6620 c->Request.CDB[0] = cmd; 6621 c->Request.CDB[1] = 1; 6622 c->Request.CDB[2] = 1; 6623 c->Request.CDB[3] = (size >> 8) & 0xFF; 6624 c->Request.CDB[4] = size & 0xFF; 6625 break; 6626 case HPSA_REPORT_LOG: 6627 case HPSA_REPORT_PHYS: 6628 /* Talking to controller so It's a physical command 6629 mode = 00 target = 0. Nothing to write. 6630 */ 6631 c->Request.CDBLen = 12; 6632 c->Request.type_attr_dir = 6633 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6634 c->Request.Timeout = 0; 6635 c->Request.CDB[0] = cmd; 6636 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6637 c->Request.CDB[7] = (size >> 16) & 0xFF; 6638 c->Request.CDB[8] = (size >> 8) & 0xFF; 6639 c->Request.CDB[9] = size & 0xFF; 6640 break; 6641 case BMIC_SENSE_DIAG_OPTIONS: 6642 c->Request.CDBLen = 16; 6643 c->Request.type_attr_dir = 6644 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6645 c->Request.Timeout = 0; 6646 /* Spec says this should be BMIC_WRITE */ 6647 c->Request.CDB[0] = BMIC_READ; 6648 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6649 break; 6650 case BMIC_SET_DIAG_OPTIONS: 6651 c->Request.CDBLen = 16; 6652 c->Request.type_attr_dir = 6653 TYPE_ATTR_DIR(cmd_type, 6654 ATTR_SIMPLE, XFER_WRITE); 6655 c->Request.Timeout = 0; 6656 c->Request.CDB[0] = BMIC_WRITE; 6657 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6658 break; 6659 case HPSA_CACHE_FLUSH: 6660 c->Request.CDBLen = 12; 6661 c->Request.type_attr_dir = 6662 TYPE_ATTR_DIR(cmd_type, 6663 ATTR_SIMPLE, XFER_WRITE); 6664 c->Request.Timeout = 0; 6665 c->Request.CDB[0] = BMIC_WRITE; 6666 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6667 c->Request.CDB[7] = (size >> 8) & 0xFF; 6668 c->Request.CDB[8] = size & 0xFF; 6669 break; 6670 case TEST_UNIT_READY: 6671 c->Request.CDBLen = 6; 6672 c->Request.type_attr_dir = 6673 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6674 c->Request.Timeout = 0; 6675 break; 6676 case HPSA_GET_RAID_MAP: 6677 c->Request.CDBLen = 12; 6678 c->Request.type_attr_dir = 6679 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6680 c->Request.Timeout = 0; 6681 c->Request.CDB[0] = HPSA_CISS_READ; 6682 c->Request.CDB[1] = cmd; 6683 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6684 c->Request.CDB[7] = (size >> 16) & 0xFF; 6685 c->Request.CDB[8] = (size >> 8) & 0xFF; 6686 c->Request.CDB[9] = size & 0xFF; 6687 break; 6688 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6689 c->Request.CDBLen = 10; 6690 c->Request.type_attr_dir = 6691 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6692 c->Request.Timeout = 0; 6693 c->Request.CDB[0] = BMIC_READ; 6694 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6695 c->Request.CDB[7] = (size >> 16) & 0xFF; 6696 c->Request.CDB[8] = (size >> 8) & 0xFF; 6697 break; 6698 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6699 c->Request.CDBLen = 10; 6700 c->Request.type_attr_dir = 6701 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6702 c->Request.Timeout = 0; 6703 c->Request.CDB[0] = BMIC_READ; 6704 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6705 c->Request.CDB[7] = (size >> 16) & 0xFF; 6706 c->Request.CDB[8] = (size >> 8) & 0XFF; 6707 break; 6708 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6709 c->Request.CDBLen = 10; 6710 c->Request.type_attr_dir = 6711 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6712 c->Request.Timeout = 0; 6713 c->Request.CDB[0] = BMIC_READ; 6714 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6715 c->Request.CDB[7] = (size >> 16) & 0xFF; 6716 c->Request.CDB[8] = (size >> 8) & 0XFF; 6717 break; 6718 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6719 c->Request.CDBLen = 10; 6720 c->Request.type_attr_dir = 6721 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6722 c->Request.Timeout = 0; 6723 c->Request.CDB[0] = BMIC_READ; 6724 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6725 c->Request.CDB[7] = (size >> 16) & 0xFF; 6726 c->Request.CDB[8] = (size >> 8) & 0XFF; 6727 break; 6728 case BMIC_IDENTIFY_CONTROLLER: 6729 c->Request.CDBLen = 10; 6730 c->Request.type_attr_dir = 6731 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6732 c->Request.Timeout = 0; 6733 c->Request.CDB[0] = BMIC_READ; 6734 c->Request.CDB[1] = 0; 6735 c->Request.CDB[2] = 0; 6736 c->Request.CDB[3] = 0; 6737 c->Request.CDB[4] = 0; 6738 c->Request.CDB[5] = 0; 6739 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6740 c->Request.CDB[7] = (size >> 16) & 0xFF; 6741 c->Request.CDB[8] = (size >> 8) & 0XFF; 6742 c->Request.CDB[9] = 0; 6743 break; 6744 default: 6745 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6746 BUG(); 6747 } 6748 } else if (cmd_type == TYPE_MSG) { 6749 switch (cmd) { 6750 6751 case HPSA_PHYS_TARGET_RESET: 6752 c->Request.CDBLen = 16; 6753 c->Request.type_attr_dir = 6754 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6755 c->Request.Timeout = 0; /* Don't time out */ 6756 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6757 c->Request.CDB[0] = HPSA_RESET; 6758 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6759 /* Physical target reset needs no control bytes 4-7*/ 6760 c->Request.CDB[4] = 0x00; 6761 c->Request.CDB[5] = 0x00; 6762 c->Request.CDB[6] = 0x00; 6763 c->Request.CDB[7] = 0x00; 6764 break; 6765 case HPSA_DEVICE_RESET_MSG: 6766 c->Request.CDBLen = 16; 6767 c->Request.type_attr_dir = 6768 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6769 c->Request.Timeout = 0; /* Don't time out */ 6770 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6771 c->Request.CDB[0] = cmd; 6772 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6773 /* If bytes 4-7 are zero, it means reset the */ 6774 /* LunID device */ 6775 c->Request.CDB[4] = 0x00; 6776 c->Request.CDB[5] = 0x00; 6777 c->Request.CDB[6] = 0x00; 6778 c->Request.CDB[7] = 0x00; 6779 break; 6780 default: 6781 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6782 cmd); 6783 BUG(); 6784 } 6785 } else { 6786 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6787 BUG(); 6788 } 6789 6790 switch (GET_DIR(c->Request.type_attr_dir)) { 6791 case XFER_READ: 6792 dir = DMA_FROM_DEVICE; 6793 break; 6794 case XFER_WRITE: 6795 dir = DMA_TO_DEVICE; 6796 break; 6797 case XFER_NONE: 6798 dir = DMA_NONE; 6799 break; 6800 default: 6801 dir = DMA_BIDIRECTIONAL; 6802 } 6803 if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6804 return -1; 6805 return 0; 6806 } 6807 6808 /* 6809 * Map (physical) PCI mem into (virtual) kernel space 6810 */ 6811 static void __iomem *remap_pci_mem(ulong base, ulong size) 6812 { 6813 ulong page_base = ((ulong) base) & PAGE_MASK; 6814 ulong page_offs = ((ulong) base) - page_base; 6815 void __iomem *page_remapped = ioremap_nocache(page_base, 6816 page_offs + size); 6817 6818 return page_remapped ? (page_remapped + page_offs) : NULL; 6819 } 6820 6821 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6822 { 6823 return h->access.command_completed(h, q); 6824 } 6825 6826 static inline bool interrupt_pending(struct ctlr_info *h) 6827 { 6828 return h->access.intr_pending(h); 6829 } 6830 6831 static inline long interrupt_not_for_us(struct ctlr_info *h) 6832 { 6833 return (h->access.intr_pending(h) == 0) || 6834 (h->interrupts_enabled == 0); 6835 } 6836 6837 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6838 u32 raw_tag) 6839 { 6840 if (unlikely(tag_index >= h->nr_cmds)) { 6841 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6842 return 1; 6843 } 6844 return 0; 6845 } 6846 6847 static inline void finish_cmd(struct CommandList *c) 6848 { 6849 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6850 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6851 || c->cmd_type == CMD_IOACCEL2)) 6852 complete_scsi_command(c); 6853 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6854 complete(c->waiting); 6855 } 6856 6857 /* process completion of an indexed ("direct lookup") command */ 6858 static inline void process_indexed_cmd(struct ctlr_info *h, 6859 u32 raw_tag) 6860 { 6861 u32 tag_index; 6862 struct CommandList *c; 6863 6864 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6865 if (!bad_tag(h, tag_index, raw_tag)) { 6866 c = h->cmd_pool + tag_index; 6867 finish_cmd(c); 6868 } 6869 } 6870 6871 /* Some controllers, like p400, will give us one interrupt 6872 * after a soft reset, even if we turned interrupts off. 6873 * Only need to check for this in the hpsa_xxx_discard_completions 6874 * functions. 6875 */ 6876 static int ignore_bogus_interrupt(struct ctlr_info *h) 6877 { 6878 if (likely(!reset_devices)) 6879 return 0; 6880 6881 if (likely(h->interrupts_enabled)) 6882 return 0; 6883 6884 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6885 "(known firmware bug.) Ignoring.\n"); 6886 6887 return 1; 6888 } 6889 6890 /* 6891 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6892 * Relies on (h-q[x] == x) being true for x such that 6893 * 0 <= x < MAX_REPLY_QUEUES. 6894 */ 6895 static struct ctlr_info *queue_to_hba(u8 *queue) 6896 { 6897 return container_of((queue - *queue), struct ctlr_info, q[0]); 6898 } 6899 6900 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6901 { 6902 struct ctlr_info *h = queue_to_hba(queue); 6903 u8 q = *(u8 *) queue; 6904 u32 raw_tag; 6905 6906 if (ignore_bogus_interrupt(h)) 6907 return IRQ_NONE; 6908 6909 if (interrupt_not_for_us(h)) 6910 return IRQ_NONE; 6911 h->last_intr_timestamp = get_jiffies_64(); 6912 while (interrupt_pending(h)) { 6913 raw_tag = get_next_completion(h, q); 6914 while (raw_tag != FIFO_EMPTY) 6915 raw_tag = next_command(h, q); 6916 } 6917 return IRQ_HANDLED; 6918 } 6919 6920 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6921 { 6922 struct ctlr_info *h = queue_to_hba(queue); 6923 u32 raw_tag; 6924 u8 q = *(u8 *) queue; 6925 6926 if (ignore_bogus_interrupt(h)) 6927 return IRQ_NONE; 6928 6929 h->last_intr_timestamp = get_jiffies_64(); 6930 raw_tag = get_next_completion(h, q); 6931 while (raw_tag != FIFO_EMPTY) 6932 raw_tag = next_command(h, q); 6933 return IRQ_HANDLED; 6934 } 6935 6936 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6937 { 6938 struct ctlr_info *h = queue_to_hba((u8 *) queue); 6939 u32 raw_tag; 6940 u8 q = *(u8 *) queue; 6941 6942 if (interrupt_not_for_us(h)) 6943 return IRQ_NONE; 6944 h->last_intr_timestamp = get_jiffies_64(); 6945 while (interrupt_pending(h)) { 6946 raw_tag = get_next_completion(h, q); 6947 while (raw_tag != FIFO_EMPTY) { 6948 process_indexed_cmd(h, raw_tag); 6949 raw_tag = next_command(h, q); 6950 } 6951 } 6952 return IRQ_HANDLED; 6953 } 6954 6955 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 6956 { 6957 struct ctlr_info *h = queue_to_hba(queue); 6958 u32 raw_tag; 6959 u8 q = *(u8 *) queue; 6960 6961 h->last_intr_timestamp = get_jiffies_64(); 6962 raw_tag = get_next_completion(h, q); 6963 while (raw_tag != FIFO_EMPTY) { 6964 process_indexed_cmd(h, raw_tag); 6965 raw_tag = next_command(h, q); 6966 } 6967 return IRQ_HANDLED; 6968 } 6969 6970 /* Send a message CDB to the firmware. Careful, this only works 6971 * in simple mode, not performant mode due to the tag lookup. 6972 * We only ever use this immediately after a controller reset. 6973 */ 6974 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6975 unsigned char type) 6976 { 6977 struct Command { 6978 struct CommandListHeader CommandHeader; 6979 struct RequestBlock Request; 6980 struct ErrDescriptor ErrorDescriptor; 6981 }; 6982 struct Command *cmd; 6983 static const size_t cmd_sz = sizeof(*cmd) + 6984 sizeof(cmd->ErrorDescriptor); 6985 dma_addr_t paddr64; 6986 __le32 paddr32; 6987 u32 tag; 6988 void __iomem *vaddr; 6989 int i, err; 6990 6991 vaddr = pci_ioremap_bar(pdev, 0); 6992 if (vaddr == NULL) 6993 return -ENOMEM; 6994 6995 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6996 * CCISS commands, so they must be allocated from the lower 4GiB of 6997 * memory. 6998 */ 6999 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 7000 if (err) { 7001 iounmap(vaddr); 7002 return err; 7003 } 7004 7005 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 7006 if (cmd == NULL) { 7007 iounmap(vaddr); 7008 return -ENOMEM; 7009 } 7010 7011 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7012 * although there's no guarantee, we assume that the address is at 7013 * least 4-byte aligned (most likely, it's page-aligned). 7014 */ 7015 paddr32 = cpu_to_le32(paddr64); 7016 7017 cmd->CommandHeader.ReplyQueue = 0; 7018 cmd->CommandHeader.SGList = 0; 7019 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7020 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7021 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7022 7023 cmd->Request.CDBLen = 16; 7024 cmd->Request.type_attr_dir = 7025 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7026 cmd->Request.Timeout = 0; /* Don't time out */ 7027 cmd->Request.CDB[0] = opcode; 7028 cmd->Request.CDB[1] = type; 7029 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7030 cmd->ErrorDescriptor.Addr = 7031 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7032 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7033 7034 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7035 7036 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7037 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7038 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7039 break; 7040 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7041 } 7042 7043 iounmap(vaddr); 7044 7045 /* we leak the DMA buffer here ... no choice since the controller could 7046 * still complete the command. 7047 */ 7048 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7049 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7050 opcode, type); 7051 return -ETIMEDOUT; 7052 } 7053 7054 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7055 7056 if (tag & HPSA_ERROR_BIT) { 7057 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7058 opcode, type); 7059 return -EIO; 7060 } 7061 7062 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7063 opcode, type); 7064 return 0; 7065 } 7066 7067 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7068 7069 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7070 void __iomem *vaddr, u32 use_doorbell) 7071 { 7072 7073 if (use_doorbell) { 7074 /* For everything after the P600, the PCI power state method 7075 * of resetting the controller doesn't work, so we have this 7076 * other way using the doorbell register. 7077 */ 7078 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7079 writel(use_doorbell, vaddr + SA5_DOORBELL); 7080 7081 /* PMC hardware guys tell us we need a 10 second delay after 7082 * doorbell reset and before any attempt to talk to the board 7083 * at all to ensure that this actually works and doesn't fall 7084 * over in some weird corner cases. 7085 */ 7086 msleep(10000); 7087 } else { /* Try to do it the PCI power state way */ 7088 7089 /* Quoting from the Open CISS Specification: "The Power 7090 * Management Control/Status Register (CSR) controls the power 7091 * state of the device. The normal operating state is D0, 7092 * CSR=00h. The software off state is D3, CSR=03h. To reset 7093 * the controller, place the interface device in D3 then to D0, 7094 * this causes a secondary PCI reset which will reset the 7095 * controller." */ 7096 7097 int rc = 0; 7098 7099 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7100 7101 /* enter the D3hot power management state */ 7102 rc = pci_set_power_state(pdev, PCI_D3hot); 7103 if (rc) 7104 return rc; 7105 7106 msleep(500); 7107 7108 /* enter the D0 power management state */ 7109 rc = pci_set_power_state(pdev, PCI_D0); 7110 if (rc) 7111 return rc; 7112 7113 /* 7114 * The P600 requires a small delay when changing states. 7115 * Otherwise we may think the board did not reset and we bail. 7116 * This for kdump only and is particular to the P600. 7117 */ 7118 msleep(500); 7119 } 7120 return 0; 7121 } 7122 7123 static void init_driver_version(char *driver_version, int len) 7124 { 7125 memset(driver_version, 0, len); 7126 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7127 } 7128 7129 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7130 { 7131 char *driver_version; 7132 int i, size = sizeof(cfgtable->driver_version); 7133 7134 driver_version = kmalloc(size, GFP_KERNEL); 7135 if (!driver_version) 7136 return -ENOMEM; 7137 7138 init_driver_version(driver_version, size); 7139 for (i = 0; i < size; i++) 7140 writeb(driver_version[i], &cfgtable->driver_version[i]); 7141 kfree(driver_version); 7142 return 0; 7143 } 7144 7145 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7146 unsigned char *driver_ver) 7147 { 7148 int i; 7149 7150 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7151 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7152 } 7153 7154 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7155 { 7156 7157 char *driver_ver, *old_driver_ver; 7158 int rc, size = sizeof(cfgtable->driver_version); 7159 7160 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7161 if (!old_driver_ver) 7162 return -ENOMEM; 7163 driver_ver = old_driver_ver + size; 7164 7165 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7166 * should have been changed, otherwise we know the reset failed. 7167 */ 7168 init_driver_version(old_driver_ver, size); 7169 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7170 rc = !memcmp(driver_ver, old_driver_ver, size); 7171 kfree(old_driver_ver); 7172 return rc; 7173 } 7174 /* This does a hard reset of the controller using PCI power management 7175 * states or the using the doorbell register. 7176 */ 7177 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7178 { 7179 u64 cfg_offset; 7180 u32 cfg_base_addr; 7181 u64 cfg_base_addr_index; 7182 void __iomem *vaddr; 7183 unsigned long paddr; 7184 u32 misc_fw_support; 7185 int rc; 7186 struct CfgTable __iomem *cfgtable; 7187 u32 use_doorbell; 7188 u16 command_register; 7189 7190 /* For controllers as old as the P600, this is very nearly 7191 * the same thing as 7192 * 7193 * pci_save_state(pci_dev); 7194 * pci_set_power_state(pci_dev, PCI_D3hot); 7195 * pci_set_power_state(pci_dev, PCI_D0); 7196 * pci_restore_state(pci_dev); 7197 * 7198 * For controllers newer than the P600, the pci power state 7199 * method of resetting doesn't work so we have another way 7200 * using the doorbell register. 7201 */ 7202 7203 if (!ctlr_is_resettable(board_id)) { 7204 dev_warn(&pdev->dev, "Controller not resettable\n"); 7205 return -ENODEV; 7206 } 7207 7208 /* if controller is soft- but not hard resettable... */ 7209 if (!ctlr_is_hard_resettable(board_id)) 7210 return -ENOTSUPP; /* try soft reset later. */ 7211 7212 /* Save the PCI command register */ 7213 pci_read_config_word(pdev, 4, &command_register); 7214 pci_save_state(pdev); 7215 7216 /* find the first memory BAR, so we can find the cfg table */ 7217 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7218 if (rc) 7219 return rc; 7220 vaddr = remap_pci_mem(paddr, 0x250); 7221 if (!vaddr) 7222 return -ENOMEM; 7223 7224 /* find cfgtable in order to check if reset via doorbell is supported */ 7225 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7226 &cfg_base_addr_index, &cfg_offset); 7227 if (rc) 7228 goto unmap_vaddr; 7229 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7230 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7231 if (!cfgtable) { 7232 rc = -ENOMEM; 7233 goto unmap_vaddr; 7234 } 7235 rc = write_driver_ver_to_cfgtable(cfgtable); 7236 if (rc) 7237 goto unmap_cfgtable; 7238 7239 /* If reset via doorbell register is supported, use that. 7240 * There are two such methods. Favor the newest method. 7241 */ 7242 misc_fw_support = readl(&cfgtable->misc_fw_support); 7243 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7244 if (use_doorbell) { 7245 use_doorbell = DOORBELL_CTLR_RESET2; 7246 } else { 7247 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7248 if (use_doorbell) { 7249 dev_warn(&pdev->dev, 7250 "Soft reset not supported. Firmware update is required.\n"); 7251 rc = -ENOTSUPP; /* try soft reset */ 7252 goto unmap_cfgtable; 7253 } 7254 } 7255 7256 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7257 if (rc) 7258 goto unmap_cfgtable; 7259 7260 pci_restore_state(pdev); 7261 pci_write_config_word(pdev, 4, command_register); 7262 7263 /* Some devices (notably the HP Smart Array 5i Controller) 7264 need a little pause here */ 7265 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7266 7267 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7268 if (rc) { 7269 dev_warn(&pdev->dev, 7270 "Failed waiting for board to become ready after hard reset\n"); 7271 goto unmap_cfgtable; 7272 } 7273 7274 rc = controller_reset_failed(vaddr); 7275 if (rc < 0) 7276 goto unmap_cfgtable; 7277 if (rc) { 7278 dev_warn(&pdev->dev, "Unable to successfully reset " 7279 "controller. Will try soft reset.\n"); 7280 rc = -ENOTSUPP; 7281 } else { 7282 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7283 } 7284 7285 unmap_cfgtable: 7286 iounmap(cfgtable); 7287 7288 unmap_vaddr: 7289 iounmap(vaddr); 7290 return rc; 7291 } 7292 7293 /* 7294 * We cannot read the structure directly, for portability we must use 7295 * the io functions. 7296 * This is for debug only. 7297 */ 7298 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7299 { 7300 #ifdef HPSA_DEBUG 7301 int i; 7302 char temp_name[17]; 7303 7304 dev_info(dev, "Controller Configuration information\n"); 7305 dev_info(dev, "------------------------------------\n"); 7306 for (i = 0; i < 4; i++) 7307 temp_name[i] = readb(&(tb->Signature[i])); 7308 temp_name[4] = '\0'; 7309 dev_info(dev, " Signature = %s\n", temp_name); 7310 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7311 dev_info(dev, " Transport methods supported = 0x%x\n", 7312 readl(&(tb->TransportSupport))); 7313 dev_info(dev, " Transport methods active = 0x%x\n", 7314 readl(&(tb->TransportActive))); 7315 dev_info(dev, " Requested transport Method = 0x%x\n", 7316 readl(&(tb->HostWrite.TransportRequest))); 7317 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7318 readl(&(tb->HostWrite.CoalIntDelay))); 7319 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7320 readl(&(tb->HostWrite.CoalIntCount))); 7321 dev_info(dev, " Max outstanding commands = %d\n", 7322 readl(&(tb->CmdsOutMax))); 7323 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7324 for (i = 0; i < 16; i++) 7325 temp_name[i] = readb(&(tb->ServerName[i])); 7326 temp_name[16] = '\0'; 7327 dev_info(dev, " Server Name = %s\n", temp_name); 7328 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7329 readl(&(tb->HeartBeat))); 7330 #endif /* HPSA_DEBUG */ 7331 } 7332 7333 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7334 { 7335 int i, offset, mem_type, bar_type; 7336 7337 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7338 return 0; 7339 offset = 0; 7340 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7341 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7342 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7343 offset += 4; 7344 else { 7345 mem_type = pci_resource_flags(pdev, i) & 7346 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7347 switch (mem_type) { 7348 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7349 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7350 offset += 4; /* 32 bit */ 7351 break; 7352 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7353 offset += 8; 7354 break; 7355 default: /* reserved in PCI 2.2 */ 7356 dev_warn(&pdev->dev, 7357 "base address is invalid\n"); 7358 return -1; 7359 break; 7360 } 7361 } 7362 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7363 return i + 1; 7364 } 7365 return -1; 7366 } 7367 7368 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7369 { 7370 pci_free_irq_vectors(h->pdev); 7371 h->msix_vectors = 0; 7372 } 7373 7374 static void hpsa_setup_reply_map(struct ctlr_info *h) 7375 { 7376 const struct cpumask *mask; 7377 unsigned int queue, cpu; 7378 7379 for (queue = 0; queue < h->msix_vectors; queue++) { 7380 mask = pci_irq_get_affinity(h->pdev, queue); 7381 if (!mask) 7382 goto fallback; 7383 7384 for_each_cpu(cpu, mask) 7385 h->reply_map[cpu] = queue; 7386 } 7387 return; 7388 7389 fallback: 7390 for_each_possible_cpu(cpu) 7391 h->reply_map[cpu] = 0; 7392 } 7393 7394 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7395 * controllers that are capable. If not, we use legacy INTx mode. 7396 */ 7397 static int hpsa_interrupt_mode(struct ctlr_info *h) 7398 { 7399 unsigned int flags = PCI_IRQ_LEGACY; 7400 int ret; 7401 7402 /* Some boards advertise MSI but don't really support it */ 7403 switch (h->board_id) { 7404 case 0x40700E11: 7405 case 0x40800E11: 7406 case 0x40820E11: 7407 case 0x40830E11: 7408 break; 7409 default: 7410 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7411 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7412 if (ret > 0) { 7413 h->msix_vectors = ret; 7414 return 0; 7415 } 7416 7417 flags |= PCI_IRQ_MSI; 7418 break; 7419 } 7420 7421 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7422 if (ret < 0) 7423 return ret; 7424 return 0; 7425 } 7426 7427 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7428 bool *legacy_board) 7429 { 7430 int i; 7431 u32 subsystem_vendor_id, subsystem_device_id; 7432 7433 subsystem_vendor_id = pdev->subsystem_vendor; 7434 subsystem_device_id = pdev->subsystem_device; 7435 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7436 subsystem_vendor_id; 7437 7438 if (legacy_board) 7439 *legacy_board = false; 7440 for (i = 0; i < ARRAY_SIZE(products); i++) 7441 if (*board_id == products[i].board_id) { 7442 if (products[i].access != &SA5A_access && 7443 products[i].access != &SA5B_access) 7444 return i; 7445 dev_warn(&pdev->dev, 7446 "legacy board ID: 0x%08x\n", 7447 *board_id); 7448 if (legacy_board) 7449 *legacy_board = true; 7450 return i; 7451 } 7452 7453 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7454 if (legacy_board) 7455 *legacy_board = true; 7456 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7457 } 7458 7459 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7460 unsigned long *memory_bar) 7461 { 7462 int i; 7463 7464 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7465 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7466 /* addressing mode bits already removed */ 7467 *memory_bar = pci_resource_start(pdev, i); 7468 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7469 *memory_bar); 7470 return 0; 7471 } 7472 dev_warn(&pdev->dev, "no memory BAR found\n"); 7473 return -ENODEV; 7474 } 7475 7476 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7477 int wait_for_ready) 7478 { 7479 int i, iterations; 7480 u32 scratchpad; 7481 if (wait_for_ready) 7482 iterations = HPSA_BOARD_READY_ITERATIONS; 7483 else 7484 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7485 7486 for (i = 0; i < iterations; i++) { 7487 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7488 if (wait_for_ready) { 7489 if (scratchpad == HPSA_FIRMWARE_READY) 7490 return 0; 7491 } else { 7492 if (scratchpad != HPSA_FIRMWARE_READY) 7493 return 0; 7494 } 7495 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7496 } 7497 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7498 return -ENODEV; 7499 } 7500 7501 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7502 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7503 u64 *cfg_offset) 7504 { 7505 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7506 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7507 *cfg_base_addr &= (u32) 0x0000ffff; 7508 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7509 if (*cfg_base_addr_index == -1) { 7510 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7511 return -ENODEV; 7512 } 7513 return 0; 7514 } 7515 7516 static void hpsa_free_cfgtables(struct ctlr_info *h) 7517 { 7518 if (h->transtable) { 7519 iounmap(h->transtable); 7520 h->transtable = NULL; 7521 } 7522 if (h->cfgtable) { 7523 iounmap(h->cfgtable); 7524 h->cfgtable = NULL; 7525 } 7526 } 7527 7528 /* Find and map CISS config table and transfer table 7529 + * several items must be unmapped (freed) later 7530 + * */ 7531 static int hpsa_find_cfgtables(struct ctlr_info *h) 7532 { 7533 u64 cfg_offset; 7534 u32 cfg_base_addr; 7535 u64 cfg_base_addr_index; 7536 u32 trans_offset; 7537 int rc; 7538 7539 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7540 &cfg_base_addr_index, &cfg_offset); 7541 if (rc) 7542 return rc; 7543 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7544 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7545 if (!h->cfgtable) { 7546 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7547 return -ENOMEM; 7548 } 7549 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7550 if (rc) 7551 return rc; 7552 /* Find performant mode table. */ 7553 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7554 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7555 cfg_base_addr_index)+cfg_offset+trans_offset, 7556 sizeof(*h->transtable)); 7557 if (!h->transtable) { 7558 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7559 hpsa_free_cfgtables(h); 7560 return -ENOMEM; 7561 } 7562 return 0; 7563 } 7564 7565 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7566 { 7567 #define MIN_MAX_COMMANDS 16 7568 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7569 7570 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7571 7572 /* Limit commands in memory limited kdump scenario. */ 7573 if (reset_devices && h->max_commands > 32) 7574 h->max_commands = 32; 7575 7576 if (h->max_commands < MIN_MAX_COMMANDS) { 7577 dev_warn(&h->pdev->dev, 7578 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7579 h->max_commands, 7580 MIN_MAX_COMMANDS); 7581 h->max_commands = MIN_MAX_COMMANDS; 7582 } 7583 } 7584 7585 /* If the controller reports that the total max sg entries is greater than 512, 7586 * then we know that chained SG blocks work. (Original smart arrays did not 7587 * support chained SG blocks and would return zero for max sg entries.) 7588 */ 7589 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7590 { 7591 return h->maxsgentries > 512; 7592 } 7593 7594 /* Interrogate the hardware for some limits: 7595 * max commands, max SG elements without chaining, and with chaining, 7596 * SG chain block size, etc. 7597 */ 7598 static void hpsa_find_board_params(struct ctlr_info *h) 7599 { 7600 hpsa_get_max_perf_mode_cmds(h); 7601 h->nr_cmds = h->max_commands; 7602 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7603 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7604 if (hpsa_supports_chained_sg_blocks(h)) { 7605 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7606 h->max_cmd_sg_entries = 32; 7607 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7608 h->maxsgentries--; /* save one for chain pointer */ 7609 } else { 7610 /* 7611 * Original smart arrays supported at most 31 s/g entries 7612 * embedded inline in the command (trying to use more 7613 * would lock up the controller) 7614 */ 7615 h->max_cmd_sg_entries = 31; 7616 h->maxsgentries = 31; /* default to traditional values */ 7617 h->chainsize = 0; 7618 } 7619 7620 /* Find out what task management functions are supported and cache */ 7621 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7622 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7623 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7624 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7625 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7626 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7627 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7628 } 7629 7630 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7631 { 7632 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7633 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7634 return false; 7635 } 7636 return true; 7637 } 7638 7639 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7640 { 7641 u32 driver_support; 7642 7643 driver_support = readl(&(h->cfgtable->driver_support)); 7644 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7645 #ifdef CONFIG_X86 7646 driver_support |= ENABLE_SCSI_PREFETCH; 7647 #endif 7648 driver_support |= ENABLE_UNIT_ATTN; 7649 writel(driver_support, &(h->cfgtable->driver_support)); 7650 } 7651 7652 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7653 * in a prefetch beyond physical memory. 7654 */ 7655 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7656 { 7657 u32 dma_prefetch; 7658 7659 if (h->board_id != 0x3225103C) 7660 return; 7661 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7662 dma_prefetch |= 0x8000; 7663 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7664 } 7665 7666 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7667 { 7668 int i; 7669 u32 doorbell_value; 7670 unsigned long flags; 7671 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7672 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7673 spin_lock_irqsave(&h->lock, flags); 7674 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7675 spin_unlock_irqrestore(&h->lock, flags); 7676 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7677 goto done; 7678 /* delay and try again */ 7679 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7680 } 7681 return -ENODEV; 7682 done: 7683 return 0; 7684 } 7685 7686 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7687 { 7688 int i; 7689 u32 doorbell_value; 7690 unsigned long flags; 7691 7692 /* under certain very rare conditions, this can take awhile. 7693 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7694 * as we enter this code.) 7695 */ 7696 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7697 if (h->remove_in_progress) 7698 goto done; 7699 spin_lock_irqsave(&h->lock, flags); 7700 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7701 spin_unlock_irqrestore(&h->lock, flags); 7702 if (!(doorbell_value & CFGTBL_ChangeReq)) 7703 goto done; 7704 /* delay and try again */ 7705 msleep(MODE_CHANGE_WAIT_INTERVAL); 7706 } 7707 return -ENODEV; 7708 done: 7709 return 0; 7710 } 7711 7712 /* return -ENODEV or other reason on error, 0 on success */ 7713 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7714 { 7715 u32 trans_support; 7716 7717 trans_support = readl(&(h->cfgtable->TransportSupport)); 7718 if (!(trans_support & SIMPLE_MODE)) 7719 return -ENOTSUPP; 7720 7721 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7722 7723 /* Update the field, and then ring the doorbell */ 7724 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7725 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7726 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7727 if (hpsa_wait_for_mode_change_ack(h)) 7728 goto error; 7729 print_cfg_table(&h->pdev->dev, h->cfgtable); 7730 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7731 goto error; 7732 h->transMethod = CFGTBL_Trans_Simple; 7733 return 0; 7734 error: 7735 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7736 return -ENODEV; 7737 } 7738 7739 /* free items allocated or mapped by hpsa_pci_init */ 7740 static void hpsa_free_pci_init(struct ctlr_info *h) 7741 { 7742 hpsa_free_cfgtables(h); /* pci_init 4 */ 7743 iounmap(h->vaddr); /* pci_init 3 */ 7744 h->vaddr = NULL; 7745 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7746 /* 7747 * call pci_disable_device before pci_release_regions per 7748 * Documentation/PCI/pci.txt 7749 */ 7750 pci_disable_device(h->pdev); /* pci_init 1 */ 7751 pci_release_regions(h->pdev); /* pci_init 2 */ 7752 } 7753 7754 /* several items must be freed later */ 7755 static int hpsa_pci_init(struct ctlr_info *h) 7756 { 7757 int prod_index, err; 7758 bool legacy_board; 7759 7760 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7761 if (prod_index < 0) 7762 return prod_index; 7763 h->product_name = products[prod_index].product_name; 7764 h->access = *(products[prod_index].access); 7765 h->legacy_board = legacy_board; 7766 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7767 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7768 7769 err = pci_enable_device(h->pdev); 7770 if (err) { 7771 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7772 pci_disable_device(h->pdev); 7773 return err; 7774 } 7775 7776 err = pci_request_regions(h->pdev, HPSA); 7777 if (err) { 7778 dev_err(&h->pdev->dev, 7779 "failed to obtain PCI resources\n"); 7780 pci_disable_device(h->pdev); 7781 return err; 7782 } 7783 7784 pci_set_master(h->pdev); 7785 7786 err = hpsa_interrupt_mode(h); 7787 if (err) 7788 goto clean1; 7789 7790 /* setup mapping between CPU and reply queue */ 7791 hpsa_setup_reply_map(h); 7792 7793 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7794 if (err) 7795 goto clean2; /* intmode+region, pci */ 7796 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7797 if (!h->vaddr) { 7798 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7799 err = -ENOMEM; 7800 goto clean2; /* intmode+region, pci */ 7801 } 7802 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7803 if (err) 7804 goto clean3; /* vaddr, intmode+region, pci */ 7805 err = hpsa_find_cfgtables(h); 7806 if (err) 7807 goto clean3; /* vaddr, intmode+region, pci */ 7808 hpsa_find_board_params(h); 7809 7810 if (!hpsa_CISS_signature_present(h)) { 7811 err = -ENODEV; 7812 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7813 } 7814 hpsa_set_driver_support_bits(h); 7815 hpsa_p600_dma_prefetch_quirk(h); 7816 err = hpsa_enter_simple_mode(h); 7817 if (err) 7818 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7819 return 0; 7820 7821 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7822 hpsa_free_cfgtables(h); 7823 clean3: /* vaddr, intmode+region, pci */ 7824 iounmap(h->vaddr); 7825 h->vaddr = NULL; 7826 clean2: /* intmode+region, pci */ 7827 hpsa_disable_interrupt_mode(h); 7828 clean1: 7829 /* 7830 * call pci_disable_device before pci_release_regions per 7831 * Documentation/PCI/pci.txt 7832 */ 7833 pci_disable_device(h->pdev); 7834 pci_release_regions(h->pdev); 7835 return err; 7836 } 7837 7838 static void hpsa_hba_inquiry(struct ctlr_info *h) 7839 { 7840 int rc; 7841 7842 #define HBA_INQUIRY_BYTE_COUNT 64 7843 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7844 if (!h->hba_inquiry_data) 7845 return; 7846 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7847 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7848 if (rc != 0) { 7849 kfree(h->hba_inquiry_data); 7850 h->hba_inquiry_data = NULL; 7851 } 7852 } 7853 7854 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7855 { 7856 int rc, i; 7857 void __iomem *vaddr; 7858 7859 if (!reset_devices) 7860 return 0; 7861 7862 /* kdump kernel is loading, we don't know in which state is 7863 * the pci interface. The dev->enable_cnt is equal zero 7864 * so we call enable+disable, wait a while and switch it on. 7865 */ 7866 rc = pci_enable_device(pdev); 7867 if (rc) { 7868 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7869 return -ENODEV; 7870 } 7871 pci_disable_device(pdev); 7872 msleep(260); /* a randomly chosen number */ 7873 rc = pci_enable_device(pdev); 7874 if (rc) { 7875 dev_warn(&pdev->dev, "failed to enable device.\n"); 7876 return -ENODEV; 7877 } 7878 7879 pci_set_master(pdev); 7880 7881 vaddr = pci_ioremap_bar(pdev, 0); 7882 if (vaddr == NULL) { 7883 rc = -ENOMEM; 7884 goto out_disable; 7885 } 7886 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7887 iounmap(vaddr); 7888 7889 /* Reset the controller with a PCI power-cycle or via doorbell */ 7890 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7891 7892 /* -ENOTSUPP here means we cannot reset the controller 7893 * but it's already (and still) up and running in 7894 * "performant mode". Or, it might be 640x, which can't reset 7895 * due to concerns about shared bbwc between 6402/6404 pair. 7896 */ 7897 if (rc) 7898 goto out_disable; 7899 7900 /* Now try to get the controller to respond to a no-op */ 7901 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7902 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7903 if (hpsa_noop(pdev) == 0) 7904 break; 7905 else 7906 dev_warn(&pdev->dev, "no-op failed%s\n", 7907 (i < 11 ? "; re-trying" : "")); 7908 } 7909 7910 out_disable: 7911 7912 pci_disable_device(pdev); 7913 return rc; 7914 } 7915 7916 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7917 { 7918 kfree(h->cmd_pool_bits); 7919 h->cmd_pool_bits = NULL; 7920 if (h->cmd_pool) { 7921 dma_free_coherent(&h->pdev->dev, 7922 h->nr_cmds * sizeof(struct CommandList), 7923 h->cmd_pool, 7924 h->cmd_pool_dhandle); 7925 h->cmd_pool = NULL; 7926 h->cmd_pool_dhandle = 0; 7927 } 7928 if (h->errinfo_pool) { 7929 dma_free_coherent(&h->pdev->dev, 7930 h->nr_cmds * sizeof(struct ErrorInfo), 7931 h->errinfo_pool, 7932 h->errinfo_pool_dhandle); 7933 h->errinfo_pool = NULL; 7934 h->errinfo_pool_dhandle = 0; 7935 } 7936 } 7937 7938 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 7939 { 7940 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG), 7941 sizeof(unsigned long), 7942 GFP_KERNEL); 7943 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 7944 h->nr_cmds * sizeof(*h->cmd_pool), 7945 &h->cmd_pool_dhandle, GFP_KERNEL); 7946 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 7947 h->nr_cmds * sizeof(*h->errinfo_pool), 7948 &h->errinfo_pool_dhandle, GFP_KERNEL); 7949 if ((h->cmd_pool_bits == NULL) 7950 || (h->cmd_pool == NULL) 7951 || (h->errinfo_pool == NULL)) { 7952 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 7953 goto clean_up; 7954 } 7955 hpsa_preinitialize_commands(h); 7956 return 0; 7957 clean_up: 7958 hpsa_free_cmd_pool(h); 7959 return -ENOMEM; 7960 } 7961 7962 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7963 static void hpsa_free_irqs(struct ctlr_info *h) 7964 { 7965 int i; 7966 7967 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7968 /* Single reply queue, only one irq to free */ 7969 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7970 h->q[h->intr_mode] = 0; 7971 return; 7972 } 7973 7974 for (i = 0; i < h->msix_vectors; i++) { 7975 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7976 h->q[i] = 0; 7977 } 7978 for (; i < MAX_REPLY_QUEUES; i++) 7979 h->q[i] = 0; 7980 } 7981 7982 /* returns 0 on success; cleans up and returns -Enn on error */ 7983 static int hpsa_request_irqs(struct ctlr_info *h, 7984 irqreturn_t (*msixhandler)(int, void *), 7985 irqreturn_t (*intxhandler)(int, void *)) 7986 { 7987 int rc, i; 7988 7989 /* 7990 * initialize h->q[x] = x so that interrupt handlers know which 7991 * queue to process. 7992 */ 7993 for (i = 0; i < MAX_REPLY_QUEUES; i++) 7994 h->q[i] = (u8) i; 7995 7996 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7997 /* If performant mode and MSI-X, use multiple reply queues */ 7998 for (i = 0; i < h->msix_vectors; i++) { 7999 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8000 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8001 0, h->intrname[i], 8002 &h->q[i]); 8003 if (rc) { 8004 int j; 8005 8006 dev_err(&h->pdev->dev, 8007 "failed to get irq %d for %s\n", 8008 pci_irq_vector(h->pdev, i), h->devname); 8009 for (j = 0; j < i; j++) { 8010 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8011 h->q[j] = 0; 8012 } 8013 for (; j < MAX_REPLY_QUEUES; j++) 8014 h->q[j] = 0; 8015 return rc; 8016 } 8017 } 8018 } else { 8019 /* Use single reply pool */ 8020 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8021 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8022 h->msix_vectors ? "x" : ""); 8023 rc = request_irq(pci_irq_vector(h->pdev, 0), 8024 msixhandler, 0, 8025 h->intrname[0], 8026 &h->q[h->intr_mode]); 8027 } else { 8028 sprintf(h->intrname[h->intr_mode], 8029 "%s-intx", h->devname); 8030 rc = request_irq(pci_irq_vector(h->pdev, 0), 8031 intxhandler, IRQF_SHARED, 8032 h->intrname[0], 8033 &h->q[h->intr_mode]); 8034 } 8035 } 8036 if (rc) { 8037 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8038 pci_irq_vector(h->pdev, 0), h->devname); 8039 hpsa_free_irqs(h); 8040 return -ENODEV; 8041 } 8042 return 0; 8043 } 8044 8045 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8046 { 8047 int rc; 8048 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8049 8050 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8051 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8052 if (rc) { 8053 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8054 return rc; 8055 } 8056 8057 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8058 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8059 if (rc) { 8060 dev_warn(&h->pdev->dev, "Board failed to become ready " 8061 "after soft reset.\n"); 8062 return rc; 8063 } 8064 8065 return 0; 8066 } 8067 8068 static void hpsa_free_reply_queues(struct ctlr_info *h) 8069 { 8070 int i; 8071 8072 for (i = 0; i < h->nreply_queues; i++) { 8073 if (!h->reply_queue[i].head) 8074 continue; 8075 dma_free_coherent(&h->pdev->dev, 8076 h->reply_queue_size, 8077 h->reply_queue[i].head, 8078 h->reply_queue[i].busaddr); 8079 h->reply_queue[i].head = NULL; 8080 h->reply_queue[i].busaddr = 0; 8081 } 8082 h->reply_queue_size = 0; 8083 } 8084 8085 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8086 { 8087 hpsa_free_performant_mode(h); /* init_one 7 */ 8088 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8089 hpsa_free_cmd_pool(h); /* init_one 5 */ 8090 hpsa_free_irqs(h); /* init_one 4 */ 8091 scsi_host_put(h->scsi_host); /* init_one 3 */ 8092 h->scsi_host = NULL; /* init_one 3 */ 8093 hpsa_free_pci_init(h); /* init_one 2_5 */ 8094 free_percpu(h->lockup_detected); /* init_one 2 */ 8095 h->lockup_detected = NULL; /* init_one 2 */ 8096 if (h->resubmit_wq) { 8097 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8098 h->resubmit_wq = NULL; 8099 } 8100 if (h->rescan_ctlr_wq) { 8101 destroy_workqueue(h->rescan_ctlr_wq); 8102 h->rescan_ctlr_wq = NULL; 8103 } 8104 kfree(h); /* init_one 1 */ 8105 } 8106 8107 /* Called when controller lockup detected. */ 8108 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8109 { 8110 int i, refcount; 8111 struct CommandList *c; 8112 int failcount = 0; 8113 8114 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8115 for (i = 0; i < h->nr_cmds; i++) { 8116 c = h->cmd_pool + i; 8117 refcount = atomic_inc_return(&c->refcount); 8118 if (refcount > 1) { 8119 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8120 finish_cmd(c); 8121 atomic_dec(&h->commands_outstanding); 8122 failcount++; 8123 } 8124 cmd_free(h, c); 8125 } 8126 dev_warn(&h->pdev->dev, 8127 "failed %d commands in fail_all\n", failcount); 8128 } 8129 8130 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8131 { 8132 int cpu; 8133 8134 for_each_online_cpu(cpu) { 8135 u32 *lockup_detected; 8136 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8137 *lockup_detected = value; 8138 } 8139 wmb(); /* be sure the per-cpu variables are out to memory */ 8140 } 8141 8142 static void controller_lockup_detected(struct ctlr_info *h) 8143 { 8144 unsigned long flags; 8145 u32 lockup_detected; 8146 8147 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8148 spin_lock_irqsave(&h->lock, flags); 8149 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8150 if (!lockup_detected) { 8151 /* no heartbeat, but controller gave us a zero. */ 8152 dev_warn(&h->pdev->dev, 8153 "lockup detected after %d but scratchpad register is zero\n", 8154 h->heartbeat_sample_interval / HZ); 8155 lockup_detected = 0xffffffff; 8156 } 8157 set_lockup_detected_for_all_cpus(h, lockup_detected); 8158 spin_unlock_irqrestore(&h->lock, flags); 8159 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8160 lockup_detected, h->heartbeat_sample_interval / HZ); 8161 if (lockup_detected == 0xffff0000) { 8162 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8163 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8164 } 8165 pci_disable_device(h->pdev); 8166 fail_all_outstanding_cmds(h); 8167 } 8168 8169 static int detect_controller_lockup(struct ctlr_info *h) 8170 { 8171 u64 now; 8172 u32 heartbeat; 8173 unsigned long flags; 8174 8175 now = get_jiffies_64(); 8176 /* If we've received an interrupt recently, we're ok. */ 8177 if (time_after64(h->last_intr_timestamp + 8178 (h->heartbeat_sample_interval), now)) 8179 return false; 8180 8181 /* 8182 * If we've already checked the heartbeat recently, we're ok. 8183 * This could happen if someone sends us a signal. We 8184 * otherwise don't care about signals in this thread. 8185 */ 8186 if (time_after64(h->last_heartbeat_timestamp + 8187 (h->heartbeat_sample_interval), now)) 8188 return false; 8189 8190 /* If heartbeat has not changed since we last looked, we're not ok. */ 8191 spin_lock_irqsave(&h->lock, flags); 8192 heartbeat = readl(&h->cfgtable->HeartBeat); 8193 spin_unlock_irqrestore(&h->lock, flags); 8194 if (h->last_heartbeat == heartbeat) { 8195 controller_lockup_detected(h); 8196 return true; 8197 } 8198 8199 /* We're ok. */ 8200 h->last_heartbeat = heartbeat; 8201 h->last_heartbeat_timestamp = now; 8202 return false; 8203 } 8204 8205 /* 8206 * Set ioaccel status for all ioaccel volumes. 8207 * 8208 * Called from monitor controller worker (hpsa_event_monitor_worker) 8209 * 8210 * A Volume (or Volumes that comprise an Array set may be undergoing a 8211 * transformation, so we will be turning off ioaccel for all volumes that 8212 * make up the Array. 8213 */ 8214 static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8215 { 8216 int rc; 8217 int i; 8218 u8 ioaccel_status; 8219 unsigned char *buf; 8220 struct hpsa_scsi_dev_t *device; 8221 8222 if (!h) 8223 return; 8224 8225 buf = kmalloc(64, GFP_KERNEL); 8226 if (!buf) 8227 return; 8228 8229 /* 8230 * Run through current device list used during I/O requests. 8231 */ 8232 for (i = 0; i < h->ndevices; i++) { 8233 device = h->dev[i]; 8234 8235 if (!device) 8236 continue; 8237 if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8238 HPSA_VPD_LV_IOACCEL_STATUS)) 8239 continue; 8240 8241 memset(buf, 0, 64); 8242 8243 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8244 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8245 buf, 64); 8246 if (rc != 0) 8247 continue; 8248 8249 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8250 device->offload_config = 8251 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8252 if (device->offload_config) 8253 device->offload_to_be_enabled = 8254 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8255 8256 /* 8257 * Immediately turn off ioaccel for any volume the 8258 * controller tells us to. Some of the reasons could be: 8259 * transformation - change to the LVs of an Array. 8260 * degraded volume - component failure 8261 * 8262 * If ioaccel is to be re-enabled, re-enable later during the 8263 * scan operation so the driver can get a fresh raidmap 8264 * before turning ioaccel back on. 8265 * 8266 */ 8267 if (!device->offload_to_be_enabled) 8268 device->offload_enabled = 0; 8269 } 8270 8271 kfree(buf); 8272 } 8273 8274 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8275 { 8276 char *event_type; 8277 8278 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8279 return; 8280 8281 /* Ask the controller to clear the events we're handling. */ 8282 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8283 | CFGTBL_Trans_io_accel2)) && 8284 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8285 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8286 8287 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8288 event_type = "state change"; 8289 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8290 event_type = "configuration change"; 8291 /* Stop sending new RAID offload reqs via the IO accelerator */ 8292 scsi_block_requests(h->scsi_host); 8293 hpsa_set_ioaccel_status(h); 8294 hpsa_drain_accel_commands(h); 8295 /* Set 'accelerator path config change' bit */ 8296 dev_warn(&h->pdev->dev, 8297 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8298 h->events, event_type); 8299 writel(h->events, &(h->cfgtable->clear_event_notify)); 8300 /* Set the "clear event notify field update" bit 6 */ 8301 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8302 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8303 hpsa_wait_for_clear_event_notify_ack(h); 8304 scsi_unblock_requests(h->scsi_host); 8305 } else { 8306 /* Acknowledge controller notification events. */ 8307 writel(h->events, &(h->cfgtable->clear_event_notify)); 8308 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8309 hpsa_wait_for_clear_event_notify_ack(h); 8310 } 8311 return; 8312 } 8313 8314 /* Check a register on the controller to see if there are configuration 8315 * changes (added/changed/removed logical drives, etc.) which mean that 8316 * we should rescan the controller for devices. 8317 * Also check flag for driver-initiated rescan. 8318 */ 8319 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8320 { 8321 if (h->drv_req_rescan) { 8322 h->drv_req_rescan = 0; 8323 return 1; 8324 } 8325 8326 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8327 return 0; 8328 8329 h->events = readl(&(h->cfgtable->event_notify)); 8330 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8331 } 8332 8333 /* 8334 * Check if any of the offline devices have become ready 8335 */ 8336 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8337 { 8338 unsigned long flags; 8339 struct offline_device_entry *d; 8340 struct list_head *this, *tmp; 8341 8342 spin_lock_irqsave(&h->offline_device_lock, flags); 8343 list_for_each_safe(this, tmp, &h->offline_device_list) { 8344 d = list_entry(this, struct offline_device_entry, 8345 offline_list); 8346 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8347 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8348 spin_lock_irqsave(&h->offline_device_lock, flags); 8349 list_del(&d->offline_list); 8350 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8351 return 1; 8352 } 8353 spin_lock_irqsave(&h->offline_device_lock, flags); 8354 } 8355 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8356 return 0; 8357 } 8358 8359 static int hpsa_luns_changed(struct ctlr_info *h) 8360 { 8361 int rc = 1; /* assume there are changes */ 8362 struct ReportLUNdata *logdev = NULL; 8363 8364 /* if we can't find out if lun data has changed, 8365 * assume that it has. 8366 */ 8367 8368 if (!h->lastlogicals) 8369 return rc; 8370 8371 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8372 if (!logdev) 8373 return rc; 8374 8375 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8376 dev_warn(&h->pdev->dev, 8377 "report luns failed, can't track lun changes.\n"); 8378 goto out; 8379 } 8380 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8381 dev_info(&h->pdev->dev, 8382 "Lun changes detected.\n"); 8383 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8384 goto out; 8385 } else 8386 rc = 0; /* no changes detected. */ 8387 out: 8388 kfree(logdev); 8389 return rc; 8390 } 8391 8392 static void hpsa_perform_rescan(struct ctlr_info *h) 8393 { 8394 struct Scsi_Host *sh = NULL; 8395 unsigned long flags; 8396 8397 /* 8398 * Do the scan after the reset 8399 */ 8400 spin_lock_irqsave(&h->reset_lock, flags); 8401 if (h->reset_in_progress) { 8402 h->drv_req_rescan = 1; 8403 spin_unlock_irqrestore(&h->reset_lock, flags); 8404 return; 8405 } 8406 spin_unlock_irqrestore(&h->reset_lock, flags); 8407 8408 sh = scsi_host_get(h->scsi_host); 8409 if (sh != NULL) { 8410 hpsa_scan_start(sh); 8411 scsi_host_put(sh); 8412 h->drv_req_rescan = 0; 8413 } 8414 } 8415 8416 /* 8417 * watch for controller events 8418 */ 8419 static void hpsa_event_monitor_worker(struct work_struct *work) 8420 { 8421 struct ctlr_info *h = container_of(to_delayed_work(work), 8422 struct ctlr_info, event_monitor_work); 8423 unsigned long flags; 8424 8425 spin_lock_irqsave(&h->lock, flags); 8426 if (h->remove_in_progress) { 8427 spin_unlock_irqrestore(&h->lock, flags); 8428 return; 8429 } 8430 spin_unlock_irqrestore(&h->lock, flags); 8431 8432 if (hpsa_ctlr_needs_rescan(h)) { 8433 hpsa_ack_ctlr_events(h); 8434 hpsa_perform_rescan(h); 8435 } 8436 8437 spin_lock_irqsave(&h->lock, flags); 8438 if (!h->remove_in_progress) 8439 schedule_delayed_work(&h->event_monitor_work, 8440 HPSA_EVENT_MONITOR_INTERVAL); 8441 spin_unlock_irqrestore(&h->lock, flags); 8442 } 8443 8444 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8445 { 8446 unsigned long flags; 8447 struct ctlr_info *h = container_of(to_delayed_work(work), 8448 struct ctlr_info, rescan_ctlr_work); 8449 8450 spin_lock_irqsave(&h->lock, flags); 8451 if (h->remove_in_progress) { 8452 spin_unlock_irqrestore(&h->lock, flags); 8453 return; 8454 } 8455 spin_unlock_irqrestore(&h->lock, flags); 8456 8457 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8458 hpsa_perform_rescan(h); 8459 } else if (h->discovery_polling) { 8460 if (hpsa_luns_changed(h)) { 8461 dev_info(&h->pdev->dev, 8462 "driver discovery polling rescan.\n"); 8463 hpsa_perform_rescan(h); 8464 } 8465 } 8466 spin_lock_irqsave(&h->lock, flags); 8467 if (!h->remove_in_progress) 8468 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8469 h->heartbeat_sample_interval); 8470 spin_unlock_irqrestore(&h->lock, flags); 8471 } 8472 8473 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8474 { 8475 unsigned long flags; 8476 struct ctlr_info *h = container_of(to_delayed_work(work), 8477 struct ctlr_info, monitor_ctlr_work); 8478 8479 detect_controller_lockup(h); 8480 if (lockup_detected(h)) 8481 return; 8482 8483 spin_lock_irqsave(&h->lock, flags); 8484 if (!h->remove_in_progress) 8485 schedule_delayed_work(&h->monitor_ctlr_work, 8486 h->heartbeat_sample_interval); 8487 spin_unlock_irqrestore(&h->lock, flags); 8488 } 8489 8490 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8491 char *name) 8492 { 8493 struct workqueue_struct *wq = NULL; 8494 8495 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8496 if (!wq) 8497 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8498 8499 return wq; 8500 } 8501 8502 static void hpda_free_ctlr_info(struct ctlr_info *h) 8503 { 8504 kfree(h->reply_map); 8505 kfree(h); 8506 } 8507 8508 static struct ctlr_info *hpda_alloc_ctlr_info(void) 8509 { 8510 struct ctlr_info *h; 8511 8512 h = kzalloc(sizeof(*h), GFP_KERNEL); 8513 if (!h) 8514 return NULL; 8515 8516 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 8517 if (!h->reply_map) { 8518 kfree(h); 8519 return NULL; 8520 } 8521 return h; 8522 } 8523 8524 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8525 { 8526 int dac, rc; 8527 struct ctlr_info *h; 8528 int try_soft_reset = 0; 8529 unsigned long flags; 8530 u32 board_id; 8531 8532 if (number_of_controllers == 0) 8533 printk(KERN_INFO DRIVER_NAME "\n"); 8534 8535 rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 8536 if (rc < 0) { 8537 dev_warn(&pdev->dev, "Board ID not found\n"); 8538 return rc; 8539 } 8540 8541 rc = hpsa_init_reset_devices(pdev, board_id); 8542 if (rc) { 8543 if (rc != -ENOTSUPP) 8544 return rc; 8545 /* If the reset fails in a particular way (it has no way to do 8546 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8547 * a soft reset once we get the controller configured up to the 8548 * point that it can accept a command. 8549 */ 8550 try_soft_reset = 1; 8551 rc = 0; 8552 } 8553 8554 reinit_after_soft_reset: 8555 8556 /* Command structures must be aligned on a 32-byte boundary because 8557 * the 5 lower bits of the address are used by the hardware. and by 8558 * the driver. See comments in hpsa.h for more info. 8559 */ 8560 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8561 h = hpda_alloc_ctlr_info(); 8562 if (!h) { 8563 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8564 return -ENOMEM; 8565 } 8566 8567 h->pdev = pdev; 8568 8569 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8570 INIT_LIST_HEAD(&h->offline_device_list); 8571 spin_lock_init(&h->lock); 8572 spin_lock_init(&h->offline_device_lock); 8573 spin_lock_init(&h->scan_lock); 8574 spin_lock_init(&h->reset_lock); 8575 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8576 8577 /* Allocate and clear per-cpu variable lockup_detected */ 8578 h->lockup_detected = alloc_percpu(u32); 8579 if (!h->lockup_detected) { 8580 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8581 rc = -ENOMEM; 8582 goto clean1; /* aer/h */ 8583 } 8584 set_lockup_detected_for_all_cpus(h, 0); 8585 8586 rc = hpsa_pci_init(h); 8587 if (rc) 8588 goto clean2; /* lu, aer/h */ 8589 8590 /* relies on h-> settings made by hpsa_pci_init, including 8591 * interrupt_mode h->intr */ 8592 rc = hpsa_scsi_host_alloc(h); 8593 if (rc) 8594 goto clean2_5; /* pci, lu, aer/h */ 8595 8596 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8597 h->ctlr = number_of_controllers; 8598 number_of_controllers++; 8599 8600 /* configure PCI DMA stuff */ 8601 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 8602 if (rc == 0) { 8603 dac = 1; 8604 } else { 8605 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 8606 if (rc == 0) { 8607 dac = 0; 8608 } else { 8609 dev_err(&pdev->dev, "no suitable DMA available\n"); 8610 goto clean3; /* shost, pci, lu, aer/h */ 8611 } 8612 } 8613 8614 /* make sure the board interrupts are off */ 8615 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8616 8617 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8618 if (rc) 8619 goto clean3; /* shost, pci, lu, aer/h */ 8620 rc = hpsa_alloc_cmd_pool(h); 8621 if (rc) 8622 goto clean4; /* irq, shost, pci, lu, aer/h */ 8623 rc = hpsa_alloc_sg_chain_blocks(h); 8624 if (rc) 8625 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8626 init_waitqueue_head(&h->scan_wait_queue); 8627 init_waitqueue_head(&h->event_sync_wait_queue); 8628 mutex_init(&h->reset_mutex); 8629 h->scan_finished = 1; /* no scan currently in progress */ 8630 h->scan_waiting = 0; 8631 8632 pci_set_drvdata(pdev, h); 8633 h->ndevices = 0; 8634 8635 spin_lock_init(&h->devlock); 8636 rc = hpsa_put_ctlr_into_performant_mode(h); 8637 if (rc) 8638 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8639 8640 /* create the resubmit workqueue */ 8641 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8642 if (!h->rescan_ctlr_wq) { 8643 rc = -ENOMEM; 8644 goto clean7; 8645 } 8646 8647 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8648 if (!h->resubmit_wq) { 8649 rc = -ENOMEM; 8650 goto clean7; /* aer/h */ 8651 } 8652 8653 /* 8654 * At this point, the controller is ready to take commands. 8655 * Now, if reset_devices and the hard reset didn't work, try 8656 * the soft reset and see if that works. 8657 */ 8658 if (try_soft_reset) { 8659 8660 /* This is kind of gross. We may or may not get a completion 8661 * from the soft reset command, and if we do, then the value 8662 * from the fifo may or may not be valid. So, we wait 10 secs 8663 * after the reset throwing away any completions we get during 8664 * that time. Unregister the interrupt handler and register 8665 * fake ones to scoop up any residual completions. 8666 */ 8667 spin_lock_irqsave(&h->lock, flags); 8668 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8669 spin_unlock_irqrestore(&h->lock, flags); 8670 hpsa_free_irqs(h); 8671 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8672 hpsa_intx_discard_completions); 8673 if (rc) { 8674 dev_warn(&h->pdev->dev, 8675 "Failed to request_irq after soft reset.\n"); 8676 /* 8677 * cannot goto clean7 or free_irqs will be called 8678 * again. Instead, do its work 8679 */ 8680 hpsa_free_performant_mode(h); /* clean7 */ 8681 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8682 hpsa_free_cmd_pool(h); /* clean5 */ 8683 /* 8684 * skip hpsa_free_irqs(h) clean4 since that 8685 * was just called before request_irqs failed 8686 */ 8687 goto clean3; 8688 } 8689 8690 rc = hpsa_kdump_soft_reset(h); 8691 if (rc) 8692 /* Neither hard nor soft reset worked, we're hosed. */ 8693 goto clean7; 8694 8695 dev_info(&h->pdev->dev, "Board READY.\n"); 8696 dev_info(&h->pdev->dev, 8697 "Waiting for stale completions to drain.\n"); 8698 h->access.set_intr_mask(h, HPSA_INTR_ON); 8699 msleep(10000); 8700 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8701 8702 rc = controller_reset_failed(h->cfgtable); 8703 if (rc) 8704 dev_info(&h->pdev->dev, 8705 "Soft reset appears to have failed.\n"); 8706 8707 /* since the controller's reset, we have to go back and re-init 8708 * everything. Easiest to just forget what we've done and do it 8709 * all over again. 8710 */ 8711 hpsa_undo_allocations_after_kdump_soft_reset(h); 8712 try_soft_reset = 0; 8713 if (rc) 8714 /* don't goto clean, we already unallocated */ 8715 return -ENODEV; 8716 8717 goto reinit_after_soft_reset; 8718 } 8719 8720 /* Enable Accelerated IO path at driver layer */ 8721 h->acciopath_status = 1; 8722 /* Disable discovery polling.*/ 8723 h->discovery_polling = 0; 8724 8725 8726 /* Turn the interrupts on so we can service requests */ 8727 h->access.set_intr_mask(h, HPSA_INTR_ON); 8728 8729 hpsa_hba_inquiry(h); 8730 8731 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8732 if (!h->lastlogicals) 8733 dev_info(&h->pdev->dev, 8734 "Can't track change to report lun data\n"); 8735 8736 /* hook into SCSI subsystem */ 8737 rc = hpsa_scsi_add_host(h); 8738 if (rc) 8739 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8740 8741 /* Monitor the controller for firmware lockups */ 8742 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8743 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8744 schedule_delayed_work(&h->monitor_ctlr_work, 8745 h->heartbeat_sample_interval); 8746 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8747 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8748 h->heartbeat_sample_interval); 8749 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8750 schedule_delayed_work(&h->event_monitor_work, 8751 HPSA_EVENT_MONITOR_INTERVAL); 8752 return 0; 8753 8754 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8755 hpsa_free_performant_mode(h); 8756 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8757 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8758 hpsa_free_sg_chain_blocks(h); 8759 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8760 hpsa_free_cmd_pool(h); 8761 clean4: /* irq, shost, pci, lu, aer/h */ 8762 hpsa_free_irqs(h); 8763 clean3: /* shost, pci, lu, aer/h */ 8764 scsi_host_put(h->scsi_host); 8765 h->scsi_host = NULL; 8766 clean2_5: /* pci, lu, aer/h */ 8767 hpsa_free_pci_init(h); 8768 clean2: /* lu, aer/h */ 8769 if (h->lockup_detected) { 8770 free_percpu(h->lockup_detected); 8771 h->lockup_detected = NULL; 8772 } 8773 clean1: /* wq/aer/h */ 8774 if (h->resubmit_wq) { 8775 destroy_workqueue(h->resubmit_wq); 8776 h->resubmit_wq = NULL; 8777 } 8778 if (h->rescan_ctlr_wq) { 8779 destroy_workqueue(h->rescan_ctlr_wq); 8780 h->rescan_ctlr_wq = NULL; 8781 } 8782 kfree(h); 8783 return rc; 8784 } 8785 8786 static void hpsa_flush_cache(struct ctlr_info *h) 8787 { 8788 char *flush_buf; 8789 struct CommandList *c; 8790 int rc; 8791 8792 if (unlikely(lockup_detected(h))) 8793 return; 8794 flush_buf = kzalloc(4, GFP_KERNEL); 8795 if (!flush_buf) 8796 return; 8797 8798 c = cmd_alloc(h); 8799 8800 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8801 RAID_CTLR_LUNID, TYPE_CMD)) { 8802 goto out; 8803 } 8804 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8805 DEFAULT_TIMEOUT); 8806 if (rc) 8807 goto out; 8808 if (c->err_info->CommandStatus != 0) 8809 out: 8810 dev_warn(&h->pdev->dev, 8811 "error flushing cache on controller\n"); 8812 cmd_free(h, c); 8813 kfree(flush_buf); 8814 } 8815 8816 /* Make controller gather fresh report lun data each time we 8817 * send down a report luns request 8818 */ 8819 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8820 { 8821 u32 *options; 8822 struct CommandList *c; 8823 int rc; 8824 8825 /* Don't bother trying to set diag options if locked up */ 8826 if (unlikely(h->lockup_detected)) 8827 return; 8828 8829 options = kzalloc(sizeof(*options), GFP_KERNEL); 8830 if (!options) 8831 return; 8832 8833 c = cmd_alloc(h); 8834 8835 /* first, get the current diag options settings */ 8836 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8837 RAID_CTLR_LUNID, TYPE_CMD)) 8838 goto errout; 8839 8840 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8841 NO_TIMEOUT); 8842 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8843 goto errout; 8844 8845 /* Now, set the bit for disabling the RLD caching */ 8846 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8847 8848 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8849 RAID_CTLR_LUNID, TYPE_CMD)) 8850 goto errout; 8851 8852 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8853 NO_TIMEOUT); 8854 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8855 goto errout; 8856 8857 /* Now verify that it got set: */ 8858 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8859 RAID_CTLR_LUNID, TYPE_CMD)) 8860 goto errout; 8861 8862 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8863 NO_TIMEOUT); 8864 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8865 goto errout; 8866 8867 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8868 goto out; 8869 8870 errout: 8871 dev_err(&h->pdev->dev, 8872 "Error: failed to disable report lun data caching.\n"); 8873 out: 8874 cmd_free(h, c); 8875 kfree(options); 8876 } 8877 8878 static void __hpsa_shutdown(struct pci_dev *pdev) 8879 { 8880 struct ctlr_info *h; 8881 8882 h = pci_get_drvdata(pdev); 8883 /* Turn board interrupts off and send the flush cache command 8884 * sendcmd will turn off interrupt, and send the flush... 8885 * To write all data in the battery backed cache to disks 8886 */ 8887 hpsa_flush_cache(h); 8888 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8889 hpsa_free_irqs(h); /* init_one 4 */ 8890 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8891 } 8892 8893 static void hpsa_shutdown(struct pci_dev *pdev) 8894 { 8895 __hpsa_shutdown(pdev); 8896 pci_disable_device(pdev); 8897 } 8898 8899 static void hpsa_free_device_info(struct ctlr_info *h) 8900 { 8901 int i; 8902 8903 for (i = 0; i < h->ndevices; i++) { 8904 kfree(h->dev[i]); 8905 h->dev[i] = NULL; 8906 } 8907 } 8908 8909 static void hpsa_remove_one(struct pci_dev *pdev) 8910 { 8911 struct ctlr_info *h; 8912 unsigned long flags; 8913 8914 if (pci_get_drvdata(pdev) == NULL) { 8915 dev_err(&pdev->dev, "unable to remove device\n"); 8916 return; 8917 } 8918 h = pci_get_drvdata(pdev); 8919 8920 /* Get rid of any controller monitoring work items */ 8921 spin_lock_irqsave(&h->lock, flags); 8922 h->remove_in_progress = 1; 8923 spin_unlock_irqrestore(&h->lock, flags); 8924 cancel_delayed_work_sync(&h->monitor_ctlr_work); 8925 cancel_delayed_work_sync(&h->rescan_ctlr_work); 8926 cancel_delayed_work_sync(&h->event_monitor_work); 8927 destroy_workqueue(h->rescan_ctlr_wq); 8928 destroy_workqueue(h->resubmit_wq); 8929 8930 hpsa_delete_sas_host(h); 8931 8932 /* 8933 * Call before disabling interrupts. 8934 * scsi_remove_host can trigger I/O operations especially 8935 * when multipath is enabled. There can be SYNCHRONIZE CACHE 8936 * operations which cannot complete and will hang the system. 8937 */ 8938 if (h->scsi_host) 8939 scsi_remove_host(h->scsi_host); /* init_one 8 */ 8940 /* includes hpsa_free_irqs - init_one 4 */ 8941 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8942 __hpsa_shutdown(pdev); 8943 8944 hpsa_free_device_info(h); /* scan */ 8945 8946 kfree(h->hba_inquiry_data); /* init_one 10 */ 8947 h->hba_inquiry_data = NULL; /* init_one 10 */ 8948 hpsa_free_ioaccel2_sg_chain_blocks(h); 8949 hpsa_free_performant_mode(h); /* init_one 7 */ 8950 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8951 hpsa_free_cmd_pool(h); /* init_one 5 */ 8952 kfree(h->lastlogicals); 8953 8954 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8955 8956 scsi_host_put(h->scsi_host); /* init_one 3 */ 8957 h->scsi_host = NULL; /* init_one 3 */ 8958 8959 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8960 hpsa_free_pci_init(h); /* init_one 2.5 */ 8961 8962 free_percpu(h->lockup_detected); /* init_one 2 */ 8963 h->lockup_detected = NULL; /* init_one 2 */ 8964 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8965 8966 hpda_free_ctlr_info(h); /* init_one 1 */ 8967 } 8968 8969 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8970 __attribute__((unused)) pm_message_t state) 8971 { 8972 return -ENOSYS; 8973 } 8974 8975 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8976 { 8977 return -ENOSYS; 8978 } 8979 8980 static struct pci_driver hpsa_pci_driver = { 8981 .name = HPSA, 8982 .probe = hpsa_init_one, 8983 .remove = hpsa_remove_one, 8984 .id_table = hpsa_pci_device_id, /* id_table */ 8985 .shutdown = hpsa_shutdown, 8986 .suspend = hpsa_suspend, 8987 .resume = hpsa_resume, 8988 }; 8989 8990 /* Fill in bucket_map[], given nsgs (the max number of 8991 * scatter gather elements supported) and bucket[], 8992 * which is an array of 8 integers. The bucket[] array 8993 * contains 8 different DMA transfer sizes (in 16 8994 * byte increments) which the controller uses to fetch 8995 * commands. This function fills in bucket_map[], which 8996 * maps a given number of scatter gather elements to one of 8997 * the 8 DMA transfer sizes. The point of it is to allow the 8998 * controller to only do as much DMA as needed to fetch the 8999 * command, with the DMA transfer size encoded in the lower 9000 * bits of the command address. 9001 */ 9002 static void calc_bucket_map(int bucket[], int num_buckets, 9003 int nsgs, int min_blocks, u32 *bucket_map) 9004 { 9005 int i, j, b, size; 9006 9007 /* Note, bucket_map must have nsgs+1 entries. */ 9008 for (i = 0; i <= nsgs; i++) { 9009 /* Compute size of a command with i SG entries */ 9010 size = i + min_blocks; 9011 b = num_buckets; /* Assume the biggest bucket */ 9012 /* Find the bucket that is just big enough */ 9013 for (j = 0; j < num_buckets; j++) { 9014 if (bucket[j] >= size) { 9015 b = j; 9016 break; 9017 } 9018 } 9019 /* for a command with i SG entries, use bucket b. */ 9020 bucket_map[i] = b; 9021 } 9022 } 9023 9024 /* 9025 * return -ENODEV on err, 0 on success (or no action) 9026 * allocates numerous items that must be freed later 9027 */ 9028 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9029 { 9030 int i; 9031 unsigned long register_value; 9032 unsigned long transMethod = CFGTBL_Trans_Performant | 9033 (trans_support & CFGTBL_Trans_use_short_tags) | 9034 CFGTBL_Trans_enable_directed_msix | 9035 (trans_support & (CFGTBL_Trans_io_accel1 | 9036 CFGTBL_Trans_io_accel2)); 9037 struct access_method access = SA5_performant_access; 9038 9039 /* This is a bit complicated. There are 8 registers on 9040 * the controller which we write to to tell it 8 different 9041 * sizes of commands which there may be. It's a way of 9042 * reducing the DMA done to fetch each command. Encoded into 9043 * each command's tag are 3 bits which communicate to the controller 9044 * which of the eight sizes that command fits within. The size of 9045 * each command depends on how many scatter gather entries there are. 9046 * Each SG entry requires 16 bytes. The eight registers are programmed 9047 * with the number of 16-byte blocks a command of that size requires. 9048 * The smallest command possible requires 5 such 16 byte blocks. 9049 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9050 * blocks. Note, this only extends to the SG entries contained 9051 * within the command block, and does not extend to chained blocks 9052 * of SG elements. bft[] contains the eight values we write to 9053 * the registers. They are not evenly distributed, but have more 9054 * sizes for small commands, and fewer sizes for larger commands. 9055 */ 9056 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9057 #define MIN_IOACCEL2_BFT_ENTRY 5 9058 #define HPSA_IOACCEL2_HEADER_SZ 4 9059 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9060 13, 14, 15, 16, 17, 18, 19, 9061 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9062 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9063 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9064 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9065 16 * MIN_IOACCEL2_BFT_ENTRY); 9066 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9067 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9068 /* 5 = 1 s/g entry or 4k 9069 * 6 = 2 s/g entry or 8k 9070 * 8 = 4 s/g entry or 16k 9071 * 10 = 6 s/g entry or 24k 9072 */ 9073 9074 /* If the controller supports either ioaccel method then 9075 * we can also use the RAID stack submit path that does not 9076 * perform the superfluous readl() after each command submission. 9077 */ 9078 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9079 access = SA5_performant_access_no_read; 9080 9081 /* Controller spec: zero out this buffer. */ 9082 for (i = 0; i < h->nreply_queues; i++) 9083 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9084 9085 bft[7] = SG_ENTRIES_IN_CMD + 4; 9086 calc_bucket_map(bft, ARRAY_SIZE(bft), 9087 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9088 for (i = 0; i < 8; i++) 9089 writel(bft[i], &h->transtable->BlockFetch[i]); 9090 9091 /* size of controller ring buffer */ 9092 writel(h->max_commands, &h->transtable->RepQSize); 9093 writel(h->nreply_queues, &h->transtable->RepQCount); 9094 writel(0, &h->transtable->RepQCtrAddrLow32); 9095 writel(0, &h->transtable->RepQCtrAddrHigh32); 9096 9097 for (i = 0; i < h->nreply_queues; i++) { 9098 writel(0, &h->transtable->RepQAddr[i].upper); 9099 writel(h->reply_queue[i].busaddr, 9100 &h->transtable->RepQAddr[i].lower); 9101 } 9102 9103 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9104 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9105 /* 9106 * enable outbound interrupt coalescing in accelerator mode; 9107 */ 9108 if (trans_support & CFGTBL_Trans_io_accel1) { 9109 access = SA5_ioaccel_mode1_access; 9110 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9111 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9112 } else 9113 if (trans_support & CFGTBL_Trans_io_accel2) 9114 access = SA5_ioaccel_mode2_access; 9115 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9116 if (hpsa_wait_for_mode_change_ack(h)) { 9117 dev_err(&h->pdev->dev, 9118 "performant mode problem - doorbell timeout\n"); 9119 return -ENODEV; 9120 } 9121 register_value = readl(&(h->cfgtable->TransportActive)); 9122 if (!(register_value & CFGTBL_Trans_Performant)) { 9123 dev_err(&h->pdev->dev, 9124 "performant mode problem - transport not active\n"); 9125 return -ENODEV; 9126 } 9127 /* Change the access methods to the performant access methods */ 9128 h->access = access; 9129 h->transMethod = transMethod; 9130 9131 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9132 (trans_support & CFGTBL_Trans_io_accel2))) 9133 return 0; 9134 9135 if (trans_support & CFGTBL_Trans_io_accel1) { 9136 /* Set up I/O accelerator mode */ 9137 for (i = 0; i < h->nreply_queues; i++) { 9138 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9139 h->reply_queue[i].current_entry = 9140 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9141 } 9142 bft[7] = h->ioaccel_maxsg + 8; 9143 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9144 h->ioaccel1_blockFetchTable); 9145 9146 /* initialize all reply queue entries to unused */ 9147 for (i = 0; i < h->nreply_queues; i++) 9148 memset(h->reply_queue[i].head, 9149 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9150 h->reply_queue_size); 9151 9152 /* set all the constant fields in the accelerator command 9153 * frames once at init time to save CPU cycles later. 9154 */ 9155 for (i = 0; i < h->nr_cmds; i++) { 9156 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9157 9158 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9159 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9160 (i * sizeof(struct ErrorInfo))); 9161 cp->err_info_len = sizeof(struct ErrorInfo); 9162 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9163 cp->host_context_flags = 9164 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9165 cp->timeout_sec = 0; 9166 cp->ReplyQueue = 0; 9167 cp->tag = 9168 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9169 cp->host_addr = 9170 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9171 (i * sizeof(struct io_accel1_cmd))); 9172 } 9173 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9174 u64 cfg_offset, cfg_base_addr_index; 9175 u32 bft2_offset, cfg_base_addr; 9176 int rc; 9177 9178 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9179 &cfg_base_addr_index, &cfg_offset); 9180 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9181 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9182 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9183 4, h->ioaccel2_blockFetchTable); 9184 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9185 BUILD_BUG_ON(offsetof(struct CfgTable, 9186 io_accel_request_size_offset) != 0xb8); 9187 h->ioaccel2_bft2_regs = 9188 remap_pci_mem(pci_resource_start(h->pdev, 9189 cfg_base_addr_index) + 9190 cfg_offset + bft2_offset, 9191 ARRAY_SIZE(bft2) * 9192 sizeof(*h->ioaccel2_bft2_regs)); 9193 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9194 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9195 } 9196 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9197 if (hpsa_wait_for_mode_change_ack(h)) { 9198 dev_err(&h->pdev->dev, 9199 "performant mode problem - enabling ioaccel mode\n"); 9200 return -ENODEV; 9201 } 9202 return 0; 9203 } 9204 9205 /* Free ioaccel1 mode command blocks and block fetch table */ 9206 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9207 { 9208 if (h->ioaccel_cmd_pool) { 9209 pci_free_consistent(h->pdev, 9210 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9211 h->ioaccel_cmd_pool, 9212 h->ioaccel_cmd_pool_dhandle); 9213 h->ioaccel_cmd_pool = NULL; 9214 h->ioaccel_cmd_pool_dhandle = 0; 9215 } 9216 kfree(h->ioaccel1_blockFetchTable); 9217 h->ioaccel1_blockFetchTable = NULL; 9218 } 9219 9220 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9221 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9222 { 9223 h->ioaccel_maxsg = 9224 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9225 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9226 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9227 9228 /* Command structures must be aligned on a 128-byte boundary 9229 * because the 7 lower bits of the address are used by the 9230 * hardware. 9231 */ 9232 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9233 IOACCEL1_COMMANDLIST_ALIGNMENT); 9234 h->ioaccel_cmd_pool = 9235 dma_alloc_coherent(&h->pdev->dev, 9236 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9237 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9238 9239 h->ioaccel1_blockFetchTable = 9240 kmalloc(((h->ioaccel_maxsg + 1) * 9241 sizeof(u32)), GFP_KERNEL); 9242 9243 if ((h->ioaccel_cmd_pool == NULL) || 9244 (h->ioaccel1_blockFetchTable == NULL)) 9245 goto clean_up; 9246 9247 memset(h->ioaccel_cmd_pool, 0, 9248 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9249 return 0; 9250 9251 clean_up: 9252 hpsa_free_ioaccel1_cmd_and_bft(h); 9253 return -ENOMEM; 9254 } 9255 9256 /* Free ioaccel2 mode command blocks and block fetch table */ 9257 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9258 { 9259 hpsa_free_ioaccel2_sg_chain_blocks(h); 9260 9261 if (h->ioaccel2_cmd_pool) { 9262 pci_free_consistent(h->pdev, 9263 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9264 h->ioaccel2_cmd_pool, 9265 h->ioaccel2_cmd_pool_dhandle); 9266 h->ioaccel2_cmd_pool = NULL; 9267 h->ioaccel2_cmd_pool_dhandle = 0; 9268 } 9269 kfree(h->ioaccel2_blockFetchTable); 9270 h->ioaccel2_blockFetchTable = NULL; 9271 } 9272 9273 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9274 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9275 { 9276 int rc; 9277 9278 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9279 9280 h->ioaccel_maxsg = 9281 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9282 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9283 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9284 9285 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9286 IOACCEL2_COMMANDLIST_ALIGNMENT); 9287 h->ioaccel2_cmd_pool = 9288 dma_alloc_coherent(&h->pdev->dev, 9289 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9290 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9291 9292 h->ioaccel2_blockFetchTable = 9293 kmalloc(((h->ioaccel_maxsg + 1) * 9294 sizeof(u32)), GFP_KERNEL); 9295 9296 if ((h->ioaccel2_cmd_pool == NULL) || 9297 (h->ioaccel2_blockFetchTable == NULL)) { 9298 rc = -ENOMEM; 9299 goto clean_up; 9300 } 9301 9302 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9303 if (rc) 9304 goto clean_up; 9305 9306 memset(h->ioaccel2_cmd_pool, 0, 9307 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9308 return 0; 9309 9310 clean_up: 9311 hpsa_free_ioaccel2_cmd_and_bft(h); 9312 return rc; 9313 } 9314 9315 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9316 static void hpsa_free_performant_mode(struct ctlr_info *h) 9317 { 9318 kfree(h->blockFetchTable); 9319 h->blockFetchTable = NULL; 9320 hpsa_free_reply_queues(h); 9321 hpsa_free_ioaccel1_cmd_and_bft(h); 9322 hpsa_free_ioaccel2_cmd_and_bft(h); 9323 } 9324 9325 /* return -ENODEV on error, 0 on success (or no action) 9326 * allocates numerous items that must be freed later 9327 */ 9328 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9329 { 9330 u32 trans_support; 9331 unsigned long transMethod = CFGTBL_Trans_Performant | 9332 CFGTBL_Trans_use_short_tags; 9333 int i, rc; 9334 9335 if (hpsa_simple_mode) 9336 return 0; 9337 9338 trans_support = readl(&(h->cfgtable->TransportSupport)); 9339 if (!(trans_support & PERFORMANT_MODE)) 9340 return 0; 9341 9342 /* Check for I/O accelerator mode support */ 9343 if (trans_support & CFGTBL_Trans_io_accel1) { 9344 transMethod |= CFGTBL_Trans_io_accel1 | 9345 CFGTBL_Trans_enable_directed_msix; 9346 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9347 if (rc) 9348 return rc; 9349 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9350 transMethod |= CFGTBL_Trans_io_accel2 | 9351 CFGTBL_Trans_enable_directed_msix; 9352 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9353 if (rc) 9354 return rc; 9355 } 9356 9357 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9358 hpsa_get_max_perf_mode_cmds(h); 9359 /* Performant mode ring buffer and supporting data structures */ 9360 h->reply_queue_size = h->max_commands * sizeof(u64); 9361 9362 for (i = 0; i < h->nreply_queues; i++) { 9363 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9364 h->reply_queue_size, 9365 &h->reply_queue[i].busaddr, 9366 GFP_KERNEL); 9367 if (!h->reply_queue[i].head) { 9368 rc = -ENOMEM; 9369 goto clean1; /* rq, ioaccel */ 9370 } 9371 h->reply_queue[i].size = h->max_commands; 9372 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9373 h->reply_queue[i].current_entry = 0; 9374 } 9375 9376 /* Need a block fetch table for performant mode */ 9377 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9378 sizeof(u32)), GFP_KERNEL); 9379 if (!h->blockFetchTable) { 9380 rc = -ENOMEM; 9381 goto clean1; /* rq, ioaccel */ 9382 } 9383 9384 rc = hpsa_enter_performant_mode(h, trans_support); 9385 if (rc) 9386 goto clean2; /* bft, rq, ioaccel */ 9387 return 0; 9388 9389 clean2: /* bft, rq, ioaccel */ 9390 kfree(h->blockFetchTable); 9391 h->blockFetchTable = NULL; 9392 clean1: /* rq, ioaccel */ 9393 hpsa_free_reply_queues(h); 9394 hpsa_free_ioaccel1_cmd_and_bft(h); 9395 hpsa_free_ioaccel2_cmd_and_bft(h); 9396 return rc; 9397 } 9398 9399 static int is_accelerated_cmd(struct CommandList *c) 9400 { 9401 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9402 } 9403 9404 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9405 { 9406 struct CommandList *c = NULL; 9407 int i, accel_cmds_out; 9408 int refcount; 9409 9410 do { /* wait for all outstanding ioaccel commands to drain out */ 9411 accel_cmds_out = 0; 9412 for (i = 0; i < h->nr_cmds; i++) { 9413 c = h->cmd_pool + i; 9414 refcount = atomic_inc_return(&c->refcount); 9415 if (refcount > 1) /* Command is allocated */ 9416 accel_cmds_out += is_accelerated_cmd(c); 9417 cmd_free(h, c); 9418 } 9419 if (accel_cmds_out <= 0) 9420 break; 9421 msleep(100); 9422 } while (1); 9423 } 9424 9425 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9426 struct hpsa_sas_port *hpsa_sas_port) 9427 { 9428 struct hpsa_sas_phy *hpsa_sas_phy; 9429 struct sas_phy *phy; 9430 9431 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9432 if (!hpsa_sas_phy) 9433 return NULL; 9434 9435 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9436 hpsa_sas_port->next_phy_index); 9437 if (!phy) { 9438 kfree(hpsa_sas_phy); 9439 return NULL; 9440 } 9441 9442 hpsa_sas_port->next_phy_index++; 9443 hpsa_sas_phy->phy = phy; 9444 hpsa_sas_phy->parent_port = hpsa_sas_port; 9445 9446 return hpsa_sas_phy; 9447 } 9448 9449 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9450 { 9451 struct sas_phy *phy = hpsa_sas_phy->phy; 9452 9453 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9454 if (hpsa_sas_phy->added_to_port) 9455 list_del(&hpsa_sas_phy->phy_list_entry); 9456 sas_phy_delete(phy); 9457 kfree(hpsa_sas_phy); 9458 } 9459 9460 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9461 { 9462 int rc; 9463 struct hpsa_sas_port *hpsa_sas_port; 9464 struct sas_phy *phy; 9465 struct sas_identify *identify; 9466 9467 hpsa_sas_port = hpsa_sas_phy->parent_port; 9468 phy = hpsa_sas_phy->phy; 9469 9470 identify = &phy->identify; 9471 memset(identify, 0, sizeof(*identify)); 9472 identify->sas_address = hpsa_sas_port->sas_address; 9473 identify->device_type = SAS_END_DEVICE; 9474 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9475 identify->target_port_protocols = SAS_PROTOCOL_STP; 9476 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9477 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9478 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9479 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9480 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9481 9482 rc = sas_phy_add(hpsa_sas_phy->phy); 9483 if (rc) 9484 return rc; 9485 9486 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9487 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9488 &hpsa_sas_port->phy_list_head); 9489 hpsa_sas_phy->added_to_port = true; 9490 9491 return 0; 9492 } 9493 9494 static int 9495 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9496 struct sas_rphy *rphy) 9497 { 9498 struct sas_identify *identify; 9499 9500 identify = &rphy->identify; 9501 identify->sas_address = hpsa_sas_port->sas_address; 9502 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9503 identify->target_port_protocols = SAS_PROTOCOL_STP; 9504 9505 return sas_rphy_add(rphy); 9506 } 9507 9508 static struct hpsa_sas_port 9509 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9510 u64 sas_address) 9511 { 9512 int rc; 9513 struct hpsa_sas_port *hpsa_sas_port; 9514 struct sas_port *port; 9515 9516 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9517 if (!hpsa_sas_port) 9518 return NULL; 9519 9520 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9521 hpsa_sas_port->parent_node = hpsa_sas_node; 9522 9523 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9524 if (!port) 9525 goto free_hpsa_port; 9526 9527 rc = sas_port_add(port); 9528 if (rc) 9529 goto free_sas_port; 9530 9531 hpsa_sas_port->port = port; 9532 hpsa_sas_port->sas_address = sas_address; 9533 list_add_tail(&hpsa_sas_port->port_list_entry, 9534 &hpsa_sas_node->port_list_head); 9535 9536 return hpsa_sas_port; 9537 9538 free_sas_port: 9539 sas_port_free(port); 9540 free_hpsa_port: 9541 kfree(hpsa_sas_port); 9542 9543 return NULL; 9544 } 9545 9546 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9547 { 9548 struct hpsa_sas_phy *hpsa_sas_phy; 9549 struct hpsa_sas_phy *next; 9550 9551 list_for_each_entry_safe(hpsa_sas_phy, next, 9552 &hpsa_sas_port->phy_list_head, phy_list_entry) 9553 hpsa_free_sas_phy(hpsa_sas_phy); 9554 9555 sas_port_delete(hpsa_sas_port->port); 9556 list_del(&hpsa_sas_port->port_list_entry); 9557 kfree(hpsa_sas_port); 9558 } 9559 9560 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9561 { 9562 struct hpsa_sas_node *hpsa_sas_node; 9563 9564 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9565 if (hpsa_sas_node) { 9566 hpsa_sas_node->parent_dev = parent_dev; 9567 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9568 } 9569 9570 return hpsa_sas_node; 9571 } 9572 9573 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9574 { 9575 struct hpsa_sas_port *hpsa_sas_port; 9576 struct hpsa_sas_port *next; 9577 9578 if (!hpsa_sas_node) 9579 return; 9580 9581 list_for_each_entry_safe(hpsa_sas_port, next, 9582 &hpsa_sas_node->port_list_head, port_list_entry) 9583 hpsa_free_sas_port(hpsa_sas_port); 9584 9585 kfree(hpsa_sas_node); 9586 } 9587 9588 static struct hpsa_scsi_dev_t 9589 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9590 struct sas_rphy *rphy) 9591 { 9592 int i; 9593 struct hpsa_scsi_dev_t *device; 9594 9595 for (i = 0; i < h->ndevices; i++) { 9596 device = h->dev[i]; 9597 if (!device->sas_port) 9598 continue; 9599 if (device->sas_port->rphy == rphy) 9600 return device; 9601 } 9602 9603 return NULL; 9604 } 9605 9606 static int hpsa_add_sas_host(struct ctlr_info *h) 9607 { 9608 int rc; 9609 struct device *parent_dev; 9610 struct hpsa_sas_node *hpsa_sas_node; 9611 struct hpsa_sas_port *hpsa_sas_port; 9612 struct hpsa_sas_phy *hpsa_sas_phy; 9613 9614 parent_dev = &h->scsi_host->shost_dev; 9615 9616 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9617 if (!hpsa_sas_node) 9618 return -ENOMEM; 9619 9620 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9621 if (!hpsa_sas_port) { 9622 rc = -ENODEV; 9623 goto free_sas_node; 9624 } 9625 9626 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9627 if (!hpsa_sas_phy) { 9628 rc = -ENODEV; 9629 goto free_sas_port; 9630 } 9631 9632 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9633 if (rc) 9634 goto free_sas_phy; 9635 9636 h->sas_host = hpsa_sas_node; 9637 9638 return 0; 9639 9640 free_sas_phy: 9641 hpsa_free_sas_phy(hpsa_sas_phy); 9642 free_sas_port: 9643 hpsa_free_sas_port(hpsa_sas_port); 9644 free_sas_node: 9645 hpsa_free_sas_node(hpsa_sas_node); 9646 9647 return rc; 9648 } 9649 9650 static void hpsa_delete_sas_host(struct ctlr_info *h) 9651 { 9652 hpsa_free_sas_node(h->sas_host); 9653 } 9654 9655 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9656 struct hpsa_scsi_dev_t *device) 9657 { 9658 int rc; 9659 struct hpsa_sas_port *hpsa_sas_port; 9660 struct sas_rphy *rphy; 9661 9662 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9663 if (!hpsa_sas_port) 9664 return -ENOMEM; 9665 9666 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9667 if (!rphy) { 9668 rc = -ENODEV; 9669 goto free_sas_port; 9670 } 9671 9672 hpsa_sas_port->rphy = rphy; 9673 device->sas_port = hpsa_sas_port; 9674 9675 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9676 if (rc) 9677 goto free_sas_port; 9678 9679 return 0; 9680 9681 free_sas_port: 9682 hpsa_free_sas_port(hpsa_sas_port); 9683 device->sas_port = NULL; 9684 9685 return rc; 9686 } 9687 9688 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9689 { 9690 if (device->sas_port) { 9691 hpsa_free_sas_port(device->sas_port); 9692 device->sas_port = NULL; 9693 } 9694 } 9695 9696 static int 9697 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9698 { 9699 return 0; 9700 } 9701 9702 static int 9703 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9704 { 9705 struct Scsi_Host *shost = phy_to_shost(rphy); 9706 struct ctlr_info *h; 9707 struct hpsa_scsi_dev_t *sd; 9708 9709 if (!shost) 9710 return -ENXIO; 9711 9712 h = shost_to_hba(shost); 9713 9714 if (!h) 9715 return -ENXIO; 9716 9717 sd = hpsa_find_device_by_sas_rphy(h, rphy); 9718 if (!sd) 9719 return -ENXIO; 9720 9721 *identifier = sd->eli; 9722 9723 return 0; 9724 } 9725 9726 static int 9727 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9728 { 9729 return -ENXIO; 9730 } 9731 9732 static int 9733 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9734 { 9735 return 0; 9736 } 9737 9738 static int 9739 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9740 { 9741 return 0; 9742 } 9743 9744 static int 9745 hpsa_sas_phy_setup(struct sas_phy *phy) 9746 { 9747 return 0; 9748 } 9749 9750 static void 9751 hpsa_sas_phy_release(struct sas_phy *phy) 9752 { 9753 } 9754 9755 static int 9756 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9757 { 9758 return -EINVAL; 9759 } 9760 9761 static struct sas_function_template hpsa_sas_transport_functions = { 9762 .get_linkerrors = hpsa_sas_get_linkerrors, 9763 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9764 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9765 .phy_reset = hpsa_sas_phy_reset, 9766 .phy_enable = hpsa_sas_phy_enable, 9767 .phy_setup = hpsa_sas_phy_setup, 9768 .phy_release = hpsa_sas_phy_release, 9769 .set_phy_speed = hpsa_sas_phy_speed, 9770 }; 9771 9772 /* 9773 * This is it. Register the PCI driver information for the cards we control 9774 * the OS will call our registered routines when it finds one of our cards. 9775 */ 9776 static int __init hpsa_init(void) 9777 { 9778 int rc; 9779 9780 hpsa_sas_transport_template = 9781 sas_attach_transport(&hpsa_sas_transport_functions); 9782 if (!hpsa_sas_transport_template) 9783 return -ENODEV; 9784 9785 rc = pci_register_driver(&hpsa_pci_driver); 9786 9787 if (rc) 9788 sas_release_transport(hpsa_sas_transport_template); 9789 9790 return rc; 9791 } 9792 9793 static void __exit hpsa_cleanup(void) 9794 { 9795 pci_unregister_driver(&hpsa_pci_driver); 9796 sas_release_transport(hpsa_sas_transport_template); 9797 } 9798 9799 static void __attribute__((unused)) verify_offsets(void) 9800 { 9801 #define VERIFY_OFFSET(member, offset) \ 9802 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9803 9804 VERIFY_OFFSET(structure_size, 0); 9805 VERIFY_OFFSET(volume_blk_size, 4); 9806 VERIFY_OFFSET(volume_blk_cnt, 8); 9807 VERIFY_OFFSET(phys_blk_shift, 16); 9808 VERIFY_OFFSET(parity_rotation_shift, 17); 9809 VERIFY_OFFSET(strip_size, 18); 9810 VERIFY_OFFSET(disk_starting_blk, 20); 9811 VERIFY_OFFSET(disk_blk_cnt, 28); 9812 VERIFY_OFFSET(data_disks_per_row, 36); 9813 VERIFY_OFFSET(metadata_disks_per_row, 38); 9814 VERIFY_OFFSET(row_cnt, 40); 9815 VERIFY_OFFSET(layout_map_count, 42); 9816 VERIFY_OFFSET(flags, 44); 9817 VERIFY_OFFSET(dekindex, 46); 9818 /* VERIFY_OFFSET(reserved, 48 */ 9819 VERIFY_OFFSET(data, 64); 9820 9821 #undef VERIFY_OFFSET 9822 9823 #define VERIFY_OFFSET(member, offset) \ 9824 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9825 9826 VERIFY_OFFSET(IU_type, 0); 9827 VERIFY_OFFSET(direction, 1); 9828 VERIFY_OFFSET(reply_queue, 2); 9829 /* VERIFY_OFFSET(reserved1, 3); */ 9830 VERIFY_OFFSET(scsi_nexus, 4); 9831 VERIFY_OFFSET(Tag, 8); 9832 VERIFY_OFFSET(cdb, 16); 9833 VERIFY_OFFSET(cciss_lun, 32); 9834 VERIFY_OFFSET(data_len, 40); 9835 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9836 VERIFY_OFFSET(sg_count, 45); 9837 /* VERIFY_OFFSET(reserved3 */ 9838 VERIFY_OFFSET(err_ptr, 48); 9839 VERIFY_OFFSET(err_len, 56); 9840 /* VERIFY_OFFSET(reserved4 */ 9841 VERIFY_OFFSET(sg, 64); 9842 9843 #undef VERIFY_OFFSET 9844 9845 #define VERIFY_OFFSET(member, offset) \ 9846 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9847 9848 VERIFY_OFFSET(dev_handle, 0x00); 9849 VERIFY_OFFSET(reserved1, 0x02); 9850 VERIFY_OFFSET(function, 0x03); 9851 VERIFY_OFFSET(reserved2, 0x04); 9852 VERIFY_OFFSET(err_info, 0x0C); 9853 VERIFY_OFFSET(reserved3, 0x10); 9854 VERIFY_OFFSET(err_info_len, 0x12); 9855 VERIFY_OFFSET(reserved4, 0x13); 9856 VERIFY_OFFSET(sgl_offset, 0x14); 9857 VERIFY_OFFSET(reserved5, 0x15); 9858 VERIFY_OFFSET(transfer_len, 0x1C); 9859 VERIFY_OFFSET(reserved6, 0x20); 9860 VERIFY_OFFSET(io_flags, 0x24); 9861 VERIFY_OFFSET(reserved7, 0x26); 9862 VERIFY_OFFSET(LUN, 0x34); 9863 VERIFY_OFFSET(control, 0x3C); 9864 VERIFY_OFFSET(CDB, 0x40); 9865 VERIFY_OFFSET(reserved8, 0x50); 9866 VERIFY_OFFSET(host_context_flags, 0x60); 9867 VERIFY_OFFSET(timeout_sec, 0x62); 9868 VERIFY_OFFSET(ReplyQueue, 0x64); 9869 VERIFY_OFFSET(reserved9, 0x65); 9870 VERIFY_OFFSET(tag, 0x68); 9871 VERIFY_OFFSET(host_addr, 0x70); 9872 VERIFY_OFFSET(CISS_LUN, 0x78); 9873 VERIFY_OFFSET(SG, 0x78 + 8); 9874 #undef VERIFY_OFFSET 9875 } 9876 9877 module_init(hpsa_init); 9878 module_exit(hpsa_cleanup); 9879