1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.16-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149 {0,} 150 }; 151 152 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153 154 /* board_id = Subsystem Device ID & Vendor ID 155 * product = Marketing Name for the board 156 * access = Address of the struct of function pointers 157 */ 158 static struct board_type products[] = { 159 {0x3241103C, "Smart Array P212", &SA5_access}, 160 {0x3243103C, "Smart Array P410", &SA5_access}, 161 {0x3245103C, "Smart Array P410i", &SA5_access}, 162 {0x3247103C, "Smart Array P411", &SA5_access}, 163 {0x3249103C, "Smart Array P812", &SA5_access}, 164 {0x324A103C, "Smart Array P712m", &SA5_access}, 165 {0x324B103C, "Smart Array P711m", &SA5_access}, 166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167 {0x3350103C, "Smart Array P222", &SA5_access}, 168 {0x3351103C, "Smart Array P420", &SA5_access}, 169 {0x3352103C, "Smart Array P421", &SA5_access}, 170 {0x3353103C, "Smart Array P822", &SA5_access}, 171 {0x3354103C, "Smart Array P420i", &SA5_access}, 172 {0x3355103C, "Smart Array P220i", &SA5_access}, 173 {0x3356103C, "Smart Array P721m", &SA5_access}, 174 {0x1921103C, "Smart Array P830i", &SA5_access}, 175 {0x1922103C, "Smart Array P430", &SA5_access}, 176 {0x1923103C, "Smart Array P431", &SA5_access}, 177 {0x1924103C, "Smart Array P830", &SA5_access}, 178 {0x1926103C, "Smart Array P731m", &SA5_access}, 179 {0x1928103C, "Smart Array P230i", &SA5_access}, 180 {0x1929103C, "Smart Array P530", &SA5_access}, 181 {0x21BD103C, "Smart Array P244br", &SA5_access}, 182 {0x21BE103C, "Smart Array P741m", &SA5_access}, 183 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 184 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 186 {0x21C2103C, "Smart Array P440", &SA5_access}, 187 {0x21C3103C, "Smart Array P441", &SA5_access}, 188 {0x21C4103C, "Smart Array", &SA5_access}, 189 {0x21C5103C, "Smart Array P841", &SA5_access}, 190 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 191 {0x21C7103C, "Smart HBA H240", &SA5_access}, 192 {0x21C8103C, "Smart HBA H241", &SA5_access}, 193 {0x21C9103C, "Smart Array", &SA5_access}, 194 {0x21CA103C, "Smart Array P246br", &SA5_access}, 195 {0x21CB103C, "Smart Array P840", &SA5_access}, 196 {0x21CC103C, "Smart Array", &SA5_access}, 197 {0x21CD103C, "Smart Array", &SA5_access}, 198 {0x21CE103C, "Smart HBA", &SA5_access}, 199 {0x05809005, "SmartHBA-SA", &SA5_access}, 200 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211 }; 212 213 static struct scsi_transport_template *hpsa_sas_transport_template; 214 static int hpsa_add_sas_host(struct ctlr_info *h); 215 static void hpsa_delete_sas_host(struct ctlr_info *h); 216 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217 struct hpsa_scsi_dev_t *device); 218 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219 static struct hpsa_scsi_dev_t 220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221 struct sas_rphy *rphy); 222 223 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224 static const struct scsi_cmnd hpsa_cmd_busy; 225 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226 static const struct scsi_cmnd hpsa_cmd_idle; 227 static int number_of_controllers; 228 229 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 230 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 231 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232 233 #ifdef CONFIG_COMPAT 234 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 235 void __user *arg); 236 #endif 237 238 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239 static struct CommandList *cmd_alloc(struct ctlr_info *h); 240 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 241 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 242 struct scsi_cmnd *scmd); 243 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245 int cmd_type); 246 static void hpsa_free_cmd_pool(struct ctlr_info *h); 247 #define VPD_PAGE (1 << 8) 248 #define HPSA_SIMPLE_ERROR_BITS 0x03 249 250 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251 static void hpsa_scan_start(struct Scsi_Host *); 252 static int hpsa_scan_finished(struct Scsi_Host *sh, 253 unsigned long elapsed_time); 254 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255 256 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 257 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258 static int hpsa_slave_alloc(struct scsi_device *sdev); 259 static int hpsa_slave_configure(struct scsi_device *sdev); 260 static void hpsa_slave_destroy(struct scsi_device *sdev); 261 262 static void hpsa_update_scsi_devices(struct ctlr_info *h); 263 static int check_for_unit_attention(struct ctlr_info *h, 264 struct CommandList *c); 265 static void check_ioctl_unit_attention(struct ctlr_info *h, 266 struct CommandList *c); 267 /* performant mode helper functions */ 268 static void calc_bucket_map(int *bucket, int num_buckets, 269 int nsgs, int min_blocks, u32 *bucket_map); 270 static void hpsa_free_performant_mode(struct ctlr_info *h); 271 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272 static inline u32 next_command(struct ctlr_info *h, u8 q); 273 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 274 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 275 u64 *cfg_offset); 276 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 277 unsigned long *memory_bar); 278 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 280 int wait_for_ready); 281 static inline void finish_cmd(struct CommandList *c); 282 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 283 #define BOARD_NOT_READY 0 284 #define BOARD_READY 1 285 static void hpsa_drain_accel_commands(struct ctlr_info *h); 286 static void hpsa_flush_cache(struct ctlr_info *h); 287 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 288 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 289 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 290 static void hpsa_command_resubmit_worker(struct work_struct *work); 291 static u32 lockup_detected(struct ctlr_info *h); 292 static int detect_controller_lockup(struct ctlr_info *h); 293 static void hpsa_disable_rld_caching(struct ctlr_info *h); 294 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 295 struct ReportExtendedLUNdata *buf, int bufsize); 296 static int hpsa_luns_changed(struct ctlr_info *h); 297 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 298 struct hpsa_scsi_dev_t *dev, 299 unsigned char *scsi3addr); 300 301 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 302 { 303 unsigned long *priv = shost_priv(sdev->host); 304 return (struct ctlr_info *) *priv; 305 } 306 307 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 308 { 309 unsigned long *priv = shost_priv(sh); 310 return (struct ctlr_info *) *priv; 311 } 312 313 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 314 { 315 return c->scsi_cmd == SCSI_CMD_IDLE; 316 } 317 318 static inline bool hpsa_is_pending_event(struct CommandList *c) 319 { 320 return c->abort_pending || c->reset_pending; 321 } 322 323 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 324 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 325 u8 *sense_key, u8 *asc, u8 *ascq) 326 { 327 struct scsi_sense_hdr sshdr; 328 bool rc; 329 330 *sense_key = -1; 331 *asc = -1; 332 *ascq = -1; 333 334 if (sense_data_len < 1) 335 return; 336 337 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 338 if (rc) { 339 *sense_key = sshdr.sense_key; 340 *asc = sshdr.asc; 341 *ascq = sshdr.ascq; 342 } 343 } 344 345 static int check_for_unit_attention(struct ctlr_info *h, 346 struct CommandList *c) 347 { 348 u8 sense_key, asc, ascq; 349 int sense_len; 350 351 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 352 sense_len = sizeof(c->err_info->SenseInfo); 353 else 354 sense_len = c->err_info->SenseLen; 355 356 decode_sense_data(c->err_info->SenseInfo, sense_len, 357 &sense_key, &asc, &ascq); 358 if (sense_key != UNIT_ATTENTION || asc == 0xff) 359 return 0; 360 361 switch (asc) { 362 case STATE_CHANGED: 363 dev_warn(&h->pdev->dev, 364 "%s: a state change detected, command retried\n", 365 h->devname); 366 break; 367 case LUN_FAILED: 368 dev_warn(&h->pdev->dev, 369 "%s: LUN failure detected\n", h->devname); 370 break; 371 case REPORT_LUNS_CHANGED: 372 dev_warn(&h->pdev->dev, 373 "%s: report LUN data changed\n", h->devname); 374 /* 375 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 376 * target (array) devices. 377 */ 378 break; 379 case POWER_OR_RESET: 380 dev_warn(&h->pdev->dev, 381 "%s: a power on or device reset detected\n", 382 h->devname); 383 break; 384 case UNIT_ATTENTION_CLEARED: 385 dev_warn(&h->pdev->dev, 386 "%s: unit attention cleared by another initiator\n", 387 h->devname); 388 break; 389 default: 390 dev_warn(&h->pdev->dev, 391 "%s: unknown unit attention detected\n", 392 h->devname); 393 break; 394 } 395 return 1; 396 } 397 398 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 399 { 400 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 401 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 402 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 403 return 0; 404 dev_warn(&h->pdev->dev, HPSA "device busy"); 405 return 1; 406 } 407 408 static u32 lockup_detected(struct ctlr_info *h); 409 static ssize_t host_show_lockup_detected(struct device *dev, 410 struct device_attribute *attr, char *buf) 411 { 412 int ld; 413 struct ctlr_info *h; 414 struct Scsi_Host *shost = class_to_shost(dev); 415 416 h = shost_to_hba(shost); 417 ld = lockup_detected(h); 418 419 return sprintf(buf, "ld=%d\n", ld); 420 } 421 422 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 423 struct device_attribute *attr, 424 const char *buf, size_t count) 425 { 426 int status, len; 427 struct ctlr_info *h; 428 struct Scsi_Host *shost = class_to_shost(dev); 429 char tmpbuf[10]; 430 431 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 432 return -EACCES; 433 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 434 strncpy(tmpbuf, buf, len); 435 tmpbuf[len] = '\0'; 436 if (sscanf(tmpbuf, "%d", &status) != 1) 437 return -EINVAL; 438 h = shost_to_hba(shost); 439 h->acciopath_status = !!status; 440 dev_warn(&h->pdev->dev, 441 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 442 h->acciopath_status ? "enabled" : "disabled"); 443 return count; 444 } 445 446 static ssize_t host_store_raid_offload_debug(struct device *dev, 447 struct device_attribute *attr, 448 const char *buf, size_t count) 449 { 450 int debug_level, len; 451 struct ctlr_info *h; 452 struct Scsi_Host *shost = class_to_shost(dev); 453 char tmpbuf[10]; 454 455 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 456 return -EACCES; 457 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 458 strncpy(tmpbuf, buf, len); 459 tmpbuf[len] = '\0'; 460 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 461 return -EINVAL; 462 if (debug_level < 0) 463 debug_level = 0; 464 h = shost_to_hba(shost); 465 h->raid_offload_debug = debug_level; 466 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 467 h->raid_offload_debug); 468 return count; 469 } 470 471 static ssize_t host_store_rescan(struct device *dev, 472 struct device_attribute *attr, 473 const char *buf, size_t count) 474 { 475 struct ctlr_info *h; 476 struct Scsi_Host *shost = class_to_shost(dev); 477 h = shost_to_hba(shost); 478 hpsa_scan_start(h->scsi_host); 479 return count; 480 } 481 482 static ssize_t host_show_firmware_revision(struct device *dev, 483 struct device_attribute *attr, char *buf) 484 { 485 struct ctlr_info *h; 486 struct Scsi_Host *shost = class_to_shost(dev); 487 unsigned char *fwrev; 488 489 h = shost_to_hba(shost); 490 if (!h->hba_inquiry_data) 491 return 0; 492 fwrev = &h->hba_inquiry_data[32]; 493 return snprintf(buf, 20, "%c%c%c%c\n", 494 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 495 } 496 497 static ssize_t host_show_commands_outstanding(struct device *dev, 498 struct device_attribute *attr, char *buf) 499 { 500 struct Scsi_Host *shost = class_to_shost(dev); 501 struct ctlr_info *h = shost_to_hba(shost); 502 503 return snprintf(buf, 20, "%d\n", 504 atomic_read(&h->commands_outstanding)); 505 } 506 507 static ssize_t host_show_transport_mode(struct device *dev, 508 struct device_attribute *attr, char *buf) 509 { 510 struct ctlr_info *h; 511 struct Scsi_Host *shost = class_to_shost(dev); 512 513 h = shost_to_hba(shost); 514 return snprintf(buf, 20, "%s\n", 515 h->transMethod & CFGTBL_Trans_Performant ? 516 "performant" : "simple"); 517 } 518 519 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 520 struct device_attribute *attr, char *buf) 521 { 522 struct ctlr_info *h; 523 struct Scsi_Host *shost = class_to_shost(dev); 524 525 h = shost_to_hba(shost); 526 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 527 (h->acciopath_status == 1) ? "enabled" : "disabled"); 528 } 529 530 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 531 static u32 unresettable_controller[] = { 532 0x324a103C, /* Smart Array P712m */ 533 0x324b103C, /* Smart Array P711m */ 534 0x3223103C, /* Smart Array P800 */ 535 0x3234103C, /* Smart Array P400 */ 536 0x3235103C, /* Smart Array P400i */ 537 0x3211103C, /* Smart Array E200i */ 538 0x3212103C, /* Smart Array E200 */ 539 0x3213103C, /* Smart Array E200i */ 540 0x3214103C, /* Smart Array E200i */ 541 0x3215103C, /* Smart Array E200i */ 542 0x3237103C, /* Smart Array E500 */ 543 0x323D103C, /* Smart Array P700m */ 544 0x40800E11, /* Smart Array 5i */ 545 0x409C0E11, /* Smart Array 6400 */ 546 0x409D0E11, /* Smart Array 6400 EM */ 547 0x40700E11, /* Smart Array 5300 */ 548 0x40820E11, /* Smart Array 532 */ 549 0x40830E11, /* Smart Array 5312 */ 550 0x409A0E11, /* Smart Array 641 */ 551 0x409B0E11, /* Smart Array 642 */ 552 0x40910E11, /* Smart Array 6i */ 553 }; 554 555 /* List of controllers which cannot even be soft reset */ 556 static u32 soft_unresettable_controller[] = { 557 0x40800E11, /* Smart Array 5i */ 558 0x40700E11, /* Smart Array 5300 */ 559 0x40820E11, /* Smart Array 532 */ 560 0x40830E11, /* Smart Array 5312 */ 561 0x409A0E11, /* Smart Array 641 */ 562 0x409B0E11, /* Smart Array 642 */ 563 0x40910E11, /* Smart Array 6i */ 564 /* Exclude 640x boards. These are two pci devices in one slot 565 * which share a battery backed cache module. One controls the 566 * cache, the other accesses the cache through the one that controls 567 * it. If we reset the one controlling the cache, the other will 568 * likely not be happy. Just forbid resetting this conjoined mess. 569 * The 640x isn't really supported by hpsa anyway. 570 */ 571 0x409C0E11, /* Smart Array 6400 */ 572 0x409D0E11, /* Smart Array 6400 EM */ 573 }; 574 575 static u32 needs_abort_tags_swizzled[] = { 576 0x323D103C, /* Smart Array P700m */ 577 0x324a103C, /* Smart Array P712m */ 578 0x324b103C, /* SmartArray P711m */ 579 }; 580 581 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 582 { 583 int i; 584 585 for (i = 0; i < nelems; i++) 586 if (a[i] == board_id) 587 return 1; 588 return 0; 589 } 590 591 static int ctlr_is_hard_resettable(u32 board_id) 592 { 593 return !board_id_in_array(unresettable_controller, 594 ARRAY_SIZE(unresettable_controller), board_id); 595 } 596 597 static int ctlr_is_soft_resettable(u32 board_id) 598 { 599 return !board_id_in_array(soft_unresettable_controller, 600 ARRAY_SIZE(soft_unresettable_controller), board_id); 601 } 602 603 static int ctlr_is_resettable(u32 board_id) 604 { 605 return ctlr_is_hard_resettable(board_id) || 606 ctlr_is_soft_resettable(board_id); 607 } 608 609 static int ctlr_needs_abort_tags_swizzled(u32 board_id) 610 { 611 return board_id_in_array(needs_abort_tags_swizzled, 612 ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 613 } 614 615 static ssize_t host_show_resettable(struct device *dev, 616 struct device_attribute *attr, char *buf) 617 { 618 struct ctlr_info *h; 619 struct Scsi_Host *shost = class_to_shost(dev); 620 621 h = shost_to_hba(shost); 622 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 623 } 624 625 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 626 { 627 return (scsi3addr[3] & 0xC0) == 0x40; 628 } 629 630 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 631 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 632 }; 633 #define HPSA_RAID_0 0 634 #define HPSA_RAID_4 1 635 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 636 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 637 #define HPSA_RAID_51 4 638 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 639 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 640 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 641 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 642 643 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 644 { 645 return !device->physical_device; 646 } 647 648 static ssize_t raid_level_show(struct device *dev, 649 struct device_attribute *attr, char *buf) 650 { 651 ssize_t l = 0; 652 unsigned char rlevel; 653 struct ctlr_info *h; 654 struct scsi_device *sdev; 655 struct hpsa_scsi_dev_t *hdev; 656 unsigned long flags; 657 658 sdev = to_scsi_device(dev); 659 h = sdev_to_hba(sdev); 660 spin_lock_irqsave(&h->lock, flags); 661 hdev = sdev->hostdata; 662 if (!hdev) { 663 spin_unlock_irqrestore(&h->lock, flags); 664 return -ENODEV; 665 } 666 667 /* Is this even a logical drive? */ 668 if (!is_logical_device(hdev)) { 669 spin_unlock_irqrestore(&h->lock, flags); 670 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 671 return l; 672 } 673 674 rlevel = hdev->raid_level; 675 spin_unlock_irqrestore(&h->lock, flags); 676 if (rlevel > RAID_UNKNOWN) 677 rlevel = RAID_UNKNOWN; 678 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 679 return l; 680 } 681 682 static ssize_t lunid_show(struct device *dev, 683 struct device_attribute *attr, char *buf) 684 { 685 struct ctlr_info *h; 686 struct scsi_device *sdev; 687 struct hpsa_scsi_dev_t *hdev; 688 unsigned long flags; 689 unsigned char lunid[8]; 690 691 sdev = to_scsi_device(dev); 692 h = sdev_to_hba(sdev); 693 spin_lock_irqsave(&h->lock, flags); 694 hdev = sdev->hostdata; 695 if (!hdev) { 696 spin_unlock_irqrestore(&h->lock, flags); 697 return -ENODEV; 698 } 699 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 700 spin_unlock_irqrestore(&h->lock, flags); 701 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 702 lunid[0], lunid[1], lunid[2], lunid[3], 703 lunid[4], lunid[5], lunid[6], lunid[7]); 704 } 705 706 static ssize_t unique_id_show(struct device *dev, 707 struct device_attribute *attr, char *buf) 708 { 709 struct ctlr_info *h; 710 struct scsi_device *sdev; 711 struct hpsa_scsi_dev_t *hdev; 712 unsigned long flags; 713 unsigned char sn[16]; 714 715 sdev = to_scsi_device(dev); 716 h = sdev_to_hba(sdev); 717 spin_lock_irqsave(&h->lock, flags); 718 hdev = sdev->hostdata; 719 if (!hdev) { 720 spin_unlock_irqrestore(&h->lock, flags); 721 return -ENODEV; 722 } 723 memcpy(sn, hdev->device_id, sizeof(sn)); 724 spin_unlock_irqrestore(&h->lock, flags); 725 return snprintf(buf, 16 * 2 + 2, 726 "%02X%02X%02X%02X%02X%02X%02X%02X" 727 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 728 sn[0], sn[1], sn[2], sn[3], 729 sn[4], sn[5], sn[6], sn[7], 730 sn[8], sn[9], sn[10], sn[11], 731 sn[12], sn[13], sn[14], sn[15]); 732 } 733 734 static ssize_t sas_address_show(struct device *dev, 735 struct device_attribute *attr, char *buf) 736 { 737 struct ctlr_info *h; 738 struct scsi_device *sdev; 739 struct hpsa_scsi_dev_t *hdev; 740 unsigned long flags; 741 u64 sas_address; 742 743 sdev = to_scsi_device(dev); 744 h = sdev_to_hba(sdev); 745 spin_lock_irqsave(&h->lock, flags); 746 hdev = sdev->hostdata; 747 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 748 spin_unlock_irqrestore(&h->lock, flags); 749 return -ENODEV; 750 } 751 sas_address = hdev->sas_address; 752 spin_unlock_irqrestore(&h->lock, flags); 753 754 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 755 } 756 757 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 758 struct device_attribute *attr, char *buf) 759 { 760 struct ctlr_info *h; 761 struct scsi_device *sdev; 762 struct hpsa_scsi_dev_t *hdev; 763 unsigned long flags; 764 int offload_enabled; 765 766 sdev = to_scsi_device(dev); 767 h = sdev_to_hba(sdev); 768 spin_lock_irqsave(&h->lock, flags); 769 hdev = sdev->hostdata; 770 if (!hdev) { 771 spin_unlock_irqrestore(&h->lock, flags); 772 return -ENODEV; 773 } 774 offload_enabled = hdev->offload_enabled; 775 spin_unlock_irqrestore(&h->lock, flags); 776 return snprintf(buf, 20, "%d\n", offload_enabled); 777 } 778 779 #define MAX_PATHS 8 780 static ssize_t path_info_show(struct device *dev, 781 struct device_attribute *attr, char *buf) 782 { 783 struct ctlr_info *h; 784 struct scsi_device *sdev; 785 struct hpsa_scsi_dev_t *hdev; 786 unsigned long flags; 787 int i; 788 int output_len = 0; 789 u8 box; 790 u8 bay; 791 u8 path_map_index = 0; 792 char *active; 793 unsigned char phys_connector[2]; 794 795 sdev = to_scsi_device(dev); 796 h = sdev_to_hba(sdev); 797 spin_lock_irqsave(&h->devlock, flags); 798 hdev = sdev->hostdata; 799 if (!hdev) { 800 spin_unlock_irqrestore(&h->devlock, flags); 801 return -ENODEV; 802 } 803 804 bay = hdev->bay; 805 for (i = 0; i < MAX_PATHS; i++) { 806 path_map_index = 1<<i; 807 if (i == hdev->active_path_index) 808 active = "Active"; 809 else if (hdev->path_map & path_map_index) 810 active = "Inactive"; 811 else 812 continue; 813 814 output_len += scnprintf(buf + output_len, 815 PAGE_SIZE - output_len, 816 "[%d:%d:%d:%d] %20.20s ", 817 h->scsi_host->host_no, 818 hdev->bus, hdev->target, hdev->lun, 819 scsi_device_type(hdev->devtype)); 820 821 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 822 output_len += scnprintf(buf + output_len, 823 PAGE_SIZE - output_len, 824 "%s\n", active); 825 continue; 826 } 827 828 box = hdev->box[i]; 829 memcpy(&phys_connector, &hdev->phys_connector[i], 830 sizeof(phys_connector)); 831 if (phys_connector[0] < '0') 832 phys_connector[0] = '0'; 833 if (phys_connector[1] < '0') 834 phys_connector[1] = '0'; 835 output_len += scnprintf(buf + output_len, 836 PAGE_SIZE - output_len, 837 "PORT: %.2s ", 838 phys_connector); 839 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 840 hdev->expose_device) { 841 if (box == 0 || box == 0xFF) { 842 output_len += scnprintf(buf + output_len, 843 PAGE_SIZE - output_len, 844 "BAY: %hhu %s\n", 845 bay, active); 846 } else { 847 output_len += scnprintf(buf + output_len, 848 PAGE_SIZE - output_len, 849 "BOX: %hhu BAY: %hhu %s\n", 850 box, bay, active); 851 } 852 } else if (box != 0 && box != 0xFF) { 853 output_len += scnprintf(buf + output_len, 854 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 855 box, active); 856 } else 857 output_len += scnprintf(buf + output_len, 858 PAGE_SIZE - output_len, "%s\n", active); 859 } 860 861 spin_unlock_irqrestore(&h->devlock, flags); 862 return output_len; 863 } 864 865 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 866 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 867 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 868 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 869 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 870 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 871 host_show_hp_ssd_smart_path_enabled, NULL); 872 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 873 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 874 host_show_hp_ssd_smart_path_status, 875 host_store_hp_ssd_smart_path_status); 876 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 877 host_store_raid_offload_debug); 878 static DEVICE_ATTR(firmware_revision, S_IRUGO, 879 host_show_firmware_revision, NULL); 880 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 881 host_show_commands_outstanding, NULL); 882 static DEVICE_ATTR(transport_mode, S_IRUGO, 883 host_show_transport_mode, NULL); 884 static DEVICE_ATTR(resettable, S_IRUGO, 885 host_show_resettable, NULL); 886 static DEVICE_ATTR(lockup_detected, S_IRUGO, 887 host_show_lockup_detected, NULL); 888 889 static struct device_attribute *hpsa_sdev_attrs[] = { 890 &dev_attr_raid_level, 891 &dev_attr_lunid, 892 &dev_attr_unique_id, 893 &dev_attr_hp_ssd_smart_path_enabled, 894 &dev_attr_path_info, 895 &dev_attr_sas_address, 896 NULL, 897 }; 898 899 static struct device_attribute *hpsa_shost_attrs[] = { 900 &dev_attr_rescan, 901 &dev_attr_firmware_revision, 902 &dev_attr_commands_outstanding, 903 &dev_attr_transport_mode, 904 &dev_attr_resettable, 905 &dev_attr_hp_ssd_smart_path_status, 906 &dev_attr_raid_offload_debug, 907 &dev_attr_lockup_detected, 908 NULL, 909 }; 910 911 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 912 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 913 914 static struct scsi_host_template hpsa_driver_template = { 915 .module = THIS_MODULE, 916 .name = HPSA, 917 .proc_name = HPSA, 918 .queuecommand = hpsa_scsi_queue_command, 919 .scan_start = hpsa_scan_start, 920 .scan_finished = hpsa_scan_finished, 921 .change_queue_depth = hpsa_change_queue_depth, 922 .this_id = -1, 923 .use_clustering = ENABLE_CLUSTERING, 924 .eh_abort_handler = hpsa_eh_abort_handler, 925 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 926 .ioctl = hpsa_ioctl, 927 .slave_alloc = hpsa_slave_alloc, 928 .slave_configure = hpsa_slave_configure, 929 .slave_destroy = hpsa_slave_destroy, 930 #ifdef CONFIG_COMPAT 931 .compat_ioctl = hpsa_compat_ioctl, 932 #endif 933 .sdev_attrs = hpsa_sdev_attrs, 934 .shost_attrs = hpsa_shost_attrs, 935 .max_sectors = 8192, 936 .no_write_same = 1, 937 }; 938 939 static inline u32 next_command(struct ctlr_info *h, u8 q) 940 { 941 u32 a; 942 struct reply_queue_buffer *rq = &h->reply_queue[q]; 943 944 if (h->transMethod & CFGTBL_Trans_io_accel1) 945 return h->access.command_completed(h, q); 946 947 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 948 return h->access.command_completed(h, q); 949 950 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 951 a = rq->head[rq->current_entry]; 952 rq->current_entry++; 953 atomic_dec(&h->commands_outstanding); 954 } else { 955 a = FIFO_EMPTY; 956 } 957 /* Check for wraparound */ 958 if (rq->current_entry == h->max_commands) { 959 rq->current_entry = 0; 960 rq->wraparound ^= 1; 961 } 962 return a; 963 } 964 965 /* 966 * There are some special bits in the bus address of the 967 * command that we have to set for the controller to know 968 * how to process the command: 969 * 970 * Normal performant mode: 971 * bit 0: 1 means performant mode, 0 means simple mode. 972 * bits 1-3 = block fetch table entry 973 * bits 4-6 = command type (== 0) 974 * 975 * ioaccel1 mode: 976 * bit 0 = "performant mode" bit. 977 * bits 1-3 = block fetch table entry 978 * bits 4-6 = command type (== 110) 979 * (command type is needed because ioaccel1 mode 980 * commands are submitted through the same register as normal 981 * mode commands, so this is how the controller knows whether 982 * the command is normal mode or ioaccel1 mode.) 983 * 984 * ioaccel2 mode: 985 * bit 0 = "performant mode" bit. 986 * bits 1-4 = block fetch table entry (note extra bit) 987 * bits 4-6 = not needed, because ioaccel2 mode has 988 * a separate special register for submitting commands. 989 */ 990 991 /* 992 * set_performant_mode: Modify the tag for cciss performant 993 * set bit 0 for pull model, bits 3-1 for block fetch 994 * register number 995 */ 996 #define DEFAULT_REPLY_QUEUE (-1) 997 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 998 int reply_queue) 999 { 1000 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1001 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1002 if (unlikely(!h->msix_vector)) 1003 return; 1004 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1005 c->Header.ReplyQueue = 1006 raw_smp_processor_id() % h->nreply_queues; 1007 else 1008 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1009 } 1010 } 1011 1012 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1013 struct CommandList *c, 1014 int reply_queue) 1015 { 1016 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1017 1018 /* 1019 * Tell the controller to post the reply to the queue for this 1020 * processor. This seems to give the best I/O throughput. 1021 */ 1022 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1023 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1024 else 1025 cp->ReplyQueue = reply_queue % h->nreply_queues; 1026 /* 1027 * Set the bits in the address sent down to include: 1028 * - performant mode bit (bit 0) 1029 * - pull count (bits 1-3) 1030 * - command type (bits 4-6) 1031 */ 1032 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1033 IOACCEL1_BUSADDR_CMDTYPE; 1034 } 1035 1036 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1037 struct CommandList *c, 1038 int reply_queue) 1039 { 1040 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1041 &h->ioaccel2_cmd_pool[c->cmdindex]; 1042 1043 /* Tell the controller to post the reply to the queue for this 1044 * processor. This seems to give the best I/O throughput. 1045 */ 1046 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1047 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1048 else 1049 cp->reply_queue = reply_queue % h->nreply_queues; 1050 /* Set the bits in the address sent down to include: 1051 * - performant mode bit not used in ioaccel mode 2 1052 * - pull count (bits 0-3) 1053 * - command type isn't needed for ioaccel2 1054 */ 1055 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1056 } 1057 1058 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1059 struct CommandList *c, 1060 int reply_queue) 1061 { 1062 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1063 1064 /* 1065 * Tell the controller to post the reply to the queue for this 1066 * processor. This seems to give the best I/O throughput. 1067 */ 1068 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1069 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1070 else 1071 cp->reply_queue = reply_queue % h->nreply_queues; 1072 /* 1073 * Set the bits in the address sent down to include: 1074 * - performant mode bit not used in ioaccel mode 2 1075 * - pull count (bits 0-3) 1076 * - command type isn't needed for ioaccel2 1077 */ 1078 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1079 } 1080 1081 static int is_firmware_flash_cmd(u8 *cdb) 1082 { 1083 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1084 } 1085 1086 /* 1087 * During firmware flash, the heartbeat register may not update as frequently 1088 * as it should. So we dial down lockup detection during firmware flash. and 1089 * dial it back up when firmware flash completes. 1090 */ 1091 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1092 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1093 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1094 struct CommandList *c) 1095 { 1096 if (!is_firmware_flash_cmd(c->Request.CDB)) 1097 return; 1098 atomic_inc(&h->firmware_flash_in_progress); 1099 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1100 } 1101 1102 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1103 struct CommandList *c) 1104 { 1105 if (is_firmware_flash_cmd(c->Request.CDB) && 1106 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1107 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1108 } 1109 1110 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1111 struct CommandList *c, int reply_queue) 1112 { 1113 dial_down_lockup_detection_during_fw_flash(h, c); 1114 atomic_inc(&h->commands_outstanding); 1115 switch (c->cmd_type) { 1116 case CMD_IOACCEL1: 1117 set_ioaccel1_performant_mode(h, c, reply_queue); 1118 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1119 break; 1120 case CMD_IOACCEL2: 1121 set_ioaccel2_performant_mode(h, c, reply_queue); 1122 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1123 break; 1124 case IOACCEL2_TMF: 1125 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1126 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1127 break; 1128 default: 1129 set_performant_mode(h, c, reply_queue); 1130 h->access.submit_command(h, c); 1131 } 1132 } 1133 1134 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1135 { 1136 if (unlikely(hpsa_is_pending_event(c))) 1137 return finish_cmd(c); 1138 1139 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1140 } 1141 1142 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1143 { 1144 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1145 } 1146 1147 static inline int is_scsi_rev_5(struct ctlr_info *h) 1148 { 1149 if (!h->hba_inquiry_data) 1150 return 0; 1151 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1152 return 1; 1153 return 0; 1154 } 1155 1156 static int hpsa_find_target_lun(struct ctlr_info *h, 1157 unsigned char scsi3addr[], int bus, int *target, int *lun) 1158 { 1159 /* finds an unused bus, target, lun for a new physical device 1160 * assumes h->devlock is held 1161 */ 1162 int i, found = 0; 1163 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1164 1165 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1166 1167 for (i = 0; i < h->ndevices; i++) { 1168 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1169 __set_bit(h->dev[i]->target, lun_taken); 1170 } 1171 1172 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1173 if (i < HPSA_MAX_DEVICES) { 1174 /* *bus = 1; */ 1175 *target = i; 1176 *lun = 0; 1177 found = 1; 1178 } 1179 return !found; 1180 } 1181 1182 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1183 struct hpsa_scsi_dev_t *dev, char *description) 1184 { 1185 #define LABEL_SIZE 25 1186 char label[LABEL_SIZE]; 1187 1188 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1189 return; 1190 1191 switch (dev->devtype) { 1192 case TYPE_RAID: 1193 snprintf(label, LABEL_SIZE, "controller"); 1194 break; 1195 case TYPE_ENCLOSURE: 1196 snprintf(label, LABEL_SIZE, "enclosure"); 1197 break; 1198 case TYPE_DISK: 1199 case TYPE_ZBC: 1200 if (dev->external) 1201 snprintf(label, LABEL_SIZE, "external"); 1202 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1203 snprintf(label, LABEL_SIZE, "%s", 1204 raid_label[PHYSICAL_DRIVE]); 1205 else 1206 snprintf(label, LABEL_SIZE, "RAID-%s", 1207 dev->raid_level > RAID_UNKNOWN ? "?" : 1208 raid_label[dev->raid_level]); 1209 break; 1210 case TYPE_ROM: 1211 snprintf(label, LABEL_SIZE, "rom"); 1212 break; 1213 case TYPE_TAPE: 1214 snprintf(label, LABEL_SIZE, "tape"); 1215 break; 1216 case TYPE_MEDIUM_CHANGER: 1217 snprintf(label, LABEL_SIZE, "changer"); 1218 break; 1219 default: 1220 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1221 break; 1222 } 1223 1224 dev_printk(level, &h->pdev->dev, 1225 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1226 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1227 description, 1228 scsi_device_type(dev->devtype), 1229 dev->vendor, 1230 dev->model, 1231 label, 1232 dev->offload_config ? '+' : '-', 1233 dev->offload_enabled ? '+' : '-', 1234 dev->expose_device); 1235 } 1236 1237 /* Add an entry into h->dev[] array. */ 1238 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1239 struct hpsa_scsi_dev_t *device, 1240 struct hpsa_scsi_dev_t *added[], int *nadded) 1241 { 1242 /* assumes h->devlock is held */ 1243 int n = h->ndevices; 1244 int i; 1245 unsigned char addr1[8], addr2[8]; 1246 struct hpsa_scsi_dev_t *sd; 1247 1248 if (n >= HPSA_MAX_DEVICES) { 1249 dev_err(&h->pdev->dev, "too many devices, some will be " 1250 "inaccessible.\n"); 1251 return -1; 1252 } 1253 1254 /* physical devices do not have lun or target assigned until now. */ 1255 if (device->lun != -1) 1256 /* Logical device, lun is already assigned. */ 1257 goto lun_assigned; 1258 1259 /* If this device a non-zero lun of a multi-lun device 1260 * byte 4 of the 8-byte LUN addr will contain the logical 1261 * unit no, zero otherwise. 1262 */ 1263 if (device->scsi3addr[4] == 0) { 1264 /* This is not a non-zero lun of a multi-lun device */ 1265 if (hpsa_find_target_lun(h, device->scsi3addr, 1266 device->bus, &device->target, &device->lun) != 0) 1267 return -1; 1268 goto lun_assigned; 1269 } 1270 1271 /* This is a non-zero lun of a multi-lun device. 1272 * Search through our list and find the device which 1273 * has the same 8 byte LUN address, excepting byte 4 and 5. 1274 * Assign the same bus and target for this new LUN. 1275 * Use the logical unit number from the firmware. 1276 */ 1277 memcpy(addr1, device->scsi3addr, 8); 1278 addr1[4] = 0; 1279 addr1[5] = 0; 1280 for (i = 0; i < n; i++) { 1281 sd = h->dev[i]; 1282 memcpy(addr2, sd->scsi3addr, 8); 1283 addr2[4] = 0; 1284 addr2[5] = 0; 1285 /* differ only in byte 4 and 5? */ 1286 if (memcmp(addr1, addr2, 8) == 0) { 1287 device->bus = sd->bus; 1288 device->target = sd->target; 1289 device->lun = device->scsi3addr[4]; 1290 break; 1291 } 1292 } 1293 if (device->lun == -1) { 1294 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1295 " suspect firmware bug or unsupported hardware " 1296 "configuration.\n"); 1297 return -1; 1298 } 1299 1300 lun_assigned: 1301 1302 h->dev[n] = device; 1303 h->ndevices++; 1304 added[*nadded] = device; 1305 (*nadded)++; 1306 hpsa_show_dev_msg(KERN_INFO, h, device, 1307 device->expose_device ? "added" : "masked"); 1308 device->offload_to_be_enabled = device->offload_enabled; 1309 device->offload_enabled = 0; 1310 return 0; 1311 } 1312 1313 /* Update an entry in h->dev[] array. */ 1314 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1315 int entry, struct hpsa_scsi_dev_t *new_entry) 1316 { 1317 int offload_enabled; 1318 /* assumes h->devlock is held */ 1319 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1320 1321 /* Raid level changed. */ 1322 h->dev[entry]->raid_level = new_entry->raid_level; 1323 1324 /* Raid offload parameters changed. Careful about the ordering. */ 1325 if (new_entry->offload_config && new_entry->offload_enabled) { 1326 /* 1327 * if drive is newly offload_enabled, we want to copy the 1328 * raid map data first. If previously offload_enabled and 1329 * offload_config were set, raid map data had better be 1330 * the same as it was before. if raid map data is changed 1331 * then it had better be the case that 1332 * h->dev[entry]->offload_enabled is currently 0. 1333 */ 1334 h->dev[entry]->raid_map = new_entry->raid_map; 1335 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1336 } 1337 if (new_entry->hba_ioaccel_enabled) { 1338 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1339 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1340 } 1341 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1342 h->dev[entry]->offload_config = new_entry->offload_config; 1343 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1344 h->dev[entry]->queue_depth = new_entry->queue_depth; 1345 1346 /* 1347 * We can turn off ioaccel offload now, but need to delay turning 1348 * it on until we can update h->dev[entry]->phys_disk[], but we 1349 * can't do that until all the devices are updated. 1350 */ 1351 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1352 if (!new_entry->offload_enabled) 1353 h->dev[entry]->offload_enabled = 0; 1354 1355 offload_enabled = h->dev[entry]->offload_enabled; 1356 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1357 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1358 h->dev[entry]->offload_enabled = offload_enabled; 1359 } 1360 1361 /* Replace an entry from h->dev[] array. */ 1362 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1363 int entry, struct hpsa_scsi_dev_t *new_entry, 1364 struct hpsa_scsi_dev_t *added[], int *nadded, 1365 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1366 { 1367 /* assumes h->devlock is held */ 1368 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1369 removed[*nremoved] = h->dev[entry]; 1370 (*nremoved)++; 1371 1372 /* 1373 * New physical devices won't have target/lun assigned yet 1374 * so we need to preserve the values in the slot we are replacing. 1375 */ 1376 if (new_entry->target == -1) { 1377 new_entry->target = h->dev[entry]->target; 1378 new_entry->lun = h->dev[entry]->lun; 1379 } 1380 1381 h->dev[entry] = new_entry; 1382 added[*nadded] = new_entry; 1383 (*nadded)++; 1384 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1385 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1386 new_entry->offload_enabled = 0; 1387 } 1388 1389 /* Remove an entry from h->dev[] array. */ 1390 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1391 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1392 { 1393 /* assumes h->devlock is held */ 1394 int i; 1395 struct hpsa_scsi_dev_t *sd; 1396 1397 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1398 1399 sd = h->dev[entry]; 1400 removed[*nremoved] = h->dev[entry]; 1401 (*nremoved)++; 1402 1403 for (i = entry; i < h->ndevices-1; i++) 1404 h->dev[i] = h->dev[i+1]; 1405 h->ndevices--; 1406 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1407 } 1408 1409 #define SCSI3ADDR_EQ(a, b) ( \ 1410 (a)[7] == (b)[7] && \ 1411 (a)[6] == (b)[6] && \ 1412 (a)[5] == (b)[5] && \ 1413 (a)[4] == (b)[4] && \ 1414 (a)[3] == (b)[3] && \ 1415 (a)[2] == (b)[2] && \ 1416 (a)[1] == (b)[1] && \ 1417 (a)[0] == (b)[0]) 1418 1419 static void fixup_botched_add(struct ctlr_info *h, 1420 struct hpsa_scsi_dev_t *added) 1421 { 1422 /* called when scsi_add_device fails in order to re-adjust 1423 * h->dev[] to match the mid layer's view. 1424 */ 1425 unsigned long flags; 1426 int i, j; 1427 1428 spin_lock_irqsave(&h->lock, flags); 1429 for (i = 0; i < h->ndevices; i++) { 1430 if (h->dev[i] == added) { 1431 for (j = i; j < h->ndevices-1; j++) 1432 h->dev[j] = h->dev[j+1]; 1433 h->ndevices--; 1434 break; 1435 } 1436 } 1437 spin_unlock_irqrestore(&h->lock, flags); 1438 kfree(added); 1439 } 1440 1441 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1442 struct hpsa_scsi_dev_t *dev2) 1443 { 1444 /* we compare everything except lun and target as these 1445 * are not yet assigned. Compare parts likely 1446 * to differ first 1447 */ 1448 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1449 sizeof(dev1->scsi3addr)) != 0) 1450 return 0; 1451 if (memcmp(dev1->device_id, dev2->device_id, 1452 sizeof(dev1->device_id)) != 0) 1453 return 0; 1454 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1455 return 0; 1456 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1457 return 0; 1458 if (dev1->devtype != dev2->devtype) 1459 return 0; 1460 if (dev1->bus != dev2->bus) 1461 return 0; 1462 return 1; 1463 } 1464 1465 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1466 struct hpsa_scsi_dev_t *dev2) 1467 { 1468 /* Device attributes that can change, but don't mean 1469 * that the device is a different device, nor that the OS 1470 * needs to be told anything about the change. 1471 */ 1472 if (dev1->raid_level != dev2->raid_level) 1473 return 1; 1474 if (dev1->offload_config != dev2->offload_config) 1475 return 1; 1476 if (dev1->offload_enabled != dev2->offload_enabled) 1477 return 1; 1478 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1479 if (dev1->queue_depth != dev2->queue_depth) 1480 return 1; 1481 return 0; 1482 } 1483 1484 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1485 * and return needle location in *index. If scsi3addr matches, but not 1486 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1487 * location in *index. 1488 * In the case of a minor device attribute change, such as RAID level, just 1489 * return DEVICE_UPDATED, along with the updated device's location in index. 1490 * If needle not found, return DEVICE_NOT_FOUND. 1491 */ 1492 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1493 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1494 int *index) 1495 { 1496 int i; 1497 #define DEVICE_NOT_FOUND 0 1498 #define DEVICE_CHANGED 1 1499 #define DEVICE_SAME 2 1500 #define DEVICE_UPDATED 3 1501 if (needle == NULL) 1502 return DEVICE_NOT_FOUND; 1503 1504 for (i = 0; i < haystack_size; i++) { 1505 if (haystack[i] == NULL) /* previously removed. */ 1506 continue; 1507 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1508 *index = i; 1509 if (device_is_the_same(needle, haystack[i])) { 1510 if (device_updated(needle, haystack[i])) 1511 return DEVICE_UPDATED; 1512 return DEVICE_SAME; 1513 } else { 1514 /* Keep offline devices offline */ 1515 if (needle->volume_offline) 1516 return DEVICE_NOT_FOUND; 1517 return DEVICE_CHANGED; 1518 } 1519 } 1520 } 1521 *index = -1; 1522 return DEVICE_NOT_FOUND; 1523 } 1524 1525 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1526 unsigned char scsi3addr[]) 1527 { 1528 struct offline_device_entry *device; 1529 unsigned long flags; 1530 1531 /* Check to see if device is already on the list */ 1532 spin_lock_irqsave(&h->offline_device_lock, flags); 1533 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1534 if (memcmp(device->scsi3addr, scsi3addr, 1535 sizeof(device->scsi3addr)) == 0) { 1536 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1537 return; 1538 } 1539 } 1540 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1541 1542 /* Device is not on the list, add it. */ 1543 device = kmalloc(sizeof(*device), GFP_KERNEL); 1544 if (!device) { 1545 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 1546 return; 1547 } 1548 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1549 spin_lock_irqsave(&h->offline_device_lock, flags); 1550 list_add_tail(&device->offline_list, &h->offline_device_list); 1551 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1552 } 1553 1554 /* Print a message explaining various offline volume states */ 1555 static void hpsa_show_volume_status(struct ctlr_info *h, 1556 struct hpsa_scsi_dev_t *sd) 1557 { 1558 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1559 dev_info(&h->pdev->dev, 1560 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1561 h->scsi_host->host_no, 1562 sd->bus, sd->target, sd->lun); 1563 switch (sd->volume_offline) { 1564 case HPSA_LV_OK: 1565 break; 1566 case HPSA_LV_UNDERGOING_ERASE: 1567 dev_info(&h->pdev->dev, 1568 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1569 h->scsi_host->host_no, 1570 sd->bus, sd->target, sd->lun); 1571 break; 1572 case HPSA_LV_NOT_AVAILABLE: 1573 dev_info(&h->pdev->dev, 1574 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1575 h->scsi_host->host_no, 1576 sd->bus, sd->target, sd->lun); 1577 break; 1578 case HPSA_LV_UNDERGOING_RPI: 1579 dev_info(&h->pdev->dev, 1580 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1581 h->scsi_host->host_no, 1582 sd->bus, sd->target, sd->lun); 1583 break; 1584 case HPSA_LV_PENDING_RPI: 1585 dev_info(&h->pdev->dev, 1586 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1587 h->scsi_host->host_no, 1588 sd->bus, sd->target, sd->lun); 1589 break; 1590 case HPSA_LV_ENCRYPTED_NO_KEY: 1591 dev_info(&h->pdev->dev, 1592 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1593 h->scsi_host->host_no, 1594 sd->bus, sd->target, sd->lun); 1595 break; 1596 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1597 dev_info(&h->pdev->dev, 1598 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1599 h->scsi_host->host_no, 1600 sd->bus, sd->target, sd->lun); 1601 break; 1602 case HPSA_LV_UNDERGOING_ENCRYPTION: 1603 dev_info(&h->pdev->dev, 1604 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1605 h->scsi_host->host_no, 1606 sd->bus, sd->target, sd->lun); 1607 break; 1608 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1609 dev_info(&h->pdev->dev, 1610 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1611 h->scsi_host->host_no, 1612 sd->bus, sd->target, sd->lun); 1613 break; 1614 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1615 dev_info(&h->pdev->dev, 1616 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1617 h->scsi_host->host_no, 1618 sd->bus, sd->target, sd->lun); 1619 break; 1620 case HPSA_LV_PENDING_ENCRYPTION: 1621 dev_info(&h->pdev->dev, 1622 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1623 h->scsi_host->host_no, 1624 sd->bus, sd->target, sd->lun); 1625 break; 1626 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1627 dev_info(&h->pdev->dev, 1628 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1629 h->scsi_host->host_no, 1630 sd->bus, sd->target, sd->lun); 1631 break; 1632 } 1633 } 1634 1635 /* 1636 * Figure the list of physical drive pointers for a logical drive with 1637 * raid offload configured. 1638 */ 1639 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1640 struct hpsa_scsi_dev_t *dev[], int ndevices, 1641 struct hpsa_scsi_dev_t *logical_drive) 1642 { 1643 struct raid_map_data *map = &logical_drive->raid_map; 1644 struct raid_map_disk_data *dd = &map->data[0]; 1645 int i, j; 1646 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1647 le16_to_cpu(map->metadata_disks_per_row); 1648 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1649 le16_to_cpu(map->layout_map_count) * 1650 total_disks_per_row; 1651 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1652 total_disks_per_row; 1653 int qdepth; 1654 1655 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1656 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1657 1658 logical_drive->nphysical_disks = nraid_map_entries; 1659 1660 qdepth = 0; 1661 for (i = 0; i < nraid_map_entries; i++) { 1662 logical_drive->phys_disk[i] = NULL; 1663 if (!logical_drive->offload_config) 1664 continue; 1665 for (j = 0; j < ndevices; j++) { 1666 if (dev[j] == NULL) 1667 continue; 1668 if (dev[j]->devtype != TYPE_DISK && 1669 dev[j]->devtype != TYPE_ZBC) 1670 continue; 1671 if (is_logical_device(dev[j])) 1672 continue; 1673 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1674 continue; 1675 1676 logical_drive->phys_disk[i] = dev[j]; 1677 if (i < nphys_disk) 1678 qdepth = min(h->nr_cmds, qdepth + 1679 logical_drive->phys_disk[i]->queue_depth); 1680 break; 1681 } 1682 1683 /* 1684 * This can happen if a physical drive is removed and 1685 * the logical drive is degraded. In that case, the RAID 1686 * map data will refer to a physical disk which isn't actually 1687 * present. And in that case offload_enabled should already 1688 * be 0, but we'll turn it off here just in case 1689 */ 1690 if (!logical_drive->phys_disk[i]) { 1691 logical_drive->offload_enabled = 0; 1692 logical_drive->offload_to_be_enabled = 0; 1693 logical_drive->queue_depth = 8; 1694 } 1695 } 1696 if (nraid_map_entries) 1697 /* 1698 * This is correct for reads, too high for full stripe writes, 1699 * way too high for partial stripe writes 1700 */ 1701 logical_drive->queue_depth = qdepth; 1702 else 1703 logical_drive->queue_depth = h->nr_cmds; 1704 } 1705 1706 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1707 struct hpsa_scsi_dev_t *dev[], int ndevices) 1708 { 1709 int i; 1710 1711 for (i = 0; i < ndevices; i++) { 1712 if (dev[i] == NULL) 1713 continue; 1714 if (dev[i]->devtype != TYPE_DISK && 1715 dev[i]->devtype != TYPE_ZBC) 1716 continue; 1717 if (!is_logical_device(dev[i])) 1718 continue; 1719 1720 /* 1721 * If offload is currently enabled, the RAID map and 1722 * phys_disk[] assignment *better* not be changing 1723 * and since it isn't changing, we do not need to 1724 * update it. 1725 */ 1726 if (dev[i]->offload_enabled) 1727 continue; 1728 1729 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1730 } 1731 } 1732 1733 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1734 { 1735 int rc = 0; 1736 1737 if (!h->scsi_host) 1738 return 1; 1739 1740 if (is_logical_device(device)) /* RAID */ 1741 rc = scsi_add_device(h->scsi_host, device->bus, 1742 device->target, device->lun); 1743 else /* HBA */ 1744 rc = hpsa_add_sas_device(h->sas_host, device); 1745 1746 return rc; 1747 } 1748 1749 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1750 struct hpsa_scsi_dev_t *dev) 1751 { 1752 int i; 1753 int count = 0; 1754 1755 for (i = 0; i < h->nr_cmds; i++) { 1756 struct CommandList *c = h->cmd_pool + i; 1757 int refcount = atomic_inc_return(&c->refcount); 1758 1759 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1760 dev->scsi3addr)) { 1761 unsigned long flags; 1762 1763 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1764 if (!hpsa_is_cmd_idle(c)) 1765 ++count; 1766 spin_unlock_irqrestore(&h->lock, flags); 1767 } 1768 1769 cmd_free(h, c); 1770 } 1771 1772 return count; 1773 } 1774 1775 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1776 struct hpsa_scsi_dev_t *device) 1777 { 1778 int cmds = 0; 1779 int waits = 0; 1780 1781 while (1) { 1782 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1783 if (cmds == 0) 1784 break; 1785 if (++waits > 20) 1786 break; 1787 dev_warn(&h->pdev->dev, 1788 "%s: removing device with %d outstanding commands!\n", 1789 __func__, cmds); 1790 msleep(1000); 1791 } 1792 } 1793 1794 static void hpsa_remove_device(struct ctlr_info *h, 1795 struct hpsa_scsi_dev_t *device) 1796 { 1797 struct scsi_device *sdev = NULL; 1798 1799 if (!h->scsi_host) 1800 return; 1801 1802 if (is_logical_device(device)) { /* RAID */ 1803 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1804 device->target, device->lun); 1805 if (sdev) { 1806 scsi_remove_device(sdev); 1807 scsi_device_put(sdev); 1808 } else { 1809 /* 1810 * We don't expect to get here. Future commands 1811 * to this device will get a selection timeout as 1812 * if the device were gone. 1813 */ 1814 hpsa_show_dev_msg(KERN_WARNING, h, device, 1815 "didn't find device for removal."); 1816 } 1817 } else { /* HBA */ 1818 1819 device->removed = 1; 1820 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1821 1822 hpsa_remove_sas_device(device); 1823 } 1824 } 1825 1826 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1827 struct hpsa_scsi_dev_t *sd[], int nsds) 1828 { 1829 /* sd contains scsi3 addresses and devtypes, and inquiry 1830 * data. This function takes what's in sd to be the current 1831 * reality and updates h->dev[] to reflect that reality. 1832 */ 1833 int i, entry, device_change, changes = 0; 1834 struct hpsa_scsi_dev_t *csd; 1835 unsigned long flags; 1836 struct hpsa_scsi_dev_t **added, **removed; 1837 int nadded, nremoved; 1838 1839 /* 1840 * A reset can cause a device status to change 1841 * re-schedule the scan to see what happened. 1842 */ 1843 if (h->reset_in_progress) { 1844 h->drv_req_rescan = 1; 1845 return; 1846 } 1847 1848 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1849 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1850 1851 if (!added || !removed) { 1852 dev_warn(&h->pdev->dev, "out of memory in " 1853 "adjust_hpsa_scsi_table\n"); 1854 goto free_and_out; 1855 } 1856 1857 spin_lock_irqsave(&h->devlock, flags); 1858 1859 /* find any devices in h->dev[] that are not in 1860 * sd[] and remove them from h->dev[], and for any 1861 * devices which have changed, remove the old device 1862 * info and add the new device info. 1863 * If minor device attributes change, just update 1864 * the existing device structure. 1865 */ 1866 i = 0; 1867 nremoved = 0; 1868 nadded = 0; 1869 while (i < h->ndevices) { 1870 csd = h->dev[i]; 1871 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1872 if (device_change == DEVICE_NOT_FOUND) { 1873 changes++; 1874 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1875 continue; /* remove ^^^, hence i not incremented */ 1876 } else if (device_change == DEVICE_CHANGED) { 1877 changes++; 1878 hpsa_scsi_replace_entry(h, i, sd[entry], 1879 added, &nadded, removed, &nremoved); 1880 /* Set it to NULL to prevent it from being freed 1881 * at the bottom of hpsa_update_scsi_devices() 1882 */ 1883 sd[entry] = NULL; 1884 } else if (device_change == DEVICE_UPDATED) { 1885 hpsa_scsi_update_entry(h, i, sd[entry]); 1886 } 1887 i++; 1888 } 1889 1890 /* Now, make sure every device listed in sd[] is also 1891 * listed in h->dev[], adding them if they aren't found 1892 */ 1893 1894 for (i = 0; i < nsds; i++) { 1895 if (!sd[i]) /* if already added above. */ 1896 continue; 1897 1898 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1899 * as the SCSI mid-layer does not handle such devices well. 1900 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1901 * at 160Hz, and prevents the system from coming up. 1902 */ 1903 if (sd[i]->volume_offline) { 1904 hpsa_show_volume_status(h, sd[i]); 1905 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1906 continue; 1907 } 1908 1909 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1910 h->ndevices, &entry); 1911 if (device_change == DEVICE_NOT_FOUND) { 1912 changes++; 1913 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1914 break; 1915 sd[i] = NULL; /* prevent from being freed later. */ 1916 } else if (device_change == DEVICE_CHANGED) { 1917 /* should never happen... */ 1918 changes++; 1919 dev_warn(&h->pdev->dev, 1920 "device unexpectedly changed.\n"); 1921 /* but if it does happen, we just ignore that device */ 1922 } 1923 } 1924 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1925 1926 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1927 * any logical drives that need it enabled. 1928 */ 1929 for (i = 0; i < h->ndevices; i++) { 1930 if (h->dev[i] == NULL) 1931 continue; 1932 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1933 } 1934 1935 spin_unlock_irqrestore(&h->devlock, flags); 1936 1937 /* Monitor devices which are in one of several NOT READY states to be 1938 * brought online later. This must be done without holding h->devlock, 1939 * so don't touch h->dev[] 1940 */ 1941 for (i = 0; i < nsds; i++) { 1942 if (!sd[i]) /* if already added above. */ 1943 continue; 1944 if (sd[i]->volume_offline) 1945 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1946 } 1947 1948 /* Don't notify scsi mid layer of any changes the first time through 1949 * (or if there are no changes) scsi_scan_host will do it later the 1950 * first time through. 1951 */ 1952 if (!changes) 1953 goto free_and_out; 1954 1955 /* Notify scsi mid layer of any removed devices */ 1956 for (i = 0; i < nremoved; i++) { 1957 if (removed[i] == NULL) 1958 continue; 1959 if (removed[i]->expose_device) 1960 hpsa_remove_device(h, removed[i]); 1961 kfree(removed[i]); 1962 removed[i] = NULL; 1963 } 1964 1965 /* Notify scsi mid layer of any added devices */ 1966 for (i = 0; i < nadded; i++) { 1967 int rc = 0; 1968 1969 if (added[i] == NULL) 1970 continue; 1971 if (!(added[i]->expose_device)) 1972 continue; 1973 rc = hpsa_add_device(h, added[i]); 1974 if (!rc) 1975 continue; 1976 dev_warn(&h->pdev->dev, 1977 "addition failed %d, device not added.", rc); 1978 /* now we have to remove it from h->dev, 1979 * since it didn't get added to scsi mid layer 1980 */ 1981 fixup_botched_add(h, added[i]); 1982 h->drv_req_rescan = 1; 1983 } 1984 1985 free_and_out: 1986 kfree(added); 1987 kfree(removed); 1988 } 1989 1990 /* 1991 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1992 * Assume's h->devlock is held. 1993 */ 1994 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1995 int bus, int target, int lun) 1996 { 1997 int i; 1998 struct hpsa_scsi_dev_t *sd; 1999 2000 for (i = 0; i < h->ndevices; i++) { 2001 sd = h->dev[i]; 2002 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2003 return sd; 2004 } 2005 return NULL; 2006 } 2007 2008 static int hpsa_slave_alloc(struct scsi_device *sdev) 2009 { 2010 struct hpsa_scsi_dev_t *sd; 2011 unsigned long flags; 2012 struct ctlr_info *h; 2013 2014 h = sdev_to_hba(sdev); 2015 spin_lock_irqsave(&h->devlock, flags); 2016 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2017 struct scsi_target *starget; 2018 struct sas_rphy *rphy; 2019 2020 starget = scsi_target(sdev); 2021 rphy = target_to_rphy(starget); 2022 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2023 if (sd) { 2024 sd->target = sdev_id(sdev); 2025 sd->lun = sdev->lun; 2026 } 2027 } else 2028 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2029 sdev_id(sdev), sdev->lun); 2030 2031 if (sd && sd->expose_device) { 2032 atomic_set(&sd->ioaccel_cmds_out, 0); 2033 sdev->hostdata = sd; 2034 } else 2035 sdev->hostdata = NULL; 2036 spin_unlock_irqrestore(&h->devlock, flags); 2037 return 0; 2038 } 2039 2040 /* configure scsi device based on internal per-device structure */ 2041 static int hpsa_slave_configure(struct scsi_device *sdev) 2042 { 2043 struct hpsa_scsi_dev_t *sd; 2044 int queue_depth; 2045 2046 sd = sdev->hostdata; 2047 sdev->no_uld_attach = !sd || !sd->expose_device; 2048 2049 if (sd) 2050 queue_depth = sd->queue_depth != 0 ? 2051 sd->queue_depth : sdev->host->can_queue; 2052 else 2053 queue_depth = sdev->host->can_queue; 2054 2055 scsi_change_queue_depth(sdev, queue_depth); 2056 2057 return 0; 2058 } 2059 2060 static void hpsa_slave_destroy(struct scsi_device *sdev) 2061 { 2062 /* nothing to do. */ 2063 } 2064 2065 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2066 { 2067 int i; 2068 2069 if (!h->ioaccel2_cmd_sg_list) 2070 return; 2071 for (i = 0; i < h->nr_cmds; i++) { 2072 kfree(h->ioaccel2_cmd_sg_list[i]); 2073 h->ioaccel2_cmd_sg_list[i] = NULL; 2074 } 2075 kfree(h->ioaccel2_cmd_sg_list); 2076 h->ioaccel2_cmd_sg_list = NULL; 2077 } 2078 2079 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2080 { 2081 int i; 2082 2083 if (h->chainsize <= 0) 2084 return 0; 2085 2086 h->ioaccel2_cmd_sg_list = 2087 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2088 GFP_KERNEL); 2089 if (!h->ioaccel2_cmd_sg_list) 2090 return -ENOMEM; 2091 for (i = 0; i < h->nr_cmds; i++) { 2092 h->ioaccel2_cmd_sg_list[i] = 2093 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2094 h->maxsgentries, GFP_KERNEL); 2095 if (!h->ioaccel2_cmd_sg_list[i]) 2096 goto clean; 2097 } 2098 return 0; 2099 2100 clean: 2101 hpsa_free_ioaccel2_sg_chain_blocks(h); 2102 return -ENOMEM; 2103 } 2104 2105 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2106 { 2107 int i; 2108 2109 if (!h->cmd_sg_list) 2110 return; 2111 for (i = 0; i < h->nr_cmds; i++) { 2112 kfree(h->cmd_sg_list[i]); 2113 h->cmd_sg_list[i] = NULL; 2114 } 2115 kfree(h->cmd_sg_list); 2116 h->cmd_sg_list = NULL; 2117 } 2118 2119 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2120 { 2121 int i; 2122 2123 if (h->chainsize <= 0) 2124 return 0; 2125 2126 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2127 GFP_KERNEL); 2128 if (!h->cmd_sg_list) { 2129 dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 2130 return -ENOMEM; 2131 } 2132 for (i = 0; i < h->nr_cmds; i++) { 2133 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2134 h->chainsize, GFP_KERNEL); 2135 if (!h->cmd_sg_list[i]) { 2136 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 2137 goto clean; 2138 } 2139 } 2140 return 0; 2141 2142 clean: 2143 hpsa_free_sg_chain_blocks(h); 2144 return -ENOMEM; 2145 } 2146 2147 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2148 struct io_accel2_cmd *cp, struct CommandList *c) 2149 { 2150 struct ioaccel2_sg_element *chain_block; 2151 u64 temp64; 2152 u32 chain_size; 2153 2154 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2155 chain_size = le32_to_cpu(cp->sg[0].length); 2156 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2157 PCI_DMA_TODEVICE); 2158 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2159 /* prevent subsequent unmapping */ 2160 cp->sg->address = 0; 2161 return -1; 2162 } 2163 cp->sg->address = cpu_to_le64(temp64); 2164 return 0; 2165 } 2166 2167 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2168 struct io_accel2_cmd *cp) 2169 { 2170 struct ioaccel2_sg_element *chain_sg; 2171 u64 temp64; 2172 u32 chain_size; 2173 2174 chain_sg = cp->sg; 2175 temp64 = le64_to_cpu(chain_sg->address); 2176 chain_size = le32_to_cpu(cp->sg[0].length); 2177 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2178 } 2179 2180 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2181 struct CommandList *c) 2182 { 2183 struct SGDescriptor *chain_sg, *chain_block; 2184 u64 temp64; 2185 u32 chain_len; 2186 2187 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2188 chain_block = h->cmd_sg_list[c->cmdindex]; 2189 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2190 chain_len = sizeof(*chain_sg) * 2191 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2192 chain_sg->Len = cpu_to_le32(chain_len); 2193 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2194 PCI_DMA_TODEVICE); 2195 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2196 /* prevent subsequent unmapping */ 2197 chain_sg->Addr = cpu_to_le64(0); 2198 return -1; 2199 } 2200 chain_sg->Addr = cpu_to_le64(temp64); 2201 return 0; 2202 } 2203 2204 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2205 struct CommandList *c) 2206 { 2207 struct SGDescriptor *chain_sg; 2208 2209 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2210 return; 2211 2212 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2213 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2214 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2215 } 2216 2217 2218 /* Decode the various types of errors on ioaccel2 path. 2219 * Return 1 for any error that should generate a RAID path retry. 2220 * Return 0 for errors that don't require a RAID path retry. 2221 */ 2222 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2223 struct CommandList *c, 2224 struct scsi_cmnd *cmd, 2225 struct io_accel2_cmd *c2, 2226 struct hpsa_scsi_dev_t *dev) 2227 { 2228 int data_len; 2229 int retry = 0; 2230 u32 ioaccel2_resid = 0; 2231 2232 switch (c2->error_data.serv_response) { 2233 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2234 switch (c2->error_data.status) { 2235 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2236 break; 2237 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2238 cmd->result |= SAM_STAT_CHECK_CONDITION; 2239 if (c2->error_data.data_present != 2240 IOACCEL2_SENSE_DATA_PRESENT) { 2241 memset(cmd->sense_buffer, 0, 2242 SCSI_SENSE_BUFFERSIZE); 2243 break; 2244 } 2245 /* copy the sense data */ 2246 data_len = c2->error_data.sense_data_len; 2247 if (data_len > SCSI_SENSE_BUFFERSIZE) 2248 data_len = SCSI_SENSE_BUFFERSIZE; 2249 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2250 data_len = 2251 sizeof(c2->error_data.sense_data_buff); 2252 memcpy(cmd->sense_buffer, 2253 c2->error_data.sense_data_buff, data_len); 2254 retry = 1; 2255 break; 2256 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2257 retry = 1; 2258 break; 2259 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2260 retry = 1; 2261 break; 2262 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2263 retry = 1; 2264 break; 2265 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2266 retry = 1; 2267 break; 2268 default: 2269 retry = 1; 2270 break; 2271 } 2272 break; 2273 case IOACCEL2_SERV_RESPONSE_FAILURE: 2274 switch (c2->error_data.status) { 2275 case IOACCEL2_STATUS_SR_IO_ERROR: 2276 case IOACCEL2_STATUS_SR_IO_ABORTED: 2277 case IOACCEL2_STATUS_SR_OVERRUN: 2278 retry = 1; 2279 break; 2280 case IOACCEL2_STATUS_SR_UNDERRUN: 2281 cmd->result = (DID_OK << 16); /* host byte */ 2282 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2283 ioaccel2_resid = get_unaligned_le32( 2284 &c2->error_data.resid_cnt[0]); 2285 scsi_set_resid(cmd, ioaccel2_resid); 2286 break; 2287 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2288 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2289 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2290 /* 2291 * Did an HBA disk disappear? We will eventually 2292 * get a state change event from the controller but 2293 * in the meantime, we need to tell the OS that the 2294 * HBA disk is no longer there and stop I/O 2295 * from going down. This allows the potential re-insert 2296 * of the disk to get the same device node. 2297 */ 2298 if (dev->physical_device && dev->expose_device) { 2299 cmd->result = DID_NO_CONNECT << 16; 2300 dev->removed = 1; 2301 h->drv_req_rescan = 1; 2302 dev_warn(&h->pdev->dev, 2303 "%s: device is gone!\n", __func__); 2304 } else 2305 /* 2306 * Retry by sending down the RAID path. 2307 * We will get an event from ctlr to 2308 * trigger rescan regardless. 2309 */ 2310 retry = 1; 2311 break; 2312 default: 2313 retry = 1; 2314 } 2315 break; 2316 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2317 break; 2318 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2319 break; 2320 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2321 retry = 1; 2322 break; 2323 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2324 break; 2325 default: 2326 retry = 1; 2327 break; 2328 } 2329 2330 return retry; /* retry on raid path? */ 2331 } 2332 2333 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2334 struct CommandList *c) 2335 { 2336 bool do_wake = false; 2337 2338 /* 2339 * Prevent the following race in the abort handler: 2340 * 2341 * 1. LLD is requested to abort a SCSI command 2342 * 2. The SCSI command completes 2343 * 3. The struct CommandList associated with step 2 is made available 2344 * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2345 * 5. Abort handler follows scsi_cmnd->host_scribble and 2346 * finds struct CommandList and tries to aborts it 2347 * Now we have aborted the wrong command. 2348 * 2349 * Reset c->scsi_cmd here so that the abort or reset handler will know 2350 * this command has completed. Then, check to see if the handler is 2351 * waiting for this command, and, if so, wake it. 2352 */ 2353 c->scsi_cmd = SCSI_CMD_IDLE; 2354 mb(); /* Declare command idle before checking for pending events. */ 2355 if (c->abort_pending) { 2356 do_wake = true; 2357 c->abort_pending = false; 2358 } 2359 if (c->reset_pending) { 2360 unsigned long flags; 2361 struct hpsa_scsi_dev_t *dev; 2362 2363 /* 2364 * There appears to be a reset pending; lock the lock and 2365 * reconfirm. If so, then decrement the count of outstanding 2366 * commands and wake the reset command if this is the last one. 2367 */ 2368 spin_lock_irqsave(&h->lock, flags); 2369 dev = c->reset_pending; /* Re-fetch under the lock. */ 2370 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2371 do_wake = true; 2372 c->reset_pending = NULL; 2373 spin_unlock_irqrestore(&h->lock, flags); 2374 } 2375 2376 if (do_wake) 2377 wake_up_all(&h->event_sync_wait_queue); 2378 } 2379 2380 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2381 struct CommandList *c) 2382 { 2383 hpsa_cmd_resolve_events(h, c); 2384 cmd_tagged_free(h, c); 2385 } 2386 2387 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2388 struct CommandList *c, struct scsi_cmnd *cmd) 2389 { 2390 hpsa_cmd_resolve_and_free(h, c); 2391 cmd->scsi_done(cmd); 2392 } 2393 2394 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2395 { 2396 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2397 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2398 } 2399 2400 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2401 { 2402 cmd->result = DID_ABORT << 16; 2403 } 2404 2405 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2406 struct scsi_cmnd *cmd) 2407 { 2408 hpsa_set_scsi_cmd_aborted(cmd); 2409 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2410 c->Request.CDB, c->err_info->ScsiStatus); 2411 hpsa_cmd_resolve_and_free(h, c); 2412 } 2413 2414 static void process_ioaccel2_completion(struct ctlr_info *h, 2415 struct CommandList *c, struct scsi_cmnd *cmd, 2416 struct hpsa_scsi_dev_t *dev) 2417 { 2418 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2419 2420 /* check for good status */ 2421 if (likely(c2->error_data.serv_response == 0 && 2422 c2->error_data.status == 0)) 2423 return hpsa_cmd_free_and_done(h, c, cmd); 2424 2425 /* 2426 * Any RAID offload error results in retry which will use 2427 * the normal I/O path so the controller can handle whatever's 2428 * wrong. 2429 */ 2430 if (is_logical_device(dev) && 2431 c2->error_data.serv_response == 2432 IOACCEL2_SERV_RESPONSE_FAILURE) { 2433 if (c2->error_data.status == 2434 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2435 dev->offload_enabled = 0; 2436 dev->offload_to_be_enabled = 0; 2437 } 2438 2439 return hpsa_retry_cmd(h, c); 2440 } 2441 2442 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2443 return hpsa_retry_cmd(h, c); 2444 2445 return hpsa_cmd_free_and_done(h, c, cmd); 2446 } 2447 2448 /* Returns 0 on success, < 0 otherwise. */ 2449 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2450 struct CommandList *cp) 2451 { 2452 u8 tmf_status = cp->err_info->ScsiStatus; 2453 2454 switch (tmf_status) { 2455 case CISS_TMF_COMPLETE: 2456 /* 2457 * CISS_TMF_COMPLETE never happens, instead, 2458 * ei->CommandStatus == 0 for this case. 2459 */ 2460 case CISS_TMF_SUCCESS: 2461 return 0; 2462 case CISS_TMF_INVALID_FRAME: 2463 case CISS_TMF_NOT_SUPPORTED: 2464 case CISS_TMF_FAILED: 2465 case CISS_TMF_WRONG_LUN: 2466 case CISS_TMF_OVERLAPPED_TAG: 2467 break; 2468 default: 2469 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2470 tmf_status); 2471 break; 2472 } 2473 return -tmf_status; 2474 } 2475 2476 static void complete_scsi_command(struct CommandList *cp) 2477 { 2478 struct scsi_cmnd *cmd; 2479 struct ctlr_info *h; 2480 struct ErrorInfo *ei; 2481 struct hpsa_scsi_dev_t *dev; 2482 struct io_accel2_cmd *c2; 2483 2484 u8 sense_key; 2485 u8 asc; /* additional sense code */ 2486 u8 ascq; /* additional sense code qualifier */ 2487 unsigned long sense_data_size; 2488 2489 ei = cp->err_info; 2490 cmd = cp->scsi_cmd; 2491 h = cp->h; 2492 dev = cmd->device->hostdata; 2493 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2494 2495 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2496 if ((cp->cmd_type == CMD_SCSI) && 2497 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2498 hpsa_unmap_sg_chain_block(h, cp); 2499 2500 if ((cp->cmd_type == CMD_IOACCEL2) && 2501 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2502 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2503 2504 cmd->result = (DID_OK << 16); /* host byte */ 2505 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2506 2507 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 2508 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2509 2510 /* 2511 * We check for lockup status here as it may be set for 2512 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2513 * fail_all_oustanding_cmds() 2514 */ 2515 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2516 /* DID_NO_CONNECT will prevent a retry */ 2517 cmd->result = DID_NO_CONNECT << 16; 2518 return hpsa_cmd_free_and_done(h, cp, cmd); 2519 } 2520 2521 if ((unlikely(hpsa_is_pending_event(cp)))) { 2522 if (cp->reset_pending) 2523 return hpsa_cmd_resolve_and_free(h, cp); 2524 if (cp->abort_pending) 2525 return hpsa_cmd_abort_and_free(h, cp, cmd); 2526 } 2527 2528 if (cp->cmd_type == CMD_IOACCEL2) 2529 return process_ioaccel2_completion(h, cp, cmd, dev); 2530 2531 scsi_set_resid(cmd, ei->ResidualCnt); 2532 if (ei->CommandStatus == 0) 2533 return hpsa_cmd_free_and_done(h, cp, cmd); 2534 2535 /* For I/O accelerator commands, copy over some fields to the normal 2536 * CISS header used below for error handling. 2537 */ 2538 if (cp->cmd_type == CMD_IOACCEL1) { 2539 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2540 cp->Header.SGList = scsi_sg_count(cmd); 2541 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2542 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2543 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2544 cp->Header.tag = c->tag; 2545 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2546 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2547 2548 /* Any RAID offload error results in retry which will use 2549 * the normal I/O path so the controller can handle whatever's 2550 * wrong. 2551 */ 2552 if (is_logical_device(dev)) { 2553 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2554 dev->offload_enabled = 0; 2555 return hpsa_retry_cmd(h, cp); 2556 } 2557 } 2558 2559 /* an error has occurred */ 2560 switch (ei->CommandStatus) { 2561 2562 case CMD_TARGET_STATUS: 2563 cmd->result |= ei->ScsiStatus; 2564 /* copy the sense data */ 2565 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2566 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2567 else 2568 sense_data_size = sizeof(ei->SenseInfo); 2569 if (ei->SenseLen < sense_data_size) 2570 sense_data_size = ei->SenseLen; 2571 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2572 if (ei->ScsiStatus) 2573 decode_sense_data(ei->SenseInfo, sense_data_size, 2574 &sense_key, &asc, &ascq); 2575 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2576 if (sense_key == ABORTED_COMMAND) { 2577 cmd->result |= DID_SOFT_ERROR << 16; 2578 break; 2579 } 2580 break; 2581 } 2582 /* Problem was not a check condition 2583 * Pass it up to the upper layers... 2584 */ 2585 if (ei->ScsiStatus) { 2586 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2587 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2588 "Returning result: 0x%x\n", 2589 cp, ei->ScsiStatus, 2590 sense_key, asc, ascq, 2591 cmd->result); 2592 } else { /* scsi status is zero??? How??? */ 2593 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2594 "Returning no connection.\n", cp), 2595 2596 /* Ordinarily, this case should never happen, 2597 * but there is a bug in some released firmware 2598 * revisions that allows it to happen if, for 2599 * example, a 4100 backplane loses power and 2600 * the tape drive is in it. We assume that 2601 * it's a fatal error of some kind because we 2602 * can't show that it wasn't. We will make it 2603 * look like selection timeout since that is 2604 * the most common reason for this to occur, 2605 * and it's severe enough. 2606 */ 2607 2608 cmd->result = DID_NO_CONNECT << 16; 2609 } 2610 break; 2611 2612 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2613 break; 2614 case CMD_DATA_OVERRUN: 2615 dev_warn(&h->pdev->dev, 2616 "CDB %16phN data overrun\n", cp->Request.CDB); 2617 break; 2618 case CMD_INVALID: { 2619 /* print_bytes(cp, sizeof(*cp), 1, 0); 2620 print_cmd(cp); */ 2621 /* We get CMD_INVALID if you address a non-existent device 2622 * instead of a selection timeout (no response). You will 2623 * see this if you yank out a drive, then try to access it. 2624 * This is kind of a shame because it means that any other 2625 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2626 * missing target. */ 2627 cmd->result = DID_NO_CONNECT << 16; 2628 } 2629 break; 2630 case CMD_PROTOCOL_ERR: 2631 cmd->result = DID_ERROR << 16; 2632 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2633 cp->Request.CDB); 2634 break; 2635 case CMD_HARDWARE_ERR: 2636 cmd->result = DID_ERROR << 16; 2637 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2638 cp->Request.CDB); 2639 break; 2640 case CMD_CONNECTION_LOST: 2641 cmd->result = DID_ERROR << 16; 2642 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2643 cp->Request.CDB); 2644 break; 2645 case CMD_ABORTED: 2646 /* Return now to avoid calling scsi_done(). */ 2647 return hpsa_cmd_abort_and_free(h, cp, cmd); 2648 case CMD_ABORT_FAILED: 2649 cmd->result = DID_ERROR << 16; 2650 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2651 cp->Request.CDB); 2652 break; 2653 case CMD_UNSOLICITED_ABORT: 2654 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2655 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2656 cp->Request.CDB); 2657 break; 2658 case CMD_TIMEOUT: 2659 cmd->result = DID_TIME_OUT << 16; 2660 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2661 cp->Request.CDB); 2662 break; 2663 case CMD_UNABORTABLE: 2664 cmd->result = DID_ERROR << 16; 2665 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2666 break; 2667 case CMD_TMF_STATUS: 2668 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2669 cmd->result = DID_ERROR << 16; 2670 break; 2671 case CMD_IOACCEL_DISABLED: 2672 /* This only handles the direct pass-through case since RAID 2673 * offload is handled above. Just attempt a retry. 2674 */ 2675 cmd->result = DID_SOFT_ERROR << 16; 2676 dev_warn(&h->pdev->dev, 2677 "cp %p had HP SSD Smart Path error\n", cp); 2678 break; 2679 default: 2680 cmd->result = DID_ERROR << 16; 2681 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2682 cp, ei->CommandStatus); 2683 } 2684 2685 return hpsa_cmd_free_and_done(h, cp, cmd); 2686 } 2687 2688 static void hpsa_pci_unmap(struct pci_dev *pdev, 2689 struct CommandList *c, int sg_used, int data_direction) 2690 { 2691 int i; 2692 2693 for (i = 0; i < sg_used; i++) 2694 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2695 le32_to_cpu(c->SG[i].Len), 2696 data_direction); 2697 } 2698 2699 static int hpsa_map_one(struct pci_dev *pdev, 2700 struct CommandList *cp, 2701 unsigned char *buf, 2702 size_t buflen, 2703 int data_direction) 2704 { 2705 u64 addr64; 2706 2707 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2708 cp->Header.SGList = 0; 2709 cp->Header.SGTotal = cpu_to_le16(0); 2710 return 0; 2711 } 2712 2713 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2714 if (dma_mapping_error(&pdev->dev, addr64)) { 2715 /* Prevent subsequent unmap of something never mapped */ 2716 cp->Header.SGList = 0; 2717 cp->Header.SGTotal = cpu_to_le16(0); 2718 return -1; 2719 } 2720 cp->SG[0].Addr = cpu_to_le64(addr64); 2721 cp->SG[0].Len = cpu_to_le32(buflen); 2722 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2723 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2724 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2725 return 0; 2726 } 2727 2728 #define NO_TIMEOUT ((unsigned long) -1) 2729 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2730 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2731 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2732 { 2733 DECLARE_COMPLETION_ONSTACK(wait); 2734 2735 c->waiting = &wait; 2736 __enqueue_cmd_and_start_io(h, c, reply_queue); 2737 if (timeout_msecs == NO_TIMEOUT) { 2738 /* TODO: get rid of this no-timeout thing */ 2739 wait_for_completion_io(&wait); 2740 return IO_OK; 2741 } 2742 if (!wait_for_completion_io_timeout(&wait, 2743 msecs_to_jiffies(timeout_msecs))) { 2744 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2745 return -ETIMEDOUT; 2746 } 2747 return IO_OK; 2748 } 2749 2750 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2751 int reply_queue, unsigned long timeout_msecs) 2752 { 2753 if (unlikely(lockup_detected(h))) { 2754 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2755 return IO_OK; 2756 } 2757 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2758 } 2759 2760 static u32 lockup_detected(struct ctlr_info *h) 2761 { 2762 int cpu; 2763 u32 rc, *lockup_detected; 2764 2765 cpu = get_cpu(); 2766 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2767 rc = *lockup_detected; 2768 put_cpu(); 2769 return rc; 2770 } 2771 2772 #define MAX_DRIVER_CMD_RETRIES 25 2773 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2774 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2775 { 2776 int backoff_time = 10, retry_count = 0; 2777 int rc; 2778 2779 do { 2780 memset(c->err_info, 0, sizeof(*c->err_info)); 2781 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2782 timeout_msecs); 2783 if (rc) 2784 break; 2785 retry_count++; 2786 if (retry_count > 3) { 2787 msleep(backoff_time); 2788 if (backoff_time < 1000) 2789 backoff_time *= 2; 2790 } 2791 } while ((check_for_unit_attention(h, c) || 2792 check_for_busy(h, c)) && 2793 retry_count <= MAX_DRIVER_CMD_RETRIES); 2794 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2795 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2796 rc = -EIO; 2797 return rc; 2798 } 2799 2800 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2801 struct CommandList *c) 2802 { 2803 const u8 *cdb = c->Request.CDB; 2804 const u8 *lun = c->Header.LUN.LunAddrBytes; 2805 2806 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2807 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2808 txt, lun[0], lun[1], lun[2], lun[3], 2809 lun[4], lun[5], lun[6], lun[7], 2810 cdb[0], cdb[1], cdb[2], cdb[3], 2811 cdb[4], cdb[5], cdb[6], cdb[7], 2812 cdb[8], cdb[9], cdb[10], cdb[11], 2813 cdb[12], cdb[13], cdb[14], cdb[15]); 2814 } 2815 2816 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2817 struct CommandList *cp) 2818 { 2819 const struct ErrorInfo *ei = cp->err_info; 2820 struct device *d = &cp->h->pdev->dev; 2821 u8 sense_key, asc, ascq; 2822 int sense_len; 2823 2824 switch (ei->CommandStatus) { 2825 case CMD_TARGET_STATUS: 2826 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2827 sense_len = sizeof(ei->SenseInfo); 2828 else 2829 sense_len = ei->SenseLen; 2830 decode_sense_data(ei->SenseInfo, sense_len, 2831 &sense_key, &asc, &ascq); 2832 hpsa_print_cmd(h, "SCSI status", cp); 2833 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2834 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2835 sense_key, asc, ascq); 2836 else 2837 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2838 if (ei->ScsiStatus == 0) 2839 dev_warn(d, "SCSI status is abnormally zero. " 2840 "(probably indicates selection timeout " 2841 "reported incorrectly due to a known " 2842 "firmware bug, circa July, 2001.)\n"); 2843 break; 2844 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2845 break; 2846 case CMD_DATA_OVERRUN: 2847 hpsa_print_cmd(h, "overrun condition", cp); 2848 break; 2849 case CMD_INVALID: { 2850 /* controller unfortunately reports SCSI passthru's 2851 * to non-existent targets as invalid commands. 2852 */ 2853 hpsa_print_cmd(h, "invalid command", cp); 2854 dev_warn(d, "probably means device no longer present\n"); 2855 } 2856 break; 2857 case CMD_PROTOCOL_ERR: 2858 hpsa_print_cmd(h, "protocol error", cp); 2859 break; 2860 case CMD_HARDWARE_ERR: 2861 hpsa_print_cmd(h, "hardware error", cp); 2862 break; 2863 case CMD_CONNECTION_LOST: 2864 hpsa_print_cmd(h, "connection lost", cp); 2865 break; 2866 case CMD_ABORTED: 2867 hpsa_print_cmd(h, "aborted", cp); 2868 break; 2869 case CMD_ABORT_FAILED: 2870 hpsa_print_cmd(h, "abort failed", cp); 2871 break; 2872 case CMD_UNSOLICITED_ABORT: 2873 hpsa_print_cmd(h, "unsolicited abort", cp); 2874 break; 2875 case CMD_TIMEOUT: 2876 hpsa_print_cmd(h, "timed out", cp); 2877 break; 2878 case CMD_UNABORTABLE: 2879 hpsa_print_cmd(h, "unabortable", cp); 2880 break; 2881 case CMD_CTLR_LOCKUP: 2882 hpsa_print_cmd(h, "controller lockup detected", cp); 2883 break; 2884 default: 2885 hpsa_print_cmd(h, "unknown status", cp); 2886 dev_warn(d, "Unknown command status %x\n", 2887 ei->CommandStatus); 2888 } 2889 } 2890 2891 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2892 u16 page, unsigned char *buf, 2893 unsigned char bufsize) 2894 { 2895 int rc = IO_OK; 2896 struct CommandList *c; 2897 struct ErrorInfo *ei; 2898 2899 c = cmd_alloc(h); 2900 2901 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2902 page, scsi3addr, TYPE_CMD)) { 2903 rc = -1; 2904 goto out; 2905 } 2906 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2907 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2908 if (rc) 2909 goto out; 2910 ei = c->err_info; 2911 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2912 hpsa_scsi_interpret_error(h, c); 2913 rc = -1; 2914 } 2915 out: 2916 cmd_free(h, c); 2917 return rc; 2918 } 2919 2920 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2921 u8 reset_type, int reply_queue) 2922 { 2923 int rc = IO_OK; 2924 struct CommandList *c; 2925 struct ErrorInfo *ei; 2926 2927 c = cmd_alloc(h); 2928 2929 2930 /* fill_cmd can't fail here, no data buffer to map. */ 2931 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2932 scsi3addr, TYPE_MSG); 2933 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 2934 if (rc) { 2935 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2936 goto out; 2937 } 2938 /* no unmap needed here because no data xfer. */ 2939 2940 ei = c->err_info; 2941 if (ei->CommandStatus != 0) { 2942 hpsa_scsi_interpret_error(h, c); 2943 rc = -1; 2944 } 2945 out: 2946 cmd_free(h, c); 2947 return rc; 2948 } 2949 2950 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2951 struct hpsa_scsi_dev_t *dev, 2952 unsigned char *scsi3addr) 2953 { 2954 int i; 2955 bool match = false; 2956 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2957 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2958 2959 if (hpsa_is_cmd_idle(c)) 2960 return false; 2961 2962 switch (c->cmd_type) { 2963 case CMD_SCSI: 2964 case CMD_IOCTL_PEND: 2965 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2966 sizeof(c->Header.LUN.LunAddrBytes)); 2967 break; 2968 2969 case CMD_IOACCEL1: 2970 case CMD_IOACCEL2: 2971 if (c->phys_disk == dev) { 2972 /* HBA mode match */ 2973 match = true; 2974 } else { 2975 /* Possible RAID mode -- check each phys dev. */ 2976 /* FIXME: Do we need to take out a lock here? If 2977 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2978 * instead. */ 2979 for (i = 0; i < dev->nphysical_disks && !match; i++) { 2980 /* FIXME: an alternate test might be 2981 * 2982 * match = dev->phys_disk[i]->ioaccel_handle 2983 * == c2->scsi_nexus; */ 2984 match = dev->phys_disk[i] == c->phys_disk; 2985 } 2986 } 2987 break; 2988 2989 case IOACCEL2_TMF: 2990 for (i = 0; i < dev->nphysical_disks && !match; i++) { 2991 match = dev->phys_disk[i]->ioaccel_handle == 2992 le32_to_cpu(ac->it_nexus); 2993 } 2994 break; 2995 2996 case 0: /* The command is in the middle of being initialized. */ 2997 match = false; 2998 break; 2999 3000 default: 3001 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3002 c->cmd_type); 3003 BUG(); 3004 } 3005 3006 return match; 3007 } 3008 3009 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3010 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3011 { 3012 int i; 3013 int rc = 0; 3014 3015 /* We can really only handle one reset at a time */ 3016 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3017 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3018 return -EINTR; 3019 } 3020 3021 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3022 3023 for (i = 0; i < h->nr_cmds; i++) { 3024 struct CommandList *c = h->cmd_pool + i; 3025 int refcount = atomic_inc_return(&c->refcount); 3026 3027 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3028 unsigned long flags; 3029 3030 /* 3031 * Mark the target command as having a reset pending, 3032 * then lock a lock so that the command cannot complete 3033 * while we're considering it. If the command is not 3034 * idle then count it; otherwise revoke the event. 3035 */ 3036 c->reset_pending = dev; 3037 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3038 if (!hpsa_is_cmd_idle(c)) 3039 atomic_inc(&dev->reset_cmds_out); 3040 else 3041 c->reset_pending = NULL; 3042 spin_unlock_irqrestore(&h->lock, flags); 3043 } 3044 3045 cmd_free(h, c); 3046 } 3047 3048 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3049 if (!rc) 3050 wait_event(h->event_sync_wait_queue, 3051 atomic_read(&dev->reset_cmds_out) == 0 || 3052 lockup_detected(h)); 3053 3054 if (unlikely(lockup_detected(h))) { 3055 dev_warn(&h->pdev->dev, 3056 "Controller lockup detected during reset wait\n"); 3057 rc = -ENODEV; 3058 } 3059 3060 if (unlikely(rc)) 3061 atomic_set(&dev->reset_cmds_out, 0); 3062 3063 mutex_unlock(&h->reset_mutex); 3064 return rc; 3065 } 3066 3067 static void hpsa_get_raid_level(struct ctlr_info *h, 3068 unsigned char *scsi3addr, unsigned char *raid_level) 3069 { 3070 int rc; 3071 unsigned char *buf; 3072 3073 *raid_level = RAID_UNKNOWN; 3074 buf = kzalloc(64, GFP_KERNEL); 3075 if (!buf) 3076 return; 3077 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 3078 if (rc == 0) 3079 *raid_level = buf[8]; 3080 if (*raid_level > RAID_UNKNOWN) 3081 *raid_level = RAID_UNKNOWN; 3082 kfree(buf); 3083 return; 3084 } 3085 3086 #define HPSA_MAP_DEBUG 3087 #ifdef HPSA_MAP_DEBUG 3088 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3089 struct raid_map_data *map_buff) 3090 { 3091 struct raid_map_disk_data *dd = &map_buff->data[0]; 3092 int map, row, col; 3093 u16 map_cnt, row_cnt, disks_per_row; 3094 3095 if (rc != 0) 3096 return; 3097 3098 /* Show details only if debugging has been activated. */ 3099 if (h->raid_offload_debug < 2) 3100 return; 3101 3102 dev_info(&h->pdev->dev, "structure_size = %u\n", 3103 le32_to_cpu(map_buff->structure_size)); 3104 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3105 le32_to_cpu(map_buff->volume_blk_size)); 3106 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3107 le64_to_cpu(map_buff->volume_blk_cnt)); 3108 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3109 map_buff->phys_blk_shift); 3110 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3111 map_buff->parity_rotation_shift); 3112 dev_info(&h->pdev->dev, "strip_size = %u\n", 3113 le16_to_cpu(map_buff->strip_size)); 3114 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3115 le64_to_cpu(map_buff->disk_starting_blk)); 3116 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3117 le64_to_cpu(map_buff->disk_blk_cnt)); 3118 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3119 le16_to_cpu(map_buff->data_disks_per_row)); 3120 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3121 le16_to_cpu(map_buff->metadata_disks_per_row)); 3122 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3123 le16_to_cpu(map_buff->row_cnt)); 3124 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3125 le16_to_cpu(map_buff->layout_map_count)); 3126 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3127 le16_to_cpu(map_buff->flags)); 3128 dev_info(&h->pdev->dev, "encrypytion = %s\n", 3129 le16_to_cpu(map_buff->flags) & 3130 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3131 dev_info(&h->pdev->dev, "dekindex = %u\n", 3132 le16_to_cpu(map_buff->dekindex)); 3133 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3134 for (map = 0; map < map_cnt; map++) { 3135 dev_info(&h->pdev->dev, "Map%u:\n", map); 3136 row_cnt = le16_to_cpu(map_buff->row_cnt); 3137 for (row = 0; row < row_cnt; row++) { 3138 dev_info(&h->pdev->dev, " Row%u:\n", row); 3139 disks_per_row = 3140 le16_to_cpu(map_buff->data_disks_per_row); 3141 for (col = 0; col < disks_per_row; col++, dd++) 3142 dev_info(&h->pdev->dev, 3143 " D%02u: h=0x%04x xor=%u,%u\n", 3144 col, dd->ioaccel_handle, 3145 dd->xor_mult[0], dd->xor_mult[1]); 3146 disks_per_row = 3147 le16_to_cpu(map_buff->metadata_disks_per_row); 3148 for (col = 0; col < disks_per_row; col++, dd++) 3149 dev_info(&h->pdev->dev, 3150 " M%02u: h=0x%04x xor=%u,%u\n", 3151 col, dd->ioaccel_handle, 3152 dd->xor_mult[0], dd->xor_mult[1]); 3153 } 3154 } 3155 } 3156 #else 3157 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3158 __attribute__((unused)) int rc, 3159 __attribute__((unused)) struct raid_map_data *map_buff) 3160 { 3161 } 3162 #endif 3163 3164 static int hpsa_get_raid_map(struct ctlr_info *h, 3165 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3166 { 3167 int rc = 0; 3168 struct CommandList *c; 3169 struct ErrorInfo *ei; 3170 3171 c = cmd_alloc(h); 3172 3173 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3174 sizeof(this_device->raid_map), 0, 3175 scsi3addr, TYPE_CMD)) { 3176 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3177 cmd_free(h, c); 3178 return -1; 3179 } 3180 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3181 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3182 if (rc) 3183 goto out; 3184 ei = c->err_info; 3185 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3186 hpsa_scsi_interpret_error(h, c); 3187 rc = -1; 3188 goto out; 3189 } 3190 cmd_free(h, c); 3191 3192 /* @todo in the future, dynamically allocate RAID map memory */ 3193 if (le32_to_cpu(this_device->raid_map.structure_size) > 3194 sizeof(this_device->raid_map)) { 3195 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3196 rc = -1; 3197 } 3198 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3199 return rc; 3200 out: 3201 cmd_free(h, c); 3202 return rc; 3203 } 3204 3205 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3206 unsigned char scsi3addr[], u16 bmic_device_index, 3207 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3208 { 3209 int rc = IO_OK; 3210 struct CommandList *c; 3211 struct ErrorInfo *ei; 3212 3213 c = cmd_alloc(h); 3214 3215 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3216 0, RAID_CTLR_LUNID, TYPE_CMD); 3217 if (rc) 3218 goto out; 3219 3220 c->Request.CDB[2] = bmic_device_index & 0xff; 3221 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3222 3223 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3224 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3225 if (rc) 3226 goto out; 3227 ei = c->err_info; 3228 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3229 hpsa_scsi_interpret_error(h, c); 3230 rc = -1; 3231 } 3232 out: 3233 cmd_free(h, c); 3234 return rc; 3235 } 3236 3237 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3238 struct bmic_identify_controller *buf, size_t bufsize) 3239 { 3240 int rc = IO_OK; 3241 struct CommandList *c; 3242 struct ErrorInfo *ei; 3243 3244 c = cmd_alloc(h); 3245 3246 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3247 0, RAID_CTLR_LUNID, TYPE_CMD); 3248 if (rc) 3249 goto out; 3250 3251 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3252 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3253 if (rc) 3254 goto out; 3255 ei = c->err_info; 3256 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3257 hpsa_scsi_interpret_error(h, c); 3258 rc = -1; 3259 } 3260 out: 3261 cmd_free(h, c); 3262 return rc; 3263 } 3264 3265 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3266 unsigned char scsi3addr[], u16 bmic_device_index, 3267 struct bmic_identify_physical_device *buf, size_t bufsize) 3268 { 3269 int rc = IO_OK; 3270 struct CommandList *c; 3271 struct ErrorInfo *ei; 3272 3273 c = cmd_alloc(h); 3274 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3275 0, RAID_CTLR_LUNID, TYPE_CMD); 3276 if (rc) 3277 goto out; 3278 3279 c->Request.CDB[2] = bmic_device_index & 0xff; 3280 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3281 3282 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3283 DEFAULT_TIMEOUT); 3284 ei = c->err_info; 3285 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3286 hpsa_scsi_interpret_error(h, c); 3287 rc = -1; 3288 } 3289 out: 3290 cmd_free(h, c); 3291 3292 return rc; 3293 } 3294 3295 /* 3296 * get enclosure information 3297 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3298 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3299 * Uses id_physical_device to determine the box_index. 3300 */ 3301 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3302 unsigned char *scsi3addr, 3303 struct ReportExtendedLUNdata *rlep, int rle_index, 3304 struct hpsa_scsi_dev_t *encl_dev) 3305 { 3306 int rc = -1; 3307 struct CommandList *c = NULL; 3308 struct ErrorInfo *ei = NULL; 3309 struct bmic_sense_storage_box_params *bssbp = NULL; 3310 struct bmic_identify_physical_device *id_phys = NULL; 3311 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3312 u16 bmic_device_index = 0; 3313 3314 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3315 3316 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3317 rc = IO_OK; 3318 goto out; 3319 } 3320 3321 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3322 if (!bssbp) 3323 goto out; 3324 3325 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3326 if (!id_phys) 3327 goto out; 3328 3329 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3330 id_phys, sizeof(*id_phys)); 3331 if (rc) { 3332 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3333 __func__, encl_dev->external, bmic_device_index); 3334 goto out; 3335 } 3336 3337 c = cmd_alloc(h); 3338 3339 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3340 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3341 3342 if (rc) 3343 goto out; 3344 3345 if (id_phys->phys_connector[1] == 'E') 3346 c->Request.CDB[5] = id_phys->box_index; 3347 else 3348 c->Request.CDB[5] = 0; 3349 3350 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3351 DEFAULT_TIMEOUT); 3352 if (rc) 3353 goto out; 3354 3355 ei = c->err_info; 3356 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3357 rc = -1; 3358 goto out; 3359 } 3360 3361 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3362 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3363 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3364 3365 rc = IO_OK; 3366 out: 3367 kfree(bssbp); 3368 kfree(id_phys); 3369 3370 if (c) 3371 cmd_free(h, c); 3372 3373 if (rc != IO_OK) 3374 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3375 "Error, could not get enclosure information\n"); 3376 } 3377 3378 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3379 unsigned char *scsi3addr) 3380 { 3381 struct ReportExtendedLUNdata *physdev; 3382 u32 nphysicals; 3383 u64 sa = 0; 3384 int i; 3385 3386 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3387 if (!physdev) 3388 return 0; 3389 3390 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3391 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3392 kfree(physdev); 3393 return 0; 3394 } 3395 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3396 3397 for (i = 0; i < nphysicals; i++) 3398 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3399 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3400 break; 3401 } 3402 3403 kfree(physdev); 3404 3405 return sa; 3406 } 3407 3408 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3409 struct hpsa_scsi_dev_t *dev) 3410 { 3411 int rc; 3412 u64 sa = 0; 3413 3414 if (is_hba_lunid(scsi3addr)) { 3415 struct bmic_sense_subsystem_info *ssi; 3416 3417 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3418 if (ssi == NULL) { 3419 dev_warn(&h->pdev->dev, 3420 "%s: out of memory\n", __func__); 3421 return; 3422 } 3423 3424 rc = hpsa_bmic_sense_subsystem_information(h, 3425 scsi3addr, 0, ssi, sizeof(*ssi)); 3426 if (rc == 0) { 3427 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3428 h->sas_address = sa; 3429 } 3430 3431 kfree(ssi); 3432 } else 3433 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3434 3435 dev->sas_address = sa; 3436 } 3437 3438 /* Get a device id from inquiry page 0x83 */ 3439 static int hpsa_vpd_page_supported(struct ctlr_info *h, 3440 unsigned char scsi3addr[], u8 page) 3441 { 3442 int rc; 3443 int i; 3444 int pages; 3445 unsigned char *buf, bufsize; 3446 3447 buf = kzalloc(256, GFP_KERNEL); 3448 if (!buf) 3449 return 0; 3450 3451 /* Get the size of the page list first */ 3452 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3453 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3454 buf, HPSA_VPD_HEADER_SZ); 3455 if (rc != 0) 3456 goto exit_unsupported; 3457 pages = buf[3]; 3458 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3459 bufsize = pages + HPSA_VPD_HEADER_SZ; 3460 else 3461 bufsize = 255; 3462 3463 /* Get the whole VPD page list */ 3464 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3465 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3466 buf, bufsize); 3467 if (rc != 0) 3468 goto exit_unsupported; 3469 3470 pages = buf[3]; 3471 for (i = 1; i <= pages; i++) 3472 if (buf[3 + i] == page) 3473 goto exit_supported; 3474 exit_unsupported: 3475 kfree(buf); 3476 return 0; 3477 exit_supported: 3478 kfree(buf); 3479 return 1; 3480 } 3481 3482 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3483 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3484 { 3485 int rc; 3486 unsigned char *buf; 3487 u8 ioaccel_status; 3488 3489 this_device->offload_config = 0; 3490 this_device->offload_enabled = 0; 3491 this_device->offload_to_be_enabled = 0; 3492 3493 buf = kzalloc(64, GFP_KERNEL); 3494 if (!buf) 3495 return; 3496 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3497 goto out; 3498 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3499 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3500 if (rc != 0) 3501 goto out; 3502 3503 #define IOACCEL_STATUS_BYTE 4 3504 #define OFFLOAD_CONFIGURED_BIT 0x01 3505 #define OFFLOAD_ENABLED_BIT 0x02 3506 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3507 this_device->offload_config = 3508 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3509 if (this_device->offload_config) { 3510 this_device->offload_enabled = 3511 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3512 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3513 this_device->offload_enabled = 0; 3514 } 3515 this_device->offload_to_be_enabled = this_device->offload_enabled; 3516 out: 3517 kfree(buf); 3518 return; 3519 } 3520 3521 /* Get the device id from inquiry page 0x83 */ 3522 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3523 unsigned char *device_id, int index, int buflen) 3524 { 3525 int rc; 3526 unsigned char *buf; 3527 3528 if (buflen > 16) 3529 buflen = 16; 3530 buf = kzalloc(64, GFP_KERNEL); 3531 if (!buf) 3532 return -ENOMEM; 3533 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3534 if (rc == 0) 3535 memcpy(device_id, &buf[index], buflen); 3536 3537 kfree(buf); 3538 3539 return rc != 0; 3540 } 3541 3542 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3543 void *buf, int bufsize, 3544 int extended_response) 3545 { 3546 int rc = IO_OK; 3547 struct CommandList *c; 3548 unsigned char scsi3addr[8]; 3549 struct ErrorInfo *ei; 3550 3551 c = cmd_alloc(h); 3552 3553 /* address the controller */ 3554 memset(scsi3addr, 0, sizeof(scsi3addr)); 3555 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3556 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3557 rc = -1; 3558 goto out; 3559 } 3560 if (extended_response) 3561 c->Request.CDB[1] = extended_response; 3562 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3563 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3564 if (rc) 3565 goto out; 3566 ei = c->err_info; 3567 if (ei->CommandStatus != 0 && 3568 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3569 hpsa_scsi_interpret_error(h, c); 3570 rc = -1; 3571 } else { 3572 struct ReportLUNdata *rld = buf; 3573 3574 if (rld->extended_response_flag != extended_response) { 3575 dev_err(&h->pdev->dev, 3576 "report luns requested format %u, got %u\n", 3577 extended_response, 3578 rld->extended_response_flag); 3579 rc = -1; 3580 } 3581 } 3582 out: 3583 cmd_free(h, c); 3584 return rc; 3585 } 3586 3587 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3588 struct ReportExtendedLUNdata *buf, int bufsize) 3589 { 3590 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3591 HPSA_REPORT_PHYS_EXTENDED); 3592 } 3593 3594 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3595 struct ReportLUNdata *buf, int bufsize) 3596 { 3597 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3598 } 3599 3600 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3601 int bus, int target, int lun) 3602 { 3603 device->bus = bus; 3604 device->target = target; 3605 device->lun = lun; 3606 } 3607 3608 /* Use VPD inquiry to get details of volume status */ 3609 static int hpsa_get_volume_status(struct ctlr_info *h, 3610 unsigned char scsi3addr[]) 3611 { 3612 int rc; 3613 int status; 3614 int size; 3615 unsigned char *buf; 3616 3617 buf = kzalloc(64, GFP_KERNEL); 3618 if (!buf) 3619 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3620 3621 /* Does controller have VPD for logical volume status? */ 3622 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3623 goto exit_failed; 3624 3625 /* Get the size of the VPD return buffer */ 3626 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3627 buf, HPSA_VPD_HEADER_SZ); 3628 if (rc != 0) 3629 goto exit_failed; 3630 size = buf[3]; 3631 3632 /* Now get the whole VPD buffer */ 3633 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3634 buf, size + HPSA_VPD_HEADER_SZ); 3635 if (rc != 0) 3636 goto exit_failed; 3637 status = buf[4]; /* status byte */ 3638 3639 kfree(buf); 3640 return status; 3641 exit_failed: 3642 kfree(buf); 3643 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3644 } 3645 3646 /* Determine offline status of a volume. 3647 * Return either: 3648 * 0 (not offline) 3649 * 0xff (offline for unknown reasons) 3650 * # (integer code indicating one of several NOT READY states 3651 * describing why a volume is to be kept offline) 3652 */ 3653 static int hpsa_volume_offline(struct ctlr_info *h, 3654 unsigned char scsi3addr[]) 3655 { 3656 struct CommandList *c; 3657 unsigned char *sense; 3658 u8 sense_key, asc, ascq; 3659 int sense_len; 3660 int rc, ldstat = 0; 3661 u16 cmd_status; 3662 u8 scsi_status; 3663 #define ASC_LUN_NOT_READY 0x04 3664 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3665 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3666 3667 c = cmd_alloc(h); 3668 3669 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3670 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3671 DEFAULT_TIMEOUT); 3672 if (rc) { 3673 cmd_free(h, c); 3674 return 0; 3675 } 3676 sense = c->err_info->SenseInfo; 3677 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3678 sense_len = sizeof(c->err_info->SenseInfo); 3679 else 3680 sense_len = c->err_info->SenseLen; 3681 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3682 cmd_status = c->err_info->CommandStatus; 3683 scsi_status = c->err_info->ScsiStatus; 3684 cmd_free(h, c); 3685 /* Is the volume 'not ready'? */ 3686 if (cmd_status != CMD_TARGET_STATUS || 3687 scsi_status != SAM_STAT_CHECK_CONDITION || 3688 sense_key != NOT_READY || 3689 asc != ASC_LUN_NOT_READY) { 3690 return 0; 3691 } 3692 3693 /* Determine the reason for not ready state */ 3694 ldstat = hpsa_get_volume_status(h, scsi3addr); 3695 3696 /* Keep volume offline in certain cases: */ 3697 switch (ldstat) { 3698 case HPSA_LV_UNDERGOING_ERASE: 3699 case HPSA_LV_NOT_AVAILABLE: 3700 case HPSA_LV_UNDERGOING_RPI: 3701 case HPSA_LV_PENDING_RPI: 3702 case HPSA_LV_ENCRYPTED_NO_KEY: 3703 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3704 case HPSA_LV_UNDERGOING_ENCRYPTION: 3705 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3706 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3707 return ldstat; 3708 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3709 /* If VPD status page isn't available, 3710 * use ASC/ASCQ to determine state 3711 */ 3712 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3713 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3714 return ldstat; 3715 break; 3716 default: 3717 break; 3718 } 3719 return 0; 3720 } 3721 3722 /* 3723 * Find out if a logical device supports aborts by simply trying one. 3724 * Smart Array may claim not to support aborts on logical drives, but 3725 * if a MSA2000 * is connected, the drives on that will be presented 3726 * by the Smart Array as logical drives, and aborts may be sent to 3727 * those devices successfully. So the simplest way to find out is 3728 * to simply try an abort and see how the device responds. 3729 */ 3730 static int hpsa_device_supports_aborts(struct ctlr_info *h, 3731 unsigned char *scsi3addr) 3732 { 3733 struct CommandList *c; 3734 struct ErrorInfo *ei; 3735 int rc = 0; 3736 3737 u64 tag = (u64) -1; /* bogus tag */ 3738 3739 /* Assume that physical devices support aborts */ 3740 if (!is_logical_dev_addr_mode(scsi3addr)) 3741 return 1; 3742 3743 c = cmd_alloc(h); 3744 3745 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3746 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3747 DEFAULT_TIMEOUT); 3748 /* no unmap needed here because no data xfer. */ 3749 ei = c->err_info; 3750 switch (ei->CommandStatus) { 3751 case CMD_INVALID: 3752 rc = 0; 3753 break; 3754 case CMD_UNABORTABLE: 3755 case CMD_ABORT_FAILED: 3756 rc = 1; 3757 break; 3758 case CMD_TMF_STATUS: 3759 rc = hpsa_evaluate_tmf_status(h, c); 3760 break; 3761 default: 3762 rc = 0; 3763 break; 3764 } 3765 cmd_free(h, c); 3766 return rc; 3767 } 3768 3769 static int hpsa_update_device_info(struct ctlr_info *h, 3770 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3771 unsigned char *is_OBDR_device) 3772 { 3773 3774 #define OBDR_SIG_OFFSET 43 3775 #define OBDR_TAPE_SIG "$DR-10" 3776 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3777 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3778 3779 unsigned char *inq_buff; 3780 unsigned char *obdr_sig; 3781 int rc = 0; 3782 3783 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3784 if (!inq_buff) { 3785 rc = -ENOMEM; 3786 goto bail_out; 3787 } 3788 3789 /* Do an inquiry to the device to see what it is. */ 3790 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3791 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3792 /* Inquiry failed (msg printed already) */ 3793 dev_err(&h->pdev->dev, 3794 "hpsa_update_device_info: inquiry failed\n"); 3795 rc = -EIO; 3796 goto bail_out; 3797 } 3798 3799 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3800 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3801 3802 this_device->devtype = (inq_buff[0] & 0x1f); 3803 memcpy(this_device->scsi3addr, scsi3addr, 8); 3804 memcpy(this_device->vendor, &inq_buff[8], 3805 sizeof(this_device->vendor)); 3806 memcpy(this_device->model, &inq_buff[16], 3807 sizeof(this_device->model)); 3808 memset(this_device->device_id, 0, 3809 sizeof(this_device->device_id)); 3810 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3811 sizeof(this_device->device_id)); 3812 3813 if ((this_device->devtype == TYPE_DISK || 3814 this_device->devtype == TYPE_ZBC) && 3815 is_logical_dev_addr_mode(scsi3addr)) { 3816 int volume_offline; 3817 3818 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3819 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3820 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3821 volume_offline = hpsa_volume_offline(h, scsi3addr); 3822 if (volume_offline < 0 || volume_offline > 0xff) 3823 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 3824 this_device->volume_offline = volume_offline & 0xff; 3825 } else { 3826 this_device->raid_level = RAID_UNKNOWN; 3827 this_device->offload_config = 0; 3828 this_device->offload_enabled = 0; 3829 this_device->offload_to_be_enabled = 0; 3830 this_device->hba_ioaccel_enabled = 0; 3831 this_device->volume_offline = 0; 3832 this_device->queue_depth = h->nr_cmds; 3833 } 3834 3835 if (is_OBDR_device) { 3836 /* See if this is a One-Button-Disaster-Recovery device 3837 * by looking for "$DR-10" at offset 43 in inquiry data. 3838 */ 3839 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3840 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3841 strncmp(obdr_sig, OBDR_TAPE_SIG, 3842 OBDR_SIG_LEN) == 0); 3843 } 3844 kfree(inq_buff); 3845 return 0; 3846 3847 bail_out: 3848 kfree(inq_buff); 3849 return rc; 3850 } 3851 3852 static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 3853 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 3854 { 3855 unsigned long flags; 3856 int rc, entry; 3857 /* 3858 * See if this device supports aborts. If we already know 3859 * the device, we already know if it supports aborts, otherwise 3860 * we have to find out if it supports aborts by trying one. 3861 */ 3862 spin_lock_irqsave(&h->devlock, flags); 3863 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 3864 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 3865 entry >= 0 && entry < h->ndevices) { 3866 dev->supports_aborts = h->dev[entry]->supports_aborts; 3867 spin_unlock_irqrestore(&h->devlock, flags); 3868 } else { 3869 spin_unlock_irqrestore(&h->devlock, flags); 3870 dev->supports_aborts = 3871 hpsa_device_supports_aborts(h, scsi3addr); 3872 if (dev->supports_aborts < 0) 3873 dev->supports_aborts = 0; 3874 } 3875 } 3876 3877 /* 3878 * Helper function to assign bus, target, lun mapping of devices. 3879 * Logical drive target and lun are assigned at this time, but 3880 * physical device lun and target assignment are deferred (assigned 3881 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3882 */ 3883 static void figure_bus_target_lun(struct ctlr_info *h, 3884 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3885 { 3886 u32 lunid = get_unaligned_le32(lunaddrbytes); 3887 3888 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3889 /* physical device, target and lun filled in later */ 3890 if (is_hba_lunid(lunaddrbytes)) 3891 hpsa_set_bus_target_lun(device, 3892 HPSA_HBA_BUS, 0, lunid & 0x3fff); 3893 else 3894 /* defer target, lun assignment for physical devices */ 3895 hpsa_set_bus_target_lun(device, 3896 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3897 return; 3898 } 3899 /* It's a logical device */ 3900 if (device->external) { 3901 hpsa_set_bus_target_lun(device, 3902 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3903 lunid & 0x00ff); 3904 return; 3905 } 3906 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3907 0, lunid & 0x3fff); 3908 } 3909 3910 3911 /* 3912 * Get address of physical disk used for an ioaccel2 mode command: 3913 * 1. Extract ioaccel2 handle from the command. 3914 * 2. Find a matching ioaccel2 handle from list of physical disks. 3915 * 3. Return: 3916 * 1 and set scsi3addr to address of matching physical 3917 * 0 if no matching physical disk was found. 3918 */ 3919 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 3920 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 3921 { 3922 struct io_accel2_cmd *c2 = 3923 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 3924 unsigned long flags; 3925 int i; 3926 3927 spin_lock_irqsave(&h->devlock, flags); 3928 for (i = 0; i < h->ndevices; i++) 3929 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 3930 memcpy(scsi3addr, h->dev[i]->scsi3addr, 3931 sizeof(h->dev[i]->scsi3addr)); 3932 spin_unlock_irqrestore(&h->devlock, flags); 3933 return 1; 3934 } 3935 spin_unlock_irqrestore(&h->devlock, flags); 3936 return 0; 3937 } 3938 3939 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 3940 int i, int nphysicals, int nlocal_logicals) 3941 { 3942 /* In report logicals, local logicals are listed first, 3943 * then any externals. 3944 */ 3945 int logicals_start = nphysicals + (raid_ctlr_position == 0); 3946 3947 if (i == raid_ctlr_position) 3948 return 0; 3949 3950 if (i < logicals_start) 3951 return 0; 3952 3953 /* i is in logicals range, but still within local logicals */ 3954 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 3955 return 0; 3956 3957 return 1; /* it's an external lun */ 3958 } 3959 3960 /* 3961 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3962 * logdev. The number of luns in physdev and logdev are returned in 3963 * *nphysicals and *nlogicals, respectively. 3964 * Returns 0 on success, -1 otherwise. 3965 */ 3966 static int hpsa_gather_lun_info(struct ctlr_info *h, 3967 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 3968 struct ReportLUNdata *logdev, u32 *nlogicals) 3969 { 3970 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3971 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3972 return -1; 3973 } 3974 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3975 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 3976 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 3977 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3978 *nphysicals = HPSA_MAX_PHYS_LUN; 3979 } 3980 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3981 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3982 return -1; 3983 } 3984 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3985 /* Reject Logicals in excess of our max capability. */ 3986 if (*nlogicals > HPSA_MAX_LUN) { 3987 dev_warn(&h->pdev->dev, 3988 "maximum logical LUNs (%d) exceeded. " 3989 "%d LUNs ignored.\n", HPSA_MAX_LUN, 3990 *nlogicals - HPSA_MAX_LUN); 3991 *nlogicals = HPSA_MAX_LUN; 3992 } 3993 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3994 dev_warn(&h->pdev->dev, 3995 "maximum logical + physical LUNs (%d) exceeded. " 3996 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3997 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3998 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3999 } 4000 return 0; 4001 } 4002 4003 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4004 int i, int nphysicals, int nlogicals, 4005 struct ReportExtendedLUNdata *physdev_list, 4006 struct ReportLUNdata *logdev_list) 4007 { 4008 /* Helper function, figure out where the LUN ID info is coming from 4009 * given index i, lists of physical and logical devices, where in 4010 * the list the raid controller is supposed to appear (first or last) 4011 */ 4012 4013 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4014 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4015 4016 if (i == raid_ctlr_position) 4017 return RAID_CTLR_LUNID; 4018 4019 if (i < logicals_start) 4020 return &physdev_list->LUN[i - 4021 (raid_ctlr_position == 0)].lunid[0]; 4022 4023 if (i < last_device) 4024 return &logdev_list->LUN[i - nphysicals - 4025 (raid_ctlr_position == 0)][0]; 4026 BUG(); 4027 return NULL; 4028 } 4029 4030 /* get physical drive ioaccel handle and queue depth */ 4031 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4032 struct hpsa_scsi_dev_t *dev, 4033 struct ReportExtendedLUNdata *rlep, int rle_index, 4034 struct bmic_identify_physical_device *id_phys) 4035 { 4036 int rc; 4037 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4038 4039 dev->ioaccel_handle = rle->ioaccel_handle; 4040 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4041 dev->hba_ioaccel_enabled = 1; 4042 memset(id_phys, 0, sizeof(*id_phys)); 4043 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4044 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4045 sizeof(*id_phys)); 4046 if (!rc) 4047 /* Reserve space for FW operations */ 4048 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4049 #define DRIVE_QUEUE_DEPTH 7 4050 dev->queue_depth = 4051 le16_to_cpu(id_phys->current_queue_depth_limit) - 4052 DRIVE_CMDS_RESERVED_FOR_FW; 4053 else 4054 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4055 } 4056 4057 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4058 struct ReportExtendedLUNdata *rlep, int rle_index, 4059 struct bmic_identify_physical_device *id_phys) 4060 { 4061 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4062 4063 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4064 this_device->hba_ioaccel_enabled = 1; 4065 4066 memcpy(&this_device->active_path_index, 4067 &id_phys->active_path_number, 4068 sizeof(this_device->active_path_index)); 4069 memcpy(&this_device->path_map, 4070 &id_phys->redundant_path_present_map, 4071 sizeof(this_device->path_map)); 4072 memcpy(&this_device->box, 4073 &id_phys->alternate_paths_phys_box_on_port, 4074 sizeof(this_device->box)); 4075 memcpy(&this_device->phys_connector, 4076 &id_phys->alternate_paths_phys_connector, 4077 sizeof(this_device->phys_connector)); 4078 memcpy(&this_device->bay, 4079 &id_phys->phys_bay_in_box, 4080 sizeof(this_device->bay)); 4081 } 4082 4083 /* get number of local logical disks. */ 4084 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4085 struct bmic_identify_controller *id_ctlr, 4086 u32 *nlocals) 4087 { 4088 int rc; 4089 4090 if (!id_ctlr) { 4091 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4092 __func__); 4093 return -ENOMEM; 4094 } 4095 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4096 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4097 if (!rc) 4098 if (id_ctlr->configured_logical_drive_count < 256) 4099 *nlocals = id_ctlr->configured_logical_drive_count; 4100 else 4101 *nlocals = le16_to_cpu( 4102 id_ctlr->extended_logical_unit_count); 4103 else 4104 *nlocals = -1; 4105 return rc; 4106 } 4107 4108 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4109 { 4110 struct bmic_identify_physical_device *id_phys; 4111 bool is_spare = false; 4112 int rc; 4113 4114 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4115 if (!id_phys) 4116 return false; 4117 4118 rc = hpsa_bmic_id_physical_device(h, 4119 lunaddrbytes, 4120 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4121 id_phys, sizeof(*id_phys)); 4122 if (rc == 0) 4123 is_spare = (id_phys->more_flags >> 6) & 0x01; 4124 4125 kfree(id_phys); 4126 return is_spare; 4127 } 4128 4129 #define RPL_DEV_FLAG_NON_DISK 0x1 4130 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4131 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4132 4133 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4134 4135 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4136 struct ext_report_lun_entry *rle) 4137 { 4138 u8 device_flags; 4139 u8 device_type; 4140 4141 if (!MASKED_DEVICE(lunaddrbytes)) 4142 return false; 4143 4144 device_flags = rle->device_flags; 4145 device_type = rle->device_type; 4146 4147 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4148 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4149 return false; 4150 return true; 4151 } 4152 4153 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4154 return false; 4155 4156 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4157 return false; 4158 4159 /* 4160 * Spares may be spun down, we do not want to 4161 * do an Inquiry to a RAID set spare drive as 4162 * that would have them spun up, that is a 4163 * performance hit because I/O to the RAID device 4164 * stops while the spin up occurs which can take 4165 * over 50 seconds. 4166 */ 4167 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4168 return true; 4169 4170 return false; 4171 } 4172 4173 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4174 { 4175 /* the idea here is we could get notified 4176 * that some devices have changed, so we do a report 4177 * physical luns and report logical luns cmd, and adjust 4178 * our list of devices accordingly. 4179 * 4180 * The scsi3addr's of devices won't change so long as the 4181 * adapter is not reset. That means we can rescan and 4182 * tell which devices we already know about, vs. new 4183 * devices, vs. disappearing devices. 4184 */ 4185 struct ReportExtendedLUNdata *physdev_list = NULL; 4186 struct ReportLUNdata *logdev_list = NULL; 4187 struct bmic_identify_physical_device *id_phys = NULL; 4188 struct bmic_identify_controller *id_ctlr = NULL; 4189 u32 nphysicals = 0; 4190 u32 nlogicals = 0; 4191 u32 nlocal_logicals = 0; 4192 u32 ndev_allocated = 0; 4193 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4194 int ncurrent = 0; 4195 int i, n_ext_target_devs, ndevs_to_allocate; 4196 int raid_ctlr_position; 4197 bool physical_device; 4198 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4199 4200 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4201 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4202 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4203 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4204 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4205 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4206 4207 if (!currentsd || !physdev_list || !logdev_list || 4208 !tmpdevice || !id_phys || !id_ctlr) { 4209 dev_err(&h->pdev->dev, "out of memory\n"); 4210 goto out; 4211 } 4212 memset(lunzerobits, 0, sizeof(lunzerobits)); 4213 4214 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4215 4216 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4217 logdev_list, &nlogicals)) { 4218 h->drv_req_rescan = 1; 4219 goto out; 4220 } 4221 4222 /* Set number of local logicals (non PTRAID) */ 4223 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4224 dev_warn(&h->pdev->dev, 4225 "%s: Can't determine number of local logical devices.\n", 4226 __func__); 4227 } 4228 4229 /* We might see up to the maximum number of logical and physical disks 4230 * plus external target devices, and a device for the local RAID 4231 * controller. 4232 */ 4233 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4234 4235 /* Allocate the per device structures */ 4236 for (i = 0; i < ndevs_to_allocate; i++) { 4237 if (i >= HPSA_MAX_DEVICES) { 4238 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4239 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4240 ndevs_to_allocate - HPSA_MAX_DEVICES); 4241 break; 4242 } 4243 4244 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4245 if (!currentsd[i]) { 4246 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4247 __FILE__, __LINE__); 4248 h->drv_req_rescan = 1; 4249 goto out; 4250 } 4251 ndev_allocated++; 4252 } 4253 4254 if (is_scsi_rev_5(h)) 4255 raid_ctlr_position = 0; 4256 else 4257 raid_ctlr_position = nphysicals + nlogicals; 4258 4259 /* adjust our table of devices */ 4260 n_ext_target_devs = 0; 4261 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4262 u8 *lunaddrbytes, is_OBDR = 0; 4263 int rc = 0; 4264 int phys_dev_index = i - (raid_ctlr_position == 0); 4265 bool skip_device = false; 4266 4267 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4268 4269 /* Figure out where the LUN ID info is coming from */ 4270 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4271 i, nphysicals, nlogicals, physdev_list, logdev_list); 4272 4273 /* 4274 * Skip over some devices such as a spare. 4275 */ 4276 if (!tmpdevice->external && physical_device) { 4277 skip_device = hpsa_skip_device(h, lunaddrbytes, 4278 &physdev_list->LUN[phys_dev_index]); 4279 if (skip_device) 4280 continue; 4281 } 4282 4283 /* Get device type, vendor, model, device id */ 4284 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4285 &is_OBDR); 4286 if (rc == -ENOMEM) { 4287 dev_warn(&h->pdev->dev, 4288 "Out of memory, rescan deferred.\n"); 4289 h->drv_req_rescan = 1; 4290 goto out; 4291 } 4292 if (rc) { 4293 dev_warn(&h->pdev->dev, 4294 "Inquiry failed, skipping device.\n"); 4295 continue; 4296 } 4297 4298 /* Determine if this is a lun from an external target array */ 4299 tmpdevice->external = 4300 figure_external_status(h, raid_ctlr_position, i, 4301 nphysicals, nlocal_logicals); 4302 4303 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4304 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4305 this_device = currentsd[ncurrent]; 4306 4307 /* Turn on discovery_polling if there are ext target devices. 4308 * Event-based change notification is unreliable for those. 4309 */ 4310 if (!h->discovery_polling) { 4311 if (tmpdevice->external) { 4312 h->discovery_polling = 1; 4313 dev_info(&h->pdev->dev, 4314 "External target, activate discovery polling.\n"); 4315 } 4316 } 4317 4318 4319 *this_device = *tmpdevice; 4320 this_device->physical_device = physical_device; 4321 4322 /* 4323 * Expose all devices except for physical devices that 4324 * are masked. 4325 */ 4326 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4327 this_device->expose_device = 0; 4328 else 4329 this_device->expose_device = 1; 4330 4331 4332 /* 4333 * Get the SAS address for physical devices that are exposed. 4334 */ 4335 if (this_device->physical_device && this_device->expose_device) 4336 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4337 4338 switch (this_device->devtype) { 4339 case TYPE_ROM: 4340 /* We don't *really* support actual CD-ROM devices, 4341 * just "One Button Disaster Recovery" tape drive 4342 * which temporarily pretends to be a CD-ROM drive. 4343 * So we check that the device is really an OBDR tape 4344 * device by checking for "$DR-10" in bytes 43-48 of 4345 * the inquiry data. 4346 */ 4347 if (is_OBDR) 4348 ncurrent++; 4349 break; 4350 case TYPE_DISK: 4351 case TYPE_ZBC: 4352 if (this_device->physical_device) { 4353 /* The disk is in HBA mode. */ 4354 /* Never use RAID mapper in HBA mode. */ 4355 this_device->offload_enabled = 0; 4356 hpsa_get_ioaccel_drive_info(h, this_device, 4357 physdev_list, phys_dev_index, id_phys); 4358 hpsa_get_path_info(this_device, 4359 physdev_list, phys_dev_index, id_phys); 4360 } 4361 ncurrent++; 4362 break; 4363 case TYPE_TAPE: 4364 case TYPE_MEDIUM_CHANGER: 4365 ncurrent++; 4366 break; 4367 case TYPE_ENCLOSURE: 4368 if (!this_device->external) 4369 hpsa_get_enclosure_info(h, lunaddrbytes, 4370 physdev_list, phys_dev_index, 4371 this_device); 4372 ncurrent++; 4373 break; 4374 case TYPE_RAID: 4375 /* Only present the Smartarray HBA as a RAID controller. 4376 * If it's a RAID controller other than the HBA itself 4377 * (an external RAID controller, MSA500 or similar) 4378 * don't present it. 4379 */ 4380 if (!is_hba_lunid(lunaddrbytes)) 4381 break; 4382 ncurrent++; 4383 break; 4384 default: 4385 break; 4386 } 4387 if (ncurrent >= HPSA_MAX_DEVICES) 4388 break; 4389 } 4390 4391 if (h->sas_host == NULL) { 4392 int rc = 0; 4393 4394 rc = hpsa_add_sas_host(h); 4395 if (rc) { 4396 dev_warn(&h->pdev->dev, 4397 "Could not add sas host %d\n", rc); 4398 goto out; 4399 } 4400 } 4401 4402 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4403 out: 4404 kfree(tmpdevice); 4405 for (i = 0; i < ndev_allocated; i++) 4406 kfree(currentsd[i]); 4407 kfree(currentsd); 4408 kfree(physdev_list); 4409 kfree(logdev_list); 4410 kfree(id_ctlr); 4411 kfree(id_phys); 4412 } 4413 4414 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4415 struct scatterlist *sg) 4416 { 4417 u64 addr64 = (u64) sg_dma_address(sg); 4418 unsigned int len = sg_dma_len(sg); 4419 4420 desc->Addr = cpu_to_le64(addr64); 4421 desc->Len = cpu_to_le32(len); 4422 desc->Ext = 0; 4423 } 4424 4425 /* 4426 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4427 * dma mapping and fills in the scatter gather entries of the 4428 * hpsa command, cp. 4429 */ 4430 static int hpsa_scatter_gather(struct ctlr_info *h, 4431 struct CommandList *cp, 4432 struct scsi_cmnd *cmd) 4433 { 4434 struct scatterlist *sg; 4435 int use_sg, i, sg_limit, chained, last_sg; 4436 struct SGDescriptor *curr_sg; 4437 4438 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4439 4440 use_sg = scsi_dma_map(cmd); 4441 if (use_sg < 0) 4442 return use_sg; 4443 4444 if (!use_sg) 4445 goto sglist_finished; 4446 4447 /* 4448 * If the number of entries is greater than the max for a single list, 4449 * then we have a chained list; we will set up all but one entry in the 4450 * first list (the last entry is saved for link information); 4451 * otherwise, we don't have a chained list and we'll set up at each of 4452 * the entries in the one list. 4453 */ 4454 curr_sg = cp->SG; 4455 chained = use_sg > h->max_cmd_sg_entries; 4456 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4457 last_sg = scsi_sg_count(cmd) - 1; 4458 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4459 hpsa_set_sg_descriptor(curr_sg, sg); 4460 curr_sg++; 4461 } 4462 4463 if (chained) { 4464 /* 4465 * Continue with the chained list. Set curr_sg to the chained 4466 * list. Modify the limit to the total count less the entries 4467 * we've already set up. Resume the scan at the list entry 4468 * where the previous loop left off. 4469 */ 4470 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4471 sg_limit = use_sg - sg_limit; 4472 for_each_sg(sg, sg, sg_limit, i) { 4473 hpsa_set_sg_descriptor(curr_sg, sg); 4474 curr_sg++; 4475 } 4476 } 4477 4478 /* Back the pointer up to the last entry and mark it as "last". */ 4479 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4480 4481 if (use_sg + chained > h->maxSG) 4482 h->maxSG = use_sg + chained; 4483 4484 if (chained) { 4485 cp->Header.SGList = h->max_cmd_sg_entries; 4486 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4487 if (hpsa_map_sg_chain_block(h, cp)) { 4488 scsi_dma_unmap(cmd); 4489 return -1; 4490 } 4491 return 0; 4492 } 4493 4494 sglist_finished: 4495 4496 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4497 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4498 return 0; 4499 } 4500 4501 #define IO_ACCEL_INELIGIBLE (1) 4502 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4503 { 4504 int is_write = 0; 4505 u32 block; 4506 u32 block_cnt; 4507 4508 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4509 switch (cdb[0]) { 4510 case WRITE_6: 4511 case WRITE_12: 4512 is_write = 1; 4513 case READ_6: 4514 case READ_12: 4515 if (*cdb_len == 6) { 4516 block = get_unaligned_be16(&cdb[2]); 4517 block_cnt = cdb[4]; 4518 if (block_cnt == 0) 4519 block_cnt = 256; 4520 } else { 4521 BUG_ON(*cdb_len != 12); 4522 block = get_unaligned_be32(&cdb[2]); 4523 block_cnt = get_unaligned_be32(&cdb[6]); 4524 } 4525 if (block_cnt > 0xffff) 4526 return IO_ACCEL_INELIGIBLE; 4527 4528 cdb[0] = is_write ? WRITE_10 : READ_10; 4529 cdb[1] = 0; 4530 cdb[2] = (u8) (block >> 24); 4531 cdb[3] = (u8) (block >> 16); 4532 cdb[4] = (u8) (block >> 8); 4533 cdb[5] = (u8) (block); 4534 cdb[6] = 0; 4535 cdb[7] = (u8) (block_cnt >> 8); 4536 cdb[8] = (u8) (block_cnt); 4537 cdb[9] = 0; 4538 *cdb_len = 10; 4539 break; 4540 } 4541 return 0; 4542 } 4543 4544 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4545 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4546 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4547 { 4548 struct scsi_cmnd *cmd = c->scsi_cmd; 4549 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4550 unsigned int len; 4551 unsigned int total_len = 0; 4552 struct scatterlist *sg; 4553 u64 addr64; 4554 int use_sg, i; 4555 struct SGDescriptor *curr_sg; 4556 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4557 4558 /* TODO: implement chaining support */ 4559 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4560 atomic_dec(&phys_disk->ioaccel_cmds_out); 4561 return IO_ACCEL_INELIGIBLE; 4562 } 4563 4564 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4565 4566 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4567 atomic_dec(&phys_disk->ioaccel_cmds_out); 4568 return IO_ACCEL_INELIGIBLE; 4569 } 4570 4571 c->cmd_type = CMD_IOACCEL1; 4572 4573 /* Adjust the DMA address to point to the accelerated command buffer */ 4574 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4575 (c->cmdindex * sizeof(*cp)); 4576 BUG_ON(c->busaddr & 0x0000007F); 4577 4578 use_sg = scsi_dma_map(cmd); 4579 if (use_sg < 0) { 4580 atomic_dec(&phys_disk->ioaccel_cmds_out); 4581 return use_sg; 4582 } 4583 4584 if (use_sg) { 4585 curr_sg = cp->SG; 4586 scsi_for_each_sg(cmd, sg, use_sg, i) { 4587 addr64 = (u64) sg_dma_address(sg); 4588 len = sg_dma_len(sg); 4589 total_len += len; 4590 curr_sg->Addr = cpu_to_le64(addr64); 4591 curr_sg->Len = cpu_to_le32(len); 4592 curr_sg->Ext = cpu_to_le32(0); 4593 curr_sg++; 4594 } 4595 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4596 4597 switch (cmd->sc_data_direction) { 4598 case DMA_TO_DEVICE: 4599 control |= IOACCEL1_CONTROL_DATA_OUT; 4600 break; 4601 case DMA_FROM_DEVICE: 4602 control |= IOACCEL1_CONTROL_DATA_IN; 4603 break; 4604 case DMA_NONE: 4605 control |= IOACCEL1_CONTROL_NODATAXFER; 4606 break; 4607 default: 4608 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4609 cmd->sc_data_direction); 4610 BUG(); 4611 break; 4612 } 4613 } else { 4614 control |= IOACCEL1_CONTROL_NODATAXFER; 4615 } 4616 4617 c->Header.SGList = use_sg; 4618 /* Fill out the command structure to submit */ 4619 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4620 cp->transfer_len = cpu_to_le32(total_len); 4621 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4622 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4623 cp->control = cpu_to_le32(control); 4624 memcpy(cp->CDB, cdb, cdb_len); 4625 memcpy(cp->CISS_LUN, scsi3addr, 8); 4626 /* Tag was already set at init time. */ 4627 enqueue_cmd_and_start_io(h, c); 4628 return 0; 4629 } 4630 4631 /* 4632 * Queue a command directly to a device behind the controller using the 4633 * I/O accelerator path. 4634 */ 4635 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4636 struct CommandList *c) 4637 { 4638 struct scsi_cmnd *cmd = c->scsi_cmd; 4639 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4640 4641 c->phys_disk = dev; 4642 4643 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4644 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4645 } 4646 4647 /* 4648 * Set encryption parameters for the ioaccel2 request 4649 */ 4650 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4651 struct CommandList *c, struct io_accel2_cmd *cp) 4652 { 4653 struct scsi_cmnd *cmd = c->scsi_cmd; 4654 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4655 struct raid_map_data *map = &dev->raid_map; 4656 u64 first_block; 4657 4658 /* Are we doing encryption on this device */ 4659 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4660 return; 4661 /* Set the data encryption key index. */ 4662 cp->dekindex = map->dekindex; 4663 4664 /* Set the encryption enable flag, encoded into direction field. */ 4665 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4666 4667 /* Set encryption tweak values based on logical block address 4668 * If block size is 512, tweak value is LBA. 4669 * For other block sizes, tweak is (LBA * block size)/ 512) 4670 */ 4671 switch (cmd->cmnd[0]) { 4672 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4673 case WRITE_6: 4674 case READ_6: 4675 first_block = get_unaligned_be16(&cmd->cmnd[2]); 4676 break; 4677 case WRITE_10: 4678 case READ_10: 4679 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4680 case WRITE_12: 4681 case READ_12: 4682 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4683 break; 4684 case WRITE_16: 4685 case READ_16: 4686 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4687 break; 4688 default: 4689 dev_err(&h->pdev->dev, 4690 "ERROR: %s: size (0x%x) not supported for encryption\n", 4691 __func__, cmd->cmnd[0]); 4692 BUG(); 4693 break; 4694 } 4695 4696 if (le32_to_cpu(map->volume_blk_size) != 512) 4697 first_block = first_block * 4698 le32_to_cpu(map->volume_blk_size)/512; 4699 4700 cp->tweak_lower = cpu_to_le32(first_block); 4701 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4702 } 4703 4704 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4705 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4706 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4707 { 4708 struct scsi_cmnd *cmd = c->scsi_cmd; 4709 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4710 struct ioaccel2_sg_element *curr_sg; 4711 int use_sg, i; 4712 struct scatterlist *sg; 4713 u64 addr64; 4714 u32 len; 4715 u32 total_len = 0; 4716 4717 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4718 4719 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4720 atomic_dec(&phys_disk->ioaccel_cmds_out); 4721 return IO_ACCEL_INELIGIBLE; 4722 } 4723 4724 c->cmd_type = CMD_IOACCEL2; 4725 /* Adjust the DMA address to point to the accelerated command buffer */ 4726 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4727 (c->cmdindex * sizeof(*cp)); 4728 BUG_ON(c->busaddr & 0x0000007F); 4729 4730 memset(cp, 0, sizeof(*cp)); 4731 cp->IU_type = IOACCEL2_IU_TYPE; 4732 4733 use_sg = scsi_dma_map(cmd); 4734 if (use_sg < 0) { 4735 atomic_dec(&phys_disk->ioaccel_cmds_out); 4736 return use_sg; 4737 } 4738 4739 if (use_sg) { 4740 curr_sg = cp->sg; 4741 if (use_sg > h->ioaccel_maxsg) { 4742 addr64 = le64_to_cpu( 4743 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4744 curr_sg->address = cpu_to_le64(addr64); 4745 curr_sg->length = 0; 4746 curr_sg->reserved[0] = 0; 4747 curr_sg->reserved[1] = 0; 4748 curr_sg->reserved[2] = 0; 4749 curr_sg->chain_indicator = 0x80; 4750 4751 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4752 } 4753 scsi_for_each_sg(cmd, sg, use_sg, i) { 4754 addr64 = (u64) sg_dma_address(sg); 4755 len = sg_dma_len(sg); 4756 total_len += len; 4757 curr_sg->address = cpu_to_le64(addr64); 4758 curr_sg->length = cpu_to_le32(len); 4759 curr_sg->reserved[0] = 0; 4760 curr_sg->reserved[1] = 0; 4761 curr_sg->reserved[2] = 0; 4762 curr_sg->chain_indicator = 0; 4763 curr_sg++; 4764 } 4765 4766 switch (cmd->sc_data_direction) { 4767 case DMA_TO_DEVICE: 4768 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4769 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4770 break; 4771 case DMA_FROM_DEVICE: 4772 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4773 cp->direction |= IOACCEL2_DIR_DATA_IN; 4774 break; 4775 case DMA_NONE: 4776 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4777 cp->direction |= IOACCEL2_DIR_NO_DATA; 4778 break; 4779 default: 4780 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4781 cmd->sc_data_direction); 4782 BUG(); 4783 break; 4784 } 4785 } else { 4786 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4787 cp->direction |= IOACCEL2_DIR_NO_DATA; 4788 } 4789 4790 /* Set encryption parameters, if necessary */ 4791 set_encrypt_ioaccel2(h, c, cp); 4792 4793 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4794 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4795 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4796 4797 cp->data_len = cpu_to_le32(total_len); 4798 cp->err_ptr = cpu_to_le64(c->busaddr + 4799 offsetof(struct io_accel2_cmd, error_data)); 4800 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4801 4802 /* fill in sg elements */ 4803 if (use_sg > h->ioaccel_maxsg) { 4804 cp->sg_count = 1; 4805 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4806 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4807 atomic_dec(&phys_disk->ioaccel_cmds_out); 4808 scsi_dma_unmap(cmd); 4809 return -1; 4810 } 4811 } else 4812 cp->sg_count = (u8) use_sg; 4813 4814 enqueue_cmd_and_start_io(h, c); 4815 return 0; 4816 } 4817 4818 /* 4819 * Queue a command to the correct I/O accelerator path. 4820 */ 4821 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4822 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4823 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4824 { 4825 /* Try to honor the device's queue depth */ 4826 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4827 phys_disk->queue_depth) { 4828 atomic_dec(&phys_disk->ioaccel_cmds_out); 4829 return IO_ACCEL_INELIGIBLE; 4830 } 4831 if (h->transMethod & CFGTBL_Trans_io_accel1) 4832 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4833 cdb, cdb_len, scsi3addr, 4834 phys_disk); 4835 else 4836 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4837 cdb, cdb_len, scsi3addr, 4838 phys_disk); 4839 } 4840 4841 static void raid_map_helper(struct raid_map_data *map, 4842 int offload_to_mirror, u32 *map_index, u32 *current_group) 4843 { 4844 if (offload_to_mirror == 0) { 4845 /* use physical disk in the first mirrored group. */ 4846 *map_index %= le16_to_cpu(map->data_disks_per_row); 4847 return; 4848 } 4849 do { 4850 /* determine mirror group that *map_index indicates */ 4851 *current_group = *map_index / 4852 le16_to_cpu(map->data_disks_per_row); 4853 if (offload_to_mirror == *current_group) 4854 continue; 4855 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4856 /* select map index from next group */ 4857 *map_index += le16_to_cpu(map->data_disks_per_row); 4858 (*current_group)++; 4859 } else { 4860 /* select map index from first group */ 4861 *map_index %= le16_to_cpu(map->data_disks_per_row); 4862 *current_group = 0; 4863 } 4864 } while (offload_to_mirror != *current_group); 4865 } 4866 4867 /* 4868 * Attempt to perform offload RAID mapping for a logical volume I/O. 4869 */ 4870 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4871 struct CommandList *c) 4872 { 4873 struct scsi_cmnd *cmd = c->scsi_cmd; 4874 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4875 struct raid_map_data *map = &dev->raid_map; 4876 struct raid_map_disk_data *dd = &map->data[0]; 4877 int is_write = 0; 4878 u32 map_index; 4879 u64 first_block, last_block; 4880 u32 block_cnt; 4881 u32 blocks_per_row; 4882 u64 first_row, last_row; 4883 u32 first_row_offset, last_row_offset; 4884 u32 first_column, last_column; 4885 u64 r0_first_row, r0_last_row; 4886 u32 r5or6_blocks_per_row; 4887 u64 r5or6_first_row, r5or6_last_row; 4888 u32 r5or6_first_row_offset, r5or6_last_row_offset; 4889 u32 r5or6_first_column, r5or6_last_column; 4890 u32 total_disks_per_row; 4891 u32 stripesize; 4892 u32 first_group, last_group, current_group; 4893 u32 map_row; 4894 u32 disk_handle; 4895 u64 disk_block; 4896 u32 disk_block_cnt; 4897 u8 cdb[16]; 4898 u8 cdb_len; 4899 u16 strip_size; 4900 #if BITS_PER_LONG == 32 4901 u64 tmpdiv; 4902 #endif 4903 int offload_to_mirror; 4904 4905 /* check for valid opcode, get LBA and block count */ 4906 switch (cmd->cmnd[0]) { 4907 case WRITE_6: 4908 is_write = 1; 4909 case READ_6: 4910 first_block = get_unaligned_be16(&cmd->cmnd[2]); 4911 block_cnt = cmd->cmnd[4]; 4912 if (block_cnt == 0) 4913 block_cnt = 256; 4914 break; 4915 case WRITE_10: 4916 is_write = 1; 4917 case READ_10: 4918 first_block = 4919 (((u64) cmd->cmnd[2]) << 24) | 4920 (((u64) cmd->cmnd[3]) << 16) | 4921 (((u64) cmd->cmnd[4]) << 8) | 4922 cmd->cmnd[5]; 4923 block_cnt = 4924 (((u32) cmd->cmnd[7]) << 8) | 4925 cmd->cmnd[8]; 4926 break; 4927 case WRITE_12: 4928 is_write = 1; 4929 case READ_12: 4930 first_block = 4931 (((u64) cmd->cmnd[2]) << 24) | 4932 (((u64) cmd->cmnd[3]) << 16) | 4933 (((u64) cmd->cmnd[4]) << 8) | 4934 cmd->cmnd[5]; 4935 block_cnt = 4936 (((u32) cmd->cmnd[6]) << 24) | 4937 (((u32) cmd->cmnd[7]) << 16) | 4938 (((u32) cmd->cmnd[8]) << 8) | 4939 cmd->cmnd[9]; 4940 break; 4941 case WRITE_16: 4942 is_write = 1; 4943 case READ_16: 4944 first_block = 4945 (((u64) cmd->cmnd[2]) << 56) | 4946 (((u64) cmd->cmnd[3]) << 48) | 4947 (((u64) cmd->cmnd[4]) << 40) | 4948 (((u64) cmd->cmnd[5]) << 32) | 4949 (((u64) cmd->cmnd[6]) << 24) | 4950 (((u64) cmd->cmnd[7]) << 16) | 4951 (((u64) cmd->cmnd[8]) << 8) | 4952 cmd->cmnd[9]; 4953 block_cnt = 4954 (((u32) cmd->cmnd[10]) << 24) | 4955 (((u32) cmd->cmnd[11]) << 16) | 4956 (((u32) cmd->cmnd[12]) << 8) | 4957 cmd->cmnd[13]; 4958 break; 4959 default: 4960 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4961 } 4962 last_block = first_block + block_cnt - 1; 4963 4964 /* check for write to non-RAID-0 */ 4965 if (is_write && dev->raid_level != 0) 4966 return IO_ACCEL_INELIGIBLE; 4967 4968 /* check for invalid block or wraparound */ 4969 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 4970 last_block < first_block) 4971 return IO_ACCEL_INELIGIBLE; 4972 4973 /* calculate stripe information for the request */ 4974 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 4975 le16_to_cpu(map->strip_size); 4976 strip_size = le16_to_cpu(map->strip_size); 4977 #if BITS_PER_LONG == 32 4978 tmpdiv = first_block; 4979 (void) do_div(tmpdiv, blocks_per_row); 4980 first_row = tmpdiv; 4981 tmpdiv = last_block; 4982 (void) do_div(tmpdiv, blocks_per_row); 4983 last_row = tmpdiv; 4984 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4985 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4986 tmpdiv = first_row_offset; 4987 (void) do_div(tmpdiv, strip_size); 4988 first_column = tmpdiv; 4989 tmpdiv = last_row_offset; 4990 (void) do_div(tmpdiv, strip_size); 4991 last_column = tmpdiv; 4992 #else 4993 first_row = first_block / blocks_per_row; 4994 last_row = last_block / blocks_per_row; 4995 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4996 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4997 first_column = first_row_offset / strip_size; 4998 last_column = last_row_offset / strip_size; 4999 #endif 5000 5001 /* if this isn't a single row/column then give to the controller */ 5002 if ((first_row != last_row) || (first_column != last_column)) 5003 return IO_ACCEL_INELIGIBLE; 5004 5005 /* proceeding with driver mapping */ 5006 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5007 le16_to_cpu(map->metadata_disks_per_row); 5008 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5009 le16_to_cpu(map->row_cnt); 5010 map_index = (map_row * total_disks_per_row) + first_column; 5011 5012 switch (dev->raid_level) { 5013 case HPSA_RAID_0: 5014 break; /* nothing special to do */ 5015 case HPSA_RAID_1: 5016 /* Handles load balance across RAID 1 members. 5017 * (2-drive R1 and R10 with even # of drives.) 5018 * Appropriate for SSDs, not optimal for HDDs 5019 */ 5020 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5021 if (dev->offload_to_mirror) 5022 map_index += le16_to_cpu(map->data_disks_per_row); 5023 dev->offload_to_mirror = !dev->offload_to_mirror; 5024 break; 5025 case HPSA_RAID_ADM: 5026 /* Handles N-way mirrors (R1-ADM) 5027 * and R10 with # of drives divisible by 3.) 5028 */ 5029 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5030 5031 offload_to_mirror = dev->offload_to_mirror; 5032 raid_map_helper(map, offload_to_mirror, 5033 &map_index, ¤t_group); 5034 /* set mirror group to use next time */ 5035 offload_to_mirror = 5036 (offload_to_mirror >= 5037 le16_to_cpu(map->layout_map_count) - 1) 5038 ? 0 : offload_to_mirror + 1; 5039 dev->offload_to_mirror = offload_to_mirror; 5040 /* Avoid direct use of dev->offload_to_mirror within this 5041 * function since multiple threads might simultaneously 5042 * increment it beyond the range of dev->layout_map_count -1. 5043 */ 5044 break; 5045 case HPSA_RAID_5: 5046 case HPSA_RAID_6: 5047 if (le16_to_cpu(map->layout_map_count) <= 1) 5048 break; 5049 5050 /* Verify first and last block are in same RAID group */ 5051 r5or6_blocks_per_row = 5052 le16_to_cpu(map->strip_size) * 5053 le16_to_cpu(map->data_disks_per_row); 5054 BUG_ON(r5or6_blocks_per_row == 0); 5055 stripesize = r5or6_blocks_per_row * 5056 le16_to_cpu(map->layout_map_count); 5057 #if BITS_PER_LONG == 32 5058 tmpdiv = first_block; 5059 first_group = do_div(tmpdiv, stripesize); 5060 tmpdiv = first_group; 5061 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5062 first_group = tmpdiv; 5063 tmpdiv = last_block; 5064 last_group = do_div(tmpdiv, stripesize); 5065 tmpdiv = last_group; 5066 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5067 last_group = tmpdiv; 5068 #else 5069 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5070 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5071 #endif 5072 if (first_group != last_group) 5073 return IO_ACCEL_INELIGIBLE; 5074 5075 /* Verify request is in a single row of RAID 5/6 */ 5076 #if BITS_PER_LONG == 32 5077 tmpdiv = first_block; 5078 (void) do_div(tmpdiv, stripesize); 5079 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5080 tmpdiv = last_block; 5081 (void) do_div(tmpdiv, stripesize); 5082 r5or6_last_row = r0_last_row = tmpdiv; 5083 #else 5084 first_row = r5or6_first_row = r0_first_row = 5085 first_block / stripesize; 5086 r5or6_last_row = r0_last_row = last_block / stripesize; 5087 #endif 5088 if (r5or6_first_row != r5or6_last_row) 5089 return IO_ACCEL_INELIGIBLE; 5090 5091 5092 /* Verify request is in a single column */ 5093 #if BITS_PER_LONG == 32 5094 tmpdiv = first_block; 5095 first_row_offset = do_div(tmpdiv, stripesize); 5096 tmpdiv = first_row_offset; 5097 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5098 r5or6_first_row_offset = first_row_offset; 5099 tmpdiv = last_block; 5100 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5101 tmpdiv = r5or6_last_row_offset; 5102 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5103 tmpdiv = r5or6_first_row_offset; 5104 (void) do_div(tmpdiv, map->strip_size); 5105 first_column = r5or6_first_column = tmpdiv; 5106 tmpdiv = r5or6_last_row_offset; 5107 (void) do_div(tmpdiv, map->strip_size); 5108 r5or6_last_column = tmpdiv; 5109 #else 5110 first_row_offset = r5or6_first_row_offset = 5111 (u32)((first_block % stripesize) % 5112 r5or6_blocks_per_row); 5113 5114 r5or6_last_row_offset = 5115 (u32)((last_block % stripesize) % 5116 r5or6_blocks_per_row); 5117 5118 first_column = r5or6_first_column = 5119 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5120 r5or6_last_column = 5121 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5122 #endif 5123 if (r5or6_first_column != r5or6_last_column) 5124 return IO_ACCEL_INELIGIBLE; 5125 5126 /* Request is eligible */ 5127 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5128 le16_to_cpu(map->row_cnt); 5129 5130 map_index = (first_group * 5131 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5132 (map_row * total_disks_per_row) + first_column; 5133 break; 5134 default: 5135 return IO_ACCEL_INELIGIBLE; 5136 } 5137 5138 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5139 return IO_ACCEL_INELIGIBLE; 5140 5141 c->phys_disk = dev->phys_disk[map_index]; 5142 if (!c->phys_disk) 5143 return IO_ACCEL_INELIGIBLE; 5144 5145 disk_handle = dd[map_index].ioaccel_handle; 5146 disk_block = le64_to_cpu(map->disk_starting_blk) + 5147 first_row * le16_to_cpu(map->strip_size) + 5148 (first_row_offset - first_column * 5149 le16_to_cpu(map->strip_size)); 5150 disk_block_cnt = block_cnt; 5151 5152 /* handle differing logical/physical block sizes */ 5153 if (map->phys_blk_shift) { 5154 disk_block <<= map->phys_blk_shift; 5155 disk_block_cnt <<= map->phys_blk_shift; 5156 } 5157 BUG_ON(disk_block_cnt > 0xffff); 5158 5159 /* build the new CDB for the physical disk I/O */ 5160 if (disk_block > 0xffffffff) { 5161 cdb[0] = is_write ? WRITE_16 : READ_16; 5162 cdb[1] = 0; 5163 cdb[2] = (u8) (disk_block >> 56); 5164 cdb[3] = (u8) (disk_block >> 48); 5165 cdb[4] = (u8) (disk_block >> 40); 5166 cdb[5] = (u8) (disk_block >> 32); 5167 cdb[6] = (u8) (disk_block >> 24); 5168 cdb[7] = (u8) (disk_block >> 16); 5169 cdb[8] = (u8) (disk_block >> 8); 5170 cdb[9] = (u8) (disk_block); 5171 cdb[10] = (u8) (disk_block_cnt >> 24); 5172 cdb[11] = (u8) (disk_block_cnt >> 16); 5173 cdb[12] = (u8) (disk_block_cnt >> 8); 5174 cdb[13] = (u8) (disk_block_cnt); 5175 cdb[14] = 0; 5176 cdb[15] = 0; 5177 cdb_len = 16; 5178 } else { 5179 cdb[0] = is_write ? WRITE_10 : READ_10; 5180 cdb[1] = 0; 5181 cdb[2] = (u8) (disk_block >> 24); 5182 cdb[3] = (u8) (disk_block >> 16); 5183 cdb[4] = (u8) (disk_block >> 8); 5184 cdb[5] = (u8) (disk_block); 5185 cdb[6] = 0; 5186 cdb[7] = (u8) (disk_block_cnt >> 8); 5187 cdb[8] = (u8) (disk_block_cnt); 5188 cdb[9] = 0; 5189 cdb_len = 10; 5190 } 5191 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5192 dev->scsi3addr, 5193 dev->phys_disk[map_index]); 5194 } 5195 5196 /* 5197 * Submit commands down the "normal" RAID stack path 5198 * All callers to hpsa_ciss_submit must check lockup_detected 5199 * beforehand, before (opt.) and after calling cmd_alloc 5200 */ 5201 static int hpsa_ciss_submit(struct ctlr_info *h, 5202 struct CommandList *c, struct scsi_cmnd *cmd, 5203 unsigned char scsi3addr[]) 5204 { 5205 cmd->host_scribble = (unsigned char *) c; 5206 c->cmd_type = CMD_SCSI; 5207 c->scsi_cmd = cmd; 5208 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5209 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5210 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5211 5212 /* Fill in the request block... */ 5213 5214 c->Request.Timeout = 0; 5215 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5216 c->Request.CDBLen = cmd->cmd_len; 5217 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5218 switch (cmd->sc_data_direction) { 5219 case DMA_TO_DEVICE: 5220 c->Request.type_attr_dir = 5221 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5222 break; 5223 case DMA_FROM_DEVICE: 5224 c->Request.type_attr_dir = 5225 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5226 break; 5227 case DMA_NONE: 5228 c->Request.type_attr_dir = 5229 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5230 break; 5231 case DMA_BIDIRECTIONAL: 5232 /* This can happen if a buggy application does a scsi passthru 5233 * and sets both inlen and outlen to non-zero. ( see 5234 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5235 */ 5236 5237 c->Request.type_attr_dir = 5238 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5239 /* This is technically wrong, and hpsa controllers should 5240 * reject it with CMD_INVALID, which is the most correct 5241 * response, but non-fibre backends appear to let it 5242 * slide by, and give the same results as if this field 5243 * were set correctly. Either way is acceptable for 5244 * our purposes here. 5245 */ 5246 5247 break; 5248 5249 default: 5250 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5251 cmd->sc_data_direction); 5252 BUG(); 5253 break; 5254 } 5255 5256 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5257 hpsa_cmd_resolve_and_free(h, c); 5258 return SCSI_MLQUEUE_HOST_BUSY; 5259 } 5260 enqueue_cmd_and_start_io(h, c); 5261 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5262 return 0; 5263 } 5264 5265 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5266 struct CommandList *c) 5267 { 5268 dma_addr_t cmd_dma_handle, err_dma_handle; 5269 5270 /* Zero out all of commandlist except the last field, refcount */ 5271 memset(c, 0, offsetof(struct CommandList, refcount)); 5272 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5273 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5274 c->err_info = h->errinfo_pool + index; 5275 memset(c->err_info, 0, sizeof(*c->err_info)); 5276 err_dma_handle = h->errinfo_pool_dhandle 5277 + index * sizeof(*c->err_info); 5278 c->cmdindex = index; 5279 c->busaddr = (u32) cmd_dma_handle; 5280 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5281 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5282 c->h = h; 5283 c->scsi_cmd = SCSI_CMD_IDLE; 5284 } 5285 5286 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5287 { 5288 int i; 5289 5290 for (i = 0; i < h->nr_cmds; i++) { 5291 struct CommandList *c = h->cmd_pool + i; 5292 5293 hpsa_cmd_init(h, i, c); 5294 atomic_set(&c->refcount, 0); 5295 } 5296 } 5297 5298 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5299 struct CommandList *c) 5300 { 5301 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5302 5303 BUG_ON(c->cmdindex != index); 5304 5305 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5306 memset(c->err_info, 0, sizeof(*c->err_info)); 5307 c->busaddr = (u32) cmd_dma_handle; 5308 } 5309 5310 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5311 struct CommandList *c, struct scsi_cmnd *cmd, 5312 unsigned char *scsi3addr) 5313 { 5314 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5315 int rc = IO_ACCEL_INELIGIBLE; 5316 5317 cmd->host_scribble = (unsigned char *) c; 5318 5319 if (dev->offload_enabled) { 5320 hpsa_cmd_init(h, c->cmdindex, c); 5321 c->cmd_type = CMD_SCSI; 5322 c->scsi_cmd = cmd; 5323 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5324 if (rc < 0) /* scsi_dma_map failed. */ 5325 rc = SCSI_MLQUEUE_HOST_BUSY; 5326 } else if (dev->hba_ioaccel_enabled) { 5327 hpsa_cmd_init(h, c->cmdindex, c); 5328 c->cmd_type = CMD_SCSI; 5329 c->scsi_cmd = cmd; 5330 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5331 if (rc < 0) /* scsi_dma_map failed. */ 5332 rc = SCSI_MLQUEUE_HOST_BUSY; 5333 } 5334 return rc; 5335 } 5336 5337 static void hpsa_command_resubmit_worker(struct work_struct *work) 5338 { 5339 struct scsi_cmnd *cmd; 5340 struct hpsa_scsi_dev_t *dev; 5341 struct CommandList *c = container_of(work, struct CommandList, work); 5342 5343 cmd = c->scsi_cmd; 5344 dev = cmd->device->hostdata; 5345 if (!dev) { 5346 cmd->result = DID_NO_CONNECT << 16; 5347 return hpsa_cmd_free_and_done(c->h, c, cmd); 5348 } 5349 if (c->reset_pending) 5350 return hpsa_cmd_resolve_and_free(c->h, c); 5351 if (c->abort_pending) 5352 return hpsa_cmd_abort_and_free(c->h, c, cmd); 5353 if (c->cmd_type == CMD_IOACCEL2) { 5354 struct ctlr_info *h = c->h; 5355 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5356 int rc; 5357 5358 if (c2->error_data.serv_response == 5359 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5360 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5361 if (rc == 0) 5362 return; 5363 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5364 /* 5365 * If we get here, it means dma mapping failed. 5366 * Try again via scsi mid layer, which will 5367 * then get SCSI_MLQUEUE_HOST_BUSY. 5368 */ 5369 cmd->result = DID_IMM_RETRY << 16; 5370 return hpsa_cmd_free_and_done(h, c, cmd); 5371 } 5372 /* else, fall thru and resubmit down CISS path */ 5373 } 5374 } 5375 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5376 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5377 /* 5378 * If we get here, it means dma mapping failed. Try 5379 * again via scsi mid layer, which will then get 5380 * SCSI_MLQUEUE_HOST_BUSY. 5381 * 5382 * hpsa_ciss_submit will have already freed c 5383 * if it encountered a dma mapping failure. 5384 */ 5385 cmd->result = DID_IMM_RETRY << 16; 5386 cmd->scsi_done(cmd); 5387 } 5388 } 5389 5390 /* Running in struct Scsi_Host->host_lock less mode */ 5391 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5392 { 5393 struct ctlr_info *h; 5394 struct hpsa_scsi_dev_t *dev; 5395 unsigned char scsi3addr[8]; 5396 struct CommandList *c; 5397 int rc = 0; 5398 5399 /* Get the ptr to our adapter structure out of cmd->host. */ 5400 h = sdev_to_hba(cmd->device); 5401 5402 BUG_ON(cmd->request->tag < 0); 5403 5404 dev = cmd->device->hostdata; 5405 if (!dev) { 5406 cmd->result = NOT_READY << 16; /* host byte */ 5407 cmd->scsi_done(cmd); 5408 return 0; 5409 } 5410 5411 if (dev->removed) { 5412 cmd->result = DID_NO_CONNECT << 16; 5413 cmd->scsi_done(cmd); 5414 return 0; 5415 } 5416 5417 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5418 5419 if (unlikely(lockup_detected(h))) { 5420 cmd->result = DID_NO_CONNECT << 16; 5421 cmd->scsi_done(cmd); 5422 return 0; 5423 } 5424 c = cmd_tagged_alloc(h, cmd); 5425 5426 /* 5427 * Call alternate submit routine for I/O accelerated commands. 5428 * Retries always go down the normal I/O path. 5429 */ 5430 if (likely(cmd->retries == 0 && 5431 cmd->request->cmd_type == REQ_TYPE_FS && 5432 h->acciopath_status)) { 5433 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5434 if (rc == 0) 5435 return 0; 5436 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5437 hpsa_cmd_resolve_and_free(h, c); 5438 return SCSI_MLQUEUE_HOST_BUSY; 5439 } 5440 } 5441 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5442 } 5443 5444 static void hpsa_scan_complete(struct ctlr_info *h) 5445 { 5446 unsigned long flags; 5447 5448 spin_lock_irqsave(&h->scan_lock, flags); 5449 h->scan_finished = 1; 5450 wake_up_all(&h->scan_wait_queue); 5451 spin_unlock_irqrestore(&h->scan_lock, flags); 5452 } 5453 5454 static void hpsa_scan_start(struct Scsi_Host *sh) 5455 { 5456 struct ctlr_info *h = shost_to_hba(sh); 5457 unsigned long flags; 5458 5459 /* 5460 * Don't let rescans be initiated on a controller known to be locked 5461 * up. If the controller locks up *during* a rescan, that thread is 5462 * probably hosed, but at least we can prevent new rescan threads from 5463 * piling up on a locked up controller. 5464 */ 5465 if (unlikely(lockup_detected(h))) 5466 return hpsa_scan_complete(h); 5467 5468 /* wait until any scan already in progress is finished. */ 5469 while (1) { 5470 spin_lock_irqsave(&h->scan_lock, flags); 5471 if (h->scan_finished) 5472 break; 5473 spin_unlock_irqrestore(&h->scan_lock, flags); 5474 wait_event(h->scan_wait_queue, h->scan_finished); 5475 /* Note: We don't need to worry about a race between this 5476 * thread and driver unload because the midlayer will 5477 * have incremented the reference count, so unload won't 5478 * happen if we're in here. 5479 */ 5480 } 5481 h->scan_finished = 0; /* mark scan as in progress */ 5482 spin_unlock_irqrestore(&h->scan_lock, flags); 5483 5484 if (unlikely(lockup_detected(h))) 5485 return hpsa_scan_complete(h); 5486 5487 hpsa_update_scsi_devices(h); 5488 5489 hpsa_scan_complete(h); 5490 } 5491 5492 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5493 { 5494 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5495 5496 if (!logical_drive) 5497 return -ENODEV; 5498 5499 if (qdepth < 1) 5500 qdepth = 1; 5501 else if (qdepth > logical_drive->queue_depth) 5502 qdepth = logical_drive->queue_depth; 5503 5504 return scsi_change_queue_depth(sdev, qdepth); 5505 } 5506 5507 static int hpsa_scan_finished(struct Scsi_Host *sh, 5508 unsigned long elapsed_time) 5509 { 5510 struct ctlr_info *h = shost_to_hba(sh); 5511 unsigned long flags; 5512 int finished; 5513 5514 spin_lock_irqsave(&h->scan_lock, flags); 5515 finished = h->scan_finished; 5516 spin_unlock_irqrestore(&h->scan_lock, flags); 5517 return finished; 5518 } 5519 5520 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5521 { 5522 struct Scsi_Host *sh; 5523 5524 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5525 if (sh == NULL) { 5526 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5527 return -ENOMEM; 5528 } 5529 5530 sh->io_port = 0; 5531 sh->n_io_port = 0; 5532 sh->this_id = -1; 5533 sh->max_channel = 3; 5534 sh->max_cmd_len = MAX_COMMAND_SIZE; 5535 sh->max_lun = HPSA_MAX_LUN; 5536 sh->max_id = HPSA_MAX_LUN; 5537 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5538 sh->cmd_per_lun = sh->can_queue; 5539 sh->sg_tablesize = h->maxsgentries; 5540 sh->transportt = hpsa_sas_transport_template; 5541 sh->hostdata[0] = (unsigned long) h; 5542 sh->irq = h->intr[h->intr_mode]; 5543 sh->unique_id = sh->irq; 5544 5545 h->scsi_host = sh; 5546 return 0; 5547 } 5548 5549 static int hpsa_scsi_add_host(struct ctlr_info *h) 5550 { 5551 int rv; 5552 5553 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5554 if (rv) { 5555 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5556 return rv; 5557 } 5558 scsi_scan_host(h->scsi_host); 5559 return 0; 5560 } 5561 5562 /* 5563 * The block layer has already gone to the trouble of picking out a unique, 5564 * small-integer tag for this request. We use an offset from that value as 5565 * an index to select our command block. (The offset allows us to reserve the 5566 * low-numbered entries for our own uses.) 5567 */ 5568 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5569 { 5570 int idx = scmd->request->tag; 5571 5572 if (idx < 0) 5573 return idx; 5574 5575 /* Offset to leave space for internal cmds. */ 5576 return idx += HPSA_NRESERVED_CMDS; 5577 } 5578 5579 /* 5580 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5581 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5582 */ 5583 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5584 struct CommandList *c, unsigned char lunaddr[], 5585 int reply_queue) 5586 { 5587 int rc; 5588 5589 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5590 (void) fill_cmd(c, TEST_UNIT_READY, h, 5591 NULL, 0, 0, lunaddr, TYPE_CMD); 5592 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5593 if (rc) 5594 return rc; 5595 /* no unmap needed here because no data xfer. */ 5596 5597 /* Check if the unit is already ready. */ 5598 if (c->err_info->CommandStatus == CMD_SUCCESS) 5599 return 0; 5600 5601 /* 5602 * The first command sent after reset will receive "unit attention" to 5603 * indicate that the LUN has been reset...this is actually what we're 5604 * looking for (but, success is good too). 5605 */ 5606 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5607 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5608 (c->err_info->SenseInfo[2] == NO_SENSE || 5609 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5610 return 0; 5611 5612 return 1; 5613 } 5614 5615 /* 5616 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5617 * returns zero when the unit is ready, and non-zero when giving up. 5618 */ 5619 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5620 struct CommandList *c, 5621 unsigned char lunaddr[], int reply_queue) 5622 { 5623 int rc; 5624 int count = 0; 5625 int waittime = 1; /* seconds */ 5626 5627 /* Send test unit ready until device ready, or give up. */ 5628 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5629 5630 /* 5631 * Wait for a bit. do this first, because if we send 5632 * the TUR right away, the reset will just abort it. 5633 */ 5634 msleep(1000 * waittime); 5635 5636 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5637 if (!rc) 5638 break; 5639 5640 /* Increase wait time with each try, up to a point. */ 5641 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5642 waittime *= 2; 5643 5644 dev_warn(&h->pdev->dev, 5645 "waiting %d secs for device to become ready.\n", 5646 waittime); 5647 } 5648 5649 return rc; 5650 } 5651 5652 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5653 unsigned char lunaddr[], 5654 int reply_queue) 5655 { 5656 int first_queue; 5657 int last_queue; 5658 int rq; 5659 int rc = 0; 5660 struct CommandList *c; 5661 5662 c = cmd_alloc(h); 5663 5664 /* 5665 * If no specific reply queue was requested, then send the TUR 5666 * repeatedly, requesting a reply on each reply queue; otherwise execute 5667 * the loop exactly once using only the specified queue. 5668 */ 5669 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5670 first_queue = 0; 5671 last_queue = h->nreply_queues - 1; 5672 } else { 5673 first_queue = reply_queue; 5674 last_queue = reply_queue; 5675 } 5676 5677 for (rq = first_queue; rq <= last_queue; rq++) { 5678 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5679 if (rc) 5680 break; 5681 } 5682 5683 if (rc) 5684 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5685 else 5686 dev_warn(&h->pdev->dev, "device is ready.\n"); 5687 5688 cmd_free(h, c); 5689 return rc; 5690 } 5691 5692 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5693 * complaining. Doing a host- or bus-reset can't do anything good here. 5694 */ 5695 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5696 { 5697 int rc; 5698 struct ctlr_info *h; 5699 struct hpsa_scsi_dev_t *dev; 5700 u8 reset_type; 5701 char msg[48]; 5702 5703 /* find the controller to which the command to be aborted was sent */ 5704 h = sdev_to_hba(scsicmd->device); 5705 if (h == NULL) /* paranoia */ 5706 return FAILED; 5707 5708 if (lockup_detected(h)) 5709 return FAILED; 5710 5711 dev = scsicmd->device->hostdata; 5712 if (!dev) { 5713 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5714 return FAILED; 5715 } 5716 5717 /* if controller locked up, we can guarantee command won't complete */ 5718 if (lockup_detected(h)) { 5719 snprintf(msg, sizeof(msg), 5720 "cmd %d RESET FAILED, lockup detected", 5721 hpsa_get_cmd_index(scsicmd)); 5722 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5723 return FAILED; 5724 } 5725 5726 /* this reset request might be the result of a lockup; check */ 5727 if (detect_controller_lockup(h)) { 5728 snprintf(msg, sizeof(msg), 5729 "cmd %d RESET FAILED, new lockup detected", 5730 hpsa_get_cmd_index(scsicmd)); 5731 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5732 return FAILED; 5733 } 5734 5735 /* Do not attempt on controller */ 5736 if (is_hba_lunid(dev->scsi3addr)) 5737 return SUCCESS; 5738 5739 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5740 reset_type = HPSA_DEVICE_RESET_MSG; 5741 else 5742 reset_type = HPSA_PHYS_TARGET_RESET; 5743 5744 sprintf(msg, "resetting %s", 5745 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5746 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5747 5748 h->reset_in_progress = 1; 5749 5750 /* send a reset to the SCSI LUN which the command was sent to */ 5751 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5752 DEFAULT_REPLY_QUEUE); 5753 sprintf(msg, "reset %s %s", 5754 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5755 rc == 0 ? "completed successfully" : "failed"); 5756 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5757 h->reset_in_progress = 0; 5758 return rc == 0 ? SUCCESS : FAILED; 5759 } 5760 5761 static void swizzle_abort_tag(u8 *tag) 5762 { 5763 u8 original_tag[8]; 5764 5765 memcpy(original_tag, tag, 8); 5766 tag[0] = original_tag[3]; 5767 tag[1] = original_tag[2]; 5768 tag[2] = original_tag[1]; 5769 tag[3] = original_tag[0]; 5770 tag[4] = original_tag[7]; 5771 tag[5] = original_tag[6]; 5772 tag[6] = original_tag[5]; 5773 tag[7] = original_tag[4]; 5774 } 5775 5776 static void hpsa_get_tag(struct ctlr_info *h, 5777 struct CommandList *c, __le32 *taglower, __le32 *tagupper) 5778 { 5779 u64 tag; 5780 if (c->cmd_type == CMD_IOACCEL1) { 5781 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 5782 &h->ioaccel_cmd_pool[c->cmdindex]; 5783 tag = le64_to_cpu(cm1->tag); 5784 *tagupper = cpu_to_le32(tag >> 32); 5785 *taglower = cpu_to_le32(tag); 5786 return; 5787 } 5788 if (c->cmd_type == CMD_IOACCEL2) { 5789 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 5790 &h->ioaccel2_cmd_pool[c->cmdindex]; 5791 /* upper tag not used in ioaccel2 mode */ 5792 memset(tagupper, 0, sizeof(*tagupper)); 5793 *taglower = cm2->Tag; 5794 return; 5795 } 5796 tag = le64_to_cpu(c->Header.tag); 5797 *tagupper = cpu_to_le32(tag >> 32); 5798 *taglower = cpu_to_le32(tag); 5799 } 5800 5801 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 5802 struct CommandList *abort, int reply_queue) 5803 { 5804 int rc = IO_OK; 5805 struct CommandList *c; 5806 struct ErrorInfo *ei; 5807 __le32 tagupper, taglower; 5808 5809 c = cmd_alloc(h); 5810 5811 /* fill_cmd can't fail here, no buffer to map */ 5812 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5813 0, 0, scsi3addr, TYPE_MSG); 5814 if (h->needs_abort_tags_swizzled) 5815 swizzle_abort_tag(&c->Request.CDB[4]); 5816 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5817 hpsa_get_tag(h, abort, &taglower, &tagupper); 5818 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 5819 __func__, tagupper, taglower); 5820 /* no unmap needed here because no data xfer. */ 5821 5822 ei = c->err_info; 5823 switch (ei->CommandStatus) { 5824 case CMD_SUCCESS: 5825 break; 5826 case CMD_TMF_STATUS: 5827 rc = hpsa_evaluate_tmf_status(h, c); 5828 break; 5829 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 5830 rc = -1; 5831 break; 5832 default: 5833 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 5834 __func__, tagupper, taglower); 5835 hpsa_scsi_interpret_error(h, c); 5836 rc = -1; 5837 break; 5838 } 5839 cmd_free(h, c); 5840 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5841 __func__, tagupper, taglower); 5842 return rc; 5843 } 5844 5845 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 5846 struct CommandList *command_to_abort, int reply_queue) 5847 { 5848 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5849 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 5850 struct io_accel2_cmd *c2a = 5851 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5852 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 5853 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 5854 5855 /* 5856 * We're overlaying struct hpsa_tmf_struct on top of something which 5857 * was allocated as a struct io_accel2_cmd, so we better be sure it 5858 * actually fits, and doesn't overrun the error info space. 5859 */ 5860 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 5861 sizeof(struct io_accel2_cmd)); 5862 BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 5863 offsetof(struct hpsa_tmf_struct, error_len) + 5864 sizeof(ac->error_len)); 5865 5866 c->cmd_type = IOACCEL2_TMF; 5867 c->scsi_cmd = SCSI_CMD_BUSY; 5868 5869 /* Adjust the DMA address to point to the accelerated command buffer */ 5870 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 5871 (c->cmdindex * sizeof(struct io_accel2_cmd)); 5872 BUG_ON(c->busaddr & 0x0000007F); 5873 5874 memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 5875 ac->iu_type = IOACCEL2_IU_TMF_TYPE; 5876 ac->reply_queue = reply_queue; 5877 ac->tmf = IOACCEL2_TMF_ABORT; 5878 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 5879 memset(ac->lun_id, 0, sizeof(ac->lun_id)); 5880 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 5881 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 5882 ac->error_ptr = cpu_to_le64(c->busaddr + 5883 offsetof(struct io_accel2_cmd, error_data)); 5884 ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 5885 } 5886 5887 /* ioaccel2 path firmware cannot handle abort task requests. 5888 * Change abort requests to physical target reset, and send to the 5889 * address of the physical disk used for the ioaccel 2 command. 5890 * Return 0 on success (IO_OK) 5891 * -1 on failure 5892 */ 5893 5894 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 5895 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 5896 { 5897 int rc = IO_OK; 5898 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 5899 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 5900 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 5901 unsigned char *psa = &phys_scsi3addr[0]; 5902 5903 /* Get a pointer to the hpsa logical device. */ 5904 scmd = abort->scsi_cmd; 5905 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 5906 if (dev == NULL) { 5907 dev_warn(&h->pdev->dev, 5908 "Cannot abort: no device pointer for command.\n"); 5909 return -1; /* not abortable */ 5910 } 5911 5912 if (h->raid_offload_debug > 0) 5913 dev_info(&h->pdev->dev, 5914 "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 5915 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 5916 "Reset as abort", 5917 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 5918 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 5919 5920 if (!dev->offload_enabled) { 5921 dev_warn(&h->pdev->dev, 5922 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 5923 return -1; /* not abortable */ 5924 } 5925 5926 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 5927 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 5928 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 5929 return -1; /* not abortable */ 5930 } 5931 5932 /* send the reset */ 5933 if (h->raid_offload_debug > 0) 5934 dev_info(&h->pdev->dev, 5935 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 5936 psa[0], psa[1], psa[2], psa[3], 5937 psa[4], psa[5], psa[6], psa[7]); 5938 rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 5939 if (rc != 0) { 5940 dev_warn(&h->pdev->dev, 5941 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 5942 psa[0], psa[1], psa[2], psa[3], 5943 psa[4], psa[5], psa[6], psa[7]); 5944 return rc; /* failed to reset */ 5945 } 5946 5947 /* wait for device to recover */ 5948 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 5949 dev_warn(&h->pdev->dev, 5950 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 5951 psa[0], psa[1], psa[2], psa[3], 5952 psa[4], psa[5], psa[6], psa[7]); 5953 return -1; /* failed to recover */ 5954 } 5955 5956 /* device recovered */ 5957 dev_info(&h->pdev->dev, 5958 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 5959 psa[0], psa[1], psa[2], psa[3], 5960 psa[4], psa[5], psa[6], psa[7]); 5961 5962 return rc; /* success */ 5963 } 5964 5965 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 5966 struct CommandList *abort, int reply_queue) 5967 { 5968 int rc = IO_OK; 5969 struct CommandList *c; 5970 __le32 taglower, tagupper; 5971 struct hpsa_scsi_dev_t *dev; 5972 struct io_accel2_cmd *c2; 5973 5974 dev = abort->scsi_cmd->device->hostdata; 5975 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 5976 return -1; 5977 5978 c = cmd_alloc(h); 5979 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 5980 c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5981 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5982 hpsa_get_tag(h, abort, &taglower, &tagupper); 5983 dev_dbg(&h->pdev->dev, 5984 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 5985 __func__, tagupper, taglower); 5986 /* no unmap needed here because no data xfer. */ 5987 5988 dev_dbg(&h->pdev->dev, 5989 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 5990 __func__, tagupper, taglower, c2->error_data.serv_response); 5991 switch (c2->error_data.serv_response) { 5992 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 5993 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 5994 rc = 0; 5995 break; 5996 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 5997 case IOACCEL2_SERV_RESPONSE_FAILURE: 5998 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 5999 rc = -1; 6000 break; 6001 default: 6002 dev_warn(&h->pdev->dev, 6003 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 6004 __func__, tagupper, taglower, 6005 c2->error_data.serv_response); 6006 rc = -1; 6007 } 6008 cmd_free(h, c); 6009 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 6010 tagupper, taglower); 6011 return rc; 6012 } 6013 6014 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 6015 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 6016 { 6017 /* 6018 * ioccelerator mode 2 commands should be aborted via the 6019 * accelerated path, since RAID path is unaware of these commands, 6020 * but not all underlying firmware can handle abort TMF. 6021 * Change abort to physical device reset when abort TMF is unsupported. 6022 */ 6023 if (abort->cmd_type == CMD_IOACCEL2) { 6024 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 6025 dev->physical_device) 6026 return hpsa_send_abort_ioaccel2(h, abort, 6027 reply_queue); 6028 else 6029 return hpsa_send_reset_as_abort_ioaccel2(h, 6030 dev->scsi3addr, 6031 abort, reply_queue); 6032 } 6033 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 6034 } 6035 6036 /* Find out which reply queue a command was meant to return on */ 6037 static int hpsa_extract_reply_queue(struct ctlr_info *h, 6038 struct CommandList *c) 6039 { 6040 if (c->cmd_type == CMD_IOACCEL2) 6041 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 6042 return c->Header.ReplyQueue; 6043 } 6044 6045 /* 6046 * Limit concurrency of abort commands to prevent 6047 * over-subscription of commands 6048 */ 6049 static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 6050 { 6051 #define ABORT_CMD_WAIT_MSECS 5000 6052 return !wait_event_timeout(h->abort_cmd_wait_queue, 6053 atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 6054 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 6055 } 6056 6057 /* Send an abort for the specified command. 6058 * If the device and controller support it, 6059 * send a task abort request. 6060 */ 6061 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 6062 { 6063 6064 int rc; 6065 struct ctlr_info *h; 6066 struct hpsa_scsi_dev_t *dev; 6067 struct CommandList *abort; /* pointer to command to be aborted */ 6068 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 6069 char msg[256]; /* For debug messaging. */ 6070 int ml = 0; 6071 __le32 tagupper, taglower; 6072 int refcount, reply_queue; 6073 6074 if (sc == NULL) 6075 return FAILED; 6076 6077 if (sc->device == NULL) 6078 return FAILED; 6079 6080 /* Find the controller of the command to be aborted */ 6081 h = sdev_to_hba(sc->device); 6082 if (h == NULL) 6083 return FAILED; 6084 6085 /* Find the device of the command to be aborted */ 6086 dev = sc->device->hostdata; 6087 if (!dev) { 6088 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 6089 msg); 6090 return FAILED; 6091 } 6092 6093 /* If controller locked up, we can guarantee command won't complete */ 6094 if (lockup_detected(h)) { 6095 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6096 "ABORT FAILED, lockup detected"); 6097 return FAILED; 6098 } 6099 6100 /* This is a good time to check if controller lockup has occurred */ 6101 if (detect_controller_lockup(h)) { 6102 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6103 "ABORT FAILED, new lockup detected"); 6104 return FAILED; 6105 } 6106 6107 /* Check that controller supports some kind of task abort */ 6108 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 6109 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6110 return FAILED; 6111 6112 memset(msg, 0, sizeof(msg)); 6113 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 6114 h->scsi_host->host_no, sc->device->channel, 6115 sc->device->id, sc->device->lun, 6116 "Aborting command", sc); 6117 6118 /* Get SCSI command to be aborted */ 6119 abort = (struct CommandList *) sc->host_scribble; 6120 if (abort == NULL) { 6121 /* This can happen if the command already completed. */ 6122 return SUCCESS; 6123 } 6124 refcount = atomic_inc_return(&abort->refcount); 6125 if (refcount == 1) { /* Command is done already. */ 6126 cmd_free(h, abort); 6127 return SUCCESS; 6128 } 6129 6130 /* Don't bother trying the abort if we know it won't work. */ 6131 if (abort->cmd_type != CMD_IOACCEL2 && 6132 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 6133 cmd_free(h, abort); 6134 return FAILED; 6135 } 6136 6137 /* 6138 * Check that we're aborting the right command. 6139 * It's possible the CommandList already completed and got re-used. 6140 */ 6141 if (abort->scsi_cmd != sc) { 6142 cmd_free(h, abort); 6143 return SUCCESS; 6144 } 6145 6146 abort->abort_pending = true; 6147 hpsa_get_tag(h, abort, &taglower, &tagupper); 6148 reply_queue = hpsa_extract_reply_queue(h, abort); 6149 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 6150 as = abort->scsi_cmd; 6151 if (as != NULL) 6152 ml += sprintf(msg+ml, 6153 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 6154 as->cmd_len, as->cmnd[0], as->cmnd[1], 6155 as->serial_number); 6156 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 6157 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 6158 6159 /* 6160 * Command is in flight, or possibly already completed 6161 * by the firmware (but not to the scsi mid layer) but we can't 6162 * distinguish which. Send the abort down. 6163 */ 6164 if (wait_for_available_abort_cmd(h)) { 6165 dev_warn(&h->pdev->dev, 6166 "%s FAILED, timeout waiting for an abort command to become available.\n", 6167 msg); 6168 cmd_free(h, abort); 6169 return FAILED; 6170 } 6171 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 6172 atomic_inc(&h->abort_cmds_available); 6173 wake_up_all(&h->abort_cmd_wait_queue); 6174 if (rc != 0) { 6175 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 6176 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6177 "FAILED to abort command"); 6178 cmd_free(h, abort); 6179 return FAILED; 6180 } 6181 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6182 wait_event(h->event_sync_wait_queue, 6183 abort->scsi_cmd != sc || lockup_detected(h)); 6184 cmd_free(h, abort); 6185 return !lockup_detected(h) ? SUCCESS : FAILED; 6186 } 6187 6188 /* 6189 * For operations with an associated SCSI command, a command block is allocated 6190 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6191 * block request tag as an index into a table of entries. cmd_tagged_free() is 6192 * the complement, although cmd_free() may be called instead. 6193 */ 6194 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6195 struct scsi_cmnd *scmd) 6196 { 6197 int idx = hpsa_get_cmd_index(scmd); 6198 struct CommandList *c = h->cmd_pool + idx; 6199 6200 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6201 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6202 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6203 /* The index value comes from the block layer, so if it's out of 6204 * bounds, it's probably not our bug. 6205 */ 6206 BUG(); 6207 } 6208 6209 atomic_inc(&c->refcount); 6210 if (unlikely(!hpsa_is_cmd_idle(c))) { 6211 /* 6212 * We expect that the SCSI layer will hand us a unique tag 6213 * value. Thus, there should never be a collision here between 6214 * two requests...because if the selected command isn't idle 6215 * then someone is going to be very disappointed. 6216 */ 6217 dev_err(&h->pdev->dev, 6218 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6219 idx); 6220 if (c->scsi_cmd != NULL) 6221 scsi_print_command(c->scsi_cmd); 6222 scsi_print_command(scmd); 6223 } 6224 6225 hpsa_cmd_partial_init(h, idx, c); 6226 return c; 6227 } 6228 6229 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6230 { 6231 /* 6232 * Release our reference to the block. We don't need to do anything 6233 * else to free it, because it is accessed by index. (There's no point 6234 * in checking the result of the decrement, since we cannot guarantee 6235 * that there isn't a concurrent abort which is also accessing it.) 6236 */ 6237 (void)atomic_dec(&c->refcount); 6238 } 6239 6240 /* 6241 * For operations that cannot sleep, a command block is allocated at init, 6242 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6243 * which ones are free or in use. Lock must be held when calling this. 6244 * cmd_free() is the complement. 6245 * This function never gives up and returns NULL. If it hangs, 6246 * another thread must call cmd_free() to free some tags. 6247 */ 6248 6249 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6250 { 6251 struct CommandList *c; 6252 int refcount, i; 6253 int offset = 0; 6254 6255 /* 6256 * There is some *extremely* small but non-zero chance that that 6257 * multiple threads could get in here, and one thread could 6258 * be scanning through the list of bits looking for a free 6259 * one, but the free ones are always behind him, and other 6260 * threads sneak in behind him and eat them before he can 6261 * get to them, so that while there is always a free one, a 6262 * very unlucky thread might be starved anyway, never able to 6263 * beat the other threads. In reality, this happens so 6264 * infrequently as to be indistinguishable from never. 6265 * 6266 * Note that we start allocating commands before the SCSI host structure 6267 * is initialized. Since the search starts at bit zero, this 6268 * all works, since we have at least one command structure available; 6269 * however, it means that the structures with the low indexes have to be 6270 * reserved for driver-initiated requests, while requests from the block 6271 * layer will use the higher indexes. 6272 */ 6273 6274 for (;;) { 6275 i = find_next_zero_bit(h->cmd_pool_bits, 6276 HPSA_NRESERVED_CMDS, 6277 offset); 6278 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6279 offset = 0; 6280 continue; 6281 } 6282 c = h->cmd_pool + i; 6283 refcount = atomic_inc_return(&c->refcount); 6284 if (unlikely(refcount > 1)) { 6285 cmd_free(h, c); /* already in use */ 6286 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6287 continue; 6288 } 6289 set_bit(i & (BITS_PER_LONG - 1), 6290 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6291 break; /* it's ours now. */ 6292 } 6293 hpsa_cmd_partial_init(h, i, c); 6294 return c; 6295 } 6296 6297 /* 6298 * This is the complementary operation to cmd_alloc(). Note, however, in some 6299 * corner cases it may also be used to free blocks allocated by 6300 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6301 * the clear-bit is harmless. 6302 */ 6303 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6304 { 6305 if (atomic_dec_and_test(&c->refcount)) { 6306 int i; 6307 6308 i = c - h->cmd_pool; 6309 clear_bit(i & (BITS_PER_LONG - 1), 6310 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6311 } 6312 } 6313 6314 #ifdef CONFIG_COMPAT 6315 6316 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6317 void __user *arg) 6318 { 6319 IOCTL32_Command_struct __user *arg32 = 6320 (IOCTL32_Command_struct __user *) arg; 6321 IOCTL_Command_struct arg64; 6322 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6323 int err; 6324 u32 cp; 6325 6326 memset(&arg64, 0, sizeof(arg64)); 6327 err = 0; 6328 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6329 sizeof(arg64.LUN_info)); 6330 err |= copy_from_user(&arg64.Request, &arg32->Request, 6331 sizeof(arg64.Request)); 6332 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6333 sizeof(arg64.error_info)); 6334 err |= get_user(arg64.buf_size, &arg32->buf_size); 6335 err |= get_user(cp, &arg32->buf); 6336 arg64.buf = compat_ptr(cp); 6337 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6338 6339 if (err) 6340 return -EFAULT; 6341 6342 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6343 if (err) 6344 return err; 6345 err |= copy_in_user(&arg32->error_info, &p->error_info, 6346 sizeof(arg32->error_info)); 6347 if (err) 6348 return -EFAULT; 6349 return err; 6350 } 6351 6352 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6353 int cmd, void __user *arg) 6354 { 6355 BIG_IOCTL32_Command_struct __user *arg32 = 6356 (BIG_IOCTL32_Command_struct __user *) arg; 6357 BIG_IOCTL_Command_struct arg64; 6358 BIG_IOCTL_Command_struct __user *p = 6359 compat_alloc_user_space(sizeof(arg64)); 6360 int err; 6361 u32 cp; 6362 6363 memset(&arg64, 0, sizeof(arg64)); 6364 err = 0; 6365 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6366 sizeof(arg64.LUN_info)); 6367 err |= copy_from_user(&arg64.Request, &arg32->Request, 6368 sizeof(arg64.Request)); 6369 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6370 sizeof(arg64.error_info)); 6371 err |= get_user(arg64.buf_size, &arg32->buf_size); 6372 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6373 err |= get_user(cp, &arg32->buf); 6374 arg64.buf = compat_ptr(cp); 6375 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6376 6377 if (err) 6378 return -EFAULT; 6379 6380 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6381 if (err) 6382 return err; 6383 err |= copy_in_user(&arg32->error_info, &p->error_info, 6384 sizeof(arg32->error_info)); 6385 if (err) 6386 return -EFAULT; 6387 return err; 6388 } 6389 6390 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6391 { 6392 switch (cmd) { 6393 case CCISS_GETPCIINFO: 6394 case CCISS_GETINTINFO: 6395 case CCISS_SETINTINFO: 6396 case CCISS_GETNODENAME: 6397 case CCISS_SETNODENAME: 6398 case CCISS_GETHEARTBEAT: 6399 case CCISS_GETBUSTYPES: 6400 case CCISS_GETFIRMVER: 6401 case CCISS_GETDRIVVER: 6402 case CCISS_REVALIDVOLS: 6403 case CCISS_DEREGDISK: 6404 case CCISS_REGNEWDISK: 6405 case CCISS_REGNEWD: 6406 case CCISS_RESCANDISK: 6407 case CCISS_GETLUNINFO: 6408 return hpsa_ioctl(dev, cmd, arg); 6409 6410 case CCISS_PASSTHRU32: 6411 return hpsa_ioctl32_passthru(dev, cmd, arg); 6412 case CCISS_BIG_PASSTHRU32: 6413 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6414 6415 default: 6416 return -ENOIOCTLCMD; 6417 } 6418 } 6419 #endif 6420 6421 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6422 { 6423 struct hpsa_pci_info pciinfo; 6424 6425 if (!argp) 6426 return -EINVAL; 6427 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6428 pciinfo.bus = h->pdev->bus->number; 6429 pciinfo.dev_fn = h->pdev->devfn; 6430 pciinfo.board_id = h->board_id; 6431 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6432 return -EFAULT; 6433 return 0; 6434 } 6435 6436 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6437 { 6438 DriverVer_type DriverVer; 6439 unsigned char vmaj, vmin, vsubmin; 6440 int rc; 6441 6442 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6443 &vmaj, &vmin, &vsubmin); 6444 if (rc != 3) { 6445 dev_info(&h->pdev->dev, "driver version string '%s' " 6446 "unrecognized.", HPSA_DRIVER_VERSION); 6447 vmaj = 0; 6448 vmin = 0; 6449 vsubmin = 0; 6450 } 6451 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6452 if (!argp) 6453 return -EINVAL; 6454 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6455 return -EFAULT; 6456 return 0; 6457 } 6458 6459 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6460 { 6461 IOCTL_Command_struct iocommand; 6462 struct CommandList *c; 6463 char *buff = NULL; 6464 u64 temp64; 6465 int rc = 0; 6466 6467 if (!argp) 6468 return -EINVAL; 6469 if (!capable(CAP_SYS_RAWIO)) 6470 return -EPERM; 6471 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6472 return -EFAULT; 6473 if ((iocommand.buf_size < 1) && 6474 (iocommand.Request.Type.Direction != XFER_NONE)) { 6475 return -EINVAL; 6476 } 6477 if (iocommand.buf_size > 0) { 6478 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6479 if (buff == NULL) 6480 return -ENOMEM; 6481 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6482 /* Copy the data into the buffer we created */ 6483 if (copy_from_user(buff, iocommand.buf, 6484 iocommand.buf_size)) { 6485 rc = -EFAULT; 6486 goto out_kfree; 6487 } 6488 } else { 6489 memset(buff, 0, iocommand.buf_size); 6490 } 6491 } 6492 c = cmd_alloc(h); 6493 6494 /* Fill in the command type */ 6495 c->cmd_type = CMD_IOCTL_PEND; 6496 c->scsi_cmd = SCSI_CMD_BUSY; 6497 /* Fill in Command Header */ 6498 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6499 if (iocommand.buf_size > 0) { /* buffer to fill */ 6500 c->Header.SGList = 1; 6501 c->Header.SGTotal = cpu_to_le16(1); 6502 } else { /* no buffers to fill */ 6503 c->Header.SGList = 0; 6504 c->Header.SGTotal = cpu_to_le16(0); 6505 } 6506 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6507 6508 /* Fill in Request block */ 6509 memcpy(&c->Request, &iocommand.Request, 6510 sizeof(c->Request)); 6511 6512 /* Fill in the scatter gather information */ 6513 if (iocommand.buf_size > 0) { 6514 temp64 = pci_map_single(h->pdev, buff, 6515 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6516 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6517 c->SG[0].Addr = cpu_to_le64(0); 6518 c->SG[0].Len = cpu_to_le32(0); 6519 rc = -ENOMEM; 6520 goto out; 6521 } 6522 c->SG[0].Addr = cpu_to_le64(temp64); 6523 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6524 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6525 } 6526 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6527 NO_TIMEOUT); 6528 if (iocommand.buf_size > 0) 6529 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6530 check_ioctl_unit_attention(h, c); 6531 if (rc) { 6532 rc = -EIO; 6533 goto out; 6534 } 6535 6536 /* Copy the error information out */ 6537 memcpy(&iocommand.error_info, c->err_info, 6538 sizeof(iocommand.error_info)); 6539 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6540 rc = -EFAULT; 6541 goto out; 6542 } 6543 if ((iocommand.Request.Type.Direction & XFER_READ) && 6544 iocommand.buf_size > 0) { 6545 /* Copy the data out of the buffer we created */ 6546 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6547 rc = -EFAULT; 6548 goto out; 6549 } 6550 } 6551 out: 6552 cmd_free(h, c); 6553 out_kfree: 6554 kfree(buff); 6555 return rc; 6556 } 6557 6558 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6559 { 6560 BIG_IOCTL_Command_struct *ioc; 6561 struct CommandList *c; 6562 unsigned char **buff = NULL; 6563 int *buff_size = NULL; 6564 u64 temp64; 6565 BYTE sg_used = 0; 6566 int status = 0; 6567 u32 left; 6568 u32 sz; 6569 BYTE __user *data_ptr; 6570 6571 if (!argp) 6572 return -EINVAL; 6573 if (!capable(CAP_SYS_RAWIO)) 6574 return -EPERM; 6575 ioc = (BIG_IOCTL_Command_struct *) 6576 kmalloc(sizeof(*ioc), GFP_KERNEL); 6577 if (!ioc) { 6578 status = -ENOMEM; 6579 goto cleanup1; 6580 } 6581 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6582 status = -EFAULT; 6583 goto cleanup1; 6584 } 6585 if ((ioc->buf_size < 1) && 6586 (ioc->Request.Type.Direction != XFER_NONE)) { 6587 status = -EINVAL; 6588 goto cleanup1; 6589 } 6590 /* Check kmalloc limits using all SGs */ 6591 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6592 status = -EINVAL; 6593 goto cleanup1; 6594 } 6595 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6596 status = -EINVAL; 6597 goto cleanup1; 6598 } 6599 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6600 if (!buff) { 6601 status = -ENOMEM; 6602 goto cleanup1; 6603 } 6604 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6605 if (!buff_size) { 6606 status = -ENOMEM; 6607 goto cleanup1; 6608 } 6609 left = ioc->buf_size; 6610 data_ptr = ioc->buf; 6611 while (left) { 6612 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6613 buff_size[sg_used] = sz; 6614 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6615 if (buff[sg_used] == NULL) { 6616 status = -ENOMEM; 6617 goto cleanup1; 6618 } 6619 if (ioc->Request.Type.Direction & XFER_WRITE) { 6620 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6621 status = -EFAULT; 6622 goto cleanup1; 6623 } 6624 } else 6625 memset(buff[sg_used], 0, sz); 6626 left -= sz; 6627 data_ptr += sz; 6628 sg_used++; 6629 } 6630 c = cmd_alloc(h); 6631 6632 c->cmd_type = CMD_IOCTL_PEND; 6633 c->scsi_cmd = SCSI_CMD_BUSY; 6634 c->Header.ReplyQueue = 0; 6635 c->Header.SGList = (u8) sg_used; 6636 c->Header.SGTotal = cpu_to_le16(sg_used); 6637 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6638 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6639 if (ioc->buf_size > 0) { 6640 int i; 6641 for (i = 0; i < sg_used; i++) { 6642 temp64 = pci_map_single(h->pdev, buff[i], 6643 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6644 if (dma_mapping_error(&h->pdev->dev, 6645 (dma_addr_t) temp64)) { 6646 c->SG[i].Addr = cpu_to_le64(0); 6647 c->SG[i].Len = cpu_to_le32(0); 6648 hpsa_pci_unmap(h->pdev, c, i, 6649 PCI_DMA_BIDIRECTIONAL); 6650 status = -ENOMEM; 6651 goto cleanup0; 6652 } 6653 c->SG[i].Addr = cpu_to_le64(temp64); 6654 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6655 c->SG[i].Ext = cpu_to_le32(0); 6656 } 6657 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6658 } 6659 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6660 NO_TIMEOUT); 6661 if (sg_used) 6662 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6663 check_ioctl_unit_attention(h, c); 6664 if (status) { 6665 status = -EIO; 6666 goto cleanup0; 6667 } 6668 6669 /* Copy the error information out */ 6670 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6671 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6672 status = -EFAULT; 6673 goto cleanup0; 6674 } 6675 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6676 int i; 6677 6678 /* Copy the data out of the buffer we created */ 6679 BYTE __user *ptr = ioc->buf; 6680 for (i = 0; i < sg_used; i++) { 6681 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6682 status = -EFAULT; 6683 goto cleanup0; 6684 } 6685 ptr += buff_size[i]; 6686 } 6687 } 6688 status = 0; 6689 cleanup0: 6690 cmd_free(h, c); 6691 cleanup1: 6692 if (buff) { 6693 int i; 6694 6695 for (i = 0; i < sg_used; i++) 6696 kfree(buff[i]); 6697 kfree(buff); 6698 } 6699 kfree(buff_size); 6700 kfree(ioc); 6701 return status; 6702 } 6703 6704 static void check_ioctl_unit_attention(struct ctlr_info *h, 6705 struct CommandList *c) 6706 { 6707 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6708 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6709 (void) check_for_unit_attention(h, c); 6710 } 6711 6712 /* 6713 * ioctl 6714 */ 6715 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6716 { 6717 struct ctlr_info *h; 6718 void __user *argp = (void __user *)arg; 6719 int rc; 6720 6721 h = sdev_to_hba(dev); 6722 6723 switch (cmd) { 6724 case CCISS_DEREGDISK: 6725 case CCISS_REGNEWDISK: 6726 case CCISS_REGNEWD: 6727 hpsa_scan_start(h->scsi_host); 6728 return 0; 6729 case CCISS_GETPCIINFO: 6730 return hpsa_getpciinfo_ioctl(h, argp); 6731 case CCISS_GETDRIVVER: 6732 return hpsa_getdrivver_ioctl(h, argp); 6733 case CCISS_PASSTHRU: 6734 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6735 return -EAGAIN; 6736 rc = hpsa_passthru_ioctl(h, argp); 6737 atomic_inc(&h->passthru_cmds_avail); 6738 return rc; 6739 case CCISS_BIG_PASSTHRU: 6740 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6741 return -EAGAIN; 6742 rc = hpsa_big_passthru_ioctl(h, argp); 6743 atomic_inc(&h->passthru_cmds_avail); 6744 return rc; 6745 default: 6746 return -ENOTTY; 6747 } 6748 } 6749 6750 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6751 u8 reset_type) 6752 { 6753 struct CommandList *c; 6754 6755 c = cmd_alloc(h); 6756 6757 /* fill_cmd can't fail here, no data buffer to map */ 6758 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6759 RAID_CTLR_LUNID, TYPE_MSG); 6760 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6761 c->waiting = NULL; 6762 enqueue_cmd_and_start_io(h, c); 6763 /* Don't wait for completion, the reset won't complete. Don't free 6764 * the command either. This is the last command we will send before 6765 * re-initializing everything, so it doesn't matter and won't leak. 6766 */ 6767 return; 6768 } 6769 6770 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6771 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6772 int cmd_type) 6773 { 6774 int pci_dir = XFER_NONE; 6775 u64 tag; /* for commands to be aborted */ 6776 6777 c->cmd_type = CMD_IOCTL_PEND; 6778 c->scsi_cmd = SCSI_CMD_BUSY; 6779 c->Header.ReplyQueue = 0; 6780 if (buff != NULL && size > 0) { 6781 c->Header.SGList = 1; 6782 c->Header.SGTotal = cpu_to_le16(1); 6783 } else { 6784 c->Header.SGList = 0; 6785 c->Header.SGTotal = cpu_to_le16(0); 6786 } 6787 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6788 6789 if (cmd_type == TYPE_CMD) { 6790 switch (cmd) { 6791 case HPSA_INQUIRY: 6792 /* are we trying to read a vital product page */ 6793 if (page_code & VPD_PAGE) { 6794 c->Request.CDB[1] = 0x01; 6795 c->Request.CDB[2] = (page_code & 0xff); 6796 } 6797 c->Request.CDBLen = 6; 6798 c->Request.type_attr_dir = 6799 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6800 c->Request.Timeout = 0; 6801 c->Request.CDB[0] = HPSA_INQUIRY; 6802 c->Request.CDB[4] = size & 0xFF; 6803 break; 6804 case HPSA_REPORT_LOG: 6805 case HPSA_REPORT_PHYS: 6806 /* Talking to controller so It's a physical command 6807 mode = 00 target = 0. Nothing to write. 6808 */ 6809 c->Request.CDBLen = 12; 6810 c->Request.type_attr_dir = 6811 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6812 c->Request.Timeout = 0; 6813 c->Request.CDB[0] = cmd; 6814 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6815 c->Request.CDB[7] = (size >> 16) & 0xFF; 6816 c->Request.CDB[8] = (size >> 8) & 0xFF; 6817 c->Request.CDB[9] = size & 0xFF; 6818 break; 6819 case BMIC_SENSE_DIAG_OPTIONS: 6820 c->Request.CDBLen = 16; 6821 c->Request.type_attr_dir = 6822 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6823 c->Request.Timeout = 0; 6824 /* Spec says this should be BMIC_WRITE */ 6825 c->Request.CDB[0] = BMIC_READ; 6826 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6827 break; 6828 case BMIC_SET_DIAG_OPTIONS: 6829 c->Request.CDBLen = 16; 6830 c->Request.type_attr_dir = 6831 TYPE_ATTR_DIR(cmd_type, 6832 ATTR_SIMPLE, XFER_WRITE); 6833 c->Request.Timeout = 0; 6834 c->Request.CDB[0] = BMIC_WRITE; 6835 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6836 break; 6837 case HPSA_CACHE_FLUSH: 6838 c->Request.CDBLen = 12; 6839 c->Request.type_attr_dir = 6840 TYPE_ATTR_DIR(cmd_type, 6841 ATTR_SIMPLE, XFER_WRITE); 6842 c->Request.Timeout = 0; 6843 c->Request.CDB[0] = BMIC_WRITE; 6844 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6845 c->Request.CDB[7] = (size >> 8) & 0xFF; 6846 c->Request.CDB[8] = size & 0xFF; 6847 break; 6848 case TEST_UNIT_READY: 6849 c->Request.CDBLen = 6; 6850 c->Request.type_attr_dir = 6851 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6852 c->Request.Timeout = 0; 6853 break; 6854 case HPSA_GET_RAID_MAP: 6855 c->Request.CDBLen = 12; 6856 c->Request.type_attr_dir = 6857 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6858 c->Request.Timeout = 0; 6859 c->Request.CDB[0] = HPSA_CISS_READ; 6860 c->Request.CDB[1] = cmd; 6861 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6862 c->Request.CDB[7] = (size >> 16) & 0xFF; 6863 c->Request.CDB[8] = (size >> 8) & 0xFF; 6864 c->Request.CDB[9] = size & 0xFF; 6865 break; 6866 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6867 c->Request.CDBLen = 10; 6868 c->Request.type_attr_dir = 6869 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6870 c->Request.Timeout = 0; 6871 c->Request.CDB[0] = BMIC_READ; 6872 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6873 c->Request.CDB[7] = (size >> 16) & 0xFF; 6874 c->Request.CDB[8] = (size >> 8) & 0xFF; 6875 break; 6876 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6877 c->Request.CDBLen = 10; 6878 c->Request.type_attr_dir = 6879 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6880 c->Request.Timeout = 0; 6881 c->Request.CDB[0] = BMIC_READ; 6882 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6883 c->Request.CDB[7] = (size >> 16) & 0xFF; 6884 c->Request.CDB[8] = (size >> 8) & 0XFF; 6885 break; 6886 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6887 c->Request.CDBLen = 10; 6888 c->Request.type_attr_dir = 6889 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6890 c->Request.Timeout = 0; 6891 c->Request.CDB[0] = BMIC_READ; 6892 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6893 c->Request.CDB[7] = (size >> 16) & 0xFF; 6894 c->Request.CDB[8] = (size >> 8) & 0XFF; 6895 break; 6896 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6897 c->Request.CDBLen = 10; 6898 c->Request.type_attr_dir = 6899 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6900 c->Request.Timeout = 0; 6901 c->Request.CDB[0] = BMIC_READ; 6902 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6903 c->Request.CDB[7] = (size >> 16) & 0xFF; 6904 c->Request.CDB[8] = (size >> 8) & 0XFF; 6905 break; 6906 case BMIC_IDENTIFY_CONTROLLER: 6907 c->Request.CDBLen = 10; 6908 c->Request.type_attr_dir = 6909 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6910 c->Request.Timeout = 0; 6911 c->Request.CDB[0] = BMIC_READ; 6912 c->Request.CDB[1] = 0; 6913 c->Request.CDB[2] = 0; 6914 c->Request.CDB[3] = 0; 6915 c->Request.CDB[4] = 0; 6916 c->Request.CDB[5] = 0; 6917 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6918 c->Request.CDB[7] = (size >> 16) & 0xFF; 6919 c->Request.CDB[8] = (size >> 8) & 0XFF; 6920 c->Request.CDB[9] = 0; 6921 break; 6922 default: 6923 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6924 BUG(); 6925 return -1; 6926 } 6927 } else if (cmd_type == TYPE_MSG) { 6928 switch (cmd) { 6929 6930 case HPSA_PHYS_TARGET_RESET: 6931 c->Request.CDBLen = 16; 6932 c->Request.type_attr_dir = 6933 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6934 c->Request.Timeout = 0; /* Don't time out */ 6935 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6936 c->Request.CDB[0] = HPSA_RESET; 6937 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6938 /* Physical target reset needs no control bytes 4-7*/ 6939 c->Request.CDB[4] = 0x00; 6940 c->Request.CDB[5] = 0x00; 6941 c->Request.CDB[6] = 0x00; 6942 c->Request.CDB[7] = 0x00; 6943 break; 6944 case HPSA_DEVICE_RESET_MSG: 6945 c->Request.CDBLen = 16; 6946 c->Request.type_attr_dir = 6947 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6948 c->Request.Timeout = 0; /* Don't time out */ 6949 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6950 c->Request.CDB[0] = cmd; 6951 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6952 /* If bytes 4-7 are zero, it means reset the */ 6953 /* LunID device */ 6954 c->Request.CDB[4] = 0x00; 6955 c->Request.CDB[5] = 0x00; 6956 c->Request.CDB[6] = 0x00; 6957 c->Request.CDB[7] = 0x00; 6958 break; 6959 case HPSA_ABORT_MSG: 6960 memcpy(&tag, buff, sizeof(tag)); 6961 dev_dbg(&h->pdev->dev, 6962 "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 6963 tag, c->Header.tag); 6964 c->Request.CDBLen = 16; 6965 c->Request.type_attr_dir = 6966 TYPE_ATTR_DIR(cmd_type, 6967 ATTR_SIMPLE, XFER_WRITE); 6968 c->Request.Timeout = 0; /* Don't time out */ 6969 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 6970 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 6971 c->Request.CDB[2] = 0x00; /* reserved */ 6972 c->Request.CDB[3] = 0x00; /* reserved */ 6973 /* Tag to abort goes in CDB[4]-CDB[11] */ 6974 memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 6975 c->Request.CDB[12] = 0x00; /* reserved */ 6976 c->Request.CDB[13] = 0x00; /* reserved */ 6977 c->Request.CDB[14] = 0x00; /* reserved */ 6978 c->Request.CDB[15] = 0x00; /* reserved */ 6979 break; 6980 default: 6981 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6982 cmd); 6983 BUG(); 6984 } 6985 } else { 6986 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6987 BUG(); 6988 } 6989 6990 switch (GET_DIR(c->Request.type_attr_dir)) { 6991 case XFER_READ: 6992 pci_dir = PCI_DMA_FROMDEVICE; 6993 break; 6994 case XFER_WRITE: 6995 pci_dir = PCI_DMA_TODEVICE; 6996 break; 6997 case XFER_NONE: 6998 pci_dir = PCI_DMA_NONE; 6999 break; 7000 default: 7001 pci_dir = PCI_DMA_BIDIRECTIONAL; 7002 } 7003 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7004 return -1; 7005 return 0; 7006 } 7007 7008 /* 7009 * Map (physical) PCI mem into (virtual) kernel space 7010 */ 7011 static void __iomem *remap_pci_mem(ulong base, ulong size) 7012 { 7013 ulong page_base = ((ulong) base) & PAGE_MASK; 7014 ulong page_offs = ((ulong) base) - page_base; 7015 void __iomem *page_remapped = ioremap_nocache(page_base, 7016 page_offs + size); 7017 7018 return page_remapped ? (page_remapped + page_offs) : NULL; 7019 } 7020 7021 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7022 { 7023 return h->access.command_completed(h, q); 7024 } 7025 7026 static inline bool interrupt_pending(struct ctlr_info *h) 7027 { 7028 return h->access.intr_pending(h); 7029 } 7030 7031 static inline long interrupt_not_for_us(struct ctlr_info *h) 7032 { 7033 return (h->access.intr_pending(h) == 0) || 7034 (h->interrupts_enabled == 0); 7035 } 7036 7037 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 7038 u32 raw_tag) 7039 { 7040 if (unlikely(tag_index >= h->nr_cmds)) { 7041 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7042 return 1; 7043 } 7044 return 0; 7045 } 7046 7047 static inline void finish_cmd(struct CommandList *c) 7048 { 7049 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7050 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7051 || c->cmd_type == CMD_IOACCEL2)) 7052 complete_scsi_command(c); 7053 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7054 complete(c->waiting); 7055 } 7056 7057 /* process completion of an indexed ("direct lookup") command */ 7058 static inline void process_indexed_cmd(struct ctlr_info *h, 7059 u32 raw_tag) 7060 { 7061 u32 tag_index; 7062 struct CommandList *c; 7063 7064 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 7065 if (!bad_tag(h, tag_index, raw_tag)) { 7066 c = h->cmd_pool + tag_index; 7067 finish_cmd(c); 7068 } 7069 } 7070 7071 /* Some controllers, like p400, will give us one interrupt 7072 * after a soft reset, even if we turned interrupts off. 7073 * Only need to check for this in the hpsa_xxx_discard_completions 7074 * functions. 7075 */ 7076 static int ignore_bogus_interrupt(struct ctlr_info *h) 7077 { 7078 if (likely(!reset_devices)) 7079 return 0; 7080 7081 if (likely(h->interrupts_enabled)) 7082 return 0; 7083 7084 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 7085 "(known firmware bug.) Ignoring.\n"); 7086 7087 return 1; 7088 } 7089 7090 /* 7091 * Convert &h->q[x] (passed to interrupt handlers) back to h. 7092 * Relies on (h-q[x] == x) being true for x such that 7093 * 0 <= x < MAX_REPLY_QUEUES. 7094 */ 7095 static struct ctlr_info *queue_to_hba(u8 *queue) 7096 { 7097 return container_of((queue - *queue), struct ctlr_info, q[0]); 7098 } 7099 7100 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7101 { 7102 struct ctlr_info *h = queue_to_hba(queue); 7103 u8 q = *(u8 *) queue; 7104 u32 raw_tag; 7105 7106 if (ignore_bogus_interrupt(h)) 7107 return IRQ_NONE; 7108 7109 if (interrupt_not_for_us(h)) 7110 return IRQ_NONE; 7111 h->last_intr_timestamp = get_jiffies_64(); 7112 while (interrupt_pending(h)) { 7113 raw_tag = get_next_completion(h, q); 7114 while (raw_tag != FIFO_EMPTY) 7115 raw_tag = next_command(h, q); 7116 } 7117 return IRQ_HANDLED; 7118 } 7119 7120 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 7121 { 7122 struct ctlr_info *h = queue_to_hba(queue); 7123 u32 raw_tag; 7124 u8 q = *(u8 *) queue; 7125 7126 if (ignore_bogus_interrupt(h)) 7127 return IRQ_NONE; 7128 7129 h->last_intr_timestamp = get_jiffies_64(); 7130 raw_tag = get_next_completion(h, q); 7131 while (raw_tag != FIFO_EMPTY) 7132 raw_tag = next_command(h, q); 7133 return IRQ_HANDLED; 7134 } 7135 7136 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7137 { 7138 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7139 u32 raw_tag; 7140 u8 q = *(u8 *) queue; 7141 7142 if (interrupt_not_for_us(h)) 7143 return IRQ_NONE; 7144 h->last_intr_timestamp = get_jiffies_64(); 7145 while (interrupt_pending(h)) { 7146 raw_tag = get_next_completion(h, q); 7147 while (raw_tag != FIFO_EMPTY) { 7148 process_indexed_cmd(h, raw_tag); 7149 raw_tag = next_command(h, q); 7150 } 7151 } 7152 return IRQ_HANDLED; 7153 } 7154 7155 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7156 { 7157 struct ctlr_info *h = queue_to_hba(queue); 7158 u32 raw_tag; 7159 u8 q = *(u8 *) queue; 7160 7161 h->last_intr_timestamp = get_jiffies_64(); 7162 raw_tag = get_next_completion(h, q); 7163 while (raw_tag != FIFO_EMPTY) { 7164 process_indexed_cmd(h, raw_tag); 7165 raw_tag = next_command(h, q); 7166 } 7167 return IRQ_HANDLED; 7168 } 7169 7170 /* Send a message CDB to the firmware. Careful, this only works 7171 * in simple mode, not performant mode due to the tag lookup. 7172 * We only ever use this immediately after a controller reset. 7173 */ 7174 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7175 unsigned char type) 7176 { 7177 struct Command { 7178 struct CommandListHeader CommandHeader; 7179 struct RequestBlock Request; 7180 struct ErrDescriptor ErrorDescriptor; 7181 }; 7182 struct Command *cmd; 7183 static const size_t cmd_sz = sizeof(*cmd) + 7184 sizeof(cmd->ErrorDescriptor); 7185 dma_addr_t paddr64; 7186 __le32 paddr32; 7187 u32 tag; 7188 void __iomem *vaddr; 7189 int i, err; 7190 7191 vaddr = pci_ioremap_bar(pdev, 0); 7192 if (vaddr == NULL) 7193 return -ENOMEM; 7194 7195 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7196 * CCISS commands, so they must be allocated from the lower 4GiB of 7197 * memory. 7198 */ 7199 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7200 if (err) { 7201 iounmap(vaddr); 7202 return err; 7203 } 7204 7205 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7206 if (cmd == NULL) { 7207 iounmap(vaddr); 7208 return -ENOMEM; 7209 } 7210 7211 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7212 * although there's no guarantee, we assume that the address is at 7213 * least 4-byte aligned (most likely, it's page-aligned). 7214 */ 7215 paddr32 = cpu_to_le32(paddr64); 7216 7217 cmd->CommandHeader.ReplyQueue = 0; 7218 cmd->CommandHeader.SGList = 0; 7219 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7220 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7221 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7222 7223 cmd->Request.CDBLen = 16; 7224 cmd->Request.type_attr_dir = 7225 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7226 cmd->Request.Timeout = 0; /* Don't time out */ 7227 cmd->Request.CDB[0] = opcode; 7228 cmd->Request.CDB[1] = type; 7229 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7230 cmd->ErrorDescriptor.Addr = 7231 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7232 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7233 7234 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7235 7236 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7237 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7238 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7239 break; 7240 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7241 } 7242 7243 iounmap(vaddr); 7244 7245 /* we leak the DMA buffer here ... no choice since the controller could 7246 * still complete the command. 7247 */ 7248 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7249 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7250 opcode, type); 7251 return -ETIMEDOUT; 7252 } 7253 7254 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7255 7256 if (tag & HPSA_ERROR_BIT) { 7257 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7258 opcode, type); 7259 return -EIO; 7260 } 7261 7262 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7263 opcode, type); 7264 return 0; 7265 } 7266 7267 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7268 7269 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7270 void __iomem *vaddr, u32 use_doorbell) 7271 { 7272 7273 if (use_doorbell) { 7274 /* For everything after the P600, the PCI power state method 7275 * of resetting the controller doesn't work, so we have this 7276 * other way using the doorbell register. 7277 */ 7278 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7279 writel(use_doorbell, vaddr + SA5_DOORBELL); 7280 7281 /* PMC hardware guys tell us we need a 10 second delay after 7282 * doorbell reset and before any attempt to talk to the board 7283 * at all to ensure that this actually works and doesn't fall 7284 * over in some weird corner cases. 7285 */ 7286 msleep(10000); 7287 } else { /* Try to do it the PCI power state way */ 7288 7289 /* Quoting from the Open CISS Specification: "The Power 7290 * Management Control/Status Register (CSR) controls the power 7291 * state of the device. The normal operating state is D0, 7292 * CSR=00h. The software off state is D3, CSR=03h. To reset 7293 * the controller, place the interface device in D3 then to D0, 7294 * this causes a secondary PCI reset which will reset the 7295 * controller." */ 7296 7297 int rc = 0; 7298 7299 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7300 7301 /* enter the D3hot power management state */ 7302 rc = pci_set_power_state(pdev, PCI_D3hot); 7303 if (rc) 7304 return rc; 7305 7306 msleep(500); 7307 7308 /* enter the D0 power management state */ 7309 rc = pci_set_power_state(pdev, PCI_D0); 7310 if (rc) 7311 return rc; 7312 7313 /* 7314 * The P600 requires a small delay when changing states. 7315 * Otherwise we may think the board did not reset and we bail. 7316 * This for kdump only and is particular to the P600. 7317 */ 7318 msleep(500); 7319 } 7320 return 0; 7321 } 7322 7323 static void init_driver_version(char *driver_version, int len) 7324 { 7325 memset(driver_version, 0, len); 7326 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7327 } 7328 7329 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7330 { 7331 char *driver_version; 7332 int i, size = sizeof(cfgtable->driver_version); 7333 7334 driver_version = kmalloc(size, GFP_KERNEL); 7335 if (!driver_version) 7336 return -ENOMEM; 7337 7338 init_driver_version(driver_version, size); 7339 for (i = 0; i < size; i++) 7340 writeb(driver_version[i], &cfgtable->driver_version[i]); 7341 kfree(driver_version); 7342 return 0; 7343 } 7344 7345 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7346 unsigned char *driver_ver) 7347 { 7348 int i; 7349 7350 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7351 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7352 } 7353 7354 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7355 { 7356 7357 char *driver_ver, *old_driver_ver; 7358 int rc, size = sizeof(cfgtable->driver_version); 7359 7360 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7361 if (!old_driver_ver) 7362 return -ENOMEM; 7363 driver_ver = old_driver_ver + size; 7364 7365 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7366 * should have been changed, otherwise we know the reset failed. 7367 */ 7368 init_driver_version(old_driver_ver, size); 7369 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7370 rc = !memcmp(driver_ver, old_driver_ver, size); 7371 kfree(old_driver_ver); 7372 return rc; 7373 } 7374 /* This does a hard reset of the controller using PCI power management 7375 * states or the using the doorbell register. 7376 */ 7377 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7378 { 7379 u64 cfg_offset; 7380 u32 cfg_base_addr; 7381 u64 cfg_base_addr_index; 7382 void __iomem *vaddr; 7383 unsigned long paddr; 7384 u32 misc_fw_support; 7385 int rc; 7386 struct CfgTable __iomem *cfgtable; 7387 u32 use_doorbell; 7388 u16 command_register; 7389 7390 /* For controllers as old as the P600, this is very nearly 7391 * the same thing as 7392 * 7393 * pci_save_state(pci_dev); 7394 * pci_set_power_state(pci_dev, PCI_D3hot); 7395 * pci_set_power_state(pci_dev, PCI_D0); 7396 * pci_restore_state(pci_dev); 7397 * 7398 * For controllers newer than the P600, the pci power state 7399 * method of resetting doesn't work so we have another way 7400 * using the doorbell register. 7401 */ 7402 7403 if (!ctlr_is_resettable(board_id)) { 7404 dev_warn(&pdev->dev, "Controller not resettable\n"); 7405 return -ENODEV; 7406 } 7407 7408 /* if controller is soft- but not hard resettable... */ 7409 if (!ctlr_is_hard_resettable(board_id)) 7410 return -ENOTSUPP; /* try soft reset later. */ 7411 7412 /* Save the PCI command register */ 7413 pci_read_config_word(pdev, 4, &command_register); 7414 pci_save_state(pdev); 7415 7416 /* find the first memory BAR, so we can find the cfg table */ 7417 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7418 if (rc) 7419 return rc; 7420 vaddr = remap_pci_mem(paddr, 0x250); 7421 if (!vaddr) 7422 return -ENOMEM; 7423 7424 /* find cfgtable in order to check if reset via doorbell is supported */ 7425 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7426 &cfg_base_addr_index, &cfg_offset); 7427 if (rc) 7428 goto unmap_vaddr; 7429 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7430 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7431 if (!cfgtable) { 7432 rc = -ENOMEM; 7433 goto unmap_vaddr; 7434 } 7435 rc = write_driver_ver_to_cfgtable(cfgtable); 7436 if (rc) 7437 goto unmap_cfgtable; 7438 7439 /* If reset via doorbell register is supported, use that. 7440 * There are two such methods. Favor the newest method. 7441 */ 7442 misc_fw_support = readl(&cfgtable->misc_fw_support); 7443 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7444 if (use_doorbell) { 7445 use_doorbell = DOORBELL_CTLR_RESET2; 7446 } else { 7447 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7448 if (use_doorbell) { 7449 dev_warn(&pdev->dev, 7450 "Soft reset not supported. Firmware update is required.\n"); 7451 rc = -ENOTSUPP; /* try soft reset */ 7452 goto unmap_cfgtable; 7453 } 7454 } 7455 7456 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7457 if (rc) 7458 goto unmap_cfgtable; 7459 7460 pci_restore_state(pdev); 7461 pci_write_config_word(pdev, 4, command_register); 7462 7463 /* Some devices (notably the HP Smart Array 5i Controller) 7464 need a little pause here */ 7465 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7466 7467 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7468 if (rc) { 7469 dev_warn(&pdev->dev, 7470 "Failed waiting for board to become ready after hard reset\n"); 7471 goto unmap_cfgtable; 7472 } 7473 7474 rc = controller_reset_failed(vaddr); 7475 if (rc < 0) 7476 goto unmap_cfgtable; 7477 if (rc) { 7478 dev_warn(&pdev->dev, "Unable to successfully reset " 7479 "controller. Will try soft reset.\n"); 7480 rc = -ENOTSUPP; 7481 } else { 7482 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7483 } 7484 7485 unmap_cfgtable: 7486 iounmap(cfgtable); 7487 7488 unmap_vaddr: 7489 iounmap(vaddr); 7490 return rc; 7491 } 7492 7493 /* 7494 * We cannot read the structure directly, for portability we must use 7495 * the io functions. 7496 * This is for debug only. 7497 */ 7498 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7499 { 7500 #ifdef HPSA_DEBUG 7501 int i; 7502 char temp_name[17]; 7503 7504 dev_info(dev, "Controller Configuration information\n"); 7505 dev_info(dev, "------------------------------------\n"); 7506 for (i = 0; i < 4; i++) 7507 temp_name[i] = readb(&(tb->Signature[i])); 7508 temp_name[4] = '\0'; 7509 dev_info(dev, " Signature = %s\n", temp_name); 7510 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7511 dev_info(dev, " Transport methods supported = 0x%x\n", 7512 readl(&(tb->TransportSupport))); 7513 dev_info(dev, " Transport methods active = 0x%x\n", 7514 readl(&(tb->TransportActive))); 7515 dev_info(dev, " Requested transport Method = 0x%x\n", 7516 readl(&(tb->HostWrite.TransportRequest))); 7517 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7518 readl(&(tb->HostWrite.CoalIntDelay))); 7519 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7520 readl(&(tb->HostWrite.CoalIntCount))); 7521 dev_info(dev, " Max outstanding commands = %d\n", 7522 readl(&(tb->CmdsOutMax))); 7523 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7524 for (i = 0; i < 16; i++) 7525 temp_name[i] = readb(&(tb->ServerName[i])); 7526 temp_name[16] = '\0'; 7527 dev_info(dev, " Server Name = %s\n", temp_name); 7528 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7529 readl(&(tb->HeartBeat))); 7530 #endif /* HPSA_DEBUG */ 7531 } 7532 7533 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7534 { 7535 int i, offset, mem_type, bar_type; 7536 7537 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7538 return 0; 7539 offset = 0; 7540 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7541 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7542 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7543 offset += 4; 7544 else { 7545 mem_type = pci_resource_flags(pdev, i) & 7546 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7547 switch (mem_type) { 7548 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7549 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7550 offset += 4; /* 32 bit */ 7551 break; 7552 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7553 offset += 8; 7554 break; 7555 default: /* reserved in PCI 2.2 */ 7556 dev_warn(&pdev->dev, 7557 "base address is invalid\n"); 7558 return -1; 7559 break; 7560 } 7561 } 7562 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7563 return i + 1; 7564 } 7565 return -1; 7566 } 7567 7568 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7569 { 7570 if (h->msix_vector) { 7571 if (h->pdev->msix_enabled) 7572 pci_disable_msix(h->pdev); 7573 h->msix_vector = 0; 7574 } else if (h->msi_vector) { 7575 if (h->pdev->msi_enabled) 7576 pci_disable_msi(h->pdev); 7577 h->msi_vector = 0; 7578 } 7579 } 7580 7581 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7582 * controllers that are capable. If not, we use legacy INTx mode. 7583 */ 7584 static void hpsa_interrupt_mode(struct ctlr_info *h) 7585 { 7586 #ifdef CONFIG_PCI_MSI 7587 int err, i; 7588 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7589 7590 for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7591 hpsa_msix_entries[i].vector = 0; 7592 hpsa_msix_entries[i].entry = i; 7593 } 7594 7595 /* Some boards advertise MSI but don't really support it */ 7596 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 7597 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7598 goto default_int_mode; 7599 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7600 dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7601 h->msix_vector = MAX_REPLY_QUEUES; 7602 if (h->msix_vector > num_online_cpus()) 7603 h->msix_vector = num_online_cpus(); 7604 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 7605 1, h->msix_vector); 7606 if (err < 0) { 7607 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 7608 h->msix_vector = 0; 7609 goto single_msi_mode; 7610 } else if (err < h->msix_vector) { 7611 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7612 "available\n", err); 7613 } 7614 h->msix_vector = err; 7615 for (i = 0; i < h->msix_vector; i++) 7616 h->intr[i] = hpsa_msix_entries[i].vector; 7617 return; 7618 } 7619 single_msi_mode: 7620 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7621 dev_info(&h->pdev->dev, "MSI capable controller\n"); 7622 if (!pci_enable_msi(h->pdev)) 7623 h->msi_vector = 1; 7624 else 7625 dev_warn(&h->pdev->dev, "MSI init failed\n"); 7626 } 7627 default_int_mode: 7628 #endif /* CONFIG_PCI_MSI */ 7629 /* if we get here we're going to use the default interrupt mode */ 7630 h->intr[h->intr_mode] = h->pdev->irq; 7631 } 7632 7633 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7634 { 7635 int i; 7636 u32 subsystem_vendor_id, subsystem_device_id; 7637 7638 subsystem_vendor_id = pdev->subsystem_vendor; 7639 subsystem_device_id = pdev->subsystem_device; 7640 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7641 subsystem_vendor_id; 7642 7643 for (i = 0; i < ARRAY_SIZE(products); i++) 7644 if (*board_id == products[i].board_id) 7645 return i; 7646 7647 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7648 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7649 !hpsa_allow_any) { 7650 dev_warn(&pdev->dev, "unrecognized board ID: " 7651 "0x%08x, ignoring.\n", *board_id); 7652 return -ENODEV; 7653 } 7654 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7655 } 7656 7657 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7658 unsigned long *memory_bar) 7659 { 7660 int i; 7661 7662 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7663 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7664 /* addressing mode bits already removed */ 7665 *memory_bar = pci_resource_start(pdev, i); 7666 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7667 *memory_bar); 7668 return 0; 7669 } 7670 dev_warn(&pdev->dev, "no memory BAR found\n"); 7671 return -ENODEV; 7672 } 7673 7674 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7675 int wait_for_ready) 7676 { 7677 int i, iterations; 7678 u32 scratchpad; 7679 if (wait_for_ready) 7680 iterations = HPSA_BOARD_READY_ITERATIONS; 7681 else 7682 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7683 7684 for (i = 0; i < iterations; i++) { 7685 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7686 if (wait_for_ready) { 7687 if (scratchpad == HPSA_FIRMWARE_READY) 7688 return 0; 7689 } else { 7690 if (scratchpad != HPSA_FIRMWARE_READY) 7691 return 0; 7692 } 7693 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7694 } 7695 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7696 return -ENODEV; 7697 } 7698 7699 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7700 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7701 u64 *cfg_offset) 7702 { 7703 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7704 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7705 *cfg_base_addr &= (u32) 0x0000ffff; 7706 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7707 if (*cfg_base_addr_index == -1) { 7708 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7709 return -ENODEV; 7710 } 7711 return 0; 7712 } 7713 7714 static void hpsa_free_cfgtables(struct ctlr_info *h) 7715 { 7716 if (h->transtable) { 7717 iounmap(h->transtable); 7718 h->transtable = NULL; 7719 } 7720 if (h->cfgtable) { 7721 iounmap(h->cfgtable); 7722 h->cfgtable = NULL; 7723 } 7724 } 7725 7726 /* Find and map CISS config table and transfer table 7727 + * several items must be unmapped (freed) later 7728 + * */ 7729 static int hpsa_find_cfgtables(struct ctlr_info *h) 7730 { 7731 u64 cfg_offset; 7732 u32 cfg_base_addr; 7733 u64 cfg_base_addr_index; 7734 u32 trans_offset; 7735 int rc; 7736 7737 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7738 &cfg_base_addr_index, &cfg_offset); 7739 if (rc) 7740 return rc; 7741 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7742 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7743 if (!h->cfgtable) { 7744 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7745 return -ENOMEM; 7746 } 7747 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7748 if (rc) 7749 return rc; 7750 /* Find performant mode table. */ 7751 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7752 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7753 cfg_base_addr_index)+cfg_offset+trans_offset, 7754 sizeof(*h->transtable)); 7755 if (!h->transtable) { 7756 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7757 hpsa_free_cfgtables(h); 7758 return -ENOMEM; 7759 } 7760 return 0; 7761 } 7762 7763 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7764 { 7765 #define MIN_MAX_COMMANDS 16 7766 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7767 7768 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7769 7770 /* Limit commands in memory limited kdump scenario. */ 7771 if (reset_devices && h->max_commands > 32) 7772 h->max_commands = 32; 7773 7774 if (h->max_commands < MIN_MAX_COMMANDS) { 7775 dev_warn(&h->pdev->dev, 7776 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7777 h->max_commands, 7778 MIN_MAX_COMMANDS); 7779 h->max_commands = MIN_MAX_COMMANDS; 7780 } 7781 } 7782 7783 /* If the controller reports that the total max sg entries is greater than 512, 7784 * then we know that chained SG blocks work. (Original smart arrays did not 7785 * support chained SG blocks and would return zero for max sg entries.) 7786 */ 7787 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7788 { 7789 return h->maxsgentries > 512; 7790 } 7791 7792 /* Interrogate the hardware for some limits: 7793 * max commands, max SG elements without chaining, and with chaining, 7794 * SG chain block size, etc. 7795 */ 7796 static void hpsa_find_board_params(struct ctlr_info *h) 7797 { 7798 hpsa_get_max_perf_mode_cmds(h); 7799 h->nr_cmds = h->max_commands; 7800 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7801 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7802 if (hpsa_supports_chained_sg_blocks(h)) { 7803 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7804 h->max_cmd_sg_entries = 32; 7805 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7806 h->maxsgentries--; /* save one for chain pointer */ 7807 } else { 7808 /* 7809 * Original smart arrays supported at most 31 s/g entries 7810 * embedded inline in the command (trying to use more 7811 * would lock up the controller) 7812 */ 7813 h->max_cmd_sg_entries = 31; 7814 h->maxsgentries = 31; /* default to traditional values */ 7815 h->chainsize = 0; 7816 } 7817 7818 /* Find out what task management functions are supported and cache */ 7819 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7820 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7821 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7822 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7823 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7824 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7825 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7826 } 7827 7828 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7829 { 7830 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7831 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7832 return false; 7833 } 7834 return true; 7835 } 7836 7837 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7838 { 7839 u32 driver_support; 7840 7841 driver_support = readl(&(h->cfgtable->driver_support)); 7842 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7843 #ifdef CONFIG_X86 7844 driver_support |= ENABLE_SCSI_PREFETCH; 7845 #endif 7846 driver_support |= ENABLE_UNIT_ATTN; 7847 writel(driver_support, &(h->cfgtable->driver_support)); 7848 } 7849 7850 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7851 * in a prefetch beyond physical memory. 7852 */ 7853 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7854 { 7855 u32 dma_prefetch; 7856 7857 if (h->board_id != 0x3225103C) 7858 return; 7859 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7860 dma_prefetch |= 0x8000; 7861 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7862 } 7863 7864 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7865 { 7866 int i; 7867 u32 doorbell_value; 7868 unsigned long flags; 7869 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7870 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7871 spin_lock_irqsave(&h->lock, flags); 7872 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7873 spin_unlock_irqrestore(&h->lock, flags); 7874 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7875 goto done; 7876 /* delay and try again */ 7877 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7878 } 7879 return -ENODEV; 7880 done: 7881 return 0; 7882 } 7883 7884 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7885 { 7886 int i; 7887 u32 doorbell_value; 7888 unsigned long flags; 7889 7890 /* under certain very rare conditions, this can take awhile. 7891 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7892 * as we enter this code.) 7893 */ 7894 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7895 if (h->remove_in_progress) 7896 goto done; 7897 spin_lock_irqsave(&h->lock, flags); 7898 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7899 spin_unlock_irqrestore(&h->lock, flags); 7900 if (!(doorbell_value & CFGTBL_ChangeReq)) 7901 goto done; 7902 /* delay and try again */ 7903 msleep(MODE_CHANGE_WAIT_INTERVAL); 7904 } 7905 return -ENODEV; 7906 done: 7907 return 0; 7908 } 7909 7910 /* return -ENODEV or other reason on error, 0 on success */ 7911 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7912 { 7913 u32 trans_support; 7914 7915 trans_support = readl(&(h->cfgtable->TransportSupport)); 7916 if (!(trans_support & SIMPLE_MODE)) 7917 return -ENOTSUPP; 7918 7919 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7920 7921 /* Update the field, and then ring the doorbell */ 7922 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7923 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7924 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7925 if (hpsa_wait_for_mode_change_ack(h)) 7926 goto error; 7927 print_cfg_table(&h->pdev->dev, h->cfgtable); 7928 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7929 goto error; 7930 h->transMethod = CFGTBL_Trans_Simple; 7931 return 0; 7932 error: 7933 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7934 return -ENODEV; 7935 } 7936 7937 /* free items allocated or mapped by hpsa_pci_init */ 7938 static void hpsa_free_pci_init(struct ctlr_info *h) 7939 { 7940 hpsa_free_cfgtables(h); /* pci_init 4 */ 7941 iounmap(h->vaddr); /* pci_init 3 */ 7942 h->vaddr = NULL; 7943 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7944 /* 7945 * call pci_disable_device before pci_release_regions per 7946 * Documentation/PCI/pci.txt 7947 */ 7948 pci_disable_device(h->pdev); /* pci_init 1 */ 7949 pci_release_regions(h->pdev); /* pci_init 2 */ 7950 } 7951 7952 /* several items must be freed later */ 7953 static int hpsa_pci_init(struct ctlr_info *h) 7954 { 7955 int prod_index, err; 7956 7957 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7958 if (prod_index < 0) 7959 return prod_index; 7960 h->product_name = products[prod_index].product_name; 7961 h->access = *(products[prod_index].access); 7962 7963 h->needs_abort_tags_swizzled = 7964 ctlr_needs_abort_tags_swizzled(h->board_id); 7965 7966 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7967 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7968 7969 err = pci_enable_device(h->pdev); 7970 if (err) { 7971 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7972 pci_disable_device(h->pdev); 7973 return err; 7974 } 7975 7976 err = pci_request_regions(h->pdev, HPSA); 7977 if (err) { 7978 dev_err(&h->pdev->dev, 7979 "failed to obtain PCI resources\n"); 7980 pci_disable_device(h->pdev); 7981 return err; 7982 } 7983 7984 pci_set_master(h->pdev); 7985 7986 hpsa_interrupt_mode(h); 7987 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7988 if (err) 7989 goto clean2; /* intmode+region, pci */ 7990 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7991 if (!h->vaddr) { 7992 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7993 err = -ENOMEM; 7994 goto clean2; /* intmode+region, pci */ 7995 } 7996 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7997 if (err) 7998 goto clean3; /* vaddr, intmode+region, pci */ 7999 err = hpsa_find_cfgtables(h); 8000 if (err) 8001 goto clean3; /* vaddr, intmode+region, pci */ 8002 hpsa_find_board_params(h); 8003 8004 if (!hpsa_CISS_signature_present(h)) { 8005 err = -ENODEV; 8006 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8007 } 8008 hpsa_set_driver_support_bits(h); 8009 hpsa_p600_dma_prefetch_quirk(h); 8010 err = hpsa_enter_simple_mode(h); 8011 if (err) 8012 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8013 return 0; 8014 8015 clean4: /* cfgtables, vaddr, intmode+region, pci */ 8016 hpsa_free_cfgtables(h); 8017 clean3: /* vaddr, intmode+region, pci */ 8018 iounmap(h->vaddr); 8019 h->vaddr = NULL; 8020 clean2: /* intmode+region, pci */ 8021 hpsa_disable_interrupt_mode(h); 8022 /* 8023 * call pci_disable_device before pci_release_regions per 8024 * Documentation/PCI/pci.txt 8025 */ 8026 pci_disable_device(h->pdev); 8027 pci_release_regions(h->pdev); 8028 return err; 8029 } 8030 8031 static void hpsa_hba_inquiry(struct ctlr_info *h) 8032 { 8033 int rc; 8034 8035 #define HBA_INQUIRY_BYTE_COUNT 64 8036 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8037 if (!h->hba_inquiry_data) 8038 return; 8039 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8040 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8041 if (rc != 0) { 8042 kfree(h->hba_inquiry_data); 8043 h->hba_inquiry_data = NULL; 8044 } 8045 } 8046 8047 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8048 { 8049 int rc, i; 8050 void __iomem *vaddr; 8051 8052 if (!reset_devices) 8053 return 0; 8054 8055 /* kdump kernel is loading, we don't know in which state is 8056 * the pci interface. The dev->enable_cnt is equal zero 8057 * so we call enable+disable, wait a while and switch it on. 8058 */ 8059 rc = pci_enable_device(pdev); 8060 if (rc) { 8061 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8062 return -ENODEV; 8063 } 8064 pci_disable_device(pdev); 8065 msleep(260); /* a randomly chosen number */ 8066 rc = pci_enable_device(pdev); 8067 if (rc) { 8068 dev_warn(&pdev->dev, "failed to enable device.\n"); 8069 return -ENODEV; 8070 } 8071 8072 pci_set_master(pdev); 8073 8074 vaddr = pci_ioremap_bar(pdev, 0); 8075 if (vaddr == NULL) { 8076 rc = -ENOMEM; 8077 goto out_disable; 8078 } 8079 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 8080 iounmap(vaddr); 8081 8082 /* Reset the controller with a PCI power-cycle or via doorbell */ 8083 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8084 8085 /* -ENOTSUPP here means we cannot reset the controller 8086 * but it's already (and still) up and running in 8087 * "performant mode". Or, it might be 640x, which can't reset 8088 * due to concerns about shared bbwc between 6402/6404 pair. 8089 */ 8090 if (rc) 8091 goto out_disable; 8092 8093 /* Now try to get the controller to respond to a no-op */ 8094 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8095 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8096 if (hpsa_noop(pdev) == 0) 8097 break; 8098 else 8099 dev_warn(&pdev->dev, "no-op failed%s\n", 8100 (i < 11 ? "; re-trying" : "")); 8101 } 8102 8103 out_disable: 8104 8105 pci_disable_device(pdev); 8106 return rc; 8107 } 8108 8109 static void hpsa_free_cmd_pool(struct ctlr_info *h) 8110 { 8111 kfree(h->cmd_pool_bits); 8112 h->cmd_pool_bits = NULL; 8113 if (h->cmd_pool) { 8114 pci_free_consistent(h->pdev, 8115 h->nr_cmds * sizeof(struct CommandList), 8116 h->cmd_pool, 8117 h->cmd_pool_dhandle); 8118 h->cmd_pool = NULL; 8119 h->cmd_pool_dhandle = 0; 8120 } 8121 if (h->errinfo_pool) { 8122 pci_free_consistent(h->pdev, 8123 h->nr_cmds * sizeof(struct ErrorInfo), 8124 h->errinfo_pool, 8125 h->errinfo_pool_dhandle); 8126 h->errinfo_pool = NULL; 8127 h->errinfo_pool_dhandle = 0; 8128 } 8129 } 8130 8131 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8132 { 8133 h->cmd_pool_bits = kzalloc( 8134 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 8135 sizeof(unsigned long), GFP_KERNEL); 8136 h->cmd_pool = pci_alloc_consistent(h->pdev, 8137 h->nr_cmds * sizeof(*h->cmd_pool), 8138 &(h->cmd_pool_dhandle)); 8139 h->errinfo_pool = pci_alloc_consistent(h->pdev, 8140 h->nr_cmds * sizeof(*h->errinfo_pool), 8141 &(h->errinfo_pool_dhandle)); 8142 if ((h->cmd_pool_bits == NULL) 8143 || (h->cmd_pool == NULL) 8144 || (h->errinfo_pool == NULL)) { 8145 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8146 goto clean_up; 8147 } 8148 hpsa_preinitialize_commands(h); 8149 return 0; 8150 clean_up: 8151 hpsa_free_cmd_pool(h); 8152 return -ENOMEM; 8153 } 8154 8155 static void hpsa_irq_affinity_hints(struct ctlr_info *h) 8156 { 8157 int i, cpu; 8158 8159 cpu = cpumask_first(cpu_online_mask); 8160 for (i = 0; i < h->msix_vector; i++) { 8161 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 8162 cpu = cpumask_next(cpu, cpu_online_mask); 8163 } 8164 } 8165 8166 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8167 static void hpsa_free_irqs(struct ctlr_info *h) 8168 { 8169 int i; 8170 8171 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 8172 /* Single reply queue, only one irq to free */ 8173 i = h->intr_mode; 8174 irq_set_affinity_hint(h->intr[i], NULL); 8175 free_irq(h->intr[i], &h->q[i]); 8176 h->q[i] = 0; 8177 return; 8178 } 8179 8180 for (i = 0; i < h->msix_vector; i++) { 8181 irq_set_affinity_hint(h->intr[i], NULL); 8182 free_irq(h->intr[i], &h->q[i]); 8183 h->q[i] = 0; 8184 } 8185 for (; i < MAX_REPLY_QUEUES; i++) 8186 h->q[i] = 0; 8187 } 8188 8189 /* returns 0 on success; cleans up and returns -Enn on error */ 8190 static int hpsa_request_irqs(struct ctlr_info *h, 8191 irqreturn_t (*msixhandler)(int, void *), 8192 irqreturn_t (*intxhandler)(int, void *)) 8193 { 8194 int rc, i; 8195 8196 /* 8197 * initialize h->q[x] = x so that interrupt handlers know which 8198 * queue to process. 8199 */ 8200 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8201 h->q[i] = (u8) i; 8202 8203 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 8204 /* If performant mode and MSI-X, use multiple reply queues */ 8205 for (i = 0; i < h->msix_vector; i++) { 8206 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8207 rc = request_irq(h->intr[i], msixhandler, 8208 0, h->intrname[i], 8209 &h->q[i]); 8210 if (rc) { 8211 int j; 8212 8213 dev_err(&h->pdev->dev, 8214 "failed to get irq %d for %s\n", 8215 h->intr[i], h->devname); 8216 for (j = 0; j < i; j++) { 8217 free_irq(h->intr[j], &h->q[j]); 8218 h->q[j] = 0; 8219 } 8220 for (; j < MAX_REPLY_QUEUES; j++) 8221 h->q[j] = 0; 8222 return rc; 8223 } 8224 } 8225 hpsa_irq_affinity_hints(h); 8226 } else { 8227 /* Use single reply pool */ 8228 if (h->msix_vector > 0 || h->msi_vector) { 8229 if (h->msix_vector) 8230 sprintf(h->intrname[h->intr_mode], 8231 "%s-msix", h->devname); 8232 else 8233 sprintf(h->intrname[h->intr_mode], 8234 "%s-msi", h->devname); 8235 rc = request_irq(h->intr[h->intr_mode], 8236 msixhandler, 0, 8237 h->intrname[h->intr_mode], 8238 &h->q[h->intr_mode]); 8239 } else { 8240 sprintf(h->intrname[h->intr_mode], 8241 "%s-intx", h->devname); 8242 rc = request_irq(h->intr[h->intr_mode], 8243 intxhandler, IRQF_SHARED, 8244 h->intrname[h->intr_mode], 8245 &h->q[h->intr_mode]); 8246 } 8247 irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 8248 } 8249 if (rc) { 8250 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8251 h->intr[h->intr_mode], h->devname); 8252 hpsa_free_irqs(h); 8253 return -ENODEV; 8254 } 8255 return 0; 8256 } 8257 8258 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8259 { 8260 int rc; 8261 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8262 8263 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8264 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8265 if (rc) { 8266 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8267 return rc; 8268 } 8269 8270 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8271 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8272 if (rc) { 8273 dev_warn(&h->pdev->dev, "Board failed to become ready " 8274 "after soft reset.\n"); 8275 return rc; 8276 } 8277 8278 return 0; 8279 } 8280 8281 static void hpsa_free_reply_queues(struct ctlr_info *h) 8282 { 8283 int i; 8284 8285 for (i = 0; i < h->nreply_queues; i++) { 8286 if (!h->reply_queue[i].head) 8287 continue; 8288 pci_free_consistent(h->pdev, 8289 h->reply_queue_size, 8290 h->reply_queue[i].head, 8291 h->reply_queue[i].busaddr); 8292 h->reply_queue[i].head = NULL; 8293 h->reply_queue[i].busaddr = 0; 8294 } 8295 h->reply_queue_size = 0; 8296 } 8297 8298 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8299 { 8300 hpsa_free_performant_mode(h); /* init_one 7 */ 8301 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8302 hpsa_free_cmd_pool(h); /* init_one 5 */ 8303 hpsa_free_irqs(h); /* init_one 4 */ 8304 scsi_host_put(h->scsi_host); /* init_one 3 */ 8305 h->scsi_host = NULL; /* init_one 3 */ 8306 hpsa_free_pci_init(h); /* init_one 2_5 */ 8307 free_percpu(h->lockup_detected); /* init_one 2 */ 8308 h->lockup_detected = NULL; /* init_one 2 */ 8309 if (h->resubmit_wq) { 8310 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8311 h->resubmit_wq = NULL; 8312 } 8313 if (h->rescan_ctlr_wq) { 8314 destroy_workqueue(h->rescan_ctlr_wq); 8315 h->rescan_ctlr_wq = NULL; 8316 } 8317 kfree(h); /* init_one 1 */ 8318 } 8319 8320 /* Called when controller lockup detected. */ 8321 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8322 { 8323 int i, refcount; 8324 struct CommandList *c; 8325 int failcount = 0; 8326 8327 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8328 for (i = 0; i < h->nr_cmds; i++) { 8329 c = h->cmd_pool + i; 8330 refcount = atomic_inc_return(&c->refcount); 8331 if (refcount > 1) { 8332 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8333 finish_cmd(c); 8334 atomic_dec(&h->commands_outstanding); 8335 failcount++; 8336 } 8337 cmd_free(h, c); 8338 } 8339 dev_warn(&h->pdev->dev, 8340 "failed %d commands in fail_all\n", failcount); 8341 } 8342 8343 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8344 { 8345 int cpu; 8346 8347 for_each_online_cpu(cpu) { 8348 u32 *lockup_detected; 8349 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8350 *lockup_detected = value; 8351 } 8352 wmb(); /* be sure the per-cpu variables are out to memory */ 8353 } 8354 8355 static void controller_lockup_detected(struct ctlr_info *h) 8356 { 8357 unsigned long flags; 8358 u32 lockup_detected; 8359 8360 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8361 spin_lock_irqsave(&h->lock, flags); 8362 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8363 if (!lockup_detected) { 8364 /* no heartbeat, but controller gave us a zero. */ 8365 dev_warn(&h->pdev->dev, 8366 "lockup detected after %d but scratchpad register is zero\n", 8367 h->heartbeat_sample_interval / HZ); 8368 lockup_detected = 0xffffffff; 8369 } 8370 set_lockup_detected_for_all_cpus(h, lockup_detected); 8371 spin_unlock_irqrestore(&h->lock, flags); 8372 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8373 lockup_detected, h->heartbeat_sample_interval / HZ); 8374 pci_disable_device(h->pdev); 8375 fail_all_outstanding_cmds(h); 8376 } 8377 8378 static int detect_controller_lockup(struct ctlr_info *h) 8379 { 8380 u64 now; 8381 u32 heartbeat; 8382 unsigned long flags; 8383 8384 now = get_jiffies_64(); 8385 /* If we've received an interrupt recently, we're ok. */ 8386 if (time_after64(h->last_intr_timestamp + 8387 (h->heartbeat_sample_interval), now)) 8388 return false; 8389 8390 /* 8391 * If we've already checked the heartbeat recently, we're ok. 8392 * This could happen if someone sends us a signal. We 8393 * otherwise don't care about signals in this thread. 8394 */ 8395 if (time_after64(h->last_heartbeat_timestamp + 8396 (h->heartbeat_sample_interval), now)) 8397 return false; 8398 8399 /* If heartbeat has not changed since we last looked, we're not ok. */ 8400 spin_lock_irqsave(&h->lock, flags); 8401 heartbeat = readl(&h->cfgtable->HeartBeat); 8402 spin_unlock_irqrestore(&h->lock, flags); 8403 if (h->last_heartbeat == heartbeat) { 8404 controller_lockup_detected(h); 8405 return true; 8406 } 8407 8408 /* We're ok. */ 8409 h->last_heartbeat = heartbeat; 8410 h->last_heartbeat_timestamp = now; 8411 return false; 8412 } 8413 8414 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8415 { 8416 int i; 8417 char *event_type; 8418 8419 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8420 return; 8421 8422 /* Ask the controller to clear the events we're handling. */ 8423 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8424 | CFGTBL_Trans_io_accel2)) && 8425 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8426 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8427 8428 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8429 event_type = "state change"; 8430 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8431 event_type = "configuration change"; 8432 /* Stop sending new RAID offload reqs via the IO accelerator */ 8433 scsi_block_requests(h->scsi_host); 8434 for (i = 0; i < h->ndevices; i++) { 8435 h->dev[i]->offload_enabled = 0; 8436 h->dev[i]->offload_to_be_enabled = 0; 8437 } 8438 hpsa_drain_accel_commands(h); 8439 /* Set 'accelerator path config change' bit */ 8440 dev_warn(&h->pdev->dev, 8441 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8442 h->events, event_type); 8443 writel(h->events, &(h->cfgtable->clear_event_notify)); 8444 /* Set the "clear event notify field update" bit 6 */ 8445 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8446 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8447 hpsa_wait_for_clear_event_notify_ack(h); 8448 scsi_unblock_requests(h->scsi_host); 8449 } else { 8450 /* Acknowledge controller notification events. */ 8451 writel(h->events, &(h->cfgtable->clear_event_notify)); 8452 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8453 hpsa_wait_for_clear_event_notify_ack(h); 8454 #if 0 8455 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8456 hpsa_wait_for_mode_change_ack(h); 8457 #endif 8458 } 8459 return; 8460 } 8461 8462 /* Check a register on the controller to see if there are configuration 8463 * changes (added/changed/removed logical drives, etc.) which mean that 8464 * we should rescan the controller for devices. 8465 * Also check flag for driver-initiated rescan. 8466 */ 8467 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8468 { 8469 if (h->drv_req_rescan) { 8470 h->drv_req_rescan = 0; 8471 return 1; 8472 } 8473 8474 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8475 return 0; 8476 8477 h->events = readl(&(h->cfgtable->event_notify)); 8478 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8479 } 8480 8481 /* 8482 * Check if any of the offline devices have become ready 8483 */ 8484 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8485 { 8486 unsigned long flags; 8487 struct offline_device_entry *d; 8488 struct list_head *this, *tmp; 8489 8490 spin_lock_irqsave(&h->offline_device_lock, flags); 8491 list_for_each_safe(this, tmp, &h->offline_device_list) { 8492 d = list_entry(this, struct offline_device_entry, 8493 offline_list); 8494 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8495 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8496 spin_lock_irqsave(&h->offline_device_lock, flags); 8497 list_del(&d->offline_list); 8498 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8499 return 1; 8500 } 8501 spin_lock_irqsave(&h->offline_device_lock, flags); 8502 } 8503 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8504 return 0; 8505 } 8506 8507 static int hpsa_luns_changed(struct ctlr_info *h) 8508 { 8509 int rc = 1; /* assume there are changes */ 8510 struct ReportLUNdata *logdev = NULL; 8511 8512 /* if we can't find out if lun data has changed, 8513 * assume that it has. 8514 */ 8515 8516 if (!h->lastlogicals) 8517 goto out; 8518 8519 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8520 if (!logdev) { 8521 dev_warn(&h->pdev->dev, 8522 "Out of memory, can't track lun changes.\n"); 8523 goto out; 8524 } 8525 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8526 dev_warn(&h->pdev->dev, 8527 "report luns failed, can't track lun changes.\n"); 8528 goto out; 8529 } 8530 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8531 dev_info(&h->pdev->dev, 8532 "Lun changes detected.\n"); 8533 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8534 goto out; 8535 } else 8536 rc = 0; /* no changes detected. */ 8537 out: 8538 kfree(logdev); 8539 return rc; 8540 } 8541 8542 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8543 { 8544 unsigned long flags; 8545 struct ctlr_info *h = container_of(to_delayed_work(work), 8546 struct ctlr_info, rescan_ctlr_work); 8547 8548 8549 if (h->remove_in_progress) 8550 return; 8551 8552 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 8553 scsi_host_get(h->scsi_host); 8554 hpsa_ack_ctlr_events(h); 8555 hpsa_scan_start(h->scsi_host); 8556 scsi_host_put(h->scsi_host); 8557 } else if (h->discovery_polling) { 8558 hpsa_disable_rld_caching(h); 8559 if (hpsa_luns_changed(h)) { 8560 struct Scsi_Host *sh = NULL; 8561 8562 dev_info(&h->pdev->dev, 8563 "driver discovery polling rescan.\n"); 8564 sh = scsi_host_get(h->scsi_host); 8565 if (sh != NULL) { 8566 hpsa_scan_start(sh); 8567 scsi_host_put(sh); 8568 } 8569 } 8570 } 8571 spin_lock_irqsave(&h->lock, flags); 8572 if (!h->remove_in_progress) 8573 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8574 h->heartbeat_sample_interval); 8575 spin_unlock_irqrestore(&h->lock, flags); 8576 } 8577 8578 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8579 { 8580 unsigned long flags; 8581 struct ctlr_info *h = container_of(to_delayed_work(work), 8582 struct ctlr_info, monitor_ctlr_work); 8583 8584 detect_controller_lockup(h); 8585 if (lockup_detected(h)) 8586 return; 8587 8588 spin_lock_irqsave(&h->lock, flags); 8589 if (!h->remove_in_progress) 8590 schedule_delayed_work(&h->monitor_ctlr_work, 8591 h->heartbeat_sample_interval); 8592 spin_unlock_irqrestore(&h->lock, flags); 8593 } 8594 8595 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8596 char *name) 8597 { 8598 struct workqueue_struct *wq = NULL; 8599 8600 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8601 if (!wq) 8602 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8603 8604 return wq; 8605 } 8606 8607 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8608 { 8609 int dac, rc; 8610 struct ctlr_info *h; 8611 int try_soft_reset = 0; 8612 unsigned long flags; 8613 u32 board_id; 8614 8615 if (number_of_controllers == 0) 8616 printk(KERN_INFO DRIVER_NAME "\n"); 8617 8618 rc = hpsa_lookup_board_id(pdev, &board_id); 8619 if (rc < 0) { 8620 dev_warn(&pdev->dev, "Board ID not found\n"); 8621 return rc; 8622 } 8623 8624 rc = hpsa_init_reset_devices(pdev, board_id); 8625 if (rc) { 8626 if (rc != -ENOTSUPP) 8627 return rc; 8628 /* If the reset fails in a particular way (it has no way to do 8629 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8630 * a soft reset once we get the controller configured up to the 8631 * point that it can accept a command. 8632 */ 8633 try_soft_reset = 1; 8634 rc = 0; 8635 } 8636 8637 reinit_after_soft_reset: 8638 8639 /* Command structures must be aligned on a 32-byte boundary because 8640 * the 5 lower bits of the address are used by the hardware. and by 8641 * the driver. See comments in hpsa.h for more info. 8642 */ 8643 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8644 h = kzalloc(sizeof(*h), GFP_KERNEL); 8645 if (!h) { 8646 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8647 return -ENOMEM; 8648 } 8649 8650 h->pdev = pdev; 8651 8652 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8653 INIT_LIST_HEAD(&h->offline_device_list); 8654 spin_lock_init(&h->lock); 8655 spin_lock_init(&h->offline_device_lock); 8656 spin_lock_init(&h->scan_lock); 8657 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8658 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8659 8660 /* Allocate and clear per-cpu variable lockup_detected */ 8661 h->lockup_detected = alloc_percpu(u32); 8662 if (!h->lockup_detected) { 8663 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8664 rc = -ENOMEM; 8665 goto clean1; /* aer/h */ 8666 } 8667 set_lockup_detected_for_all_cpus(h, 0); 8668 8669 rc = hpsa_pci_init(h); 8670 if (rc) 8671 goto clean2; /* lu, aer/h */ 8672 8673 /* relies on h-> settings made by hpsa_pci_init, including 8674 * interrupt_mode h->intr */ 8675 rc = hpsa_scsi_host_alloc(h); 8676 if (rc) 8677 goto clean2_5; /* pci, lu, aer/h */ 8678 8679 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8680 h->ctlr = number_of_controllers; 8681 number_of_controllers++; 8682 8683 /* configure PCI DMA stuff */ 8684 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8685 if (rc == 0) { 8686 dac = 1; 8687 } else { 8688 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8689 if (rc == 0) { 8690 dac = 0; 8691 } else { 8692 dev_err(&pdev->dev, "no suitable DMA available\n"); 8693 goto clean3; /* shost, pci, lu, aer/h */ 8694 } 8695 } 8696 8697 /* make sure the board interrupts are off */ 8698 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8699 8700 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8701 if (rc) 8702 goto clean3; /* shost, pci, lu, aer/h */ 8703 rc = hpsa_alloc_cmd_pool(h); 8704 if (rc) 8705 goto clean4; /* irq, shost, pci, lu, aer/h */ 8706 rc = hpsa_alloc_sg_chain_blocks(h); 8707 if (rc) 8708 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8709 init_waitqueue_head(&h->scan_wait_queue); 8710 init_waitqueue_head(&h->abort_cmd_wait_queue); 8711 init_waitqueue_head(&h->event_sync_wait_queue); 8712 mutex_init(&h->reset_mutex); 8713 h->scan_finished = 1; /* no scan currently in progress */ 8714 8715 pci_set_drvdata(pdev, h); 8716 h->ndevices = 0; 8717 8718 spin_lock_init(&h->devlock); 8719 rc = hpsa_put_ctlr_into_performant_mode(h); 8720 if (rc) 8721 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8722 8723 /* create the resubmit workqueue */ 8724 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8725 if (!h->rescan_ctlr_wq) { 8726 rc = -ENOMEM; 8727 goto clean7; 8728 } 8729 8730 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8731 if (!h->resubmit_wq) { 8732 rc = -ENOMEM; 8733 goto clean7; /* aer/h */ 8734 } 8735 8736 /* 8737 * At this point, the controller is ready to take commands. 8738 * Now, if reset_devices and the hard reset didn't work, try 8739 * the soft reset and see if that works. 8740 */ 8741 if (try_soft_reset) { 8742 8743 /* This is kind of gross. We may or may not get a completion 8744 * from the soft reset command, and if we do, then the value 8745 * from the fifo may or may not be valid. So, we wait 10 secs 8746 * after the reset throwing away any completions we get during 8747 * that time. Unregister the interrupt handler and register 8748 * fake ones to scoop up any residual completions. 8749 */ 8750 spin_lock_irqsave(&h->lock, flags); 8751 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8752 spin_unlock_irqrestore(&h->lock, flags); 8753 hpsa_free_irqs(h); 8754 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8755 hpsa_intx_discard_completions); 8756 if (rc) { 8757 dev_warn(&h->pdev->dev, 8758 "Failed to request_irq after soft reset.\n"); 8759 /* 8760 * cannot goto clean7 or free_irqs will be called 8761 * again. Instead, do its work 8762 */ 8763 hpsa_free_performant_mode(h); /* clean7 */ 8764 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8765 hpsa_free_cmd_pool(h); /* clean5 */ 8766 /* 8767 * skip hpsa_free_irqs(h) clean4 since that 8768 * was just called before request_irqs failed 8769 */ 8770 goto clean3; 8771 } 8772 8773 rc = hpsa_kdump_soft_reset(h); 8774 if (rc) 8775 /* Neither hard nor soft reset worked, we're hosed. */ 8776 goto clean7; 8777 8778 dev_info(&h->pdev->dev, "Board READY.\n"); 8779 dev_info(&h->pdev->dev, 8780 "Waiting for stale completions to drain.\n"); 8781 h->access.set_intr_mask(h, HPSA_INTR_ON); 8782 msleep(10000); 8783 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8784 8785 rc = controller_reset_failed(h->cfgtable); 8786 if (rc) 8787 dev_info(&h->pdev->dev, 8788 "Soft reset appears to have failed.\n"); 8789 8790 /* since the controller's reset, we have to go back and re-init 8791 * everything. Easiest to just forget what we've done and do it 8792 * all over again. 8793 */ 8794 hpsa_undo_allocations_after_kdump_soft_reset(h); 8795 try_soft_reset = 0; 8796 if (rc) 8797 /* don't goto clean, we already unallocated */ 8798 return -ENODEV; 8799 8800 goto reinit_after_soft_reset; 8801 } 8802 8803 /* Enable Accelerated IO path at driver layer */ 8804 h->acciopath_status = 1; 8805 /* Disable discovery polling.*/ 8806 h->discovery_polling = 0; 8807 8808 8809 /* Turn the interrupts on so we can service requests */ 8810 h->access.set_intr_mask(h, HPSA_INTR_ON); 8811 8812 hpsa_hba_inquiry(h); 8813 8814 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8815 if (!h->lastlogicals) 8816 dev_info(&h->pdev->dev, 8817 "Can't track change to report lun data\n"); 8818 8819 /* hook into SCSI subsystem */ 8820 rc = hpsa_scsi_add_host(h); 8821 if (rc) 8822 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8823 8824 /* Monitor the controller for firmware lockups */ 8825 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8826 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8827 schedule_delayed_work(&h->monitor_ctlr_work, 8828 h->heartbeat_sample_interval); 8829 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8830 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8831 h->heartbeat_sample_interval); 8832 return 0; 8833 8834 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8835 hpsa_free_performant_mode(h); 8836 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8837 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8838 hpsa_free_sg_chain_blocks(h); 8839 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8840 hpsa_free_cmd_pool(h); 8841 clean4: /* irq, shost, pci, lu, aer/h */ 8842 hpsa_free_irqs(h); 8843 clean3: /* shost, pci, lu, aer/h */ 8844 scsi_host_put(h->scsi_host); 8845 h->scsi_host = NULL; 8846 clean2_5: /* pci, lu, aer/h */ 8847 hpsa_free_pci_init(h); 8848 clean2: /* lu, aer/h */ 8849 if (h->lockup_detected) { 8850 free_percpu(h->lockup_detected); 8851 h->lockup_detected = NULL; 8852 } 8853 clean1: /* wq/aer/h */ 8854 if (h->resubmit_wq) { 8855 destroy_workqueue(h->resubmit_wq); 8856 h->resubmit_wq = NULL; 8857 } 8858 if (h->rescan_ctlr_wq) { 8859 destroy_workqueue(h->rescan_ctlr_wq); 8860 h->rescan_ctlr_wq = NULL; 8861 } 8862 kfree(h); 8863 return rc; 8864 } 8865 8866 static void hpsa_flush_cache(struct ctlr_info *h) 8867 { 8868 char *flush_buf; 8869 struct CommandList *c; 8870 int rc; 8871 8872 if (unlikely(lockup_detected(h))) 8873 return; 8874 flush_buf = kzalloc(4, GFP_KERNEL); 8875 if (!flush_buf) 8876 return; 8877 8878 c = cmd_alloc(h); 8879 8880 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8881 RAID_CTLR_LUNID, TYPE_CMD)) { 8882 goto out; 8883 } 8884 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8885 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8886 if (rc) 8887 goto out; 8888 if (c->err_info->CommandStatus != 0) 8889 out: 8890 dev_warn(&h->pdev->dev, 8891 "error flushing cache on controller\n"); 8892 cmd_free(h, c); 8893 kfree(flush_buf); 8894 } 8895 8896 /* Make controller gather fresh report lun data each time we 8897 * send down a report luns request 8898 */ 8899 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8900 { 8901 u32 *options; 8902 struct CommandList *c; 8903 int rc; 8904 8905 /* Don't bother trying to set diag options if locked up */ 8906 if (unlikely(h->lockup_detected)) 8907 return; 8908 8909 options = kzalloc(sizeof(*options), GFP_KERNEL); 8910 if (!options) { 8911 dev_err(&h->pdev->dev, 8912 "Error: failed to disable rld caching, during alloc.\n"); 8913 return; 8914 } 8915 8916 c = cmd_alloc(h); 8917 8918 /* first, get the current diag options settings */ 8919 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8920 RAID_CTLR_LUNID, TYPE_CMD)) 8921 goto errout; 8922 8923 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8924 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8925 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8926 goto errout; 8927 8928 /* Now, set the bit for disabling the RLD caching */ 8929 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8930 8931 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8932 RAID_CTLR_LUNID, TYPE_CMD)) 8933 goto errout; 8934 8935 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8936 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8937 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8938 goto errout; 8939 8940 /* Now verify that it got set: */ 8941 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8942 RAID_CTLR_LUNID, TYPE_CMD)) 8943 goto errout; 8944 8945 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8946 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8947 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8948 goto errout; 8949 8950 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8951 goto out; 8952 8953 errout: 8954 dev_err(&h->pdev->dev, 8955 "Error: failed to disable report lun data caching.\n"); 8956 out: 8957 cmd_free(h, c); 8958 kfree(options); 8959 } 8960 8961 static void hpsa_shutdown(struct pci_dev *pdev) 8962 { 8963 struct ctlr_info *h; 8964 8965 h = pci_get_drvdata(pdev); 8966 /* Turn board interrupts off and send the flush cache command 8967 * sendcmd will turn off interrupt, and send the flush... 8968 * To write all data in the battery backed cache to disks 8969 */ 8970 hpsa_flush_cache(h); 8971 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8972 hpsa_free_irqs(h); /* init_one 4 */ 8973 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8974 } 8975 8976 static void hpsa_free_device_info(struct ctlr_info *h) 8977 { 8978 int i; 8979 8980 for (i = 0; i < h->ndevices; i++) { 8981 kfree(h->dev[i]); 8982 h->dev[i] = NULL; 8983 } 8984 } 8985 8986 static void hpsa_remove_one(struct pci_dev *pdev) 8987 { 8988 struct ctlr_info *h; 8989 unsigned long flags; 8990 8991 if (pci_get_drvdata(pdev) == NULL) { 8992 dev_err(&pdev->dev, "unable to remove device\n"); 8993 return; 8994 } 8995 h = pci_get_drvdata(pdev); 8996 8997 /* Get rid of any controller monitoring work items */ 8998 spin_lock_irqsave(&h->lock, flags); 8999 h->remove_in_progress = 1; 9000 spin_unlock_irqrestore(&h->lock, flags); 9001 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9002 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9003 destroy_workqueue(h->rescan_ctlr_wq); 9004 destroy_workqueue(h->resubmit_wq); 9005 9006 /* 9007 * Call before disabling interrupts. 9008 * scsi_remove_host can trigger I/O operations especially 9009 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9010 * operations which cannot complete and will hang the system. 9011 */ 9012 if (h->scsi_host) 9013 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9014 /* includes hpsa_free_irqs - init_one 4 */ 9015 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9016 hpsa_shutdown(pdev); 9017 9018 hpsa_free_device_info(h); /* scan */ 9019 9020 kfree(h->hba_inquiry_data); /* init_one 10 */ 9021 h->hba_inquiry_data = NULL; /* init_one 10 */ 9022 hpsa_free_ioaccel2_sg_chain_blocks(h); 9023 hpsa_free_performant_mode(h); /* init_one 7 */ 9024 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9025 hpsa_free_cmd_pool(h); /* init_one 5 */ 9026 kfree(h->lastlogicals); 9027 9028 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9029 9030 scsi_host_put(h->scsi_host); /* init_one 3 */ 9031 h->scsi_host = NULL; /* init_one 3 */ 9032 9033 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9034 hpsa_free_pci_init(h); /* init_one 2.5 */ 9035 9036 free_percpu(h->lockup_detected); /* init_one 2 */ 9037 h->lockup_detected = NULL; /* init_one 2 */ 9038 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9039 9040 hpsa_delete_sas_host(h); 9041 9042 kfree(h); /* init_one 1 */ 9043 } 9044 9045 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9046 __attribute__((unused)) pm_message_t state) 9047 { 9048 return -ENOSYS; 9049 } 9050 9051 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9052 { 9053 return -ENOSYS; 9054 } 9055 9056 static struct pci_driver hpsa_pci_driver = { 9057 .name = HPSA, 9058 .probe = hpsa_init_one, 9059 .remove = hpsa_remove_one, 9060 .id_table = hpsa_pci_device_id, /* id_table */ 9061 .shutdown = hpsa_shutdown, 9062 .suspend = hpsa_suspend, 9063 .resume = hpsa_resume, 9064 }; 9065 9066 /* Fill in bucket_map[], given nsgs (the max number of 9067 * scatter gather elements supported) and bucket[], 9068 * which is an array of 8 integers. The bucket[] array 9069 * contains 8 different DMA transfer sizes (in 16 9070 * byte increments) which the controller uses to fetch 9071 * commands. This function fills in bucket_map[], which 9072 * maps a given number of scatter gather elements to one of 9073 * the 8 DMA transfer sizes. The point of it is to allow the 9074 * controller to only do as much DMA as needed to fetch the 9075 * command, with the DMA transfer size encoded in the lower 9076 * bits of the command address. 9077 */ 9078 static void calc_bucket_map(int bucket[], int num_buckets, 9079 int nsgs, int min_blocks, u32 *bucket_map) 9080 { 9081 int i, j, b, size; 9082 9083 /* Note, bucket_map must have nsgs+1 entries. */ 9084 for (i = 0; i <= nsgs; i++) { 9085 /* Compute size of a command with i SG entries */ 9086 size = i + min_blocks; 9087 b = num_buckets; /* Assume the biggest bucket */ 9088 /* Find the bucket that is just big enough */ 9089 for (j = 0; j < num_buckets; j++) { 9090 if (bucket[j] >= size) { 9091 b = j; 9092 break; 9093 } 9094 } 9095 /* for a command with i SG entries, use bucket b. */ 9096 bucket_map[i] = b; 9097 } 9098 } 9099 9100 /* 9101 * return -ENODEV on err, 0 on success (or no action) 9102 * allocates numerous items that must be freed later 9103 */ 9104 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9105 { 9106 int i; 9107 unsigned long register_value; 9108 unsigned long transMethod = CFGTBL_Trans_Performant | 9109 (trans_support & CFGTBL_Trans_use_short_tags) | 9110 CFGTBL_Trans_enable_directed_msix | 9111 (trans_support & (CFGTBL_Trans_io_accel1 | 9112 CFGTBL_Trans_io_accel2)); 9113 struct access_method access = SA5_performant_access; 9114 9115 /* This is a bit complicated. There are 8 registers on 9116 * the controller which we write to to tell it 8 different 9117 * sizes of commands which there may be. It's a way of 9118 * reducing the DMA done to fetch each command. Encoded into 9119 * each command's tag are 3 bits which communicate to the controller 9120 * which of the eight sizes that command fits within. The size of 9121 * each command depends on how many scatter gather entries there are. 9122 * Each SG entry requires 16 bytes. The eight registers are programmed 9123 * with the number of 16-byte blocks a command of that size requires. 9124 * The smallest command possible requires 5 such 16 byte blocks. 9125 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9126 * blocks. Note, this only extends to the SG entries contained 9127 * within the command block, and does not extend to chained blocks 9128 * of SG elements. bft[] contains the eight values we write to 9129 * the registers. They are not evenly distributed, but have more 9130 * sizes for small commands, and fewer sizes for larger commands. 9131 */ 9132 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9133 #define MIN_IOACCEL2_BFT_ENTRY 5 9134 #define HPSA_IOACCEL2_HEADER_SZ 4 9135 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9136 13, 14, 15, 16, 17, 18, 19, 9137 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9138 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9139 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9140 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9141 16 * MIN_IOACCEL2_BFT_ENTRY); 9142 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9143 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9144 /* 5 = 1 s/g entry or 4k 9145 * 6 = 2 s/g entry or 8k 9146 * 8 = 4 s/g entry or 16k 9147 * 10 = 6 s/g entry or 24k 9148 */ 9149 9150 /* If the controller supports either ioaccel method then 9151 * we can also use the RAID stack submit path that does not 9152 * perform the superfluous readl() after each command submission. 9153 */ 9154 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9155 access = SA5_performant_access_no_read; 9156 9157 /* Controller spec: zero out this buffer. */ 9158 for (i = 0; i < h->nreply_queues; i++) 9159 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9160 9161 bft[7] = SG_ENTRIES_IN_CMD + 4; 9162 calc_bucket_map(bft, ARRAY_SIZE(bft), 9163 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9164 for (i = 0; i < 8; i++) 9165 writel(bft[i], &h->transtable->BlockFetch[i]); 9166 9167 /* size of controller ring buffer */ 9168 writel(h->max_commands, &h->transtable->RepQSize); 9169 writel(h->nreply_queues, &h->transtable->RepQCount); 9170 writel(0, &h->transtable->RepQCtrAddrLow32); 9171 writel(0, &h->transtable->RepQCtrAddrHigh32); 9172 9173 for (i = 0; i < h->nreply_queues; i++) { 9174 writel(0, &h->transtable->RepQAddr[i].upper); 9175 writel(h->reply_queue[i].busaddr, 9176 &h->transtable->RepQAddr[i].lower); 9177 } 9178 9179 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9180 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9181 /* 9182 * enable outbound interrupt coalescing in accelerator mode; 9183 */ 9184 if (trans_support & CFGTBL_Trans_io_accel1) { 9185 access = SA5_ioaccel_mode1_access; 9186 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9187 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9188 } else { 9189 if (trans_support & CFGTBL_Trans_io_accel2) { 9190 access = SA5_ioaccel_mode2_access; 9191 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9192 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9193 } 9194 } 9195 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9196 if (hpsa_wait_for_mode_change_ack(h)) { 9197 dev_err(&h->pdev->dev, 9198 "performant mode problem - doorbell timeout\n"); 9199 return -ENODEV; 9200 } 9201 register_value = readl(&(h->cfgtable->TransportActive)); 9202 if (!(register_value & CFGTBL_Trans_Performant)) { 9203 dev_err(&h->pdev->dev, 9204 "performant mode problem - transport not active\n"); 9205 return -ENODEV; 9206 } 9207 /* Change the access methods to the performant access methods */ 9208 h->access = access; 9209 h->transMethod = transMethod; 9210 9211 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9212 (trans_support & CFGTBL_Trans_io_accel2))) 9213 return 0; 9214 9215 if (trans_support & CFGTBL_Trans_io_accel1) { 9216 /* Set up I/O accelerator mode */ 9217 for (i = 0; i < h->nreply_queues; i++) { 9218 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9219 h->reply_queue[i].current_entry = 9220 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9221 } 9222 bft[7] = h->ioaccel_maxsg + 8; 9223 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9224 h->ioaccel1_blockFetchTable); 9225 9226 /* initialize all reply queue entries to unused */ 9227 for (i = 0; i < h->nreply_queues; i++) 9228 memset(h->reply_queue[i].head, 9229 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9230 h->reply_queue_size); 9231 9232 /* set all the constant fields in the accelerator command 9233 * frames once at init time to save CPU cycles later. 9234 */ 9235 for (i = 0; i < h->nr_cmds; i++) { 9236 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9237 9238 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9239 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9240 (i * sizeof(struct ErrorInfo))); 9241 cp->err_info_len = sizeof(struct ErrorInfo); 9242 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9243 cp->host_context_flags = 9244 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9245 cp->timeout_sec = 0; 9246 cp->ReplyQueue = 0; 9247 cp->tag = 9248 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9249 cp->host_addr = 9250 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9251 (i * sizeof(struct io_accel1_cmd))); 9252 } 9253 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9254 u64 cfg_offset, cfg_base_addr_index; 9255 u32 bft2_offset, cfg_base_addr; 9256 int rc; 9257 9258 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9259 &cfg_base_addr_index, &cfg_offset); 9260 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9261 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9262 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9263 4, h->ioaccel2_blockFetchTable); 9264 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9265 BUILD_BUG_ON(offsetof(struct CfgTable, 9266 io_accel_request_size_offset) != 0xb8); 9267 h->ioaccel2_bft2_regs = 9268 remap_pci_mem(pci_resource_start(h->pdev, 9269 cfg_base_addr_index) + 9270 cfg_offset + bft2_offset, 9271 ARRAY_SIZE(bft2) * 9272 sizeof(*h->ioaccel2_bft2_regs)); 9273 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9274 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9275 } 9276 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9277 if (hpsa_wait_for_mode_change_ack(h)) { 9278 dev_err(&h->pdev->dev, 9279 "performant mode problem - enabling ioaccel mode\n"); 9280 return -ENODEV; 9281 } 9282 return 0; 9283 } 9284 9285 /* Free ioaccel1 mode command blocks and block fetch table */ 9286 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9287 { 9288 if (h->ioaccel_cmd_pool) { 9289 pci_free_consistent(h->pdev, 9290 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9291 h->ioaccel_cmd_pool, 9292 h->ioaccel_cmd_pool_dhandle); 9293 h->ioaccel_cmd_pool = NULL; 9294 h->ioaccel_cmd_pool_dhandle = 0; 9295 } 9296 kfree(h->ioaccel1_blockFetchTable); 9297 h->ioaccel1_blockFetchTable = NULL; 9298 } 9299 9300 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9301 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9302 { 9303 h->ioaccel_maxsg = 9304 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9305 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9306 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9307 9308 /* Command structures must be aligned on a 128-byte boundary 9309 * because the 7 lower bits of the address are used by the 9310 * hardware. 9311 */ 9312 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9313 IOACCEL1_COMMANDLIST_ALIGNMENT); 9314 h->ioaccel_cmd_pool = 9315 pci_alloc_consistent(h->pdev, 9316 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9317 &(h->ioaccel_cmd_pool_dhandle)); 9318 9319 h->ioaccel1_blockFetchTable = 9320 kmalloc(((h->ioaccel_maxsg + 1) * 9321 sizeof(u32)), GFP_KERNEL); 9322 9323 if ((h->ioaccel_cmd_pool == NULL) || 9324 (h->ioaccel1_blockFetchTable == NULL)) 9325 goto clean_up; 9326 9327 memset(h->ioaccel_cmd_pool, 0, 9328 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9329 return 0; 9330 9331 clean_up: 9332 hpsa_free_ioaccel1_cmd_and_bft(h); 9333 return -ENOMEM; 9334 } 9335 9336 /* Free ioaccel2 mode command blocks and block fetch table */ 9337 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9338 { 9339 hpsa_free_ioaccel2_sg_chain_blocks(h); 9340 9341 if (h->ioaccel2_cmd_pool) { 9342 pci_free_consistent(h->pdev, 9343 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9344 h->ioaccel2_cmd_pool, 9345 h->ioaccel2_cmd_pool_dhandle); 9346 h->ioaccel2_cmd_pool = NULL; 9347 h->ioaccel2_cmd_pool_dhandle = 0; 9348 } 9349 kfree(h->ioaccel2_blockFetchTable); 9350 h->ioaccel2_blockFetchTable = NULL; 9351 } 9352 9353 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9354 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9355 { 9356 int rc; 9357 9358 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9359 9360 h->ioaccel_maxsg = 9361 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9362 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9363 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9364 9365 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9366 IOACCEL2_COMMANDLIST_ALIGNMENT); 9367 h->ioaccel2_cmd_pool = 9368 pci_alloc_consistent(h->pdev, 9369 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9370 &(h->ioaccel2_cmd_pool_dhandle)); 9371 9372 h->ioaccel2_blockFetchTable = 9373 kmalloc(((h->ioaccel_maxsg + 1) * 9374 sizeof(u32)), GFP_KERNEL); 9375 9376 if ((h->ioaccel2_cmd_pool == NULL) || 9377 (h->ioaccel2_blockFetchTable == NULL)) { 9378 rc = -ENOMEM; 9379 goto clean_up; 9380 } 9381 9382 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9383 if (rc) 9384 goto clean_up; 9385 9386 memset(h->ioaccel2_cmd_pool, 0, 9387 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9388 return 0; 9389 9390 clean_up: 9391 hpsa_free_ioaccel2_cmd_and_bft(h); 9392 return rc; 9393 } 9394 9395 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9396 static void hpsa_free_performant_mode(struct ctlr_info *h) 9397 { 9398 kfree(h->blockFetchTable); 9399 h->blockFetchTable = NULL; 9400 hpsa_free_reply_queues(h); 9401 hpsa_free_ioaccel1_cmd_and_bft(h); 9402 hpsa_free_ioaccel2_cmd_and_bft(h); 9403 } 9404 9405 /* return -ENODEV on error, 0 on success (or no action) 9406 * allocates numerous items that must be freed later 9407 */ 9408 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9409 { 9410 u32 trans_support; 9411 unsigned long transMethod = CFGTBL_Trans_Performant | 9412 CFGTBL_Trans_use_short_tags; 9413 int i, rc; 9414 9415 if (hpsa_simple_mode) 9416 return 0; 9417 9418 trans_support = readl(&(h->cfgtable->TransportSupport)); 9419 if (!(trans_support & PERFORMANT_MODE)) 9420 return 0; 9421 9422 /* Check for I/O accelerator mode support */ 9423 if (trans_support & CFGTBL_Trans_io_accel1) { 9424 transMethod |= CFGTBL_Trans_io_accel1 | 9425 CFGTBL_Trans_enable_directed_msix; 9426 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9427 if (rc) 9428 return rc; 9429 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9430 transMethod |= CFGTBL_Trans_io_accel2 | 9431 CFGTBL_Trans_enable_directed_msix; 9432 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9433 if (rc) 9434 return rc; 9435 } 9436 9437 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9438 hpsa_get_max_perf_mode_cmds(h); 9439 /* Performant mode ring buffer and supporting data structures */ 9440 h->reply_queue_size = h->max_commands * sizeof(u64); 9441 9442 for (i = 0; i < h->nreply_queues; i++) { 9443 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9444 h->reply_queue_size, 9445 &(h->reply_queue[i].busaddr)); 9446 if (!h->reply_queue[i].head) { 9447 rc = -ENOMEM; 9448 goto clean1; /* rq, ioaccel */ 9449 } 9450 h->reply_queue[i].size = h->max_commands; 9451 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9452 h->reply_queue[i].current_entry = 0; 9453 } 9454 9455 /* Need a block fetch table for performant mode */ 9456 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9457 sizeof(u32)), GFP_KERNEL); 9458 if (!h->blockFetchTable) { 9459 rc = -ENOMEM; 9460 goto clean1; /* rq, ioaccel */ 9461 } 9462 9463 rc = hpsa_enter_performant_mode(h, trans_support); 9464 if (rc) 9465 goto clean2; /* bft, rq, ioaccel */ 9466 return 0; 9467 9468 clean2: /* bft, rq, ioaccel */ 9469 kfree(h->blockFetchTable); 9470 h->blockFetchTable = NULL; 9471 clean1: /* rq, ioaccel */ 9472 hpsa_free_reply_queues(h); 9473 hpsa_free_ioaccel1_cmd_and_bft(h); 9474 hpsa_free_ioaccel2_cmd_and_bft(h); 9475 return rc; 9476 } 9477 9478 static int is_accelerated_cmd(struct CommandList *c) 9479 { 9480 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9481 } 9482 9483 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9484 { 9485 struct CommandList *c = NULL; 9486 int i, accel_cmds_out; 9487 int refcount; 9488 9489 do { /* wait for all outstanding ioaccel commands to drain out */ 9490 accel_cmds_out = 0; 9491 for (i = 0; i < h->nr_cmds; i++) { 9492 c = h->cmd_pool + i; 9493 refcount = atomic_inc_return(&c->refcount); 9494 if (refcount > 1) /* Command is allocated */ 9495 accel_cmds_out += is_accelerated_cmd(c); 9496 cmd_free(h, c); 9497 } 9498 if (accel_cmds_out <= 0) 9499 break; 9500 msleep(100); 9501 } while (1); 9502 } 9503 9504 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9505 struct hpsa_sas_port *hpsa_sas_port) 9506 { 9507 struct hpsa_sas_phy *hpsa_sas_phy; 9508 struct sas_phy *phy; 9509 9510 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9511 if (!hpsa_sas_phy) 9512 return NULL; 9513 9514 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9515 hpsa_sas_port->next_phy_index); 9516 if (!phy) { 9517 kfree(hpsa_sas_phy); 9518 return NULL; 9519 } 9520 9521 hpsa_sas_port->next_phy_index++; 9522 hpsa_sas_phy->phy = phy; 9523 hpsa_sas_phy->parent_port = hpsa_sas_port; 9524 9525 return hpsa_sas_phy; 9526 } 9527 9528 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9529 { 9530 struct sas_phy *phy = hpsa_sas_phy->phy; 9531 9532 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9533 sas_phy_free(phy); 9534 if (hpsa_sas_phy->added_to_port) 9535 list_del(&hpsa_sas_phy->phy_list_entry); 9536 kfree(hpsa_sas_phy); 9537 } 9538 9539 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9540 { 9541 int rc; 9542 struct hpsa_sas_port *hpsa_sas_port; 9543 struct sas_phy *phy; 9544 struct sas_identify *identify; 9545 9546 hpsa_sas_port = hpsa_sas_phy->parent_port; 9547 phy = hpsa_sas_phy->phy; 9548 9549 identify = &phy->identify; 9550 memset(identify, 0, sizeof(*identify)); 9551 identify->sas_address = hpsa_sas_port->sas_address; 9552 identify->device_type = SAS_END_DEVICE; 9553 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9554 identify->target_port_protocols = SAS_PROTOCOL_STP; 9555 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9556 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9557 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9558 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9559 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9560 9561 rc = sas_phy_add(hpsa_sas_phy->phy); 9562 if (rc) 9563 return rc; 9564 9565 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9566 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9567 &hpsa_sas_port->phy_list_head); 9568 hpsa_sas_phy->added_to_port = true; 9569 9570 return 0; 9571 } 9572 9573 static int 9574 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9575 struct sas_rphy *rphy) 9576 { 9577 struct sas_identify *identify; 9578 9579 identify = &rphy->identify; 9580 identify->sas_address = hpsa_sas_port->sas_address; 9581 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9582 identify->target_port_protocols = SAS_PROTOCOL_STP; 9583 9584 return sas_rphy_add(rphy); 9585 } 9586 9587 static struct hpsa_sas_port 9588 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9589 u64 sas_address) 9590 { 9591 int rc; 9592 struct hpsa_sas_port *hpsa_sas_port; 9593 struct sas_port *port; 9594 9595 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9596 if (!hpsa_sas_port) 9597 return NULL; 9598 9599 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9600 hpsa_sas_port->parent_node = hpsa_sas_node; 9601 9602 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9603 if (!port) 9604 goto free_hpsa_port; 9605 9606 rc = sas_port_add(port); 9607 if (rc) 9608 goto free_sas_port; 9609 9610 hpsa_sas_port->port = port; 9611 hpsa_sas_port->sas_address = sas_address; 9612 list_add_tail(&hpsa_sas_port->port_list_entry, 9613 &hpsa_sas_node->port_list_head); 9614 9615 return hpsa_sas_port; 9616 9617 free_sas_port: 9618 sas_port_free(port); 9619 free_hpsa_port: 9620 kfree(hpsa_sas_port); 9621 9622 return NULL; 9623 } 9624 9625 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9626 { 9627 struct hpsa_sas_phy *hpsa_sas_phy; 9628 struct hpsa_sas_phy *next; 9629 9630 list_for_each_entry_safe(hpsa_sas_phy, next, 9631 &hpsa_sas_port->phy_list_head, phy_list_entry) 9632 hpsa_free_sas_phy(hpsa_sas_phy); 9633 9634 sas_port_delete(hpsa_sas_port->port); 9635 list_del(&hpsa_sas_port->port_list_entry); 9636 kfree(hpsa_sas_port); 9637 } 9638 9639 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9640 { 9641 struct hpsa_sas_node *hpsa_sas_node; 9642 9643 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9644 if (hpsa_sas_node) { 9645 hpsa_sas_node->parent_dev = parent_dev; 9646 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9647 } 9648 9649 return hpsa_sas_node; 9650 } 9651 9652 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9653 { 9654 struct hpsa_sas_port *hpsa_sas_port; 9655 struct hpsa_sas_port *next; 9656 9657 if (!hpsa_sas_node) 9658 return; 9659 9660 list_for_each_entry_safe(hpsa_sas_port, next, 9661 &hpsa_sas_node->port_list_head, port_list_entry) 9662 hpsa_free_sas_port(hpsa_sas_port); 9663 9664 kfree(hpsa_sas_node); 9665 } 9666 9667 static struct hpsa_scsi_dev_t 9668 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9669 struct sas_rphy *rphy) 9670 { 9671 int i; 9672 struct hpsa_scsi_dev_t *device; 9673 9674 for (i = 0; i < h->ndevices; i++) { 9675 device = h->dev[i]; 9676 if (!device->sas_port) 9677 continue; 9678 if (device->sas_port->rphy == rphy) 9679 return device; 9680 } 9681 9682 return NULL; 9683 } 9684 9685 static int hpsa_add_sas_host(struct ctlr_info *h) 9686 { 9687 int rc; 9688 struct device *parent_dev; 9689 struct hpsa_sas_node *hpsa_sas_node; 9690 struct hpsa_sas_port *hpsa_sas_port; 9691 struct hpsa_sas_phy *hpsa_sas_phy; 9692 9693 parent_dev = &h->scsi_host->shost_gendev; 9694 9695 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9696 if (!hpsa_sas_node) 9697 return -ENOMEM; 9698 9699 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9700 if (!hpsa_sas_port) { 9701 rc = -ENODEV; 9702 goto free_sas_node; 9703 } 9704 9705 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9706 if (!hpsa_sas_phy) { 9707 rc = -ENODEV; 9708 goto free_sas_port; 9709 } 9710 9711 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9712 if (rc) 9713 goto free_sas_phy; 9714 9715 h->sas_host = hpsa_sas_node; 9716 9717 return 0; 9718 9719 free_sas_phy: 9720 hpsa_free_sas_phy(hpsa_sas_phy); 9721 free_sas_port: 9722 hpsa_free_sas_port(hpsa_sas_port); 9723 free_sas_node: 9724 hpsa_free_sas_node(hpsa_sas_node); 9725 9726 return rc; 9727 } 9728 9729 static void hpsa_delete_sas_host(struct ctlr_info *h) 9730 { 9731 hpsa_free_sas_node(h->sas_host); 9732 } 9733 9734 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9735 struct hpsa_scsi_dev_t *device) 9736 { 9737 int rc; 9738 struct hpsa_sas_port *hpsa_sas_port; 9739 struct sas_rphy *rphy; 9740 9741 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9742 if (!hpsa_sas_port) 9743 return -ENOMEM; 9744 9745 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9746 if (!rphy) { 9747 rc = -ENODEV; 9748 goto free_sas_port; 9749 } 9750 9751 hpsa_sas_port->rphy = rphy; 9752 device->sas_port = hpsa_sas_port; 9753 9754 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9755 if (rc) 9756 goto free_sas_port; 9757 9758 return 0; 9759 9760 free_sas_port: 9761 hpsa_free_sas_port(hpsa_sas_port); 9762 device->sas_port = NULL; 9763 9764 return rc; 9765 } 9766 9767 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9768 { 9769 if (device->sas_port) { 9770 hpsa_free_sas_port(device->sas_port); 9771 device->sas_port = NULL; 9772 } 9773 } 9774 9775 static int 9776 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9777 { 9778 return 0; 9779 } 9780 9781 static int 9782 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9783 { 9784 *identifier = 0; 9785 return 0; 9786 } 9787 9788 static int 9789 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9790 { 9791 return -ENXIO; 9792 } 9793 9794 static int 9795 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9796 { 9797 return 0; 9798 } 9799 9800 static int 9801 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9802 { 9803 return 0; 9804 } 9805 9806 static int 9807 hpsa_sas_phy_setup(struct sas_phy *phy) 9808 { 9809 return 0; 9810 } 9811 9812 static void 9813 hpsa_sas_phy_release(struct sas_phy *phy) 9814 { 9815 } 9816 9817 static int 9818 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9819 { 9820 return -EINVAL; 9821 } 9822 9823 /* SMP = Serial Management Protocol */ 9824 static int 9825 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9826 struct request *req) 9827 { 9828 return -EINVAL; 9829 } 9830 9831 static struct sas_function_template hpsa_sas_transport_functions = { 9832 .get_linkerrors = hpsa_sas_get_linkerrors, 9833 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9834 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9835 .phy_reset = hpsa_sas_phy_reset, 9836 .phy_enable = hpsa_sas_phy_enable, 9837 .phy_setup = hpsa_sas_phy_setup, 9838 .phy_release = hpsa_sas_phy_release, 9839 .set_phy_speed = hpsa_sas_phy_speed, 9840 .smp_handler = hpsa_sas_smp_handler, 9841 }; 9842 9843 /* 9844 * This is it. Register the PCI driver information for the cards we control 9845 * the OS will call our registered routines when it finds one of our cards. 9846 */ 9847 static int __init hpsa_init(void) 9848 { 9849 int rc; 9850 9851 hpsa_sas_transport_template = 9852 sas_attach_transport(&hpsa_sas_transport_functions); 9853 if (!hpsa_sas_transport_template) 9854 return -ENODEV; 9855 9856 rc = pci_register_driver(&hpsa_pci_driver); 9857 9858 if (rc) 9859 sas_release_transport(hpsa_sas_transport_template); 9860 9861 return rc; 9862 } 9863 9864 static void __exit hpsa_cleanup(void) 9865 { 9866 pci_unregister_driver(&hpsa_pci_driver); 9867 sas_release_transport(hpsa_sas_transport_template); 9868 } 9869 9870 static void __attribute__((unused)) verify_offsets(void) 9871 { 9872 #define VERIFY_OFFSET(member, offset) \ 9873 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9874 9875 VERIFY_OFFSET(structure_size, 0); 9876 VERIFY_OFFSET(volume_blk_size, 4); 9877 VERIFY_OFFSET(volume_blk_cnt, 8); 9878 VERIFY_OFFSET(phys_blk_shift, 16); 9879 VERIFY_OFFSET(parity_rotation_shift, 17); 9880 VERIFY_OFFSET(strip_size, 18); 9881 VERIFY_OFFSET(disk_starting_blk, 20); 9882 VERIFY_OFFSET(disk_blk_cnt, 28); 9883 VERIFY_OFFSET(data_disks_per_row, 36); 9884 VERIFY_OFFSET(metadata_disks_per_row, 38); 9885 VERIFY_OFFSET(row_cnt, 40); 9886 VERIFY_OFFSET(layout_map_count, 42); 9887 VERIFY_OFFSET(flags, 44); 9888 VERIFY_OFFSET(dekindex, 46); 9889 /* VERIFY_OFFSET(reserved, 48 */ 9890 VERIFY_OFFSET(data, 64); 9891 9892 #undef VERIFY_OFFSET 9893 9894 #define VERIFY_OFFSET(member, offset) \ 9895 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9896 9897 VERIFY_OFFSET(IU_type, 0); 9898 VERIFY_OFFSET(direction, 1); 9899 VERIFY_OFFSET(reply_queue, 2); 9900 /* VERIFY_OFFSET(reserved1, 3); */ 9901 VERIFY_OFFSET(scsi_nexus, 4); 9902 VERIFY_OFFSET(Tag, 8); 9903 VERIFY_OFFSET(cdb, 16); 9904 VERIFY_OFFSET(cciss_lun, 32); 9905 VERIFY_OFFSET(data_len, 40); 9906 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9907 VERIFY_OFFSET(sg_count, 45); 9908 /* VERIFY_OFFSET(reserved3 */ 9909 VERIFY_OFFSET(err_ptr, 48); 9910 VERIFY_OFFSET(err_len, 56); 9911 /* VERIFY_OFFSET(reserved4 */ 9912 VERIFY_OFFSET(sg, 64); 9913 9914 #undef VERIFY_OFFSET 9915 9916 #define VERIFY_OFFSET(member, offset) \ 9917 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9918 9919 VERIFY_OFFSET(dev_handle, 0x00); 9920 VERIFY_OFFSET(reserved1, 0x02); 9921 VERIFY_OFFSET(function, 0x03); 9922 VERIFY_OFFSET(reserved2, 0x04); 9923 VERIFY_OFFSET(err_info, 0x0C); 9924 VERIFY_OFFSET(reserved3, 0x10); 9925 VERIFY_OFFSET(err_info_len, 0x12); 9926 VERIFY_OFFSET(reserved4, 0x13); 9927 VERIFY_OFFSET(sgl_offset, 0x14); 9928 VERIFY_OFFSET(reserved5, 0x15); 9929 VERIFY_OFFSET(transfer_len, 0x1C); 9930 VERIFY_OFFSET(reserved6, 0x20); 9931 VERIFY_OFFSET(io_flags, 0x24); 9932 VERIFY_OFFSET(reserved7, 0x26); 9933 VERIFY_OFFSET(LUN, 0x34); 9934 VERIFY_OFFSET(control, 0x3C); 9935 VERIFY_OFFSET(CDB, 0x40); 9936 VERIFY_OFFSET(reserved8, 0x50); 9937 VERIFY_OFFSET(host_context_flags, 0x60); 9938 VERIFY_OFFSET(timeout_sec, 0x62); 9939 VERIFY_OFFSET(ReplyQueue, 0x64); 9940 VERIFY_OFFSET(reserved9, 0x65); 9941 VERIFY_OFFSET(tag, 0x68); 9942 VERIFY_OFFSET(host_addr, 0x70); 9943 VERIFY_OFFSET(CISS_LUN, 0x78); 9944 VERIFY_OFFSET(SG, 0x78 + 8); 9945 #undef VERIFY_OFFSET 9946 } 9947 9948 module_init(hpsa_init); 9949 module_exit(hpsa_cleanup); 9950