1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.16-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149 {0,} 150 }; 151 152 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153 154 /* board_id = Subsystem Device ID & Vendor ID 155 * product = Marketing Name for the board 156 * access = Address of the struct of function pointers 157 */ 158 static struct board_type products[] = { 159 {0x3241103C, "Smart Array P212", &SA5_access}, 160 {0x3243103C, "Smart Array P410", &SA5_access}, 161 {0x3245103C, "Smart Array P410i", &SA5_access}, 162 {0x3247103C, "Smart Array P411", &SA5_access}, 163 {0x3249103C, "Smart Array P812", &SA5_access}, 164 {0x324A103C, "Smart Array P712m", &SA5_access}, 165 {0x324B103C, "Smart Array P711m", &SA5_access}, 166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167 {0x3350103C, "Smart Array P222", &SA5_access}, 168 {0x3351103C, "Smart Array P420", &SA5_access}, 169 {0x3352103C, "Smart Array P421", &SA5_access}, 170 {0x3353103C, "Smart Array P822", &SA5_access}, 171 {0x3354103C, "Smart Array P420i", &SA5_access}, 172 {0x3355103C, "Smart Array P220i", &SA5_access}, 173 {0x3356103C, "Smart Array P721m", &SA5_access}, 174 {0x1921103C, "Smart Array P830i", &SA5_access}, 175 {0x1922103C, "Smart Array P430", &SA5_access}, 176 {0x1923103C, "Smart Array P431", &SA5_access}, 177 {0x1924103C, "Smart Array P830", &SA5_access}, 178 {0x1926103C, "Smart Array P731m", &SA5_access}, 179 {0x1928103C, "Smart Array P230i", &SA5_access}, 180 {0x1929103C, "Smart Array P530", &SA5_access}, 181 {0x21BD103C, "Smart Array P244br", &SA5_access}, 182 {0x21BE103C, "Smart Array P741m", &SA5_access}, 183 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 184 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 186 {0x21C2103C, "Smart Array P440", &SA5_access}, 187 {0x21C3103C, "Smart Array P441", &SA5_access}, 188 {0x21C4103C, "Smart Array", &SA5_access}, 189 {0x21C5103C, "Smart Array P841", &SA5_access}, 190 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 191 {0x21C7103C, "Smart HBA H240", &SA5_access}, 192 {0x21C8103C, "Smart HBA H241", &SA5_access}, 193 {0x21C9103C, "Smart Array", &SA5_access}, 194 {0x21CA103C, "Smart Array P246br", &SA5_access}, 195 {0x21CB103C, "Smart Array P840", &SA5_access}, 196 {0x21CC103C, "Smart Array", &SA5_access}, 197 {0x21CD103C, "Smart Array", &SA5_access}, 198 {0x21CE103C, "Smart HBA", &SA5_access}, 199 {0x05809005, "SmartHBA-SA", &SA5_access}, 200 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211 }; 212 213 static struct scsi_transport_template *hpsa_sas_transport_template; 214 static int hpsa_add_sas_host(struct ctlr_info *h); 215 static void hpsa_delete_sas_host(struct ctlr_info *h); 216 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217 struct hpsa_scsi_dev_t *device); 218 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219 static struct hpsa_scsi_dev_t 220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221 struct sas_rphy *rphy); 222 223 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224 static const struct scsi_cmnd hpsa_cmd_busy; 225 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226 static const struct scsi_cmnd hpsa_cmd_idle; 227 static int number_of_controllers; 228 229 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 230 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 231 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232 233 #ifdef CONFIG_COMPAT 234 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 235 void __user *arg); 236 #endif 237 238 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239 static struct CommandList *cmd_alloc(struct ctlr_info *h); 240 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 241 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 242 struct scsi_cmnd *scmd); 243 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245 int cmd_type); 246 static void hpsa_free_cmd_pool(struct ctlr_info *h); 247 #define VPD_PAGE (1 << 8) 248 #define HPSA_SIMPLE_ERROR_BITS 0x03 249 250 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251 static void hpsa_scan_start(struct Scsi_Host *); 252 static int hpsa_scan_finished(struct Scsi_Host *sh, 253 unsigned long elapsed_time); 254 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255 256 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 257 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258 static int hpsa_slave_alloc(struct scsi_device *sdev); 259 static int hpsa_slave_configure(struct scsi_device *sdev); 260 static void hpsa_slave_destroy(struct scsi_device *sdev); 261 262 static void hpsa_update_scsi_devices(struct ctlr_info *h); 263 static int check_for_unit_attention(struct ctlr_info *h, 264 struct CommandList *c); 265 static void check_ioctl_unit_attention(struct ctlr_info *h, 266 struct CommandList *c); 267 /* performant mode helper functions */ 268 static void calc_bucket_map(int *bucket, int num_buckets, 269 int nsgs, int min_blocks, u32 *bucket_map); 270 static void hpsa_free_performant_mode(struct ctlr_info *h); 271 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272 static inline u32 next_command(struct ctlr_info *h, u8 q); 273 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 274 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 275 u64 *cfg_offset); 276 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 277 unsigned long *memory_bar); 278 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279 static int wait_for_device_to_become_ready(struct ctlr_info *h, 280 unsigned char lunaddr[], 281 int reply_queue); 282 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 283 int wait_for_ready); 284 static inline void finish_cmd(struct CommandList *c); 285 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286 #define BOARD_NOT_READY 0 287 #define BOARD_READY 1 288 static void hpsa_drain_accel_commands(struct ctlr_info *h); 289 static void hpsa_flush_cache(struct ctlr_info *h); 290 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 292 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293 static void hpsa_command_resubmit_worker(struct work_struct *work); 294 static u32 lockup_detected(struct ctlr_info *h); 295 static int detect_controller_lockup(struct ctlr_info *h); 296 static void hpsa_disable_rld_caching(struct ctlr_info *h); 297 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298 struct ReportExtendedLUNdata *buf, int bufsize); 299 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 300 unsigned char scsi3addr[], u8 page); 301 static int hpsa_luns_changed(struct ctlr_info *h); 302 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303 struct hpsa_scsi_dev_t *dev, 304 unsigned char *scsi3addr); 305 306 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307 { 308 unsigned long *priv = shost_priv(sdev->host); 309 return (struct ctlr_info *) *priv; 310 } 311 312 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313 { 314 unsigned long *priv = shost_priv(sh); 315 return (struct ctlr_info *) *priv; 316 } 317 318 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319 { 320 return c->scsi_cmd == SCSI_CMD_IDLE; 321 } 322 323 static inline bool hpsa_is_pending_event(struct CommandList *c) 324 { 325 return c->abort_pending || c->reset_pending; 326 } 327 328 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 329 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 330 u8 *sense_key, u8 *asc, u8 *ascq) 331 { 332 struct scsi_sense_hdr sshdr; 333 bool rc; 334 335 *sense_key = -1; 336 *asc = -1; 337 *ascq = -1; 338 339 if (sense_data_len < 1) 340 return; 341 342 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 343 if (rc) { 344 *sense_key = sshdr.sense_key; 345 *asc = sshdr.asc; 346 *ascq = sshdr.ascq; 347 } 348 } 349 350 static int check_for_unit_attention(struct ctlr_info *h, 351 struct CommandList *c) 352 { 353 u8 sense_key, asc, ascq; 354 int sense_len; 355 356 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 357 sense_len = sizeof(c->err_info->SenseInfo); 358 else 359 sense_len = c->err_info->SenseLen; 360 361 decode_sense_data(c->err_info->SenseInfo, sense_len, 362 &sense_key, &asc, &ascq); 363 if (sense_key != UNIT_ATTENTION || asc == 0xff) 364 return 0; 365 366 switch (asc) { 367 case STATE_CHANGED: 368 dev_warn(&h->pdev->dev, 369 "%s: a state change detected, command retried\n", 370 h->devname); 371 break; 372 case LUN_FAILED: 373 dev_warn(&h->pdev->dev, 374 "%s: LUN failure detected\n", h->devname); 375 break; 376 case REPORT_LUNS_CHANGED: 377 dev_warn(&h->pdev->dev, 378 "%s: report LUN data changed\n", h->devname); 379 /* 380 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 381 * target (array) devices. 382 */ 383 break; 384 case POWER_OR_RESET: 385 dev_warn(&h->pdev->dev, 386 "%s: a power on or device reset detected\n", 387 h->devname); 388 break; 389 case UNIT_ATTENTION_CLEARED: 390 dev_warn(&h->pdev->dev, 391 "%s: unit attention cleared by another initiator\n", 392 h->devname); 393 break; 394 default: 395 dev_warn(&h->pdev->dev, 396 "%s: unknown unit attention detected\n", 397 h->devname); 398 break; 399 } 400 return 1; 401 } 402 403 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404 { 405 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408 return 0; 409 dev_warn(&h->pdev->dev, HPSA "device busy"); 410 return 1; 411 } 412 413 static u32 lockup_detected(struct ctlr_info *h); 414 static ssize_t host_show_lockup_detected(struct device *dev, 415 struct device_attribute *attr, char *buf) 416 { 417 int ld; 418 struct ctlr_info *h; 419 struct Scsi_Host *shost = class_to_shost(dev); 420 421 h = shost_to_hba(shost); 422 ld = lockup_detected(h); 423 424 return sprintf(buf, "ld=%d\n", ld); 425 } 426 427 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428 struct device_attribute *attr, 429 const char *buf, size_t count) 430 { 431 int status, len; 432 struct ctlr_info *h; 433 struct Scsi_Host *shost = class_to_shost(dev); 434 char tmpbuf[10]; 435 436 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437 return -EACCES; 438 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439 strncpy(tmpbuf, buf, len); 440 tmpbuf[len] = '\0'; 441 if (sscanf(tmpbuf, "%d", &status) != 1) 442 return -EINVAL; 443 h = shost_to_hba(shost); 444 h->acciopath_status = !!status; 445 dev_warn(&h->pdev->dev, 446 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447 h->acciopath_status ? "enabled" : "disabled"); 448 return count; 449 } 450 451 static ssize_t host_store_raid_offload_debug(struct device *dev, 452 struct device_attribute *attr, 453 const char *buf, size_t count) 454 { 455 int debug_level, len; 456 struct ctlr_info *h; 457 struct Scsi_Host *shost = class_to_shost(dev); 458 char tmpbuf[10]; 459 460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 461 return -EACCES; 462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 463 strncpy(tmpbuf, buf, len); 464 tmpbuf[len] = '\0'; 465 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 466 return -EINVAL; 467 if (debug_level < 0) 468 debug_level = 0; 469 h = shost_to_hba(shost); 470 h->raid_offload_debug = debug_level; 471 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 472 h->raid_offload_debug); 473 return count; 474 } 475 476 static ssize_t host_store_rescan(struct device *dev, 477 struct device_attribute *attr, 478 const char *buf, size_t count) 479 { 480 struct ctlr_info *h; 481 struct Scsi_Host *shost = class_to_shost(dev); 482 h = shost_to_hba(shost); 483 hpsa_scan_start(h->scsi_host); 484 return count; 485 } 486 487 static ssize_t host_show_firmware_revision(struct device *dev, 488 struct device_attribute *attr, char *buf) 489 { 490 struct ctlr_info *h; 491 struct Scsi_Host *shost = class_to_shost(dev); 492 unsigned char *fwrev; 493 494 h = shost_to_hba(shost); 495 if (!h->hba_inquiry_data) 496 return 0; 497 fwrev = &h->hba_inquiry_data[32]; 498 return snprintf(buf, 20, "%c%c%c%c\n", 499 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500 } 501 502 static ssize_t host_show_commands_outstanding(struct device *dev, 503 struct device_attribute *attr, char *buf) 504 { 505 struct Scsi_Host *shost = class_to_shost(dev); 506 struct ctlr_info *h = shost_to_hba(shost); 507 508 return snprintf(buf, 20, "%d\n", 509 atomic_read(&h->commands_outstanding)); 510 } 511 512 static ssize_t host_show_transport_mode(struct device *dev, 513 struct device_attribute *attr, char *buf) 514 { 515 struct ctlr_info *h; 516 struct Scsi_Host *shost = class_to_shost(dev); 517 518 h = shost_to_hba(shost); 519 return snprintf(buf, 20, "%s\n", 520 h->transMethod & CFGTBL_Trans_Performant ? 521 "performant" : "simple"); 522 } 523 524 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525 struct device_attribute *attr, char *buf) 526 { 527 struct ctlr_info *h; 528 struct Scsi_Host *shost = class_to_shost(dev); 529 530 h = shost_to_hba(shost); 531 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532 (h->acciopath_status == 1) ? "enabled" : "disabled"); 533 } 534 535 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536 static u32 unresettable_controller[] = { 537 0x324a103C, /* Smart Array P712m */ 538 0x324b103C, /* Smart Array P711m */ 539 0x3223103C, /* Smart Array P800 */ 540 0x3234103C, /* Smart Array P400 */ 541 0x3235103C, /* Smart Array P400i */ 542 0x3211103C, /* Smart Array E200i */ 543 0x3212103C, /* Smart Array E200 */ 544 0x3213103C, /* Smart Array E200i */ 545 0x3214103C, /* Smart Array E200i */ 546 0x3215103C, /* Smart Array E200i */ 547 0x3237103C, /* Smart Array E500 */ 548 0x323D103C, /* Smart Array P700m */ 549 0x40800E11, /* Smart Array 5i */ 550 0x409C0E11, /* Smart Array 6400 */ 551 0x409D0E11, /* Smart Array 6400 EM */ 552 0x40700E11, /* Smart Array 5300 */ 553 0x40820E11, /* Smart Array 532 */ 554 0x40830E11, /* Smart Array 5312 */ 555 0x409A0E11, /* Smart Array 641 */ 556 0x409B0E11, /* Smart Array 642 */ 557 0x40910E11, /* Smart Array 6i */ 558 }; 559 560 /* List of controllers which cannot even be soft reset */ 561 static u32 soft_unresettable_controller[] = { 562 0x40800E11, /* Smart Array 5i */ 563 0x40700E11, /* Smart Array 5300 */ 564 0x40820E11, /* Smart Array 532 */ 565 0x40830E11, /* Smart Array 5312 */ 566 0x409A0E11, /* Smart Array 641 */ 567 0x409B0E11, /* Smart Array 642 */ 568 0x40910E11, /* Smart Array 6i */ 569 /* Exclude 640x boards. These are two pci devices in one slot 570 * which share a battery backed cache module. One controls the 571 * cache, the other accesses the cache through the one that controls 572 * it. If we reset the one controlling the cache, the other will 573 * likely not be happy. Just forbid resetting this conjoined mess. 574 * The 640x isn't really supported by hpsa anyway. 575 */ 576 0x409C0E11, /* Smart Array 6400 */ 577 0x409D0E11, /* Smart Array 6400 EM */ 578 }; 579 580 static u32 needs_abort_tags_swizzled[] = { 581 0x323D103C, /* Smart Array P700m */ 582 0x324a103C, /* Smart Array P712m */ 583 0x324b103C, /* SmartArray P711m */ 584 }; 585 586 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587 { 588 int i; 589 590 for (i = 0; i < nelems; i++) 591 if (a[i] == board_id) 592 return 1; 593 return 0; 594 } 595 596 static int ctlr_is_hard_resettable(u32 board_id) 597 { 598 return !board_id_in_array(unresettable_controller, 599 ARRAY_SIZE(unresettable_controller), board_id); 600 } 601 602 static int ctlr_is_soft_resettable(u32 board_id) 603 { 604 return !board_id_in_array(soft_unresettable_controller, 605 ARRAY_SIZE(soft_unresettable_controller), board_id); 606 } 607 608 static int ctlr_is_resettable(u32 board_id) 609 { 610 return ctlr_is_hard_resettable(board_id) || 611 ctlr_is_soft_resettable(board_id); 612 } 613 614 static int ctlr_needs_abort_tags_swizzled(u32 board_id) 615 { 616 return board_id_in_array(needs_abort_tags_swizzled, 617 ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 618 } 619 620 static ssize_t host_show_resettable(struct device *dev, 621 struct device_attribute *attr, char *buf) 622 { 623 struct ctlr_info *h; 624 struct Scsi_Host *shost = class_to_shost(dev); 625 626 h = shost_to_hba(shost); 627 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628 } 629 630 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631 { 632 return (scsi3addr[3] & 0xC0) == 0x40; 633 } 634 635 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 636 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637 }; 638 #define HPSA_RAID_0 0 639 #define HPSA_RAID_4 1 640 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 641 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 642 #define HPSA_RAID_51 4 643 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 644 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 645 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 646 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647 648 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649 { 650 return !device->physical_device; 651 } 652 653 static ssize_t raid_level_show(struct device *dev, 654 struct device_attribute *attr, char *buf) 655 { 656 ssize_t l = 0; 657 unsigned char rlevel; 658 struct ctlr_info *h; 659 struct scsi_device *sdev; 660 struct hpsa_scsi_dev_t *hdev; 661 unsigned long flags; 662 663 sdev = to_scsi_device(dev); 664 h = sdev_to_hba(sdev); 665 spin_lock_irqsave(&h->lock, flags); 666 hdev = sdev->hostdata; 667 if (!hdev) { 668 spin_unlock_irqrestore(&h->lock, flags); 669 return -ENODEV; 670 } 671 672 /* Is this even a logical drive? */ 673 if (!is_logical_device(hdev)) { 674 spin_unlock_irqrestore(&h->lock, flags); 675 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676 return l; 677 } 678 679 rlevel = hdev->raid_level; 680 spin_unlock_irqrestore(&h->lock, flags); 681 if (rlevel > RAID_UNKNOWN) 682 rlevel = RAID_UNKNOWN; 683 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684 return l; 685 } 686 687 static ssize_t lunid_show(struct device *dev, 688 struct device_attribute *attr, char *buf) 689 { 690 struct ctlr_info *h; 691 struct scsi_device *sdev; 692 struct hpsa_scsi_dev_t *hdev; 693 unsigned long flags; 694 unsigned char lunid[8]; 695 696 sdev = to_scsi_device(dev); 697 h = sdev_to_hba(sdev); 698 spin_lock_irqsave(&h->lock, flags); 699 hdev = sdev->hostdata; 700 if (!hdev) { 701 spin_unlock_irqrestore(&h->lock, flags); 702 return -ENODEV; 703 } 704 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705 spin_unlock_irqrestore(&h->lock, flags); 706 return snprintf(buf, 20, "0x%8phN\n", lunid); 707 } 708 709 static ssize_t unique_id_show(struct device *dev, 710 struct device_attribute *attr, char *buf) 711 { 712 struct ctlr_info *h; 713 struct scsi_device *sdev; 714 struct hpsa_scsi_dev_t *hdev; 715 unsigned long flags; 716 unsigned char sn[16]; 717 718 sdev = to_scsi_device(dev); 719 h = sdev_to_hba(sdev); 720 spin_lock_irqsave(&h->lock, flags); 721 hdev = sdev->hostdata; 722 if (!hdev) { 723 spin_unlock_irqrestore(&h->lock, flags); 724 return -ENODEV; 725 } 726 memcpy(sn, hdev->device_id, sizeof(sn)); 727 spin_unlock_irqrestore(&h->lock, flags); 728 return snprintf(buf, 16 * 2 + 2, 729 "%02X%02X%02X%02X%02X%02X%02X%02X" 730 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 731 sn[0], sn[1], sn[2], sn[3], 732 sn[4], sn[5], sn[6], sn[7], 733 sn[8], sn[9], sn[10], sn[11], 734 sn[12], sn[13], sn[14], sn[15]); 735 } 736 737 static ssize_t sas_address_show(struct device *dev, 738 struct device_attribute *attr, char *buf) 739 { 740 struct ctlr_info *h; 741 struct scsi_device *sdev; 742 struct hpsa_scsi_dev_t *hdev; 743 unsigned long flags; 744 u64 sas_address; 745 746 sdev = to_scsi_device(dev); 747 h = sdev_to_hba(sdev); 748 spin_lock_irqsave(&h->lock, flags); 749 hdev = sdev->hostdata; 750 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 751 spin_unlock_irqrestore(&h->lock, flags); 752 return -ENODEV; 753 } 754 sas_address = hdev->sas_address; 755 spin_unlock_irqrestore(&h->lock, flags); 756 757 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 758 } 759 760 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 761 struct device_attribute *attr, char *buf) 762 { 763 struct ctlr_info *h; 764 struct scsi_device *sdev; 765 struct hpsa_scsi_dev_t *hdev; 766 unsigned long flags; 767 int offload_enabled; 768 769 sdev = to_scsi_device(dev); 770 h = sdev_to_hba(sdev); 771 spin_lock_irqsave(&h->lock, flags); 772 hdev = sdev->hostdata; 773 if (!hdev) { 774 spin_unlock_irqrestore(&h->lock, flags); 775 return -ENODEV; 776 } 777 offload_enabled = hdev->offload_enabled; 778 spin_unlock_irqrestore(&h->lock, flags); 779 return snprintf(buf, 20, "%d\n", offload_enabled); 780 } 781 782 #define MAX_PATHS 8 783 static ssize_t path_info_show(struct device *dev, 784 struct device_attribute *attr, char *buf) 785 { 786 struct ctlr_info *h; 787 struct scsi_device *sdev; 788 struct hpsa_scsi_dev_t *hdev; 789 unsigned long flags; 790 int i; 791 int output_len = 0; 792 u8 box; 793 u8 bay; 794 u8 path_map_index = 0; 795 char *active; 796 unsigned char phys_connector[2]; 797 798 sdev = to_scsi_device(dev); 799 h = sdev_to_hba(sdev); 800 spin_lock_irqsave(&h->devlock, flags); 801 hdev = sdev->hostdata; 802 if (!hdev) { 803 spin_unlock_irqrestore(&h->devlock, flags); 804 return -ENODEV; 805 } 806 807 bay = hdev->bay; 808 for (i = 0; i < MAX_PATHS; i++) { 809 path_map_index = 1<<i; 810 if (i == hdev->active_path_index) 811 active = "Active"; 812 else if (hdev->path_map & path_map_index) 813 active = "Inactive"; 814 else 815 continue; 816 817 output_len += scnprintf(buf + output_len, 818 PAGE_SIZE - output_len, 819 "[%d:%d:%d:%d] %20.20s ", 820 h->scsi_host->host_no, 821 hdev->bus, hdev->target, hdev->lun, 822 scsi_device_type(hdev->devtype)); 823 824 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 825 output_len += scnprintf(buf + output_len, 826 PAGE_SIZE - output_len, 827 "%s\n", active); 828 continue; 829 } 830 831 box = hdev->box[i]; 832 memcpy(&phys_connector, &hdev->phys_connector[i], 833 sizeof(phys_connector)); 834 if (phys_connector[0] < '0') 835 phys_connector[0] = '0'; 836 if (phys_connector[1] < '0') 837 phys_connector[1] = '0'; 838 output_len += scnprintf(buf + output_len, 839 PAGE_SIZE - output_len, 840 "PORT: %.2s ", 841 phys_connector); 842 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 843 hdev->expose_device) { 844 if (box == 0 || box == 0xFF) { 845 output_len += scnprintf(buf + output_len, 846 PAGE_SIZE - output_len, 847 "BAY: %hhu %s\n", 848 bay, active); 849 } else { 850 output_len += scnprintf(buf + output_len, 851 PAGE_SIZE - output_len, 852 "BOX: %hhu BAY: %hhu %s\n", 853 box, bay, active); 854 } 855 } else if (box != 0 && box != 0xFF) { 856 output_len += scnprintf(buf + output_len, 857 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 858 box, active); 859 } else 860 output_len += scnprintf(buf + output_len, 861 PAGE_SIZE - output_len, "%s\n", active); 862 } 863 864 spin_unlock_irqrestore(&h->devlock, flags); 865 return output_len; 866 } 867 868 static ssize_t host_show_ctlr_num(struct device *dev, 869 struct device_attribute *attr, char *buf) 870 { 871 struct ctlr_info *h; 872 struct Scsi_Host *shost = class_to_shost(dev); 873 874 h = shost_to_hba(shost); 875 return snprintf(buf, 20, "%d\n", h->ctlr); 876 } 877 878 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 879 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 880 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 881 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 882 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 883 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 884 host_show_hp_ssd_smart_path_enabled, NULL); 885 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 886 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 887 host_show_hp_ssd_smart_path_status, 888 host_store_hp_ssd_smart_path_status); 889 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 890 host_store_raid_offload_debug); 891 static DEVICE_ATTR(firmware_revision, S_IRUGO, 892 host_show_firmware_revision, NULL); 893 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 894 host_show_commands_outstanding, NULL); 895 static DEVICE_ATTR(transport_mode, S_IRUGO, 896 host_show_transport_mode, NULL); 897 static DEVICE_ATTR(resettable, S_IRUGO, 898 host_show_resettable, NULL); 899 static DEVICE_ATTR(lockup_detected, S_IRUGO, 900 host_show_lockup_detected, NULL); 901 static DEVICE_ATTR(ctlr_num, S_IRUGO, 902 host_show_ctlr_num, NULL); 903 904 static struct device_attribute *hpsa_sdev_attrs[] = { 905 &dev_attr_raid_level, 906 &dev_attr_lunid, 907 &dev_attr_unique_id, 908 &dev_attr_hp_ssd_smart_path_enabled, 909 &dev_attr_path_info, 910 &dev_attr_sas_address, 911 NULL, 912 }; 913 914 static struct device_attribute *hpsa_shost_attrs[] = { 915 &dev_attr_rescan, 916 &dev_attr_firmware_revision, 917 &dev_attr_commands_outstanding, 918 &dev_attr_transport_mode, 919 &dev_attr_resettable, 920 &dev_attr_hp_ssd_smart_path_status, 921 &dev_attr_raid_offload_debug, 922 &dev_attr_lockup_detected, 923 &dev_attr_ctlr_num, 924 NULL, 925 }; 926 927 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 928 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 929 930 static struct scsi_host_template hpsa_driver_template = { 931 .module = THIS_MODULE, 932 .name = HPSA, 933 .proc_name = HPSA, 934 .queuecommand = hpsa_scsi_queue_command, 935 .scan_start = hpsa_scan_start, 936 .scan_finished = hpsa_scan_finished, 937 .change_queue_depth = hpsa_change_queue_depth, 938 .this_id = -1, 939 .use_clustering = ENABLE_CLUSTERING, 940 .eh_abort_handler = hpsa_eh_abort_handler, 941 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 942 .ioctl = hpsa_ioctl, 943 .slave_alloc = hpsa_slave_alloc, 944 .slave_configure = hpsa_slave_configure, 945 .slave_destroy = hpsa_slave_destroy, 946 #ifdef CONFIG_COMPAT 947 .compat_ioctl = hpsa_compat_ioctl, 948 #endif 949 .sdev_attrs = hpsa_sdev_attrs, 950 .shost_attrs = hpsa_shost_attrs, 951 .max_sectors = 8192, 952 .no_write_same = 1, 953 }; 954 955 static inline u32 next_command(struct ctlr_info *h, u8 q) 956 { 957 u32 a; 958 struct reply_queue_buffer *rq = &h->reply_queue[q]; 959 960 if (h->transMethod & CFGTBL_Trans_io_accel1) 961 return h->access.command_completed(h, q); 962 963 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 964 return h->access.command_completed(h, q); 965 966 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 967 a = rq->head[rq->current_entry]; 968 rq->current_entry++; 969 atomic_dec(&h->commands_outstanding); 970 } else { 971 a = FIFO_EMPTY; 972 } 973 /* Check for wraparound */ 974 if (rq->current_entry == h->max_commands) { 975 rq->current_entry = 0; 976 rq->wraparound ^= 1; 977 } 978 return a; 979 } 980 981 /* 982 * There are some special bits in the bus address of the 983 * command that we have to set for the controller to know 984 * how to process the command: 985 * 986 * Normal performant mode: 987 * bit 0: 1 means performant mode, 0 means simple mode. 988 * bits 1-3 = block fetch table entry 989 * bits 4-6 = command type (== 0) 990 * 991 * ioaccel1 mode: 992 * bit 0 = "performant mode" bit. 993 * bits 1-3 = block fetch table entry 994 * bits 4-6 = command type (== 110) 995 * (command type is needed because ioaccel1 mode 996 * commands are submitted through the same register as normal 997 * mode commands, so this is how the controller knows whether 998 * the command is normal mode or ioaccel1 mode.) 999 * 1000 * ioaccel2 mode: 1001 * bit 0 = "performant mode" bit. 1002 * bits 1-4 = block fetch table entry (note extra bit) 1003 * bits 4-6 = not needed, because ioaccel2 mode has 1004 * a separate special register for submitting commands. 1005 */ 1006 1007 /* 1008 * set_performant_mode: Modify the tag for cciss performant 1009 * set bit 0 for pull model, bits 3-1 for block fetch 1010 * register number 1011 */ 1012 #define DEFAULT_REPLY_QUEUE (-1) 1013 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1014 int reply_queue) 1015 { 1016 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1017 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1018 if (unlikely(!h->msix_vectors)) 1019 return; 1020 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1021 c->Header.ReplyQueue = 1022 raw_smp_processor_id() % h->nreply_queues; 1023 else 1024 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1025 } 1026 } 1027 1028 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1029 struct CommandList *c, 1030 int reply_queue) 1031 { 1032 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1033 1034 /* 1035 * Tell the controller to post the reply to the queue for this 1036 * processor. This seems to give the best I/O throughput. 1037 */ 1038 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1039 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1040 else 1041 cp->ReplyQueue = reply_queue % h->nreply_queues; 1042 /* 1043 * Set the bits in the address sent down to include: 1044 * - performant mode bit (bit 0) 1045 * - pull count (bits 1-3) 1046 * - command type (bits 4-6) 1047 */ 1048 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1049 IOACCEL1_BUSADDR_CMDTYPE; 1050 } 1051 1052 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1053 struct CommandList *c, 1054 int reply_queue) 1055 { 1056 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1057 &h->ioaccel2_cmd_pool[c->cmdindex]; 1058 1059 /* Tell the controller to post the reply to the queue for this 1060 * processor. This seems to give the best I/O throughput. 1061 */ 1062 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1063 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1064 else 1065 cp->reply_queue = reply_queue % h->nreply_queues; 1066 /* Set the bits in the address sent down to include: 1067 * - performant mode bit not used in ioaccel mode 2 1068 * - pull count (bits 0-3) 1069 * - command type isn't needed for ioaccel2 1070 */ 1071 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1072 } 1073 1074 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1075 struct CommandList *c, 1076 int reply_queue) 1077 { 1078 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1079 1080 /* 1081 * Tell the controller to post the reply to the queue for this 1082 * processor. This seems to give the best I/O throughput. 1083 */ 1084 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1085 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1086 else 1087 cp->reply_queue = reply_queue % h->nreply_queues; 1088 /* 1089 * Set the bits in the address sent down to include: 1090 * - performant mode bit not used in ioaccel mode 2 1091 * - pull count (bits 0-3) 1092 * - command type isn't needed for ioaccel2 1093 */ 1094 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1095 } 1096 1097 static int is_firmware_flash_cmd(u8 *cdb) 1098 { 1099 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1100 } 1101 1102 /* 1103 * During firmware flash, the heartbeat register may not update as frequently 1104 * as it should. So we dial down lockup detection during firmware flash. and 1105 * dial it back up when firmware flash completes. 1106 */ 1107 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1108 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1109 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1110 struct CommandList *c) 1111 { 1112 if (!is_firmware_flash_cmd(c->Request.CDB)) 1113 return; 1114 atomic_inc(&h->firmware_flash_in_progress); 1115 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1116 } 1117 1118 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1119 struct CommandList *c) 1120 { 1121 if (is_firmware_flash_cmd(c->Request.CDB) && 1122 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1123 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1124 } 1125 1126 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1127 struct CommandList *c, int reply_queue) 1128 { 1129 dial_down_lockup_detection_during_fw_flash(h, c); 1130 atomic_inc(&h->commands_outstanding); 1131 switch (c->cmd_type) { 1132 case CMD_IOACCEL1: 1133 set_ioaccel1_performant_mode(h, c, reply_queue); 1134 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1135 break; 1136 case CMD_IOACCEL2: 1137 set_ioaccel2_performant_mode(h, c, reply_queue); 1138 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1139 break; 1140 case IOACCEL2_TMF: 1141 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1142 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1143 break; 1144 default: 1145 set_performant_mode(h, c, reply_queue); 1146 h->access.submit_command(h, c); 1147 } 1148 } 1149 1150 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1151 { 1152 if (unlikely(hpsa_is_pending_event(c))) 1153 return finish_cmd(c); 1154 1155 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1156 } 1157 1158 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1159 { 1160 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1161 } 1162 1163 static inline int is_scsi_rev_5(struct ctlr_info *h) 1164 { 1165 if (!h->hba_inquiry_data) 1166 return 0; 1167 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1168 return 1; 1169 return 0; 1170 } 1171 1172 static int hpsa_find_target_lun(struct ctlr_info *h, 1173 unsigned char scsi3addr[], int bus, int *target, int *lun) 1174 { 1175 /* finds an unused bus, target, lun for a new physical device 1176 * assumes h->devlock is held 1177 */ 1178 int i, found = 0; 1179 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1180 1181 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1182 1183 for (i = 0; i < h->ndevices; i++) { 1184 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1185 __set_bit(h->dev[i]->target, lun_taken); 1186 } 1187 1188 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1189 if (i < HPSA_MAX_DEVICES) { 1190 /* *bus = 1; */ 1191 *target = i; 1192 *lun = 0; 1193 found = 1; 1194 } 1195 return !found; 1196 } 1197 1198 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1199 struct hpsa_scsi_dev_t *dev, char *description) 1200 { 1201 #define LABEL_SIZE 25 1202 char label[LABEL_SIZE]; 1203 1204 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1205 return; 1206 1207 switch (dev->devtype) { 1208 case TYPE_RAID: 1209 snprintf(label, LABEL_SIZE, "controller"); 1210 break; 1211 case TYPE_ENCLOSURE: 1212 snprintf(label, LABEL_SIZE, "enclosure"); 1213 break; 1214 case TYPE_DISK: 1215 case TYPE_ZBC: 1216 if (dev->external) 1217 snprintf(label, LABEL_SIZE, "external"); 1218 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1219 snprintf(label, LABEL_SIZE, "%s", 1220 raid_label[PHYSICAL_DRIVE]); 1221 else 1222 snprintf(label, LABEL_SIZE, "RAID-%s", 1223 dev->raid_level > RAID_UNKNOWN ? "?" : 1224 raid_label[dev->raid_level]); 1225 break; 1226 case TYPE_ROM: 1227 snprintf(label, LABEL_SIZE, "rom"); 1228 break; 1229 case TYPE_TAPE: 1230 snprintf(label, LABEL_SIZE, "tape"); 1231 break; 1232 case TYPE_MEDIUM_CHANGER: 1233 snprintf(label, LABEL_SIZE, "changer"); 1234 break; 1235 default: 1236 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1237 break; 1238 } 1239 1240 dev_printk(level, &h->pdev->dev, 1241 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1242 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1243 description, 1244 scsi_device_type(dev->devtype), 1245 dev->vendor, 1246 dev->model, 1247 label, 1248 dev->offload_config ? '+' : '-', 1249 dev->offload_enabled ? '+' : '-', 1250 dev->expose_device); 1251 } 1252 1253 /* Add an entry into h->dev[] array. */ 1254 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1255 struct hpsa_scsi_dev_t *device, 1256 struct hpsa_scsi_dev_t *added[], int *nadded) 1257 { 1258 /* assumes h->devlock is held */ 1259 int n = h->ndevices; 1260 int i; 1261 unsigned char addr1[8], addr2[8]; 1262 struct hpsa_scsi_dev_t *sd; 1263 1264 if (n >= HPSA_MAX_DEVICES) { 1265 dev_err(&h->pdev->dev, "too many devices, some will be " 1266 "inaccessible.\n"); 1267 return -1; 1268 } 1269 1270 /* physical devices do not have lun or target assigned until now. */ 1271 if (device->lun != -1) 1272 /* Logical device, lun is already assigned. */ 1273 goto lun_assigned; 1274 1275 /* If this device a non-zero lun of a multi-lun device 1276 * byte 4 of the 8-byte LUN addr will contain the logical 1277 * unit no, zero otherwise. 1278 */ 1279 if (device->scsi3addr[4] == 0) { 1280 /* This is not a non-zero lun of a multi-lun device */ 1281 if (hpsa_find_target_lun(h, device->scsi3addr, 1282 device->bus, &device->target, &device->lun) != 0) 1283 return -1; 1284 goto lun_assigned; 1285 } 1286 1287 /* This is a non-zero lun of a multi-lun device. 1288 * Search through our list and find the device which 1289 * has the same 8 byte LUN address, excepting byte 4 and 5. 1290 * Assign the same bus and target for this new LUN. 1291 * Use the logical unit number from the firmware. 1292 */ 1293 memcpy(addr1, device->scsi3addr, 8); 1294 addr1[4] = 0; 1295 addr1[5] = 0; 1296 for (i = 0; i < n; i++) { 1297 sd = h->dev[i]; 1298 memcpy(addr2, sd->scsi3addr, 8); 1299 addr2[4] = 0; 1300 addr2[5] = 0; 1301 /* differ only in byte 4 and 5? */ 1302 if (memcmp(addr1, addr2, 8) == 0) { 1303 device->bus = sd->bus; 1304 device->target = sd->target; 1305 device->lun = device->scsi3addr[4]; 1306 break; 1307 } 1308 } 1309 if (device->lun == -1) { 1310 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1311 " suspect firmware bug or unsupported hardware " 1312 "configuration.\n"); 1313 return -1; 1314 } 1315 1316 lun_assigned: 1317 1318 h->dev[n] = device; 1319 h->ndevices++; 1320 added[*nadded] = device; 1321 (*nadded)++; 1322 hpsa_show_dev_msg(KERN_INFO, h, device, 1323 device->expose_device ? "added" : "masked"); 1324 device->offload_to_be_enabled = device->offload_enabled; 1325 device->offload_enabled = 0; 1326 return 0; 1327 } 1328 1329 /* Update an entry in h->dev[] array. */ 1330 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1331 int entry, struct hpsa_scsi_dev_t *new_entry) 1332 { 1333 int offload_enabled; 1334 /* assumes h->devlock is held */ 1335 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1336 1337 /* Raid level changed. */ 1338 h->dev[entry]->raid_level = new_entry->raid_level; 1339 1340 /* Raid offload parameters changed. Careful about the ordering. */ 1341 if (new_entry->offload_config && new_entry->offload_enabled) { 1342 /* 1343 * if drive is newly offload_enabled, we want to copy the 1344 * raid map data first. If previously offload_enabled and 1345 * offload_config were set, raid map data had better be 1346 * the same as it was before. if raid map data is changed 1347 * then it had better be the case that 1348 * h->dev[entry]->offload_enabled is currently 0. 1349 */ 1350 h->dev[entry]->raid_map = new_entry->raid_map; 1351 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1352 } 1353 if (new_entry->hba_ioaccel_enabled) { 1354 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1355 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1356 } 1357 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1358 h->dev[entry]->offload_config = new_entry->offload_config; 1359 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1360 h->dev[entry]->queue_depth = new_entry->queue_depth; 1361 1362 /* 1363 * We can turn off ioaccel offload now, but need to delay turning 1364 * it on until we can update h->dev[entry]->phys_disk[], but we 1365 * can't do that until all the devices are updated. 1366 */ 1367 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1368 if (!new_entry->offload_enabled) 1369 h->dev[entry]->offload_enabled = 0; 1370 1371 offload_enabled = h->dev[entry]->offload_enabled; 1372 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1373 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1374 h->dev[entry]->offload_enabled = offload_enabled; 1375 } 1376 1377 /* Replace an entry from h->dev[] array. */ 1378 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1379 int entry, struct hpsa_scsi_dev_t *new_entry, 1380 struct hpsa_scsi_dev_t *added[], int *nadded, 1381 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1382 { 1383 /* assumes h->devlock is held */ 1384 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1385 removed[*nremoved] = h->dev[entry]; 1386 (*nremoved)++; 1387 1388 /* 1389 * New physical devices won't have target/lun assigned yet 1390 * so we need to preserve the values in the slot we are replacing. 1391 */ 1392 if (new_entry->target == -1) { 1393 new_entry->target = h->dev[entry]->target; 1394 new_entry->lun = h->dev[entry]->lun; 1395 } 1396 1397 h->dev[entry] = new_entry; 1398 added[*nadded] = new_entry; 1399 (*nadded)++; 1400 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1401 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1402 new_entry->offload_enabled = 0; 1403 } 1404 1405 /* Remove an entry from h->dev[] array. */ 1406 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1407 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1408 { 1409 /* assumes h->devlock is held */ 1410 int i; 1411 struct hpsa_scsi_dev_t *sd; 1412 1413 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1414 1415 sd = h->dev[entry]; 1416 removed[*nremoved] = h->dev[entry]; 1417 (*nremoved)++; 1418 1419 for (i = entry; i < h->ndevices-1; i++) 1420 h->dev[i] = h->dev[i+1]; 1421 h->ndevices--; 1422 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1423 } 1424 1425 #define SCSI3ADDR_EQ(a, b) ( \ 1426 (a)[7] == (b)[7] && \ 1427 (a)[6] == (b)[6] && \ 1428 (a)[5] == (b)[5] && \ 1429 (a)[4] == (b)[4] && \ 1430 (a)[3] == (b)[3] && \ 1431 (a)[2] == (b)[2] && \ 1432 (a)[1] == (b)[1] && \ 1433 (a)[0] == (b)[0]) 1434 1435 static void fixup_botched_add(struct ctlr_info *h, 1436 struct hpsa_scsi_dev_t *added) 1437 { 1438 /* called when scsi_add_device fails in order to re-adjust 1439 * h->dev[] to match the mid layer's view. 1440 */ 1441 unsigned long flags; 1442 int i, j; 1443 1444 spin_lock_irqsave(&h->lock, flags); 1445 for (i = 0; i < h->ndevices; i++) { 1446 if (h->dev[i] == added) { 1447 for (j = i; j < h->ndevices-1; j++) 1448 h->dev[j] = h->dev[j+1]; 1449 h->ndevices--; 1450 break; 1451 } 1452 } 1453 spin_unlock_irqrestore(&h->lock, flags); 1454 kfree(added); 1455 } 1456 1457 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1458 struct hpsa_scsi_dev_t *dev2) 1459 { 1460 /* we compare everything except lun and target as these 1461 * are not yet assigned. Compare parts likely 1462 * to differ first 1463 */ 1464 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1465 sizeof(dev1->scsi3addr)) != 0) 1466 return 0; 1467 if (memcmp(dev1->device_id, dev2->device_id, 1468 sizeof(dev1->device_id)) != 0) 1469 return 0; 1470 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1471 return 0; 1472 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1473 return 0; 1474 if (dev1->devtype != dev2->devtype) 1475 return 0; 1476 if (dev1->bus != dev2->bus) 1477 return 0; 1478 return 1; 1479 } 1480 1481 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1482 struct hpsa_scsi_dev_t *dev2) 1483 { 1484 /* Device attributes that can change, but don't mean 1485 * that the device is a different device, nor that the OS 1486 * needs to be told anything about the change. 1487 */ 1488 if (dev1->raid_level != dev2->raid_level) 1489 return 1; 1490 if (dev1->offload_config != dev2->offload_config) 1491 return 1; 1492 if (dev1->offload_enabled != dev2->offload_enabled) 1493 return 1; 1494 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1495 if (dev1->queue_depth != dev2->queue_depth) 1496 return 1; 1497 return 0; 1498 } 1499 1500 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1501 * and return needle location in *index. If scsi3addr matches, but not 1502 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1503 * location in *index. 1504 * In the case of a minor device attribute change, such as RAID level, just 1505 * return DEVICE_UPDATED, along with the updated device's location in index. 1506 * If needle not found, return DEVICE_NOT_FOUND. 1507 */ 1508 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1509 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1510 int *index) 1511 { 1512 int i; 1513 #define DEVICE_NOT_FOUND 0 1514 #define DEVICE_CHANGED 1 1515 #define DEVICE_SAME 2 1516 #define DEVICE_UPDATED 3 1517 if (needle == NULL) 1518 return DEVICE_NOT_FOUND; 1519 1520 for (i = 0; i < haystack_size; i++) { 1521 if (haystack[i] == NULL) /* previously removed. */ 1522 continue; 1523 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1524 *index = i; 1525 if (device_is_the_same(needle, haystack[i])) { 1526 if (device_updated(needle, haystack[i])) 1527 return DEVICE_UPDATED; 1528 return DEVICE_SAME; 1529 } else { 1530 /* Keep offline devices offline */ 1531 if (needle->volume_offline) 1532 return DEVICE_NOT_FOUND; 1533 return DEVICE_CHANGED; 1534 } 1535 } 1536 } 1537 *index = -1; 1538 return DEVICE_NOT_FOUND; 1539 } 1540 1541 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1542 unsigned char scsi3addr[]) 1543 { 1544 struct offline_device_entry *device; 1545 unsigned long flags; 1546 1547 /* Check to see if device is already on the list */ 1548 spin_lock_irqsave(&h->offline_device_lock, flags); 1549 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1550 if (memcmp(device->scsi3addr, scsi3addr, 1551 sizeof(device->scsi3addr)) == 0) { 1552 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1553 return; 1554 } 1555 } 1556 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1557 1558 /* Device is not on the list, add it. */ 1559 device = kmalloc(sizeof(*device), GFP_KERNEL); 1560 if (!device) 1561 return; 1562 1563 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1564 spin_lock_irqsave(&h->offline_device_lock, flags); 1565 list_add_tail(&device->offline_list, &h->offline_device_list); 1566 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1567 } 1568 1569 /* Print a message explaining various offline volume states */ 1570 static void hpsa_show_volume_status(struct ctlr_info *h, 1571 struct hpsa_scsi_dev_t *sd) 1572 { 1573 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1574 dev_info(&h->pdev->dev, 1575 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1576 h->scsi_host->host_no, 1577 sd->bus, sd->target, sd->lun); 1578 switch (sd->volume_offline) { 1579 case HPSA_LV_OK: 1580 break; 1581 case HPSA_LV_UNDERGOING_ERASE: 1582 dev_info(&h->pdev->dev, 1583 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1584 h->scsi_host->host_no, 1585 sd->bus, sd->target, sd->lun); 1586 break; 1587 case HPSA_LV_NOT_AVAILABLE: 1588 dev_info(&h->pdev->dev, 1589 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1590 h->scsi_host->host_no, 1591 sd->bus, sd->target, sd->lun); 1592 break; 1593 case HPSA_LV_UNDERGOING_RPI: 1594 dev_info(&h->pdev->dev, 1595 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1596 h->scsi_host->host_no, 1597 sd->bus, sd->target, sd->lun); 1598 break; 1599 case HPSA_LV_PENDING_RPI: 1600 dev_info(&h->pdev->dev, 1601 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1602 h->scsi_host->host_no, 1603 sd->bus, sd->target, sd->lun); 1604 break; 1605 case HPSA_LV_ENCRYPTED_NO_KEY: 1606 dev_info(&h->pdev->dev, 1607 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1608 h->scsi_host->host_no, 1609 sd->bus, sd->target, sd->lun); 1610 break; 1611 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1612 dev_info(&h->pdev->dev, 1613 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1614 h->scsi_host->host_no, 1615 sd->bus, sd->target, sd->lun); 1616 break; 1617 case HPSA_LV_UNDERGOING_ENCRYPTION: 1618 dev_info(&h->pdev->dev, 1619 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1620 h->scsi_host->host_no, 1621 sd->bus, sd->target, sd->lun); 1622 break; 1623 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1624 dev_info(&h->pdev->dev, 1625 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1626 h->scsi_host->host_no, 1627 sd->bus, sd->target, sd->lun); 1628 break; 1629 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1630 dev_info(&h->pdev->dev, 1631 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1632 h->scsi_host->host_no, 1633 sd->bus, sd->target, sd->lun); 1634 break; 1635 case HPSA_LV_PENDING_ENCRYPTION: 1636 dev_info(&h->pdev->dev, 1637 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1638 h->scsi_host->host_no, 1639 sd->bus, sd->target, sd->lun); 1640 break; 1641 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1642 dev_info(&h->pdev->dev, 1643 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1644 h->scsi_host->host_no, 1645 sd->bus, sd->target, sd->lun); 1646 break; 1647 } 1648 } 1649 1650 /* 1651 * Figure the list of physical drive pointers for a logical drive with 1652 * raid offload configured. 1653 */ 1654 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1655 struct hpsa_scsi_dev_t *dev[], int ndevices, 1656 struct hpsa_scsi_dev_t *logical_drive) 1657 { 1658 struct raid_map_data *map = &logical_drive->raid_map; 1659 struct raid_map_disk_data *dd = &map->data[0]; 1660 int i, j; 1661 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1662 le16_to_cpu(map->metadata_disks_per_row); 1663 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1664 le16_to_cpu(map->layout_map_count) * 1665 total_disks_per_row; 1666 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1667 total_disks_per_row; 1668 int qdepth; 1669 1670 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1671 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1672 1673 logical_drive->nphysical_disks = nraid_map_entries; 1674 1675 qdepth = 0; 1676 for (i = 0; i < nraid_map_entries; i++) { 1677 logical_drive->phys_disk[i] = NULL; 1678 if (!logical_drive->offload_config) 1679 continue; 1680 for (j = 0; j < ndevices; j++) { 1681 if (dev[j] == NULL) 1682 continue; 1683 if (dev[j]->devtype != TYPE_DISK && 1684 dev[j]->devtype != TYPE_ZBC) 1685 continue; 1686 if (is_logical_device(dev[j])) 1687 continue; 1688 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1689 continue; 1690 1691 logical_drive->phys_disk[i] = dev[j]; 1692 if (i < nphys_disk) 1693 qdepth = min(h->nr_cmds, qdepth + 1694 logical_drive->phys_disk[i]->queue_depth); 1695 break; 1696 } 1697 1698 /* 1699 * This can happen if a physical drive is removed and 1700 * the logical drive is degraded. In that case, the RAID 1701 * map data will refer to a physical disk which isn't actually 1702 * present. And in that case offload_enabled should already 1703 * be 0, but we'll turn it off here just in case 1704 */ 1705 if (!logical_drive->phys_disk[i]) { 1706 logical_drive->offload_enabled = 0; 1707 logical_drive->offload_to_be_enabled = 0; 1708 logical_drive->queue_depth = 8; 1709 } 1710 } 1711 if (nraid_map_entries) 1712 /* 1713 * This is correct for reads, too high for full stripe writes, 1714 * way too high for partial stripe writes 1715 */ 1716 logical_drive->queue_depth = qdepth; 1717 else 1718 logical_drive->queue_depth = h->nr_cmds; 1719 } 1720 1721 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1722 struct hpsa_scsi_dev_t *dev[], int ndevices) 1723 { 1724 int i; 1725 1726 for (i = 0; i < ndevices; i++) { 1727 if (dev[i] == NULL) 1728 continue; 1729 if (dev[i]->devtype != TYPE_DISK && 1730 dev[i]->devtype != TYPE_ZBC) 1731 continue; 1732 if (!is_logical_device(dev[i])) 1733 continue; 1734 1735 /* 1736 * If offload is currently enabled, the RAID map and 1737 * phys_disk[] assignment *better* not be changing 1738 * and since it isn't changing, we do not need to 1739 * update it. 1740 */ 1741 if (dev[i]->offload_enabled) 1742 continue; 1743 1744 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1745 } 1746 } 1747 1748 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1749 { 1750 int rc = 0; 1751 1752 if (!h->scsi_host) 1753 return 1; 1754 1755 if (is_logical_device(device)) /* RAID */ 1756 rc = scsi_add_device(h->scsi_host, device->bus, 1757 device->target, device->lun); 1758 else /* HBA */ 1759 rc = hpsa_add_sas_device(h->sas_host, device); 1760 1761 return rc; 1762 } 1763 1764 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1765 struct hpsa_scsi_dev_t *dev) 1766 { 1767 int i; 1768 int count = 0; 1769 1770 for (i = 0; i < h->nr_cmds; i++) { 1771 struct CommandList *c = h->cmd_pool + i; 1772 int refcount = atomic_inc_return(&c->refcount); 1773 1774 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1775 dev->scsi3addr)) { 1776 unsigned long flags; 1777 1778 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1779 if (!hpsa_is_cmd_idle(c)) 1780 ++count; 1781 spin_unlock_irqrestore(&h->lock, flags); 1782 } 1783 1784 cmd_free(h, c); 1785 } 1786 1787 return count; 1788 } 1789 1790 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1791 struct hpsa_scsi_dev_t *device) 1792 { 1793 int cmds = 0; 1794 int waits = 0; 1795 1796 while (1) { 1797 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1798 if (cmds == 0) 1799 break; 1800 if (++waits > 20) 1801 break; 1802 dev_warn(&h->pdev->dev, 1803 "%s: removing device with %d outstanding commands!\n", 1804 __func__, cmds); 1805 msleep(1000); 1806 } 1807 } 1808 1809 static void hpsa_remove_device(struct ctlr_info *h, 1810 struct hpsa_scsi_dev_t *device) 1811 { 1812 struct scsi_device *sdev = NULL; 1813 1814 if (!h->scsi_host) 1815 return; 1816 1817 if (is_logical_device(device)) { /* RAID */ 1818 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1819 device->target, device->lun); 1820 if (sdev) { 1821 scsi_remove_device(sdev); 1822 scsi_device_put(sdev); 1823 } else { 1824 /* 1825 * We don't expect to get here. Future commands 1826 * to this device will get a selection timeout as 1827 * if the device were gone. 1828 */ 1829 hpsa_show_dev_msg(KERN_WARNING, h, device, 1830 "didn't find device for removal."); 1831 } 1832 } else { /* HBA */ 1833 1834 device->removed = 1; 1835 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1836 1837 hpsa_remove_sas_device(device); 1838 } 1839 } 1840 1841 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1842 struct hpsa_scsi_dev_t *sd[], int nsds) 1843 { 1844 /* sd contains scsi3 addresses and devtypes, and inquiry 1845 * data. This function takes what's in sd to be the current 1846 * reality and updates h->dev[] to reflect that reality. 1847 */ 1848 int i, entry, device_change, changes = 0; 1849 struct hpsa_scsi_dev_t *csd; 1850 unsigned long flags; 1851 struct hpsa_scsi_dev_t **added, **removed; 1852 int nadded, nremoved; 1853 1854 /* 1855 * A reset can cause a device status to change 1856 * re-schedule the scan to see what happened. 1857 */ 1858 if (h->reset_in_progress) { 1859 h->drv_req_rescan = 1; 1860 return; 1861 } 1862 1863 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1864 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1865 1866 if (!added || !removed) { 1867 dev_warn(&h->pdev->dev, "out of memory in " 1868 "adjust_hpsa_scsi_table\n"); 1869 goto free_and_out; 1870 } 1871 1872 spin_lock_irqsave(&h->devlock, flags); 1873 1874 /* find any devices in h->dev[] that are not in 1875 * sd[] and remove them from h->dev[], and for any 1876 * devices which have changed, remove the old device 1877 * info and add the new device info. 1878 * If minor device attributes change, just update 1879 * the existing device structure. 1880 */ 1881 i = 0; 1882 nremoved = 0; 1883 nadded = 0; 1884 while (i < h->ndevices) { 1885 csd = h->dev[i]; 1886 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1887 if (device_change == DEVICE_NOT_FOUND) { 1888 changes++; 1889 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1890 continue; /* remove ^^^, hence i not incremented */ 1891 } else if (device_change == DEVICE_CHANGED) { 1892 changes++; 1893 hpsa_scsi_replace_entry(h, i, sd[entry], 1894 added, &nadded, removed, &nremoved); 1895 /* Set it to NULL to prevent it from being freed 1896 * at the bottom of hpsa_update_scsi_devices() 1897 */ 1898 sd[entry] = NULL; 1899 } else if (device_change == DEVICE_UPDATED) { 1900 hpsa_scsi_update_entry(h, i, sd[entry]); 1901 } 1902 i++; 1903 } 1904 1905 /* Now, make sure every device listed in sd[] is also 1906 * listed in h->dev[], adding them if they aren't found 1907 */ 1908 1909 for (i = 0; i < nsds; i++) { 1910 if (!sd[i]) /* if already added above. */ 1911 continue; 1912 1913 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1914 * as the SCSI mid-layer does not handle such devices well. 1915 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1916 * at 160Hz, and prevents the system from coming up. 1917 */ 1918 if (sd[i]->volume_offline) { 1919 hpsa_show_volume_status(h, sd[i]); 1920 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1921 continue; 1922 } 1923 1924 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1925 h->ndevices, &entry); 1926 if (device_change == DEVICE_NOT_FOUND) { 1927 changes++; 1928 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1929 break; 1930 sd[i] = NULL; /* prevent from being freed later. */ 1931 } else if (device_change == DEVICE_CHANGED) { 1932 /* should never happen... */ 1933 changes++; 1934 dev_warn(&h->pdev->dev, 1935 "device unexpectedly changed.\n"); 1936 /* but if it does happen, we just ignore that device */ 1937 } 1938 } 1939 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1940 1941 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1942 * any logical drives that need it enabled. 1943 */ 1944 for (i = 0; i < h->ndevices; i++) { 1945 if (h->dev[i] == NULL) 1946 continue; 1947 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1948 } 1949 1950 spin_unlock_irqrestore(&h->devlock, flags); 1951 1952 /* Monitor devices which are in one of several NOT READY states to be 1953 * brought online later. This must be done without holding h->devlock, 1954 * so don't touch h->dev[] 1955 */ 1956 for (i = 0; i < nsds; i++) { 1957 if (!sd[i]) /* if already added above. */ 1958 continue; 1959 if (sd[i]->volume_offline) 1960 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1961 } 1962 1963 /* Don't notify scsi mid layer of any changes the first time through 1964 * (or if there are no changes) scsi_scan_host will do it later the 1965 * first time through. 1966 */ 1967 if (!changes) 1968 goto free_and_out; 1969 1970 /* Notify scsi mid layer of any removed devices */ 1971 for (i = 0; i < nremoved; i++) { 1972 if (removed[i] == NULL) 1973 continue; 1974 if (removed[i]->expose_device) 1975 hpsa_remove_device(h, removed[i]); 1976 kfree(removed[i]); 1977 removed[i] = NULL; 1978 } 1979 1980 /* Notify scsi mid layer of any added devices */ 1981 for (i = 0; i < nadded; i++) { 1982 int rc = 0; 1983 1984 if (added[i] == NULL) 1985 continue; 1986 if (!(added[i]->expose_device)) 1987 continue; 1988 rc = hpsa_add_device(h, added[i]); 1989 if (!rc) 1990 continue; 1991 dev_warn(&h->pdev->dev, 1992 "addition failed %d, device not added.", rc); 1993 /* now we have to remove it from h->dev, 1994 * since it didn't get added to scsi mid layer 1995 */ 1996 fixup_botched_add(h, added[i]); 1997 h->drv_req_rescan = 1; 1998 } 1999 2000 free_and_out: 2001 kfree(added); 2002 kfree(removed); 2003 } 2004 2005 /* 2006 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2007 * Assume's h->devlock is held. 2008 */ 2009 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2010 int bus, int target, int lun) 2011 { 2012 int i; 2013 struct hpsa_scsi_dev_t *sd; 2014 2015 for (i = 0; i < h->ndevices; i++) { 2016 sd = h->dev[i]; 2017 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2018 return sd; 2019 } 2020 return NULL; 2021 } 2022 2023 static int hpsa_slave_alloc(struct scsi_device *sdev) 2024 { 2025 struct hpsa_scsi_dev_t *sd = NULL; 2026 unsigned long flags; 2027 struct ctlr_info *h; 2028 2029 h = sdev_to_hba(sdev); 2030 spin_lock_irqsave(&h->devlock, flags); 2031 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2032 struct scsi_target *starget; 2033 struct sas_rphy *rphy; 2034 2035 starget = scsi_target(sdev); 2036 rphy = target_to_rphy(starget); 2037 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2038 if (sd) { 2039 sd->target = sdev_id(sdev); 2040 sd->lun = sdev->lun; 2041 } 2042 } 2043 if (!sd) 2044 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2045 sdev_id(sdev), sdev->lun); 2046 2047 if (sd && sd->expose_device) { 2048 atomic_set(&sd->ioaccel_cmds_out, 0); 2049 sdev->hostdata = sd; 2050 } else 2051 sdev->hostdata = NULL; 2052 spin_unlock_irqrestore(&h->devlock, flags); 2053 return 0; 2054 } 2055 2056 /* configure scsi device based on internal per-device structure */ 2057 static int hpsa_slave_configure(struct scsi_device *sdev) 2058 { 2059 struct hpsa_scsi_dev_t *sd; 2060 int queue_depth; 2061 2062 sd = sdev->hostdata; 2063 sdev->no_uld_attach = !sd || !sd->expose_device; 2064 2065 if (sd) 2066 queue_depth = sd->queue_depth != 0 ? 2067 sd->queue_depth : sdev->host->can_queue; 2068 else 2069 queue_depth = sdev->host->can_queue; 2070 2071 scsi_change_queue_depth(sdev, queue_depth); 2072 2073 return 0; 2074 } 2075 2076 static void hpsa_slave_destroy(struct scsi_device *sdev) 2077 { 2078 /* nothing to do. */ 2079 } 2080 2081 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082 { 2083 int i; 2084 2085 if (!h->ioaccel2_cmd_sg_list) 2086 return; 2087 for (i = 0; i < h->nr_cmds; i++) { 2088 kfree(h->ioaccel2_cmd_sg_list[i]); 2089 h->ioaccel2_cmd_sg_list[i] = NULL; 2090 } 2091 kfree(h->ioaccel2_cmd_sg_list); 2092 h->ioaccel2_cmd_sg_list = NULL; 2093 } 2094 2095 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2096 { 2097 int i; 2098 2099 if (h->chainsize <= 0) 2100 return 0; 2101 2102 h->ioaccel2_cmd_sg_list = 2103 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2104 GFP_KERNEL); 2105 if (!h->ioaccel2_cmd_sg_list) 2106 return -ENOMEM; 2107 for (i = 0; i < h->nr_cmds; i++) { 2108 h->ioaccel2_cmd_sg_list[i] = 2109 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2110 h->maxsgentries, GFP_KERNEL); 2111 if (!h->ioaccel2_cmd_sg_list[i]) 2112 goto clean; 2113 } 2114 return 0; 2115 2116 clean: 2117 hpsa_free_ioaccel2_sg_chain_blocks(h); 2118 return -ENOMEM; 2119 } 2120 2121 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2122 { 2123 int i; 2124 2125 if (!h->cmd_sg_list) 2126 return; 2127 for (i = 0; i < h->nr_cmds; i++) { 2128 kfree(h->cmd_sg_list[i]); 2129 h->cmd_sg_list[i] = NULL; 2130 } 2131 kfree(h->cmd_sg_list); 2132 h->cmd_sg_list = NULL; 2133 } 2134 2135 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2136 { 2137 int i; 2138 2139 if (h->chainsize <= 0) 2140 return 0; 2141 2142 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2143 GFP_KERNEL); 2144 if (!h->cmd_sg_list) 2145 return -ENOMEM; 2146 2147 for (i = 0; i < h->nr_cmds; i++) { 2148 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2149 h->chainsize, GFP_KERNEL); 2150 if (!h->cmd_sg_list[i]) 2151 goto clean; 2152 2153 } 2154 return 0; 2155 2156 clean: 2157 hpsa_free_sg_chain_blocks(h); 2158 return -ENOMEM; 2159 } 2160 2161 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2162 struct io_accel2_cmd *cp, struct CommandList *c) 2163 { 2164 struct ioaccel2_sg_element *chain_block; 2165 u64 temp64; 2166 u32 chain_size; 2167 2168 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2169 chain_size = le32_to_cpu(cp->sg[0].length); 2170 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2171 PCI_DMA_TODEVICE); 2172 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2173 /* prevent subsequent unmapping */ 2174 cp->sg->address = 0; 2175 return -1; 2176 } 2177 cp->sg->address = cpu_to_le64(temp64); 2178 return 0; 2179 } 2180 2181 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2182 struct io_accel2_cmd *cp) 2183 { 2184 struct ioaccel2_sg_element *chain_sg; 2185 u64 temp64; 2186 u32 chain_size; 2187 2188 chain_sg = cp->sg; 2189 temp64 = le64_to_cpu(chain_sg->address); 2190 chain_size = le32_to_cpu(cp->sg[0].length); 2191 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2192 } 2193 2194 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2195 struct CommandList *c) 2196 { 2197 struct SGDescriptor *chain_sg, *chain_block; 2198 u64 temp64; 2199 u32 chain_len; 2200 2201 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2202 chain_block = h->cmd_sg_list[c->cmdindex]; 2203 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2204 chain_len = sizeof(*chain_sg) * 2205 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2206 chain_sg->Len = cpu_to_le32(chain_len); 2207 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2208 PCI_DMA_TODEVICE); 2209 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2210 /* prevent subsequent unmapping */ 2211 chain_sg->Addr = cpu_to_le64(0); 2212 return -1; 2213 } 2214 chain_sg->Addr = cpu_to_le64(temp64); 2215 return 0; 2216 } 2217 2218 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2219 struct CommandList *c) 2220 { 2221 struct SGDescriptor *chain_sg; 2222 2223 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2224 return; 2225 2226 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2227 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2228 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2229 } 2230 2231 2232 /* Decode the various types of errors on ioaccel2 path. 2233 * Return 1 for any error that should generate a RAID path retry. 2234 * Return 0 for errors that don't require a RAID path retry. 2235 */ 2236 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2237 struct CommandList *c, 2238 struct scsi_cmnd *cmd, 2239 struct io_accel2_cmd *c2, 2240 struct hpsa_scsi_dev_t *dev) 2241 { 2242 int data_len; 2243 int retry = 0; 2244 u32 ioaccel2_resid = 0; 2245 2246 switch (c2->error_data.serv_response) { 2247 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2248 switch (c2->error_data.status) { 2249 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2250 break; 2251 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2252 cmd->result |= SAM_STAT_CHECK_CONDITION; 2253 if (c2->error_data.data_present != 2254 IOACCEL2_SENSE_DATA_PRESENT) { 2255 memset(cmd->sense_buffer, 0, 2256 SCSI_SENSE_BUFFERSIZE); 2257 break; 2258 } 2259 /* copy the sense data */ 2260 data_len = c2->error_data.sense_data_len; 2261 if (data_len > SCSI_SENSE_BUFFERSIZE) 2262 data_len = SCSI_SENSE_BUFFERSIZE; 2263 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2264 data_len = 2265 sizeof(c2->error_data.sense_data_buff); 2266 memcpy(cmd->sense_buffer, 2267 c2->error_data.sense_data_buff, data_len); 2268 retry = 1; 2269 break; 2270 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2271 retry = 1; 2272 break; 2273 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2274 retry = 1; 2275 break; 2276 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2277 retry = 1; 2278 break; 2279 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2280 retry = 1; 2281 break; 2282 default: 2283 retry = 1; 2284 break; 2285 } 2286 break; 2287 case IOACCEL2_SERV_RESPONSE_FAILURE: 2288 switch (c2->error_data.status) { 2289 case IOACCEL2_STATUS_SR_IO_ERROR: 2290 case IOACCEL2_STATUS_SR_IO_ABORTED: 2291 case IOACCEL2_STATUS_SR_OVERRUN: 2292 retry = 1; 2293 break; 2294 case IOACCEL2_STATUS_SR_UNDERRUN: 2295 cmd->result = (DID_OK << 16); /* host byte */ 2296 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2297 ioaccel2_resid = get_unaligned_le32( 2298 &c2->error_data.resid_cnt[0]); 2299 scsi_set_resid(cmd, ioaccel2_resid); 2300 break; 2301 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2302 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2303 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2304 /* 2305 * Did an HBA disk disappear? We will eventually 2306 * get a state change event from the controller but 2307 * in the meantime, we need to tell the OS that the 2308 * HBA disk is no longer there and stop I/O 2309 * from going down. This allows the potential re-insert 2310 * of the disk to get the same device node. 2311 */ 2312 if (dev->physical_device && dev->expose_device) { 2313 cmd->result = DID_NO_CONNECT << 16; 2314 dev->removed = 1; 2315 h->drv_req_rescan = 1; 2316 dev_warn(&h->pdev->dev, 2317 "%s: device is gone!\n", __func__); 2318 } else 2319 /* 2320 * Retry by sending down the RAID path. 2321 * We will get an event from ctlr to 2322 * trigger rescan regardless. 2323 */ 2324 retry = 1; 2325 break; 2326 default: 2327 retry = 1; 2328 } 2329 break; 2330 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2331 break; 2332 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2333 break; 2334 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2335 retry = 1; 2336 break; 2337 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2338 break; 2339 default: 2340 retry = 1; 2341 break; 2342 } 2343 2344 return retry; /* retry on raid path? */ 2345 } 2346 2347 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2348 struct CommandList *c) 2349 { 2350 bool do_wake = false; 2351 2352 /* 2353 * Prevent the following race in the abort handler: 2354 * 2355 * 1. LLD is requested to abort a SCSI command 2356 * 2. The SCSI command completes 2357 * 3. The struct CommandList associated with step 2 is made available 2358 * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2359 * 5. Abort handler follows scsi_cmnd->host_scribble and 2360 * finds struct CommandList and tries to aborts it 2361 * Now we have aborted the wrong command. 2362 * 2363 * Reset c->scsi_cmd here so that the abort or reset handler will know 2364 * this command has completed. Then, check to see if the handler is 2365 * waiting for this command, and, if so, wake it. 2366 */ 2367 c->scsi_cmd = SCSI_CMD_IDLE; 2368 mb(); /* Declare command idle before checking for pending events. */ 2369 if (c->abort_pending) { 2370 do_wake = true; 2371 c->abort_pending = false; 2372 } 2373 if (c->reset_pending) { 2374 unsigned long flags; 2375 struct hpsa_scsi_dev_t *dev; 2376 2377 /* 2378 * There appears to be a reset pending; lock the lock and 2379 * reconfirm. If so, then decrement the count of outstanding 2380 * commands and wake the reset command if this is the last one. 2381 */ 2382 spin_lock_irqsave(&h->lock, flags); 2383 dev = c->reset_pending; /* Re-fetch under the lock. */ 2384 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2385 do_wake = true; 2386 c->reset_pending = NULL; 2387 spin_unlock_irqrestore(&h->lock, flags); 2388 } 2389 2390 if (do_wake) 2391 wake_up_all(&h->event_sync_wait_queue); 2392 } 2393 2394 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2395 struct CommandList *c) 2396 { 2397 hpsa_cmd_resolve_events(h, c); 2398 cmd_tagged_free(h, c); 2399 } 2400 2401 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2402 struct CommandList *c, struct scsi_cmnd *cmd) 2403 { 2404 hpsa_cmd_resolve_and_free(h, c); 2405 if (cmd && cmd->scsi_done) 2406 cmd->scsi_done(cmd); 2407 } 2408 2409 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2410 { 2411 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2412 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2413 } 2414 2415 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2416 { 2417 cmd->result = DID_ABORT << 16; 2418 } 2419 2420 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2421 struct scsi_cmnd *cmd) 2422 { 2423 hpsa_set_scsi_cmd_aborted(cmd); 2424 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2425 c->Request.CDB, c->err_info->ScsiStatus); 2426 hpsa_cmd_resolve_and_free(h, c); 2427 } 2428 2429 static void process_ioaccel2_completion(struct ctlr_info *h, 2430 struct CommandList *c, struct scsi_cmnd *cmd, 2431 struct hpsa_scsi_dev_t *dev) 2432 { 2433 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2434 2435 /* check for good status */ 2436 if (likely(c2->error_data.serv_response == 0 && 2437 c2->error_data.status == 0)) 2438 return hpsa_cmd_free_and_done(h, c, cmd); 2439 2440 /* 2441 * Any RAID offload error results in retry which will use 2442 * the normal I/O path so the controller can handle whatever's 2443 * wrong. 2444 */ 2445 if (is_logical_device(dev) && 2446 c2->error_data.serv_response == 2447 IOACCEL2_SERV_RESPONSE_FAILURE) { 2448 if (c2->error_data.status == 2449 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2450 dev->offload_enabled = 0; 2451 dev->offload_to_be_enabled = 0; 2452 } 2453 2454 return hpsa_retry_cmd(h, c); 2455 } 2456 2457 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2458 return hpsa_retry_cmd(h, c); 2459 2460 return hpsa_cmd_free_and_done(h, c, cmd); 2461 } 2462 2463 /* Returns 0 on success, < 0 otherwise. */ 2464 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2465 struct CommandList *cp) 2466 { 2467 u8 tmf_status = cp->err_info->ScsiStatus; 2468 2469 switch (tmf_status) { 2470 case CISS_TMF_COMPLETE: 2471 /* 2472 * CISS_TMF_COMPLETE never happens, instead, 2473 * ei->CommandStatus == 0 for this case. 2474 */ 2475 case CISS_TMF_SUCCESS: 2476 return 0; 2477 case CISS_TMF_INVALID_FRAME: 2478 case CISS_TMF_NOT_SUPPORTED: 2479 case CISS_TMF_FAILED: 2480 case CISS_TMF_WRONG_LUN: 2481 case CISS_TMF_OVERLAPPED_TAG: 2482 break; 2483 default: 2484 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2485 tmf_status); 2486 break; 2487 } 2488 return -tmf_status; 2489 } 2490 2491 static void complete_scsi_command(struct CommandList *cp) 2492 { 2493 struct scsi_cmnd *cmd; 2494 struct ctlr_info *h; 2495 struct ErrorInfo *ei; 2496 struct hpsa_scsi_dev_t *dev; 2497 struct io_accel2_cmd *c2; 2498 2499 u8 sense_key; 2500 u8 asc; /* additional sense code */ 2501 u8 ascq; /* additional sense code qualifier */ 2502 unsigned long sense_data_size; 2503 2504 ei = cp->err_info; 2505 cmd = cp->scsi_cmd; 2506 h = cp->h; 2507 2508 if (!cmd->device) { 2509 cmd->result = DID_NO_CONNECT << 16; 2510 return hpsa_cmd_free_and_done(h, cp, cmd); 2511 } 2512 2513 dev = cmd->device->hostdata; 2514 if (!dev) { 2515 cmd->result = DID_NO_CONNECT << 16; 2516 return hpsa_cmd_free_and_done(h, cp, cmd); 2517 } 2518 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2519 2520 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2521 if ((cp->cmd_type == CMD_SCSI) && 2522 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2523 hpsa_unmap_sg_chain_block(h, cp); 2524 2525 if ((cp->cmd_type == CMD_IOACCEL2) && 2526 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2527 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2528 2529 cmd->result = (DID_OK << 16); /* host byte */ 2530 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2531 2532 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2533 if (dev->physical_device && dev->expose_device && 2534 dev->removed) { 2535 cmd->result = DID_NO_CONNECT << 16; 2536 return hpsa_cmd_free_and_done(h, cp, cmd); 2537 } 2538 if (likely(cp->phys_disk != NULL)) 2539 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2540 } 2541 2542 /* 2543 * We check for lockup status here as it may be set for 2544 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2545 * fail_all_oustanding_cmds() 2546 */ 2547 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2548 /* DID_NO_CONNECT will prevent a retry */ 2549 cmd->result = DID_NO_CONNECT << 16; 2550 return hpsa_cmd_free_and_done(h, cp, cmd); 2551 } 2552 2553 if ((unlikely(hpsa_is_pending_event(cp)))) { 2554 if (cp->reset_pending) 2555 return hpsa_cmd_free_and_done(h, cp, cmd); 2556 if (cp->abort_pending) 2557 return hpsa_cmd_abort_and_free(h, cp, cmd); 2558 } 2559 2560 if (cp->cmd_type == CMD_IOACCEL2) 2561 return process_ioaccel2_completion(h, cp, cmd, dev); 2562 2563 scsi_set_resid(cmd, ei->ResidualCnt); 2564 if (ei->CommandStatus == 0) 2565 return hpsa_cmd_free_and_done(h, cp, cmd); 2566 2567 /* For I/O accelerator commands, copy over some fields to the normal 2568 * CISS header used below for error handling. 2569 */ 2570 if (cp->cmd_type == CMD_IOACCEL1) { 2571 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2572 cp->Header.SGList = scsi_sg_count(cmd); 2573 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2574 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2575 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2576 cp->Header.tag = c->tag; 2577 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2578 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2579 2580 /* Any RAID offload error results in retry which will use 2581 * the normal I/O path so the controller can handle whatever's 2582 * wrong. 2583 */ 2584 if (is_logical_device(dev)) { 2585 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2586 dev->offload_enabled = 0; 2587 return hpsa_retry_cmd(h, cp); 2588 } 2589 } 2590 2591 /* an error has occurred */ 2592 switch (ei->CommandStatus) { 2593 2594 case CMD_TARGET_STATUS: 2595 cmd->result |= ei->ScsiStatus; 2596 /* copy the sense data */ 2597 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2598 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2599 else 2600 sense_data_size = sizeof(ei->SenseInfo); 2601 if (ei->SenseLen < sense_data_size) 2602 sense_data_size = ei->SenseLen; 2603 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2604 if (ei->ScsiStatus) 2605 decode_sense_data(ei->SenseInfo, sense_data_size, 2606 &sense_key, &asc, &ascq); 2607 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2608 if (sense_key == ABORTED_COMMAND) { 2609 cmd->result |= DID_SOFT_ERROR << 16; 2610 break; 2611 } 2612 break; 2613 } 2614 /* Problem was not a check condition 2615 * Pass it up to the upper layers... 2616 */ 2617 if (ei->ScsiStatus) { 2618 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2619 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2620 "Returning result: 0x%x\n", 2621 cp, ei->ScsiStatus, 2622 sense_key, asc, ascq, 2623 cmd->result); 2624 } else { /* scsi status is zero??? How??? */ 2625 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2626 "Returning no connection.\n", cp), 2627 2628 /* Ordinarily, this case should never happen, 2629 * but there is a bug in some released firmware 2630 * revisions that allows it to happen if, for 2631 * example, a 4100 backplane loses power and 2632 * the tape drive is in it. We assume that 2633 * it's a fatal error of some kind because we 2634 * can't show that it wasn't. We will make it 2635 * look like selection timeout since that is 2636 * the most common reason for this to occur, 2637 * and it's severe enough. 2638 */ 2639 2640 cmd->result = DID_NO_CONNECT << 16; 2641 } 2642 break; 2643 2644 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2645 break; 2646 case CMD_DATA_OVERRUN: 2647 dev_warn(&h->pdev->dev, 2648 "CDB %16phN data overrun\n", cp->Request.CDB); 2649 break; 2650 case CMD_INVALID: { 2651 /* print_bytes(cp, sizeof(*cp), 1, 0); 2652 print_cmd(cp); */ 2653 /* We get CMD_INVALID if you address a non-existent device 2654 * instead of a selection timeout (no response). You will 2655 * see this if you yank out a drive, then try to access it. 2656 * This is kind of a shame because it means that any other 2657 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2658 * missing target. */ 2659 cmd->result = DID_NO_CONNECT << 16; 2660 } 2661 break; 2662 case CMD_PROTOCOL_ERR: 2663 cmd->result = DID_ERROR << 16; 2664 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2665 cp->Request.CDB); 2666 break; 2667 case CMD_HARDWARE_ERR: 2668 cmd->result = DID_ERROR << 16; 2669 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2670 cp->Request.CDB); 2671 break; 2672 case CMD_CONNECTION_LOST: 2673 cmd->result = DID_ERROR << 16; 2674 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2675 cp->Request.CDB); 2676 break; 2677 case CMD_ABORTED: 2678 /* Return now to avoid calling scsi_done(). */ 2679 return hpsa_cmd_abort_and_free(h, cp, cmd); 2680 case CMD_ABORT_FAILED: 2681 cmd->result = DID_ERROR << 16; 2682 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2683 cp->Request.CDB); 2684 break; 2685 case CMD_UNSOLICITED_ABORT: 2686 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2687 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2688 cp->Request.CDB); 2689 break; 2690 case CMD_TIMEOUT: 2691 cmd->result = DID_TIME_OUT << 16; 2692 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2693 cp->Request.CDB); 2694 break; 2695 case CMD_UNABORTABLE: 2696 cmd->result = DID_ERROR << 16; 2697 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2698 break; 2699 case CMD_TMF_STATUS: 2700 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2701 cmd->result = DID_ERROR << 16; 2702 break; 2703 case CMD_IOACCEL_DISABLED: 2704 /* This only handles the direct pass-through case since RAID 2705 * offload is handled above. Just attempt a retry. 2706 */ 2707 cmd->result = DID_SOFT_ERROR << 16; 2708 dev_warn(&h->pdev->dev, 2709 "cp %p had HP SSD Smart Path error\n", cp); 2710 break; 2711 default: 2712 cmd->result = DID_ERROR << 16; 2713 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2714 cp, ei->CommandStatus); 2715 } 2716 2717 return hpsa_cmd_free_and_done(h, cp, cmd); 2718 } 2719 2720 static void hpsa_pci_unmap(struct pci_dev *pdev, 2721 struct CommandList *c, int sg_used, int data_direction) 2722 { 2723 int i; 2724 2725 for (i = 0; i < sg_used; i++) 2726 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2727 le32_to_cpu(c->SG[i].Len), 2728 data_direction); 2729 } 2730 2731 static int hpsa_map_one(struct pci_dev *pdev, 2732 struct CommandList *cp, 2733 unsigned char *buf, 2734 size_t buflen, 2735 int data_direction) 2736 { 2737 u64 addr64; 2738 2739 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2740 cp->Header.SGList = 0; 2741 cp->Header.SGTotal = cpu_to_le16(0); 2742 return 0; 2743 } 2744 2745 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2746 if (dma_mapping_error(&pdev->dev, addr64)) { 2747 /* Prevent subsequent unmap of something never mapped */ 2748 cp->Header.SGList = 0; 2749 cp->Header.SGTotal = cpu_to_le16(0); 2750 return -1; 2751 } 2752 cp->SG[0].Addr = cpu_to_le64(addr64); 2753 cp->SG[0].Len = cpu_to_le32(buflen); 2754 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2755 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2756 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2757 return 0; 2758 } 2759 2760 #define NO_TIMEOUT ((unsigned long) -1) 2761 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2762 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2763 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2764 { 2765 DECLARE_COMPLETION_ONSTACK(wait); 2766 2767 c->waiting = &wait; 2768 __enqueue_cmd_and_start_io(h, c, reply_queue); 2769 if (timeout_msecs == NO_TIMEOUT) { 2770 /* TODO: get rid of this no-timeout thing */ 2771 wait_for_completion_io(&wait); 2772 return IO_OK; 2773 } 2774 if (!wait_for_completion_io_timeout(&wait, 2775 msecs_to_jiffies(timeout_msecs))) { 2776 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2777 return -ETIMEDOUT; 2778 } 2779 return IO_OK; 2780 } 2781 2782 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2783 int reply_queue, unsigned long timeout_msecs) 2784 { 2785 if (unlikely(lockup_detected(h))) { 2786 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2787 return IO_OK; 2788 } 2789 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2790 } 2791 2792 static u32 lockup_detected(struct ctlr_info *h) 2793 { 2794 int cpu; 2795 u32 rc, *lockup_detected; 2796 2797 cpu = get_cpu(); 2798 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2799 rc = *lockup_detected; 2800 put_cpu(); 2801 return rc; 2802 } 2803 2804 #define MAX_DRIVER_CMD_RETRIES 25 2805 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2806 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2807 { 2808 int backoff_time = 10, retry_count = 0; 2809 int rc; 2810 2811 do { 2812 memset(c->err_info, 0, sizeof(*c->err_info)); 2813 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2814 timeout_msecs); 2815 if (rc) 2816 break; 2817 retry_count++; 2818 if (retry_count > 3) { 2819 msleep(backoff_time); 2820 if (backoff_time < 1000) 2821 backoff_time *= 2; 2822 } 2823 } while ((check_for_unit_attention(h, c) || 2824 check_for_busy(h, c)) && 2825 retry_count <= MAX_DRIVER_CMD_RETRIES); 2826 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2827 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2828 rc = -EIO; 2829 return rc; 2830 } 2831 2832 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2833 struct CommandList *c) 2834 { 2835 const u8 *cdb = c->Request.CDB; 2836 const u8 *lun = c->Header.LUN.LunAddrBytes; 2837 2838 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2839 txt, lun, cdb); 2840 } 2841 2842 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2843 struct CommandList *cp) 2844 { 2845 const struct ErrorInfo *ei = cp->err_info; 2846 struct device *d = &cp->h->pdev->dev; 2847 u8 sense_key, asc, ascq; 2848 int sense_len; 2849 2850 switch (ei->CommandStatus) { 2851 case CMD_TARGET_STATUS: 2852 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2853 sense_len = sizeof(ei->SenseInfo); 2854 else 2855 sense_len = ei->SenseLen; 2856 decode_sense_data(ei->SenseInfo, sense_len, 2857 &sense_key, &asc, &ascq); 2858 hpsa_print_cmd(h, "SCSI status", cp); 2859 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2860 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2861 sense_key, asc, ascq); 2862 else 2863 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2864 if (ei->ScsiStatus == 0) 2865 dev_warn(d, "SCSI status is abnormally zero. " 2866 "(probably indicates selection timeout " 2867 "reported incorrectly due to a known " 2868 "firmware bug, circa July, 2001.)\n"); 2869 break; 2870 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2871 break; 2872 case CMD_DATA_OVERRUN: 2873 hpsa_print_cmd(h, "overrun condition", cp); 2874 break; 2875 case CMD_INVALID: { 2876 /* controller unfortunately reports SCSI passthru's 2877 * to non-existent targets as invalid commands. 2878 */ 2879 hpsa_print_cmd(h, "invalid command", cp); 2880 dev_warn(d, "probably means device no longer present\n"); 2881 } 2882 break; 2883 case CMD_PROTOCOL_ERR: 2884 hpsa_print_cmd(h, "protocol error", cp); 2885 break; 2886 case CMD_HARDWARE_ERR: 2887 hpsa_print_cmd(h, "hardware error", cp); 2888 break; 2889 case CMD_CONNECTION_LOST: 2890 hpsa_print_cmd(h, "connection lost", cp); 2891 break; 2892 case CMD_ABORTED: 2893 hpsa_print_cmd(h, "aborted", cp); 2894 break; 2895 case CMD_ABORT_FAILED: 2896 hpsa_print_cmd(h, "abort failed", cp); 2897 break; 2898 case CMD_UNSOLICITED_ABORT: 2899 hpsa_print_cmd(h, "unsolicited abort", cp); 2900 break; 2901 case CMD_TIMEOUT: 2902 hpsa_print_cmd(h, "timed out", cp); 2903 break; 2904 case CMD_UNABORTABLE: 2905 hpsa_print_cmd(h, "unabortable", cp); 2906 break; 2907 case CMD_CTLR_LOCKUP: 2908 hpsa_print_cmd(h, "controller lockup detected", cp); 2909 break; 2910 default: 2911 hpsa_print_cmd(h, "unknown status", cp); 2912 dev_warn(d, "Unknown command status %x\n", 2913 ei->CommandStatus); 2914 } 2915 } 2916 2917 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2918 u16 page, unsigned char *buf, 2919 unsigned char bufsize) 2920 { 2921 int rc = IO_OK; 2922 struct CommandList *c; 2923 struct ErrorInfo *ei; 2924 2925 c = cmd_alloc(h); 2926 2927 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2928 page, scsi3addr, TYPE_CMD)) { 2929 rc = -1; 2930 goto out; 2931 } 2932 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2933 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2934 if (rc) 2935 goto out; 2936 ei = c->err_info; 2937 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2938 hpsa_scsi_interpret_error(h, c); 2939 rc = -1; 2940 } 2941 out: 2942 cmd_free(h, c); 2943 return rc; 2944 } 2945 2946 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2947 u8 reset_type, int reply_queue) 2948 { 2949 int rc = IO_OK; 2950 struct CommandList *c; 2951 struct ErrorInfo *ei; 2952 2953 c = cmd_alloc(h); 2954 2955 2956 /* fill_cmd can't fail here, no data buffer to map. */ 2957 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2958 scsi3addr, TYPE_MSG); 2959 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 2960 if (rc) { 2961 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2962 goto out; 2963 } 2964 /* no unmap needed here because no data xfer. */ 2965 2966 ei = c->err_info; 2967 if (ei->CommandStatus != 0) { 2968 hpsa_scsi_interpret_error(h, c); 2969 rc = -1; 2970 } 2971 out: 2972 cmd_free(h, c); 2973 return rc; 2974 } 2975 2976 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2977 struct hpsa_scsi_dev_t *dev, 2978 unsigned char *scsi3addr) 2979 { 2980 int i; 2981 bool match = false; 2982 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2983 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2984 2985 if (hpsa_is_cmd_idle(c)) 2986 return false; 2987 2988 switch (c->cmd_type) { 2989 case CMD_SCSI: 2990 case CMD_IOCTL_PEND: 2991 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2992 sizeof(c->Header.LUN.LunAddrBytes)); 2993 break; 2994 2995 case CMD_IOACCEL1: 2996 case CMD_IOACCEL2: 2997 if (c->phys_disk == dev) { 2998 /* HBA mode match */ 2999 match = true; 3000 } else { 3001 /* Possible RAID mode -- check each phys dev. */ 3002 /* FIXME: Do we need to take out a lock here? If 3003 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3004 * instead. */ 3005 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3006 /* FIXME: an alternate test might be 3007 * 3008 * match = dev->phys_disk[i]->ioaccel_handle 3009 * == c2->scsi_nexus; */ 3010 match = dev->phys_disk[i] == c->phys_disk; 3011 } 3012 } 3013 break; 3014 3015 case IOACCEL2_TMF: 3016 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3017 match = dev->phys_disk[i]->ioaccel_handle == 3018 le32_to_cpu(ac->it_nexus); 3019 } 3020 break; 3021 3022 case 0: /* The command is in the middle of being initialized. */ 3023 match = false; 3024 break; 3025 3026 default: 3027 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3028 c->cmd_type); 3029 BUG(); 3030 } 3031 3032 return match; 3033 } 3034 3035 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3036 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3037 { 3038 int i; 3039 int rc = 0; 3040 3041 /* We can really only handle one reset at a time */ 3042 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3043 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3044 return -EINTR; 3045 } 3046 3047 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3048 3049 for (i = 0; i < h->nr_cmds; i++) { 3050 struct CommandList *c = h->cmd_pool + i; 3051 int refcount = atomic_inc_return(&c->refcount); 3052 3053 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3054 unsigned long flags; 3055 3056 /* 3057 * Mark the target command as having a reset pending, 3058 * then lock a lock so that the command cannot complete 3059 * while we're considering it. If the command is not 3060 * idle then count it; otherwise revoke the event. 3061 */ 3062 c->reset_pending = dev; 3063 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3064 if (!hpsa_is_cmd_idle(c)) 3065 atomic_inc(&dev->reset_cmds_out); 3066 else 3067 c->reset_pending = NULL; 3068 spin_unlock_irqrestore(&h->lock, flags); 3069 } 3070 3071 cmd_free(h, c); 3072 } 3073 3074 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3075 if (!rc) 3076 wait_event(h->event_sync_wait_queue, 3077 atomic_read(&dev->reset_cmds_out) == 0 || 3078 lockup_detected(h)); 3079 3080 if (unlikely(lockup_detected(h))) { 3081 dev_warn(&h->pdev->dev, 3082 "Controller lockup detected during reset wait\n"); 3083 rc = -ENODEV; 3084 } 3085 3086 if (unlikely(rc)) 3087 atomic_set(&dev->reset_cmds_out, 0); 3088 else 3089 wait_for_device_to_become_ready(h, scsi3addr, 0); 3090 3091 mutex_unlock(&h->reset_mutex); 3092 return rc; 3093 } 3094 3095 static void hpsa_get_raid_level(struct ctlr_info *h, 3096 unsigned char *scsi3addr, unsigned char *raid_level) 3097 { 3098 int rc; 3099 unsigned char *buf; 3100 3101 *raid_level = RAID_UNKNOWN; 3102 buf = kzalloc(64, GFP_KERNEL); 3103 if (!buf) 3104 return; 3105 3106 if (!hpsa_vpd_page_supported(h, scsi3addr, 3107 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3108 goto exit; 3109 3110 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3111 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3112 3113 if (rc == 0) 3114 *raid_level = buf[8]; 3115 if (*raid_level > RAID_UNKNOWN) 3116 *raid_level = RAID_UNKNOWN; 3117 exit: 3118 kfree(buf); 3119 return; 3120 } 3121 3122 #define HPSA_MAP_DEBUG 3123 #ifdef HPSA_MAP_DEBUG 3124 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3125 struct raid_map_data *map_buff) 3126 { 3127 struct raid_map_disk_data *dd = &map_buff->data[0]; 3128 int map, row, col; 3129 u16 map_cnt, row_cnt, disks_per_row; 3130 3131 if (rc != 0) 3132 return; 3133 3134 /* Show details only if debugging has been activated. */ 3135 if (h->raid_offload_debug < 2) 3136 return; 3137 3138 dev_info(&h->pdev->dev, "structure_size = %u\n", 3139 le32_to_cpu(map_buff->structure_size)); 3140 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3141 le32_to_cpu(map_buff->volume_blk_size)); 3142 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3143 le64_to_cpu(map_buff->volume_blk_cnt)); 3144 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3145 map_buff->phys_blk_shift); 3146 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3147 map_buff->parity_rotation_shift); 3148 dev_info(&h->pdev->dev, "strip_size = %u\n", 3149 le16_to_cpu(map_buff->strip_size)); 3150 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3151 le64_to_cpu(map_buff->disk_starting_blk)); 3152 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3153 le64_to_cpu(map_buff->disk_blk_cnt)); 3154 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3155 le16_to_cpu(map_buff->data_disks_per_row)); 3156 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3157 le16_to_cpu(map_buff->metadata_disks_per_row)); 3158 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3159 le16_to_cpu(map_buff->row_cnt)); 3160 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3161 le16_to_cpu(map_buff->layout_map_count)); 3162 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3163 le16_to_cpu(map_buff->flags)); 3164 dev_info(&h->pdev->dev, "encrypytion = %s\n", 3165 le16_to_cpu(map_buff->flags) & 3166 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3167 dev_info(&h->pdev->dev, "dekindex = %u\n", 3168 le16_to_cpu(map_buff->dekindex)); 3169 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3170 for (map = 0; map < map_cnt; map++) { 3171 dev_info(&h->pdev->dev, "Map%u:\n", map); 3172 row_cnt = le16_to_cpu(map_buff->row_cnt); 3173 for (row = 0; row < row_cnt; row++) { 3174 dev_info(&h->pdev->dev, " Row%u:\n", row); 3175 disks_per_row = 3176 le16_to_cpu(map_buff->data_disks_per_row); 3177 for (col = 0; col < disks_per_row; col++, dd++) 3178 dev_info(&h->pdev->dev, 3179 " D%02u: h=0x%04x xor=%u,%u\n", 3180 col, dd->ioaccel_handle, 3181 dd->xor_mult[0], dd->xor_mult[1]); 3182 disks_per_row = 3183 le16_to_cpu(map_buff->metadata_disks_per_row); 3184 for (col = 0; col < disks_per_row; col++, dd++) 3185 dev_info(&h->pdev->dev, 3186 " M%02u: h=0x%04x xor=%u,%u\n", 3187 col, dd->ioaccel_handle, 3188 dd->xor_mult[0], dd->xor_mult[1]); 3189 } 3190 } 3191 } 3192 #else 3193 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3194 __attribute__((unused)) int rc, 3195 __attribute__((unused)) struct raid_map_data *map_buff) 3196 { 3197 } 3198 #endif 3199 3200 static int hpsa_get_raid_map(struct ctlr_info *h, 3201 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3202 { 3203 int rc = 0; 3204 struct CommandList *c; 3205 struct ErrorInfo *ei; 3206 3207 c = cmd_alloc(h); 3208 3209 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3210 sizeof(this_device->raid_map), 0, 3211 scsi3addr, TYPE_CMD)) { 3212 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3213 cmd_free(h, c); 3214 return -1; 3215 } 3216 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3217 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3218 if (rc) 3219 goto out; 3220 ei = c->err_info; 3221 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3222 hpsa_scsi_interpret_error(h, c); 3223 rc = -1; 3224 goto out; 3225 } 3226 cmd_free(h, c); 3227 3228 /* @todo in the future, dynamically allocate RAID map memory */ 3229 if (le32_to_cpu(this_device->raid_map.structure_size) > 3230 sizeof(this_device->raid_map)) { 3231 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3232 rc = -1; 3233 } 3234 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3235 return rc; 3236 out: 3237 cmd_free(h, c); 3238 return rc; 3239 } 3240 3241 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3242 unsigned char scsi3addr[], u16 bmic_device_index, 3243 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3244 { 3245 int rc = IO_OK; 3246 struct CommandList *c; 3247 struct ErrorInfo *ei; 3248 3249 c = cmd_alloc(h); 3250 3251 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3252 0, RAID_CTLR_LUNID, TYPE_CMD); 3253 if (rc) 3254 goto out; 3255 3256 c->Request.CDB[2] = bmic_device_index & 0xff; 3257 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3258 3259 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3260 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3261 if (rc) 3262 goto out; 3263 ei = c->err_info; 3264 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3265 hpsa_scsi_interpret_error(h, c); 3266 rc = -1; 3267 } 3268 out: 3269 cmd_free(h, c); 3270 return rc; 3271 } 3272 3273 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3274 struct bmic_identify_controller *buf, size_t bufsize) 3275 { 3276 int rc = IO_OK; 3277 struct CommandList *c; 3278 struct ErrorInfo *ei; 3279 3280 c = cmd_alloc(h); 3281 3282 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3283 0, RAID_CTLR_LUNID, TYPE_CMD); 3284 if (rc) 3285 goto out; 3286 3287 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3288 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3289 if (rc) 3290 goto out; 3291 ei = c->err_info; 3292 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3293 hpsa_scsi_interpret_error(h, c); 3294 rc = -1; 3295 } 3296 out: 3297 cmd_free(h, c); 3298 return rc; 3299 } 3300 3301 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3302 unsigned char scsi3addr[], u16 bmic_device_index, 3303 struct bmic_identify_physical_device *buf, size_t bufsize) 3304 { 3305 int rc = IO_OK; 3306 struct CommandList *c; 3307 struct ErrorInfo *ei; 3308 3309 c = cmd_alloc(h); 3310 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3311 0, RAID_CTLR_LUNID, TYPE_CMD); 3312 if (rc) 3313 goto out; 3314 3315 c->Request.CDB[2] = bmic_device_index & 0xff; 3316 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3317 3318 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3319 DEFAULT_TIMEOUT); 3320 ei = c->err_info; 3321 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3322 hpsa_scsi_interpret_error(h, c); 3323 rc = -1; 3324 } 3325 out: 3326 cmd_free(h, c); 3327 3328 return rc; 3329 } 3330 3331 /* 3332 * get enclosure information 3333 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3334 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3335 * Uses id_physical_device to determine the box_index. 3336 */ 3337 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3338 unsigned char *scsi3addr, 3339 struct ReportExtendedLUNdata *rlep, int rle_index, 3340 struct hpsa_scsi_dev_t *encl_dev) 3341 { 3342 int rc = -1; 3343 struct CommandList *c = NULL; 3344 struct ErrorInfo *ei = NULL; 3345 struct bmic_sense_storage_box_params *bssbp = NULL; 3346 struct bmic_identify_physical_device *id_phys = NULL; 3347 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3348 u16 bmic_device_index = 0; 3349 3350 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3351 3352 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3353 rc = IO_OK; 3354 goto out; 3355 } 3356 3357 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3358 if (!bssbp) 3359 goto out; 3360 3361 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3362 if (!id_phys) 3363 goto out; 3364 3365 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3366 id_phys, sizeof(*id_phys)); 3367 if (rc) { 3368 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3369 __func__, encl_dev->external, bmic_device_index); 3370 goto out; 3371 } 3372 3373 c = cmd_alloc(h); 3374 3375 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3376 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3377 3378 if (rc) 3379 goto out; 3380 3381 if (id_phys->phys_connector[1] == 'E') 3382 c->Request.CDB[5] = id_phys->box_index; 3383 else 3384 c->Request.CDB[5] = 0; 3385 3386 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3387 DEFAULT_TIMEOUT); 3388 if (rc) 3389 goto out; 3390 3391 ei = c->err_info; 3392 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3393 rc = -1; 3394 goto out; 3395 } 3396 3397 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3398 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3399 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3400 3401 rc = IO_OK; 3402 out: 3403 kfree(bssbp); 3404 kfree(id_phys); 3405 3406 if (c) 3407 cmd_free(h, c); 3408 3409 if (rc != IO_OK) 3410 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3411 "Error, could not get enclosure information\n"); 3412 } 3413 3414 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3415 unsigned char *scsi3addr) 3416 { 3417 struct ReportExtendedLUNdata *physdev; 3418 u32 nphysicals; 3419 u64 sa = 0; 3420 int i; 3421 3422 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3423 if (!physdev) 3424 return 0; 3425 3426 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3427 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3428 kfree(physdev); 3429 return 0; 3430 } 3431 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3432 3433 for (i = 0; i < nphysicals; i++) 3434 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3435 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3436 break; 3437 } 3438 3439 kfree(physdev); 3440 3441 return sa; 3442 } 3443 3444 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3445 struct hpsa_scsi_dev_t *dev) 3446 { 3447 int rc; 3448 u64 sa = 0; 3449 3450 if (is_hba_lunid(scsi3addr)) { 3451 struct bmic_sense_subsystem_info *ssi; 3452 3453 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3454 if (!ssi) 3455 return; 3456 3457 rc = hpsa_bmic_sense_subsystem_information(h, 3458 scsi3addr, 0, ssi, sizeof(*ssi)); 3459 if (rc == 0) { 3460 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3461 h->sas_address = sa; 3462 } 3463 3464 kfree(ssi); 3465 } else 3466 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3467 3468 dev->sas_address = sa; 3469 } 3470 3471 /* Get a device id from inquiry page 0x83 */ 3472 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3473 unsigned char scsi3addr[], u8 page) 3474 { 3475 int rc; 3476 int i; 3477 int pages; 3478 unsigned char *buf, bufsize; 3479 3480 buf = kzalloc(256, GFP_KERNEL); 3481 if (!buf) 3482 return false; 3483 3484 /* Get the size of the page list first */ 3485 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3486 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3487 buf, HPSA_VPD_HEADER_SZ); 3488 if (rc != 0) 3489 goto exit_unsupported; 3490 pages = buf[3]; 3491 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3492 bufsize = pages + HPSA_VPD_HEADER_SZ; 3493 else 3494 bufsize = 255; 3495 3496 /* Get the whole VPD page list */ 3497 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3498 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3499 buf, bufsize); 3500 if (rc != 0) 3501 goto exit_unsupported; 3502 3503 pages = buf[3]; 3504 for (i = 1; i <= pages; i++) 3505 if (buf[3 + i] == page) 3506 goto exit_supported; 3507 exit_unsupported: 3508 kfree(buf); 3509 return false; 3510 exit_supported: 3511 kfree(buf); 3512 return true; 3513 } 3514 3515 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3516 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3517 { 3518 int rc; 3519 unsigned char *buf; 3520 u8 ioaccel_status; 3521 3522 this_device->offload_config = 0; 3523 this_device->offload_enabled = 0; 3524 this_device->offload_to_be_enabled = 0; 3525 3526 buf = kzalloc(64, GFP_KERNEL); 3527 if (!buf) 3528 return; 3529 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3530 goto out; 3531 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3532 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3533 if (rc != 0) 3534 goto out; 3535 3536 #define IOACCEL_STATUS_BYTE 4 3537 #define OFFLOAD_CONFIGURED_BIT 0x01 3538 #define OFFLOAD_ENABLED_BIT 0x02 3539 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3540 this_device->offload_config = 3541 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3542 if (this_device->offload_config) { 3543 this_device->offload_enabled = 3544 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3545 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3546 this_device->offload_enabled = 0; 3547 } 3548 this_device->offload_to_be_enabled = this_device->offload_enabled; 3549 out: 3550 kfree(buf); 3551 return; 3552 } 3553 3554 /* Get the device id from inquiry page 0x83 */ 3555 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3556 unsigned char *device_id, int index, int buflen) 3557 { 3558 int rc; 3559 unsigned char *buf; 3560 3561 /* Does controller have VPD for device id? */ 3562 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3563 return 1; /* not supported */ 3564 3565 buf = kzalloc(64, GFP_KERNEL); 3566 if (!buf) 3567 return -ENOMEM; 3568 3569 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3570 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3571 if (rc == 0) { 3572 if (buflen > 16) 3573 buflen = 16; 3574 memcpy(device_id, &buf[8], buflen); 3575 } 3576 3577 kfree(buf); 3578 3579 return rc; /*0 - got id, otherwise, didn't */ 3580 } 3581 3582 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3583 void *buf, int bufsize, 3584 int extended_response) 3585 { 3586 int rc = IO_OK; 3587 struct CommandList *c; 3588 unsigned char scsi3addr[8]; 3589 struct ErrorInfo *ei; 3590 3591 c = cmd_alloc(h); 3592 3593 /* address the controller */ 3594 memset(scsi3addr, 0, sizeof(scsi3addr)); 3595 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3596 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3597 rc = -1; 3598 goto out; 3599 } 3600 if (extended_response) 3601 c->Request.CDB[1] = extended_response; 3602 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3603 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3604 if (rc) 3605 goto out; 3606 ei = c->err_info; 3607 if (ei->CommandStatus != 0 && 3608 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3609 hpsa_scsi_interpret_error(h, c); 3610 rc = -1; 3611 } else { 3612 struct ReportLUNdata *rld = buf; 3613 3614 if (rld->extended_response_flag != extended_response) { 3615 dev_err(&h->pdev->dev, 3616 "report luns requested format %u, got %u\n", 3617 extended_response, 3618 rld->extended_response_flag); 3619 rc = -1; 3620 } 3621 } 3622 out: 3623 cmd_free(h, c); 3624 return rc; 3625 } 3626 3627 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3628 struct ReportExtendedLUNdata *buf, int bufsize) 3629 { 3630 int rc; 3631 struct ReportLUNdata *lbuf; 3632 3633 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3634 HPSA_REPORT_PHYS_EXTENDED); 3635 if (!rc || !hpsa_allow_any) 3636 return rc; 3637 3638 /* REPORT PHYS EXTENDED is not supported */ 3639 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3640 if (!lbuf) 3641 return -ENOMEM; 3642 3643 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3644 if (!rc) { 3645 int i; 3646 u32 nphys; 3647 3648 /* Copy ReportLUNdata header */ 3649 memcpy(buf, lbuf, 8); 3650 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3651 for (i = 0; i < nphys; i++) 3652 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3653 } 3654 kfree(lbuf); 3655 return rc; 3656 } 3657 3658 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3659 struct ReportLUNdata *buf, int bufsize) 3660 { 3661 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3662 } 3663 3664 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3665 int bus, int target, int lun) 3666 { 3667 device->bus = bus; 3668 device->target = target; 3669 device->lun = lun; 3670 } 3671 3672 /* Use VPD inquiry to get details of volume status */ 3673 static int hpsa_get_volume_status(struct ctlr_info *h, 3674 unsigned char scsi3addr[]) 3675 { 3676 int rc; 3677 int status; 3678 int size; 3679 unsigned char *buf; 3680 3681 buf = kzalloc(64, GFP_KERNEL); 3682 if (!buf) 3683 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3684 3685 /* Does controller have VPD for logical volume status? */ 3686 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3687 goto exit_failed; 3688 3689 /* Get the size of the VPD return buffer */ 3690 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3691 buf, HPSA_VPD_HEADER_SZ); 3692 if (rc != 0) 3693 goto exit_failed; 3694 size = buf[3]; 3695 3696 /* Now get the whole VPD buffer */ 3697 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3698 buf, size + HPSA_VPD_HEADER_SZ); 3699 if (rc != 0) 3700 goto exit_failed; 3701 status = buf[4]; /* status byte */ 3702 3703 kfree(buf); 3704 return status; 3705 exit_failed: 3706 kfree(buf); 3707 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3708 } 3709 3710 /* Determine offline status of a volume. 3711 * Return either: 3712 * 0 (not offline) 3713 * 0xff (offline for unknown reasons) 3714 * # (integer code indicating one of several NOT READY states 3715 * describing why a volume is to be kept offline) 3716 */ 3717 static int hpsa_volume_offline(struct ctlr_info *h, 3718 unsigned char scsi3addr[]) 3719 { 3720 struct CommandList *c; 3721 unsigned char *sense; 3722 u8 sense_key, asc, ascq; 3723 int sense_len; 3724 int rc, ldstat = 0; 3725 u16 cmd_status; 3726 u8 scsi_status; 3727 #define ASC_LUN_NOT_READY 0x04 3728 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3729 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3730 3731 c = cmd_alloc(h); 3732 3733 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3734 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3735 DEFAULT_TIMEOUT); 3736 if (rc) { 3737 cmd_free(h, c); 3738 return 0; 3739 } 3740 sense = c->err_info->SenseInfo; 3741 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3742 sense_len = sizeof(c->err_info->SenseInfo); 3743 else 3744 sense_len = c->err_info->SenseLen; 3745 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3746 cmd_status = c->err_info->CommandStatus; 3747 scsi_status = c->err_info->ScsiStatus; 3748 cmd_free(h, c); 3749 /* Is the volume 'not ready'? */ 3750 if (cmd_status != CMD_TARGET_STATUS || 3751 scsi_status != SAM_STAT_CHECK_CONDITION || 3752 sense_key != NOT_READY || 3753 asc != ASC_LUN_NOT_READY) { 3754 return 0; 3755 } 3756 3757 /* Determine the reason for not ready state */ 3758 ldstat = hpsa_get_volume_status(h, scsi3addr); 3759 3760 /* Keep volume offline in certain cases: */ 3761 switch (ldstat) { 3762 case HPSA_LV_UNDERGOING_ERASE: 3763 case HPSA_LV_NOT_AVAILABLE: 3764 case HPSA_LV_UNDERGOING_RPI: 3765 case HPSA_LV_PENDING_RPI: 3766 case HPSA_LV_ENCRYPTED_NO_KEY: 3767 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3768 case HPSA_LV_UNDERGOING_ENCRYPTION: 3769 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3770 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3771 return ldstat; 3772 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3773 /* If VPD status page isn't available, 3774 * use ASC/ASCQ to determine state 3775 */ 3776 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3777 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3778 return ldstat; 3779 break; 3780 default: 3781 break; 3782 } 3783 return 0; 3784 } 3785 3786 /* 3787 * Find out if a logical device supports aborts by simply trying one. 3788 * Smart Array may claim not to support aborts on logical drives, but 3789 * if a MSA2000 * is connected, the drives on that will be presented 3790 * by the Smart Array as logical drives, and aborts may be sent to 3791 * those devices successfully. So the simplest way to find out is 3792 * to simply try an abort and see how the device responds. 3793 */ 3794 static int hpsa_device_supports_aborts(struct ctlr_info *h, 3795 unsigned char *scsi3addr) 3796 { 3797 struct CommandList *c; 3798 struct ErrorInfo *ei; 3799 int rc = 0; 3800 3801 u64 tag = (u64) -1; /* bogus tag */ 3802 3803 /* Assume that physical devices support aborts */ 3804 if (!is_logical_dev_addr_mode(scsi3addr)) 3805 return 1; 3806 3807 c = cmd_alloc(h); 3808 3809 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3810 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3811 DEFAULT_TIMEOUT); 3812 /* no unmap needed here because no data xfer. */ 3813 ei = c->err_info; 3814 switch (ei->CommandStatus) { 3815 case CMD_INVALID: 3816 rc = 0; 3817 break; 3818 case CMD_UNABORTABLE: 3819 case CMD_ABORT_FAILED: 3820 rc = 1; 3821 break; 3822 case CMD_TMF_STATUS: 3823 rc = hpsa_evaluate_tmf_status(h, c); 3824 break; 3825 default: 3826 rc = 0; 3827 break; 3828 } 3829 cmd_free(h, c); 3830 return rc; 3831 } 3832 3833 static int hpsa_update_device_info(struct ctlr_info *h, 3834 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3835 unsigned char *is_OBDR_device) 3836 { 3837 3838 #define OBDR_SIG_OFFSET 43 3839 #define OBDR_TAPE_SIG "$DR-10" 3840 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3841 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3842 3843 unsigned char *inq_buff; 3844 unsigned char *obdr_sig; 3845 int rc = 0; 3846 3847 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3848 if (!inq_buff) { 3849 rc = -ENOMEM; 3850 goto bail_out; 3851 } 3852 3853 /* Do an inquiry to the device to see what it is. */ 3854 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3855 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3856 /* Inquiry failed (msg printed already) */ 3857 dev_err(&h->pdev->dev, 3858 "hpsa_update_device_info: inquiry failed\n"); 3859 rc = -EIO; 3860 goto bail_out; 3861 } 3862 3863 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3864 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3865 3866 this_device->devtype = (inq_buff[0] & 0x1f); 3867 memcpy(this_device->scsi3addr, scsi3addr, 8); 3868 memcpy(this_device->vendor, &inq_buff[8], 3869 sizeof(this_device->vendor)); 3870 memcpy(this_device->model, &inq_buff[16], 3871 sizeof(this_device->model)); 3872 this_device->rev = inq_buff[2]; 3873 memset(this_device->device_id, 0, 3874 sizeof(this_device->device_id)); 3875 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3876 sizeof(this_device->device_id))) 3877 dev_err(&h->pdev->dev, 3878 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3879 h->ctlr, __func__, 3880 h->scsi_host->host_no, 3881 this_device->target, this_device->lun, 3882 scsi_device_type(this_device->devtype), 3883 this_device->model); 3884 3885 if ((this_device->devtype == TYPE_DISK || 3886 this_device->devtype == TYPE_ZBC) && 3887 is_logical_dev_addr_mode(scsi3addr)) { 3888 int volume_offline; 3889 3890 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3891 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3892 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3893 volume_offline = hpsa_volume_offline(h, scsi3addr); 3894 if (volume_offline < 0 || volume_offline > 0xff) 3895 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 3896 this_device->volume_offline = volume_offline & 0xff; 3897 } else { 3898 this_device->raid_level = RAID_UNKNOWN; 3899 this_device->offload_config = 0; 3900 this_device->offload_enabled = 0; 3901 this_device->offload_to_be_enabled = 0; 3902 this_device->hba_ioaccel_enabled = 0; 3903 this_device->volume_offline = 0; 3904 this_device->queue_depth = h->nr_cmds; 3905 } 3906 3907 if (is_OBDR_device) { 3908 /* See if this is a One-Button-Disaster-Recovery device 3909 * by looking for "$DR-10" at offset 43 in inquiry data. 3910 */ 3911 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3912 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3913 strncmp(obdr_sig, OBDR_TAPE_SIG, 3914 OBDR_SIG_LEN) == 0); 3915 } 3916 kfree(inq_buff); 3917 return 0; 3918 3919 bail_out: 3920 kfree(inq_buff); 3921 return rc; 3922 } 3923 3924 static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 3925 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 3926 { 3927 unsigned long flags; 3928 int rc, entry; 3929 /* 3930 * See if this device supports aborts. If we already know 3931 * the device, we already know if it supports aborts, otherwise 3932 * we have to find out if it supports aborts by trying one. 3933 */ 3934 spin_lock_irqsave(&h->devlock, flags); 3935 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 3936 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 3937 entry >= 0 && entry < h->ndevices) { 3938 dev->supports_aborts = h->dev[entry]->supports_aborts; 3939 spin_unlock_irqrestore(&h->devlock, flags); 3940 } else { 3941 spin_unlock_irqrestore(&h->devlock, flags); 3942 dev->supports_aborts = 3943 hpsa_device_supports_aborts(h, scsi3addr); 3944 if (dev->supports_aborts < 0) 3945 dev->supports_aborts = 0; 3946 } 3947 } 3948 3949 /* 3950 * Helper function to assign bus, target, lun mapping of devices. 3951 * Logical drive target and lun are assigned at this time, but 3952 * physical device lun and target assignment are deferred (assigned 3953 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3954 */ 3955 static void figure_bus_target_lun(struct ctlr_info *h, 3956 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3957 { 3958 u32 lunid = get_unaligned_le32(lunaddrbytes); 3959 3960 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3961 /* physical device, target and lun filled in later */ 3962 if (is_hba_lunid(lunaddrbytes)) { 3963 int bus = HPSA_HBA_BUS; 3964 3965 if (!device->rev) 3966 bus = HPSA_LEGACY_HBA_BUS; 3967 hpsa_set_bus_target_lun(device, 3968 bus, 0, lunid & 0x3fff); 3969 } else 3970 /* defer target, lun assignment for physical devices */ 3971 hpsa_set_bus_target_lun(device, 3972 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3973 return; 3974 } 3975 /* It's a logical device */ 3976 if (device->external) { 3977 hpsa_set_bus_target_lun(device, 3978 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3979 lunid & 0x00ff); 3980 return; 3981 } 3982 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3983 0, lunid & 0x3fff); 3984 } 3985 3986 3987 /* 3988 * Get address of physical disk used for an ioaccel2 mode command: 3989 * 1. Extract ioaccel2 handle from the command. 3990 * 2. Find a matching ioaccel2 handle from list of physical disks. 3991 * 3. Return: 3992 * 1 and set scsi3addr to address of matching physical 3993 * 0 if no matching physical disk was found. 3994 */ 3995 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 3996 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 3997 { 3998 struct io_accel2_cmd *c2 = 3999 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 4000 unsigned long flags; 4001 int i; 4002 4003 spin_lock_irqsave(&h->devlock, flags); 4004 for (i = 0; i < h->ndevices; i++) 4005 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 4006 memcpy(scsi3addr, h->dev[i]->scsi3addr, 4007 sizeof(h->dev[i]->scsi3addr)); 4008 spin_unlock_irqrestore(&h->devlock, flags); 4009 return 1; 4010 } 4011 spin_unlock_irqrestore(&h->devlock, flags); 4012 return 0; 4013 } 4014 4015 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4016 int i, int nphysicals, int nlocal_logicals) 4017 { 4018 /* In report logicals, local logicals are listed first, 4019 * then any externals. 4020 */ 4021 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4022 4023 if (i == raid_ctlr_position) 4024 return 0; 4025 4026 if (i < logicals_start) 4027 return 0; 4028 4029 /* i is in logicals range, but still within local logicals */ 4030 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4031 return 0; 4032 4033 return 1; /* it's an external lun */ 4034 } 4035 4036 /* 4037 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4038 * logdev. The number of luns in physdev and logdev are returned in 4039 * *nphysicals and *nlogicals, respectively. 4040 * Returns 0 on success, -1 otherwise. 4041 */ 4042 static int hpsa_gather_lun_info(struct ctlr_info *h, 4043 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4044 struct ReportLUNdata *logdev, u32 *nlogicals) 4045 { 4046 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4047 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4048 return -1; 4049 } 4050 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4051 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4052 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4053 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4054 *nphysicals = HPSA_MAX_PHYS_LUN; 4055 } 4056 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4057 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4058 return -1; 4059 } 4060 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4061 /* Reject Logicals in excess of our max capability. */ 4062 if (*nlogicals > HPSA_MAX_LUN) { 4063 dev_warn(&h->pdev->dev, 4064 "maximum logical LUNs (%d) exceeded. " 4065 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4066 *nlogicals - HPSA_MAX_LUN); 4067 *nlogicals = HPSA_MAX_LUN; 4068 } 4069 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4070 dev_warn(&h->pdev->dev, 4071 "maximum logical + physical LUNs (%d) exceeded. " 4072 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4073 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4074 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4075 } 4076 return 0; 4077 } 4078 4079 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4080 int i, int nphysicals, int nlogicals, 4081 struct ReportExtendedLUNdata *physdev_list, 4082 struct ReportLUNdata *logdev_list) 4083 { 4084 /* Helper function, figure out where the LUN ID info is coming from 4085 * given index i, lists of physical and logical devices, where in 4086 * the list the raid controller is supposed to appear (first or last) 4087 */ 4088 4089 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4090 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4091 4092 if (i == raid_ctlr_position) 4093 return RAID_CTLR_LUNID; 4094 4095 if (i < logicals_start) 4096 return &physdev_list->LUN[i - 4097 (raid_ctlr_position == 0)].lunid[0]; 4098 4099 if (i < last_device) 4100 return &logdev_list->LUN[i - nphysicals - 4101 (raid_ctlr_position == 0)][0]; 4102 BUG(); 4103 return NULL; 4104 } 4105 4106 /* get physical drive ioaccel handle and queue depth */ 4107 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4108 struct hpsa_scsi_dev_t *dev, 4109 struct ReportExtendedLUNdata *rlep, int rle_index, 4110 struct bmic_identify_physical_device *id_phys) 4111 { 4112 int rc; 4113 struct ext_report_lun_entry *rle; 4114 4115 /* 4116 * external targets don't support BMIC 4117 */ 4118 if (dev->external) { 4119 dev->queue_depth = 7; 4120 return; 4121 } 4122 4123 rle = &rlep->LUN[rle_index]; 4124 4125 dev->ioaccel_handle = rle->ioaccel_handle; 4126 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4127 dev->hba_ioaccel_enabled = 1; 4128 memset(id_phys, 0, sizeof(*id_phys)); 4129 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4130 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4131 sizeof(*id_phys)); 4132 if (!rc) 4133 /* Reserve space for FW operations */ 4134 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4135 #define DRIVE_QUEUE_DEPTH 7 4136 dev->queue_depth = 4137 le16_to_cpu(id_phys->current_queue_depth_limit) - 4138 DRIVE_CMDS_RESERVED_FOR_FW; 4139 else 4140 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4141 } 4142 4143 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4144 struct ReportExtendedLUNdata *rlep, int rle_index, 4145 struct bmic_identify_physical_device *id_phys) 4146 { 4147 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4148 4149 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4150 this_device->hba_ioaccel_enabled = 1; 4151 4152 memcpy(&this_device->active_path_index, 4153 &id_phys->active_path_number, 4154 sizeof(this_device->active_path_index)); 4155 memcpy(&this_device->path_map, 4156 &id_phys->redundant_path_present_map, 4157 sizeof(this_device->path_map)); 4158 memcpy(&this_device->box, 4159 &id_phys->alternate_paths_phys_box_on_port, 4160 sizeof(this_device->box)); 4161 memcpy(&this_device->phys_connector, 4162 &id_phys->alternate_paths_phys_connector, 4163 sizeof(this_device->phys_connector)); 4164 memcpy(&this_device->bay, 4165 &id_phys->phys_bay_in_box, 4166 sizeof(this_device->bay)); 4167 } 4168 4169 /* get number of local logical disks. */ 4170 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4171 struct bmic_identify_controller *id_ctlr, 4172 u32 *nlocals) 4173 { 4174 int rc; 4175 4176 if (!id_ctlr) { 4177 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4178 __func__); 4179 return -ENOMEM; 4180 } 4181 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4182 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4183 if (!rc) 4184 if (id_ctlr->configured_logical_drive_count < 256) 4185 *nlocals = id_ctlr->configured_logical_drive_count; 4186 else 4187 *nlocals = le16_to_cpu( 4188 id_ctlr->extended_logical_unit_count); 4189 else 4190 *nlocals = -1; 4191 return rc; 4192 } 4193 4194 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4195 { 4196 struct bmic_identify_physical_device *id_phys; 4197 bool is_spare = false; 4198 int rc; 4199 4200 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4201 if (!id_phys) 4202 return false; 4203 4204 rc = hpsa_bmic_id_physical_device(h, 4205 lunaddrbytes, 4206 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4207 id_phys, sizeof(*id_phys)); 4208 if (rc == 0) 4209 is_spare = (id_phys->more_flags >> 6) & 0x01; 4210 4211 kfree(id_phys); 4212 return is_spare; 4213 } 4214 4215 #define RPL_DEV_FLAG_NON_DISK 0x1 4216 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4217 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4218 4219 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4220 4221 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4222 struct ext_report_lun_entry *rle) 4223 { 4224 u8 device_flags; 4225 u8 device_type; 4226 4227 if (!MASKED_DEVICE(lunaddrbytes)) 4228 return false; 4229 4230 device_flags = rle->device_flags; 4231 device_type = rle->device_type; 4232 4233 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4234 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4235 return false; 4236 return true; 4237 } 4238 4239 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4240 return false; 4241 4242 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4243 return false; 4244 4245 /* 4246 * Spares may be spun down, we do not want to 4247 * do an Inquiry to a RAID set spare drive as 4248 * that would have them spun up, that is a 4249 * performance hit because I/O to the RAID device 4250 * stops while the spin up occurs which can take 4251 * over 50 seconds. 4252 */ 4253 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4254 return true; 4255 4256 return false; 4257 } 4258 4259 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4260 { 4261 /* the idea here is we could get notified 4262 * that some devices have changed, so we do a report 4263 * physical luns and report logical luns cmd, and adjust 4264 * our list of devices accordingly. 4265 * 4266 * The scsi3addr's of devices won't change so long as the 4267 * adapter is not reset. That means we can rescan and 4268 * tell which devices we already know about, vs. new 4269 * devices, vs. disappearing devices. 4270 */ 4271 struct ReportExtendedLUNdata *physdev_list = NULL; 4272 struct ReportLUNdata *logdev_list = NULL; 4273 struct bmic_identify_physical_device *id_phys = NULL; 4274 struct bmic_identify_controller *id_ctlr = NULL; 4275 u32 nphysicals = 0; 4276 u32 nlogicals = 0; 4277 u32 nlocal_logicals = 0; 4278 u32 ndev_allocated = 0; 4279 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4280 int ncurrent = 0; 4281 int i, n_ext_target_devs, ndevs_to_allocate; 4282 int raid_ctlr_position; 4283 bool physical_device; 4284 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4285 4286 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4287 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4288 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4289 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4290 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4291 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4292 4293 if (!currentsd || !physdev_list || !logdev_list || 4294 !tmpdevice || !id_phys || !id_ctlr) { 4295 dev_err(&h->pdev->dev, "out of memory\n"); 4296 goto out; 4297 } 4298 memset(lunzerobits, 0, sizeof(lunzerobits)); 4299 4300 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4301 4302 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4303 logdev_list, &nlogicals)) { 4304 h->drv_req_rescan = 1; 4305 goto out; 4306 } 4307 4308 /* Set number of local logicals (non PTRAID) */ 4309 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4310 dev_warn(&h->pdev->dev, 4311 "%s: Can't determine number of local logical devices.\n", 4312 __func__); 4313 } 4314 4315 /* We might see up to the maximum number of logical and physical disks 4316 * plus external target devices, and a device for the local RAID 4317 * controller. 4318 */ 4319 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4320 4321 /* Allocate the per device structures */ 4322 for (i = 0; i < ndevs_to_allocate; i++) { 4323 if (i >= HPSA_MAX_DEVICES) { 4324 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4325 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4326 ndevs_to_allocate - HPSA_MAX_DEVICES); 4327 break; 4328 } 4329 4330 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4331 if (!currentsd[i]) { 4332 h->drv_req_rescan = 1; 4333 goto out; 4334 } 4335 ndev_allocated++; 4336 } 4337 4338 if (is_scsi_rev_5(h)) 4339 raid_ctlr_position = 0; 4340 else 4341 raid_ctlr_position = nphysicals + nlogicals; 4342 4343 /* adjust our table of devices */ 4344 n_ext_target_devs = 0; 4345 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4346 u8 *lunaddrbytes, is_OBDR = 0; 4347 int rc = 0; 4348 int phys_dev_index = i - (raid_ctlr_position == 0); 4349 bool skip_device = false; 4350 4351 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4352 4353 /* Figure out where the LUN ID info is coming from */ 4354 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4355 i, nphysicals, nlogicals, physdev_list, logdev_list); 4356 4357 /* Determine if this is a lun from an external target array */ 4358 tmpdevice->external = 4359 figure_external_status(h, raid_ctlr_position, i, 4360 nphysicals, nlocal_logicals); 4361 4362 /* 4363 * Skip over some devices such as a spare. 4364 */ 4365 if (!tmpdevice->external && physical_device) { 4366 skip_device = hpsa_skip_device(h, lunaddrbytes, 4367 &physdev_list->LUN[phys_dev_index]); 4368 if (skip_device) 4369 continue; 4370 } 4371 4372 /* Get device type, vendor, model, device id */ 4373 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4374 &is_OBDR); 4375 if (rc == -ENOMEM) { 4376 dev_warn(&h->pdev->dev, 4377 "Out of memory, rescan deferred.\n"); 4378 h->drv_req_rescan = 1; 4379 goto out; 4380 } 4381 if (rc) { 4382 dev_warn(&h->pdev->dev, 4383 "Inquiry failed, skipping device.\n"); 4384 continue; 4385 } 4386 4387 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4388 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4389 this_device = currentsd[ncurrent]; 4390 4391 /* Turn on discovery_polling if there are ext target devices. 4392 * Event-based change notification is unreliable for those. 4393 */ 4394 if (!h->discovery_polling) { 4395 if (tmpdevice->external) { 4396 h->discovery_polling = 1; 4397 dev_info(&h->pdev->dev, 4398 "External target, activate discovery polling.\n"); 4399 } 4400 } 4401 4402 4403 *this_device = *tmpdevice; 4404 this_device->physical_device = physical_device; 4405 4406 /* 4407 * Expose all devices except for physical devices that 4408 * are masked. 4409 */ 4410 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4411 this_device->expose_device = 0; 4412 else 4413 this_device->expose_device = 1; 4414 4415 4416 /* 4417 * Get the SAS address for physical devices that are exposed. 4418 */ 4419 if (this_device->physical_device && this_device->expose_device) 4420 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4421 4422 switch (this_device->devtype) { 4423 case TYPE_ROM: 4424 /* We don't *really* support actual CD-ROM devices, 4425 * just "One Button Disaster Recovery" tape drive 4426 * which temporarily pretends to be a CD-ROM drive. 4427 * So we check that the device is really an OBDR tape 4428 * device by checking for "$DR-10" in bytes 43-48 of 4429 * the inquiry data. 4430 */ 4431 if (is_OBDR) 4432 ncurrent++; 4433 break; 4434 case TYPE_DISK: 4435 case TYPE_ZBC: 4436 if (this_device->physical_device) { 4437 /* The disk is in HBA mode. */ 4438 /* Never use RAID mapper in HBA mode. */ 4439 this_device->offload_enabled = 0; 4440 hpsa_get_ioaccel_drive_info(h, this_device, 4441 physdev_list, phys_dev_index, id_phys); 4442 hpsa_get_path_info(this_device, 4443 physdev_list, phys_dev_index, id_phys); 4444 } 4445 ncurrent++; 4446 break; 4447 case TYPE_TAPE: 4448 case TYPE_MEDIUM_CHANGER: 4449 ncurrent++; 4450 break; 4451 case TYPE_ENCLOSURE: 4452 if (!this_device->external) 4453 hpsa_get_enclosure_info(h, lunaddrbytes, 4454 physdev_list, phys_dev_index, 4455 this_device); 4456 ncurrent++; 4457 break; 4458 case TYPE_RAID: 4459 /* Only present the Smartarray HBA as a RAID controller. 4460 * If it's a RAID controller other than the HBA itself 4461 * (an external RAID controller, MSA500 or similar) 4462 * don't present it. 4463 */ 4464 if (!is_hba_lunid(lunaddrbytes)) 4465 break; 4466 ncurrent++; 4467 break; 4468 default: 4469 break; 4470 } 4471 if (ncurrent >= HPSA_MAX_DEVICES) 4472 break; 4473 } 4474 4475 if (h->sas_host == NULL) { 4476 int rc = 0; 4477 4478 rc = hpsa_add_sas_host(h); 4479 if (rc) { 4480 dev_warn(&h->pdev->dev, 4481 "Could not add sas host %d\n", rc); 4482 goto out; 4483 } 4484 } 4485 4486 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4487 out: 4488 kfree(tmpdevice); 4489 for (i = 0; i < ndev_allocated; i++) 4490 kfree(currentsd[i]); 4491 kfree(currentsd); 4492 kfree(physdev_list); 4493 kfree(logdev_list); 4494 kfree(id_ctlr); 4495 kfree(id_phys); 4496 } 4497 4498 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4499 struct scatterlist *sg) 4500 { 4501 u64 addr64 = (u64) sg_dma_address(sg); 4502 unsigned int len = sg_dma_len(sg); 4503 4504 desc->Addr = cpu_to_le64(addr64); 4505 desc->Len = cpu_to_le32(len); 4506 desc->Ext = 0; 4507 } 4508 4509 /* 4510 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4511 * dma mapping and fills in the scatter gather entries of the 4512 * hpsa command, cp. 4513 */ 4514 static int hpsa_scatter_gather(struct ctlr_info *h, 4515 struct CommandList *cp, 4516 struct scsi_cmnd *cmd) 4517 { 4518 struct scatterlist *sg; 4519 int use_sg, i, sg_limit, chained, last_sg; 4520 struct SGDescriptor *curr_sg; 4521 4522 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4523 4524 use_sg = scsi_dma_map(cmd); 4525 if (use_sg < 0) 4526 return use_sg; 4527 4528 if (!use_sg) 4529 goto sglist_finished; 4530 4531 /* 4532 * If the number of entries is greater than the max for a single list, 4533 * then we have a chained list; we will set up all but one entry in the 4534 * first list (the last entry is saved for link information); 4535 * otherwise, we don't have a chained list and we'll set up at each of 4536 * the entries in the one list. 4537 */ 4538 curr_sg = cp->SG; 4539 chained = use_sg > h->max_cmd_sg_entries; 4540 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4541 last_sg = scsi_sg_count(cmd) - 1; 4542 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4543 hpsa_set_sg_descriptor(curr_sg, sg); 4544 curr_sg++; 4545 } 4546 4547 if (chained) { 4548 /* 4549 * Continue with the chained list. Set curr_sg to the chained 4550 * list. Modify the limit to the total count less the entries 4551 * we've already set up. Resume the scan at the list entry 4552 * where the previous loop left off. 4553 */ 4554 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4555 sg_limit = use_sg - sg_limit; 4556 for_each_sg(sg, sg, sg_limit, i) { 4557 hpsa_set_sg_descriptor(curr_sg, sg); 4558 curr_sg++; 4559 } 4560 } 4561 4562 /* Back the pointer up to the last entry and mark it as "last". */ 4563 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4564 4565 if (use_sg + chained > h->maxSG) 4566 h->maxSG = use_sg + chained; 4567 4568 if (chained) { 4569 cp->Header.SGList = h->max_cmd_sg_entries; 4570 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4571 if (hpsa_map_sg_chain_block(h, cp)) { 4572 scsi_dma_unmap(cmd); 4573 return -1; 4574 } 4575 return 0; 4576 } 4577 4578 sglist_finished: 4579 4580 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4581 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4582 return 0; 4583 } 4584 4585 #define IO_ACCEL_INELIGIBLE (1) 4586 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4587 { 4588 int is_write = 0; 4589 u32 block; 4590 u32 block_cnt; 4591 4592 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4593 switch (cdb[0]) { 4594 case WRITE_6: 4595 case WRITE_12: 4596 is_write = 1; 4597 case READ_6: 4598 case READ_12: 4599 if (*cdb_len == 6) { 4600 block = (((cdb[1] & 0x1F) << 16) | 4601 (cdb[2] << 8) | 4602 cdb[3]); 4603 block_cnt = cdb[4]; 4604 if (block_cnt == 0) 4605 block_cnt = 256; 4606 } else { 4607 BUG_ON(*cdb_len != 12); 4608 block = get_unaligned_be32(&cdb[2]); 4609 block_cnt = get_unaligned_be32(&cdb[6]); 4610 } 4611 if (block_cnt > 0xffff) 4612 return IO_ACCEL_INELIGIBLE; 4613 4614 cdb[0] = is_write ? WRITE_10 : READ_10; 4615 cdb[1] = 0; 4616 cdb[2] = (u8) (block >> 24); 4617 cdb[3] = (u8) (block >> 16); 4618 cdb[4] = (u8) (block >> 8); 4619 cdb[5] = (u8) (block); 4620 cdb[6] = 0; 4621 cdb[7] = (u8) (block_cnt >> 8); 4622 cdb[8] = (u8) (block_cnt); 4623 cdb[9] = 0; 4624 *cdb_len = 10; 4625 break; 4626 } 4627 return 0; 4628 } 4629 4630 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4631 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4632 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4633 { 4634 struct scsi_cmnd *cmd = c->scsi_cmd; 4635 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4636 unsigned int len; 4637 unsigned int total_len = 0; 4638 struct scatterlist *sg; 4639 u64 addr64; 4640 int use_sg, i; 4641 struct SGDescriptor *curr_sg; 4642 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4643 4644 /* TODO: implement chaining support */ 4645 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4646 atomic_dec(&phys_disk->ioaccel_cmds_out); 4647 return IO_ACCEL_INELIGIBLE; 4648 } 4649 4650 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4651 4652 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4653 atomic_dec(&phys_disk->ioaccel_cmds_out); 4654 return IO_ACCEL_INELIGIBLE; 4655 } 4656 4657 c->cmd_type = CMD_IOACCEL1; 4658 4659 /* Adjust the DMA address to point to the accelerated command buffer */ 4660 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4661 (c->cmdindex * sizeof(*cp)); 4662 BUG_ON(c->busaddr & 0x0000007F); 4663 4664 use_sg = scsi_dma_map(cmd); 4665 if (use_sg < 0) { 4666 atomic_dec(&phys_disk->ioaccel_cmds_out); 4667 return use_sg; 4668 } 4669 4670 if (use_sg) { 4671 curr_sg = cp->SG; 4672 scsi_for_each_sg(cmd, sg, use_sg, i) { 4673 addr64 = (u64) sg_dma_address(sg); 4674 len = sg_dma_len(sg); 4675 total_len += len; 4676 curr_sg->Addr = cpu_to_le64(addr64); 4677 curr_sg->Len = cpu_to_le32(len); 4678 curr_sg->Ext = cpu_to_le32(0); 4679 curr_sg++; 4680 } 4681 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4682 4683 switch (cmd->sc_data_direction) { 4684 case DMA_TO_DEVICE: 4685 control |= IOACCEL1_CONTROL_DATA_OUT; 4686 break; 4687 case DMA_FROM_DEVICE: 4688 control |= IOACCEL1_CONTROL_DATA_IN; 4689 break; 4690 case DMA_NONE: 4691 control |= IOACCEL1_CONTROL_NODATAXFER; 4692 break; 4693 default: 4694 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4695 cmd->sc_data_direction); 4696 BUG(); 4697 break; 4698 } 4699 } else { 4700 control |= IOACCEL1_CONTROL_NODATAXFER; 4701 } 4702 4703 c->Header.SGList = use_sg; 4704 /* Fill out the command structure to submit */ 4705 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4706 cp->transfer_len = cpu_to_le32(total_len); 4707 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4708 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4709 cp->control = cpu_to_le32(control); 4710 memcpy(cp->CDB, cdb, cdb_len); 4711 memcpy(cp->CISS_LUN, scsi3addr, 8); 4712 /* Tag was already set at init time. */ 4713 enqueue_cmd_and_start_io(h, c); 4714 return 0; 4715 } 4716 4717 /* 4718 * Queue a command directly to a device behind the controller using the 4719 * I/O accelerator path. 4720 */ 4721 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4722 struct CommandList *c) 4723 { 4724 struct scsi_cmnd *cmd = c->scsi_cmd; 4725 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4726 4727 if (!dev) 4728 return -1; 4729 4730 c->phys_disk = dev; 4731 4732 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4733 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4734 } 4735 4736 /* 4737 * Set encryption parameters for the ioaccel2 request 4738 */ 4739 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4740 struct CommandList *c, struct io_accel2_cmd *cp) 4741 { 4742 struct scsi_cmnd *cmd = c->scsi_cmd; 4743 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4744 struct raid_map_data *map = &dev->raid_map; 4745 u64 first_block; 4746 4747 /* Are we doing encryption on this device */ 4748 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4749 return; 4750 /* Set the data encryption key index. */ 4751 cp->dekindex = map->dekindex; 4752 4753 /* Set the encryption enable flag, encoded into direction field. */ 4754 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4755 4756 /* Set encryption tweak values based on logical block address 4757 * If block size is 512, tweak value is LBA. 4758 * For other block sizes, tweak is (LBA * block size)/ 512) 4759 */ 4760 switch (cmd->cmnd[0]) { 4761 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4762 case READ_6: 4763 case WRITE_6: 4764 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4765 (cmd->cmnd[2] << 8) | 4766 cmd->cmnd[3]); 4767 break; 4768 case WRITE_10: 4769 case READ_10: 4770 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4771 case WRITE_12: 4772 case READ_12: 4773 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4774 break; 4775 case WRITE_16: 4776 case READ_16: 4777 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4778 break; 4779 default: 4780 dev_err(&h->pdev->dev, 4781 "ERROR: %s: size (0x%x) not supported for encryption\n", 4782 __func__, cmd->cmnd[0]); 4783 BUG(); 4784 break; 4785 } 4786 4787 if (le32_to_cpu(map->volume_blk_size) != 512) 4788 first_block = first_block * 4789 le32_to_cpu(map->volume_blk_size)/512; 4790 4791 cp->tweak_lower = cpu_to_le32(first_block); 4792 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4793 } 4794 4795 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4796 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4797 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4798 { 4799 struct scsi_cmnd *cmd = c->scsi_cmd; 4800 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4801 struct ioaccel2_sg_element *curr_sg; 4802 int use_sg, i; 4803 struct scatterlist *sg; 4804 u64 addr64; 4805 u32 len; 4806 u32 total_len = 0; 4807 4808 if (!cmd->device) 4809 return -1; 4810 4811 if (!cmd->device->hostdata) 4812 return -1; 4813 4814 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4815 4816 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4817 atomic_dec(&phys_disk->ioaccel_cmds_out); 4818 return IO_ACCEL_INELIGIBLE; 4819 } 4820 4821 c->cmd_type = CMD_IOACCEL2; 4822 /* Adjust the DMA address to point to the accelerated command buffer */ 4823 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4824 (c->cmdindex * sizeof(*cp)); 4825 BUG_ON(c->busaddr & 0x0000007F); 4826 4827 memset(cp, 0, sizeof(*cp)); 4828 cp->IU_type = IOACCEL2_IU_TYPE; 4829 4830 use_sg = scsi_dma_map(cmd); 4831 if (use_sg < 0) { 4832 atomic_dec(&phys_disk->ioaccel_cmds_out); 4833 return use_sg; 4834 } 4835 4836 if (use_sg) { 4837 curr_sg = cp->sg; 4838 if (use_sg > h->ioaccel_maxsg) { 4839 addr64 = le64_to_cpu( 4840 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4841 curr_sg->address = cpu_to_le64(addr64); 4842 curr_sg->length = 0; 4843 curr_sg->reserved[0] = 0; 4844 curr_sg->reserved[1] = 0; 4845 curr_sg->reserved[2] = 0; 4846 curr_sg->chain_indicator = 0x80; 4847 4848 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4849 } 4850 scsi_for_each_sg(cmd, sg, use_sg, i) { 4851 addr64 = (u64) sg_dma_address(sg); 4852 len = sg_dma_len(sg); 4853 total_len += len; 4854 curr_sg->address = cpu_to_le64(addr64); 4855 curr_sg->length = cpu_to_le32(len); 4856 curr_sg->reserved[0] = 0; 4857 curr_sg->reserved[1] = 0; 4858 curr_sg->reserved[2] = 0; 4859 curr_sg->chain_indicator = 0; 4860 curr_sg++; 4861 } 4862 4863 switch (cmd->sc_data_direction) { 4864 case DMA_TO_DEVICE: 4865 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4866 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4867 break; 4868 case DMA_FROM_DEVICE: 4869 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4870 cp->direction |= IOACCEL2_DIR_DATA_IN; 4871 break; 4872 case DMA_NONE: 4873 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4874 cp->direction |= IOACCEL2_DIR_NO_DATA; 4875 break; 4876 default: 4877 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4878 cmd->sc_data_direction); 4879 BUG(); 4880 break; 4881 } 4882 } else { 4883 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4884 cp->direction |= IOACCEL2_DIR_NO_DATA; 4885 } 4886 4887 /* Set encryption parameters, if necessary */ 4888 set_encrypt_ioaccel2(h, c, cp); 4889 4890 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4891 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4892 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4893 4894 cp->data_len = cpu_to_le32(total_len); 4895 cp->err_ptr = cpu_to_le64(c->busaddr + 4896 offsetof(struct io_accel2_cmd, error_data)); 4897 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4898 4899 /* fill in sg elements */ 4900 if (use_sg > h->ioaccel_maxsg) { 4901 cp->sg_count = 1; 4902 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4903 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4904 atomic_dec(&phys_disk->ioaccel_cmds_out); 4905 scsi_dma_unmap(cmd); 4906 return -1; 4907 } 4908 } else 4909 cp->sg_count = (u8) use_sg; 4910 4911 enqueue_cmd_and_start_io(h, c); 4912 return 0; 4913 } 4914 4915 /* 4916 * Queue a command to the correct I/O accelerator path. 4917 */ 4918 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4919 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4920 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4921 { 4922 if (!c->scsi_cmd->device) 4923 return -1; 4924 4925 if (!c->scsi_cmd->device->hostdata) 4926 return -1; 4927 4928 /* Try to honor the device's queue depth */ 4929 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4930 phys_disk->queue_depth) { 4931 atomic_dec(&phys_disk->ioaccel_cmds_out); 4932 return IO_ACCEL_INELIGIBLE; 4933 } 4934 if (h->transMethod & CFGTBL_Trans_io_accel1) 4935 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4936 cdb, cdb_len, scsi3addr, 4937 phys_disk); 4938 else 4939 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4940 cdb, cdb_len, scsi3addr, 4941 phys_disk); 4942 } 4943 4944 static void raid_map_helper(struct raid_map_data *map, 4945 int offload_to_mirror, u32 *map_index, u32 *current_group) 4946 { 4947 if (offload_to_mirror == 0) { 4948 /* use physical disk in the first mirrored group. */ 4949 *map_index %= le16_to_cpu(map->data_disks_per_row); 4950 return; 4951 } 4952 do { 4953 /* determine mirror group that *map_index indicates */ 4954 *current_group = *map_index / 4955 le16_to_cpu(map->data_disks_per_row); 4956 if (offload_to_mirror == *current_group) 4957 continue; 4958 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4959 /* select map index from next group */ 4960 *map_index += le16_to_cpu(map->data_disks_per_row); 4961 (*current_group)++; 4962 } else { 4963 /* select map index from first group */ 4964 *map_index %= le16_to_cpu(map->data_disks_per_row); 4965 *current_group = 0; 4966 } 4967 } while (offload_to_mirror != *current_group); 4968 } 4969 4970 /* 4971 * Attempt to perform offload RAID mapping for a logical volume I/O. 4972 */ 4973 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4974 struct CommandList *c) 4975 { 4976 struct scsi_cmnd *cmd = c->scsi_cmd; 4977 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4978 struct raid_map_data *map = &dev->raid_map; 4979 struct raid_map_disk_data *dd = &map->data[0]; 4980 int is_write = 0; 4981 u32 map_index; 4982 u64 first_block, last_block; 4983 u32 block_cnt; 4984 u32 blocks_per_row; 4985 u64 first_row, last_row; 4986 u32 first_row_offset, last_row_offset; 4987 u32 first_column, last_column; 4988 u64 r0_first_row, r0_last_row; 4989 u32 r5or6_blocks_per_row; 4990 u64 r5or6_first_row, r5or6_last_row; 4991 u32 r5or6_first_row_offset, r5or6_last_row_offset; 4992 u32 r5or6_first_column, r5or6_last_column; 4993 u32 total_disks_per_row; 4994 u32 stripesize; 4995 u32 first_group, last_group, current_group; 4996 u32 map_row; 4997 u32 disk_handle; 4998 u64 disk_block; 4999 u32 disk_block_cnt; 5000 u8 cdb[16]; 5001 u8 cdb_len; 5002 u16 strip_size; 5003 #if BITS_PER_LONG == 32 5004 u64 tmpdiv; 5005 #endif 5006 int offload_to_mirror; 5007 5008 if (!dev) 5009 return -1; 5010 5011 /* check for valid opcode, get LBA and block count */ 5012 switch (cmd->cmnd[0]) { 5013 case WRITE_6: 5014 is_write = 1; 5015 case READ_6: 5016 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5017 (cmd->cmnd[2] << 8) | 5018 cmd->cmnd[3]); 5019 block_cnt = cmd->cmnd[4]; 5020 if (block_cnt == 0) 5021 block_cnt = 256; 5022 break; 5023 case WRITE_10: 5024 is_write = 1; 5025 case READ_10: 5026 first_block = 5027 (((u64) cmd->cmnd[2]) << 24) | 5028 (((u64) cmd->cmnd[3]) << 16) | 5029 (((u64) cmd->cmnd[4]) << 8) | 5030 cmd->cmnd[5]; 5031 block_cnt = 5032 (((u32) cmd->cmnd[7]) << 8) | 5033 cmd->cmnd[8]; 5034 break; 5035 case WRITE_12: 5036 is_write = 1; 5037 case READ_12: 5038 first_block = 5039 (((u64) cmd->cmnd[2]) << 24) | 5040 (((u64) cmd->cmnd[3]) << 16) | 5041 (((u64) cmd->cmnd[4]) << 8) | 5042 cmd->cmnd[5]; 5043 block_cnt = 5044 (((u32) cmd->cmnd[6]) << 24) | 5045 (((u32) cmd->cmnd[7]) << 16) | 5046 (((u32) cmd->cmnd[8]) << 8) | 5047 cmd->cmnd[9]; 5048 break; 5049 case WRITE_16: 5050 is_write = 1; 5051 case READ_16: 5052 first_block = 5053 (((u64) cmd->cmnd[2]) << 56) | 5054 (((u64) cmd->cmnd[3]) << 48) | 5055 (((u64) cmd->cmnd[4]) << 40) | 5056 (((u64) cmd->cmnd[5]) << 32) | 5057 (((u64) cmd->cmnd[6]) << 24) | 5058 (((u64) cmd->cmnd[7]) << 16) | 5059 (((u64) cmd->cmnd[8]) << 8) | 5060 cmd->cmnd[9]; 5061 block_cnt = 5062 (((u32) cmd->cmnd[10]) << 24) | 5063 (((u32) cmd->cmnd[11]) << 16) | 5064 (((u32) cmd->cmnd[12]) << 8) | 5065 cmd->cmnd[13]; 5066 break; 5067 default: 5068 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5069 } 5070 last_block = first_block + block_cnt - 1; 5071 5072 /* check for write to non-RAID-0 */ 5073 if (is_write && dev->raid_level != 0) 5074 return IO_ACCEL_INELIGIBLE; 5075 5076 /* check for invalid block or wraparound */ 5077 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5078 last_block < first_block) 5079 return IO_ACCEL_INELIGIBLE; 5080 5081 /* calculate stripe information for the request */ 5082 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5083 le16_to_cpu(map->strip_size); 5084 strip_size = le16_to_cpu(map->strip_size); 5085 #if BITS_PER_LONG == 32 5086 tmpdiv = first_block; 5087 (void) do_div(tmpdiv, blocks_per_row); 5088 first_row = tmpdiv; 5089 tmpdiv = last_block; 5090 (void) do_div(tmpdiv, blocks_per_row); 5091 last_row = tmpdiv; 5092 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5093 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5094 tmpdiv = first_row_offset; 5095 (void) do_div(tmpdiv, strip_size); 5096 first_column = tmpdiv; 5097 tmpdiv = last_row_offset; 5098 (void) do_div(tmpdiv, strip_size); 5099 last_column = tmpdiv; 5100 #else 5101 first_row = first_block / blocks_per_row; 5102 last_row = last_block / blocks_per_row; 5103 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5104 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5105 first_column = first_row_offset / strip_size; 5106 last_column = last_row_offset / strip_size; 5107 #endif 5108 5109 /* if this isn't a single row/column then give to the controller */ 5110 if ((first_row != last_row) || (first_column != last_column)) 5111 return IO_ACCEL_INELIGIBLE; 5112 5113 /* proceeding with driver mapping */ 5114 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5115 le16_to_cpu(map->metadata_disks_per_row); 5116 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5117 le16_to_cpu(map->row_cnt); 5118 map_index = (map_row * total_disks_per_row) + first_column; 5119 5120 switch (dev->raid_level) { 5121 case HPSA_RAID_0: 5122 break; /* nothing special to do */ 5123 case HPSA_RAID_1: 5124 /* Handles load balance across RAID 1 members. 5125 * (2-drive R1 and R10 with even # of drives.) 5126 * Appropriate for SSDs, not optimal for HDDs 5127 */ 5128 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5129 if (dev->offload_to_mirror) 5130 map_index += le16_to_cpu(map->data_disks_per_row); 5131 dev->offload_to_mirror = !dev->offload_to_mirror; 5132 break; 5133 case HPSA_RAID_ADM: 5134 /* Handles N-way mirrors (R1-ADM) 5135 * and R10 with # of drives divisible by 3.) 5136 */ 5137 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5138 5139 offload_to_mirror = dev->offload_to_mirror; 5140 raid_map_helper(map, offload_to_mirror, 5141 &map_index, ¤t_group); 5142 /* set mirror group to use next time */ 5143 offload_to_mirror = 5144 (offload_to_mirror >= 5145 le16_to_cpu(map->layout_map_count) - 1) 5146 ? 0 : offload_to_mirror + 1; 5147 dev->offload_to_mirror = offload_to_mirror; 5148 /* Avoid direct use of dev->offload_to_mirror within this 5149 * function since multiple threads might simultaneously 5150 * increment it beyond the range of dev->layout_map_count -1. 5151 */ 5152 break; 5153 case HPSA_RAID_5: 5154 case HPSA_RAID_6: 5155 if (le16_to_cpu(map->layout_map_count) <= 1) 5156 break; 5157 5158 /* Verify first and last block are in same RAID group */ 5159 r5or6_blocks_per_row = 5160 le16_to_cpu(map->strip_size) * 5161 le16_to_cpu(map->data_disks_per_row); 5162 BUG_ON(r5or6_blocks_per_row == 0); 5163 stripesize = r5or6_blocks_per_row * 5164 le16_to_cpu(map->layout_map_count); 5165 #if BITS_PER_LONG == 32 5166 tmpdiv = first_block; 5167 first_group = do_div(tmpdiv, stripesize); 5168 tmpdiv = first_group; 5169 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5170 first_group = tmpdiv; 5171 tmpdiv = last_block; 5172 last_group = do_div(tmpdiv, stripesize); 5173 tmpdiv = last_group; 5174 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5175 last_group = tmpdiv; 5176 #else 5177 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5178 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5179 #endif 5180 if (first_group != last_group) 5181 return IO_ACCEL_INELIGIBLE; 5182 5183 /* Verify request is in a single row of RAID 5/6 */ 5184 #if BITS_PER_LONG == 32 5185 tmpdiv = first_block; 5186 (void) do_div(tmpdiv, stripesize); 5187 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5188 tmpdiv = last_block; 5189 (void) do_div(tmpdiv, stripesize); 5190 r5or6_last_row = r0_last_row = tmpdiv; 5191 #else 5192 first_row = r5or6_first_row = r0_first_row = 5193 first_block / stripesize; 5194 r5or6_last_row = r0_last_row = last_block / stripesize; 5195 #endif 5196 if (r5or6_first_row != r5or6_last_row) 5197 return IO_ACCEL_INELIGIBLE; 5198 5199 5200 /* Verify request is in a single column */ 5201 #if BITS_PER_LONG == 32 5202 tmpdiv = first_block; 5203 first_row_offset = do_div(tmpdiv, stripesize); 5204 tmpdiv = first_row_offset; 5205 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5206 r5or6_first_row_offset = first_row_offset; 5207 tmpdiv = last_block; 5208 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5209 tmpdiv = r5or6_last_row_offset; 5210 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5211 tmpdiv = r5or6_first_row_offset; 5212 (void) do_div(tmpdiv, map->strip_size); 5213 first_column = r5or6_first_column = tmpdiv; 5214 tmpdiv = r5or6_last_row_offset; 5215 (void) do_div(tmpdiv, map->strip_size); 5216 r5or6_last_column = tmpdiv; 5217 #else 5218 first_row_offset = r5or6_first_row_offset = 5219 (u32)((first_block % stripesize) % 5220 r5or6_blocks_per_row); 5221 5222 r5or6_last_row_offset = 5223 (u32)((last_block % stripesize) % 5224 r5or6_blocks_per_row); 5225 5226 first_column = r5or6_first_column = 5227 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5228 r5or6_last_column = 5229 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5230 #endif 5231 if (r5or6_first_column != r5or6_last_column) 5232 return IO_ACCEL_INELIGIBLE; 5233 5234 /* Request is eligible */ 5235 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5236 le16_to_cpu(map->row_cnt); 5237 5238 map_index = (first_group * 5239 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5240 (map_row * total_disks_per_row) + first_column; 5241 break; 5242 default: 5243 return IO_ACCEL_INELIGIBLE; 5244 } 5245 5246 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5247 return IO_ACCEL_INELIGIBLE; 5248 5249 c->phys_disk = dev->phys_disk[map_index]; 5250 if (!c->phys_disk) 5251 return IO_ACCEL_INELIGIBLE; 5252 5253 disk_handle = dd[map_index].ioaccel_handle; 5254 disk_block = le64_to_cpu(map->disk_starting_blk) + 5255 first_row * le16_to_cpu(map->strip_size) + 5256 (first_row_offset - first_column * 5257 le16_to_cpu(map->strip_size)); 5258 disk_block_cnt = block_cnt; 5259 5260 /* handle differing logical/physical block sizes */ 5261 if (map->phys_blk_shift) { 5262 disk_block <<= map->phys_blk_shift; 5263 disk_block_cnt <<= map->phys_blk_shift; 5264 } 5265 BUG_ON(disk_block_cnt > 0xffff); 5266 5267 /* build the new CDB for the physical disk I/O */ 5268 if (disk_block > 0xffffffff) { 5269 cdb[0] = is_write ? WRITE_16 : READ_16; 5270 cdb[1] = 0; 5271 cdb[2] = (u8) (disk_block >> 56); 5272 cdb[3] = (u8) (disk_block >> 48); 5273 cdb[4] = (u8) (disk_block >> 40); 5274 cdb[5] = (u8) (disk_block >> 32); 5275 cdb[6] = (u8) (disk_block >> 24); 5276 cdb[7] = (u8) (disk_block >> 16); 5277 cdb[8] = (u8) (disk_block >> 8); 5278 cdb[9] = (u8) (disk_block); 5279 cdb[10] = (u8) (disk_block_cnt >> 24); 5280 cdb[11] = (u8) (disk_block_cnt >> 16); 5281 cdb[12] = (u8) (disk_block_cnt >> 8); 5282 cdb[13] = (u8) (disk_block_cnt); 5283 cdb[14] = 0; 5284 cdb[15] = 0; 5285 cdb_len = 16; 5286 } else { 5287 cdb[0] = is_write ? WRITE_10 : READ_10; 5288 cdb[1] = 0; 5289 cdb[2] = (u8) (disk_block >> 24); 5290 cdb[3] = (u8) (disk_block >> 16); 5291 cdb[4] = (u8) (disk_block >> 8); 5292 cdb[5] = (u8) (disk_block); 5293 cdb[6] = 0; 5294 cdb[7] = (u8) (disk_block_cnt >> 8); 5295 cdb[8] = (u8) (disk_block_cnt); 5296 cdb[9] = 0; 5297 cdb_len = 10; 5298 } 5299 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5300 dev->scsi3addr, 5301 dev->phys_disk[map_index]); 5302 } 5303 5304 /* 5305 * Submit commands down the "normal" RAID stack path 5306 * All callers to hpsa_ciss_submit must check lockup_detected 5307 * beforehand, before (opt.) and after calling cmd_alloc 5308 */ 5309 static int hpsa_ciss_submit(struct ctlr_info *h, 5310 struct CommandList *c, struct scsi_cmnd *cmd, 5311 unsigned char scsi3addr[]) 5312 { 5313 cmd->host_scribble = (unsigned char *) c; 5314 c->cmd_type = CMD_SCSI; 5315 c->scsi_cmd = cmd; 5316 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5317 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5318 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5319 5320 /* Fill in the request block... */ 5321 5322 c->Request.Timeout = 0; 5323 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5324 c->Request.CDBLen = cmd->cmd_len; 5325 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5326 switch (cmd->sc_data_direction) { 5327 case DMA_TO_DEVICE: 5328 c->Request.type_attr_dir = 5329 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5330 break; 5331 case DMA_FROM_DEVICE: 5332 c->Request.type_attr_dir = 5333 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5334 break; 5335 case DMA_NONE: 5336 c->Request.type_attr_dir = 5337 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5338 break; 5339 case DMA_BIDIRECTIONAL: 5340 /* This can happen if a buggy application does a scsi passthru 5341 * and sets both inlen and outlen to non-zero. ( see 5342 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5343 */ 5344 5345 c->Request.type_attr_dir = 5346 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5347 /* This is technically wrong, and hpsa controllers should 5348 * reject it with CMD_INVALID, which is the most correct 5349 * response, but non-fibre backends appear to let it 5350 * slide by, and give the same results as if this field 5351 * were set correctly. Either way is acceptable for 5352 * our purposes here. 5353 */ 5354 5355 break; 5356 5357 default: 5358 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5359 cmd->sc_data_direction); 5360 BUG(); 5361 break; 5362 } 5363 5364 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5365 hpsa_cmd_resolve_and_free(h, c); 5366 return SCSI_MLQUEUE_HOST_BUSY; 5367 } 5368 enqueue_cmd_and_start_io(h, c); 5369 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5370 return 0; 5371 } 5372 5373 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5374 struct CommandList *c) 5375 { 5376 dma_addr_t cmd_dma_handle, err_dma_handle; 5377 5378 /* Zero out all of commandlist except the last field, refcount */ 5379 memset(c, 0, offsetof(struct CommandList, refcount)); 5380 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5381 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5382 c->err_info = h->errinfo_pool + index; 5383 memset(c->err_info, 0, sizeof(*c->err_info)); 5384 err_dma_handle = h->errinfo_pool_dhandle 5385 + index * sizeof(*c->err_info); 5386 c->cmdindex = index; 5387 c->busaddr = (u32) cmd_dma_handle; 5388 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5389 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5390 c->h = h; 5391 c->scsi_cmd = SCSI_CMD_IDLE; 5392 } 5393 5394 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5395 { 5396 int i; 5397 5398 for (i = 0; i < h->nr_cmds; i++) { 5399 struct CommandList *c = h->cmd_pool + i; 5400 5401 hpsa_cmd_init(h, i, c); 5402 atomic_set(&c->refcount, 0); 5403 } 5404 } 5405 5406 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5407 struct CommandList *c) 5408 { 5409 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5410 5411 BUG_ON(c->cmdindex != index); 5412 5413 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5414 memset(c->err_info, 0, sizeof(*c->err_info)); 5415 c->busaddr = (u32) cmd_dma_handle; 5416 } 5417 5418 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5419 struct CommandList *c, struct scsi_cmnd *cmd, 5420 unsigned char *scsi3addr) 5421 { 5422 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5423 int rc = IO_ACCEL_INELIGIBLE; 5424 5425 if (!dev) 5426 return SCSI_MLQUEUE_HOST_BUSY; 5427 5428 cmd->host_scribble = (unsigned char *) c; 5429 5430 if (dev->offload_enabled) { 5431 hpsa_cmd_init(h, c->cmdindex, c); 5432 c->cmd_type = CMD_SCSI; 5433 c->scsi_cmd = cmd; 5434 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5435 if (rc < 0) /* scsi_dma_map failed. */ 5436 rc = SCSI_MLQUEUE_HOST_BUSY; 5437 } else if (dev->hba_ioaccel_enabled) { 5438 hpsa_cmd_init(h, c->cmdindex, c); 5439 c->cmd_type = CMD_SCSI; 5440 c->scsi_cmd = cmd; 5441 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5442 if (rc < 0) /* scsi_dma_map failed. */ 5443 rc = SCSI_MLQUEUE_HOST_BUSY; 5444 } 5445 return rc; 5446 } 5447 5448 static void hpsa_command_resubmit_worker(struct work_struct *work) 5449 { 5450 struct scsi_cmnd *cmd; 5451 struct hpsa_scsi_dev_t *dev; 5452 struct CommandList *c = container_of(work, struct CommandList, work); 5453 5454 cmd = c->scsi_cmd; 5455 dev = cmd->device->hostdata; 5456 if (!dev) { 5457 cmd->result = DID_NO_CONNECT << 16; 5458 return hpsa_cmd_free_and_done(c->h, c, cmd); 5459 } 5460 if (c->reset_pending) 5461 return hpsa_cmd_resolve_and_free(c->h, c); 5462 if (c->abort_pending) 5463 return hpsa_cmd_abort_and_free(c->h, c, cmd); 5464 if (c->cmd_type == CMD_IOACCEL2) { 5465 struct ctlr_info *h = c->h; 5466 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5467 int rc; 5468 5469 if (c2->error_data.serv_response == 5470 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5471 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5472 if (rc == 0) 5473 return; 5474 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5475 /* 5476 * If we get here, it means dma mapping failed. 5477 * Try again via scsi mid layer, which will 5478 * then get SCSI_MLQUEUE_HOST_BUSY. 5479 */ 5480 cmd->result = DID_IMM_RETRY << 16; 5481 return hpsa_cmd_free_and_done(h, c, cmd); 5482 } 5483 /* else, fall thru and resubmit down CISS path */ 5484 } 5485 } 5486 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5487 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5488 /* 5489 * If we get here, it means dma mapping failed. Try 5490 * again via scsi mid layer, which will then get 5491 * SCSI_MLQUEUE_HOST_BUSY. 5492 * 5493 * hpsa_ciss_submit will have already freed c 5494 * if it encountered a dma mapping failure. 5495 */ 5496 cmd->result = DID_IMM_RETRY << 16; 5497 cmd->scsi_done(cmd); 5498 } 5499 } 5500 5501 /* Running in struct Scsi_Host->host_lock less mode */ 5502 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5503 { 5504 struct ctlr_info *h; 5505 struct hpsa_scsi_dev_t *dev; 5506 unsigned char scsi3addr[8]; 5507 struct CommandList *c; 5508 int rc = 0; 5509 5510 /* Get the ptr to our adapter structure out of cmd->host. */ 5511 h = sdev_to_hba(cmd->device); 5512 5513 BUG_ON(cmd->request->tag < 0); 5514 5515 dev = cmd->device->hostdata; 5516 if (!dev) { 5517 cmd->result = DID_NO_CONNECT << 16; 5518 cmd->scsi_done(cmd); 5519 return 0; 5520 } 5521 5522 if (dev->removed) { 5523 cmd->result = DID_NO_CONNECT << 16; 5524 cmd->scsi_done(cmd); 5525 return 0; 5526 } 5527 5528 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5529 5530 if (unlikely(lockup_detected(h))) { 5531 cmd->result = DID_NO_CONNECT << 16; 5532 cmd->scsi_done(cmd); 5533 return 0; 5534 } 5535 c = cmd_tagged_alloc(h, cmd); 5536 5537 /* 5538 * Call alternate submit routine for I/O accelerated commands. 5539 * Retries always go down the normal I/O path. 5540 */ 5541 if (likely(cmd->retries == 0 && 5542 cmd->request->cmd_type == REQ_TYPE_FS && 5543 h->acciopath_status)) { 5544 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5545 if (rc == 0) 5546 return 0; 5547 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5548 hpsa_cmd_resolve_and_free(h, c); 5549 return SCSI_MLQUEUE_HOST_BUSY; 5550 } 5551 } 5552 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5553 } 5554 5555 static void hpsa_scan_complete(struct ctlr_info *h) 5556 { 5557 unsigned long flags; 5558 5559 spin_lock_irqsave(&h->scan_lock, flags); 5560 h->scan_finished = 1; 5561 wake_up_all(&h->scan_wait_queue); 5562 spin_unlock_irqrestore(&h->scan_lock, flags); 5563 } 5564 5565 static void hpsa_scan_start(struct Scsi_Host *sh) 5566 { 5567 struct ctlr_info *h = shost_to_hba(sh); 5568 unsigned long flags; 5569 5570 /* 5571 * Don't let rescans be initiated on a controller known to be locked 5572 * up. If the controller locks up *during* a rescan, that thread is 5573 * probably hosed, but at least we can prevent new rescan threads from 5574 * piling up on a locked up controller. 5575 */ 5576 if (unlikely(lockup_detected(h))) 5577 return hpsa_scan_complete(h); 5578 5579 /* wait until any scan already in progress is finished. */ 5580 while (1) { 5581 spin_lock_irqsave(&h->scan_lock, flags); 5582 if (h->scan_finished) 5583 break; 5584 spin_unlock_irqrestore(&h->scan_lock, flags); 5585 wait_event(h->scan_wait_queue, h->scan_finished); 5586 /* Note: We don't need to worry about a race between this 5587 * thread and driver unload because the midlayer will 5588 * have incremented the reference count, so unload won't 5589 * happen if we're in here. 5590 */ 5591 } 5592 h->scan_finished = 0; /* mark scan as in progress */ 5593 spin_unlock_irqrestore(&h->scan_lock, flags); 5594 5595 if (unlikely(lockup_detected(h))) 5596 return hpsa_scan_complete(h); 5597 5598 /* 5599 * Do the scan after a reset completion 5600 */ 5601 if (h->reset_in_progress) { 5602 h->drv_req_rescan = 1; 5603 return; 5604 } 5605 5606 hpsa_update_scsi_devices(h); 5607 5608 hpsa_scan_complete(h); 5609 } 5610 5611 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5612 { 5613 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5614 5615 if (!logical_drive) 5616 return -ENODEV; 5617 5618 if (qdepth < 1) 5619 qdepth = 1; 5620 else if (qdepth > logical_drive->queue_depth) 5621 qdepth = logical_drive->queue_depth; 5622 5623 return scsi_change_queue_depth(sdev, qdepth); 5624 } 5625 5626 static int hpsa_scan_finished(struct Scsi_Host *sh, 5627 unsigned long elapsed_time) 5628 { 5629 struct ctlr_info *h = shost_to_hba(sh); 5630 unsigned long flags; 5631 int finished; 5632 5633 spin_lock_irqsave(&h->scan_lock, flags); 5634 finished = h->scan_finished; 5635 spin_unlock_irqrestore(&h->scan_lock, flags); 5636 return finished; 5637 } 5638 5639 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5640 { 5641 struct Scsi_Host *sh; 5642 5643 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5644 if (sh == NULL) { 5645 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5646 return -ENOMEM; 5647 } 5648 5649 sh->io_port = 0; 5650 sh->n_io_port = 0; 5651 sh->this_id = -1; 5652 sh->max_channel = 3; 5653 sh->max_cmd_len = MAX_COMMAND_SIZE; 5654 sh->max_lun = HPSA_MAX_LUN; 5655 sh->max_id = HPSA_MAX_LUN; 5656 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5657 sh->cmd_per_lun = sh->can_queue; 5658 sh->sg_tablesize = h->maxsgentries; 5659 sh->transportt = hpsa_sas_transport_template; 5660 sh->hostdata[0] = (unsigned long) h; 5661 sh->irq = pci_irq_vector(h->pdev, 0); 5662 sh->unique_id = sh->irq; 5663 5664 h->scsi_host = sh; 5665 return 0; 5666 } 5667 5668 static int hpsa_scsi_add_host(struct ctlr_info *h) 5669 { 5670 int rv; 5671 5672 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5673 if (rv) { 5674 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5675 return rv; 5676 } 5677 scsi_scan_host(h->scsi_host); 5678 return 0; 5679 } 5680 5681 /* 5682 * The block layer has already gone to the trouble of picking out a unique, 5683 * small-integer tag for this request. We use an offset from that value as 5684 * an index to select our command block. (The offset allows us to reserve the 5685 * low-numbered entries for our own uses.) 5686 */ 5687 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5688 { 5689 int idx = scmd->request->tag; 5690 5691 if (idx < 0) 5692 return idx; 5693 5694 /* Offset to leave space for internal cmds. */ 5695 return idx += HPSA_NRESERVED_CMDS; 5696 } 5697 5698 /* 5699 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5700 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5701 */ 5702 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5703 struct CommandList *c, unsigned char lunaddr[], 5704 int reply_queue) 5705 { 5706 int rc; 5707 5708 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5709 (void) fill_cmd(c, TEST_UNIT_READY, h, 5710 NULL, 0, 0, lunaddr, TYPE_CMD); 5711 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5712 if (rc) 5713 return rc; 5714 /* no unmap needed here because no data xfer. */ 5715 5716 /* Check if the unit is already ready. */ 5717 if (c->err_info->CommandStatus == CMD_SUCCESS) 5718 return 0; 5719 5720 /* 5721 * The first command sent after reset will receive "unit attention" to 5722 * indicate that the LUN has been reset...this is actually what we're 5723 * looking for (but, success is good too). 5724 */ 5725 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5726 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5727 (c->err_info->SenseInfo[2] == NO_SENSE || 5728 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5729 return 0; 5730 5731 return 1; 5732 } 5733 5734 /* 5735 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5736 * returns zero when the unit is ready, and non-zero when giving up. 5737 */ 5738 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5739 struct CommandList *c, 5740 unsigned char lunaddr[], int reply_queue) 5741 { 5742 int rc; 5743 int count = 0; 5744 int waittime = 1; /* seconds */ 5745 5746 /* Send test unit ready until device ready, or give up. */ 5747 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5748 5749 /* 5750 * Wait for a bit. do this first, because if we send 5751 * the TUR right away, the reset will just abort it. 5752 */ 5753 msleep(1000 * waittime); 5754 5755 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5756 if (!rc) 5757 break; 5758 5759 /* Increase wait time with each try, up to a point. */ 5760 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5761 waittime *= 2; 5762 5763 dev_warn(&h->pdev->dev, 5764 "waiting %d secs for device to become ready.\n", 5765 waittime); 5766 } 5767 5768 return rc; 5769 } 5770 5771 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5772 unsigned char lunaddr[], 5773 int reply_queue) 5774 { 5775 int first_queue; 5776 int last_queue; 5777 int rq; 5778 int rc = 0; 5779 struct CommandList *c; 5780 5781 c = cmd_alloc(h); 5782 5783 /* 5784 * If no specific reply queue was requested, then send the TUR 5785 * repeatedly, requesting a reply on each reply queue; otherwise execute 5786 * the loop exactly once using only the specified queue. 5787 */ 5788 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5789 first_queue = 0; 5790 last_queue = h->nreply_queues - 1; 5791 } else { 5792 first_queue = reply_queue; 5793 last_queue = reply_queue; 5794 } 5795 5796 for (rq = first_queue; rq <= last_queue; rq++) { 5797 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5798 if (rc) 5799 break; 5800 } 5801 5802 if (rc) 5803 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5804 else 5805 dev_warn(&h->pdev->dev, "device is ready.\n"); 5806 5807 cmd_free(h, c); 5808 return rc; 5809 } 5810 5811 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5812 * complaining. Doing a host- or bus-reset can't do anything good here. 5813 */ 5814 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5815 { 5816 int rc; 5817 struct ctlr_info *h; 5818 struct hpsa_scsi_dev_t *dev; 5819 u8 reset_type; 5820 char msg[48]; 5821 5822 /* find the controller to which the command to be aborted was sent */ 5823 h = sdev_to_hba(scsicmd->device); 5824 if (h == NULL) /* paranoia */ 5825 return FAILED; 5826 5827 if (lockup_detected(h)) 5828 return FAILED; 5829 5830 dev = scsicmd->device->hostdata; 5831 if (!dev) { 5832 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5833 return FAILED; 5834 } 5835 5836 /* if controller locked up, we can guarantee command won't complete */ 5837 if (lockup_detected(h)) { 5838 snprintf(msg, sizeof(msg), 5839 "cmd %d RESET FAILED, lockup detected", 5840 hpsa_get_cmd_index(scsicmd)); 5841 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5842 return FAILED; 5843 } 5844 5845 /* this reset request might be the result of a lockup; check */ 5846 if (detect_controller_lockup(h)) { 5847 snprintf(msg, sizeof(msg), 5848 "cmd %d RESET FAILED, new lockup detected", 5849 hpsa_get_cmd_index(scsicmd)); 5850 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5851 return FAILED; 5852 } 5853 5854 /* Do not attempt on controller */ 5855 if (is_hba_lunid(dev->scsi3addr)) 5856 return SUCCESS; 5857 5858 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5859 reset_type = HPSA_DEVICE_RESET_MSG; 5860 else 5861 reset_type = HPSA_PHYS_TARGET_RESET; 5862 5863 sprintf(msg, "resetting %s", 5864 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5865 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5866 5867 h->reset_in_progress = 1; 5868 5869 /* send a reset to the SCSI LUN which the command was sent to */ 5870 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5871 DEFAULT_REPLY_QUEUE); 5872 sprintf(msg, "reset %s %s", 5873 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5874 rc == 0 ? "completed successfully" : "failed"); 5875 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5876 h->reset_in_progress = 0; 5877 return rc == 0 ? SUCCESS : FAILED; 5878 } 5879 5880 static void swizzle_abort_tag(u8 *tag) 5881 { 5882 u8 original_tag[8]; 5883 5884 memcpy(original_tag, tag, 8); 5885 tag[0] = original_tag[3]; 5886 tag[1] = original_tag[2]; 5887 tag[2] = original_tag[1]; 5888 tag[3] = original_tag[0]; 5889 tag[4] = original_tag[7]; 5890 tag[5] = original_tag[6]; 5891 tag[6] = original_tag[5]; 5892 tag[7] = original_tag[4]; 5893 } 5894 5895 static void hpsa_get_tag(struct ctlr_info *h, 5896 struct CommandList *c, __le32 *taglower, __le32 *tagupper) 5897 { 5898 u64 tag; 5899 if (c->cmd_type == CMD_IOACCEL1) { 5900 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 5901 &h->ioaccel_cmd_pool[c->cmdindex]; 5902 tag = le64_to_cpu(cm1->tag); 5903 *tagupper = cpu_to_le32(tag >> 32); 5904 *taglower = cpu_to_le32(tag); 5905 return; 5906 } 5907 if (c->cmd_type == CMD_IOACCEL2) { 5908 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 5909 &h->ioaccel2_cmd_pool[c->cmdindex]; 5910 /* upper tag not used in ioaccel2 mode */ 5911 memset(tagupper, 0, sizeof(*tagupper)); 5912 *taglower = cm2->Tag; 5913 return; 5914 } 5915 tag = le64_to_cpu(c->Header.tag); 5916 *tagupper = cpu_to_le32(tag >> 32); 5917 *taglower = cpu_to_le32(tag); 5918 } 5919 5920 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 5921 struct CommandList *abort, int reply_queue) 5922 { 5923 int rc = IO_OK; 5924 struct CommandList *c; 5925 struct ErrorInfo *ei; 5926 __le32 tagupper, taglower; 5927 5928 c = cmd_alloc(h); 5929 5930 /* fill_cmd can't fail here, no buffer to map */ 5931 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5932 0, 0, scsi3addr, TYPE_MSG); 5933 if (h->needs_abort_tags_swizzled) 5934 swizzle_abort_tag(&c->Request.CDB[4]); 5935 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5936 hpsa_get_tag(h, abort, &taglower, &tagupper); 5937 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 5938 __func__, tagupper, taglower); 5939 /* no unmap needed here because no data xfer. */ 5940 5941 ei = c->err_info; 5942 switch (ei->CommandStatus) { 5943 case CMD_SUCCESS: 5944 break; 5945 case CMD_TMF_STATUS: 5946 rc = hpsa_evaluate_tmf_status(h, c); 5947 break; 5948 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 5949 rc = -1; 5950 break; 5951 default: 5952 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 5953 __func__, tagupper, taglower); 5954 hpsa_scsi_interpret_error(h, c); 5955 rc = -1; 5956 break; 5957 } 5958 cmd_free(h, c); 5959 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5960 __func__, tagupper, taglower); 5961 return rc; 5962 } 5963 5964 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 5965 struct CommandList *command_to_abort, int reply_queue) 5966 { 5967 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5968 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 5969 struct io_accel2_cmd *c2a = 5970 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5971 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 5972 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 5973 5974 if (!dev) 5975 return; 5976 5977 /* 5978 * We're overlaying struct hpsa_tmf_struct on top of something which 5979 * was allocated as a struct io_accel2_cmd, so we better be sure it 5980 * actually fits, and doesn't overrun the error info space. 5981 */ 5982 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 5983 sizeof(struct io_accel2_cmd)); 5984 BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 5985 offsetof(struct hpsa_tmf_struct, error_len) + 5986 sizeof(ac->error_len)); 5987 5988 c->cmd_type = IOACCEL2_TMF; 5989 c->scsi_cmd = SCSI_CMD_BUSY; 5990 5991 /* Adjust the DMA address to point to the accelerated command buffer */ 5992 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 5993 (c->cmdindex * sizeof(struct io_accel2_cmd)); 5994 BUG_ON(c->busaddr & 0x0000007F); 5995 5996 memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 5997 ac->iu_type = IOACCEL2_IU_TMF_TYPE; 5998 ac->reply_queue = reply_queue; 5999 ac->tmf = IOACCEL2_TMF_ABORT; 6000 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 6001 memset(ac->lun_id, 0, sizeof(ac->lun_id)); 6002 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 6003 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 6004 ac->error_ptr = cpu_to_le64(c->busaddr + 6005 offsetof(struct io_accel2_cmd, error_data)); 6006 ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 6007 } 6008 6009 /* ioaccel2 path firmware cannot handle abort task requests. 6010 * Change abort requests to physical target reset, and send to the 6011 * address of the physical disk used for the ioaccel 2 command. 6012 * Return 0 on success (IO_OK) 6013 * -1 on failure 6014 */ 6015 6016 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 6017 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 6018 { 6019 int rc = IO_OK; 6020 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 6021 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 6022 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 6023 unsigned char *psa = &phys_scsi3addr[0]; 6024 6025 /* Get a pointer to the hpsa logical device. */ 6026 scmd = abort->scsi_cmd; 6027 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 6028 if (dev == NULL) { 6029 dev_warn(&h->pdev->dev, 6030 "Cannot abort: no device pointer for command.\n"); 6031 return -1; /* not abortable */ 6032 } 6033 6034 if (h->raid_offload_debug > 0) 6035 dev_info(&h->pdev->dev, 6036 "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 6037 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6038 "Reset as abort", scsi3addr); 6039 6040 if (!dev->offload_enabled) { 6041 dev_warn(&h->pdev->dev, 6042 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 6043 return -1; /* not abortable */ 6044 } 6045 6046 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 6047 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 6048 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 6049 return -1; /* not abortable */ 6050 } 6051 6052 /* send the reset */ 6053 if (h->raid_offload_debug > 0) 6054 dev_info(&h->pdev->dev, 6055 "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6056 psa); 6057 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 6058 if (rc != 0) { 6059 dev_warn(&h->pdev->dev, 6060 "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6061 psa); 6062 return rc; /* failed to reset */ 6063 } 6064 6065 /* wait for device to recover */ 6066 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 6067 dev_warn(&h->pdev->dev, 6068 "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6069 psa); 6070 return -1; /* failed to recover */ 6071 } 6072 6073 /* device recovered */ 6074 dev_info(&h->pdev->dev, 6075 "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6076 psa); 6077 6078 return rc; /* success */ 6079 } 6080 6081 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 6082 struct CommandList *abort, int reply_queue) 6083 { 6084 int rc = IO_OK; 6085 struct CommandList *c; 6086 __le32 taglower, tagupper; 6087 struct hpsa_scsi_dev_t *dev; 6088 struct io_accel2_cmd *c2; 6089 6090 dev = abort->scsi_cmd->device->hostdata; 6091 if (!dev) 6092 return -1; 6093 6094 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 6095 return -1; 6096 6097 c = cmd_alloc(h); 6098 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 6099 c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6100 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 6101 hpsa_get_tag(h, abort, &taglower, &tagupper); 6102 dev_dbg(&h->pdev->dev, 6103 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 6104 __func__, tagupper, taglower); 6105 /* no unmap needed here because no data xfer. */ 6106 6107 dev_dbg(&h->pdev->dev, 6108 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 6109 __func__, tagupper, taglower, c2->error_data.serv_response); 6110 switch (c2->error_data.serv_response) { 6111 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 6112 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 6113 rc = 0; 6114 break; 6115 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 6116 case IOACCEL2_SERV_RESPONSE_FAILURE: 6117 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 6118 rc = -1; 6119 break; 6120 default: 6121 dev_warn(&h->pdev->dev, 6122 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 6123 __func__, tagupper, taglower, 6124 c2->error_data.serv_response); 6125 rc = -1; 6126 } 6127 cmd_free(h, c); 6128 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 6129 tagupper, taglower); 6130 return rc; 6131 } 6132 6133 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 6134 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 6135 { 6136 /* 6137 * ioccelerator mode 2 commands should be aborted via the 6138 * accelerated path, since RAID path is unaware of these commands, 6139 * but not all underlying firmware can handle abort TMF. 6140 * Change abort to physical device reset when abort TMF is unsupported. 6141 */ 6142 if (abort->cmd_type == CMD_IOACCEL2) { 6143 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 6144 dev->physical_device) 6145 return hpsa_send_abort_ioaccel2(h, abort, 6146 reply_queue); 6147 else 6148 return hpsa_send_reset_as_abort_ioaccel2(h, 6149 dev->scsi3addr, 6150 abort, reply_queue); 6151 } 6152 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 6153 } 6154 6155 /* Find out which reply queue a command was meant to return on */ 6156 static int hpsa_extract_reply_queue(struct ctlr_info *h, 6157 struct CommandList *c) 6158 { 6159 if (c->cmd_type == CMD_IOACCEL2) 6160 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 6161 return c->Header.ReplyQueue; 6162 } 6163 6164 /* 6165 * Limit concurrency of abort commands to prevent 6166 * over-subscription of commands 6167 */ 6168 static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 6169 { 6170 #define ABORT_CMD_WAIT_MSECS 5000 6171 return !wait_event_timeout(h->abort_cmd_wait_queue, 6172 atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 6173 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 6174 } 6175 6176 /* Send an abort for the specified command. 6177 * If the device and controller support it, 6178 * send a task abort request. 6179 */ 6180 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 6181 { 6182 6183 int rc; 6184 struct ctlr_info *h; 6185 struct hpsa_scsi_dev_t *dev; 6186 struct CommandList *abort; /* pointer to command to be aborted */ 6187 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 6188 char msg[256]; /* For debug messaging. */ 6189 int ml = 0; 6190 __le32 tagupper, taglower; 6191 int refcount, reply_queue; 6192 6193 if (sc == NULL) 6194 return FAILED; 6195 6196 if (sc->device == NULL) 6197 return FAILED; 6198 6199 /* Find the controller of the command to be aborted */ 6200 h = sdev_to_hba(sc->device); 6201 if (h == NULL) 6202 return FAILED; 6203 6204 /* Find the device of the command to be aborted */ 6205 dev = sc->device->hostdata; 6206 if (!dev) { 6207 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 6208 msg); 6209 return FAILED; 6210 } 6211 6212 /* If controller locked up, we can guarantee command won't complete */ 6213 if (lockup_detected(h)) { 6214 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6215 "ABORT FAILED, lockup detected"); 6216 return FAILED; 6217 } 6218 6219 /* This is a good time to check if controller lockup has occurred */ 6220 if (detect_controller_lockup(h)) { 6221 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6222 "ABORT FAILED, new lockup detected"); 6223 return FAILED; 6224 } 6225 6226 /* Check that controller supports some kind of task abort */ 6227 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 6228 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6229 return FAILED; 6230 6231 memset(msg, 0, sizeof(msg)); 6232 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 6233 h->scsi_host->host_no, sc->device->channel, 6234 sc->device->id, sc->device->lun, 6235 "Aborting command", sc); 6236 6237 /* Get SCSI command to be aborted */ 6238 abort = (struct CommandList *) sc->host_scribble; 6239 if (abort == NULL) { 6240 /* This can happen if the command already completed. */ 6241 return SUCCESS; 6242 } 6243 refcount = atomic_inc_return(&abort->refcount); 6244 if (refcount == 1) { /* Command is done already. */ 6245 cmd_free(h, abort); 6246 return SUCCESS; 6247 } 6248 6249 /* Don't bother trying the abort if we know it won't work. */ 6250 if (abort->cmd_type != CMD_IOACCEL2 && 6251 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 6252 cmd_free(h, abort); 6253 return FAILED; 6254 } 6255 6256 /* 6257 * Check that we're aborting the right command. 6258 * It's possible the CommandList already completed and got re-used. 6259 */ 6260 if (abort->scsi_cmd != sc) { 6261 cmd_free(h, abort); 6262 return SUCCESS; 6263 } 6264 6265 abort->abort_pending = true; 6266 hpsa_get_tag(h, abort, &taglower, &tagupper); 6267 reply_queue = hpsa_extract_reply_queue(h, abort); 6268 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 6269 as = abort->scsi_cmd; 6270 if (as != NULL) 6271 ml += sprintf(msg+ml, 6272 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 6273 as->cmd_len, as->cmnd[0], as->cmnd[1], 6274 as->serial_number); 6275 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 6276 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 6277 6278 /* 6279 * Command is in flight, or possibly already completed 6280 * by the firmware (but not to the scsi mid layer) but we can't 6281 * distinguish which. Send the abort down. 6282 */ 6283 if (wait_for_available_abort_cmd(h)) { 6284 dev_warn(&h->pdev->dev, 6285 "%s FAILED, timeout waiting for an abort command to become available.\n", 6286 msg); 6287 cmd_free(h, abort); 6288 return FAILED; 6289 } 6290 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 6291 atomic_inc(&h->abort_cmds_available); 6292 wake_up_all(&h->abort_cmd_wait_queue); 6293 if (rc != 0) { 6294 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 6295 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6296 "FAILED to abort command"); 6297 cmd_free(h, abort); 6298 return FAILED; 6299 } 6300 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6301 wait_event(h->event_sync_wait_queue, 6302 abort->scsi_cmd != sc || lockup_detected(h)); 6303 cmd_free(h, abort); 6304 return !lockup_detected(h) ? SUCCESS : FAILED; 6305 } 6306 6307 /* 6308 * For operations with an associated SCSI command, a command block is allocated 6309 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6310 * block request tag as an index into a table of entries. cmd_tagged_free() is 6311 * the complement, although cmd_free() may be called instead. 6312 */ 6313 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6314 struct scsi_cmnd *scmd) 6315 { 6316 int idx = hpsa_get_cmd_index(scmd); 6317 struct CommandList *c = h->cmd_pool + idx; 6318 6319 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6320 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6321 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6322 /* The index value comes from the block layer, so if it's out of 6323 * bounds, it's probably not our bug. 6324 */ 6325 BUG(); 6326 } 6327 6328 atomic_inc(&c->refcount); 6329 if (unlikely(!hpsa_is_cmd_idle(c))) { 6330 /* 6331 * We expect that the SCSI layer will hand us a unique tag 6332 * value. Thus, there should never be a collision here between 6333 * two requests...because if the selected command isn't idle 6334 * then someone is going to be very disappointed. 6335 */ 6336 dev_err(&h->pdev->dev, 6337 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6338 idx); 6339 if (c->scsi_cmd != NULL) 6340 scsi_print_command(c->scsi_cmd); 6341 scsi_print_command(scmd); 6342 } 6343 6344 hpsa_cmd_partial_init(h, idx, c); 6345 return c; 6346 } 6347 6348 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6349 { 6350 /* 6351 * Release our reference to the block. We don't need to do anything 6352 * else to free it, because it is accessed by index. (There's no point 6353 * in checking the result of the decrement, since we cannot guarantee 6354 * that there isn't a concurrent abort which is also accessing it.) 6355 */ 6356 (void)atomic_dec(&c->refcount); 6357 } 6358 6359 /* 6360 * For operations that cannot sleep, a command block is allocated at init, 6361 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6362 * which ones are free or in use. Lock must be held when calling this. 6363 * cmd_free() is the complement. 6364 * This function never gives up and returns NULL. If it hangs, 6365 * another thread must call cmd_free() to free some tags. 6366 */ 6367 6368 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6369 { 6370 struct CommandList *c; 6371 int refcount, i; 6372 int offset = 0; 6373 6374 /* 6375 * There is some *extremely* small but non-zero chance that that 6376 * multiple threads could get in here, and one thread could 6377 * be scanning through the list of bits looking for a free 6378 * one, but the free ones are always behind him, and other 6379 * threads sneak in behind him and eat them before he can 6380 * get to them, so that while there is always a free one, a 6381 * very unlucky thread might be starved anyway, never able to 6382 * beat the other threads. In reality, this happens so 6383 * infrequently as to be indistinguishable from never. 6384 * 6385 * Note that we start allocating commands before the SCSI host structure 6386 * is initialized. Since the search starts at bit zero, this 6387 * all works, since we have at least one command structure available; 6388 * however, it means that the structures with the low indexes have to be 6389 * reserved for driver-initiated requests, while requests from the block 6390 * layer will use the higher indexes. 6391 */ 6392 6393 for (;;) { 6394 i = find_next_zero_bit(h->cmd_pool_bits, 6395 HPSA_NRESERVED_CMDS, 6396 offset); 6397 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6398 offset = 0; 6399 continue; 6400 } 6401 c = h->cmd_pool + i; 6402 refcount = atomic_inc_return(&c->refcount); 6403 if (unlikely(refcount > 1)) { 6404 cmd_free(h, c); /* already in use */ 6405 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6406 continue; 6407 } 6408 set_bit(i & (BITS_PER_LONG - 1), 6409 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6410 break; /* it's ours now. */ 6411 } 6412 hpsa_cmd_partial_init(h, i, c); 6413 return c; 6414 } 6415 6416 /* 6417 * This is the complementary operation to cmd_alloc(). Note, however, in some 6418 * corner cases it may also be used to free blocks allocated by 6419 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6420 * the clear-bit is harmless. 6421 */ 6422 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6423 { 6424 if (atomic_dec_and_test(&c->refcount)) { 6425 int i; 6426 6427 i = c - h->cmd_pool; 6428 clear_bit(i & (BITS_PER_LONG - 1), 6429 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6430 } 6431 } 6432 6433 #ifdef CONFIG_COMPAT 6434 6435 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6436 void __user *arg) 6437 { 6438 IOCTL32_Command_struct __user *arg32 = 6439 (IOCTL32_Command_struct __user *) arg; 6440 IOCTL_Command_struct arg64; 6441 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6442 int err; 6443 u32 cp; 6444 6445 memset(&arg64, 0, sizeof(arg64)); 6446 err = 0; 6447 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6448 sizeof(arg64.LUN_info)); 6449 err |= copy_from_user(&arg64.Request, &arg32->Request, 6450 sizeof(arg64.Request)); 6451 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6452 sizeof(arg64.error_info)); 6453 err |= get_user(arg64.buf_size, &arg32->buf_size); 6454 err |= get_user(cp, &arg32->buf); 6455 arg64.buf = compat_ptr(cp); 6456 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6457 6458 if (err) 6459 return -EFAULT; 6460 6461 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6462 if (err) 6463 return err; 6464 err |= copy_in_user(&arg32->error_info, &p->error_info, 6465 sizeof(arg32->error_info)); 6466 if (err) 6467 return -EFAULT; 6468 return err; 6469 } 6470 6471 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6472 int cmd, void __user *arg) 6473 { 6474 BIG_IOCTL32_Command_struct __user *arg32 = 6475 (BIG_IOCTL32_Command_struct __user *) arg; 6476 BIG_IOCTL_Command_struct arg64; 6477 BIG_IOCTL_Command_struct __user *p = 6478 compat_alloc_user_space(sizeof(arg64)); 6479 int err; 6480 u32 cp; 6481 6482 memset(&arg64, 0, sizeof(arg64)); 6483 err = 0; 6484 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6485 sizeof(arg64.LUN_info)); 6486 err |= copy_from_user(&arg64.Request, &arg32->Request, 6487 sizeof(arg64.Request)); 6488 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6489 sizeof(arg64.error_info)); 6490 err |= get_user(arg64.buf_size, &arg32->buf_size); 6491 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6492 err |= get_user(cp, &arg32->buf); 6493 arg64.buf = compat_ptr(cp); 6494 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6495 6496 if (err) 6497 return -EFAULT; 6498 6499 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6500 if (err) 6501 return err; 6502 err |= copy_in_user(&arg32->error_info, &p->error_info, 6503 sizeof(arg32->error_info)); 6504 if (err) 6505 return -EFAULT; 6506 return err; 6507 } 6508 6509 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6510 { 6511 switch (cmd) { 6512 case CCISS_GETPCIINFO: 6513 case CCISS_GETINTINFO: 6514 case CCISS_SETINTINFO: 6515 case CCISS_GETNODENAME: 6516 case CCISS_SETNODENAME: 6517 case CCISS_GETHEARTBEAT: 6518 case CCISS_GETBUSTYPES: 6519 case CCISS_GETFIRMVER: 6520 case CCISS_GETDRIVVER: 6521 case CCISS_REVALIDVOLS: 6522 case CCISS_DEREGDISK: 6523 case CCISS_REGNEWDISK: 6524 case CCISS_REGNEWD: 6525 case CCISS_RESCANDISK: 6526 case CCISS_GETLUNINFO: 6527 return hpsa_ioctl(dev, cmd, arg); 6528 6529 case CCISS_PASSTHRU32: 6530 return hpsa_ioctl32_passthru(dev, cmd, arg); 6531 case CCISS_BIG_PASSTHRU32: 6532 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6533 6534 default: 6535 return -ENOIOCTLCMD; 6536 } 6537 } 6538 #endif 6539 6540 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6541 { 6542 struct hpsa_pci_info pciinfo; 6543 6544 if (!argp) 6545 return -EINVAL; 6546 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6547 pciinfo.bus = h->pdev->bus->number; 6548 pciinfo.dev_fn = h->pdev->devfn; 6549 pciinfo.board_id = h->board_id; 6550 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6551 return -EFAULT; 6552 return 0; 6553 } 6554 6555 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6556 { 6557 DriverVer_type DriverVer; 6558 unsigned char vmaj, vmin, vsubmin; 6559 int rc; 6560 6561 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6562 &vmaj, &vmin, &vsubmin); 6563 if (rc != 3) { 6564 dev_info(&h->pdev->dev, "driver version string '%s' " 6565 "unrecognized.", HPSA_DRIVER_VERSION); 6566 vmaj = 0; 6567 vmin = 0; 6568 vsubmin = 0; 6569 } 6570 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6571 if (!argp) 6572 return -EINVAL; 6573 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6574 return -EFAULT; 6575 return 0; 6576 } 6577 6578 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6579 { 6580 IOCTL_Command_struct iocommand; 6581 struct CommandList *c; 6582 char *buff = NULL; 6583 u64 temp64; 6584 int rc = 0; 6585 6586 if (!argp) 6587 return -EINVAL; 6588 if (!capable(CAP_SYS_RAWIO)) 6589 return -EPERM; 6590 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6591 return -EFAULT; 6592 if ((iocommand.buf_size < 1) && 6593 (iocommand.Request.Type.Direction != XFER_NONE)) { 6594 return -EINVAL; 6595 } 6596 if (iocommand.buf_size > 0) { 6597 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6598 if (buff == NULL) 6599 return -ENOMEM; 6600 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6601 /* Copy the data into the buffer we created */ 6602 if (copy_from_user(buff, iocommand.buf, 6603 iocommand.buf_size)) { 6604 rc = -EFAULT; 6605 goto out_kfree; 6606 } 6607 } else { 6608 memset(buff, 0, iocommand.buf_size); 6609 } 6610 } 6611 c = cmd_alloc(h); 6612 6613 /* Fill in the command type */ 6614 c->cmd_type = CMD_IOCTL_PEND; 6615 c->scsi_cmd = SCSI_CMD_BUSY; 6616 /* Fill in Command Header */ 6617 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6618 if (iocommand.buf_size > 0) { /* buffer to fill */ 6619 c->Header.SGList = 1; 6620 c->Header.SGTotal = cpu_to_le16(1); 6621 } else { /* no buffers to fill */ 6622 c->Header.SGList = 0; 6623 c->Header.SGTotal = cpu_to_le16(0); 6624 } 6625 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6626 6627 /* Fill in Request block */ 6628 memcpy(&c->Request, &iocommand.Request, 6629 sizeof(c->Request)); 6630 6631 /* Fill in the scatter gather information */ 6632 if (iocommand.buf_size > 0) { 6633 temp64 = pci_map_single(h->pdev, buff, 6634 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6635 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6636 c->SG[0].Addr = cpu_to_le64(0); 6637 c->SG[0].Len = cpu_to_le32(0); 6638 rc = -ENOMEM; 6639 goto out; 6640 } 6641 c->SG[0].Addr = cpu_to_le64(temp64); 6642 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6643 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6644 } 6645 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6646 NO_TIMEOUT); 6647 if (iocommand.buf_size > 0) 6648 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6649 check_ioctl_unit_attention(h, c); 6650 if (rc) { 6651 rc = -EIO; 6652 goto out; 6653 } 6654 6655 /* Copy the error information out */ 6656 memcpy(&iocommand.error_info, c->err_info, 6657 sizeof(iocommand.error_info)); 6658 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6659 rc = -EFAULT; 6660 goto out; 6661 } 6662 if ((iocommand.Request.Type.Direction & XFER_READ) && 6663 iocommand.buf_size > 0) { 6664 /* Copy the data out of the buffer we created */ 6665 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6666 rc = -EFAULT; 6667 goto out; 6668 } 6669 } 6670 out: 6671 cmd_free(h, c); 6672 out_kfree: 6673 kfree(buff); 6674 return rc; 6675 } 6676 6677 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6678 { 6679 BIG_IOCTL_Command_struct *ioc; 6680 struct CommandList *c; 6681 unsigned char **buff = NULL; 6682 int *buff_size = NULL; 6683 u64 temp64; 6684 BYTE sg_used = 0; 6685 int status = 0; 6686 u32 left; 6687 u32 sz; 6688 BYTE __user *data_ptr; 6689 6690 if (!argp) 6691 return -EINVAL; 6692 if (!capable(CAP_SYS_RAWIO)) 6693 return -EPERM; 6694 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6695 if (!ioc) { 6696 status = -ENOMEM; 6697 goto cleanup1; 6698 } 6699 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6700 status = -EFAULT; 6701 goto cleanup1; 6702 } 6703 if ((ioc->buf_size < 1) && 6704 (ioc->Request.Type.Direction != XFER_NONE)) { 6705 status = -EINVAL; 6706 goto cleanup1; 6707 } 6708 /* Check kmalloc limits using all SGs */ 6709 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6710 status = -EINVAL; 6711 goto cleanup1; 6712 } 6713 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6714 status = -EINVAL; 6715 goto cleanup1; 6716 } 6717 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6718 if (!buff) { 6719 status = -ENOMEM; 6720 goto cleanup1; 6721 } 6722 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6723 if (!buff_size) { 6724 status = -ENOMEM; 6725 goto cleanup1; 6726 } 6727 left = ioc->buf_size; 6728 data_ptr = ioc->buf; 6729 while (left) { 6730 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6731 buff_size[sg_used] = sz; 6732 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6733 if (buff[sg_used] == NULL) { 6734 status = -ENOMEM; 6735 goto cleanup1; 6736 } 6737 if (ioc->Request.Type.Direction & XFER_WRITE) { 6738 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6739 status = -EFAULT; 6740 goto cleanup1; 6741 } 6742 } else 6743 memset(buff[sg_used], 0, sz); 6744 left -= sz; 6745 data_ptr += sz; 6746 sg_used++; 6747 } 6748 c = cmd_alloc(h); 6749 6750 c->cmd_type = CMD_IOCTL_PEND; 6751 c->scsi_cmd = SCSI_CMD_BUSY; 6752 c->Header.ReplyQueue = 0; 6753 c->Header.SGList = (u8) sg_used; 6754 c->Header.SGTotal = cpu_to_le16(sg_used); 6755 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6756 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6757 if (ioc->buf_size > 0) { 6758 int i; 6759 for (i = 0; i < sg_used; i++) { 6760 temp64 = pci_map_single(h->pdev, buff[i], 6761 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6762 if (dma_mapping_error(&h->pdev->dev, 6763 (dma_addr_t) temp64)) { 6764 c->SG[i].Addr = cpu_to_le64(0); 6765 c->SG[i].Len = cpu_to_le32(0); 6766 hpsa_pci_unmap(h->pdev, c, i, 6767 PCI_DMA_BIDIRECTIONAL); 6768 status = -ENOMEM; 6769 goto cleanup0; 6770 } 6771 c->SG[i].Addr = cpu_to_le64(temp64); 6772 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6773 c->SG[i].Ext = cpu_to_le32(0); 6774 } 6775 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6776 } 6777 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6778 NO_TIMEOUT); 6779 if (sg_used) 6780 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6781 check_ioctl_unit_attention(h, c); 6782 if (status) { 6783 status = -EIO; 6784 goto cleanup0; 6785 } 6786 6787 /* Copy the error information out */ 6788 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6789 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6790 status = -EFAULT; 6791 goto cleanup0; 6792 } 6793 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6794 int i; 6795 6796 /* Copy the data out of the buffer we created */ 6797 BYTE __user *ptr = ioc->buf; 6798 for (i = 0; i < sg_used; i++) { 6799 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6800 status = -EFAULT; 6801 goto cleanup0; 6802 } 6803 ptr += buff_size[i]; 6804 } 6805 } 6806 status = 0; 6807 cleanup0: 6808 cmd_free(h, c); 6809 cleanup1: 6810 if (buff) { 6811 int i; 6812 6813 for (i = 0; i < sg_used; i++) 6814 kfree(buff[i]); 6815 kfree(buff); 6816 } 6817 kfree(buff_size); 6818 kfree(ioc); 6819 return status; 6820 } 6821 6822 static void check_ioctl_unit_attention(struct ctlr_info *h, 6823 struct CommandList *c) 6824 { 6825 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6826 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6827 (void) check_for_unit_attention(h, c); 6828 } 6829 6830 /* 6831 * ioctl 6832 */ 6833 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6834 { 6835 struct ctlr_info *h; 6836 void __user *argp = (void __user *)arg; 6837 int rc; 6838 6839 h = sdev_to_hba(dev); 6840 6841 switch (cmd) { 6842 case CCISS_DEREGDISK: 6843 case CCISS_REGNEWDISK: 6844 case CCISS_REGNEWD: 6845 hpsa_scan_start(h->scsi_host); 6846 return 0; 6847 case CCISS_GETPCIINFO: 6848 return hpsa_getpciinfo_ioctl(h, argp); 6849 case CCISS_GETDRIVVER: 6850 return hpsa_getdrivver_ioctl(h, argp); 6851 case CCISS_PASSTHRU: 6852 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6853 return -EAGAIN; 6854 rc = hpsa_passthru_ioctl(h, argp); 6855 atomic_inc(&h->passthru_cmds_avail); 6856 return rc; 6857 case CCISS_BIG_PASSTHRU: 6858 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6859 return -EAGAIN; 6860 rc = hpsa_big_passthru_ioctl(h, argp); 6861 atomic_inc(&h->passthru_cmds_avail); 6862 return rc; 6863 default: 6864 return -ENOTTY; 6865 } 6866 } 6867 6868 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6869 u8 reset_type) 6870 { 6871 struct CommandList *c; 6872 6873 c = cmd_alloc(h); 6874 6875 /* fill_cmd can't fail here, no data buffer to map */ 6876 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6877 RAID_CTLR_LUNID, TYPE_MSG); 6878 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6879 c->waiting = NULL; 6880 enqueue_cmd_and_start_io(h, c); 6881 /* Don't wait for completion, the reset won't complete. Don't free 6882 * the command either. This is the last command we will send before 6883 * re-initializing everything, so it doesn't matter and won't leak. 6884 */ 6885 return; 6886 } 6887 6888 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6889 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6890 int cmd_type) 6891 { 6892 int pci_dir = XFER_NONE; 6893 u64 tag; /* for commands to be aborted */ 6894 6895 c->cmd_type = CMD_IOCTL_PEND; 6896 c->scsi_cmd = SCSI_CMD_BUSY; 6897 c->Header.ReplyQueue = 0; 6898 if (buff != NULL && size > 0) { 6899 c->Header.SGList = 1; 6900 c->Header.SGTotal = cpu_to_le16(1); 6901 } else { 6902 c->Header.SGList = 0; 6903 c->Header.SGTotal = cpu_to_le16(0); 6904 } 6905 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6906 6907 if (cmd_type == TYPE_CMD) { 6908 switch (cmd) { 6909 case HPSA_INQUIRY: 6910 /* are we trying to read a vital product page */ 6911 if (page_code & VPD_PAGE) { 6912 c->Request.CDB[1] = 0x01; 6913 c->Request.CDB[2] = (page_code & 0xff); 6914 } 6915 c->Request.CDBLen = 6; 6916 c->Request.type_attr_dir = 6917 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6918 c->Request.Timeout = 0; 6919 c->Request.CDB[0] = HPSA_INQUIRY; 6920 c->Request.CDB[4] = size & 0xFF; 6921 break; 6922 case HPSA_REPORT_LOG: 6923 case HPSA_REPORT_PHYS: 6924 /* Talking to controller so It's a physical command 6925 mode = 00 target = 0. Nothing to write. 6926 */ 6927 c->Request.CDBLen = 12; 6928 c->Request.type_attr_dir = 6929 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6930 c->Request.Timeout = 0; 6931 c->Request.CDB[0] = cmd; 6932 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6933 c->Request.CDB[7] = (size >> 16) & 0xFF; 6934 c->Request.CDB[8] = (size >> 8) & 0xFF; 6935 c->Request.CDB[9] = size & 0xFF; 6936 break; 6937 case BMIC_SENSE_DIAG_OPTIONS: 6938 c->Request.CDBLen = 16; 6939 c->Request.type_attr_dir = 6940 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6941 c->Request.Timeout = 0; 6942 /* Spec says this should be BMIC_WRITE */ 6943 c->Request.CDB[0] = BMIC_READ; 6944 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6945 break; 6946 case BMIC_SET_DIAG_OPTIONS: 6947 c->Request.CDBLen = 16; 6948 c->Request.type_attr_dir = 6949 TYPE_ATTR_DIR(cmd_type, 6950 ATTR_SIMPLE, XFER_WRITE); 6951 c->Request.Timeout = 0; 6952 c->Request.CDB[0] = BMIC_WRITE; 6953 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6954 break; 6955 case HPSA_CACHE_FLUSH: 6956 c->Request.CDBLen = 12; 6957 c->Request.type_attr_dir = 6958 TYPE_ATTR_DIR(cmd_type, 6959 ATTR_SIMPLE, XFER_WRITE); 6960 c->Request.Timeout = 0; 6961 c->Request.CDB[0] = BMIC_WRITE; 6962 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6963 c->Request.CDB[7] = (size >> 8) & 0xFF; 6964 c->Request.CDB[8] = size & 0xFF; 6965 break; 6966 case TEST_UNIT_READY: 6967 c->Request.CDBLen = 6; 6968 c->Request.type_attr_dir = 6969 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6970 c->Request.Timeout = 0; 6971 break; 6972 case HPSA_GET_RAID_MAP: 6973 c->Request.CDBLen = 12; 6974 c->Request.type_attr_dir = 6975 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6976 c->Request.Timeout = 0; 6977 c->Request.CDB[0] = HPSA_CISS_READ; 6978 c->Request.CDB[1] = cmd; 6979 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6980 c->Request.CDB[7] = (size >> 16) & 0xFF; 6981 c->Request.CDB[8] = (size >> 8) & 0xFF; 6982 c->Request.CDB[9] = size & 0xFF; 6983 break; 6984 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6985 c->Request.CDBLen = 10; 6986 c->Request.type_attr_dir = 6987 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6988 c->Request.Timeout = 0; 6989 c->Request.CDB[0] = BMIC_READ; 6990 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6991 c->Request.CDB[7] = (size >> 16) & 0xFF; 6992 c->Request.CDB[8] = (size >> 8) & 0xFF; 6993 break; 6994 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6995 c->Request.CDBLen = 10; 6996 c->Request.type_attr_dir = 6997 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6998 c->Request.Timeout = 0; 6999 c->Request.CDB[0] = BMIC_READ; 7000 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 7001 c->Request.CDB[7] = (size >> 16) & 0xFF; 7002 c->Request.CDB[8] = (size >> 8) & 0XFF; 7003 break; 7004 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7005 c->Request.CDBLen = 10; 7006 c->Request.type_attr_dir = 7007 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7008 c->Request.Timeout = 0; 7009 c->Request.CDB[0] = BMIC_READ; 7010 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7011 c->Request.CDB[7] = (size >> 16) & 0xFF; 7012 c->Request.CDB[8] = (size >> 8) & 0XFF; 7013 break; 7014 case BMIC_SENSE_STORAGE_BOX_PARAMS: 7015 c->Request.CDBLen = 10; 7016 c->Request.type_attr_dir = 7017 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7018 c->Request.Timeout = 0; 7019 c->Request.CDB[0] = BMIC_READ; 7020 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7021 c->Request.CDB[7] = (size >> 16) & 0xFF; 7022 c->Request.CDB[8] = (size >> 8) & 0XFF; 7023 break; 7024 case BMIC_IDENTIFY_CONTROLLER: 7025 c->Request.CDBLen = 10; 7026 c->Request.type_attr_dir = 7027 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7028 c->Request.Timeout = 0; 7029 c->Request.CDB[0] = BMIC_READ; 7030 c->Request.CDB[1] = 0; 7031 c->Request.CDB[2] = 0; 7032 c->Request.CDB[3] = 0; 7033 c->Request.CDB[4] = 0; 7034 c->Request.CDB[5] = 0; 7035 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 7036 c->Request.CDB[7] = (size >> 16) & 0xFF; 7037 c->Request.CDB[8] = (size >> 8) & 0XFF; 7038 c->Request.CDB[9] = 0; 7039 break; 7040 default: 7041 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7042 BUG(); 7043 return -1; 7044 } 7045 } else if (cmd_type == TYPE_MSG) { 7046 switch (cmd) { 7047 7048 case HPSA_PHYS_TARGET_RESET: 7049 c->Request.CDBLen = 16; 7050 c->Request.type_attr_dir = 7051 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7052 c->Request.Timeout = 0; /* Don't time out */ 7053 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7054 c->Request.CDB[0] = HPSA_RESET; 7055 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 7056 /* Physical target reset needs no control bytes 4-7*/ 7057 c->Request.CDB[4] = 0x00; 7058 c->Request.CDB[5] = 0x00; 7059 c->Request.CDB[6] = 0x00; 7060 c->Request.CDB[7] = 0x00; 7061 break; 7062 case HPSA_DEVICE_RESET_MSG: 7063 c->Request.CDBLen = 16; 7064 c->Request.type_attr_dir = 7065 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7066 c->Request.Timeout = 0; /* Don't time out */ 7067 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7068 c->Request.CDB[0] = cmd; 7069 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7070 /* If bytes 4-7 are zero, it means reset the */ 7071 /* LunID device */ 7072 c->Request.CDB[4] = 0x00; 7073 c->Request.CDB[5] = 0x00; 7074 c->Request.CDB[6] = 0x00; 7075 c->Request.CDB[7] = 0x00; 7076 break; 7077 case HPSA_ABORT_MSG: 7078 memcpy(&tag, buff, sizeof(tag)); 7079 dev_dbg(&h->pdev->dev, 7080 "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 7081 tag, c->Header.tag); 7082 c->Request.CDBLen = 16; 7083 c->Request.type_attr_dir = 7084 TYPE_ATTR_DIR(cmd_type, 7085 ATTR_SIMPLE, XFER_WRITE); 7086 c->Request.Timeout = 0; /* Don't time out */ 7087 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 7088 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 7089 c->Request.CDB[2] = 0x00; /* reserved */ 7090 c->Request.CDB[3] = 0x00; /* reserved */ 7091 /* Tag to abort goes in CDB[4]-CDB[11] */ 7092 memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 7093 c->Request.CDB[12] = 0x00; /* reserved */ 7094 c->Request.CDB[13] = 0x00; /* reserved */ 7095 c->Request.CDB[14] = 0x00; /* reserved */ 7096 c->Request.CDB[15] = 0x00; /* reserved */ 7097 break; 7098 default: 7099 dev_warn(&h->pdev->dev, "unknown message type %d\n", 7100 cmd); 7101 BUG(); 7102 } 7103 } else { 7104 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7105 BUG(); 7106 } 7107 7108 switch (GET_DIR(c->Request.type_attr_dir)) { 7109 case XFER_READ: 7110 pci_dir = PCI_DMA_FROMDEVICE; 7111 break; 7112 case XFER_WRITE: 7113 pci_dir = PCI_DMA_TODEVICE; 7114 break; 7115 case XFER_NONE: 7116 pci_dir = PCI_DMA_NONE; 7117 break; 7118 default: 7119 pci_dir = PCI_DMA_BIDIRECTIONAL; 7120 } 7121 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7122 return -1; 7123 return 0; 7124 } 7125 7126 /* 7127 * Map (physical) PCI mem into (virtual) kernel space 7128 */ 7129 static void __iomem *remap_pci_mem(ulong base, ulong size) 7130 { 7131 ulong page_base = ((ulong) base) & PAGE_MASK; 7132 ulong page_offs = ((ulong) base) - page_base; 7133 void __iomem *page_remapped = ioremap_nocache(page_base, 7134 page_offs + size); 7135 7136 return page_remapped ? (page_remapped + page_offs) : NULL; 7137 } 7138 7139 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7140 { 7141 return h->access.command_completed(h, q); 7142 } 7143 7144 static inline bool interrupt_pending(struct ctlr_info *h) 7145 { 7146 return h->access.intr_pending(h); 7147 } 7148 7149 static inline long interrupt_not_for_us(struct ctlr_info *h) 7150 { 7151 return (h->access.intr_pending(h) == 0) || 7152 (h->interrupts_enabled == 0); 7153 } 7154 7155 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 7156 u32 raw_tag) 7157 { 7158 if (unlikely(tag_index >= h->nr_cmds)) { 7159 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7160 return 1; 7161 } 7162 return 0; 7163 } 7164 7165 static inline void finish_cmd(struct CommandList *c) 7166 { 7167 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7168 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7169 || c->cmd_type == CMD_IOACCEL2)) 7170 complete_scsi_command(c); 7171 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7172 complete(c->waiting); 7173 } 7174 7175 /* process completion of an indexed ("direct lookup") command */ 7176 static inline void process_indexed_cmd(struct ctlr_info *h, 7177 u32 raw_tag) 7178 { 7179 u32 tag_index; 7180 struct CommandList *c; 7181 7182 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 7183 if (!bad_tag(h, tag_index, raw_tag)) { 7184 c = h->cmd_pool + tag_index; 7185 finish_cmd(c); 7186 } 7187 } 7188 7189 /* Some controllers, like p400, will give us one interrupt 7190 * after a soft reset, even if we turned interrupts off. 7191 * Only need to check for this in the hpsa_xxx_discard_completions 7192 * functions. 7193 */ 7194 static int ignore_bogus_interrupt(struct ctlr_info *h) 7195 { 7196 if (likely(!reset_devices)) 7197 return 0; 7198 7199 if (likely(h->interrupts_enabled)) 7200 return 0; 7201 7202 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 7203 "(known firmware bug.) Ignoring.\n"); 7204 7205 return 1; 7206 } 7207 7208 /* 7209 * Convert &h->q[x] (passed to interrupt handlers) back to h. 7210 * Relies on (h-q[x] == x) being true for x such that 7211 * 0 <= x < MAX_REPLY_QUEUES. 7212 */ 7213 static struct ctlr_info *queue_to_hba(u8 *queue) 7214 { 7215 return container_of((queue - *queue), struct ctlr_info, q[0]); 7216 } 7217 7218 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7219 { 7220 struct ctlr_info *h = queue_to_hba(queue); 7221 u8 q = *(u8 *) queue; 7222 u32 raw_tag; 7223 7224 if (ignore_bogus_interrupt(h)) 7225 return IRQ_NONE; 7226 7227 if (interrupt_not_for_us(h)) 7228 return IRQ_NONE; 7229 h->last_intr_timestamp = get_jiffies_64(); 7230 while (interrupt_pending(h)) { 7231 raw_tag = get_next_completion(h, q); 7232 while (raw_tag != FIFO_EMPTY) 7233 raw_tag = next_command(h, q); 7234 } 7235 return IRQ_HANDLED; 7236 } 7237 7238 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 7239 { 7240 struct ctlr_info *h = queue_to_hba(queue); 7241 u32 raw_tag; 7242 u8 q = *(u8 *) queue; 7243 7244 if (ignore_bogus_interrupt(h)) 7245 return IRQ_NONE; 7246 7247 h->last_intr_timestamp = get_jiffies_64(); 7248 raw_tag = get_next_completion(h, q); 7249 while (raw_tag != FIFO_EMPTY) 7250 raw_tag = next_command(h, q); 7251 return IRQ_HANDLED; 7252 } 7253 7254 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7255 { 7256 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7257 u32 raw_tag; 7258 u8 q = *(u8 *) queue; 7259 7260 if (interrupt_not_for_us(h)) 7261 return IRQ_NONE; 7262 h->last_intr_timestamp = get_jiffies_64(); 7263 while (interrupt_pending(h)) { 7264 raw_tag = get_next_completion(h, q); 7265 while (raw_tag != FIFO_EMPTY) { 7266 process_indexed_cmd(h, raw_tag); 7267 raw_tag = next_command(h, q); 7268 } 7269 } 7270 return IRQ_HANDLED; 7271 } 7272 7273 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7274 { 7275 struct ctlr_info *h = queue_to_hba(queue); 7276 u32 raw_tag; 7277 u8 q = *(u8 *) queue; 7278 7279 h->last_intr_timestamp = get_jiffies_64(); 7280 raw_tag = get_next_completion(h, q); 7281 while (raw_tag != FIFO_EMPTY) { 7282 process_indexed_cmd(h, raw_tag); 7283 raw_tag = next_command(h, q); 7284 } 7285 return IRQ_HANDLED; 7286 } 7287 7288 /* Send a message CDB to the firmware. Careful, this only works 7289 * in simple mode, not performant mode due to the tag lookup. 7290 * We only ever use this immediately after a controller reset. 7291 */ 7292 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7293 unsigned char type) 7294 { 7295 struct Command { 7296 struct CommandListHeader CommandHeader; 7297 struct RequestBlock Request; 7298 struct ErrDescriptor ErrorDescriptor; 7299 }; 7300 struct Command *cmd; 7301 static const size_t cmd_sz = sizeof(*cmd) + 7302 sizeof(cmd->ErrorDescriptor); 7303 dma_addr_t paddr64; 7304 __le32 paddr32; 7305 u32 tag; 7306 void __iomem *vaddr; 7307 int i, err; 7308 7309 vaddr = pci_ioremap_bar(pdev, 0); 7310 if (vaddr == NULL) 7311 return -ENOMEM; 7312 7313 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7314 * CCISS commands, so they must be allocated from the lower 4GiB of 7315 * memory. 7316 */ 7317 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7318 if (err) { 7319 iounmap(vaddr); 7320 return err; 7321 } 7322 7323 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7324 if (cmd == NULL) { 7325 iounmap(vaddr); 7326 return -ENOMEM; 7327 } 7328 7329 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7330 * although there's no guarantee, we assume that the address is at 7331 * least 4-byte aligned (most likely, it's page-aligned). 7332 */ 7333 paddr32 = cpu_to_le32(paddr64); 7334 7335 cmd->CommandHeader.ReplyQueue = 0; 7336 cmd->CommandHeader.SGList = 0; 7337 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7338 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7339 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7340 7341 cmd->Request.CDBLen = 16; 7342 cmd->Request.type_attr_dir = 7343 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7344 cmd->Request.Timeout = 0; /* Don't time out */ 7345 cmd->Request.CDB[0] = opcode; 7346 cmd->Request.CDB[1] = type; 7347 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7348 cmd->ErrorDescriptor.Addr = 7349 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7350 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7351 7352 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7353 7354 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7355 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7356 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7357 break; 7358 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7359 } 7360 7361 iounmap(vaddr); 7362 7363 /* we leak the DMA buffer here ... no choice since the controller could 7364 * still complete the command. 7365 */ 7366 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7367 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7368 opcode, type); 7369 return -ETIMEDOUT; 7370 } 7371 7372 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7373 7374 if (tag & HPSA_ERROR_BIT) { 7375 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7376 opcode, type); 7377 return -EIO; 7378 } 7379 7380 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7381 opcode, type); 7382 return 0; 7383 } 7384 7385 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7386 7387 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7388 void __iomem *vaddr, u32 use_doorbell) 7389 { 7390 7391 if (use_doorbell) { 7392 /* For everything after the P600, the PCI power state method 7393 * of resetting the controller doesn't work, so we have this 7394 * other way using the doorbell register. 7395 */ 7396 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7397 writel(use_doorbell, vaddr + SA5_DOORBELL); 7398 7399 /* PMC hardware guys tell us we need a 10 second delay after 7400 * doorbell reset and before any attempt to talk to the board 7401 * at all to ensure that this actually works and doesn't fall 7402 * over in some weird corner cases. 7403 */ 7404 msleep(10000); 7405 } else { /* Try to do it the PCI power state way */ 7406 7407 /* Quoting from the Open CISS Specification: "The Power 7408 * Management Control/Status Register (CSR) controls the power 7409 * state of the device. The normal operating state is D0, 7410 * CSR=00h. The software off state is D3, CSR=03h. To reset 7411 * the controller, place the interface device in D3 then to D0, 7412 * this causes a secondary PCI reset which will reset the 7413 * controller." */ 7414 7415 int rc = 0; 7416 7417 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7418 7419 /* enter the D3hot power management state */ 7420 rc = pci_set_power_state(pdev, PCI_D3hot); 7421 if (rc) 7422 return rc; 7423 7424 msleep(500); 7425 7426 /* enter the D0 power management state */ 7427 rc = pci_set_power_state(pdev, PCI_D0); 7428 if (rc) 7429 return rc; 7430 7431 /* 7432 * The P600 requires a small delay when changing states. 7433 * Otherwise we may think the board did not reset and we bail. 7434 * This for kdump only and is particular to the P600. 7435 */ 7436 msleep(500); 7437 } 7438 return 0; 7439 } 7440 7441 static void init_driver_version(char *driver_version, int len) 7442 { 7443 memset(driver_version, 0, len); 7444 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7445 } 7446 7447 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7448 { 7449 char *driver_version; 7450 int i, size = sizeof(cfgtable->driver_version); 7451 7452 driver_version = kmalloc(size, GFP_KERNEL); 7453 if (!driver_version) 7454 return -ENOMEM; 7455 7456 init_driver_version(driver_version, size); 7457 for (i = 0; i < size; i++) 7458 writeb(driver_version[i], &cfgtable->driver_version[i]); 7459 kfree(driver_version); 7460 return 0; 7461 } 7462 7463 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7464 unsigned char *driver_ver) 7465 { 7466 int i; 7467 7468 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7469 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7470 } 7471 7472 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7473 { 7474 7475 char *driver_ver, *old_driver_ver; 7476 int rc, size = sizeof(cfgtable->driver_version); 7477 7478 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7479 if (!old_driver_ver) 7480 return -ENOMEM; 7481 driver_ver = old_driver_ver + size; 7482 7483 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7484 * should have been changed, otherwise we know the reset failed. 7485 */ 7486 init_driver_version(old_driver_ver, size); 7487 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7488 rc = !memcmp(driver_ver, old_driver_ver, size); 7489 kfree(old_driver_ver); 7490 return rc; 7491 } 7492 /* This does a hard reset of the controller using PCI power management 7493 * states or the using the doorbell register. 7494 */ 7495 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7496 { 7497 u64 cfg_offset; 7498 u32 cfg_base_addr; 7499 u64 cfg_base_addr_index; 7500 void __iomem *vaddr; 7501 unsigned long paddr; 7502 u32 misc_fw_support; 7503 int rc; 7504 struct CfgTable __iomem *cfgtable; 7505 u32 use_doorbell; 7506 u16 command_register; 7507 7508 /* For controllers as old as the P600, this is very nearly 7509 * the same thing as 7510 * 7511 * pci_save_state(pci_dev); 7512 * pci_set_power_state(pci_dev, PCI_D3hot); 7513 * pci_set_power_state(pci_dev, PCI_D0); 7514 * pci_restore_state(pci_dev); 7515 * 7516 * For controllers newer than the P600, the pci power state 7517 * method of resetting doesn't work so we have another way 7518 * using the doorbell register. 7519 */ 7520 7521 if (!ctlr_is_resettable(board_id)) { 7522 dev_warn(&pdev->dev, "Controller not resettable\n"); 7523 return -ENODEV; 7524 } 7525 7526 /* if controller is soft- but not hard resettable... */ 7527 if (!ctlr_is_hard_resettable(board_id)) 7528 return -ENOTSUPP; /* try soft reset later. */ 7529 7530 /* Save the PCI command register */ 7531 pci_read_config_word(pdev, 4, &command_register); 7532 pci_save_state(pdev); 7533 7534 /* find the first memory BAR, so we can find the cfg table */ 7535 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7536 if (rc) 7537 return rc; 7538 vaddr = remap_pci_mem(paddr, 0x250); 7539 if (!vaddr) 7540 return -ENOMEM; 7541 7542 /* find cfgtable in order to check if reset via doorbell is supported */ 7543 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7544 &cfg_base_addr_index, &cfg_offset); 7545 if (rc) 7546 goto unmap_vaddr; 7547 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7548 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7549 if (!cfgtable) { 7550 rc = -ENOMEM; 7551 goto unmap_vaddr; 7552 } 7553 rc = write_driver_ver_to_cfgtable(cfgtable); 7554 if (rc) 7555 goto unmap_cfgtable; 7556 7557 /* If reset via doorbell register is supported, use that. 7558 * There are two such methods. Favor the newest method. 7559 */ 7560 misc_fw_support = readl(&cfgtable->misc_fw_support); 7561 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7562 if (use_doorbell) { 7563 use_doorbell = DOORBELL_CTLR_RESET2; 7564 } else { 7565 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7566 if (use_doorbell) { 7567 dev_warn(&pdev->dev, 7568 "Soft reset not supported. Firmware update is required.\n"); 7569 rc = -ENOTSUPP; /* try soft reset */ 7570 goto unmap_cfgtable; 7571 } 7572 } 7573 7574 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7575 if (rc) 7576 goto unmap_cfgtable; 7577 7578 pci_restore_state(pdev); 7579 pci_write_config_word(pdev, 4, command_register); 7580 7581 /* Some devices (notably the HP Smart Array 5i Controller) 7582 need a little pause here */ 7583 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7584 7585 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7586 if (rc) { 7587 dev_warn(&pdev->dev, 7588 "Failed waiting for board to become ready after hard reset\n"); 7589 goto unmap_cfgtable; 7590 } 7591 7592 rc = controller_reset_failed(vaddr); 7593 if (rc < 0) 7594 goto unmap_cfgtable; 7595 if (rc) { 7596 dev_warn(&pdev->dev, "Unable to successfully reset " 7597 "controller. Will try soft reset.\n"); 7598 rc = -ENOTSUPP; 7599 } else { 7600 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7601 } 7602 7603 unmap_cfgtable: 7604 iounmap(cfgtable); 7605 7606 unmap_vaddr: 7607 iounmap(vaddr); 7608 return rc; 7609 } 7610 7611 /* 7612 * We cannot read the structure directly, for portability we must use 7613 * the io functions. 7614 * This is for debug only. 7615 */ 7616 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7617 { 7618 #ifdef HPSA_DEBUG 7619 int i; 7620 char temp_name[17]; 7621 7622 dev_info(dev, "Controller Configuration information\n"); 7623 dev_info(dev, "------------------------------------\n"); 7624 for (i = 0; i < 4; i++) 7625 temp_name[i] = readb(&(tb->Signature[i])); 7626 temp_name[4] = '\0'; 7627 dev_info(dev, " Signature = %s\n", temp_name); 7628 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7629 dev_info(dev, " Transport methods supported = 0x%x\n", 7630 readl(&(tb->TransportSupport))); 7631 dev_info(dev, " Transport methods active = 0x%x\n", 7632 readl(&(tb->TransportActive))); 7633 dev_info(dev, " Requested transport Method = 0x%x\n", 7634 readl(&(tb->HostWrite.TransportRequest))); 7635 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7636 readl(&(tb->HostWrite.CoalIntDelay))); 7637 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7638 readl(&(tb->HostWrite.CoalIntCount))); 7639 dev_info(dev, " Max outstanding commands = %d\n", 7640 readl(&(tb->CmdsOutMax))); 7641 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7642 for (i = 0; i < 16; i++) 7643 temp_name[i] = readb(&(tb->ServerName[i])); 7644 temp_name[16] = '\0'; 7645 dev_info(dev, " Server Name = %s\n", temp_name); 7646 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7647 readl(&(tb->HeartBeat))); 7648 #endif /* HPSA_DEBUG */ 7649 } 7650 7651 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7652 { 7653 int i, offset, mem_type, bar_type; 7654 7655 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7656 return 0; 7657 offset = 0; 7658 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7659 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7660 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7661 offset += 4; 7662 else { 7663 mem_type = pci_resource_flags(pdev, i) & 7664 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7665 switch (mem_type) { 7666 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7667 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7668 offset += 4; /* 32 bit */ 7669 break; 7670 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7671 offset += 8; 7672 break; 7673 default: /* reserved in PCI 2.2 */ 7674 dev_warn(&pdev->dev, 7675 "base address is invalid\n"); 7676 return -1; 7677 break; 7678 } 7679 } 7680 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7681 return i + 1; 7682 } 7683 return -1; 7684 } 7685 7686 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7687 { 7688 pci_free_irq_vectors(h->pdev); 7689 h->msix_vectors = 0; 7690 } 7691 7692 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7693 * controllers that are capable. If not, we use legacy INTx mode. 7694 */ 7695 static int hpsa_interrupt_mode(struct ctlr_info *h) 7696 { 7697 unsigned int flags = PCI_IRQ_LEGACY; 7698 int ret; 7699 7700 /* Some boards advertise MSI but don't really support it */ 7701 switch (h->board_id) { 7702 case 0x40700E11: 7703 case 0x40800E11: 7704 case 0x40820E11: 7705 case 0x40830E11: 7706 break; 7707 default: 7708 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7709 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7710 if (ret > 0) { 7711 h->msix_vectors = ret; 7712 return 0; 7713 } 7714 7715 flags |= PCI_IRQ_MSI; 7716 break; 7717 } 7718 7719 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7720 if (ret < 0) 7721 return ret; 7722 return 0; 7723 } 7724 7725 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7726 { 7727 int i; 7728 u32 subsystem_vendor_id, subsystem_device_id; 7729 7730 subsystem_vendor_id = pdev->subsystem_vendor; 7731 subsystem_device_id = pdev->subsystem_device; 7732 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7733 subsystem_vendor_id; 7734 7735 for (i = 0; i < ARRAY_SIZE(products); i++) 7736 if (*board_id == products[i].board_id) 7737 return i; 7738 7739 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7740 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7741 !hpsa_allow_any) { 7742 dev_warn(&pdev->dev, "unrecognized board ID: " 7743 "0x%08x, ignoring.\n", *board_id); 7744 return -ENODEV; 7745 } 7746 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7747 } 7748 7749 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7750 unsigned long *memory_bar) 7751 { 7752 int i; 7753 7754 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7755 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7756 /* addressing mode bits already removed */ 7757 *memory_bar = pci_resource_start(pdev, i); 7758 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7759 *memory_bar); 7760 return 0; 7761 } 7762 dev_warn(&pdev->dev, "no memory BAR found\n"); 7763 return -ENODEV; 7764 } 7765 7766 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7767 int wait_for_ready) 7768 { 7769 int i, iterations; 7770 u32 scratchpad; 7771 if (wait_for_ready) 7772 iterations = HPSA_BOARD_READY_ITERATIONS; 7773 else 7774 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7775 7776 for (i = 0; i < iterations; i++) { 7777 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7778 if (wait_for_ready) { 7779 if (scratchpad == HPSA_FIRMWARE_READY) 7780 return 0; 7781 } else { 7782 if (scratchpad != HPSA_FIRMWARE_READY) 7783 return 0; 7784 } 7785 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7786 } 7787 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7788 return -ENODEV; 7789 } 7790 7791 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7792 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7793 u64 *cfg_offset) 7794 { 7795 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7796 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7797 *cfg_base_addr &= (u32) 0x0000ffff; 7798 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7799 if (*cfg_base_addr_index == -1) { 7800 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7801 return -ENODEV; 7802 } 7803 return 0; 7804 } 7805 7806 static void hpsa_free_cfgtables(struct ctlr_info *h) 7807 { 7808 if (h->transtable) { 7809 iounmap(h->transtable); 7810 h->transtable = NULL; 7811 } 7812 if (h->cfgtable) { 7813 iounmap(h->cfgtable); 7814 h->cfgtable = NULL; 7815 } 7816 } 7817 7818 /* Find and map CISS config table and transfer table 7819 + * several items must be unmapped (freed) later 7820 + * */ 7821 static int hpsa_find_cfgtables(struct ctlr_info *h) 7822 { 7823 u64 cfg_offset; 7824 u32 cfg_base_addr; 7825 u64 cfg_base_addr_index; 7826 u32 trans_offset; 7827 int rc; 7828 7829 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7830 &cfg_base_addr_index, &cfg_offset); 7831 if (rc) 7832 return rc; 7833 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7834 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7835 if (!h->cfgtable) { 7836 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7837 return -ENOMEM; 7838 } 7839 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7840 if (rc) 7841 return rc; 7842 /* Find performant mode table. */ 7843 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7844 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7845 cfg_base_addr_index)+cfg_offset+trans_offset, 7846 sizeof(*h->transtable)); 7847 if (!h->transtable) { 7848 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7849 hpsa_free_cfgtables(h); 7850 return -ENOMEM; 7851 } 7852 return 0; 7853 } 7854 7855 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7856 { 7857 #define MIN_MAX_COMMANDS 16 7858 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7859 7860 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7861 7862 /* Limit commands in memory limited kdump scenario. */ 7863 if (reset_devices && h->max_commands > 32) 7864 h->max_commands = 32; 7865 7866 if (h->max_commands < MIN_MAX_COMMANDS) { 7867 dev_warn(&h->pdev->dev, 7868 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7869 h->max_commands, 7870 MIN_MAX_COMMANDS); 7871 h->max_commands = MIN_MAX_COMMANDS; 7872 } 7873 } 7874 7875 /* If the controller reports that the total max sg entries is greater than 512, 7876 * then we know that chained SG blocks work. (Original smart arrays did not 7877 * support chained SG blocks and would return zero for max sg entries.) 7878 */ 7879 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7880 { 7881 return h->maxsgentries > 512; 7882 } 7883 7884 /* Interrogate the hardware for some limits: 7885 * max commands, max SG elements without chaining, and with chaining, 7886 * SG chain block size, etc. 7887 */ 7888 static void hpsa_find_board_params(struct ctlr_info *h) 7889 { 7890 hpsa_get_max_perf_mode_cmds(h); 7891 h->nr_cmds = h->max_commands; 7892 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7893 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7894 if (hpsa_supports_chained_sg_blocks(h)) { 7895 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7896 h->max_cmd_sg_entries = 32; 7897 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7898 h->maxsgentries--; /* save one for chain pointer */ 7899 } else { 7900 /* 7901 * Original smart arrays supported at most 31 s/g entries 7902 * embedded inline in the command (trying to use more 7903 * would lock up the controller) 7904 */ 7905 h->max_cmd_sg_entries = 31; 7906 h->maxsgentries = 31; /* default to traditional values */ 7907 h->chainsize = 0; 7908 } 7909 7910 /* Find out what task management functions are supported and cache */ 7911 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7912 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7913 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7914 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7915 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7916 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7917 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7918 } 7919 7920 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7921 { 7922 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7923 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7924 return false; 7925 } 7926 return true; 7927 } 7928 7929 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7930 { 7931 u32 driver_support; 7932 7933 driver_support = readl(&(h->cfgtable->driver_support)); 7934 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7935 #ifdef CONFIG_X86 7936 driver_support |= ENABLE_SCSI_PREFETCH; 7937 #endif 7938 driver_support |= ENABLE_UNIT_ATTN; 7939 writel(driver_support, &(h->cfgtable->driver_support)); 7940 } 7941 7942 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7943 * in a prefetch beyond physical memory. 7944 */ 7945 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7946 { 7947 u32 dma_prefetch; 7948 7949 if (h->board_id != 0x3225103C) 7950 return; 7951 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7952 dma_prefetch |= 0x8000; 7953 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7954 } 7955 7956 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7957 { 7958 int i; 7959 u32 doorbell_value; 7960 unsigned long flags; 7961 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7962 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7963 spin_lock_irqsave(&h->lock, flags); 7964 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7965 spin_unlock_irqrestore(&h->lock, flags); 7966 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7967 goto done; 7968 /* delay and try again */ 7969 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7970 } 7971 return -ENODEV; 7972 done: 7973 return 0; 7974 } 7975 7976 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7977 { 7978 int i; 7979 u32 doorbell_value; 7980 unsigned long flags; 7981 7982 /* under certain very rare conditions, this can take awhile. 7983 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7984 * as we enter this code.) 7985 */ 7986 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7987 if (h->remove_in_progress) 7988 goto done; 7989 spin_lock_irqsave(&h->lock, flags); 7990 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7991 spin_unlock_irqrestore(&h->lock, flags); 7992 if (!(doorbell_value & CFGTBL_ChangeReq)) 7993 goto done; 7994 /* delay and try again */ 7995 msleep(MODE_CHANGE_WAIT_INTERVAL); 7996 } 7997 return -ENODEV; 7998 done: 7999 return 0; 8000 } 8001 8002 /* return -ENODEV or other reason on error, 0 on success */ 8003 static int hpsa_enter_simple_mode(struct ctlr_info *h) 8004 { 8005 u32 trans_support; 8006 8007 trans_support = readl(&(h->cfgtable->TransportSupport)); 8008 if (!(trans_support & SIMPLE_MODE)) 8009 return -ENOTSUPP; 8010 8011 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8012 8013 /* Update the field, and then ring the doorbell */ 8014 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8015 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8016 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8017 if (hpsa_wait_for_mode_change_ack(h)) 8018 goto error; 8019 print_cfg_table(&h->pdev->dev, h->cfgtable); 8020 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8021 goto error; 8022 h->transMethod = CFGTBL_Trans_Simple; 8023 return 0; 8024 error: 8025 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8026 return -ENODEV; 8027 } 8028 8029 /* free items allocated or mapped by hpsa_pci_init */ 8030 static void hpsa_free_pci_init(struct ctlr_info *h) 8031 { 8032 hpsa_free_cfgtables(h); /* pci_init 4 */ 8033 iounmap(h->vaddr); /* pci_init 3 */ 8034 h->vaddr = NULL; 8035 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8036 /* 8037 * call pci_disable_device before pci_release_regions per 8038 * Documentation/PCI/pci.txt 8039 */ 8040 pci_disable_device(h->pdev); /* pci_init 1 */ 8041 pci_release_regions(h->pdev); /* pci_init 2 */ 8042 } 8043 8044 /* several items must be freed later */ 8045 static int hpsa_pci_init(struct ctlr_info *h) 8046 { 8047 int prod_index, err; 8048 8049 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8050 if (prod_index < 0) 8051 return prod_index; 8052 h->product_name = products[prod_index].product_name; 8053 h->access = *(products[prod_index].access); 8054 8055 h->needs_abort_tags_swizzled = 8056 ctlr_needs_abort_tags_swizzled(h->board_id); 8057 8058 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8059 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8060 8061 err = pci_enable_device(h->pdev); 8062 if (err) { 8063 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8064 pci_disable_device(h->pdev); 8065 return err; 8066 } 8067 8068 err = pci_request_regions(h->pdev, HPSA); 8069 if (err) { 8070 dev_err(&h->pdev->dev, 8071 "failed to obtain PCI resources\n"); 8072 pci_disable_device(h->pdev); 8073 return err; 8074 } 8075 8076 pci_set_master(h->pdev); 8077 8078 err = hpsa_interrupt_mode(h); 8079 if (err) 8080 goto clean1; 8081 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 8082 if (err) 8083 goto clean2; /* intmode+region, pci */ 8084 h->vaddr = remap_pci_mem(h->paddr, 0x250); 8085 if (!h->vaddr) { 8086 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8087 err = -ENOMEM; 8088 goto clean2; /* intmode+region, pci */ 8089 } 8090 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8091 if (err) 8092 goto clean3; /* vaddr, intmode+region, pci */ 8093 err = hpsa_find_cfgtables(h); 8094 if (err) 8095 goto clean3; /* vaddr, intmode+region, pci */ 8096 hpsa_find_board_params(h); 8097 8098 if (!hpsa_CISS_signature_present(h)) { 8099 err = -ENODEV; 8100 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8101 } 8102 hpsa_set_driver_support_bits(h); 8103 hpsa_p600_dma_prefetch_quirk(h); 8104 err = hpsa_enter_simple_mode(h); 8105 if (err) 8106 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8107 return 0; 8108 8109 clean4: /* cfgtables, vaddr, intmode+region, pci */ 8110 hpsa_free_cfgtables(h); 8111 clean3: /* vaddr, intmode+region, pci */ 8112 iounmap(h->vaddr); 8113 h->vaddr = NULL; 8114 clean2: /* intmode+region, pci */ 8115 hpsa_disable_interrupt_mode(h); 8116 clean1: 8117 /* 8118 * call pci_disable_device before pci_release_regions per 8119 * Documentation/PCI/pci.txt 8120 */ 8121 pci_disable_device(h->pdev); 8122 pci_release_regions(h->pdev); 8123 return err; 8124 } 8125 8126 static void hpsa_hba_inquiry(struct ctlr_info *h) 8127 { 8128 int rc; 8129 8130 #define HBA_INQUIRY_BYTE_COUNT 64 8131 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8132 if (!h->hba_inquiry_data) 8133 return; 8134 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8135 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8136 if (rc != 0) { 8137 kfree(h->hba_inquiry_data); 8138 h->hba_inquiry_data = NULL; 8139 } 8140 } 8141 8142 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8143 { 8144 int rc, i; 8145 void __iomem *vaddr; 8146 8147 if (!reset_devices) 8148 return 0; 8149 8150 /* kdump kernel is loading, we don't know in which state is 8151 * the pci interface. The dev->enable_cnt is equal zero 8152 * so we call enable+disable, wait a while and switch it on. 8153 */ 8154 rc = pci_enable_device(pdev); 8155 if (rc) { 8156 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8157 return -ENODEV; 8158 } 8159 pci_disable_device(pdev); 8160 msleep(260); /* a randomly chosen number */ 8161 rc = pci_enable_device(pdev); 8162 if (rc) { 8163 dev_warn(&pdev->dev, "failed to enable device.\n"); 8164 return -ENODEV; 8165 } 8166 8167 pci_set_master(pdev); 8168 8169 vaddr = pci_ioremap_bar(pdev, 0); 8170 if (vaddr == NULL) { 8171 rc = -ENOMEM; 8172 goto out_disable; 8173 } 8174 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 8175 iounmap(vaddr); 8176 8177 /* Reset the controller with a PCI power-cycle or via doorbell */ 8178 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8179 8180 /* -ENOTSUPP here means we cannot reset the controller 8181 * but it's already (and still) up and running in 8182 * "performant mode". Or, it might be 640x, which can't reset 8183 * due to concerns about shared bbwc between 6402/6404 pair. 8184 */ 8185 if (rc) 8186 goto out_disable; 8187 8188 /* Now try to get the controller to respond to a no-op */ 8189 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8190 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8191 if (hpsa_noop(pdev) == 0) 8192 break; 8193 else 8194 dev_warn(&pdev->dev, "no-op failed%s\n", 8195 (i < 11 ? "; re-trying" : "")); 8196 } 8197 8198 out_disable: 8199 8200 pci_disable_device(pdev); 8201 return rc; 8202 } 8203 8204 static void hpsa_free_cmd_pool(struct ctlr_info *h) 8205 { 8206 kfree(h->cmd_pool_bits); 8207 h->cmd_pool_bits = NULL; 8208 if (h->cmd_pool) { 8209 pci_free_consistent(h->pdev, 8210 h->nr_cmds * sizeof(struct CommandList), 8211 h->cmd_pool, 8212 h->cmd_pool_dhandle); 8213 h->cmd_pool = NULL; 8214 h->cmd_pool_dhandle = 0; 8215 } 8216 if (h->errinfo_pool) { 8217 pci_free_consistent(h->pdev, 8218 h->nr_cmds * sizeof(struct ErrorInfo), 8219 h->errinfo_pool, 8220 h->errinfo_pool_dhandle); 8221 h->errinfo_pool = NULL; 8222 h->errinfo_pool_dhandle = 0; 8223 } 8224 } 8225 8226 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8227 { 8228 h->cmd_pool_bits = kzalloc( 8229 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 8230 sizeof(unsigned long), GFP_KERNEL); 8231 h->cmd_pool = pci_alloc_consistent(h->pdev, 8232 h->nr_cmds * sizeof(*h->cmd_pool), 8233 &(h->cmd_pool_dhandle)); 8234 h->errinfo_pool = pci_alloc_consistent(h->pdev, 8235 h->nr_cmds * sizeof(*h->errinfo_pool), 8236 &(h->errinfo_pool_dhandle)); 8237 if ((h->cmd_pool_bits == NULL) 8238 || (h->cmd_pool == NULL) 8239 || (h->errinfo_pool == NULL)) { 8240 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8241 goto clean_up; 8242 } 8243 hpsa_preinitialize_commands(h); 8244 return 0; 8245 clean_up: 8246 hpsa_free_cmd_pool(h); 8247 return -ENOMEM; 8248 } 8249 8250 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8251 static void hpsa_free_irqs(struct ctlr_info *h) 8252 { 8253 int i; 8254 8255 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8256 /* Single reply queue, only one irq to free */ 8257 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8258 h->q[h->intr_mode] = 0; 8259 return; 8260 } 8261 8262 for (i = 0; i < h->msix_vectors; i++) { 8263 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8264 h->q[i] = 0; 8265 } 8266 for (; i < MAX_REPLY_QUEUES; i++) 8267 h->q[i] = 0; 8268 } 8269 8270 /* returns 0 on success; cleans up and returns -Enn on error */ 8271 static int hpsa_request_irqs(struct ctlr_info *h, 8272 irqreturn_t (*msixhandler)(int, void *), 8273 irqreturn_t (*intxhandler)(int, void *)) 8274 { 8275 int rc, i; 8276 8277 /* 8278 * initialize h->q[x] = x so that interrupt handlers know which 8279 * queue to process. 8280 */ 8281 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8282 h->q[i] = (u8) i; 8283 8284 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8285 /* If performant mode and MSI-X, use multiple reply queues */ 8286 for (i = 0; i < h->msix_vectors; i++) { 8287 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8288 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8289 0, h->intrname[i], 8290 &h->q[i]); 8291 if (rc) { 8292 int j; 8293 8294 dev_err(&h->pdev->dev, 8295 "failed to get irq %d for %s\n", 8296 pci_irq_vector(h->pdev, i), h->devname); 8297 for (j = 0; j < i; j++) { 8298 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8299 h->q[j] = 0; 8300 } 8301 for (; j < MAX_REPLY_QUEUES; j++) 8302 h->q[j] = 0; 8303 return rc; 8304 } 8305 } 8306 } else { 8307 /* Use single reply pool */ 8308 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8309 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8310 h->msix_vectors ? "x" : ""); 8311 rc = request_irq(pci_irq_vector(h->pdev, 0), 8312 msixhandler, 0, 8313 h->intrname[0], 8314 &h->q[h->intr_mode]); 8315 } else { 8316 sprintf(h->intrname[h->intr_mode], 8317 "%s-intx", h->devname); 8318 rc = request_irq(pci_irq_vector(h->pdev, 0), 8319 intxhandler, IRQF_SHARED, 8320 h->intrname[0], 8321 &h->q[h->intr_mode]); 8322 } 8323 } 8324 if (rc) { 8325 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8326 pci_irq_vector(h->pdev, 0), h->devname); 8327 hpsa_free_irqs(h); 8328 return -ENODEV; 8329 } 8330 return 0; 8331 } 8332 8333 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8334 { 8335 int rc; 8336 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8337 8338 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8339 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8340 if (rc) { 8341 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8342 return rc; 8343 } 8344 8345 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8346 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8347 if (rc) { 8348 dev_warn(&h->pdev->dev, "Board failed to become ready " 8349 "after soft reset.\n"); 8350 return rc; 8351 } 8352 8353 return 0; 8354 } 8355 8356 static void hpsa_free_reply_queues(struct ctlr_info *h) 8357 { 8358 int i; 8359 8360 for (i = 0; i < h->nreply_queues; i++) { 8361 if (!h->reply_queue[i].head) 8362 continue; 8363 pci_free_consistent(h->pdev, 8364 h->reply_queue_size, 8365 h->reply_queue[i].head, 8366 h->reply_queue[i].busaddr); 8367 h->reply_queue[i].head = NULL; 8368 h->reply_queue[i].busaddr = 0; 8369 } 8370 h->reply_queue_size = 0; 8371 } 8372 8373 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8374 { 8375 hpsa_free_performant_mode(h); /* init_one 7 */ 8376 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8377 hpsa_free_cmd_pool(h); /* init_one 5 */ 8378 hpsa_free_irqs(h); /* init_one 4 */ 8379 scsi_host_put(h->scsi_host); /* init_one 3 */ 8380 h->scsi_host = NULL; /* init_one 3 */ 8381 hpsa_free_pci_init(h); /* init_one 2_5 */ 8382 free_percpu(h->lockup_detected); /* init_one 2 */ 8383 h->lockup_detected = NULL; /* init_one 2 */ 8384 if (h->resubmit_wq) { 8385 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8386 h->resubmit_wq = NULL; 8387 } 8388 if (h->rescan_ctlr_wq) { 8389 destroy_workqueue(h->rescan_ctlr_wq); 8390 h->rescan_ctlr_wq = NULL; 8391 } 8392 kfree(h); /* init_one 1 */ 8393 } 8394 8395 /* Called when controller lockup detected. */ 8396 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8397 { 8398 int i, refcount; 8399 struct CommandList *c; 8400 int failcount = 0; 8401 8402 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8403 for (i = 0; i < h->nr_cmds; i++) { 8404 c = h->cmd_pool + i; 8405 refcount = atomic_inc_return(&c->refcount); 8406 if (refcount > 1) { 8407 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8408 finish_cmd(c); 8409 atomic_dec(&h->commands_outstanding); 8410 failcount++; 8411 } 8412 cmd_free(h, c); 8413 } 8414 dev_warn(&h->pdev->dev, 8415 "failed %d commands in fail_all\n", failcount); 8416 } 8417 8418 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8419 { 8420 int cpu; 8421 8422 for_each_online_cpu(cpu) { 8423 u32 *lockup_detected; 8424 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8425 *lockup_detected = value; 8426 } 8427 wmb(); /* be sure the per-cpu variables are out to memory */ 8428 } 8429 8430 static void controller_lockup_detected(struct ctlr_info *h) 8431 { 8432 unsigned long flags; 8433 u32 lockup_detected; 8434 8435 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8436 spin_lock_irqsave(&h->lock, flags); 8437 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8438 if (!lockup_detected) { 8439 /* no heartbeat, but controller gave us a zero. */ 8440 dev_warn(&h->pdev->dev, 8441 "lockup detected after %d but scratchpad register is zero\n", 8442 h->heartbeat_sample_interval / HZ); 8443 lockup_detected = 0xffffffff; 8444 } 8445 set_lockup_detected_for_all_cpus(h, lockup_detected); 8446 spin_unlock_irqrestore(&h->lock, flags); 8447 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8448 lockup_detected, h->heartbeat_sample_interval / HZ); 8449 pci_disable_device(h->pdev); 8450 fail_all_outstanding_cmds(h); 8451 } 8452 8453 static int detect_controller_lockup(struct ctlr_info *h) 8454 { 8455 u64 now; 8456 u32 heartbeat; 8457 unsigned long flags; 8458 8459 now = get_jiffies_64(); 8460 /* If we've received an interrupt recently, we're ok. */ 8461 if (time_after64(h->last_intr_timestamp + 8462 (h->heartbeat_sample_interval), now)) 8463 return false; 8464 8465 /* 8466 * If we've already checked the heartbeat recently, we're ok. 8467 * This could happen if someone sends us a signal. We 8468 * otherwise don't care about signals in this thread. 8469 */ 8470 if (time_after64(h->last_heartbeat_timestamp + 8471 (h->heartbeat_sample_interval), now)) 8472 return false; 8473 8474 /* If heartbeat has not changed since we last looked, we're not ok. */ 8475 spin_lock_irqsave(&h->lock, flags); 8476 heartbeat = readl(&h->cfgtable->HeartBeat); 8477 spin_unlock_irqrestore(&h->lock, flags); 8478 if (h->last_heartbeat == heartbeat) { 8479 controller_lockup_detected(h); 8480 return true; 8481 } 8482 8483 /* We're ok. */ 8484 h->last_heartbeat = heartbeat; 8485 h->last_heartbeat_timestamp = now; 8486 return false; 8487 } 8488 8489 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8490 { 8491 int i; 8492 char *event_type; 8493 8494 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8495 return; 8496 8497 /* Ask the controller to clear the events we're handling. */ 8498 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8499 | CFGTBL_Trans_io_accel2)) && 8500 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8501 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8502 8503 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8504 event_type = "state change"; 8505 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8506 event_type = "configuration change"; 8507 /* Stop sending new RAID offload reqs via the IO accelerator */ 8508 scsi_block_requests(h->scsi_host); 8509 for (i = 0; i < h->ndevices; i++) { 8510 h->dev[i]->offload_enabled = 0; 8511 h->dev[i]->offload_to_be_enabled = 0; 8512 } 8513 hpsa_drain_accel_commands(h); 8514 /* Set 'accelerator path config change' bit */ 8515 dev_warn(&h->pdev->dev, 8516 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8517 h->events, event_type); 8518 writel(h->events, &(h->cfgtable->clear_event_notify)); 8519 /* Set the "clear event notify field update" bit 6 */ 8520 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8521 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8522 hpsa_wait_for_clear_event_notify_ack(h); 8523 scsi_unblock_requests(h->scsi_host); 8524 } else { 8525 /* Acknowledge controller notification events. */ 8526 writel(h->events, &(h->cfgtable->clear_event_notify)); 8527 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8528 hpsa_wait_for_clear_event_notify_ack(h); 8529 #if 0 8530 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8531 hpsa_wait_for_mode_change_ack(h); 8532 #endif 8533 } 8534 return; 8535 } 8536 8537 /* Check a register on the controller to see if there are configuration 8538 * changes (added/changed/removed logical drives, etc.) which mean that 8539 * we should rescan the controller for devices. 8540 * Also check flag for driver-initiated rescan. 8541 */ 8542 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8543 { 8544 if (h->drv_req_rescan) { 8545 h->drv_req_rescan = 0; 8546 return 1; 8547 } 8548 8549 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8550 return 0; 8551 8552 h->events = readl(&(h->cfgtable->event_notify)); 8553 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8554 } 8555 8556 /* 8557 * Check if any of the offline devices have become ready 8558 */ 8559 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8560 { 8561 unsigned long flags; 8562 struct offline_device_entry *d; 8563 struct list_head *this, *tmp; 8564 8565 spin_lock_irqsave(&h->offline_device_lock, flags); 8566 list_for_each_safe(this, tmp, &h->offline_device_list) { 8567 d = list_entry(this, struct offline_device_entry, 8568 offline_list); 8569 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8570 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8571 spin_lock_irqsave(&h->offline_device_lock, flags); 8572 list_del(&d->offline_list); 8573 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8574 return 1; 8575 } 8576 spin_lock_irqsave(&h->offline_device_lock, flags); 8577 } 8578 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8579 return 0; 8580 } 8581 8582 static int hpsa_luns_changed(struct ctlr_info *h) 8583 { 8584 int rc = 1; /* assume there are changes */ 8585 struct ReportLUNdata *logdev = NULL; 8586 8587 /* if we can't find out if lun data has changed, 8588 * assume that it has. 8589 */ 8590 8591 if (!h->lastlogicals) 8592 return rc; 8593 8594 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8595 if (!logdev) 8596 return rc; 8597 8598 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8599 dev_warn(&h->pdev->dev, 8600 "report luns failed, can't track lun changes.\n"); 8601 goto out; 8602 } 8603 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8604 dev_info(&h->pdev->dev, 8605 "Lun changes detected.\n"); 8606 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8607 goto out; 8608 } else 8609 rc = 0; /* no changes detected. */ 8610 out: 8611 kfree(logdev); 8612 return rc; 8613 } 8614 8615 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8616 { 8617 unsigned long flags; 8618 struct ctlr_info *h = container_of(to_delayed_work(work), 8619 struct ctlr_info, rescan_ctlr_work); 8620 8621 8622 if (h->remove_in_progress) 8623 return; 8624 8625 /* 8626 * Do the scan after the reset 8627 */ 8628 if (h->reset_in_progress) { 8629 h->drv_req_rescan = 1; 8630 return; 8631 } 8632 8633 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 8634 scsi_host_get(h->scsi_host); 8635 hpsa_ack_ctlr_events(h); 8636 hpsa_scan_start(h->scsi_host); 8637 scsi_host_put(h->scsi_host); 8638 } else if (h->discovery_polling) { 8639 hpsa_disable_rld_caching(h); 8640 if (hpsa_luns_changed(h)) { 8641 struct Scsi_Host *sh = NULL; 8642 8643 dev_info(&h->pdev->dev, 8644 "driver discovery polling rescan.\n"); 8645 sh = scsi_host_get(h->scsi_host); 8646 if (sh != NULL) { 8647 hpsa_scan_start(sh); 8648 scsi_host_put(sh); 8649 } 8650 } 8651 } 8652 spin_lock_irqsave(&h->lock, flags); 8653 if (!h->remove_in_progress) 8654 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8655 h->heartbeat_sample_interval); 8656 spin_unlock_irqrestore(&h->lock, flags); 8657 } 8658 8659 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8660 { 8661 unsigned long flags; 8662 struct ctlr_info *h = container_of(to_delayed_work(work), 8663 struct ctlr_info, monitor_ctlr_work); 8664 8665 detect_controller_lockup(h); 8666 if (lockup_detected(h)) 8667 return; 8668 8669 spin_lock_irqsave(&h->lock, flags); 8670 if (!h->remove_in_progress) 8671 schedule_delayed_work(&h->monitor_ctlr_work, 8672 h->heartbeat_sample_interval); 8673 spin_unlock_irqrestore(&h->lock, flags); 8674 } 8675 8676 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8677 char *name) 8678 { 8679 struct workqueue_struct *wq = NULL; 8680 8681 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8682 if (!wq) 8683 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8684 8685 return wq; 8686 } 8687 8688 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8689 { 8690 int dac, rc; 8691 struct ctlr_info *h; 8692 int try_soft_reset = 0; 8693 unsigned long flags; 8694 u32 board_id; 8695 8696 if (number_of_controllers == 0) 8697 printk(KERN_INFO DRIVER_NAME "\n"); 8698 8699 rc = hpsa_lookup_board_id(pdev, &board_id); 8700 if (rc < 0) { 8701 dev_warn(&pdev->dev, "Board ID not found\n"); 8702 return rc; 8703 } 8704 8705 rc = hpsa_init_reset_devices(pdev, board_id); 8706 if (rc) { 8707 if (rc != -ENOTSUPP) 8708 return rc; 8709 /* If the reset fails in a particular way (it has no way to do 8710 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8711 * a soft reset once we get the controller configured up to the 8712 * point that it can accept a command. 8713 */ 8714 try_soft_reset = 1; 8715 rc = 0; 8716 } 8717 8718 reinit_after_soft_reset: 8719 8720 /* Command structures must be aligned on a 32-byte boundary because 8721 * the 5 lower bits of the address are used by the hardware. and by 8722 * the driver. See comments in hpsa.h for more info. 8723 */ 8724 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8725 h = kzalloc(sizeof(*h), GFP_KERNEL); 8726 if (!h) { 8727 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8728 return -ENOMEM; 8729 } 8730 8731 h->pdev = pdev; 8732 8733 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8734 INIT_LIST_HEAD(&h->offline_device_list); 8735 spin_lock_init(&h->lock); 8736 spin_lock_init(&h->offline_device_lock); 8737 spin_lock_init(&h->scan_lock); 8738 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8739 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8740 8741 /* Allocate and clear per-cpu variable lockup_detected */ 8742 h->lockup_detected = alloc_percpu(u32); 8743 if (!h->lockup_detected) { 8744 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8745 rc = -ENOMEM; 8746 goto clean1; /* aer/h */ 8747 } 8748 set_lockup_detected_for_all_cpus(h, 0); 8749 8750 rc = hpsa_pci_init(h); 8751 if (rc) 8752 goto clean2; /* lu, aer/h */ 8753 8754 /* relies on h-> settings made by hpsa_pci_init, including 8755 * interrupt_mode h->intr */ 8756 rc = hpsa_scsi_host_alloc(h); 8757 if (rc) 8758 goto clean2_5; /* pci, lu, aer/h */ 8759 8760 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8761 h->ctlr = number_of_controllers; 8762 number_of_controllers++; 8763 8764 /* configure PCI DMA stuff */ 8765 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8766 if (rc == 0) { 8767 dac = 1; 8768 } else { 8769 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8770 if (rc == 0) { 8771 dac = 0; 8772 } else { 8773 dev_err(&pdev->dev, "no suitable DMA available\n"); 8774 goto clean3; /* shost, pci, lu, aer/h */ 8775 } 8776 } 8777 8778 /* make sure the board interrupts are off */ 8779 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8780 8781 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8782 if (rc) 8783 goto clean3; /* shost, pci, lu, aer/h */ 8784 rc = hpsa_alloc_cmd_pool(h); 8785 if (rc) 8786 goto clean4; /* irq, shost, pci, lu, aer/h */ 8787 rc = hpsa_alloc_sg_chain_blocks(h); 8788 if (rc) 8789 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8790 init_waitqueue_head(&h->scan_wait_queue); 8791 init_waitqueue_head(&h->abort_cmd_wait_queue); 8792 init_waitqueue_head(&h->event_sync_wait_queue); 8793 mutex_init(&h->reset_mutex); 8794 h->scan_finished = 1; /* no scan currently in progress */ 8795 8796 pci_set_drvdata(pdev, h); 8797 h->ndevices = 0; 8798 8799 spin_lock_init(&h->devlock); 8800 rc = hpsa_put_ctlr_into_performant_mode(h); 8801 if (rc) 8802 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8803 8804 /* create the resubmit workqueue */ 8805 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8806 if (!h->rescan_ctlr_wq) { 8807 rc = -ENOMEM; 8808 goto clean7; 8809 } 8810 8811 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8812 if (!h->resubmit_wq) { 8813 rc = -ENOMEM; 8814 goto clean7; /* aer/h */ 8815 } 8816 8817 /* 8818 * At this point, the controller is ready to take commands. 8819 * Now, if reset_devices and the hard reset didn't work, try 8820 * the soft reset and see if that works. 8821 */ 8822 if (try_soft_reset) { 8823 8824 /* This is kind of gross. We may or may not get a completion 8825 * from the soft reset command, and if we do, then the value 8826 * from the fifo may or may not be valid. So, we wait 10 secs 8827 * after the reset throwing away any completions we get during 8828 * that time. Unregister the interrupt handler and register 8829 * fake ones to scoop up any residual completions. 8830 */ 8831 spin_lock_irqsave(&h->lock, flags); 8832 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8833 spin_unlock_irqrestore(&h->lock, flags); 8834 hpsa_free_irqs(h); 8835 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8836 hpsa_intx_discard_completions); 8837 if (rc) { 8838 dev_warn(&h->pdev->dev, 8839 "Failed to request_irq after soft reset.\n"); 8840 /* 8841 * cannot goto clean7 or free_irqs will be called 8842 * again. Instead, do its work 8843 */ 8844 hpsa_free_performant_mode(h); /* clean7 */ 8845 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8846 hpsa_free_cmd_pool(h); /* clean5 */ 8847 /* 8848 * skip hpsa_free_irqs(h) clean4 since that 8849 * was just called before request_irqs failed 8850 */ 8851 goto clean3; 8852 } 8853 8854 rc = hpsa_kdump_soft_reset(h); 8855 if (rc) 8856 /* Neither hard nor soft reset worked, we're hosed. */ 8857 goto clean7; 8858 8859 dev_info(&h->pdev->dev, "Board READY.\n"); 8860 dev_info(&h->pdev->dev, 8861 "Waiting for stale completions to drain.\n"); 8862 h->access.set_intr_mask(h, HPSA_INTR_ON); 8863 msleep(10000); 8864 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8865 8866 rc = controller_reset_failed(h->cfgtable); 8867 if (rc) 8868 dev_info(&h->pdev->dev, 8869 "Soft reset appears to have failed.\n"); 8870 8871 /* since the controller's reset, we have to go back and re-init 8872 * everything. Easiest to just forget what we've done and do it 8873 * all over again. 8874 */ 8875 hpsa_undo_allocations_after_kdump_soft_reset(h); 8876 try_soft_reset = 0; 8877 if (rc) 8878 /* don't goto clean, we already unallocated */ 8879 return -ENODEV; 8880 8881 goto reinit_after_soft_reset; 8882 } 8883 8884 /* Enable Accelerated IO path at driver layer */ 8885 h->acciopath_status = 1; 8886 /* Disable discovery polling.*/ 8887 h->discovery_polling = 0; 8888 8889 8890 /* Turn the interrupts on so we can service requests */ 8891 h->access.set_intr_mask(h, HPSA_INTR_ON); 8892 8893 hpsa_hba_inquiry(h); 8894 8895 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8896 if (!h->lastlogicals) 8897 dev_info(&h->pdev->dev, 8898 "Can't track change to report lun data\n"); 8899 8900 /* hook into SCSI subsystem */ 8901 rc = hpsa_scsi_add_host(h); 8902 if (rc) 8903 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8904 8905 /* Monitor the controller for firmware lockups */ 8906 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8907 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8908 schedule_delayed_work(&h->monitor_ctlr_work, 8909 h->heartbeat_sample_interval); 8910 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8911 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8912 h->heartbeat_sample_interval); 8913 return 0; 8914 8915 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8916 hpsa_free_performant_mode(h); 8917 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8918 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8919 hpsa_free_sg_chain_blocks(h); 8920 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8921 hpsa_free_cmd_pool(h); 8922 clean4: /* irq, shost, pci, lu, aer/h */ 8923 hpsa_free_irqs(h); 8924 clean3: /* shost, pci, lu, aer/h */ 8925 scsi_host_put(h->scsi_host); 8926 h->scsi_host = NULL; 8927 clean2_5: /* pci, lu, aer/h */ 8928 hpsa_free_pci_init(h); 8929 clean2: /* lu, aer/h */ 8930 if (h->lockup_detected) { 8931 free_percpu(h->lockup_detected); 8932 h->lockup_detected = NULL; 8933 } 8934 clean1: /* wq/aer/h */ 8935 if (h->resubmit_wq) { 8936 destroy_workqueue(h->resubmit_wq); 8937 h->resubmit_wq = NULL; 8938 } 8939 if (h->rescan_ctlr_wq) { 8940 destroy_workqueue(h->rescan_ctlr_wq); 8941 h->rescan_ctlr_wq = NULL; 8942 } 8943 kfree(h); 8944 return rc; 8945 } 8946 8947 static void hpsa_flush_cache(struct ctlr_info *h) 8948 { 8949 char *flush_buf; 8950 struct CommandList *c; 8951 int rc; 8952 8953 if (unlikely(lockup_detected(h))) 8954 return; 8955 flush_buf = kzalloc(4, GFP_KERNEL); 8956 if (!flush_buf) 8957 return; 8958 8959 c = cmd_alloc(h); 8960 8961 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8962 RAID_CTLR_LUNID, TYPE_CMD)) { 8963 goto out; 8964 } 8965 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8966 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8967 if (rc) 8968 goto out; 8969 if (c->err_info->CommandStatus != 0) 8970 out: 8971 dev_warn(&h->pdev->dev, 8972 "error flushing cache on controller\n"); 8973 cmd_free(h, c); 8974 kfree(flush_buf); 8975 } 8976 8977 /* Make controller gather fresh report lun data each time we 8978 * send down a report luns request 8979 */ 8980 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8981 { 8982 u32 *options; 8983 struct CommandList *c; 8984 int rc; 8985 8986 /* Don't bother trying to set diag options if locked up */ 8987 if (unlikely(h->lockup_detected)) 8988 return; 8989 8990 options = kzalloc(sizeof(*options), GFP_KERNEL); 8991 if (!options) 8992 return; 8993 8994 c = cmd_alloc(h); 8995 8996 /* first, get the current diag options settings */ 8997 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8998 RAID_CTLR_LUNID, TYPE_CMD)) 8999 goto errout; 9000 9001 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9002 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9003 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9004 goto errout; 9005 9006 /* Now, set the bit for disabling the RLD caching */ 9007 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9008 9009 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9010 RAID_CTLR_LUNID, TYPE_CMD)) 9011 goto errout; 9012 9013 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9014 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9015 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9016 goto errout; 9017 9018 /* Now verify that it got set: */ 9019 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9020 RAID_CTLR_LUNID, TYPE_CMD)) 9021 goto errout; 9022 9023 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9024 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9025 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9026 goto errout; 9027 9028 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9029 goto out; 9030 9031 errout: 9032 dev_err(&h->pdev->dev, 9033 "Error: failed to disable report lun data caching.\n"); 9034 out: 9035 cmd_free(h, c); 9036 kfree(options); 9037 } 9038 9039 static void hpsa_shutdown(struct pci_dev *pdev) 9040 { 9041 struct ctlr_info *h; 9042 9043 h = pci_get_drvdata(pdev); 9044 /* Turn board interrupts off and send the flush cache command 9045 * sendcmd will turn off interrupt, and send the flush... 9046 * To write all data in the battery backed cache to disks 9047 */ 9048 hpsa_flush_cache(h); 9049 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9050 hpsa_free_irqs(h); /* init_one 4 */ 9051 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9052 } 9053 9054 static void hpsa_free_device_info(struct ctlr_info *h) 9055 { 9056 int i; 9057 9058 for (i = 0; i < h->ndevices; i++) { 9059 kfree(h->dev[i]); 9060 h->dev[i] = NULL; 9061 } 9062 } 9063 9064 static void hpsa_remove_one(struct pci_dev *pdev) 9065 { 9066 struct ctlr_info *h; 9067 unsigned long flags; 9068 9069 if (pci_get_drvdata(pdev) == NULL) { 9070 dev_err(&pdev->dev, "unable to remove device\n"); 9071 return; 9072 } 9073 h = pci_get_drvdata(pdev); 9074 9075 /* Get rid of any controller monitoring work items */ 9076 spin_lock_irqsave(&h->lock, flags); 9077 h->remove_in_progress = 1; 9078 spin_unlock_irqrestore(&h->lock, flags); 9079 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9080 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9081 destroy_workqueue(h->rescan_ctlr_wq); 9082 destroy_workqueue(h->resubmit_wq); 9083 9084 /* 9085 * Call before disabling interrupts. 9086 * scsi_remove_host can trigger I/O operations especially 9087 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9088 * operations which cannot complete and will hang the system. 9089 */ 9090 if (h->scsi_host) 9091 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9092 /* includes hpsa_free_irqs - init_one 4 */ 9093 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9094 hpsa_shutdown(pdev); 9095 9096 hpsa_free_device_info(h); /* scan */ 9097 9098 kfree(h->hba_inquiry_data); /* init_one 10 */ 9099 h->hba_inquiry_data = NULL; /* init_one 10 */ 9100 hpsa_free_ioaccel2_sg_chain_blocks(h); 9101 hpsa_free_performant_mode(h); /* init_one 7 */ 9102 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9103 hpsa_free_cmd_pool(h); /* init_one 5 */ 9104 kfree(h->lastlogicals); 9105 9106 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9107 9108 scsi_host_put(h->scsi_host); /* init_one 3 */ 9109 h->scsi_host = NULL; /* init_one 3 */ 9110 9111 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9112 hpsa_free_pci_init(h); /* init_one 2.5 */ 9113 9114 free_percpu(h->lockup_detected); /* init_one 2 */ 9115 h->lockup_detected = NULL; /* init_one 2 */ 9116 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9117 9118 hpsa_delete_sas_host(h); 9119 9120 kfree(h); /* init_one 1 */ 9121 } 9122 9123 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9124 __attribute__((unused)) pm_message_t state) 9125 { 9126 return -ENOSYS; 9127 } 9128 9129 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9130 { 9131 return -ENOSYS; 9132 } 9133 9134 static struct pci_driver hpsa_pci_driver = { 9135 .name = HPSA, 9136 .probe = hpsa_init_one, 9137 .remove = hpsa_remove_one, 9138 .id_table = hpsa_pci_device_id, /* id_table */ 9139 .shutdown = hpsa_shutdown, 9140 .suspend = hpsa_suspend, 9141 .resume = hpsa_resume, 9142 }; 9143 9144 /* Fill in bucket_map[], given nsgs (the max number of 9145 * scatter gather elements supported) and bucket[], 9146 * which is an array of 8 integers. The bucket[] array 9147 * contains 8 different DMA transfer sizes (in 16 9148 * byte increments) which the controller uses to fetch 9149 * commands. This function fills in bucket_map[], which 9150 * maps a given number of scatter gather elements to one of 9151 * the 8 DMA transfer sizes. The point of it is to allow the 9152 * controller to only do as much DMA as needed to fetch the 9153 * command, with the DMA transfer size encoded in the lower 9154 * bits of the command address. 9155 */ 9156 static void calc_bucket_map(int bucket[], int num_buckets, 9157 int nsgs, int min_blocks, u32 *bucket_map) 9158 { 9159 int i, j, b, size; 9160 9161 /* Note, bucket_map must have nsgs+1 entries. */ 9162 for (i = 0; i <= nsgs; i++) { 9163 /* Compute size of a command with i SG entries */ 9164 size = i + min_blocks; 9165 b = num_buckets; /* Assume the biggest bucket */ 9166 /* Find the bucket that is just big enough */ 9167 for (j = 0; j < num_buckets; j++) { 9168 if (bucket[j] >= size) { 9169 b = j; 9170 break; 9171 } 9172 } 9173 /* for a command with i SG entries, use bucket b. */ 9174 bucket_map[i] = b; 9175 } 9176 } 9177 9178 /* 9179 * return -ENODEV on err, 0 on success (or no action) 9180 * allocates numerous items that must be freed later 9181 */ 9182 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9183 { 9184 int i; 9185 unsigned long register_value; 9186 unsigned long transMethod = CFGTBL_Trans_Performant | 9187 (trans_support & CFGTBL_Trans_use_short_tags) | 9188 CFGTBL_Trans_enable_directed_msix | 9189 (trans_support & (CFGTBL_Trans_io_accel1 | 9190 CFGTBL_Trans_io_accel2)); 9191 struct access_method access = SA5_performant_access; 9192 9193 /* This is a bit complicated. There are 8 registers on 9194 * the controller which we write to to tell it 8 different 9195 * sizes of commands which there may be. It's a way of 9196 * reducing the DMA done to fetch each command. Encoded into 9197 * each command's tag are 3 bits which communicate to the controller 9198 * which of the eight sizes that command fits within. The size of 9199 * each command depends on how many scatter gather entries there are. 9200 * Each SG entry requires 16 bytes. The eight registers are programmed 9201 * with the number of 16-byte blocks a command of that size requires. 9202 * The smallest command possible requires 5 such 16 byte blocks. 9203 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9204 * blocks. Note, this only extends to the SG entries contained 9205 * within the command block, and does not extend to chained blocks 9206 * of SG elements. bft[] contains the eight values we write to 9207 * the registers. They are not evenly distributed, but have more 9208 * sizes for small commands, and fewer sizes for larger commands. 9209 */ 9210 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9211 #define MIN_IOACCEL2_BFT_ENTRY 5 9212 #define HPSA_IOACCEL2_HEADER_SZ 4 9213 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9214 13, 14, 15, 16, 17, 18, 19, 9215 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9216 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9217 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9218 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9219 16 * MIN_IOACCEL2_BFT_ENTRY); 9220 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9221 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9222 /* 5 = 1 s/g entry or 4k 9223 * 6 = 2 s/g entry or 8k 9224 * 8 = 4 s/g entry or 16k 9225 * 10 = 6 s/g entry or 24k 9226 */ 9227 9228 /* If the controller supports either ioaccel method then 9229 * we can also use the RAID stack submit path that does not 9230 * perform the superfluous readl() after each command submission. 9231 */ 9232 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9233 access = SA5_performant_access_no_read; 9234 9235 /* Controller spec: zero out this buffer. */ 9236 for (i = 0; i < h->nreply_queues; i++) 9237 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9238 9239 bft[7] = SG_ENTRIES_IN_CMD + 4; 9240 calc_bucket_map(bft, ARRAY_SIZE(bft), 9241 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9242 for (i = 0; i < 8; i++) 9243 writel(bft[i], &h->transtable->BlockFetch[i]); 9244 9245 /* size of controller ring buffer */ 9246 writel(h->max_commands, &h->transtable->RepQSize); 9247 writel(h->nreply_queues, &h->transtable->RepQCount); 9248 writel(0, &h->transtable->RepQCtrAddrLow32); 9249 writel(0, &h->transtable->RepQCtrAddrHigh32); 9250 9251 for (i = 0; i < h->nreply_queues; i++) { 9252 writel(0, &h->transtable->RepQAddr[i].upper); 9253 writel(h->reply_queue[i].busaddr, 9254 &h->transtable->RepQAddr[i].lower); 9255 } 9256 9257 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9258 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9259 /* 9260 * enable outbound interrupt coalescing in accelerator mode; 9261 */ 9262 if (trans_support & CFGTBL_Trans_io_accel1) { 9263 access = SA5_ioaccel_mode1_access; 9264 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9265 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9266 } else { 9267 if (trans_support & CFGTBL_Trans_io_accel2) { 9268 access = SA5_ioaccel_mode2_access; 9269 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9270 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9271 } 9272 } 9273 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9274 if (hpsa_wait_for_mode_change_ack(h)) { 9275 dev_err(&h->pdev->dev, 9276 "performant mode problem - doorbell timeout\n"); 9277 return -ENODEV; 9278 } 9279 register_value = readl(&(h->cfgtable->TransportActive)); 9280 if (!(register_value & CFGTBL_Trans_Performant)) { 9281 dev_err(&h->pdev->dev, 9282 "performant mode problem - transport not active\n"); 9283 return -ENODEV; 9284 } 9285 /* Change the access methods to the performant access methods */ 9286 h->access = access; 9287 h->transMethod = transMethod; 9288 9289 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9290 (trans_support & CFGTBL_Trans_io_accel2))) 9291 return 0; 9292 9293 if (trans_support & CFGTBL_Trans_io_accel1) { 9294 /* Set up I/O accelerator mode */ 9295 for (i = 0; i < h->nreply_queues; i++) { 9296 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9297 h->reply_queue[i].current_entry = 9298 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9299 } 9300 bft[7] = h->ioaccel_maxsg + 8; 9301 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9302 h->ioaccel1_blockFetchTable); 9303 9304 /* initialize all reply queue entries to unused */ 9305 for (i = 0; i < h->nreply_queues; i++) 9306 memset(h->reply_queue[i].head, 9307 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9308 h->reply_queue_size); 9309 9310 /* set all the constant fields in the accelerator command 9311 * frames once at init time to save CPU cycles later. 9312 */ 9313 for (i = 0; i < h->nr_cmds; i++) { 9314 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9315 9316 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9317 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9318 (i * sizeof(struct ErrorInfo))); 9319 cp->err_info_len = sizeof(struct ErrorInfo); 9320 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9321 cp->host_context_flags = 9322 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9323 cp->timeout_sec = 0; 9324 cp->ReplyQueue = 0; 9325 cp->tag = 9326 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9327 cp->host_addr = 9328 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9329 (i * sizeof(struct io_accel1_cmd))); 9330 } 9331 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9332 u64 cfg_offset, cfg_base_addr_index; 9333 u32 bft2_offset, cfg_base_addr; 9334 int rc; 9335 9336 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9337 &cfg_base_addr_index, &cfg_offset); 9338 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9339 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9340 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9341 4, h->ioaccel2_blockFetchTable); 9342 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9343 BUILD_BUG_ON(offsetof(struct CfgTable, 9344 io_accel_request_size_offset) != 0xb8); 9345 h->ioaccel2_bft2_regs = 9346 remap_pci_mem(pci_resource_start(h->pdev, 9347 cfg_base_addr_index) + 9348 cfg_offset + bft2_offset, 9349 ARRAY_SIZE(bft2) * 9350 sizeof(*h->ioaccel2_bft2_regs)); 9351 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9352 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9353 } 9354 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9355 if (hpsa_wait_for_mode_change_ack(h)) { 9356 dev_err(&h->pdev->dev, 9357 "performant mode problem - enabling ioaccel mode\n"); 9358 return -ENODEV; 9359 } 9360 return 0; 9361 } 9362 9363 /* Free ioaccel1 mode command blocks and block fetch table */ 9364 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9365 { 9366 if (h->ioaccel_cmd_pool) { 9367 pci_free_consistent(h->pdev, 9368 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9369 h->ioaccel_cmd_pool, 9370 h->ioaccel_cmd_pool_dhandle); 9371 h->ioaccel_cmd_pool = NULL; 9372 h->ioaccel_cmd_pool_dhandle = 0; 9373 } 9374 kfree(h->ioaccel1_blockFetchTable); 9375 h->ioaccel1_blockFetchTable = NULL; 9376 } 9377 9378 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9379 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9380 { 9381 h->ioaccel_maxsg = 9382 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9383 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9384 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9385 9386 /* Command structures must be aligned on a 128-byte boundary 9387 * because the 7 lower bits of the address are used by the 9388 * hardware. 9389 */ 9390 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9391 IOACCEL1_COMMANDLIST_ALIGNMENT); 9392 h->ioaccel_cmd_pool = 9393 pci_alloc_consistent(h->pdev, 9394 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9395 &(h->ioaccel_cmd_pool_dhandle)); 9396 9397 h->ioaccel1_blockFetchTable = 9398 kmalloc(((h->ioaccel_maxsg + 1) * 9399 sizeof(u32)), GFP_KERNEL); 9400 9401 if ((h->ioaccel_cmd_pool == NULL) || 9402 (h->ioaccel1_blockFetchTable == NULL)) 9403 goto clean_up; 9404 9405 memset(h->ioaccel_cmd_pool, 0, 9406 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9407 return 0; 9408 9409 clean_up: 9410 hpsa_free_ioaccel1_cmd_and_bft(h); 9411 return -ENOMEM; 9412 } 9413 9414 /* Free ioaccel2 mode command blocks and block fetch table */ 9415 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9416 { 9417 hpsa_free_ioaccel2_sg_chain_blocks(h); 9418 9419 if (h->ioaccel2_cmd_pool) { 9420 pci_free_consistent(h->pdev, 9421 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9422 h->ioaccel2_cmd_pool, 9423 h->ioaccel2_cmd_pool_dhandle); 9424 h->ioaccel2_cmd_pool = NULL; 9425 h->ioaccel2_cmd_pool_dhandle = 0; 9426 } 9427 kfree(h->ioaccel2_blockFetchTable); 9428 h->ioaccel2_blockFetchTable = NULL; 9429 } 9430 9431 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9432 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9433 { 9434 int rc; 9435 9436 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9437 9438 h->ioaccel_maxsg = 9439 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9440 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9441 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9442 9443 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9444 IOACCEL2_COMMANDLIST_ALIGNMENT); 9445 h->ioaccel2_cmd_pool = 9446 pci_alloc_consistent(h->pdev, 9447 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9448 &(h->ioaccel2_cmd_pool_dhandle)); 9449 9450 h->ioaccel2_blockFetchTable = 9451 kmalloc(((h->ioaccel_maxsg + 1) * 9452 sizeof(u32)), GFP_KERNEL); 9453 9454 if ((h->ioaccel2_cmd_pool == NULL) || 9455 (h->ioaccel2_blockFetchTable == NULL)) { 9456 rc = -ENOMEM; 9457 goto clean_up; 9458 } 9459 9460 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9461 if (rc) 9462 goto clean_up; 9463 9464 memset(h->ioaccel2_cmd_pool, 0, 9465 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9466 return 0; 9467 9468 clean_up: 9469 hpsa_free_ioaccel2_cmd_and_bft(h); 9470 return rc; 9471 } 9472 9473 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9474 static void hpsa_free_performant_mode(struct ctlr_info *h) 9475 { 9476 kfree(h->blockFetchTable); 9477 h->blockFetchTable = NULL; 9478 hpsa_free_reply_queues(h); 9479 hpsa_free_ioaccel1_cmd_and_bft(h); 9480 hpsa_free_ioaccel2_cmd_and_bft(h); 9481 } 9482 9483 /* return -ENODEV on error, 0 on success (or no action) 9484 * allocates numerous items that must be freed later 9485 */ 9486 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9487 { 9488 u32 trans_support; 9489 unsigned long transMethod = CFGTBL_Trans_Performant | 9490 CFGTBL_Trans_use_short_tags; 9491 int i, rc; 9492 9493 if (hpsa_simple_mode) 9494 return 0; 9495 9496 trans_support = readl(&(h->cfgtable->TransportSupport)); 9497 if (!(trans_support & PERFORMANT_MODE)) 9498 return 0; 9499 9500 /* Check for I/O accelerator mode support */ 9501 if (trans_support & CFGTBL_Trans_io_accel1) { 9502 transMethod |= CFGTBL_Trans_io_accel1 | 9503 CFGTBL_Trans_enable_directed_msix; 9504 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9505 if (rc) 9506 return rc; 9507 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9508 transMethod |= CFGTBL_Trans_io_accel2 | 9509 CFGTBL_Trans_enable_directed_msix; 9510 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9511 if (rc) 9512 return rc; 9513 } 9514 9515 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9516 hpsa_get_max_perf_mode_cmds(h); 9517 /* Performant mode ring buffer and supporting data structures */ 9518 h->reply_queue_size = h->max_commands * sizeof(u64); 9519 9520 for (i = 0; i < h->nreply_queues; i++) { 9521 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9522 h->reply_queue_size, 9523 &(h->reply_queue[i].busaddr)); 9524 if (!h->reply_queue[i].head) { 9525 rc = -ENOMEM; 9526 goto clean1; /* rq, ioaccel */ 9527 } 9528 h->reply_queue[i].size = h->max_commands; 9529 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9530 h->reply_queue[i].current_entry = 0; 9531 } 9532 9533 /* Need a block fetch table for performant mode */ 9534 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9535 sizeof(u32)), GFP_KERNEL); 9536 if (!h->blockFetchTable) { 9537 rc = -ENOMEM; 9538 goto clean1; /* rq, ioaccel */ 9539 } 9540 9541 rc = hpsa_enter_performant_mode(h, trans_support); 9542 if (rc) 9543 goto clean2; /* bft, rq, ioaccel */ 9544 return 0; 9545 9546 clean2: /* bft, rq, ioaccel */ 9547 kfree(h->blockFetchTable); 9548 h->blockFetchTable = NULL; 9549 clean1: /* rq, ioaccel */ 9550 hpsa_free_reply_queues(h); 9551 hpsa_free_ioaccel1_cmd_and_bft(h); 9552 hpsa_free_ioaccel2_cmd_and_bft(h); 9553 return rc; 9554 } 9555 9556 static int is_accelerated_cmd(struct CommandList *c) 9557 { 9558 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9559 } 9560 9561 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9562 { 9563 struct CommandList *c = NULL; 9564 int i, accel_cmds_out; 9565 int refcount; 9566 9567 do { /* wait for all outstanding ioaccel commands to drain out */ 9568 accel_cmds_out = 0; 9569 for (i = 0; i < h->nr_cmds; i++) { 9570 c = h->cmd_pool + i; 9571 refcount = atomic_inc_return(&c->refcount); 9572 if (refcount > 1) /* Command is allocated */ 9573 accel_cmds_out += is_accelerated_cmd(c); 9574 cmd_free(h, c); 9575 } 9576 if (accel_cmds_out <= 0) 9577 break; 9578 msleep(100); 9579 } while (1); 9580 } 9581 9582 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9583 struct hpsa_sas_port *hpsa_sas_port) 9584 { 9585 struct hpsa_sas_phy *hpsa_sas_phy; 9586 struct sas_phy *phy; 9587 9588 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9589 if (!hpsa_sas_phy) 9590 return NULL; 9591 9592 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9593 hpsa_sas_port->next_phy_index); 9594 if (!phy) { 9595 kfree(hpsa_sas_phy); 9596 return NULL; 9597 } 9598 9599 hpsa_sas_port->next_phy_index++; 9600 hpsa_sas_phy->phy = phy; 9601 hpsa_sas_phy->parent_port = hpsa_sas_port; 9602 9603 return hpsa_sas_phy; 9604 } 9605 9606 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9607 { 9608 struct sas_phy *phy = hpsa_sas_phy->phy; 9609 9610 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9611 sas_phy_free(phy); 9612 if (hpsa_sas_phy->added_to_port) 9613 list_del(&hpsa_sas_phy->phy_list_entry); 9614 kfree(hpsa_sas_phy); 9615 } 9616 9617 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9618 { 9619 int rc; 9620 struct hpsa_sas_port *hpsa_sas_port; 9621 struct sas_phy *phy; 9622 struct sas_identify *identify; 9623 9624 hpsa_sas_port = hpsa_sas_phy->parent_port; 9625 phy = hpsa_sas_phy->phy; 9626 9627 identify = &phy->identify; 9628 memset(identify, 0, sizeof(*identify)); 9629 identify->sas_address = hpsa_sas_port->sas_address; 9630 identify->device_type = SAS_END_DEVICE; 9631 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9632 identify->target_port_protocols = SAS_PROTOCOL_STP; 9633 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9634 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9635 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9636 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9637 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9638 9639 rc = sas_phy_add(hpsa_sas_phy->phy); 9640 if (rc) 9641 return rc; 9642 9643 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9644 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9645 &hpsa_sas_port->phy_list_head); 9646 hpsa_sas_phy->added_to_port = true; 9647 9648 return 0; 9649 } 9650 9651 static int 9652 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9653 struct sas_rphy *rphy) 9654 { 9655 struct sas_identify *identify; 9656 9657 identify = &rphy->identify; 9658 identify->sas_address = hpsa_sas_port->sas_address; 9659 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9660 identify->target_port_protocols = SAS_PROTOCOL_STP; 9661 9662 return sas_rphy_add(rphy); 9663 } 9664 9665 static struct hpsa_sas_port 9666 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9667 u64 sas_address) 9668 { 9669 int rc; 9670 struct hpsa_sas_port *hpsa_sas_port; 9671 struct sas_port *port; 9672 9673 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9674 if (!hpsa_sas_port) 9675 return NULL; 9676 9677 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9678 hpsa_sas_port->parent_node = hpsa_sas_node; 9679 9680 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9681 if (!port) 9682 goto free_hpsa_port; 9683 9684 rc = sas_port_add(port); 9685 if (rc) 9686 goto free_sas_port; 9687 9688 hpsa_sas_port->port = port; 9689 hpsa_sas_port->sas_address = sas_address; 9690 list_add_tail(&hpsa_sas_port->port_list_entry, 9691 &hpsa_sas_node->port_list_head); 9692 9693 return hpsa_sas_port; 9694 9695 free_sas_port: 9696 sas_port_free(port); 9697 free_hpsa_port: 9698 kfree(hpsa_sas_port); 9699 9700 return NULL; 9701 } 9702 9703 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9704 { 9705 struct hpsa_sas_phy *hpsa_sas_phy; 9706 struct hpsa_sas_phy *next; 9707 9708 list_for_each_entry_safe(hpsa_sas_phy, next, 9709 &hpsa_sas_port->phy_list_head, phy_list_entry) 9710 hpsa_free_sas_phy(hpsa_sas_phy); 9711 9712 sas_port_delete(hpsa_sas_port->port); 9713 list_del(&hpsa_sas_port->port_list_entry); 9714 kfree(hpsa_sas_port); 9715 } 9716 9717 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9718 { 9719 struct hpsa_sas_node *hpsa_sas_node; 9720 9721 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9722 if (hpsa_sas_node) { 9723 hpsa_sas_node->parent_dev = parent_dev; 9724 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9725 } 9726 9727 return hpsa_sas_node; 9728 } 9729 9730 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9731 { 9732 struct hpsa_sas_port *hpsa_sas_port; 9733 struct hpsa_sas_port *next; 9734 9735 if (!hpsa_sas_node) 9736 return; 9737 9738 list_for_each_entry_safe(hpsa_sas_port, next, 9739 &hpsa_sas_node->port_list_head, port_list_entry) 9740 hpsa_free_sas_port(hpsa_sas_port); 9741 9742 kfree(hpsa_sas_node); 9743 } 9744 9745 static struct hpsa_scsi_dev_t 9746 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9747 struct sas_rphy *rphy) 9748 { 9749 int i; 9750 struct hpsa_scsi_dev_t *device; 9751 9752 for (i = 0; i < h->ndevices; i++) { 9753 device = h->dev[i]; 9754 if (!device->sas_port) 9755 continue; 9756 if (device->sas_port->rphy == rphy) 9757 return device; 9758 } 9759 9760 return NULL; 9761 } 9762 9763 static int hpsa_add_sas_host(struct ctlr_info *h) 9764 { 9765 int rc; 9766 struct device *parent_dev; 9767 struct hpsa_sas_node *hpsa_sas_node; 9768 struct hpsa_sas_port *hpsa_sas_port; 9769 struct hpsa_sas_phy *hpsa_sas_phy; 9770 9771 parent_dev = &h->scsi_host->shost_gendev; 9772 9773 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9774 if (!hpsa_sas_node) 9775 return -ENOMEM; 9776 9777 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9778 if (!hpsa_sas_port) { 9779 rc = -ENODEV; 9780 goto free_sas_node; 9781 } 9782 9783 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9784 if (!hpsa_sas_phy) { 9785 rc = -ENODEV; 9786 goto free_sas_port; 9787 } 9788 9789 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9790 if (rc) 9791 goto free_sas_phy; 9792 9793 h->sas_host = hpsa_sas_node; 9794 9795 return 0; 9796 9797 free_sas_phy: 9798 hpsa_free_sas_phy(hpsa_sas_phy); 9799 free_sas_port: 9800 hpsa_free_sas_port(hpsa_sas_port); 9801 free_sas_node: 9802 hpsa_free_sas_node(hpsa_sas_node); 9803 9804 return rc; 9805 } 9806 9807 static void hpsa_delete_sas_host(struct ctlr_info *h) 9808 { 9809 hpsa_free_sas_node(h->sas_host); 9810 } 9811 9812 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9813 struct hpsa_scsi_dev_t *device) 9814 { 9815 int rc; 9816 struct hpsa_sas_port *hpsa_sas_port; 9817 struct sas_rphy *rphy; 9818 9819 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9820 if (!hpsa_sas_port) 9821 return -ENOMEM; 9822 9823 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9824 if (!rphy) { 9825 rc = -ENODEV; 9826 goto free_sas_port; 9827 } 9828 9829 hpsa_sas_port->rphy = rphy; 9830 device->sas_port = hpsa_sas_port; 9831 9832 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9833 if (rc) 9834 goto free_sas_port; 9835 9836 return 0; 9837 9838 free_sas_port: 9839 hpsa_free_sas_port(hpsa_sas_port); 9840 device->sas_port = NULL; 9841 9842 return rc; 9843 } 9844 9845 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9846 { 9847 if (device->sas_port) { 9848 hpsa_free_sas_port(device->sas_port); 9849 device->sas_port = NULL; 9850 } 9851 } 9852 9853 static int 9854 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9855 { 9856 return 0; 9857 } 9858 9859 static int 9860 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9861 { 9862 *identifier = 0; 9863 return 0; 9864 } 9865 9866 static int 9867 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9868 { 9869 return -ENXIO; 9870 } 9871 9872 static int 9873 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9874 { 9875 return 0; 9876 } 9877 9878 static int 9879 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9880 { 9881 return 0; 9882 } 9883 9884 static int 9885 hpsa_sas_phy_setup(struct sas_phy *phy) 9886 { 9887 return 0; 9888 } 9889 9890 static void 9891 hpsa_sas_phy_release(struct sas_phy *phy) 9892 { 9893 } 9894 9895 static int 9896 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9897 { 9898 return -EINVAL; 9899 } 9900 9901 /* SMP = Serial Management Protocol */ 9902 static int 9903 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9904 struct request *req) 9905 { 9906 return -EINVAL; 9907 } 9908 9909 static struct sas_function_template hpsa_sas_transport_functions = { 9910 .get_linkerrors = hpsa_sas_get_linkerrors, 9911 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9912 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9913 .phy_reset = hpsa_sas_phy_reset, 9914 .phy_enable = hpsa_sas_phy_enable, 9915 .phy_setup = hpsa_sas_phy_setup, 9916 .phy_release = hpsa_sas_phy_release, 9917 .set_phy_speed = hpsa_sas_phy_speed, 9918 .smp_handler = hpsa_sas_smp_handler, 9919 }; 9920 9921 /* 9922 * This is it. Register the PCI driver information for the cards we control 9923 * the OS will call our registered routines when it finds one of our cards. 9924 */ 9925 static int __init hpsa_init(void) 9926 { 9927 int rc; 9928 9929 hpsa_sas_transport_template = 9930 sas_attach_transport(&hpsa_sas_transport_functions); 9931 if (!hpsa_sas_transport_template) 9932 return -ENODEV; 9933 9934 rc = pci_register_driver(&hpsa_pci_driver); 9935 9936 if (rc) 9937 sas_release_transport(hpsa_sas_transport_template); 9938 9939 return rc; 9940 } 9941 9942 static void __exit hpsa_cleanup(void) 9943 { 9944 pci_unregister_driver(&hpsa_pci_driver); 9945 sas_release_transport(hpsa_sas_transport_template); 9946 } 9947 9948 static void __attribute__((unused)) verify_offsets(void) 9949 { 9950 #define VERIFY_OFFSET(member, offset) \ 9951 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9952 9953 VERIFY_OFFSET(structure_size, 0); 9954 VERIFY_OFFSET(volume_blk_size, 4); 9955 VERIFY_OFFSET(volume_blk_cnt, 8); 9956 VERIFY_OFFSET(phys_blk_shift, 16); 9957 VERIFY_OFFSET(parity_rotation_shift, 17); 9958 VERIFY_OFFSET(strip_size, 18); 9959 VERIFY_OFFSET(disk_starting_blk, 20); 9960 VERIFY_OFFSET(disk_blk_cnt, 28); 9961 VERIFY_OFFSET(data_disks_per_row, 36); 9962 VERIFY_OFFSET(metadata_disks_per_row, 38); 9963 VERIFY_OFFSET(row_cnt, 40); 9964 VERIFY_OFFSET(layout_map_count, 42); 9965 VERIFY_OFFSET(flags, 44); 9966 VERIFY_OFFSET(dekindex, 46); 9967 /* VERIFY_OFFSET(reserved, 48 */ 9968 VERIFY_OFFSET(data, 64); 9969 9970 #undef VERIFY_OFFSET 9971 9972 #define VERIFY_OFFSET(member, offset) \ 9973 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9974 9975 VERIFY_OFFSET(IU_type, 0); 9976 VERIFY_OFFSET(direction, 1); 9977 VERIFY_OFFSET(reply_queue, 2); 9978 /* VERIFY_OFFSET(reserved1, 3); */ 9979 VERIFY_OFFSET(scsi_nexus, 4); 9980 VERIFY_OFFSET(Tag, 8); 9981 VERIFY_OFFSET(cdb, 16); 9982 VERIFY_OFFSET(cciss_lun, 32); 9983 VERIFY_OFFSET(data_len, 40); 9984 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9985 VERIFY_OFFSET(sg_count, 45); 9986 /* VERIFY_OFFSET(reserved3 */ 9987 VERIFY_OFFSET(err_ptr, 48); 9988 VERIFY_OFFSET(err_len, 56); 9989 /* VERIFY_OFFSET(reserved4 */ 9990 VERIFY_OFFSET(sg, 64); 9991 9992 #undef VERIFY_OFFSET 9993 9994 #define VERIFY_OFFSET(member, offset) \ 9995 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9996 9997 VERIFY_OFFSET(dev_handle, 0x00); 9998 VERIFY_OFFSET(reserved1, 0x02); 9999 VERIFY_OFFSET(function, 0x03); 10000 VERIFY_OFFSET(reserved2, 0x04); 10001 VERIFY_OFFSET(err_info, 0x0C); 10002 VERIFY_OFFSET(reserved3, 0x10); 10003 VERIFY_OFFSET(err_info_len, 0x12); 10004 VERIFY_OFFSET(reserved4, 0x13); 10005 VERIFY_OFFSET(sgl_offset, 0x14); 10006 VERIFY_OFFSET(reserved5, 0x15); 10007 VERIFY_OFFSET(transfer_len, 0x1C); 10008 VERIFY_OFFSET(reserved6, 0x20); 10009 VERIFY_OFFSET(io_flags, 0x24); 10010 VERIFY_OFFSET(reserved7, 0x26); 10011 VERIFY_OFFSET(LUN, 0x34); 10012 VERIFY_OFFSET(control, 0x3C); 10013 VERIFY_OFFSET(CDB, 0x40); 10014 VERIFY_OFFSET(reserved8, 0x50); 10015 VERIFY_OFFSET(host_context_flags, 0x60); 10016 VERIFY_OFFSET(timeout_sec, 0x62); 10017 VERIFY_OFFSET(ReplyQueue, 0x64); 10018 VERIFY_OFFSET(reserved9, 0x65); 10019 VERIFY_OFFSET(tag, 0x68); 10020 VERIFY_OFFSET(host_addr, 0x70); 10021 VERIFY_OFFSET(CISS_LUN, 0x78); 10022 VERIFY_OFFSET(SG, 0x78 + 8); 10023 #undef VERIFY_OFFSET 10024 } 10025 10026 module_init(hpsa_init); 10027 module_exit(hpsa_cleanup); 10028