1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/kernel.h> 27 #include <linux/slab.h> 28 #include <linux/delay.h> 29 #include <linux/fs.h> 30 #include <linux/timer.h> 31 #include <linux/seq_file.h> 32 #include <linux/init.h> 33 #include <linux/spinlock.h> 34 #include <linux/compat.h> 35 #include <linux/blktrace_api.h> 36 #include <linux/uaccess.h> 37 #include <linux/io.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/completion.h> 40 #include <linux/moduleparam.h> 41 #include <scsi/scsi.h> 42 #include <scsi/scsi_cmnd.h> 43 #include <scsi/scsi_device.h> 44 #include <scsi/scsi_host.h> 45 #include <scsi/scsi_tcq.h> 46 #include <linux/cciss_ioctl.h> 47 #include <linux/string.h> 48 #include <linux/bitmap.h> 49 #include <asm/atomic.h> 50 #include <linux/kthread.h> 51 #include "hpsa_cmd.h" 52 #include "hpsa.h" 53 54 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 55 #define HPSA_DRIVER_VERSION "2.0.2-1" 56 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 57 58 /* How long to wait (in milliseconds) for board to go into simple mode */ 59 #define MAX_CONFIG_WAIT 30000 60 #define MAX_IOCTL_CONFIG_WAIT 1000 61 62 /*define how many times we will try a command because of bus resets */ 63 #define MAX_CMD_RETRIES 3 64 65 /* Embedded module documentation macros - see modules.h */ 66 MODULE_AUTHOR("Hewlett-Packard Company"); 67 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 68 HPSA_DRIVER_VERSION); 69 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 70 MODULE_VERSION(HPSA_DRIVER_VERSION); 71 MODULE_LICENSE("GPL"); 72 73 static int hpsa_allow_any; 74 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 75 MODULE_PARM_DESC(hpsa_allow_any, 76 "Allow hpsa driver to access unknown HP Smart Array hardware"); 77 static int hpsa_simple_mode; 78 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 79 MODULE_PARM_DESC(hpsa_simple_mode, 80 "Use 'simple mode' rather than 'performant mode'"); 81 82 /* define the PCI info for the cards we can control */ 83 static const struct pci_device_id hpsa_pci_device_id[] = { 84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 99 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 100 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 101 {0,} 102 }; 103 104 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 105 106 /* board_id = Subsystem Device ID & Vendor ID 107 * product = Marketing Name for the board 108 * access = Address of the struct of function pointers 109 */ 110 static struct board_type products[] = { 111 {0x3241103C, "Smart Array P212", &SA5_access}, 112 {0x3243103C, "Smart Array P410", &SA5_access}, 113 {0x3245103C, "Smart Array P410i", &SA5_access}, 114 {0x3247103C, "Smart Array P411", &SA5_access}, 115 {0x3249103C, "Smart Array P812", &SA5_access}, 116 {0x324a103C, "Smart Array P712m", &SA5_access}, 117 {0x324b103C, "Smart Array P711m", &SA5_access}, 118 {0x3350103C, "Smart Array", &SA5_access}, 119 {0x3351103C, "Smart Array", &SA5_access}, 120 {0x3352103C, "Smart Array", &SA5_access}, 121 {0x3353103C, "Smart Array", &SA5_access}, 122 {0x3354103C, "Smart Array", &SA5_access}, 123 {0x3355103C, "Smart Array", &SA5_access}, 124 {0x3356103C, "Smart Array", &SA5_access}, 125 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 126 }; 127 128 static int number_of_controllers; 129 130 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 131 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 132 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); 133 static void start_io(struct ctlr_info *h); 134 135 #ifdef CONFIG_COMPAT 136 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); 137 #endif 138 139 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 140 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 141 static struct CommandList *cmd_alloc(struct ctlr_info *h); 142 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 143 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 144 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 145 int cmd_type); 146 147 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 148 static void hpsa_scan_start(struct Scsi_Host *); 149 static int hpsa_scan_finished(struct Scsi_Host *sh, 150 unsigned long elapsed_time); 151 static int hpsa_change_queue_depth(struct scsi_device *sdev, 152 int qdepth, int reason); 153 154 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 155 static int hpsa_slave_alloc(struct scsi_device *sdev); 156 static void hpsa_slave_destroy(struct scsi_device *sdev); 157 158 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 159 static int check_for_unit_attention(struct ctlr_info *h, 160 struct CommandList *c); 161 static void check_ioctl_unit_attention(struct ctlr_info *h, 162 struct CommandList *c); 163 /* performant mode helper functions */ 164 static void calc_bucket_map(int *bucket, int num_buckets, 165 int nsgs, int *bucket_map); 166 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 167 static inline u32 next_command(struct ctlr_info *h); 168 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 169 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 170 u64 *cfg_offset); 171 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 172 unsigned long *memory_bar); 173 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 174 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 175 void __iomem *vaddr, int wait_for_ready); 176 #define BOARD_NOT_READY 0 177 #define BOARD_READY 1 178 179 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 180 { 181 unsigned long *priv = shost_priv(sdev->host); 182 return (struct ctlr_info *) *priv; 183 } 184 185 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 186 { 187 unsigned long *priv = shost_priv(sh); 188 return (struct ctlr_info *) *priv; 189 } 190 191 static int check_for_unit_attention(struct ctlr_info *h, 192 struct CommandList *c) 193 { 194 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 195 return 0; 196 197 switch (c->err_info->SenseInfo[12]) { 198 case STATE_CHANGED: 199 dev_warn(&h->pdev->dev, "hpsa%d: a state change " 200 "detected, command retried\n", h->ctlr); 201 break; 202 case LUN_FAILED: 203 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure " 204 "detected, action required\n", h->ctlr); 205 break; 206 case REPORT_LUNS_CHANGED: 207 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data " 208 "changed, action required\n", h->ctlr); 209 /* 210 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. 211 */ 212 break; 213 case POWER_OR_RESET: 214 dev_warn(&h->pdev->dev, "hpsa%d: a power on " 215 "or device reset detected\n", h->ctlr); 216 break; 217 case UNIT_ATTENTION_CLEARED: 218 dev_warn(&h->pdev->dev, "hpsa%d: unit attention " 219 "cleared by another initiator\n", h->ctlr); 220 break; 221 default: 222 dev_warn(&h->pdev->dev, "hpsa%d: unknown " 223 "unit attention detected\n", h->ctlr); 224 break; 225 } 226 return 1; 227 } 228 229 static ssize_t host_store_rescan(struct device *dev, 230 struct device_attribute *attr, 231 const char *buf, size_t count) 232 { 233 struct ctlr_info *h; 234 struct Scsi_Host *shost = class_to_shost(dev); 235 h = shost_to_hba(shost); 236 hpsa_scan_start(h->scsi_host); 237 return count; 238 } 239 240 static ssize_t host_show_firmware_revision(struct device *dev, 241 struct device_attribute *attr, char *buf) 242 { 243 struct ctlr_info *h; 244 struct Scsi_Host *shost = class_to_shost(dev); 245 unsigned char *fwrev; 246 247 h = shost_to_hba(shost); 248 if (!h->hba_inquiry_data) 249 return 0; 250 fwrev = &h->hba_inquiry_data[32]; 251 return snprintf(buf, 20, "%c%c%c%c\n", 252 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 253 } 254 255 static ssize_t host_show_commands_outstanding(struct device *dev, 256 struct device_attribute *attr, char *buf) 257 { 258 struct Scsi_Host *shost = class_to_shost(dev); 259 struct ctlr_info *h = shost_to_hba(shost); 260 261 return snprintf(buf, 20, "%d\n", h->commands_outstanding); 262 } 263 264 static ssize_t host_show_transport_mode(struct device *dev, 265 struct device_attribute *attr, char *buf) 266 { 267 struct ctlr_info *h; 268 struct Scsi_Host *shost = class_to_shost(dev); 269 270 h = shost_to_hba(shost); 271 return snprintf(buf, 20, "%s\n", 272 h->transMethod & CFGTBL_Trans_Performant ? 273 "performant" : "simple"); 274 } 275 276 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 277 static u32 unresettable_controller[] = { 278 0x324a103C, /* Smart Array P712m */ 279 0x324b103C, /* SmartArray P711m */ 280 0x3223103C, /* Smart Array P800 */ 281 0x3234103C, /* Smart Array P400 */ 282 0x3235103C, /* Smart Array P400i */ 283 0x3211103C, /* Smart Array E200i */ 284 0x3212103C, /* Smart Array E200 */ 285 0x3213103C, /* Smart Array E200i */ 286 0x3214103C, /* Smart Array E200i */ 287 0x3215103C, /* Smart Array E200i */ 288 0x3237103C, /* Smart Array E500 */ 289 0x323D103C, /* Smart Array P700m */ 290 0x409C0E11, /* Smart Array 6400 */ 291 0x409D0E11, /* Smart Array 6400 EM */ 292 }; 293 294 /* List of controllers which cannot even be soft reset */ 295 static u32 soft_unresettable_controller[] = { 296 /* Exclude 640x boards. These are two pci devices in one slot 297 * which share a battery backed cache module. One controls the 298 * cache, the other accesses the cache through the one that controls 299 * it. If we reset the one controlling the cache, the other will 300 * likely not be happy. Just forbid resetting this conjoined mess. 301 * The 640x isn't really supported by hpsa anyway. 302 */ 303 0x409C0E11, /* Smart Array 6400 */ 304 0x409D0E11, /* Smart Array 6400 EM */ 305 }; 306 307 static int ctlr_is_hard_resettable(u32 board_id) 308 { 309 int i; 310 311 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 312 if (unresettable_controller[i] == board_id) 313 return 0; 314 return 1; 315 } 316 317 static int ctlr_is_soft_resettable(u32 board_id) 318 { 319 int i; 320 321 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 322 if (soft_unresettable_controller[i] == board_id) 323 return 0; 324 return 1; 325 } 326 327 static int ctlr_is_resettable(u32 board_id) 328 { 329 return ctlr_is_hard_resettable(board_id) || 330 ctlr_is_soft_resettable(board_id); 331 } 332 333 static ssize_t host_show_resettable(struct device *dev, 334 struct device_attribute *attr, char *buf) 335 { 336 struct ctlr_info *h; 337 struct Scsi_Host *shost = class_to_shost(dev); 338 339 h = shost_to_hba(shost); 340 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 341 } 342 343 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 344 { 345 return (scsi3addr[3] & 0xC0) == 0x40; 346 } 347 348 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 349 "UNKNOWN" 350 }; 351 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 352 353 static ssize_t raid_level_show(struct device *dev, 354 struct device_attribute *attr, char *buf) 355 { 356 ssize_t l = 0; 357 unsigned char rlevel; 358 struct ctlr_info *h; 359 struct scsi_device *sdev; 360 struct hpsa_scsi_dev_t *hdev; 361 unsigned long flags; 362 363 sdev = to_scsi_device(dev); 364 h = sdev_to_hba(sdev); 365 spin_lock_irqsave(&h->lock, flags); 366 hdev = sdev->hostdata; 367 if (!hdev) { 368 spin_unlock_irqrestore(&h->lock, flags); 369 return -ENODEV; 370 } 371 372 /* Is this even a logical drive? */ 373 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 374 spin_unlock_irqrestore(&h->lock, flags); 375 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 376 return l; 377 } 378 379 rlevel = hdev->raid_level; 380 spin_unlock_irqrestore(&h->lock, flags); 381 if (rlevel > RAID_UNKNOWN) 382 rlevel = RAID_UNKNOWN; 383 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 384 return l; 385 } 386 387 static ssize_t lunid_show(struct device *dev, 388 struct device_attribute *attr, char *buf) 389 { 390 struct ctlr_info *h; 391 struct scsi_device *sdev; 392 struct hpsa_scsi_dev_t *hdev; 393 unsigned long flags; 394 unsigned char lunid[8]; 395 396 sdev = to_scsi_device(dev); 397 h = sdev_to_hba(sdev); 398 spin_lock_irqsave(&h->lock, flags); 399 hdev = sdev->hostdata; 400 if (!hdev) { 401 spin_unlock_irqrestore(&h->lock, flags); 402 return -ENODEV; 403 } 404 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 405 spin_unlock_irqrestore(&h->lock, flags); 406 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 407 lunid[0], lunid[1], lunid[2], lunid[3], 408 lunid[4], lunid[5], lunid[6], lunid[7]); 409 } 410 411 static ssize_t unique_id_show(struct device *dev, 412 struct device_attribute *attr, char *buf) 413 { 414 struct ctlr_info *h; 415 struct scsi_device *sdev; 416 struct hpsa_scsi_dev_t *hdev; 417 unsigned long flags; 418 unsigned char sn[16]; 419 420 sdev = to_scsi_device(dev); 421 h = sdev_to_hba(sdev); 422 spin_lock_irqsave(&h->lock, flags); 423 hdev = sdev->hostdata; 424 if (!hdev) { 425 spin_unlock_irqrestore(&h->lock, flags); 426 return -ENODEV; 427 } 428 memcpy(sn, hdev->device_id, sizeof(sn)); 429 spin_unlock_irqrestore(&h->lock, flags); 430 return snprintf(buf, 16 * 2 + 2, 431 "%02X%02X%02X%02X%02X%02X%02X%02X" 432 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 433 sn[0], sn[1], sn[2], sn[3], 434 sn[4], sn[5], sn[6], sn[7], 435 sn[8], sn[9], sn[10], sn[11], 436 sn[12], sn[13], sn[14], sn[15]); 437 } 438 439 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 440 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 441 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 442 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 443 static DEVICE_ATTR(firmware_revision, S_IRUGO, 444 host_show_firmware_revision, NULL); 445 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 446 host_show_commands_outstanding, NULL); 447 static DEVICE_ATTR(transport_mode, S_IRUGO, 448 host_show_transport_mode, NULL); 449 static DEVICE_ATTR(resettable, S_IRUGO, 450 host_show_resettable, NULL); 451 452 static struct device_attribute *hpsa_sdev_attrs[] = { 453 &dev_attr_raid_level, 454 &dev_attr_lunid, 455 &dev_attr_unique_id, 456 NULL, 457 }; 458 459 static struct device_attribute *hpsa_shost_attrs[] = { 460 &dev_attr_rescan, 461 &dev_attr_firmware_revision, 462 &dev_attr_commands_outstanding, 463 &dev_attr_transport_mode, 464 &dev_attr_resettable, 465 NULL, 466 }; 467 468 static struct scsi_host_template hpsa_driver_template = { 469 .module = THIS_MODULE, 470 .name = "hpsa", 471 .proc_name = "hpsa", 472 .queuecommand = hpsa_scsi_queue_command, 473 .scan_start = hpsa_scan_start, 474 .scan_finished = hpsa_scan_finished, 475 .change_queue_depth = hpsa_change_queue_depth, 476 .this_id = -1, 477 .use_clustering = ENABLE_CLUSTERING, 478 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 479 .ioctl = hpsa_ioctl, 480 .slave_alloc = hpsa_slave_alloc, 481 .slave_destroy = hpsa_slave_destroy, 482 #ifdef CONFIG_COMPAT 483 .compat_ioctl = hpsa_compat_ioctl, 484 #endif 485 .sdev_attrs = hpsa_sdev_attrs, 486 .shost_attrs = hpsa_shost_attrs, 487 }; 488 489 490 /* Enqueuing and dequeuing functions for cmdlists. */ 491 static inline void addQ(struct list_head *list, struct CommandList *c) 492 { 493 list_add_tail(&c->list, list); 494 } 495 496 static inline u32 next_command(struct ctlr_info *h) 497 { 498 u32 a; 499 500 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 501 return h->access.command_completed(h); 502 503 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 504 a = *(h->reply_pool_head); /* Next cmd in ring buffer */ 505 (h->reply_pool_head)++; 506 h->commands_outstanding--; 507 } else { 508 a = FIFO_EMPTY; 509 } 510 /* Check for wraparound */ 511 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { 512 h->reply_pool_head = h->reply_pool; 513 h->reply_pool_wraparound ^= 1; 514 } 515 return a; 516 } 517 518 /* set_performant_mode: Modify the tag for cciss performant 519 * set bit 0 for pull model, bits 3-1 for block fetch 520 * register number 521 */ 522 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 523 { 524 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 525 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 526 } 527 528 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 529 struct CommandList *c) 530 { 531 unsigned long flags; 532 533 set_performant_mode(h, c); 534 spin_lock_irqsave(&h->lock, flags); 535 addQ(&h->reqQ, c); 536 h->Qdepth++; 537 start_io(h); 538 spin_unlock_irqrestore(&h->lock, flags); 539 } 540 541 static inline void removeQ(struct CommandList *c) 542 { 543 if (WARN_ON(list_empty(&c->list))) 544 return; 545 list_del_init(&c->list); 546 } 547 548 static inline int is_hba_lunid(unsigned char scsi3addr[]) 549 { 550 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 551 } 552 553 static inline int is_scsi_rev_5(struct ctlr_info *h) 554 { 555 if (!h->hba_inquiry_data) 556 return 0; 557 if ((h->hba_inquiry_data[2] & 0x07) == 5) 558 return 1; 559 return 0; 560 } 561 562 static int hpsa_find_target_lun(struct ctlr_info *h, 563 unsigned char scsi3addr[], int bus, int *target, int *lun) 564 { 565 /* finds an unused bus, target, lun for a new physical device 566 * assumes h->devlock is held 567 */ 568 int i, found = 0; 569 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA); 570 571 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3); 572 573 for (i = 0; i < h->ndevices; i++) { 574 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 575 set_bit(h->dev[i]->target, lun_taken); 576 } 577 578 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) { 579 if (!test_bit(i, lun_taken)) { 580 /* *bus = 1; */ 581 *target = i; 582 *lun = 0; 583 found = 1; 584 break; 585 } 586 } 587 return !found; 588 } 589 590 /* Add an entry into h->dev[] array. */ 591 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 592 struct hpsa_scsi_dev_t *device, 593 struct hpsa_scsi_dev_t *added[], int *nadded) 594 { 595 /* assumes h->devlock is held */ 596 int n = h->ndevices; 597 int i; 598 unsigned char addr1[8], addr2[8]; 599 struct hpsa_scsi_dev_t *sd; 600 601 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) { 602 dev_err(&h->pdev->dev, "too many devices, some will be " 603 "inaccessible.\n"); 604 return -1; 605 } 606 607 /* physical devices do not have lun or target assigned until now. */ 608 if (device->lun != -1) 609 /* Logical device, lun is already assigned. */ 610 goto lun_assigned; 611 612 /* If this device a non-zero lun of a multi-lun device 613 * byte 4 of the 8-byte LUN addr will contain the logical 614 * unit no, zero otherise. 615 */ 616 if (device->scsi3addr[4] == 0) { 617 /* This is not a non-zero lun of a multi-lun device */ 618 if (hpsa_find_target_lun(h, device->scsi3addr, 619 device->bus, &device->target, &device->lun) != 0) 620 return -1; 621 goto lun_assigned; 622 } 623 624 /* This is a non-zero lun of a multi-lun device. 625 * Search through our list and find the device which 626 * has the same 8 byte LUN address, excepting byte 4. 627 * Assign the same bus and target for this new LUN. 628 * Use the logical unit number from the firmware. 629 */ 630 memcpy(addr1, device->scsi3addr, 8); 631 addr1[4] = 0; 632 for (i = 0; i < n; i++) { 633 sd = h->dev[i]; 634 memcpy(addr2, sd->scsi3addr, 8); 635 addr2[4] = 0; 636 /* differ only in byte 4? */ 637 if (memcmp(addr1, addr2, 8) == 0) { 638 device->bus = sd->bus; 639 device->target = sd->target; 640 device->lun = device->scsi3addr[4]; 641 break; 642 } 643 } 644 if (device->lun == -1) { 645 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 646 " suspect firmware bug or unsupported hardware " 647 "configuration.\n"); 648 return -1; 649 } 650 651 lun_assigned: 652 653 h->dev[n] = device; 654 h->ndevices++; 655 added[*nadded] = device; 656 (*nadded)++; 657 658 /* initially, (before registering with scsi layer) we don't 659 * know our hostno and we don't want to print anything first 660 * time anyway (the scsi layer's inquiries will show that info) 661 */ 662 /* if (hostno != -1) */ 663 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 664 scsi_device_type(device->devtype), hostno, 665 device->bus, device->target, device->lun); 666 return 0; 667 } 668 669 /* Replace an entry from h->dev[] array. */ 670 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 671 int entry, struct hpsa_scsi_dev_t *new_entry, 672 struct hpsa_scsi_dev_t *added[], int *nadded, 673 struct hpsa_scsi_dev_t *removed[], int *nremoved) 674 { 675 /* assumes h->devlock is held */ 676 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA); 677 removed[*nremoved] = h->dev[entry]; 678 (*nremoved)++; 679 h->dev[entry] = new_entry; 680 added[*nadded] = new_entry; 681 (*nadded)++; 682 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 683 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 684 new_entry->target, new_entry->lun); 685 } 686 687 /* Remove an entry from h->dev[] array. */ 688 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 689 struct hpsa_scsi_dev_t *removed[], int *nremoved) 690 { 691 /* assumes h->devlock is held */ 692 int i; 693 struct hpsa_scsi_dev_t *sd; 694 695 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA); 696 697 sd = h->dev[entry]; 698 removed[*nremoved] = h->dev[entry]; 699 (*nremoved)++; 700 701 for (i = entry; i < h->ndevices-1; i++) 702 h->dev[i] = h->dev[i+1]; 703 h->ndevices--; 704 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 705 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 706 sd->lun); 707 } 708 709 #define SCSI3ADDR_EQ(a, b) ( \ 710 (a)[7] == (b)[7] && \ 711 (a)[6] == (b)[6] && \ 712 (a)[5] == (b)[5] && \ 713 (a)[4] == (b)[4] && \ 714 (a)[3] == (b)[3] && \ 715 (a)[2] == (b)[2] && \ 716 (a)[1] == (b)[1] && \ 717 (a)[0] == (b)[0]) 718 719 static void fixup_botched_add(struct ctlr_info *h, 720 struct hpsa_scsi_dev_t *added) 721 { 722 /* called when scsi_add_device fails in order to re-adjust 723 * h->dev[] to match the mid layer's view. 724 */ 725 unsigned long flags; 726 int i, j; 727 728 spin_lock_irqsave(&h->lock, flags); 729 for (i = 0; i < h->ndevices; i++) { 730 if (h->dev[i] == added) { 731 for (j = i; j < h->ndevices-1; j++) 732 h->dev[j] = h->dev[j+1]; 733 h->ndevices--; 734 break; 735 } 736 } 737 spin_unlock_irqrestore(&h->lock, flags); 738 kfree(added); 739 } 740 741 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 742 struct hpsa_scsi_dev_t *dev2) 743 { 744 /* we compare everything except lun and target as these 745 * are not yet assigned. Compare parts likely 746 * to differ first 747 */ 748 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 749 sizeof(dev1->scsi3addr)) != 0) 750 return 0; 751 if (memcmp(dev1->device_id, dev2->device_id, 752 sizeof(dev1->device_id)) != 0) 753 return 0; 754 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 755 return 0; 756 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 757 return 0; 758 if (dev1->devtype != dev2->devtype) 759 return 0; 760 if (dev1->bus != dev2->bus) 761 return 0; 762 return 1; 763 } 764 765 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 766 * and return needle location in *index. If scsi3addr matches, but not 767 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 768 * location in *index. If needle not found, return DEVICE_NOT_FOUND. 769 */ 770 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 771 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 772 int *index) 773 { 774 int i; 775 #define DEVICE_NOT_FOUND 0 776 #define DEVICE_CHANGED 1 777 #define DEVICE_SAME 2 778 for (i = 0; i < haystack_size; i++) { 779 if (haystack[i] == NULL) /* previously removed. */ 780 continue; 781 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 782 *index = i; 783 if (device_is_the_same(needle, haystack[i])) 784 return DEVICE_SAME; 785 else 786 return DEVICE_CHANGED; 787 } 788 } 789 *index = -1; 790 return DEVICE_NOT_FOUND; 791 } 792 793 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 794 struct hpsa_scsi_dev_t *sd[], int nsds) 795 { 796 /* sd contains scsi3 addresses and devtypes, and inquiry 797 * data. This function takes what's in sd to be the current 798 * reality and updates h->dev[] to reflect that reality. 799 */ 800 int i, entry, device_change, changes = 0; 801 struct hpsa_scsi_dev_t *csd; 802 unsigned long flags; 803 struct hpsa_scsi_dev_t **added, **removed; 804 int nadded, nremoved; 805 struct Scsi_Host *sh = NULL; 806 807 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA, 808 GFP_KERNEL); 809 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA, 810 GFP_KERNEL); 811 812 if (!added || !removed) { 813 dev_warn(&h->pdev->dev, "out of memory in " 814 "adjust_hpsa_scsi_table\n"); 815 goto free_and_out; 816 } 817 818 spin_lock_irqsave(&h->devlock, flags); 819 820 /* find any devices in h->dev[] that are not in 821 * sd[] and remove them from h->dev[], and for any 822 * devices which have changed, remove the old device 823 * info and add the new device info. 824 */ 825 i = 0; 826 nremoved = 0; 827 nadded = 0; 828 while (i < h->ndevices) { 829 csd = h->dev[i]; 830 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 831 if (device_change == DEVICE_NOT_FOUND) { 832 changes++; 833 hpsa_scsi_remove_entry(h, hostno, i, 834 removed, &nremoved); 835 continue; /* remove ^^^, hence i not incremented */ 836 } else if (device_change == DEVICE_CHANGED) { 837 changes++; 838 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 839 added, &nadded, removed, &nremoved); 840 /* Set it to NULL to prevent it from being freed 841 * at the bottom of hpsa_update_scsi_devices() 842 */ 843 sd[entry] = NULL; 844 } 845 i++; 846 } 847 848 /* Now, make sure every device listed in sd[] is also 849 * listed in h->dev[], adding them if they aren't found 850 */ 851 852 for (i = 0; i < nsds; i++) { 853 if (!sd[i]) /* if already added above. */ 854 continue; 855 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 856 h->ndevices, &entry); 857 if (device_change == DEVICE_NOT_FOUND) { 858 changes++; 859 if (hpsa_scsi_add_entry(h, hostno, sd[i], 860 added, &nadded) != 0) 861 break; 862 sd[i] = NULL; /* prevent from being freed later. */ 863 } else if (device_change == DEVICE_CHANGED) { 864 /* should never happen... */ 865 changes++; 866 dev_warn(&h->pdev->dev, 867 "device unexpectedly changed.\n"); 868 /* but if it does happen, we just ignore that device */ 869 } 870 } 871 spin_unlock_irqrestore(&h->devlock, flags); 872 873 /* Don't notify scsi mid layer of any changes the first time through 874 * (or if there are no changes) scsi_scan_host will do it later the 875 * first time through. 876 */ 877 if (hostno == -1 || !changes) 878 goto free_and_out; 879 880 sh = h->scsi_host; 881 /* Notify scsi mid layer of any removed devices */ 882 for (i = 0; i < nremoved; i++) { 883 struct scsi_device *sdev = 884 scsi_device_lookup(sh, removed[i]->bus, 885 removed[i]->target, removed[i]->lun); 886 if (sdev != NULL) { 887 scsi_remove_device(sdev); 888 scsi_device_put(sdev); 889 } else { 890 /* We don't expect to get here. 891 * future cmds to this device will get selection 892 * timeout as if the device was gone. 893 */ 894 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 895 " for removal.", hostno, removed[i]->bus, 896 removed[i]->target, removed[i]->lun); 897 } 898 kfree(removed[i]); 899 removed[i] = NULL; 900 } 901 902 /* Notify scsi mid layer of any added devices */ 903 for (i = 0; i < nadded; i++) { 904 if (scsi_add_device(sh, added[i]->bus, 905 added[i]->target, added[i]->lun) == 0) 906 continue; 907 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 908 "device not added.\n", hostno, added[i]->bus, 909 added[i]->target, added[i]->lun); 910 /* now we have to remove it from h->dev, 911 * since it didn't get added to scsi mid layer 912 */ 913 fixup_botched_add(h, added[i]); 914 } 915 916 free_and_out: 917 kfree(added); 918 kfree(removed); 919 } 920 921 /* 922 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * 923 * Assume's h->devlock is held. 924 */ 925 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 926 int bus, int target, int lun) 927 { 928 int i; 929 struct hpsa_scsi_dev_t *sd; 930 931 for (i = 0; i < h->ndevices; i++) { 932 sd = h->dev[i]; 933 if (sd->bus == bus && sd->target == target && sd->lun == lun) 934 return sd; 935 } 936 return NULL; 937 } 938 939 /* link sdev->hostdata to our per-device structure. */ 940 static int hpsa_slave_alloc(struct scsi_device *sdev) 941 { 942 struct hpsa_scsi_dev_t *sd; 943 unsigned long flags; 944 struct ctlr_info *h; 945 946 h = sdev_to_hba(sdev); 947 spin_lock_irqsave(&h->devlock, flags); 948 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 949 sdev_id(sdev), sdev->lun); 950 if (sd != NULL) 951 sdev->hostdata = sd; 952 spin_unlock_irqrestore(&h->devlock, flags); 953 return 0; 954 } 955 956 static void hpsa_slave_destroy(struct scsi_device *sdev) 957 { 958 /* nothing to do. */ 959 } 960 961 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 962 { 963 int i; 964 965 if (!h->cmd_sg_list) 966 return; 967 for (i = 0; i < h->nr_cmds; i++) { 968 kfree(h->cmd_sg_list[i]); 969 h->cmd_sg_list[i] = NULL; 970 } 971 kfree(h->cmd_sg_list); 972 h->cmd_sg_list = NULL; 973 } 974 975 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 976 { 977 int i; 978 979 if (h->chainsize <= 0) 980 return 0; 981 982 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 983 GFP_KERNEL); 984 if (!h->cmd_sg_list) 985 return -ENOMEM; 986 for (i = 0; i < h->nr_cmds; i++) { 987 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 988 h->chainsize, GFP_KERNEL); 989 if (!h->cmd_sg_list[i]) 990 goto clean; 991 } 992 return 0; 993 994 clean: 995 hpsa_free_sg_chain_blocks(h); 996 return -ENOMEM; 997 } 998 999 static void hpsa_map_sg_chain_block(struct ctlr_info *h, 1000 struct CommandList *c) 1001 { 1002 struct SGDescriptor *chain_sg, *chain_block; 1003 u64 temp64; 1004 1005 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1006 chain_block = h->cmd_sg_list[c->cmdindex]; 1007 chain_sg->Ext = HPSA_SG_CHAIN; 1008 chain_sg->Len = sizeof(*chain_sg) * 1009 (c->Header.SGTotal - h->max_cmd_sg_entries); 1010 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, 1011 PCI_DMA_TODEVICE); 1012 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); 1013 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); 1014 } 1015 1016 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1017 struct CommandList *c) 1018 { 1019 struct SGDescriptor *chain_sg; 1020 union u64bit temp64; 1021 1022 if (c->Header.SGTotal <= h->max_cmd_sg_entries) 1023 return; 1024 1025 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1026 temp64.val32.lower = chain_sg->Addr.lower; 1027 temp64.val32.upper = chain_sg->Addr.upper; 1028 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 1029 } 1030 1031 static void complete_scsi_command(struct CommandList *cp) 1032 { 1033 struct scsi_cmnd *cmd; 1034 struct ctlr_info *h; 1035 struct ErrorInfo *ei; 1036 1037 unsigned char sense_key; 1038 unsigned char asc; /* additional sense code */ 1039 unsigned char ascq; /* additional sense code qualifier */ 1040 1041 ei = cp->err_info; 1042 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1043 h = cp->h; 1044 1045 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1046 if (cp->Header.SGTotal > h->max_cmd_sg_entries) 1047 hpsa_unmap_sg_chain_block(h, cp); 1048 1049 cmd->result = (DID_OK << 16); /* host byte */ 1050 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1051 cmd->result |= ei->ScsiStatus; 1052 1053 /* copy the sense data whether we need to or not. */ 1054 memcpy(cmd->sense_buffer, ei->SenseInfo, 1055 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ? 1056 SCSI_SENSE_BUFFERSIZE : 1057 ei->SenseLen); 1058 scsi_set_resid(cmd, ei->ResidualCnt); 1059 1060 if (ei->CommandStatus == 0) { 1061 cmd->scsi_done(cmd); 1062 cmd_free(h, cp); 1063 return; 1064 } 1065 1066 /* an error has occurred */ 1067 switch (ei->CommandStatus) { 1068 1069 case CMD_TARGET_STATUS: 1070 if (ei->ScsiStatus) { 1071 /* Get sense key */ 1072 sense_key = 0xf & ei->SenseInfo[2]; 1073 /* Get additional sense code */ 1074 asc = ei->SenseInfo[12]; 1075 /* Get addition sense code qualifier */ 1076 ascq = ei->SenseInfo[13]; 1077 } 1078 1079 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1080 if (check_for_unit_attention(h, cp)) { 1081 cmd->result = DID_SOFT_ERROR << 16; 1082 break; 1083 } 1084 if (sense_key == ILLEGAL_REQUEST) { 1085 /* 1086 * SCSI REPORT_LUNS is commonly unsupported on 1087 * Smart Array. Suppress noisy complaint. 1088 */ 1089 if (cp->Request.CDB[0] == REPORT_LUNS) 1090 break; 1091 1092 /* If ASC/ASCQ indicate Logical Unit 1093 * Not Supported condition, 1094 */ 1095 if ((asc == 0x25) && (ascq == 0x0)) { 1096 dev_warn(&h->pdev->dev, "cp %p " 1097 "has check condition\n", cp); 1098 break; 1099 } 1100 } 1101 1102 if (sense_key == NOT_READY) { 1103 /* If Sense is Not Ready, Logical Unit 1104 * Not ready, Manual Intervention 1105 * required 1106 */ 1107 if ((asc == 0x04) && (ascq == 0x03)) { 1108 dev_warn(&h->pdev->dev, "cp %p " 1109 "has check condition: unit " 1110 "not ready, manual " 1111 "intervention required\n", cp); 1112 break; 1113 } 1114 } 1115 if (sense_key == ABORTED_COMMAND) { 1116 /* Aborted command is retryable */ 1117 dev_warn(&h->pdev->dev, "cp %p " 1118 "has check condition: aborted command: " 1119 "ASC: 0x%x, ASCQ: 0x%x\n", 1120 cp, asc, ascq); 1121 cmd->result = DID_SOFT_ERROR << 16; 1122 break; 1123 } 1124 /* Must be some other type of check condition */ 1125 dev_warn(&h->pdev->dev, "cp %p has check condition: " 1126 "unknown type: " 1127 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1128 "Returning result: 0x%x, " 1129 "cmd=[%02x %02x %02x %02x %02x " 1130 "%02x %02x %02x %02x %02x %02x " 1131 "%02x %02x %02x %02x %02x]\n", 1132 cp, sense_key, asc, ascq, 1133 cmd->result, 1134 cmd->cmnd[0], cmd->cmnd[1], 1135 cmd->cmnd[2], cmd->cmnd[3], 1136 cmd->cmnd[4], cmd->cmnd[5], 1137 cmd->cmnd[6], cmd->cmnd[7], 1138 cmd->cmnd[8], cmd->cmnd[9], 1139 cmd->cmnd[10], cmd->cmnd[11], 1140 cmd->cmnd[12], cmd->cmnd[13], 1141 cmd->cmnd[14], cmd->cmnd[15]); 1142 break; 1143 } 1144 1145 1146 /* Problem was not a check condition 1147 * Pass it up to the upper layers... 1148 */ 1149 if (ei->ScsiStatus) { 1150 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1151 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1152 "Returning result: 0x%x\n", 1153 cp, ei->ScsiStatus, 1154 sense_key, asc, ascq, 1155 cmd->result); 1156 } else { /* scsi status is zero??? How??? */ 1157 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1158 "Returning no connection.\n", cp), 1159 1160 /* Ordinarily, this case should never happen, 1161 * but there is a bug in some released firmware 1162 * revisions that allows it to happen if, for 1163 * example, a 4100 backplane loses power and 1164 * the tape drive is in it. We assume that 1165 * it's a fatal error of some kind because we 1166 * can't show that it wasn't. We will make it 1167 * look like selection timeout since that is 1168 * the most common reason for this to occur, 1169 * and it's severe enough. 1170 */ 1171 1172 cmd->result = DID_NO_CONNECT << 16; 1173 } 1174 break; 1175 1176 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1177 break; 1178 case CMD_DATA_OVERRUN: 1179 dev_warn(&h->pdev->dev, "cp %p has" 1180 " completed with data overrun " 1181 "reported\n", cp); 1182 break; 1183 case CMD_INVALID: { 1184 /* print_bytes(cp, sizeof(*cp), 1, 0); 1185 print_cmd(cp); */ 1186 /* We get CMD_INVALID if you address a non-existent device 1187 * instead of a selection timeout (no response). You will 1188 * see this if you yank out a drive, then try to access it. 1189 * This is kind of a shame because it means that any other 1190 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1191 * missing target. */ 1192 cmd->result = DID_NO_CONNECT << 16; 1193 } 1194 break; 1195 case CMD_PROTOCOL_ERR: 1196 dev_warn(&h->pdev->dev, "cp %p has " 1197 "protocol error \n", cp); 1198 break; 1199 case CMD_HARDWARE_ERR: 1200 cmd->result = DID_ERROR << 16; 1201 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1202 break; 1203 case CMD_CONNECTION_LOST: 1204 cmd->result = DID_ERROR << 16; 1205 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1206 break; 1207 case CMD_ABORTED: 1208 cmd->result = DID_ABORT << 16; 1209 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1210 cp, ei->ScsiStatus); 1211 break; 1212 case CMD_ABORT_FAILED: 1213 cmd->result = DID_ERROR << 16; 1214 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1215 break; 1216 case CMD_UNSOLICITED_ABORT: 1217 cmd->result = DID_RESET << 16; 1218 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited " 1219 "abort\n", cp); 1220 break; 1221 case CMD_TIMEOUT: 1222 cmd->result = DID_TIME_OUT << 16; 1223 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1224 break; 1225 case CMD_UNABORTABLE: 1226 cmd->result = DID_ERROR << 16; 1227 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1228 break; 1229 default: 1230 cmd->result = DID_ERROR << 16; 1231 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1232 cp, ei->CommandStatus); 1233 } 1234 cmd->scsi_done(cmd); 1235 cmd_free(h, cp); 1236 } 1237 1238 static int hpsa_scsi_detect(struct ctlr_info *h) 1239 { 1240 struct Scsi_Host *sh; 1241 int error; 1242 1243 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 1244 if (sh == NULL) 1245 goto fail; 1246 1247 sh->io_port = 0; 1248 sh->n_io_port = 0; 1249 sh->this_id = -1; 1250 sh->max_channel = 3; 1251 sh->max_cmd_len = MAX_COMMAND_SIZE; 1252 sh->max_lun = HPSA_MAX_LUN; 1253 sh->max_id = HPSA_MAX_LUN; 1254 sh->can_queue = h->nr_cmds; 1255 sh->cmd_per_lun = h->nr_cmds; 1256 sh->sg_tablesize = h->maxsgentries; 1257 h->scsi_host = sh; 1258 sh->hostdata[0] = (unsigned long) h; 1259 sh->irq = h->intr[h->intr_mode]; 1260 sh->unique_id = sh->irq; 1261 error = scsi_add_host(sh, &h->pdev->dev); 1262 if (error) 1263 goto fail_host_put; 1264 scsi_scan_host(sh); 1265 return 0; 1266 1267 fail_host_put: 1268 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host" 1269 " failed for controller %d\n", h->ctlr); 1270 scsi_host_put(sh); 1271 return error; 1272 fail: 1273 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc" 1274 " failed for controller %d\n", h->ctlr); 1275 return -ENOMEM; 1276 } 1277 1278 static void hpsa_pci_unmap(struct pci_dev *pdev, 1279 struct CommandList *c, int sg_used, int data_direction) 1280 { 1281 int i; 1282 union u64bit addr64; 1283 1284 for (i = 0; i < sg_used; i++) { 1285 addr64.val32.lower = c->SG[i].Addr.lower; 1286 addr64.val32.upper = c->SG[i].Addr.upper; 1287 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, 1288 data_direction); 1289 } 1290 } 1291 1292 static void hpsa_map_one(struct pci_dev *pdev, 1293 struct CommandList *cp, 1294 unsigned char *buf, 1295 size_t buflen, 1296 int data_direction) 1297 { 1298 u64 addr64; 1299 1300 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1301 cp->Header.SGList = 0; 1302 cp->Header.SGTotal = 0; 1303 return; 1304 } 1305 1306 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); 1307 cp->SG[0].Addr.lower = 1308 (u32) (addr64 & (u64) 0x00000000FFFFFFFF); 1309 cp->SG[0].Addr.upper = 1310 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); 1311 cp->SG[0].Len = buflen; 1312 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */ 1313 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ 1314 } 1315 1316 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1317 struct CommandList *c) 1318 { 1319 DECLARE_COMPLETION_ONSTACK(wait); 1320 1321 c->waiting = &wait; 1322 enqueue_cmd_and_start_io(h, c); 1323 wait_for_completion(&wait); 1324 } 1325 1326 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1327 struct CommandList *c, int data_direction) 1328 { 1329 int retry_count = 0; 1330 1331 do { 1332 memset(c->err_info, 0, sizeof(*c->err_info)); 1333 hpsa_scsi_do_simple_cmd_core(h, c); 1334 retry_count++; 1335 } while (check_for_unit_attention(h, c) && retry_count <= 3); 1336 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1337 } 1338 1339 static void hpsa_scsi_interpret_error(struct CommandList *cp) 1340 { 1341 struct ErrorInfo *ei; 1342 struct device *d = &cp->h->pdev->dev; 1343 1344 ei = cp->err_info; 1345 switch (ei->CommandStatus) { 1346 case CMD_TARGET_STATUS: 1347 dev_warn(d, "cmd %p has completed with errors\n", cp); 1348 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, 1349 ei->ScsiStatus); 1350 if (ei->ScsiStatus == 0) 1351 dev_warn(d, "SCSI status is abnormally zero. " 1352 "(probably indicates selection timeout " 1353 "reported incorrectly due to a known " 1354 "firmware bug, circa July, 2001.)\n"); 1355 break; 1356 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1357 dev_info(d, "UNDERRUN\n"); 1358 break; 1359 case CMD_DATA_OVERRUN: 1360 dev_warn(d, "cp %p has completed with data overrun\n", cp); 1361 break; 1362 case CMD_INVALID: { 1363 /* controller unfortunately reports SCSI passthru's 1364 * to non-existent targets as invalid commands. 1365 */ 1366 dev_warn(d, "cp %p is reported invalid (probably means " 1367 "target device no longer present)\n", cp); 1368 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); 1369 print_cmd(cp); */ 1370 } 1371 break; 1372 case CMD_PROTOCOL_ERR: 1373 dev_warn(d, "cp %p has protocol error \n", cp); 1374 break; 1375 case CMD_HARDWARE_ERR: 1376 /* cmd->result = DID_ERROR << 16; */ 1377 dev_warn(d, "cp %p had hardware error\n", cp); 1378 break; 1379 case CMD_CONNECTION_LOST: 1380 dev_warn(d, "cp %p had connection lost\n", cp); 1381 break; 1382 case CMD_ABORTED: 1383 dev_warn(d, "cp %p was aborted\n", cp); 1384 break; 1385 case CMD_ABORT_FAILED: 1386 dev_warn(d, "cp %p reports abort failed\n", cp); 1387 break; 1388 case CMD_UNSOLICITED_ABORT: 1389 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); 1390 break; 1391 case CMD_TIMEOUT: 1392 dev_warn(d, "cp %p timed out\n", cp); 1393 break; 1394 case CMD_UNABORTABLE: 1395 dev_warn(d, "Command unabortable\n"); 1396 break; 1397 default: 1398 dev_warn(d, "cp %p returned unknown status %x\n", cp, 1399 ei->CommandStatus); 1400 } 1401 } 1402 1403 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 1404 unsigned char page, unsigned char *buf, 1405 unsigned char bufsize) 1406 { 1407 int rc = IO_OK; 1408 struct CommandList *c; 1409 struct ErrorInfo *ei; 1410 1411 c = cmd_special_alloc(h); 1412 1413 if (c == NULL) { /* trouble... */ 1414 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1415 return -ENOMEM; 1416 } 1417 1418 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); 1419 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1420 ei = c->err_info; 1421 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 1422 hpsa_scsi_interpret_error(c); 1423 rc = -1; 1424 } 1425 cmd_special_free(h, c); 1426 return rc; 1427 } 1428 1429 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) 1430 { 1431 int rc = IO_OK; 1432 struct CommandList *c; 1433 struct ErrorInfo *ei; 1434 1435 c = cmd_special_alloc(h); 1436 1437 if (c == NULL) { /* trouble... */ 1438 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1439 return -ENOMEM; 1440 } 1441 1442 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG); 1443 hpsa_scsi_do_simple_cmd_core(h, c); 1444 /* no unmap needed here because no data xfer. */ 1445 1446 ei = c->err_info; 1447 if (ei->CommandStatus != 0) { 1448 hpsa_scsi_interpret_error(c); 1449 rc = -1; 1450 } 1451 cmd_special_free(h, c); 1452 return rc; 1453 } 1454 1455 static void hpsa_get_raid_level(struct ctlr_info *h, 1456 unsigned char *scsi3addr, unsigned char *raid_level) 1457 { 1458 int rc; 1459 unsigned char *buf; 1460 1461 *raid_level = RAID_UNKNOWN; 1462 buf = kzalloc(64, GFP_KERNEL); 1463 if (!buf) 1464 return; 1465 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); 1466 if (rc == 0) 1467 *raid_level = buf[8]; 1468 if (*raid_level > RAID_UNKNOWN) 1469 *raid_level = RAID_UNKNOWN; 1470 kfree(buf); 1471 return; 1472 } 1473 1474 /* Get the device id from inquiry page 0x83 */ 1475 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 1476 unsigned char *device_id, int buflen) 1477 { 1478 int rc; 1479 unsigned char *buf; 1480 1481 if (buflen > 16) 1482 buflen = 16; 1483 buf = kzalloc(64, GFP_KERNEL); 1484 if (!buf) 1485 return -1; 1486 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); 1487 if (rc == 0) 1488 memcpy(device_id, &buf[8], buflen); 1489 kfree(buf); 1490 return rc != 0; 1491 } 1492 1493 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 1494 struct ReportLUNdata *buf, int bufsize, 1495 int extended_response) 1496 { 1497 int rc = IO_OK; 1498 struct CommandList *c; 1499 unsigned char scsi3addr[8]; 1500 struct ErrorInfo *ei; 1501 1502 c = cmd_special_alloc(h); 1503 if (c == NULL) { /* trouble... */ 1504 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1505 return -1; 1506 } 1507 /* address the controller */ 1508 memset(scsi3addr, 0, sizeof(scsi3addr)); 1509 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1510 buf, bufsize, 0, scsi3addr, TYPE_CMD); 1511 if (extended_response) 1512 c->Request.CDB[1] = extended_response; 1513 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1514 ei = c->err_info; 1515 if (ei->CommandStatus != 0 && 1516 ei->CommandStatus != CMD_DATA_UNDERRUN) { 1517 hpsa_scsi_interpret_error(c); 1518 rc = -1; 1519 } 1520 cmd_special_free(h, c); 1521 return rc; 1522 } 1523 1524 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 1525 struct ReportLUNdata *buf, 1526 int bufsize, int extended_response) 1527 { 1528 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 1529 } 1530 1531 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 1532 struct ReportLUNdata *buf, int bufsize) 1533 { 1534 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 1535 } 1536 1537 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 1538 int bus, int target, int lun) 1539 { 1540 device->bus = bus; 1541 device->target = target; 1542 device->lun = lun; 1543 } 1544 1545 static int hpsa_update_device_info(struct ctlr_info *h, 1546 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device) 1547 { 1548 #define OBDR_TAPE_INQ_SIZE 49 1549 unsigned char *inq_buff; 1550 1551 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1552 if (!inq_buff) 1553 goto bail_out; 1554 1555 /* Do an inquiry to the device to see what it is. */ 1556 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1557 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1558 /* Inquiry failed (msg printed already) */ 1559 dev_err(&h->pdev->dev, 1560 "hpsa_update_device_info: inquiry failed\n"); 1561 goto bail_out; 1562 } 1563 1564 this_device->devtype = (inq_buff[0] & 0x1f); 1565 memcpy(this_device->scsi3addr, scsi3addr, 8); 1566 memcpy(this_device->vendor, &inq_buff[8], 1567 sizeof(this_device->vendor)); 1568 memcpy(this_device->model, &inq_buff[16], 1569 sizeof(this_device->model)); 1570 memset(this_device->device_id, 0, 1571 sizeof(this_device->device_id)); 1572 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 1573 sizeof(this_device->device_id)); 1574 1575 if (this_device->devtype == TYPE_DISK && 1576 is_logical_dev_addr_mode(scsi3addr)) 1577 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 1578 else 1579 this_device->raid_level = RAID_UNKNOWN; 1580 1581 kfree(inq_buff); 1582 return 0; 1583 1584 bail_out: 1585 kfree(inq_buff); 1586 return 1; 1587 } 1588 1589 static unsigned char *msa2xxx_model[] = { 1590 "MSA2012", 1591 "MSA2024", 1592 "MSA2312", 1593 "MSA2324", 1594 "P2000 G3 SAS", 1595 NULL, 1596 }; 1597 1598 static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1599 { 1600 int i; 1601 1602 for (i = 0; msa2xxx_model[i]; i++) 1603 if (strncmp(device->model, msa2xxx_model[i], 1604 strlen(msa2xxx_model[i])) == 0) 1605 return 1; 1606 return 0; 1607 } 1608 1609 /* Helper function to assign bus, target, lun mapping of devices. 1610 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical 1611 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 1612 * Logical drive target and lun are assigned at this time, but 1613 * physical device lun and target assignment are deferred (assigned 1614 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1615 */ 1616 static void figure_bus_target_lun(struct ctlr_info *h, 1617 u8 *lunaddrbytes, int *bus, int *target, int *lun, 1618 struct hpsa_scsi_dev_t *device) 1619 { 1620 u32 lunid; 1621 1622 if (is_logical_dev_addr_mode(lunaddrbytes)) { 1623 /* logical device */ 1624 if (unlikely(is_scsi_rev_5(h))) { 1625 /* p1210m, logical drives lun assignments 1626 * match SCSI REPORT LUNS data. 1627 */ 1628 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1629 *bus = 0; 1630 *target = 0; 1631 *lun = (lunid & 0x3fff) + 1; 1632 } else { 1633 /* not p1210m... */ 1634 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1635 if (is_msa2xxx(h, device)) { 1636 /* msa2xxx way, put logicals on bus 1 1637 * and match target/lun numbers box 1638 * reports. 1639 */ 1640 *bus = 1; 1641 *target = (lunid >> 16) & 0x3fff; 1642 *lun = lunid & 0x00ff; 1643 } else { 1644 /* Traditional smart array way. */ 1645 *bus = 0; 1646 *lun = 0; 1647 *target = lunid & 0x3fff; 1648 } 1649 } 1650 } else { 1651 /* physical device */ 1652 if (is_hba_lunid(lunaddrbytes)) 1653 if (unlikely(is_scsi_rev_5(h))) { 1654 *bus = 0; /* put p1210m ctlr at 0,0,0 */ 1655 *target = 0; 1656 *lun = 0; 1657 return; 1658 } else 1659 *bus = 3; /* traditional smartarray */ 1660 else 1661 *bus = 2; /* physical disk */ 1662 *target = -1; 1663 *lun = -1; /* we will fill these in later. */ 1664 } 1665 } 1666 1667 /* 1668 * If there is no lun 0 on a target, linux won't find any devices. 1669 * For the MSA2xxx boxes, we have to manually detect the enclosure 1670 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 1671 * it for some reason. *tmpdevice is the target we're adding, 1672 * this_device is a pointer into the current element of currentsd[] 1673 * that we're building up in update_scsi_devices(), below. 1674 * lunzerobits is a bitmap that tracks which targets already have a 1675 * lun 0 assigned. 1676 * Returns 1 if an enclosure was added, 0 if not. 1677 */ 1678 static int add_msa2xxx_enclosure_device(struct ctlr_info *h, 1679 struct hpsa_scsi_dev_t *tmpdevice, 1680 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 1681 int bus, int target, int lun, unsigned long lunzerobits[], 1682 int *nmsa2xxx_enclosures) 1683 { 1684 unsigned char scsi3addr[8]; 1685 1686 if (test_bit(target, lunzerobits)) 1687 return 0; /* There is already a lun 0 on this target. */ 1688 1689 if (!is_logical_dev_addr_mode(lunaddrbytes)) 1690 return 0; /* It's the logical targets that may lack lun 0. */ 1691 1692 if (!is_msa2xxx(h, tmpdevice)) 1693 return 0; /* It's only the MSA2xxx that have this problem. */ 1694 1695 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */ 1696 return 0; 1697 1698 memset(scsi3addr, 0, 8); 1699 scsi3addr[3] = target; 1700 if (is_hba_lunid(scsi3addr)) 1701 return 0; /* Don't add the RAID controller here. */ 1702 1703 if (is_scsi_rev_5(h)) 1704 return 0; /* p1210m doesn't need to do this. */ 1705 1706 #define MAX_MSA2XXX_ENCLOSURES 32 1707 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) { 1708 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX " 1709 "enclosures exceeded. Check your hardware " 1710 "configuration."); 1711 return 0; 1712 } 1713 1714 if (hpsa_update_device_info(h, scsi3addr, this_device)) 1715 return 0; 1716 (*nmsa2xxx_enclosures)++; 1717 hpsa_set_bus_target_lun(this_device, bus, target, 0); 1718 set_bit(target, lunzerobits); 1719 return 1; 1720 } 1721 1722 /* 1723 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 1724 * logdev. The number of luns in physdev and logdev are returned in 1725 * *nphysicals and *nlogicals, respectively. 1726 * Returns 0 on success, -1 otherwise. 1727 */ 1728 static int hpsa_gather_lun_info(struct ctlr_info *h, 1729 int reportlunsize, 1730 struct ReportLUNdata *physdev, u32 *nphysicals, 1731 struct ReportLUNdata *logdev, u32 *nlogicals) 1732 { 1733 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1734 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1735 return -1; 1736 } 1737 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; 1738 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1739 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1740 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1741 *nphysicals - HPSA_MAX_PHYS_LUN); 1742 *nphysicals = HPSA_MAX_PHYS_LUN; 1743 } 1744 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { 1745 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1746 return -1; 1747 } 1748 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 1749 /* Reject Logicals in excess of our max capability. */ 1750 if (*nlogicals > HPSA_MAX_LUN) { 1751 dev_warn(&h->pdev->dev, 1752 "maximum logical LUNs (%d) exceeded. " 1753 "%d LUNs ignored.\n", HPSA_MAX_LUN, 1754 *nlogicals - HPSA_MAX_LUN); 1755 *nlogicals = HPSA_MAX_LUN; 1756 } 1757 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 1758 dev_warn(&h->pdev->dev, 1759 "maximum logical + physical LUNs (%d) exceeded. " 1760 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1761 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 1762 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 1763 } 1764 return 0; 1765 } 1766 1767 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, 1768 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, 1769 struct ReportLUNdata *logdev_list) 1770 { 1771 /* Helper function, figure out where the LUN ID info is coming from 1772 * given index i, lists of physical and logical devices, where in 1773 * the list the raid controller is supposed to appear (first or last) 1774 */ 1775 1776 int logicals_start = nphysicals + (raid_ctlr_position == 0); 1777 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 1778 1779 if (i == raid_ctlr_position) 1780 return RAID_CTLR_LUNID; 1781 1782 if (i < logicals_start) 1783 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; 1784 1785 if (i < last_device) 1786 return &logdev_list->LUN[i - nphysicals - 1787 (raid_ctlr_position == 0)][0]; 1788 BUG(); 1789 return NULL; 1790 } 1791 1792 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1793 { 1794 /* the idea here is we could get notified 1795 * that some devices have changed, so we do a report 1796 * physical luns and report logical luns cmd, and adjust 1797 * our list of devices accordingly. 1798 * 1799 * The scsi3addr's of devices won't change so long as the 1800 * adapter is not reset. That means we can rescan and 1801 * tell which devices we already know about, vs. new 1802 * devices, vs. disappearing devices. 1803 */ 1804 struct ReportLUNdata *physdev_list = NULL; 1805 struct ReportLUNdata *logdev_list = NULL; 1806 unsigned char *inq_buff = NULL; 1807 u32 nphysicals = 0; 1808 u32 nlogicals = 0; 1809 u32 ndev_allocated = 0; 1810 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1811 int ncurrent = 0; 1812 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1813 int i, nmsa2xxx_enclosures, ndevs_to_allocate; 1814 int bus, target, lun; 1815 int raid_ctlr_position; 1816 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR); 1817 1818 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA, 1819 GFP_KERNEL); 1820 physdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1821 logdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1822 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1823 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 1824 1825 if (!currentsd || !physdev_list || !logdev_list || 1826 !inq_buff || !tmpdevice) { 1827 dev_err(&h->pdev->dev, "out of memory\n"); 1828 goto out; 1829 } 1830 memset(lunzerobits, 0, sizeof(lunzerobits)); 1831 1832 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, 1833 logdev_list, &nlogicals)) 1834 goto out; 1835 1836 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them 1837 * but each of them 4 times through different paths. The plus 1 1838 * is for the RAID controller. 1839 */ 1840 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1; 1841 1842 /* Allocate the per device structures */ 1843 for (i = 0; i < ndevs_to_allocate; i++) { 1844 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 1845 if (!currentsd[i]) { 1846 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 1847 __FILE__, __LINE__); 1848 goto out; 1849 } 1850 ndev_allocated++; 1851 } 1852 1853 if (unlikely(is_scsi_rev_5(h))) 1854 raid_ctlr_position = 0; 1855 else 1856 raid_ctlr_position = nphysicals + nlogicals; 1857 1858 /* adjust our table of devices */ 1859 nmsa2xxx_enclosures = 0; 1860 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 1861 u8 *lunaddrbytes; 1862 1863 /* Figure out where the LUN ID info is coming from */ 1864 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 1865 i, nphysicals, nlogicals, physdev_list, logdev_list); 1866 /* skip masked physical devices. */ 1867 if (lunaddrbytes[3] & 0xC0 && 1868 i < nphysicals + (raid_ctlr_position == 0)) 1869 continue; 1870 1871 /* Get device type, vendor, model, device id */ 1872 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice)) 1873 continue; /* skip it if we can't talk to it. */ 1874 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun, 1875 tmpdevice); 1876 this_device = currentsd[ncurrent]; 1877 1878 /* 1879 * For the msa2xxx boxes, we have to insert a LUN 0 which 1880 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 1881 * is nonetheless an enclosure device there. We have to 1882 * present that otherwise linux won't find anything if 1883 * there is no lun 0. 1884 */ 1885 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device, 1886 lunaddrbytes, bus, target, lun, lunzerobits, 1887 &nmsa2xxx_enclosures)) { 1888 ncurrent++; 1889 this_device = currentsd[ncurrent]; 1890 } 1891 1892 *this_device = *tmpdevice; 1893 hpsa_set_bus_target_lun(this_device, bus, target, lun); 1894 1895 switch (this_device->devtype) { 1896 case TYPE_ROM: { 1897 /* We don't *really* support actual CD-ROM devices, 1898 * just "One Button Disaster Recovery" tape drive 1899 * which temporarily pretends to be a CD-ROM drive. 1900 * So we check that the device is really an OBDR tape 1901 * device by checking for "$DR-10" in bytes 43-48 of 1902 * the inquiry data. 1903 */ 1904 char obdr_sig[7]; 1905 #define OBDR_TAPE_SIG "$DR-10" 1906 strncpy(obdr_sig, &inq_buff[43], 6); 1907 obdr_sig[6] = '\0'; 1908 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0) 1909 /* Not OBDR device, ignore it. */ 1910 break; 1911 } 1912 ncurrent++; 1913 break; 1914 case TYPE_DISK: 1915 if (i < nphysicals) 1916 break; 1917 ncurrent++; 1918 break; 1919 case TYPE_TAPE: 1920 case TYPE_MEDIUM_CHANGER: 1921 ncurrent++; 1922 break; 1923 case TYPE_RAID: 1924 /* Only present the Smartarray HBA as a RAID controller. 1925 * If it's a RAID controller other than the HBA itself 1926 * (an external RAID controller, MSA500 or similar) 1927 * don't present it. 1928 */ 1929 if (!is_hba_lunid(lunaddrbytes)) 1930 break; 1931 ncurrent++; 1932 break; 1933 default: 1934 break; 1935 } 1936 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA) 1937 break; 1938 } 1939 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 1940 out: 1941 kfree(tmpdevice); 1942 for (i = 0; i < ndev_allocated; i++) 1943 kfree(currentsd[i]); 1944 kfree(currentsd); 1945 kfree(inq_buff); 1946 kfree(physdev_list); 1947 kfree(logdev_list); 1948 } 1949 1950 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 1951 * dma mapping and fills in the scatter gather entries of the 1952 * hpsa command, cp. 1953 */ 1954 static int hpsa_scatter_gather(struct ctlr_info *h, 1955 struct CommandList *cp, 1956 struct scsi_cmnd *cmd) 1957 { 1958 unsigned int len; 1959 struct scatterlist *sg; 1960 u64 addr64; 1961 int use_sg, i, sg_index, chained; 1962 struct SGDescriptor *curr_sg; 1963 1964 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 1965 1966 use_sg = scsi_dma_map(cmd); 1967 if (use_sg < 0) 1968 return use_sg; 1969 1970 if (!use_sg) 1971 goto sglist_finished; 1972 1973 curr_sg = cp->SG; 1974 chained = 0; 1975 sg_index = 0; 1976 scsi_for_each_sg(cmd, sg, use_sg, i) { 1977 if (i == h->max_cmd_sg_entries - 1 && 1978 use_sg > h->max_cmd_sg_entries) { 1979 chained = 1; 1980 curr_sg = h->cmd_sg_list[cp->cmdindex]; 1981 sg_index = 0; 1982 } 1983 addr64 = (u64) sg_dma_address(sg); 1984 len = sg_dma_len(sg); 1985 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); 1986 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); 1987 curr_sg->Len = len; 1988 curr_sg->Ext = 0; /* we are not chaining */ 1989 curr_sg++; 1990 } 1991 1992 if (use_sg + chained > h->maxSG) 1993 h->maxSG = use_sg + chained; 1994 1995 if (chained) { 1996 cp->Header.SGList = h->max_cmd_sg_entries; 1997 cp->Header.SGTotal = (u16) (use_sg + 1); 1998 hpsa_map_sg_chain_block(h, cp); 1999 return 0; 2000 } 2001 2002 sglist_finished: 2003 2004 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 2005 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ 2006 return 0; 2007 } 2008 2009 2010 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, 2011 void (*done)(struct scsi_cmnd *)) 2012 { 2013 struct ctlr_info *h; 2014 struct hpsa_scsi_dev_t *dev; 2015 unsigned char scsi3addr[8]; 2016 struct CommandList *c; 2017 unsigned long flags; 2018 2019 /* Get the ptr to our adapter structure out of cmd->host. */ 2020 h = sdev_to_hba(cmd->device); 2021 dev = cmd->device->hostdata; 2022 if (!dev) { 2023 cmd->result = DID_NO_CONNECT << 16; 2024 done(cmd); 2025 return 0; 2026 } 2027 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 2028 2029 /* Need a lock as this is being allocated from the pool */ 2030 spin_lock_irqsave(&h->lock, flags); 2031 c = cmd_alloc(h); 2032 spin_unlock_irqrestore(&h->lock, flags); 2033 if (c == NULL) { /* trouble... */ 2034 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 2035 return SCSI_MLQUEUE_HOST_BUSY; 2036 } 2037 2038 /* Fill in the command list header */ 2039 2040 cmd->scsi_done = done; /* save this for use by completion code */ 2041 2042 /* save c in case we have to abort it */ 2043 cmd->host_scribble = (unsigned char *) c; 2044 2045 c->cmd_type = CMD_SCSI; 2046 c->scsi_cmd = cmd; 2047 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2048 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 2049 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); 2050 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; 2051 2052 /* Fill in the request block... */ 2053 2054 c->Request.Timeout = 0; 2055 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 2056 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 2057 c->Request.CDBLen = cmd->cmd_len; 2058 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 2059 c->Request.Type.Type = TYPE_CMD; 2060 c->Request.Type.Attribute = ATTR_SIMPLE; 2061 switch (cmd->sc_data_direction) { 2062 case DMA_TO_DEVICE: 2063 c->Request.Type.Direction = XFER_WRITE; 2064 break; 2065 case DMA_FROM_DEVICE: 2066 c->Request.Type.Direction = XFER_READ; 2067 break; 2068 case DMA_NONE: 2069 c->Request.Type.Direction = XFER_NONE; 2070 break; 2071 case DMA_BIDIRECTIONAL: 2072 /* This can happen if a buggy application does a scsi passthru 2073 * and sets both inlen and outlen to non-zero. ( see 2074 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 2075 */ 2076 2077 c->Request.Type.Direction = XFER_RSVD; 2078 /* This is technically wrong, and hpsa controllers should 2079 * reject it with CMD_INVALID, which is the most correct 2080 * response, but non-fibre backends appear to let it 2081 * slide by, and give the same results as if this field 2082 * were set correctly. Either way is acceptable for 2083 * our purposes here. 2084 */ 2085 2086 break; 2087 2088 default: 2089 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 2090 cmd->sc_data_direction); 2091 BUG(); 2092 break; 2093 } 2094 2095 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 2096 cmd_free(h, c); 2097 return SCSI_MLQUEUE_HOST_BUSY; 2098 } 2099 enqueue_cmd_and_start_io(h, c); 2100 /* the cmd'll come back via intr handler in complete_scsi_command() */ 2101 return 0; 2102 } 2103 2104 static DEF_SCSI_QCMD(hpsa_scsi_queue_command) 2105 2106 static void hpsa_scan_start(struct Scsi_Host *sh) 2107 { 2108 struct ctlr_info *h = shost_to_hba(sh); 2109 unsigned long flags; 2110 2111 /* wait until any scan already in progress is finished. */ 2112 while (1) { 2113 spin_lock_irqsave(&h->scan_lock, flags); 2114 if (h->scan_finished) 2115 break; 2116 spin_unlock_irqrestore(&h->scan_lock, flags); 2117 wait_event(h->scan_wait_queue, h->scan_finished); 2118 /* Note: We don't need to worry about a race between this 2119 * thread and driver unload because the midlayer will 2120 * have incremented the reference count, so unload won't 2121 * happen if we're in here. 2122 */ 2123 } 2124 h->scan_finished = 0; /* mark scan as in progress */ 2125 spin_unlock_irqrestore(&h->scan_lock, flags); 2126 2127 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 2128 2129 spin_lock_irqsave(&h->scan_lock, flags); 2130 h->scan_finished = 1; /* mark scan as finished. */ 2131 wake_up_all(&h->scan_wait_queue); 2132 spin_unlock_irqrestore(&h->scan_lock, flags); 2133 } 2134 2135 static int hpsa_scan_finished(struct Scsi_Host *sh, 2136 unsigned long elapsed_time) 2137 { 2138 struct ctlr_info *h = shost_to_hba(sh); 2139 unsigned long flags; 2140 int finished; 2141 2142 spin_lock_irqsave(&h->scan_lock, flags); 2143 finished = h->scan_finished; 2144 spin_unlock_irqrestore(&h->scan_lock, flags); 2145 return finished; 2146 } 2147 2148 static int hpsa_change_queue_depth(struct scsi_device *sdev, 2149 int qdepth, int reason) 2150 { 2151 struct ctlr_info *h = sdev_to_hba(sdev); 2152 2153 if (reason != SCSI_QDEPTH_DEFAULT) 2154 return -ENOTSUPP; 2155 2156 if (qdepth < 1) 2157 qdepth = 1; 2158 else 2159 if (qdepth > h->nr_cmds) 2160 qdepth = h->nr_cmds; 2161 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 2162 return sdev->queue_depth; 2163 } 2164 2165 static void hpsa_unregister_scsi(struct ctlr_info *h) 2166 { 2167 /* we are being forcibly unloaded, and may not refuse. */ 2168 scsi_remove_host(h->scsi_host); 2169 scsi_host_put(h->scsi_host); 2170 h->scsi_host = NULL; 2171 } 2172 2173 static int hpsa_register_scsi(struct ctlr_info *h) 2174 { 2175 int rc; 2176 2177 rc = hpsa_scsi_detect(h); 2178 if (rc != 0) 2179 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed" 2180 " hpsa_scsi_detect(), rc is %d\n", rc); 2181 return rc; 2182 } 2183 2184 static int wait_for_device_to_become_ready(struct ctlr_info *h, 2185 unsigned char lunaddr[]) 2186 { 2187 int rc = 0; 2188 int count = 0; 2189 int waittime = 1; /* seconds */ 2190 struct CommandList *c; 2191 2192 c = cmd_special_alloc(h); 2193 if (!c) { 2194 dev_warn(&h->pdev->dev, "out of memory in " 2195 "wait_for_device_to_become_ready.\n"); 2196 return IO_ERROR; 2197 } 2198 2199 /* Send test unit ready until device ready, or give up. */ 2200 while (count < HPSA_TUR_RETRY_LIMIT) { 2201 2202 /* Wait for a bit. do this first, because if we send 2203 * the TUR right away, the reset will just abort it. 2204 */ 2205 msleep(1000 * waittime); 2206 count++; 2207 2208 /* Increase wait time with each try, up to a point. */ 2209 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 2210 waittime = waittime * 2; 2211 2212 /* Send the Test Unit Ready */ 2213 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD); 2214 hpsa_scsi_do_simple_cmd_core(h, c); 2215 /* no unmap needed here because no data xfer. */ 2216 2217 if (c->err_info->CommandStatus == CMD_SUCCESS) 2218 break; 2219 2220 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2221 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 2222 (c->err_info->SenseInfo[2] == NO_SENSE || 2223 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 2224 break; 2225 2226 dev_warn(&h->pdev->dev, "waiting %d secs " 2227 "for device to become ready.\n", waittime); 2228 rc = 1; /* device not ready. */ 2229 } 2230 2231 if (rc) 2232 dev_warn(&h->pdev->dev, "giving up on device.\n"); 2233 else 2234 dev_warn(&h->pdev->dev, "device is ready.\n"); 2235 2236 cmd_special_free(h, c); 2237 return rc; 2238 } 2239 2240 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 2241 * complaining. Doing a host- or bus-reset can't do anything good here. 2242 */ 2243 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 2244 { 2245 int rc; 2246 struct ctlr_info *h; 2247 struct hpsa_scsi_dev_t *dev; 2248 2249 /* find the controller to which the command to be aborted was sent */ 2250 h = sdev_to_hba(scsicmd->device); 2251 if (h == NULL) /* paranoia */ 2252 return FAILED; 2253 dev = scsicmd->device->hostdata; 2254 if (!dev) { 2255 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2256 "device lookup failed.\n"); 2257 return FAILED; 2258 } 2259 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 2260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2261 /* send a reset to the SCSI LUN which the command was sent to */ 2262 rc = hpsa_send_reset(h, dev->scsi3addr); 2263 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2264 return SUCCESS; 2265 2266 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 2267 return FAILED; 2268 } 2269 2270 /* 2271 * For operations that cannot sleep, a command block is allocated at init, 2272 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 2273 * which ones are free or in use. Lock must be held when calling this. 2274 * cmd_free() is the complement. 2275 */ 2276 static struct CommandList *cmd_alloc(struct ctlr_info *h) 2277 { 2278 struct CommandList *c; 2279 int i; 2280 union u64bit temp64; 2281 dma_addr_t cmd_dma_handle, err_dma_handle; 2282 2283 do { 2284 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 2285 if (i == h->nr_cmds) 2286 return NULL; 2287 } while (test_and_set_bit 2288 (i & (BITS_PER_LONG - 1), 2289 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 2290 c = h->cmd_pool + i; 2291 memset(c, 0, sizeof(*c)); 2292 cmd_dma_handle = h->cmd_pool_dhandle 2293 + i * sizeof(*c); 2294 c->err_info = h->errinfo_pool + i; 2295 memset(c->err_info, 0, sizeof(*c->err_info)); 2296 err_dma_handle = h->errinfo_pool_dhandle 2297 + i * sizeof(*c->err_info); 2298 h->nr_allocs++; 2299 2300 c->cmdindex = i; 2301 2302 INIT_LIST_HEAD(&c->list); 2303 c->busaddr = (u32) cmd_dma_handle; 2304 temp64.val = (u64) err_dma_handle; 2305 c->ErrDesc.Addr.lower = temp64.val32.lower; 2306 c->ErrDesc.Addr.upper = temp64.val32.upper; 2307 c->ErrDesc.Len = sizeof(*c->err_info); 2308 2309 c->h = h; 2310 return c; 2311 } 2312 2313 /* For operations that can wait for kmalloc to possibly sleep, 2314 * this routine can be called. Lock need not be held to call 2315 * cmd_special_alloc. cmd_special_free() is the complement. 2316 */ 2317 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 2318 { 2319 struct CommandList *c; 2320 union u64bit temp64; 2321 dma_addr_t cmd_dma_handle, err_dma_handle; 2322 2323 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 2324 if (c == NULL) 2325 return NULL; 2326 memset(c, 0, sizeof(*c)); 2327 2328 c->cmdindex = -1; 2329 2330 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), 2331 &err_dma_handle); 2332 2333 if (c->err_info == NULL) { 2334 pci_free_consistent(h->pdev, 2335 sizeof(*c), c, cmd_dma_handle); 2336 return NULL; 2337 } 2338 memset(c->err_info, 0, sizeof(*c->err_info)); 2339 2340 INIT_LIST_HEAD(&c->list); 2341 c->busaddr = (u32) cmd_dma_handle; 2342 temp64.val = (u64) err_dma_handle; 2343 c->ErrDesc.Addr.lower = temp64.val32.lower; 2344 c->ErrDesc.Addr.upper = temp64.val32.upper; 2345 c->ErrDesc.Len = sizeof(*c->err_info); 2346 2347 c->h = h; 2348 return c; 2349 } 2350 2351 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 2352 { 2353 int i; 2354 2355 i = c - h->cmd_pool; 2356 clear_bit(i & (BITS_PER_LONG - 1), 2357 h->cmd_pool_bits + (i / BITS_PER_LONG)); 2358 h->nr_frees++; 2359 } 2360 2361 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 2362 { 2363 union u64bit temp64; 2364 2365 temp64.val32.lower = c->ErrDesc.Addr.lower; 2366 temp64.val32.upper = c->ErrDesc.Addr.upper; 2367 pci_free_consistent(h->pdev, sizeof(*c->err_info), 2368 c->err_info, (dma_addr_t) temp64.val); 2369 pci_free_consistent(h->pdev, sizeof(*c), 2370 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 2371 } 2372 2373 #ifdef CONFIG_COMPAT 2374 2375 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2376 { 2377 IOCTL32_Command_struct __user *arg32 = 2378 (IOCTL32_Command_struct __user *) arg; 2379 IOCTL_Command_struct arg64; 2380 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 2381 int err; 2382 u32 cp; 2383 2384 memset(&arg64, 0, sizeof(arg64)); 2385 err = 0; 2386 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2387 sizeof(arg64.LUN_info)); 2388 err |= copy_from_user(&arg64.Request, &arg32->Request, 2389 sizeof(arg64.Request)); 2390 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2391 sizeof(arg64.error_info)); 2392 err |= get_user(arg64.buf_size, &arg32->buf_size); 2393 err |= get_user(cp, &arg32->buf); 2394 arg64.buf = compat_ptr(cp); 2395 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2396 2397 if (err) 2398 return -EFAULT; 2399 2400 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2401 if (err) 2402 return err; 2403 err |= copy_in_user(&arg32->error_info, &p->error_info, 2404 sizeof(arg32->error_info)); 2405 if (err) 2406 return -EFAULT; 2407 return err; 2408 } 2409 2410 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 2411 int cmd, void *arg) 2412 { 2413 BIG_IOCTL32_Command_struct __user *arg32 = 2414 (BIG_IOCTL32_Command_struct __user *) arg; 2415 BIG_IOCTL_Command_struct arg64; 2416 BIG_IOCTL_Command_struct __user *p = 2417 compat_alloc_user_space(sizeof(arg64)); 2418 int err; 2419 u32 cp; 2420 2421 memset(&arg64, 0, sizeof(arg64)); 2422 err = 0; 2423 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2424 sizeof(arg64.LUN_info)); 2425 err |= copy_from_user(&arg64.Request, &arg32->Request, 2426 sizeof(arg64.Request)); 2427 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2428 sizeof(arg64.error_info)); 2429 err |= get_user(arg64.buf_size, &arg32->buf_size); 2430 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 2431 err |= get_user(cp, &arg32->buf); 2432 arg64.buf = compat_ptr(cp); 2433 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2434 2435 if (err) 2436 return -EFAULT; 2437 2438 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2439 if (err) 2440 return err; 2441 err |= copy_in_user(&arg32->error_info, &p->error_info, 2442 sizeof(arg32->error_info)); 2443 if (err) 2444 return -EFAULT; 2445 return err; 2446 } 2447 2448 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) 2449 { 2450 switch (cmd) { 2451 case CCISS_GETPCIINFO: 2452 case CCISS_GETINTINFO: 2453 case CCISS_SETINTINFO: 2454 case CCISS_GETNODENAME: 2455 case CCISS_SETNODENAME: 2456 case CCISS_GETHEARTBEAT: 2457 case CCISS_GETBUSTYPES: 2458 case CCISS_GETFIRMVER: 2459 case CCISS_GETDRIVVER: 2460 case CCISS_REVALIDVOLS: 2461 case CCISS_DEREGDISK: 2462 case CCISS_REGNEWDISK: 2463 case CCISS_REGNEWD: 2464 case CCISS_RESCANDISK: 2465 case CCISS_GETLUNINFO: 2466 return hpsa_ioctl(dev, cmd, arg); 2467 2468 case CCISS_PASSTHRU32: 2469 return hpsa_ioctl32_passthru(dev, cmd, arg); 2470 case CCISS_BIG_PASSTHRU32: 2471 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 2472 2473 default: 2474 return -ENOIOCTLCMD; 2475 } 2476 } 2477 #endif 2478 2479 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2480 { 2481 struct hpsa_pci_info pciinfo; 2482 2483 if (!argp) 2484 return -EINVAL; 2485 pciinfo.domain = pci_domain_nr(h->pdev->bus); 2486 pciinfo.bus = h->pdev->bus->number; 2487 pciinfo.dev_fn = h->pdev->devfn; 2488 pciinfo.board_id = h->board_id; 2489 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 2490 return -EFAULT; 2491 return 0; 2492 } 2493 2494 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 2495 { 2496 DriverVer_type DriverVer; 2497 unsigned char vmaj, vmin, vsubmin; 2498 int rc; 2499 2500 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 2501 &vmaj, &vmin, &vsubmin); 2502 if (rc != 3) { 2503 dev_info(&h->pdev->dev, "driver version string '%s' " 2504 "unrecognized.", HPSA_DRIVER_VERSION); 2505 vmaj = 0; 2506 vmin = 0; 2507 vsubmin = 0; 2508 } 2509 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 2510 if (!argp) 2511 return -EINVAL; 2512 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 2513 return -EFAULT; 2514 return 0; 2515 } 2516 2517 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2518 { 2519 IOCTL_Command_struct iocommand; 2520 struct CommandList *c; 2521 char *buff = NULL; 2522 union u64bit temp64; 2523 2524 if (!argp) 2525 return -EINVAL; 2526 if (!capable(CAP_SYS_RAWIO)) 2527 return -EPERM; 2528 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 2529 return -EFAULT; 2530 if ((iocommand.buf_size < 1) && 2531 (iocommand.Request.Type.Direction != XFER_NONE)) { 2532 return -EINVAL; 2533 } 2534 if (iocommand.buf_size > 0) { 2535 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 2536 if (buff == NULL) 2537 return -EFAULT; 2538 if (iocommand.Request.Type.Direction == XFER_WRITE) { 2539 /* Copy the data into the buffer we created */ 2540 if (copy_from_user(buff, iocommand.buf, 2541 iocommand.buf_size)) { 2542 kfree(buff); 2543 return -EFAULT; 2544 } 2545 } else { 2546 memset(buff, 0, iocommand.buf_size); 2547 } 2548 } 2549 c = cmd_special_alloc(h); 2550 if (c == NULL) { 2551 kfree(buff); 2552 return -ENOMEM; 2553 } 2554 /* Fill in the command type */ 2555 c->cmd_type = CMD_IOCTL_PEND; 2556 /* Fill in Command Header */ 2557 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2558 if (iocommand.buf_size > 0) { /* buffer to fill */ 2559 c->Header.SGList = 1; 2560 c->Header.SGTotal = 1; 2561 } else { /* no buffers to fill */ 2562 c->Header.SGList = 0; 2563 c->Header.SGTotal = 0; 2564 } 2565 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 2566 /* use the kernel address the cmd block for tag */ 2567 c->Header.Tag.lower = c->busaddr; 2568 2569 /* Fill in Request block */ 2570 memcpy(&c->Request, &iocommand.Request, 2571 sizeof(c->Request)); 2572 2573 /* Fill in the scatter gather information */ 2574 if (iocommand.buf_size > 0) { 2575 temp64.val = pci_map_single(h->pdev, buff, 2576 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 2577 c->SG[0].Addr.lower = temp64.val32.lower; 2578 c->SG[0].Addr.upper = temp64.val32.upper; 2579 c->SG[0].Len = iocommand.buf_size; 2580 c->SG[0].Ext = 0; /* we are not chaining*/ 2581 } 2582 hpsa_scsi_do_simple_cmd_core(h, c); 2583 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 2584 check_ioctl_unit_attention(h, c); 2585 2586 /* Copy the error information out */ 2587 memcpy(&iocommand.error_info, c->err_info, 2588 sizeof(iocommand.error_info)); 2589 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 2590 kfree(buff); 2591 cmd_special_free(h, c); 2592 return -EFAULT; 2593 } 2594 if (iocommand.Request.Type.Direction == XFER_READ && 2595 iocommand.buf_size > 0) { 2596 /* Copy the data out of the buffer we created */ 2597 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 2598 kfree(buff); 2599 cmd_special_free(h, c); 2600 return -EFAULT; 2601 } 2602 } 2603 kfree(buff); 2604 cmd_special_free(h, c); 2605 return 0; 2606 } 2607 2608 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2609 { 2610 BIG_IOCTL_Command_struct *ioc; 2611 struct CommandList *c; 2612 unsigned char **buff = NULL; 2613 int *buff_size = NULL; 2614 union u64bit temp64; 2615 BYTE sg_used = 0; 2616 int status = 0; 2617 int i; 2618 u32 left; 2619 u32 sz; 2620 BYTE __user *data_ptr; 2621 2622 if (!argp) 2623 return -EINVAL; 2624 if (!capable(CAP_SYS_RAWIO)) 2625 return -EPERM; 2626 ioc = (BIG_IOCTL_Command_struct *) 2627 kmalloc(sizeof(*ioc), GFP_KERNEL); 2628 if (!ioc) { 2629 status = -ENOMEM; 2630 goto cleanup1; 2631 } 2632 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 2633 status = -EFAULT; 2634 goto cleanup1; 2635 } 2636 if ((ioc->buf_size < 1) && 2637 (ioc->Request.Type.Direction != XFER_NONE)) { 2638 status = -EINVAL; 2639 goto cleanup1; 2640 } 2641 /* Check kmalloc limits using all SGs */ 2642 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 2643 status = -EINVAL; 2644 goto cleanup1; 2645 } 2646 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { 2647 status = -EINVAL; 2648 goto cleanup1; 2649 } 2650 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); 2651 if (!buff) { 2652 status = -ENOMEM; 2653 goto cleanup1; 2654 } 2655 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); 2656 if (!buff_size) { 2657 status = -ENOMEM; 2658 goto cleanup1; 2659 } 2660 left = ioc->buf_size; 2661 data_ptr = ioc->buf; 2662 while (left) { 2663 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 2664 buff_size[sg_used] = sz; 2665 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 2666 if (buff[sg_used] == NULL) { 2667 status = -ENOMEM; 2668 goto cleanup1; 2669 } 2670 if (ioc->Request.Type.Direction == XFER_WRITE) { 2671 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 2672 status = -ENOMEM; 2673 goto cleanup1; 2674 } 2675 } else 2676 memset(buff[sg_used], 0, sz); 2677 left -= sz; 2678 data_ptr += sz; 2679 sg_used++; 2680 } 2681 c = cmd_special_alloc(h); 2682 if (c == NULL) { 2683 status = -ENOMEM; 2684 goto cleanup1; 2685 } 2686 c->cmd_type = CMD_IOCTL_PEND; 2687 c->Header.ReplyQueue = 0; 2688 c->Header.SGList = c->Header.SGTotal = sg_used; 2689 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 2690 c->Header.Tag.lower = c->busaddr; 2691 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 2692 if (ioc->buf_size > 0) { 2693 int i; 2694 for (i = 0; i < sg_used; i++) { 2695 temp64.val = pci_map_single(h->pdev, buff[i], 2696 buff_size[i], PCI_DMA_BIDIRECTIONAL); 2697 c->SG[i].Addr.lower = temp64.val32.lower; 2698 c->SG[i].Addr.upper = temp64.val32.upper; 2699 c->SG[i].Len = buff_size[i]; 2700 /* we are not chaining */ 2701 c->SG[i].Ext = 0; 2702 } 2703 } 2704 hpsa_scsi_do_simple_cmd_core(h, c); 2705 if (sg_used) 2706 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 2707 check_ioctl_unit_attention(h, c); 2708 /* Copy the error information out */ 2709 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 2710 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 2711 cmd_special_free(h, c); 2712 status = -EFAULT; 2713 goto cleanup1; 2714 } 2715 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { 2716 /* Copy the data out of the buffer we created */ 2717 BYTE __user *ptr = ioc->buf; 2718 for (i = 0; i < sg_used; i++) { 2719 if (copy_to_user(ptr, buff[i], buff_size[i])) { 2720 cmd_special_free(h, c); 2721 status = -EFAULT; 2722 goto cleanup1; 2723 } 2724 ptr += buff_size[i]; 2725 } 2726 } 2727 cmd_special_free(h, c); 2728 status = 0; 2729 cleanup1: 2730 if (buff) { 2731 for (i = 0; i < sg_used; i++) 2732 kfree(buff[i]); 2733 kfree(buff); 2734 } 2735 kfree(buff_size); 2736 kfree(ioc); 2737 return status; 2738 } 2739 2740 static void check_ioctl_unit_attention(struct ctlr_info *h, 2741 struct CommandList *c) 2742 { 2743 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2744 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 2745 (void) check_for_unit_attention(h, c); 2746 } 2747 /* 2748 * ioctl 2749 */ 2750 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) 2751 { 2752 struct ctlr_info *h; 2753 void __user *argp = (void __user *)arg; 2754 2755 h = sdev_to_hba(dev); 2756 2757 switch (cmd) { 2758 case CCISS_DEREGDISK: 2759 case CCISS_REGNEWDISK: 2760 case CCISS_REGNEWD: 2761 hpsa_scan_start(h->scsi_host); 2762 return 0; 2763 case CCISS_GETPCIINFO: 2764 return hpsa_getpciinfo_ioctl(h, argp); 2765 case CCISS_GETDRIVVER: 2766 return hpsa_getdrivver_ioctl(h, argp); 2767 case CCISS_PASSTHRU: 2768 return hpsa_passthru_ioctl(h, argp); 2769 case CCISS_BIG_PASSTHRU: 2770 return hpsa_big_passthru_ioctl(h, argp); 2771 default: 2772 return -ENOTTY; 2773 } 2774 } 2775 2776 static int __devinit hpsa_send_host_reset(struct ctlr_info *h, 2777 unsigned char *scsi3addr, u8 reset_type) 2778 { 2779 struct CommandList *c; 2780 2781 c = cmd_alloc(h); 2782 if (!c) 2783 return -ENOMEM; 2784 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 2785 RAID_CTLR_LUNID, TYPE_MSG); 2786 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 2787 c->waiting = NULL; 2788 enqueue_cmd_and_start_io(h, c); 2789 /* Don't wait for completion, the reset won't complete. Don't free 2790 * the command either. This is the last command we will send before 2791 * re-initializing everything, so it doesn't matter and won't leak. 2792 */ 2793 return 0; 2794 } 2795 2796 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 2797 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 2798 int cmd_type) 2799 { 2800 int pci_dir = XFER_NONE; 2801 2802 c->cmd_type = CMD_IOCTL_PEND; 2803 c->Header.ReplyQueue = 0; 2804 if (buff != NULL && size > 0) { 2805 c->Header.SGList = 1; 2806 c->Header.SGTotal = 1; 2807 } else { 2808 c->Header.SGList = 0; 2809 c->Header.SGTotal = 0; 2810 } 2811 c->Header.Tag.lower = c->busaddr; 2812 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 2813 2814 c->Request.Type.Type = cmd_type; 2815 if (cmd_type == TYPE_CMD) { 2816 switch (cmd) { 2817 case HPSA_INQUIRY: 2818 /* are we trying to read a vital product page */ 2819 if (page_code != 0) { 2820 c->Request.CDB[1] = 0x01; 2821 c->Request.CDB[2] = page_code; 2822 } 2823 c->Request.CDBLen = 6; 2824 c->Request.Type.Attribute = ATTR_SIMPLE; 2825 c->Request.Type.Direction = XFER_READ; 2826 c->Request.Timeout = 0; 2827 c->Request.CDB[0] = HPSA_INQUIRY; 2828 c->Request.CDB[4] = size & 0xFF; 2829 break; 2830 case HPSA_REPORT_LOG: 2831 case HPSA_REPORT_PHYS: 2832 /* Talking to controller so It's a physical command 2833 mode = 00 target = 0. Nothing to write. 2834 */ 2835 c->Request.CDBLen = 12; 2836 c->Request.Type.Attribute = ATTR_SIMPLE; 2837 c->Request.Type.Direction = XFER_READ; 2838 c->Request.Timeout = 0; 2839 c->Request.CDB[0] = cmd; 2840 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 2841 c->Request.CDB[7] = (size >> 16) & 0xFF; 2842 c->Request.CDB[8] = (size >> 8) & 0xFF; 2843 c->Request.CDB[9] = size & 0xFF; 2844 break; 2845 case HPSA_CACHE_FLUSH: 2846 c->Request.CDBLen = 12; 2847 c->Request.Type.Attribute = ATTR_SIMPLE; 2848 c->Request.Type.Direction = XFER_WRITE; 2849 c->Request.Timeout = 0; 2850 c->Request.CDB[0] = BMIC_WRITE; 2851 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 2852 break; 2853 case TEST_UNIT_READY: 2854 c->Request.CDBLen = 6; 2855 c->Request.Type.Attribute = ATTR_SIMPLE; 2856 c->Request.Type.Direction = XFER_NONE; 2857 c->Request.Timeout = 0; 2858 break; 2859 default: 2860 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 2861 BUG(); 2862 return; 2863 } 2864 } else if (cmd_type == TYPE_MSG) { 2865 switch (cmd) { 2866 2867 case HPSA_DEVICE_RESET_MSG: 2868 c->Request.CDBLen = 16; 2869 c->Request.Type.Type = 1; /* It is a MSG not a CMD */ 2870 c->Request.Type.Attribute = ATTR_SIMPLE; 2871 c->Request.Type.Direction = XFER_NONE; 2872 c->Request.Timeout = 0; /* Don't time out */ 2873 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 2874 c->Request.CDB[0] = cmd; 2875 c->Request.CDB[1] = 0x03; /* Reset target above */ 2876 /* If bytes 4-7 are zero, it means reset the */ 2877 /* LunID device */ 2878 c->Request.CDB[4] = 0x00; 2879 c->Request.CDB[5] = 0x00; 2880 c->Request.CDB[6] = 0x00; 2881 c->Request.CDB[7] = 0x00; 2882 break; 2883 2884 default: 2885 dev_warn(&h->pdev->dev, "unknown message type %d\n", 2886 cmd); 2887 BUG(); 2888 } 2889 } else { 2890 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 2891 BUG(); 2892 } 2893 2894 switch (c->Request.Type.Direction) { 2895 case XFER_READ: 2896 pci_dir = PCI_DMA_FROMDEVICE; 2897 break; 2898 case XFER_WRITE: 2899 pci_dir = PCI_DMA_TODEVICE; 2900 break; 2901 case XFER_NONE: 2902 pci_dir = PCI_DMA_NONE; 2903 break; 2904 default: 2905 pci_dir = PCI_DMA_BIDIRECTIONAL; 2906 } 2907 2908 hpsa_map_one(h->pdev, c, buff, size, pci_dir); 2909 2910 return; 2911 } 2912 2913 /* 2914 * Map (physical) PCI mem into (virtual) kernel space 2915 */ 2916 static void __iomem *remap_pci_mem(ulong base, ulong size) 2917 { 2918 ulong page_base = ((ulong) base) & PAGE_MASK; 2919 ulong page_offs = ((ulong) base) - page_base; 2920 void __iomem *page_remapped = ioremap(page_base, page_offs + size); 2921 2922 return page_remapped ? (page_remapped + page_offs) : NULL; 2923 } 2924 2925 /* Takes cmds off the submission queue and sends them to the hardware, 2926 * then puts them on the queue of cmds waiting for completion. 2927 */ 2928 static void start_io(struct ctlr_info *h) 2929 { 2930 struct CommandList *c; 2931 2932 while (!list_empty(&h->reqQ)) { 2933 c = list_entry(h->reqQ.next, struct CommandList, list); 2934 /* can't do anything if fifo is full */ 2935 if ((h->access.fifo_full(h))) { 2936 dev_warn(&h->pdev->dev, "fifo full\n"); 2937 break; 2938 } 2939 2940 /* Get the first entry from the Request Q */ 2941 removeQ(c); 2942 h->Qdepth--; 2943 2944 /* Tell the controller execute command */ 2945 h->access.submit_command(h, c); 2946 2947 /* Put job onto the completed Q */ 2948 addQ(&h->cmpQ, c); 2949 } 2950 } 2951 2952 static inline unsigned long get_next_completion(struct ctlr_info *h) 2953 { 2954 return h->access.command_completed(h); 2955 } 2956 2957 static inline bool interrupt_pending(struct ctlr_info *h) 2958 { 2959 return h->access.intr_pending(h); 2960 } 2961 2962 static inline long interrupt_not_for_us(struct ctlr_info *h) 2963 { 2964 return (h->access.intr_pending(h) == 0) || 2965 (h->interrupts_enabled == 0); 2966 } 2967 2968 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 2969 u32 raw_tag) 2970 { 2971 if (unlikely(tag_index >= h->nr_cmds)) { 2972 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 2973 return 1; 2974 } 2975 return 0; 2976 } 2977 2978 static inline void finish_cmd(struct CommandList *c, u32 raw_tag) 2979 { 2980 removeQ(c); 2981 if (likely(c->cmd_type == CMD_SCSI)) 2982 complete_scsi_command(c); 2983 else if (c->cmd_type == CMD_IOCTL_PEND) 2984 complete(c->waiting); 2985 } 2986 2987 static inline u32 hpsa_tag_contains_index(u32 tag) 2988 { 2989 return tag & DIRECT_LOOKUP_BIT; 2990 } 2991 2992 static inline u32 hpsa_tag_to_index(u32 tag) 2993 { 2994 return tag >> DIRECT_LOOKUP_SHIFT; 2995 } 2996 2997 2998 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 2999 { 3000 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3001 #define HPSA_SIMPLE_ERROR_BITS 0x03 3002 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3003 return tag & ~HPSA_SIMPLE_ERROR_BITS; 3004 return tag & ~HPSA_PERF_ERROR_BITS; 3005 } 3006 3007 /* process completion of an indexed ("direct lookup") command */ 3008 static inline u32 process_indexed_cmd(struct ctlr_info *h, 3009 u32 raw_tag) 3010 { 3011 u32 tag_index; 3012 struct CommandList *c; 3013 3014 tag_index = hpsa_tag_to_index(raw_tag); 3015 if (bad_tag(h, tag_index, raw_tag)) 3016 return next_command(h); 3017 c = h->cmd_pool + tag_index; 3018 finish_cmd(c, raw_tag); 3019 return next_command(h); 3020 } 3021 3022 /* process completion of a non-indexed command */ 3023 static inline u32 process_nonindexed_cmd(struct ctlr_info *h, 3024 u32 raw_tag) 3025 { 3026 u32 tag; 3027 struct CommandList *c = NULL; 3028 3029 tag = hpsa_tag_discard_error_bits(h, raw_tag); 3030 list_for_each_entry(c, &h->cmpQ, list) { 3031 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 3032 finish_cmd(c, raw_tag); 3033 return next_command(h); 3034 } 3035 } 3036 bad_tag(h, h->nr_cmds + 1, raw_tag); 3037 return next_command(h); 3038 } 3039 3040 /* Some controllers, like p400, will give us one interrupt 3041 * after a soft reset, even if we turned interrupts off. 3042 * Only need to check for this in the hpsa_xxx_discard_completions 3043 * functions. 3044 */ 3045 static int ignore_bogus_interrupt(struct ctlr_info *h) 3046 { 3047 if (likely(!reset_devices)) 3048 return 0; 3049 3050 if (likely(h->interrupts_enabled)) 3051 return 0; 3052 3053 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3054 "(known firmware bug.) Ignoring.\n"); 3055 3056 return 1; 3057 } 3058 3059 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id) 3060 { 3061 struct ctlr_info *h = dev_id; 3062 unsigned long flags; 3063 u32 raw_tag; 3064 3065 if (ignore_bogus_interrupt(h)) 3066 return IRQ_NONE; 3067 3068 if (interrupt_not_for_us(h)) 3069 return IRQ_NONE; 3070 spin_lock_irqsave(&h->lock, flags); 3071 while (interrupt_pending(h)) { 3072 raw_tag = get_next_completion(h); 3073 while (raw_tag != FIFO_EMPTY) 3074 raw_tag = next_command(h); 3075 } 3076 spin_unlock_irqrestore(&h->lock, flags); 3077 return IRQ_HANDLED; 3078 } 3079 3080 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id) 3081 { 3082 struct ctlr_info *h = dev_id; 3083 unsigned long flags; 3084 u32 raw_tag; 3085 3086 if (ignore_bogus_interrupt(h)) 3087 return IRQ_NONE; 3088 3089 spin_lock_irqsave(&h->lock, flags); 3090 raw_tag = get_next_completion(h); 3091 while (raw_tag != FIFO_EMPTY) 3092 raw_tag = next_command(h); 3093 spin_unlock_irqrestore(&h->lock, flags); 3094 return IRQ_HANDLED; 3095 } 3096 3097 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id) 3098 { 3099 struct ctlr_info *h = dev_id; 3100 unsigned long flags; 3101 u32 raw_tag; 3102 3103 if (interrupt_not_for_us(h)) 3104 return IRQ_NONE; 3105 spin_lock_irqsave(&h->lock, flags); 3106 while (interrupt_pending(h)) { 3107 raw_tag = get_next_completion(h); 3108 while (raw_tag != FIFO_EMPTY) { 3109 if (hpsa_tag_contains_index(raw_tag)) 3110 raw_tag = process_indexed_cmd(h, raw_tag); 3111 else 3112 raw_tag = process_nonindexed_cmd(h, raw_tag); 3113 } 3114 } 3115 spin_unlock_irqrestore(&h->lock, flags); 3116 return IRQ_HANDLED; 3117 } 3118 3119 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id) 3120 { 3121 struct ctlr_info *h = dev_id; 3122 unsigned long flags; 3123 u32 raw_tag; 3124 3125 spin_lock_irqsave(&h->lock, flags); 3126 raw_tag = get_next_completion(h); 3127 while (raw_tag != FIFO_EMPTY) { 3128 if (hpsa_tag_contains_index(raw_tag)) 3129 raw_tag = process_indexed_cmd(h, raw_tag); 3130 else 3131 raw_tag = process_nonindexed_cmd(h, raw_tag); 3132 } 3133 spin_unlock_irqrestore(&h->lock, flags); 3134 return IRQ_HANDLED; 3135 } 3136 3137 /* Send a message CDB to the firmware. Careful, this only works 3138 * in simple mode, not performant mode due to the tag lookup. 3139 * We only ever use this immediately after a controller reset. 3140 */ 3141 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 3142 unsigned char type) 3143 { 3144 struct Command { 3145 struct CommandListHeader CommandHeader; 3146 struct RequestBlock Request; 3147 struct ErrDescriptor ErrorDescriptor; 3148 }; 3149 struct Command *cmd; 3150 static const size_t cmd_sz = sizeof(*cmd) + 3151 sizeof(cmd->ErrorDescriptor); 3152 dma_addr_t paddr64; 3153 uint32_t paddr32, tag; 3154 void __iomem *vaddr; 3155 int i, err; 3156 3157 vaddr = pci_ioremap_bar(pdev, 0); 3158 if (vaddr == NULL) 3159 return -ENOMEM; 3160 3161 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3162 * CCISS commands, so they must be allocated from the lower 4GiB of 3163 * memory. 3164 */ 3165 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3166 if (err) { 3167 iounmap(vaddr); 3168 return -ENOMEM; 3169 } 3170 3171 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 3172 if (cmd == NULL) { 3173 iounmap(vaddr); 3174 return -ENOMEM; 3175 } 3176 3177 /* This must fit, because of the 32-bit consistent DMA mask. Also, 3178 * although there's no guarantee, we assume that the address is at 3179 * least 4-byte aligned (most likely, it's page-aligned). 3180 */ 3181 paddr32 = paddr64; 3182 3183 cmd->CommandHeader.ReplyQueue = 0; 3184 cmd->CommandHeader.SGList = 0; 3185 cmd->CommandHeader.SGTotal = 0; 3186 cmd->CommandHeader.Tag.lower = paddr32; 3187 cmd->CommandHeader.Tag.upper = 0; 3188 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 3189 3190 cmd->Request.CDBLen = 16; 3191 cmd->Request.Type.Type = TYPE_MSG; 3192 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 3193 cmd->Request.Type.Direction = XFER_NONE; 3194 cmd->Request.Timeout = 0; /* Don't time out */ 3195 cmd->Request.CDB[0] = opcode; 3196 cmd->Request.CDB[1] = type; 3197 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 3198 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); 3199 cmd->ErrorDescriptor.Addr.upper = 0; 3200 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); 3201 3202 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 3203 3204 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3205 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3206 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 3207 break; 3208 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3209 } 3210 3211 iounmap(vaddr); 3212 3213 /* we leak the DMA buffer here ... no choice since the controller could 3214 * still complete the command. 3215 */ 3216 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 3217 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 3218 opcode, type); 3219 return -ETIMEDOUT; 3220 } 3221 3222 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 3223 3224 if (tag & HPSA_ERROR_BIT) { 3225 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 3226 opcode, type); 3227 return -EIO; 3228 } 3229 3230 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 3231 opcode, type); 3232 return 0; 3233 } 3234 3235 #define hpsa_noop(p) hpsa_message(p, 3, 0) 3236 3237 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 3238 void * __iomem vaddr, u32 use_doorbell) 3239 { 3240 u16 pmcsr; 3241 int pos; 3242 3243 if (use_doorbell) { 3244 /* For everything after the P600, the PCI power state method 3245 * of resetting the controller doesn't work, so we have this 3246 * other way using the doorbell register. 3247 */ 3248 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 3249 writel(use_doorbell, vaddr + SA5_DOORBELL); 3250 } else { /* Try to do it the PCI power state way */ 3251 3252 /* Quoting from the Open CISS Specification: "The Power 3253 * Management Control/Status Register (CSR) controls the power 3254 * state of the device. The normal operating state is D0, 3255 * CSR=00h. The software off state is D3, CSR=03h. To reset 3256 * the controller, place the interface device in D3 then to D0, 3257 * this causes a secondary PCI reset which will reset the 3258 * controller." */ 3259 3260 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 3261 if (pos == 0) { 3262 dev_err(&pdev->dev, 3263 "hpsa_reset_controller: " 3264 "PCI PM not supported\n"); 3265 return -ENODEV; 3266 } 3267 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 3268 /* enter the D3hot power management state */ 3269 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 3270 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3271 pmcsr |= PCI_D3hot; 3272 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3273 3274 msleep(500); 3275 3276 /* enter the D0 power management state */ 3277 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3278 pmcsr |= PCI_D0; 3279 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3280 } 3281 return 0; 3282 } 3283 3284 static __devinit void init_driver_version(char *driver_version, int len) 3285 { 3286 memset(driver_version, 0, len); 3287 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1); 3288 } 3289 3290 static __devinit int write_driver_ver_to_cfgtable( 3291 struct CfgTable __iomem *cfgtable) 3292 { 3293 char *driver_version; 3294 int i, size = sizeof(cfgtable->driver_version); 3295 3296 driver_version = kmalloc(size, GFP_KERNEL); 3297 if (!driver_version) 3298 return -ENOMEM; 3299 3300 init_driver_version(driver_version, size); 3301 for (i = 0; i < size; i++) 3302 writeb(driver_version[i], &cfgtable->driver_version[i]); 3303 kfree(driver_version); 3304 return 0; 3305 } 3306 3307 static __devinit void read_driver_ver_from_cfgtable( 3308 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver) 3309 { 3310 int i; 3311 3312 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 3313 driver_ver[i] = readb(&cfgtable->driver_version[i]); 3314 } 3315 3316 static __devinit int controller_reset_failed( 3317 struct CfgTable __iomem *cfgtable) 3318 { 3319 3320 char *driver_ver, *old_driver_ver; 3321 int rc, size = sizeof(cfgtable->driver_version); 3322 3323 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 3324 if (!old_driver_ver) 3325 return -ENOMEM; 3326 driver_ver = old_driver_ver + size; 3327 3328 /* After a reset, the 32 bytes of "driver version" in the cfgtable 3329 * should have been changed, otherwise we know the reset failed. 3330 */ 3331 init_driver_version(old_driver_ver, size); 3332 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 3333 rc = !memcmp(driver_ver, old_driver_ver, size); 3334 kfree(old_driver_ver); 3335 return rc; 3336 } 3337 /* This does a hard reset of the controller using PCI power management 3338 * states or the using the doorbell register. 3339 */ 3340 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 3341 { 3342 u64 cfg_offset; 3343 u32 cfg_base_addr; 3344 u64 cfg_base_addr_index; 3345 void __iomem *vaddr; 3346 unsigned long paddr; 3347 u32 misc_fw_support; 3348 int rc; 3349 struct CfgTable __iomem *cfgtable; 3350 u32 use_doorbell; 3351 u32 board_id; 3352 u16 command_register; 3353 3354 /* For controllers as old as the P600, this is very nearly 3355 * the same thing as 3356 * 3357 * pci_save_state(pci_dev); 3358 * pci_set_power_state(pci_dev, PCI_D3hot); 3359 * pci_set_power_state(pci_dev, PCI_D0); 3360 * pci_restore_state(pci_dev); 3361 * 3362 * For controllers newer than the P600, the pci power state 3363 * method of resetting doesn't work so we have another way 3364 * using the doorbell register. 3365 */ 3366 3367 rc = hpsa_lookup_board_id(pdev, &board_id); 3368 if (rc < 0 || !ctlr_is_resettable(board_id)) { 3369 dev_warn(&pdev->dev, "Not resetting device.\n"); 3370 return -ENODEV; 3371 } 3372 3373 /* if controller is soft- but not hard resettable... */ 3374 if (!ctlr_is_hard_resettable(board_id)) 3375 return -ENOTSUPP; /* try soft reset later. */ 3376 3377 /* Save the PCI command register */ 3378 pci_read_config_word(pdev, 4, &command_register); 3379 /* Turn the board off. This is so that later pci_restore_state() 3380 * won't turn the board on before the rest of config space is ready. 3381 */ 3382 pci_disable_device(pdev); 3383 pci_save_state(pdev); 3384 3385 /* find the first memory BAR, so we can find the cfg table */ 3386 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 3387 if (rc) 3388 return rc; 3389 vaddr = remap_pci_mem(paddr, 0x250); 3390 if (!vaddr) 3391 return -ENOMEM; 3392 3393 /* find cfgtable in order to check if reset via doorbell is supported */ 3394 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 3395 &cfg_base_addr_index, &cfg_offset); 3396 if (rc) 3397 goto unmap_vaddr; 3398 cfgtable = remap_pci_mem(pci_resource_start(pdev, 3399 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 3400 if (!cfgtable) { 3401 rc = -ENOMEM; 3402 goto unmap_vaddr; 3403 } 3404 rc = write_driver_ver_to_cfgtable(cfgtable); 3405 if (rc) 3406 goto unmap_vaddr; 3407 3408 /* If reset via doorbell register is supported, use that. 3409 * There are two such methods. Favor the newest method. 3410 */ 3411 misc_fw_support = readl(&cfgtable->misc_fw_support); 3412 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 3413 if (use_doorbell) { 3414 use_doorbell = DOORBELL_CTLR_RESET2; 3415 } else { 3416 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 3417 if (use_doorbell) { 3418 dev_warn(&pdev->dev, "Controller claims that " 3419 "'Bit 2 doorbell reset' is " 3420 "supported, but not 'bit 5 doorbell reset'. " 3421 "Firmware update is recommended.\n"); 3422 rc = -ENOTSUPP; /* try soft reset */ 3423 goto unmap_cfgtable; 3424 } 3425 } 3426 3427 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 3428 if (rc) 3429 goto unmap_cfgtable; 3430 3431 pci_restore_state(pdev); 3432 rc = pci_enable_device(pdev); 3433 if (rc) { 3434 dev_warn(&pdev->dev, "failed to enable device.\n"); 3435 goto unmap_cfgtable; 3436 } 3437 pci_write_config_word(pdev, 4, command_register); 3438 3439 /* Some devices (notably the HP Smart Array 5i Controller) 3440 need a little pause here */ 3441 msleep(HPSA_POST_RESET_PAUSE_MSECS); 3442 3443 /* Wait for board to become not ready, then ready. */ 3444 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 3445 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 3446 if (rc) { 3447 dev_warn(&pdev->dev, 3448 "failed waiting for board to reset." 3449 " Will try soft reset.\n"); 3450 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 3451 goto unmap_cfgtable; 3452 } 3453 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 3454 if (rc) { 3455 dev_warn(&pdev->dev, 3456 "failed waiting for board to become ready " 3457 "after hard reset\n"); 3458 goto unmap_cfgtable; 3459 } 3460 3461 rc = controller_reset_failed(vaddr); 3462 if (rc < 0) 3463 goto unmap_cfgtable; 3464 if (rc) { 3465 dev_warn(&pdev->dev, "Unable to successfully reset " 3466 "controller. Will try soft reset.\n"); 3467 rc = -ENOTSUPP; 3468 } else { 3469 dev_info(&pdev->dev, "board ready after hard reset.\n"); 3470 } 3471 3472 unmap_cfgtable: 3473 iounmap(cfgtable); 3474 3475 unmap_vaddr: 3476 iounmap(vaddr); 3477 return rc; 3478 } 3479 3480 /* 3481 * We cannot read the structure directly, for portability we must use 3482 * the io functions. 3483 * This is for debug only. 3484 */ 3485 static void print_cfg_table(struct device *dev, struct CfgTable *tb) 3486 { 3487 #ifdef HPSA_DEBUG 3488 int i; 3489 char temp_name[17]; 3490 3491 dev_info(dev, "Controller Configuration information\n"); 3492 dev_info(dev, "------------------------------------\n"); 3493 for (i = 0; i < 4; i++) 3494 temp_name[i] = readb(&(tb->Signature[i])); 3495 temp_name[4] = '\0'; 3496 dev_info(dev, " Signature = %s\n", temp_name); 3497 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 3498 dev_info(dev, " Transport methods supported = 0x%x\n", 3499 readl(&(tb->TransportSupport))); 3500 dev_info(dev, " Transport methods active = 0x%x\n", 3501 readl(&(tb->TransportActive))); 3502 dev_info(dev, " Requested transport Method = 0x%x\n", 3503 readl(&(tb->HostWrite.TransportRequest))); 3504 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 3505 readl(&(tb->HostWrite.CoalIntDelay))); 3506 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 3507 readl(&(tb->HostWrite.CoalIntCount))); 3508 dev_info(dev, " Max outstanding commands = 0x%d\n", 3509 readl(&(tb->CmdsOutMax))); 3510 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 3511 for (i = 0; i < 16; i++) 3512 temp_name[i] = readb(&(tb->ServerName[i])); 3513 temp_name[16] = '\0'; 3514 dev_info(dev, " Server Name = %s\n", temp_name); 3515 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 3516 readl(&(tb->HeartBeat))); 3517 #endif /* HPSA_DEBUG */ 3518 } 3519 3520 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 3521 { 3522 int i, offset, mem_type, bar_type; 3523 3524 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 3525 return 0; 3526 offset = 0; 3527 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 3528 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 3529 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 3530 offset += 4; 3531 else { 3532 mem_type = pci_resource_flags(pdev, i) & 3533 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 3534 switch (mem_type) { 3535 case PCI_BASE_ADDRESS_MEM_TYPE_32: 3536 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 3537 offset += 4; /* 32 bit */ 3538 break; 3539 case PCI_BASE_ADDRESS_MEM_TYPE_64: 3540 offset += 8; 3541 break; 3542 default: /* reserved in PCI 2.2 */ 3543 dev_warn(&pdev->dev, 3544 "base address is invalid\n"); 3545 return -1; 3546 break; 3547 } 3548 } 3549 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 3550 return i + 1; 3551 } 3552 return -1; 3553 } 3554 3555 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 3556 * controllers that are capable. If not, we use IO-APIC mode. 3557 */ 3558 3559 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h) 3560 { 3561 #ifdef CONFIG_PCI_MSI 3562 int err; 3563 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1}, 3564 {0, 2}, {0, 3} 3565 }; 3566 3567 /* Some boards advertise MSI but don't really support it */ 3568 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 3569 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 3570 goto default_int_mode; 3571 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 3572 dev_info(&h->pdev->dev, "MSIX\n"); 3573 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4); 3574 if (!err) { 3575 h->intr[0] = hpsa_msix_entries[0].vector; 3576 h->intr[1] = hpsa_msix_entries[1].vector; 3577 h->intr[2] = hpsa_msix_entries[2].vector; 3578 h->intr[3] = hpsa_msix_entries[3].vector; 3579 h->msix_vector = 1; 3580 return; 3581 } 3582 if (err > 0) { 3583 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 3584 "available\n", err); 3585 goto default_int_mode; 3586 } else { 3587 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", 3588 err); 3589 goto default_int_mode; 3590 } 3591 } 3592 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 3593 dev_info(&h->pdev->dev, "MSI\n"); 3594 if (!pci_enable_msi(h->pdev)) 3595 h->msi_vector = 1; 3596 else 3597 dev_warn(&h->pdev->dev, "MSI init failed\n"); 3598 } 3599 default_int_mode: 3600 #endif /* CONFIG_PCI_MSI */ 3601 /* if we get here we're going to use the default interrupt mode */ 3602 h->intr[h->intr_mode] = h->pdev->irq; 3603 } 3604 3605 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 3606 { 3607 int i; 3608 u32 subsystem_vendor_id, subsystem_device_id; 3609 3610 subsystem_vendor_id = pdev->subsystem_vendor; 3611 subsystem_device_id = pdev->subsystem_device; 3612 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 3613 subsystem_vendor_id; 3614 3615 for (i = 0; i < ARRAY_SIZE(products); i++) 3616 if (*board_id == products[i].board_id) 3617 return i; 3618 3619 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 3620 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 3621 !hpsa_allow_any) { 3622 dev_warn(&pdev->dev, "unrecognized board ID: " 3623 "0x%08x, ignoring.\n", *board_id); 3624 return -ENODEV; 3625 } 3626 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 3627 } 3628 3629 static inline bool hpsa_board_disabled(struct pci_dev *pdev) 3630 { 3631 u16 command; 3632 3633 (void) pci_read_config_word(pdev, PCI_COMMAND, &command); 3634 return ((command & PCI_COMMAND_MEMORY) == 0); 3635 } 3636 3637 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 3638 unsigned long *memory_bar) 3639 { 3640 int i; 3641 3642 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 3643 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 3644 /* addressing mode bits already removed */ 3645 *memory_bar = pci_resource_start(pdev, i); 3646 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 3647 *memory_bar); 3648 return 0; 3649 } 3650 dev_warn(&pdev->dev, "no memory BAR found\n"); 3651 return -ENODEV; 3652 } 3653 3654 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 3655 void __iomem *vaddr, int wait_for_ready) 3656 { 3657 int i, iterations; 3658 u32 scratchpad; 3659 if (wait_for_ready) 3660 iterations = HPSA_BOARD_READY_ITERATIONS; 3661 else 3662 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 3663 3664 for (i = 0; i < iterations; i++) { 3665 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 3666 if (wait_for_ready) { 3667 if (scratchpad == HPSA_FIRMWARE_READY) 3668 return 0; 3669 } else { 3670 if (scratchpad != HPSA_FIRMWARE_READY) 3671 return 0; 3672 } 3673 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 3674 } 3675 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 3676 return -ENODEV; 3677 } 3678 3679 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 3680 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 3681 u64 *cfg_offset) 3682 { 3683 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 3684 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 3685 *cfg_base_addr &= (u32) 0x0000ffff; 3686 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 3687 if (*cfg_base_addr_index == -1) { 3688 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 3689 return -ENODEV; 3690 } 3691 return 0; 3692 } 3693 3694 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h) 3695 { 3696 u64 cfg_offset; 3697 u32 cfg_base_addr; 3698 u64 cfg_base_addr_index; 3699 u32 trans_offset; 3700 int rc; 3701 3702 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 3703 &cfg_base_addr_index, &cfg_offset); 3704 if (rc) 3705 return rc; 3706 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 3707 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 3708 if (!h->cfgtable) 3709 return -ENOMEM; 3710 rc = write_driver_ver_to_cfgtable(h->cfgtable); 3711 if (rc) 3712 return rc; 3713 /* Find performant mode table. */ 3714 trans_offset = readl(&h->cfgtable->TransMethodOffset); 3715 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 3716 cfg_base_addr_index)+cfg_offset+trans_offset, 3717 sizeof(*h->transtable)); 3718 if (!h->transtable) 3719 return -ENOMEM; 3720 return 0; 3721 } 3722 3723 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 3724 { 3725 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 3726 3727 /* Limit commands in memory limited kdump scenario. */ 3728 if (reset_devices && h->max_commands > 32) 3729 h->max_commands = 32; 3730 3731 if (h->max_commands < 16) { 3732 dev_warn(&h->pdev->dev, "Controller reports " 3733 "max supported commands of %d, an obvious lie. " 3734 "Using 16. Ensure that firmware is up to date.\n", 3735 h->max_commands); 3736 h->max_commands = 16; 3737 } 3738 } 3739 3740 /* Interrogate the hardware for some limits: 3741 * max commands, max SG elements without chaining, and with chaining, 3742 * SG chain block size, etc. 3743 */ 3744 static void __devinit hpsa_find_board_params(struct ctlr_info *h) 3745 { 3746 hpsa_get_max_perf_mode_cmds(h); 3747 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 3748 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 3749 /* 3750 * Limit in-command s/g elements to 32 save dma'able memory. 3751 * Howvever spec says if 0, use 31 3752 */ 3753 h->max_cmd_sg_entries = 31; 3754 if (h->maxsgentries > 512) { 3755 h->max_cmd_sg_entries = 32; 3756 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; 3757 h->maxsgentries--; /* save one for chain pointer */ 3758 } else { 3759 h->maxsgentries = 31; /* default to traditional values */ 3760 h->chainsize = 0; 3761 } 3762 } 3763 3764 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 3765 { 3766 if ((readb(&h->cfgtable->Signature[0]) != 'C') || 3767 (readb(&h->cfgtable->Signature[1]) != 'I') || 3768 (readb(&h->cfgtable->Signature[2]) != 'S') || 3769 (readb(&h->cfgtable->Signature[3]) != 'S')) { 3770 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 3771 return false; 3772 } 3773 return true; 3774 } 3775 3776 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 3777 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) 3778 { 3779 #ifdef CONFIG_X86 3780 u32 prefetch; 3781 3782 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 3783 prefetch |= 0x100; 3784 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 3785 #endif 3786 } 3787 3788 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 3789 * in a prefetch beyond physical memory. 3790 */ 3791 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 3792 { 3793 u32 dma_prefetch; 3794 3795 if (h->board_id != 0x3225103C) 3796 return; 3797 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 3798 dma_prefetch |= 0x8000; 3799 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 3800 } 3801 3802 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 3803 { 3804 int i; 3805 u32 doorbell_value; 3806 unsigned long flags; 3807 3808 /* under certain very rare conditions, this can take awhile. 3809 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 3810 * as we enter this code.) 3811 */ 3812 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 3813 spin_lock_irqsave(&h->lock, flags); 3814 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 3815 spin_unlock_irqrestore(&h->lock, flags); 3816 if (!(doorbell_value & CFGTBL_ChangeReq)) 3817 break; 3818 /* delay and try again */ 3819 usleep_range(10000, 20000); 3820 } 3821 } 3822 3823 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h) 3824 { 3825 u32 trans_support; 3826 3827 trans_support = readl(&(h->cfgtable->TransportSupport)); 3828 if (!(trans_support & SIMPLE_MODE)) 3829 return -ENOTSUPP; 3830 3831 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 3832 /* Update the field, and then ring the doorbell */ 3833 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 3834 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 3835 hpsa_wait_for_mode_change_ack(h); 3836 print_cfg_table(&h->pdev->dev, h->cfgtable); 3837 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 3838 dev_warn(&h->pdev->dev, 3839 "unable to get board into simple mode\n"); 3840 return -ENODEV; 3841 } 3842 h->transMethod = CFGTBL_Trans_Simple; 3843 return 0; 3844 } 3845 3846 static int __devinit hpsa_pci_init(struct ctlr_info *h) 3847 { 3848 int prod_index, err; 3849 3850 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 3851 if (prod_index < 0) 3852 return -ENODEV; 3853 h->product_name = products[prod_index].product_name; 3854 h->access = *(products[prod_index].access); 3855 3856 if (hpsa_board_disabled(h->pdev)) { 3857 dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); 3858 return -ENODEV; 3859 } 3860 err = pci_enable_device(h->pdev); 3861 if (err) { 3862 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 3863 return err; 3864 } 3865 3866 err = pci_request_regions(h->pdev, "hpsa"); 3867 if (err) { 3868 dev_err(&h->pdev->dev, 3869 "cannot obtain PCI resources, aborting\n"); 3870 return err; 3871 } 3872 hpsa_interrupt_mode(h); 3873 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 3874 if (err) 3875 goto err_out_free_res; 3876 h->vaddr = remap_pci_mem(h->paddr, 0x250); 3877 if (!h->vaddr) { 3878 err = -ENOMEM; 3879 goto err_out_free_res; 3880 } 3881 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 3882 if (err) 3883 goto err_out_free_res; 3884 err = hpsa_find_cfgtables(h); 3885 if (err) 3886 goto err_out_free_res; 3887 hpsa_find_board_params(h); 3888 3889 if (!hpsa_CISS_signature_present(h)) { 3890 err = -ENODEV; 3891 goto err_out_free_res; 3892 } 3893 hpsa_enable_scsi_prefetch(h); 3894 hpsa_p600_dma_prefetch_quirk(h); 3895 err = hpsa_enter_simple_mode(h); 3896 if (err) 3897 goto err_out_free_res; 3898 return 0; 3899 3900 err_out_free_res: 3901 if (h->transtable) 3902 iounmap(h->transtable); 3903 if (h->cfgtable) 3904 iounmap(h->cfgtable); 3905 if (h->vaddr) 3906 iounmap(h->vaddr); 3907 /* 3908 * Deliberately omit pci_disable_device(): it does something nasty to 3909 * Smart Array controllers that pci_enable_device does not undo 3910 */ 3911 pci_release_regions(h->pdev); 3912 return err; 3913 } 3914 3915 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h) 3916 { 3917 int rc; 3918 3919 #define HBA_INQUIRY_BYTE_COUNT 64 3920 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 3921 if (!h->hba_inquiry_data) 3922 return; 3923 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 3924 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 3925 if (rc != 0) { 3926 kfree(h->hba_inquiry_data); 3927 h->hba_inquiry_data = NULL; 3928 } 3929 } 3930 3931 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev) 3932 { 3933 int rc, i; 3934 3935 if (!reset_devices) 3936 return 0; 3937 3938 /* Reset the controller with a PCI power-cycle or via doorbell */ 3939 rc = hpsa_kdump_hard_reset_controller(pdev); 3940 3941 /* -ENOTSUPP here means we cannot reset the controller 3942 * but it's already (and still) up and running in 3943 * "performant mode". Or, it might be 640x, which can't reset 3944 * due to concerns about shared bbwc between 6402/6404 pair. 3945 */ 3946 if (rc == -ENOTSUPP) 3947 return rc; /* just try to do the kdump anyhow. */ 3948 if (rc) 3949 return -ENODEV; 3950 3951 /* Now try to get the controller to respond to a no-op */ 3952 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 3953 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 3954 if (hpsa_noop(pdev) == 0) 3955 break; 3956 else 3957 dev_warn(&pdev->dev, "no-op failed%s\n", 3958 (i < 11 ? "; re-trying" : "")); 3959 } 3960 return 0; 3961 } 3962 3963 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h) 3964 { 3965 h->cmd_pool_bits = kzalloc( 3966 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 3967 sizeof(unsigned long), GFP_KERNEL); 3968 h->cmd_pool = pci_alloc_consistent(h->pdev, 3969 h->nr_cmds * sizeof(*h->cmd_pool), 3970 &(h->cmd_pool_dhandle)); 3971 h->errinfo_pool = pci_alloc_consistent(h->pdev, 3972 h->nr_cmds * sizeof(*h->errinfo_pool), 3973 &(h->errinfo_pool_dhandle)); 3974 if ((h->cmd_pool_bits == NULL) 3975 || (h->cmd_pool == NULL) 3976 || (h->errinfo_pool == NULL)) { 3977 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 3978 return -ENOMEM; 3979 } 3980 return 0; 3981 } 3982 3983 static void hpsa_free_cmd_pool(struct ctlr_info *h) 3984 { 3985 kfree(h->cmd_pool_bits); 3986 if (h->cmd_pool) 3987 pci_free_consistent(h->pdev, 3988 h->nr_cmds * sizeof(struct CommandList), 3989 h->cmd_pool, h->cmd_pool_dhandle); 3990 if (h->errinfo_pool) 3991 pci_free_consistent(h->pdev, 3992 h->nr_cmds * sizeof(struct ErrorInfo), 3993 h->errinfo_pool, 3994 h->errinfo_pool_dhandle); 3995 } 3996 3997 static int hpsa_request_irq(struct ctlr_info *h, 3998 irqreturn_t (*msixhandler)(int, void *), 3999 irqreturn_t (*intxhandler)(int, void *)) 4000 { 4001 int rc; 4002 4003 if (h->msix_vector || h->msi_vector) 4004 rc = request_irq(h->intr[h->intr_mode], msixhandler, 4005 IRQF_DISABLED, h->devname, h); 4006 else 4007 rc = request_irq(h->intr[h->intr_mode], intxhandler, 4008 IRQF_DISABLED, h->devname, h); 4009 if (rc) { 4010 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 4011 h->intr[h->intr_mode], h->devname); 4012 return -ENODEV; 4013 } 4014 return 0; 4015 } 4016 4017 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h) 4018 { 4019 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 4020 HPSA_RESET_TYPE_CONTROLLER)) { 4021 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4022 return -EIO; 4023 } 4024 4025 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4026 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4027 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4028 return -1; 4029 } 4030 4031 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4032 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4033 dev_warn(&h->pdev->dev, "Board failed to become ready " 4034 "after soft reset.\n"); 4035 return -1; 4036 } 4037 4038 return 0; 4039 } 4040 4041 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 4042 { 4043 free_irq(h->intr[h->intr_mode], h); 4044 #ifdef CONFIG_PCI_MSI 4045 if (h->msix_vector) 4046 pci_disable_msix(h->pdev); 4047 else if (h->msi_vector) 4048 pci_disable_msi(h->pdev); 4049 #endif /* CONFIG_PCI_MSI */ 4050 hpsa_free_sg_chain_blocks(h); 4051 hpsa_free_cmd_pool(h); 4052 kfree(h->blockFetchTable); 4053 pci_free_consistent(h->pdev, h->reply_pool_size, 4054 h->reply_pool, h->reply_pool_dhandle); 4055 if (h->vaddr) 4056 iounmap(h->vaddr); 4057 if (h->transtable) 4058 iounmap(h->transtable); 4059 if (h->cfgtable) 4060 iounmap(h->cfgtable); 4061 pci_release_regions(h->pdev); 4062 kfree(h); 4063 } 4064 4065 static int __devinit hpsa_init_one(struct pci_dev *pdev, 4066 const struct pci_device_id *ent) 4067 { 4068 int dac, rc; 4069 struct ctlr_info *h; 4070 int try_soft_reset = 0; 4071 unsigned long flags; 4072 4073 if (number_of_controllers == 0) 4074 printk(KERN_INFO DRIVER_NAME "\n"); 4075 4076 rc = hpsa_init_reset_devices(pdev); 4077 if (rc) { 4078 if (rc != -ENOTSUPP) 4079 return rc; 4080 /* If the reset fails in a particular way (it has no way to do 4081 * a proper hard reset, so returns -ENOTSUPP) we can try to do 4082 * a soft reset once we get the controller configured up to the 4083 * point that it can accept a command. 4084 */ 4085 try_soft_reset = 1; 4086 rc = 0; 4087 } 4088 4089 reinit_after_soft_reset: 4090 4091 /* Command structures must be aligned on a 32-byte boundary because 4092 * the 5 lower bits of the address are used by the hardware. and by 4093 * the driver. See comments in hpsa.h for more info. 4094 */ 4095 #define COMMANDLIST_ALIGNMENT 32 4096 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 4097 h = kzalloc(sizeof(*h), GFP_KERNEL); 4098 if (!h) 4099 return -ENOMEM; 4100 4101 h->pdev = pdev; 4102 h->busy_initializing = 1; 4103 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 4104 INIT_LIST_HEAD(&h->cmpQ); 4105 INIT_LIST_HEAD(&h->reqQ); 4106 spin_lock_init(&h->lock); 4107 spin_lock_init(&h->scan_lock); 4108 rc = hpsa_pci_init(h); 4109 if (rc != 0) 4110 goto clean1; 4111 4112 sprintf(h->devname, "hpsa%d", number_of_controllers); 4113 h->ctlr = number_of_controllers; 4114 number_of_controllers++; 4115 4116 /* configure PCI DMA stuff */ 4117 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4118 if (rc == 0) { 4119 dac = 1; 4120 } else { 4121 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4122 if (rc == 0) { 4123 dac = 0; 4124 } else { 4125 dev_err(&pdev->dev, "no suitable DMA available\n"); 4126 goto clean1; 4127 } 4128 } 4129 4130 /* make sure the board interrupts are off */ 4131 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4132 4133 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 4134 goto clean2; 4135 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 4136 h->devname, pdev->device, 4137 h->intr[h->intr_mode], dac ? "" : " not"); 4138 if (hpsa_allocate_cmd_pool(h)) 4139 goto clean4; 4140 if (hpsa_allocate_sg_chain_blocks(h)) 4141 goto clean4; 4142 init_waitqueue_head(&h->scan_wait_queue); 4143 h->scan_finished = 1; /* no scan currently in progress */ 4144 4145 pci_set_drvdata(pdev, h); 4146 h->ndevices = 0; 4147 h->scsi_host = NULL; 4148 spin_lock_init(&h->devlock); 4149 hpsa_put_ctlr_into_performant_mode(h); 4150 4151 /* At this point, the controller is ready to take commands. 4152 * Now, if reset_devices and the hard reset didn't work, try 4153 * the soft reset and see if that works. 4154 */ 4155 if (try_soft_reset) { 4156 4157 /* This is kind of gross. We may or may not get a completion 4158 * from the soft reset command, and if we do, then the value 4159 * from the fifo may or may not be valid. So, we wait 10 secs 4160 * after the reset throwing away any completions we get during 4161 * that time. Unregister the interrupt handler and register 4162 * fake ones to scoop up any residual completions. 4163 */ 4164 spin_lock_irqsave(&h->lock, flags); 4165 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4166 spin_unlock_irqrestore(&h->lock, flags); 4167 free_irq(h->intr[h->intr_mode], h); 4168 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 4169 hpsa_intx_discard_completions); 4170 if (rc) { 4171 dev_warn(&h->pdev->dev, "Failed to request_irq after " 4172 "soft reset.\n"); 4173 goto clean4; 4174 } 4175 4176 rc = hpsa_kdump_soft_reset(h); 4177 if (rc) 4178 /* Neither hard nor soft reset worked, we're hosed. */ 4179 goto clean4; 4180 4181 dev_info(&h->pdev->dev, "Board READY.\n"); 4182 dev_info(&h->pdev->dev, 4183 "Waiting for stale completions to drain.\n"); 4184 h->access.set_intr_mask(h, HPSA_INTR_ON); 4185 msleep(10000); 4186 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4187 4188 rc = controller_reset_failed(h->cfgtable); 4189 if (rc) 4190 dev_info(&h->pdev->dev, 4191 "Soft reset appears to have failed.\n"); 4192 4193 /* since the controller's reset, we have to go back and re-init 4194 * everything. Easiest to just forget what we've done and do it 4195 * all over again. 4196 */ 4197 hpsa_undo_allocations_after_kdump_soft_reset(h); 4198 try_soft_reset = 0; 4199 if (rc) 4200 /* don't go to clean4, we already unallocated */ 4201 return -ENODEV; 4202 4203 goto reinit_after_soft_reset; 4204 } 4205 4206 /* Turn the interrupts on so we can service requests */ 4207 h->access.set_intr_mask(h, HPSA_INTR_ON); 4208 4209 hpsa_hba_inquiry(h); 4210 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 4211 h->busy_initializing = 0; 4212 return 1; 4213 4214 clean4: 4215 hpsa_free_sg_chain_blocks(h); 4216 hpsa_free_cmd_pool(h); 4217 free_irq(h->intr[h->intr_mode], h); 4218 clean2: 4219 clean1: 4220 h->busy_initializing = 0; 4221 kfree(h); 4222 return rc; 4223 } 4224 4225 static void hpsa_flush_cache(struct ctlr_info *h) 4226 { 4227 char *flush_buf; 4228 struct CommandList *c; 4229 4230 flush_buf = kzalloc(4, GFP_KERNEL); 4231 if (!flush_buf) 4232 return; 4233 4234 c = cmd_special_alloc(h); 4235 if (!c) { 4236 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4237 goto out_of_memory; 4238 } 4239 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 4240 RAID_CTLR_LUNID, TYPE_CMD); 4241 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 4242 if (c->err_info->CommandStatus != 0) 4243 dev_warn(&h->pdev->dev, 4244 "error flushing cache on controller\n"); 4245 cmd_special_free(h, c); 4246 out_of_memory: 4247 kfree(flush_buf); 4248 } 4249 4250 static void hpsa_shutdown(struct pci_dev *pdev) 4251 { 4252 struct ctlr_info *h; 4253 4254 h = pci_get_drvdata(pdev); 4255 /* Turn board interrupts off and send the flush cache command 4256 * sendcmd will turn off interrupt, and send the flush... 4257 * To write all data in the battery backed cache to disks 4258 */ 4259 hpsa_flush_cache(h); 4260 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4261 free_irq(h->intr[h->intr_mode], h); 4262 #ifdef CONFIG_PCI_MSI 4263 if (h->msix_vector) 4264 pci_disable_msix(h->pdev); 4265 else if (h->msi_vector) 4266 pci_disable_msi(h->pdev); 4267 #endif /* CONFIG_PCI_MSI */ 4268 } 4269 4270 static void __devexit hpsa_remove_one(struct pci_dev *pdev) 4271 { 4272 struct ctlr_info *h; 4273 4274 if (pci_get_drvdata(pdev) == NULL) { 4275 dev_err(&pdev->dev, "unable to remove device \n"); 4276 return; 4277 } 4278 h = pci_get_drvdata(pdev); 4279 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 4280 hpsa_shutdown(pdev); 4281 iounmap(h->vaddr); 4282 iounmap(h->transtable); 4283 iounmap(h->cfgtable); 4284 hpsa_free_sg_chain_blocks(h); 4285 pci_free_consistent(h->pdev, 4286 h->nr_cmds * sizeof(struct CommandList), 4287 h->cmd_pool, h->cmd_pool_dhandle); 4288 pci_free_consistent(h->pdev, 4289 h->nr_cmds * sizeof(struct ErrorInfo), 4290 h->errinfo_pool, h->errinfo_pool_dhandle); 4291 pci_free_consistent(h->pdev, h->reply_pool_size, 4292 h->reply_pool, h->reply_pool_dhandle); 4293 kfree(h->cmd_pool_bits); 4294 kfree(h->blockFetchTable); 4295 kfree(h->hba_inquiry_data); 4296 /* 4297 * Deliberately omit pci_disable_device(): it does something nasty to 4298 * Smart Array controllers that pci_enable_device does not undo 4299 */ 4300 pci_release_regions(pdev); 4301 pci_set_drvdata(pdev, NULL); 4302 kfree(h); 4303 } 4304 4305 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 4306 __attribute__((unused)) pm_message_t state) 4307 { 4308 return -ENOSYS; 4309 } 4310 4311 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 4312 { 4313 return -ENOSYS; 4314 } 4315 4316 static struct pci_driver hpsa_pci_driver = { 4317 .name = "hpsa", 4318 .probe = hpsa_init_one, 4319 .remove = __devexit_p(hpsa_remove_one), 4320 .id_table = hpsa_pci_device_id, /* id_table */ 4321 .shutdown = hpsa_shutdown, 4322 .suspend = hpsa_suspend, 4323 .resume = hpsa_resume, 4324 }; 4325 4326 /* Fill in bucket_map[], given nsgs (the max number of 4327 * scatter gather elements supported) and bucket[], 4328 * which is an array of 8 integers. The bucket[] array 4329 * contains 8 different DMA transfer sizes (in 16 4330 * byte increments) which the controller uses to fetch 4331 * commands. This function fills in bucket_map[], which 4332 * maps a given number of scatter gather elements to one of 4333 * the 8 DMA transfer sizes. The point of it is to allow the 4334 * controller to only do as much DMA as needed to fetch the 4335 * command, with the DMA transfer size encoded in the lower 4336 * bits of the command address. 4337 */ 4338 static void calc_bucket_map(int bucket[], int num_buckets, 4339 int nsgs, int *bucket_map) 4340 { 4341 int i, j, b, size; 4342 4343 /* even a command with 0 SGs requires 4 blocks */ 4344 #define MINIMUM_TRANSFER_BLOCKS 4 4345 #define NUM_BUCKETS 8 4346 /* Note, bucket_map must have nsgs+1 entries. */ 4347 for (i = 0; i <= nsgs; i++) { 4348 /* Compute size of a command with i SG entries */ 4349 size = i + MINIMUM_TRANSFER_BLOCKS; 4350 b = num_buckets; /* Assume the biggest bucket */ 4351 /* Find the bucket that is just big enough */ 4352 for (j = 0; j < 8; j++) { 4353 if (bucket[j] >= size) { 4354 b = j; 4355 break; 4356 } 4357 } 4358 /* for a command with i SG entries, use bucket b. */ 4359 bucket_map[i] = b; 4360 } 4361 } 4362 4363 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h, 4364 u32 use_short_tags) 4365 { 4366 int i; 4367 unsigned long register_value; 4368 4369 /* This is a bit complicated. There are 8 registers on 4370 * the controller which we write to to tell it 8 different 4371 * sizes of commands which there may be. It's a way of 4372 * reducing the DMA done to fetch each command. Encoded into 4373 * each command's tag are 3 bits which communicate to the controller 4374 * which of the eight sizes that command fits within. The size of 4375 * each command depends on how many scatter gather entries there are. 4376 * Each SG entry requires 16 bytes. The eight registers are programmed 4377 * with the number of 16-byte blocks a command of that size requires. 4378 * The smallest command possible requires 5 such 16 byte blocks. 4379 * the largest command possible requires MAXSGENTRIES + 4 16-byte 4380 * blocks. Note, this only extends to the SG entries contained 4381 * within the command block, and does not extend to chained blocks 4382 * of SG elements. bft[] contains the eight values we write to 4383 * the registers. They are not evenly distributed, but have more 4384 * sizes for small commands, and fewer sizes for larger commands. 4385 */ 4386 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; 4387 BUILD_BUG_ON(28 > MAXSGENTRIES + 4); 4388 /* 5 = 1 s/g entry or 4k 4389 * 6 = 2 s/g entry or 8k 4390 * 8 = 4 s/g entry or 16k 4391 * 10 = 6 s/g entry or 24k 4392 */ 4393 4394 h->reply_pool_wraparound = 1; /* spec: init to 1 */ 4395 4396 /* Controller spec: zero out this buffer. */ 4397 memset(h->reply_pool, 0, h->reply_pool_size); 4398 h->reply_pool_head = h->reply_pool; 4399 4400 bft[7] = h->max_sg_entries + 4; 4401 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable); 4402 for (i = 0; i < 8; i++) 4403 writel(bft[i], &h->transtable->BlockFetch[i]); 4404 4405 /* size of controller ring buffer */ 4406 writel(h->max_commands, &h->transtable->RepQSize); 4407 writel(1, &h->transtable->RepQCount); 4408 writel(0, &h->transtable->RepQCtrAddrLow32); 4409 writel(0, &h->transtable->RepQCtrAddrHigh32); 4410 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); 4411 writel(0, &h->transtable->RepQAddr0High32); 4412 writel(CFGTBL_Trans_Performant | use_short_tags, 4413 &(h->cfgtable->HostWrite.TransportRequest)); 4414 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4415 hpsa_wait_for_mode_change_ack(h); 4416 register_value = readl(&(h->cfgtable->TransportActive)); 4417 if (!(register_value & CFGTBL_Trans_Performant)) { 4418 dev_warn(&h->pdev->dev, "unable to get board into" 4419 " performant mode\n"); 4420 return; 4421 } 4422 /* Change the access methods to the performant access methods */ 4423 h->access = SA5_performant_access; 4424 h->transMethod = CFGTBL_Trans_Performant; 4425 } 4426 4427 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 4428 { 4429 u32 trans_support; 4430 4431 if (hpsa_simple_mode) 4432 return; 4433 4434 trans_support = readl(&(h->cfgtable->TransportSupport)); 4435 if (!(trans_support & PERFORMANT_MODE)) 4436 return; 4437 4438 hpsa_get_max_perf_mode_cmds(h); 4439 h->max_sg_entries = 32; 4440 /* Performant mode ring buffer and supporting data structures */ 4441 h->reply_pool_size = h->max_commands * sizeof(u64); 4442 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, 4443 &(h->reply_pool_dhandle)); 4444 4445 /* Need a block fetch table for performant mode */ 4446 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) * 4447 sizeof(u32)), GFP_KERNEL); 4448 4449 if ((h->reply_pool == NULL) 4450 || (h->blockFetchTable == NULL)) 4451 goto clean_up; 4452 4453 hpsa_enter_performant_mode(h, 4454 trans_support & CFGTBL_Trans_use_short_tags); 4455 4456 return; 4457 4458 clean_up: 4459 if (h->reply_pool) 4460 pci_free_consistent(h->pdev, h->reply_pool_size, 4461 h->reply_pool, h->reply_pool_dhandle); 4462 kfree(h->blockFetchTable); 4463 } 4464 4465 /* 4466 * This is it. Register the PCI driver information for the cards we control 4467 * the OS will call our registered routines when it finds one of our cards. 4468 */ 4469 static int __init hpsa_init(void) 4470 { 4471 return pci_register_driver(&hpsa_pci_driver); 4472 } 4473 4474 static void __exit hpsa_cleanup(void) 4475 { 4476 pci_unregister_driver(&hpsa_pci_driver); 4477 } 4478 4479 module_init(hpsa_init); 4480 module_exit(hpsa_cleanup); 4481